[picodrive.git] / Pico / Memory.c

// This is part of Pico Library\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
// (c) Copyright 2006 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
\r
\r
//#define __debug_io\r
\r
#include "PicoInt.h"\r
\r
#include "sound/sound.h"\r
#include "sound/ym2612.h"\r
#include "sound/sn76496.h"\r
\r
typedef unsigned char  u8;\r
typedef unsigned short u16;\r
typedef unsigned int   u32;\r
\r
extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
\r
#ifdef _ASM_MEMORY_C\r
u8   PicoRead8(u32 a);\r
u16  PicoRead16(u32 a);\r
void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
void PicoWriteRomHW_in1 (u32 a,u32 d);\r
#endif\r
\r
\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
// cyclone debug mode\r
u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
extern unsigned int ppop;\r
#endif\r
\r
#if defined(EMU_C68K) || defined(EMU_A68K)\r
static __inline int PicoMemBase(u32 pc)\r
{\r
  int membase=0;\r
\r
  if (pc<Pico.romsize+4)\r
  {\r
    membase=(int)Pico.rom; // Program Counter in Rom\r
  }\r
  else if ((pc&0xe00000)==0xe00000)\r
  {\r
    membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
  }\r
  else\r
  {\r
    // Error - Program Counter is invalid\r
    membase=(int)Pico.rom;\r
  }\r
\r
  return membase;\r
}\r
#endif\r
\r
\r
#ifdef EMU_A68K\r
extern u8 *OP_ROM=NULL,*OP_RAM=NULL;\r
#endif\r
\r
static u32 CPU_CALL PicoCheckPc(u32 pc)\r
{\r
  u32 ret=0;\r
#if defined(EMU_C68K)\r
  pc-=PicoCpu.membase; // Get real pc\r
  pc&=0xfffffe;\r
\r
  PicoCpu.membase=PicoMemBase(pc);\r
\r
  ret = PicoCpu.membase+pc;\r
#elif defined(EMU_A68K)\r
  OP_ROM=(u8 *)PicoMemBase(pc);\r
\r
  // don't bother calling us back unless it's outside the 64k segment\r
  M68000_regs.AsmBank=(pc>>16);\r
#endif\r
  return ret;\r
}\r
\r
\r
int PicoInitPc(u32 pc)\r
{\r
  PicoCheckPc(pc);\r
  return 0;\r
}\r
\r
#ifndef _ASM_MEMORY_C\r
void PicoMemReset()\r
{\r
}\r
#endif\r
\r
// -----------------------------------------------------------------\r
\r
#ifndef _ASM_MEMORY_C\r
// address must already be checked\r
static int SRAMRead(u32 a)\r
{\r
  u8 *d = SRam.data-SRam.start+a;\r
  return (d[0]<<8)|d[1];\r
}\r
#endif\r
\r
static int PadRead(int i)\r
{\r
  int pad=0,value=0,TH;\r
  pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
  TH=Pico.ioports[i+1]&0x40;\r
\r
  if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
    int phase = Pico.m.padTHPhase[i];\r
\r
    if(phase == 2 && !TH) {\r
      value=(pad&0xc0)>>2;              // ?0SA 0000\r
      goto end;\r
    } else if(phase == 3 && TH) {\r
      value=(pad&0x30)|((pad>>8)&0xf);  // ?1CB MXYZ\r
      goto end;\r
    } else if(phase == 3 && !TH) {\r
      value=((pad&0xc0)>>2)|0x0f;       // ?0SA 1111\r
      goto end;\r
    }\r
  }\r
\r
  if(TH) value=(pad&0x3f);              // ?1CB RLDU\r
  else   value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
\r
  end:\r
\r
  // orr the bits, which are set as output\r
  value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r
\r
  return value; // will mirror later\r
}\r
\r
u8 z80Read8(u32 a)\r
{\r
  if(Pico.m.z80Run&1) return 0;\r
\r
  a&=0x1fff;\r
\r
  if(!(PicoOpt&4)) {\r
    // Z80 disabled, do some faking\r
    static u8 zerosent = 0;\r
    if(a == Pico.m.z80_lastaddr) { // probably polling something\r
      u8 d = Pico.m.z80_fakeval;\r
      if((d & 0xf) == 0xf && !zerosent) {\r
        d = 0; zerosent = 1;\r
      } else {\r
        Pico.m.z80_fakeval++;\r
        zerosent = 0;\r
      }\r
      return d;\r
    } else {\r
      Pico.m.z80_fakeval = 0;\r
    }\r
  }\r
\r
  Pico.m.z80_lastaddr = (u16) a;\r
  return Pico.zram[a];\r
}\r
\r
\r
// for nonstandard reads\r
#ifndef _ASM_MEMORY_C\r
static\r
#endif\r
u32 UnusualRead16(u32 a, int realsize)\r
{\r
  u32 d=0;\r
\r
  dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r
\r
  // for games with simple protection devices, discovered by Haze\r
  // some dumb detection is used, but that should be enough to make things work\r
  if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
    if      (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
      if      (a == 0x400000) { d=0x55<<8; goto end; }\r
      else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
    }\r
    else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
      if      (a == 0x400000) { d=0x55<<8; goto end; }\r
      else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
      else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
      else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
    }\r
    else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
      if      (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
      else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
      // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
    }\r
    else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
      if      (a == 0x400000) { d=0x90<<8; goto end; }\r
      else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
                                                       // checks the result, which is of the above one. Left it just in case.\r
    }\r
    else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
      if      (a == 0x400000) { d=0x55<<8; goto end; }\r
      else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
      else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
      else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
    }\r
    // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
    // Lion King II, The (Unl) [!]  writes @ 400000 and wants to get that val @ 400002 and wites another val\r
    // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
    d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
  }\r
  else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
    if      (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
      d=0x0c; goto end;\r
    }\r
    else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
      d=0x28; goto end; // does the check from RAM\r
    }\r
    else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
      d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
    }\r
    else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
      d=0x0a; goto end;\r
    }\r
  }\r
  else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
    d=0x01; goto end;\r
  }\r
  else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
    d=0x1f; goto end;\r
  }\r
  else if (a == 0x30fe02) {\r
    // Virtua Racing - just for fun\r
    // this seems to be some flag that SVP is ready or something similar\r
    d=1; goto end;\r
  }\r
\r
end:\r
  dprintf("ret = %04x", d);\r
  return d;\r
}\r
\r
#ifndef _ASM_MEMORY_C\r
static\r
#endif\r
u32 OtherRead16(u32 a, int realsize)\r
{\r
  u32 d=0;\r
\r
  if ((a&0xff0000)==0xa00000) {\r
    if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r
    if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; dprintf("read ym2612: %04x", d); goto end; } // 0x4000-0x5fff, Fudge if disabled\r
    d=0xffff; goto end;\r
  }\r
  if ((a&0xffffe0)==0xa10000) { // I/O ports\r
    a=(a>>1)&0xf;\r
    switch(a) {\r
      case 0:  d=Pico.m.hardware; break; // Hardware value (Version register)\r
      case 1:  d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r
      case 2:  d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r
      default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r
    }\r
    d|=d<<8;\r
    goto end;\r
  }\r
  // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r
  if (a==0xa11100) {\r
    d=Pico.m.z80Run&1;\r
#if 0\r
    if (!d) {\r
      // do we need this?\r
      extern int z80stopCycle; // TODO: tidy\r
      int stop_before = SekCyclesDone() - z80stopCycle;\r
      if (stop_before > 0 && stop_before <= 16) // Gens uses 16 here\r
        d = 1; // bus not yet available\r
    }\r
#endif\r
    d=(d<<8)|0x8000|Pico.m.rotate++;\r
    dprintf("get_zrun: %04x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), SekPc);\r
    goto end; }\r
\r
#ifndef _ASM_MEMORY_C\r
  if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r
#endif\r
\r
  d = UnusualRead16(a, realsize);\r
\r
end:\r
  return d;\r
}\r
\r
//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
\r
static void OtherWrite8(u32 a,u32 d,int realsize)\r
{\r
  if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r
  if ((a&0xff4000)==0xa00000)  { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r
  if ((a&0xff6000)==0xa04000)  { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r
  if ((a&0xffffe0)==0xa10000)  { // I/O ports\r
    a=(a>>1)&0xf;\r
    // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
    if(PicoOpt&0x20) {\r
      if(a==1) {\r
        Pico.m.padDelay[0] = 0;\r
        if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
      }\r
      else if(a==2) {\r
        Pico.m.padDelay[1] = 0;\r
        if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
      }\r
    }\r
    Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
    return;\r
  }\r
  if (a==0xa11100) {\r
    extern int z80startCycle, z80stopCycle;\r
    //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r
    d&=1; d^=1;\r
    if(!d) {\r
       // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r
      // if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20); // FIXME: movies\r
      z80stopCycle = SekCyclesDone();\r
      //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r
    } else {\r
      z80startCycle = SekCyclesDone();\r
      //if(Pico.m.scanline != -1)\r
      //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r
    }\r
    dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);\r
    Pico.m.z80Run=(u8)d; return;\r
  }\r
  if (a==0xa11200) { dprintf("write z80Reset: %02x", d); if(!(d&1)) z80_reset(); return; }\r
\r
  if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r
  {\r
    Pico.m.z80_bank68k>>=1;\r
    Pico.m.z80_bank68k|=(d&1)<<8;\r
    Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
    return;\r
  }\r
\r
  if ((a&0xe700e0)==0xc00000)  { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r
\r
  // sram\r
  //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r
  //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
  if(a >= SRam.start && a <= SRam.end) {\r
    unsigned int sreg = Pico.m.sram_reg;\r
    if(!(sreg & 0x10)) {\r
      // not detected SRAM\r
      if((a&~1)==0x200000) {\r
        Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r
        SRam.start=0x200000; SRam.end=SRam.start+1;\r
      }\r
      Pico.m.sram_reg|=0x10;\r
    }\r
    if(sreg & 4) { // EEPROM write\r
      if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r
        // just update pending state\r
        SRAMUpdPending(a, d);\r
      } else {\r
        SRAMWriteEEPROM(sreg>>6); // execute pending\r
        SRAMUpdPending(a, d);\r
        lastSSRamWrite = SekCyclesDoneT();\r
      }\r
    } else if(!(sreg & 2)) {\r
      u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
      if(*pm != (u8)d) {\r
        SRam.changed = 1;\r
        *pm=(u8)d;\r
      }\r
    }\r
    return;\r
  }\r
\r
#ifdef _ASM_MEMORY_C\r
  // special ROM hardware (currently only banking and sram reg supported)\r
  if((a&0xfffff1) == 0xA130F1) {\r
    PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
    return;\r
  }\r
#else\r
  // sram access register\r
  if(a == 0xA130F1) {\r
    Pico.m.sram_reg = (u8)(d&3);\r
    return;\r
  }\r
#endif\r
  dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
\r
  if(a >= 0xA13004 && a < 0xA13040) {\r
    // dumb 12-in-1 or 4-in-1 banking support\r
    int len;\r
    a &= 0x3f; a <<= 16;\r
    len = Pico.romsize - a;\r
    if (len <= 0) return; // invalid/missing bank\r
    if (len > 0x200000) len = 0x200000; // 2 megs\r
    memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r
    return;\r
  }\r
\r
  // for games with simple protection devices, discovered by Haze\r
  else if ((a>>22) == 1)\r
    Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
}\r
\r
static void OtherWrite16(u32 a,u32 d)\r
{\r
  if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r
  if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r
\r
  if ((a&0xffffe0)==0xa10000) { // I/O ports\r
    a=(a>>1)&0xf;\r
    // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
    if(PicoOpt&0x20) {\r
      if(a==1) {\r
        Pico.m.padDelay[0] = 0;\r
        if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r
      }\r
      else if(a==2) {\r
        Pico.m.padDelay[1] = 0;\r
        if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r
      }\r
    }\r
    Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r
    return;\r
  }\r
  if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r
  if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }\r
\r
  OtherWrite8(a,  d>>8, 16);\r
  OtherWrite8(a+1,d&0xff, 16);\r
}\r
\r
// -----------------------------------------------------------------\r
//                     Read Rom and read Ram\r
\r
#ifndef _ASM_MEMORY_C\r
u8 CPU_CALL PicoRead8(u32 a)\r
{\r
  u32 d=0;\r
\r
  if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
\r
  a&=0xffffff;\r
\r
#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
  // sram\r
  if(a >= SRam.start && a <= SRam.end) {\r
    unsigned int sreg = Pico.m.sram_reg;\r
    if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
      Pico.m.sram_reg|=0x10; // should be normal SRAM\r
    }\r
    if(sreg & 4) { // EEPROM read\r
      d = SRAMReadEEPROM();\r
      goto end;\r
    } else if(sreg & 1) {\r
      d = *(u8 *)(SRam.data-SRam.start+a);\r
      goto end;\r
    }\r
  }\r
#endif\r
\r
  if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
  if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
\r
  d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r
\r
  end:\r
\r
  //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r
  //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
  //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
  //  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
\r
  //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r
  //dprintf("r8 : %06x,   %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r
#ifdef __debug_io\r
  dprintf("r8 : %06x,   %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
#endif\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
  if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
    lastread_a = a;\r
    lastread_d[lrp_cyc++&15] = (u8)d;\r
  }\r
#endif\r
  return (u8)d;\r
}\r
\r
u16 CPU_CALL PicoRead16(u32 a)\r
{\r
  u16 d=0;\r
\r
  if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
\r
  a&=0xfffffe;\r
\r
#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
  // sram\r
  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
    d = (u16) SRAMRead(a);\r
    goto end;\r
  }\r
#endif\r
\r
  if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
\r
  d = (u16)OtherRead16(a, 16);\r
\r
  end:\r
  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
  //  dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
\r
#ifdef __debug_io\r
  dprintf("r16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
#endif\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
  if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
    lastread_a = a;\r
    lastread_d[lrp_cyc++&15] = d;\r
  }\r
#endif\r
  return d;\r
}\r
\r
u32 CPU_CALL PicoRead32(u32 a)\r
{\r
  u32 d=0;\r
\r
  if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
\r
  a&=0xfffffe;\r
\r
  // sram\r
  if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
    d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r
    goto end;\r
  }\r
\r
  if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
\r
  d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
\r
  end:\r
#ifdef __debug_io\r
  dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
#endif\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
  if(a>=Pico.romsize&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b) {\r
    lastread_a = a;\r
    lastread_d[lrp_cyc++&15] = d;\r
  }\r
#endif\r
  return d;\r
}\r
#endif\r
\r
// -----------------------------------------------------------------\r
//                            Write Ram\r
\r
static void CPU_CALL PicoWrite8(u32 a,u8 d)\r
{\r
#ifdef __debug_io\r
  dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
#endif\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
  lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
  //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
  //  dprintf("w8 : %06x,   %02x @%06x", a&0xffffff, d, SekPc);\r
\r
\r
  if ((a&0xe00000)==0xe00000) {\r
	  if((a&0xffff)==0xf62a) dprintf("(f62a) = %02x [%i|%i] @ %x", d, Pico.m.scanline, SekCyclesDone(), SekPc);\r
	   u8 *pm=(u8 *)(Pico.ram+((a^1)&0xffff)); pm[0]=d; return; } // Ram\r
\r
  a&=0xffffff;\r
  OtherWrite8(a,d,8);\r
}\r
\r
static void CPU_CALL PicoWrite16(u32 a,u16 d)\r
{\r
#ifdef __debug_io\r
  dprintf("w16: %06x, %04x", a&0xffffff, d);\r
#endif\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
  lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
  //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
  //  dprintf("w16: %06x, %04x  @%06x", a&0xffffff, d, SekPc);\r
\r
  if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
\r
  a&=0xfffffe;\r
  OtherWrite16(a,d);\r
}\r
\r
static void CPU_CALL PicoWrite32(u32 a,u32 d)\r
{\r
#ifdef __debug_io\r
  dprintf("w32: %06x, %08x", a&0xffffff, d);\r
#endif\r
#if defined(EMU_C68K) && defined(EMU_M68K)\r
  lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
\r
  if ((a&0xe00000)==0xe00000)\r
  {\r
    // Ram:\r
    u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
    pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
    return;\r
  }\r
\r
  a&=0xfffffe;\r
  OtherWrite16(a,  (u16)(d>>16));\r
  OtherWrite16(a+2,(u16)d);\r
}\r
\r
\r
// -----------------------------------------------------------------\r
int PicoMemInit()\r
{\r
#ifdef EMU_C68K\r
  // Setup memory callbacks:\r
  PicoCpu.checkpc=PicoCheckPc;\r
  PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;\r
  PicoCpu.fetch16=PicoCpu.read16=PicoRead16;\r
  PicoCpu.fetch32=PicoCpu.read32=PicoRead32;\r
  PicoCpu.write8 =PicoWrite8;\r
  PicoCpu.write16=PicoWrite16;\r
  PicoCpu.write32=PicoWrite32;\r
#endif\r
  return 0;\r
}\r
\r
#ifdef EMU_A68K\r
struct A68KInter\r
{\r
  u32 unknown;\r
  u8  (__fastcall *Read8) (u32 a);\r
  u16 (__fastcall *Read16)(u32 a);\r
  u32 (__fastcall *Read32)(u32 a);\r
  void (__fastcall *Write8)  (u32 a,u8 d);\r
  void (__fastcall *Write16) (u32 a,u16 d);\r
  void (__fastcall *Write32) (u32 a,u32 d);\r
  void (__fastcall *ChangePc)(u32 a);\r
  u8  (__fastcall *PcRel8) (u32 a);\r
  u16 (__fastcall *PcRel16)(u32 a);\r
  u32 (__fastcall *PcRel32)(u32 a);\r
  u16 (__fastcall *Dir16)(u32 a);\r
  u32 (__fastcall *Dir32)(u32 a);\r
};\r
\r
struct A68KInter a68k_memory_intf=\r
{\r
  0,\r
  PicoRead8,\r
  PicoRead16,\r
  PicoRead32,\r
  PicoWrite8,\r
  PicoWrite16,\r
  PicoWrite32,\r
  PicoCheckPc,\r
  PicoRead8,\r
  PicoRead16,\r
  PicoRead32,\r
  PicoRead16, // unused\r
  PicoRead32, // unused\r
};\r
#endif\r
\r
#ifdef EMU_M68K\r
unsigned int  m68k_read_pcrelative_CD8 (unsigned int a);\r
unsigned int  m68k_read_pcrelative_CD16(unsigned int a);\r
unsigned int  m68k_read_pcrelative_CD32(unsigned int a);\r
\r
// these are allowed to access RAM\r
unsigned int  m68k_read_pcrelative_8 (unsigned int a) {\r
  a&=0xffffff;\r
  if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
  if(a<Pico.romsize)         return *(u8 *)(Pico.rom+(a^1)); // Rom\r
  if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
  return 0;//(u8)  lastread_d;\r
}\r
unsigned int  m68k_read_pcrelative_16(unsigned int a) {\r
  a&=0xffffff;\r
  if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
  if(a<Pico.romsize)         return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
  if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
  return 0;//(u16) lastread_d;\r
}\r
unsigned int  m68k_read_pcrelative_32(unsigned int a) {\r
  a&=0xffffff;\r
  if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
  if(a<Pico.romsize)         { u16 *pm=(u16 *)(Pico.rom+(a&~1));     return (pm[0]<<16)|pm[1]; }\r
  if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
  return 0;//lastread_d;\r
}\r
\r
unsigned int m68k_read_immediate_16(unsigned int a)    { return m68k_read_pcrelative_16(a); }\r
unsigned int m68k_read_immediate_32(unsigned int a)    { return m68k_read_pcrelative_32(a); }\r
unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_pcrelative_8 (a); }\r
unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_pcrelative_16(a); }\r
unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_pcrelative_32(a); }\r
\r
#ifdef EMU_C68K\r
// ROM only\r
unsigned int  m68k_read_memory_8(unsigned int a)  { if(a<Pico.romsize) return  *(u8 *) (Pico.rom+(a^1)); return (u8)  lastread_d[lrp_mus++&15]; }\r
unsigned int  m68k_read_memory_16(unsigned int a) { if(a<Pico.romsize) return  *(u16 *)(Pico.rom+(a&~1));return (u16) lastread_d[lrp_mus++&15]; }\r
unsigned int  m68k_read_memory_32(unsigned int a) { if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));return (pm[0]<<16)|pm[1];} return lastread_d[lrp_mus++&15]; }\r
\r
// ignore writes, Cyclone already done that\r
void m68k_write_memory_8(unsigned int address, unsigned int value)  { lastwrite_mus_d[lwp_mus++&15] = value; }\r
void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
#else\r
unsigned char  PicoReadCD8w (unsigned int a);\r
unsigned short PicoReadCD16w(unsigned int a);\r
unsigned int   PicoReadCD32w(unsigned int a);\r
void PicoWriteCD8w (unsigned int a, unsigned char d);\r
void PicoWriteCD16w(unsigned int a, unsigned short d);\r
void PicoWriteCD32w(unsigned int a, unsigned int d);\r
\r
unsigned int  m68k_read_memory_8(unsigned int address)\r
{\r
    return (PicoMCD&1) ? PicoReadCD8w(address)  : PicoRead8(address);\r
}\r
\r
unsigned int  m68k_read_memory_16(unsigned int address)\r
{\r
    return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r
}\r
\r
unsigned int  m68k_read_memory_32(unsigned int address)\r
{\r
    return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r
}\r
\r
void m68k_write_memory_8(unsigned int address, unsigned int value)\r
{\r
    if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r
}\r
\r
void m68k_write_memory_16(unsigned int address, unsigned int value)\r
{\r
    if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r
}\r
\r
void m68k_write_memory_32(unsigned int address, unsigned int value)\r
{\r
    if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r
}\r
#endif\r
#endif // EMU_M68K\r
\r
\r
// -----------------------------------------------------------------\r
//                        z80 memhandlers\r
\r
unsigned char z80_read(unsigned short a)\r
{\r
  u8 ret = 0;\r
\r
  if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
  {\r
    if(PicoOpt&1) ret = (u8) YM2612Read();\r
    goto end;\r
  }\r
\r
  if (a>=0x8000)\r
  {\r
    u32 addr68k;\r
    addr68k=Pico.m.z80_bank68k<<15;\r
    addr68k+=a&0x7fff;\r
\r
    ret = (u8) PicoRead8(addr68k);\r
    //dprintf("z80->68k w8 : %06x,   %02x", addr68k, ret);\r
    goto end;\r
  }\r
\r
  // should not be needed || dprintf("z80_read RAM");\r
  if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r
\r
end:\r
  return ret;\r
}\r
\r
unsigned short z80_read16(unsigned short a)\r
{\r
  //dprintf("z80_read16");\r
\r
  return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
}\r
\r
void z80_write(unsigned char data, unsigned short a)\r
{\r
  //if (a<0x4000)\r
  //  dprintf("z80 w8 : %06x,   %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));\r
\r
  if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
  {\r
    if(PicoOpt&1) emustatus|=YM2612Write(a, data);\r
    return;\r
  }\r
\r
  if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
  {\r
    if(PicoOpt&2) SN76496Write(data);\r
    return;\r
  }\r
\r
  if ((a>>8)==0x60)\r
  {\r
    Pico.m.z80_bank68k>>=1;\r
    Pico.m.z80_bank68k|=(data&1)<<8;\r
    Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
    return;\r
  }\r
\r
  if (a>=0x8000)\r
  {\r
    u32 addr68k;\r
    addr68k=Pico.m.z80_bank68k<<15;\r
    addr68k+=a&0x7fff;\r
    PicoWrite8(addr68k, data);\r
    //dprintf("z80->68k w8 : %06x,   %02x", addr68k, data);\r
    return;\r
  }\r
\r
  // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r
  if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
}\r
\r
void z80_write16(unsigned short data, unsigned short a)\r
{\r
  //dprintf("z80_write16");\r
\r
  z80_write((unsigned char) data,a);\r
  z80_write((unsigned char)(data>>8),(u16)(a+1));\r
}\r
\r