z80/ym2612 reset handling improved
[picodrive.git] / Pico / Memory.c
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CommitLineData
1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006,2007 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include "PicoInt.h"\r
11\r
12#include "sound/ym2612.h"\r
13#include "sound/sn76496.h"\r
14\r
15#ifndef UTYPES_DEFINED\r
16typedef unsigned char u8;\r
17typedef unsigned short u16;\r
18typedef unsigned int u32;\r
19#define UTYPES_DEFINED\r
20#endif\r
21\r
22extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
23\r
24#ifdef _ASM_MEMORY_C\r
25u32 PicoRead8(u32 a);\r
26u32 PicoRead16(u32 a);\r
27void PicoWrite8(u32 a,u8 d);\r
28void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
29#endif\r
30\r
31\r
32#ifdef EMU_CORE_DEBUG\r
33u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
34int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
35extern unsigned int ppop;\r
36#endif\r
37\r
38#ifdef IO_STATS\r
39void log_io(unsigned int addr, int bits, int rw);\r
40#elif defined(_MSC_VER)\r
41#define log_io\r
42#else\r
43#define log_io(...)\r
44#endif\r
45\r
46#if defined(EMU_C68K)\r
47static __inline int PicoMemBase(u32 pc)\r
48{\r
49 int membase=0;\r
50\r
51 if (pc<Pico.romsize+4)\r
52 {\r
53 membase=(int)Pico.rom; // Program Counter in Rom\r
54 }\r
55 else if ((pc&0xe00000)==0xe00000)\r
56 {\r
57 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
58 }\r
59 else\r
60 {\r
61 // Error - Program Counter is invalid\r
62 membase=(int)Pico.rom;\r
63 }\r
64\r
65 return membase;\r
66}\r
67#endif\r
68\r
69\r
70PICO_INTERNAL u32 PicoCheckPc(u32 pc)\r
71{\r
72 u32 ret=0;\r
73#if defined(EMU_C68K)\r
74 pc-=PicoCpuCM68k.membase; // Get real pc\r
75// pc&=0xfffffe;\r
76 pc&=~1;\r
77 if ((pc<<8) == 0)\r
78 {\r
79 printf("%i:%03i: game crash detected @ %06x\n", Pico.m.frame_count, Pico.m.scanline, SekPc);\r
80 return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r
81 }\r
82\r
83 PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);\r
84 PicoCpuCM68k.membase-=pc&0xff000000;\r
85\r
86 ret = PicoCpuCM68k.membase+pc;\r
87#endif\r
88 return ret;\r
89}\r
90\r
91\r
92PICO_INTERNAL void PicoInitPc(u32 pc)\r
93{\r
94 PicoCheckPc(pc);\r
95}\r
96\r
97#ifndef _ASM_MEMORY_C\r
98PICO_INTERNAL_ASM void PicoMemReset(void)\r
99{\r
100}\r
101#endif\r
102\r
103// -----------------------------------------------------------------\r
104\r
105int PadRead(int i)\r
106{\r
107 int pad,value,data_reg;\r
108 pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
109 data_reg=Pico.ioports[i+1];\r
110\r
111 // orr the bits, which are set as output\r
112 value = data_reg&(Pico.ioports[i+4]|0x80);\r
113\r
114 if (PicoOpt & POPT_6BTN_PAD)\r
115 {\r
116 int phase = Pico.m.padTHPhase[i];\r
117\r
118 if(phase == 2 && !(data_reg&0x40)) { // TH\r
119 value|=(pad&0xc0)>>2; // ?0SA 0000\r
120 return value;\r
121 } else if(phase == 3) {\r
122 if(data_reg&0x40)\r
123 value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
124 else\r
125 value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
126 return value;\r
127 }\r
128 }\r
129\r
130 if(data_reg&0x40) // TH\r
131 value|=(pad&0x3f); // ?1CB RLDU\r
132 else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
133\r
134 return value; // will mirror later\r
135}\r
136\r
137\r
138#ifndef _ASM_MEMORY_C\r
139static\r
140#endif\r
141u32 SRAMRead(u32 a)\r
142{\r
143 unsigned int sreg = Pico.m.sram_reg;\r
144 if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
145 elprintf(EL_SRAMIO, "normal sram detected.");\r
146 Pico.m.sram_reg|=0x10; // should be normal SRAM\r
147 }\r
148 if (sreg & 4) // EEPROM read\r
149 return SRAMReadEEPROM();\r
150 else // if(sreg & 1) // (sreg&5) is one of prerequisites\r
151 return *(u8 *)(SRam.data-SRam.start+a);\r
152}\r
153\r
154#ifndef _ASM_MEMORY_C\r
155static\r
156#endif\r
157u32 SRAMRead16(u32 a)\r
158{\r
159 u32 d;\r
160 if (Pico.m.sram_reg & 4) {\r
161 d = SRAMReadEEPROM();\r
162 d |= d << 8;\r
163 } else {\r
164 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
165 d =*pm++ << 8;\r
166 d|=*pm++;\r
167 }\r
168 return d;\r
169}\r
170\r
171static void SRAMWrite(u32 a, u32 d)\r
172{\r
173 unsigned int sreg = Pico.m.sram_reg;\r
174 if(!(sreg & 0x10)) {\r
175 // not detected SRAM\r
176 if((a&~1)==0x200000) {\r
177 elprintf(EL_SRAMIO, "eeprom detected.");\r
178 sreg|=4; // this should be a game with EEPROM (like NBA Jam)\r
179 SRam.start=0x200000; SRam.end=SRam.start+1;\r
180 } else\r
181 elprintf(EL_SRAMIO, "normal sram detected.");\r
182 sreg|=0x10;\r
183 Pico.m.sram_reg=sreg;\r
184 }\r
185 if(sreg & 4) { // EEPROM write\r
186 // this diff must be at most 16 for NBA Jam to work\r
187 if(SekCyclesDoneT()-lastSSRamWrite < 16) {\r
188 // just update pending state\r
189 elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);\r
190 SRAMUpdPending(a, d);\r
191 } else {\r
192 int old=sreg;\r
193 SRAMWriteEEPROM(sreg>>6); // execute pending\r
194 SRAMUpdPending(a, d);\r
195 if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed\r
196 lastSSRamWrite = SekCyclesDoneT();\r
197 }\r
198 } else if(!(sreg & 2)) {\r
199 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
200 if(*pm != (u8)d) {\r
201 SRam.changed = 1;\r
202 *pm=(u8)d;\r
203 }\r
204 }\r
205}\r
206\r
207// for nonstandard reads\r
208static u32 OtherRead16End(u32 a, int realsize)\r
209{\r
210 u32 d=0;\r
211\r
212 // 32x test\r
213/*\r
214 if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA\r
215 else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS\r
216 else if (a == 0xa15100) { d = 0x0080; goto end; }\r
217 else\r
218*/\r
219\r
220 // for games with simple protection devices, discovered by Haze\r
221 // some dumb detection is used, but that should be enough to make things work\r
222 if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
223 if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
224 if (a == 0x400000) { d=0x55<<8; goto end; }\r
225 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
226 }\r
227 else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
228 if (a == 0x400000) { d=0x55<<8; goto end; }\r
229 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
230 else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
231 else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
232 }\r
233 else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
234 if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
235 else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
236 // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
237 }\r
238 else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
239 if (a == 0x400000) { d=0x90<<8; goto end; }\r
240 else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
241 // checks the result, which is of the above one. Left it just in case.\r
242 }\r
243 else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
244 if (a == 0x400000) { d=0x55<<8; goto end; }\r
245 else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
246 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
247 else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
248 }\r
249 // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
250 // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
251 // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
252 d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
253 }\r
254 else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
255 if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
256 d=0x0c; goto end;\r
257 }\r
258 else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
259 d=0x28; goto end; // does the check from RAM\r
260 }\r
261 else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
262 d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
263 }\r
264 else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
265 d=0x0a; goto end;\r
266 }\r
267 }\r
268 else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
269 d=0x01; goto end;\r
270 }\r
271 else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
272 d=0x1f; goto end;\r
273 }\r
274 else if (a == 0x30fe02) {\r
275 // Virtua Racing - just for fun\r
276 // this seems to be some flag that SVP is ready or something similar\r
277 d=1; goto end;\r
278 }\r
279\r
280end:\r
281 elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);\r
282 return d;\r
283}\r
284\r
285\r
286//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
287\r
288static void OtherWrite8End(u32 a,u32 d,int realsize)\r
289{\r
290 // sram\r
291 if(a >= SRam.start && a <= SRam.end) {\r
292 elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d, SekPc);\r
293 SRAMWrite(a, d);\r
294 return;\r
295 }\r
296\r
297#ifdef _ASM_MEMORY_C\r
298 // special ROM hardware (currently only banking and sram reg supported)\r
299 if((a&0xfffff1) == 0xA130F1) {\r
300 PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
301 return;\r
302 }\r
303#else\r
304 // sram access register\r
305 if(a == 0xA130F1) {\r
306 elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
307 Pico.m.sram_reg &= ~3;\r
308 Pico.m.sram_reg |= (u8)(d&3);\r
309 return;\r
310 }\r
311#endif\r
312 elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
313\r
314 // for games with simple protection devices, discovered by Haze\r
315 if ((a>>22) == 1)\r
316 Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
317}\r
318\r
319#include "MemoryCmn.c"\r
320\r
321\r
322// -----------------------------------------------------------------\r
323// Read Rom and read Ram\r
324\r
325#ifndef _ASM_MEMORY_C\r
326PICO_INTERNAL_ASM u32 PicoRead8(u32 a)\r
327{\r
328 u32 d=0;\r
329\r
330 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
331\r
332 a&=0xffffff;\r
333\r
334#ifndef EMU_CORE_DEBUG\r
335 // sram\r
336 if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
337 d = SRAMRead(a);\r
338 elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
339 goto end;\r
340 }\r
341#endif\r
342\r
343 if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
344 log_io(a, 8, 0);\r
345 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
346\r
347 if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead8(a); goto end; } // VDP\r
348\r
349 d=OtherRead16(a&~1, 8);\r
350 if ((a&1)==0) d>>=8;\r
351\r
352end:\r
353 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
354#ifdef EMU_CORE_DEBUG\r
355 if (a>=Pico.romsize) {\r
356 lastread_a = a;\r
357 lastread_d[lrp_cyc++&15] = (u8)d;\r
358 }\r
359#endif\r
360 return d;\r
361}\r
362\r
363PICO_INTERNAL_ASM u32 PicoRead16(u32 a)\r
364{\r
365 u32 d=0;\r
366\r
367 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
368\r
369 a&=0xfffffe;\r
370\r
371#ifndef EMU_CORE_DEBUG\r
372 // sram\r
373 if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
374 d = SRAMRead16(a);\r
375 elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
376 goto end;\r
377 }\r
378#endif\r
379\r
380 if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
381 log_io(a, 16, 0);\r
382\r
383 if ((a&0xe700e0)==0xc00000)\r
384 d = PicoVideoRead(a);\r
385 else d = OtherRead16(a, 16);\r
386\r
387end:\r
388 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
389#ifdef EMU_CORE_DEBUG\r
390 if (a>=Pico.romsize) {\r
391 lastread_a = a;\r
392 lastread_d[lrp_cyc++&15] = d;\r
393 }\r
394#endif\r
395 return d;\r
396}\r
397\r
398PICO_INTERNAL_ASM u32 PicoRead32(u32 a)\r
399{\r
400 u32 d=0;\r
401\r
402 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
403\r
404 a&=0xfffffe;\r
405\r
406 // sram\r
407 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
408 d = (SRAMRead16(a)<<16)|SRAMRead16(a+2);\r
409 elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);\r
410 goto end;\r
411 }\r
412\r
413 if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
414 log_io(a, 32, 0);\r
415\r
416 if ((a&0xe700e0)==0xc00000)\r
417 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
418 else d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
419\r
420end:\r
421 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
422#ifdef EMU_CORE_DEBUG\r
423 if (a>=Pico.romsize) {\r
424 lastread_a = a;\r
425 lastread_d[lrp_cyc++&15] = d;\r
426 }\r
427#endif\r
428 return d;\r
429}\r
430#endif\r
431\r
432// -----------------------------------------------------------------\r
433// Write Ram\r
434\r
435#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)\r
436PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)\r
437{\r
438 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
439#ifdef EMU_CORE_DEBUG\r
440 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
441#endif\r
442\r
443 if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
444 log_io(a, 8, 1);\r
445\r
446 a&=0xffffff;\r
447 OtherWrite8(a,d);\r
448}\r
449#endif\r
450\r
451void PicoWrite16(u32 a,u16 d)\r
452{\r
453 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
454#ifdef EMU_CORE_DEBUG\r
455 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
456#endif\r
457\r
458 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
459 log_io(a, 16, 1);\r
460\r
461 a&=0xfffffe;\r
462 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP\r
463 OtherWrite16(a,d);\r
464}\r
465\r
466static void PicoWrite32(u32 a,u32 d)\r
467{\r
468 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
469#ifdef EMU_CORE_DEBUG\r
470 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
471#endif\r
472\r
473 if ((a&0xe00000)==0xe00000)\r
474 {\r
475 // Ram:\r
476 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
477 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
478 return;\r
479 }\r
480 log_io(a, 32, 1);\r
481\r
482 a&=0xfffffe;\r
483 if ((a&0xe700e0)==0xc00000)\r
484 {\r
485 // VDP:\r
486 PicoVideoWrite(a, (u16)(d>>16));\r
487 PicoVideoWrite(a+2,(u16)d);\r
488 return;\r
489 }\r
490\r
491 OtherWrite16(a, (u16)(d>>16));\r
492 OtherWrite16(a+2,(u16)d);\r
493}\r
494\r
495\r
496// -----------------------------------------------------------------\r
497\r
498static void OtherWrite16End(u32 a,u32 d,int realsize)\r
499{\r
500 PicoWrite8Hook(a, d>>8, realsize);\r
501 PicoWrite8Hook(a+1,d&0xff, realsize);\r
502}\r
503\r
504u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End;\r
505void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End;\r
506void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End;\r
507\r
508PICO_INTERNAL void PicoMemResetHooks(void)\r
509{\r
510 // default unmapped/cart specific handlers\r
511 PicoRead16Hook = OtherRead16End;\r
512 PicoWrite8Hook = OtherWrite8End;\r
513 PicoWrite16Hook = OtherWrite16End;\r
514}\r
515\r
516#ifdef EMU_M68K\r
517static void m68k_mem_setup(void);\r
518#endif\r
519\r
520PICO_INTERNAL void PicoMemSetup(void)\r
521{\r
522 // Setup memory callbacks:\r
523#ifdef EMU_C68K\r
524 PicoCpuCM68k.checkpc=PicoCheckPc;\r
525 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8;\r
526 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16;\r
527 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32;\r
528 PicoCpuCM68k.write8 =PicoWrite8;\r
529 PicoCpuCM68k.write16=PicoWrite16;\r
530 PicoCpuCM68k.write32=PicoWrite32;\r
531#endif\r
532#ifdef EMU_F68K\r
533 PicoCpuFM68k.read_byte =PicoRead8;\r
534 PicoCpuFM68k.read_word =PicoRead16;\r
535 PicoCpuFM68k.read_long =PicoRead32;\r
536 PicoCpuFM68k.write_byte=PicoWrite8;\r
537 PicoCpuFM68k.write_word=PicoWrite16;\r
538 PicoCpuFM68k.write_long=PicoWrite32;\r
539\r
540 // setup FAME fetchmap\r
541 {\r
542 int i;\r
543 // by default, point everything to first 64k of ROM\r
544 for (i = 0; i < M68K_FETCHBANK1; i++)\r
545 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
546 // now real ROM\r
547 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
548 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
549 // .. and RAM\r
550 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
551 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
552 }\r
553#endif\r
554#ifdef EMU_M68K\r
555 m68k_mem_setup();\r
556#endif\r
557}\r
558\r
559/* some nasty things below :( */\r
560#ifdef EMU_M68K\r
561unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r
562unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r
563unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r
564void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r
565void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r
566void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r
567unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL;\r
568unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL;\r
569unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL;\r
570\r
571// these are here for core debugging mode\r
572static unsigned int m68k_read_8 (unsigned int a, int do_fake)\r
573{\r
574 a&=0xffffff;\r
575 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
576#ifdef EMU_CORE_DEBUG\r
577 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
578#endif\r
579 return pm68k_read_memory_pcr_8(a);\r
580}\r
581static unsigned int m68k_read_16(unsigned int a, int do_fake)\r
582{\r
583 a&=0xffffff;\r
584 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
585#ifdef EMU_CORE_DEBUG\r
586 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
587#endif\r
588 return pm68k_read_memory_pcr_16(a);\r
589}\r
590static unsigned int m68k_read_32(unsigned int a, int do_fake)\r
591{\r
592 a&=0xffffff;\r
593 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
594#ifdef EMU_CORE_DEBUG\r
595 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
596#endif\r
597 return pm68k_read_memory_pcr_32(a);\r
598}\r
599\r
600unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
601unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r
602unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r
603unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r
604unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r
605unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r
606unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
607unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
608\r
609static unsigned int m68k_read_memory_pcr_8(unsigned int a)\r
610{\r
611 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
612 return 0;\r
613}\r
614\r
615static unsigned int m68k_read_memory_pcr_16(unsigned int a)\r
616{\r
617 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
618 return 0;\r
619}\r
620\r
621static unsigned int m68k_read_memory_pcr_32(unsigned int a)\r
622{\r
623 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
624 return 0;\r
625}\r
626\r
627#ifdef EMU_CORE_DEBUG\r
628// ROM only\r
629unsigned int m68k_read_memory_8(unsigned int a)\r
630{\r
631 u8 d;\r
632 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
633 d = *(u8 *) (Pico.rom+(a^1));\r
634 else d = (u8) lastread_d[lrp_mus++&15];\r
635 elprintf(EL_IO, "r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
636 return d;\r
637}\r
638unsigned int m68k_read_memory_16(unsigned int a)\r
639{\r
640 u16 d;\r
641 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
642 d = *(u16 *)(Pico.rom+(a&~1));\r
643 else d = (u16) lastread_d[lrp_mus++&15];\r
644 elprintf(EL_IO, "r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
645 return d;\r
646}\r
647unsigned int m68k_read_memory_32(unsigned int a)\r
648{\r
649 u32 d;\r
650 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
651 { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }\r
652 else if (a <= 0x78) d = m68k_read_32(a, 0);\r
653 else d = lastread_d[lrp_mus++&15];\r
654 elprintf(EL_IO, "r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
655 return d;\r
656}\r
657\r
658// ignore writes, Cyclone already done that\r
659void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
660void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
661void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
662\r
663#else // if !EMU_CORE_DEBUG\r
664\r
665/* it appears that Musashi doesn't always mask the unused bits */\r
666unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r
667unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r
668unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r
669void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r
670void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r
671void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r
672#endif // !EMU_CORE_DEBUG\r
673\r
674static void m68k_mem_setup(void)\r
675{\r
676 pm68k_read_memory_8 = PicoRead8;\r
677 pm68k_read_memory_16 = PicoRead16;\r
678 pm68k_read_memory_32 = PicoRead32;\r
679 pm68k_write_memory_8 = PicoWrite8;\r
680 pm68k_write_memory_16 = PicoWrite16;\r
681 pm68k_write_memory_32 = PicoWrite32;\r
682 pm68k_read_memory_pcr_8 = m68k_read_memory_pcr_8;\r
683 pm68k_read_memory_pcr_16 = m68k_read_memory_pcr_16;\r
684 pm68k_read_memory_pcr_32 = m68k_read_memory_pcr_32;\r
685}\r
686#endif // EMU_M68K\r
687\r
688\r
689// -----------------------------------------------------------------\r
690\r
691static int get_scanline(int is_from_z80)\r
692{\r
693 if (is_from_z80) {\r
694 int cycles = z80_cyclesDone();\r
695 while (cycles - z80_scanline_cycles >= 228)\r
696 z80_scanline++, z80_scanline_cycles += 228;\r
697 return z80_scanline;\r
698 }\r
699\r
700 return Pico.m.scanline;\r
701}\r
702\r
703/* probably should not be in this file, but it's near related code here */\r
704void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)\r
705{\r
706 int xcycles = z80_cycles << 8;\r
707\r
708 /* check for overflows */\r
709 if ((mode_old & 4) && xcycles > timer_a_next_oflow)\r
710 ym2612.OPN.ST.status |= 1;\r
711\r
712 if ((mode_old & 8) && xcycles > timer_b_next_oflow)\r
713 ym2612.OPN.ST.status |= 2;\r
714\r
715 /* update timer a */\r
716 if (mode_old & 1)\r
717 while (xcycles > timer_a_next_oflow)\r
718 timer_a_next_oflow += timer_a_step;\r
719\r
720 if ((mode_old ^ mode_new) & 1) // turning on/off\r
721 {\r
722 if (mode_old & 1)\r
723 timer_a_next_oflow = TIMER_NO_OFLOW;\r
724 else\r
725 timer_a_next_oflow = xcycles + timer_a_step;\r
726 }\r
727 if (mode_new & 1)\r
728 elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);\r
729\r
730 /* update timer b */\r
731 if (mode_old & 2)\r
732 while (xcycles > timer_b_next_oflow)\r
733 timer_b_next_oflow += timer_b_step;\r
734\r
735 if ((mode_old ^ mode_new) & 2)\r
736 {\r
737 if (mode_old & 2)\r
738 timer_b_next_oflow = TIMER_NO_OFLOW;\r
739 else\r
740 timer_b_next_oflow = xcycles + timer_b_step;\r
741 }\r
742 if (mode_new & 2)\r
743 elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);\r
744}\r
745\r
746// ym2612 DAC and timer I/O handlers for z80\r
747int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r
748{\r
749 int addr;\r
750\r
751 a &= 3;\r
752 if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */\r
753 {\r
754 int scanline = get_scanline(is_from_z80);\r
755 //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r
756 ym2612.dacout = ((int)d - 0x80) << 6;\r
757 if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)\r
758 PsndDoDAC(scanline);\r
759 return 0;\r
760 }\r
761\r
762 switch (a)\r
763 {\r
764 case 0: /* address port 0 */\r
765 ym2612.OPN.ST.address = d;\r
766 ym2612.addr_A1 = 0;\r
767#ifdef __GP2X__\r
768 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
769#endif\r
770 return 0;\r
771\r
772 case 1: /* data port 0 */\r
773 if (ym2612.addr_A1 != 0)\r
774 return 0;\r
775\r
776 addr = ym2612.OPN.ST.address;\r
777 ym2612.REGS[addr] = d;\r
778\r
779 switch (addr)\r
780 {\r
781 case 0x24: // timer A High 8\r
782 case 0x25: { // timer A Low 2\r
783 int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))\r
784 : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));\r
785 if (ym2612.OPN.ST.TA != TAnew)\r
786 {\r
787 //elprintf(EL_STATUS, "timer a set %i", TAnew);\r
788 ym2612.OPN.ST.TA = TAnew;\r
789 //ym2612.OPN.ST.TAC = (1024-TAnew)*18;\r
790 //ym2612.OPN.ST.TAT = 0;\r
791 timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
792 if (ym2612.OPN.ST.mode & 1) {\r
793 // this is not right, should really be done on overflow only\r
794 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
795 timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
796 }\r
797 elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
798 }\r
799 return 0;\r
800 }\r
801 case 0x26: // timer B\r
802 if (ym2612.OPN.ST.TB != d) {\r
803 //elprintf(EL_STATUS, "timer b set %i", d);\r
804 ym2612.OPN.ST.TB = d;\r
805 //ym2612.OPN.ST.TBC = (256-d) * 288;\r
806 //ym2612.OPN.ST.TBT = 0;\r
807 timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
808 if (ym2612.OPN.ST.mode & 2) {\r
809 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
810 timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
811 }\r
812 elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
813 }\r
814 return 0;\r
815 case 0x27: { /* mode, timer control */\r
816 int old_mode = ym2612.OPN.ST.mode;\r
817 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
818 ym2612.OPN.ST.mode = d;\r
819\r
820 elprintf(EL_YMTIMER, "st mode %02x", d);\r
821 ym2612_sync_timers(cycles, old_mode, d);\r
822\r
823 /* reset Timer a flag */\r
824 if (d & 0x10)\r
825 ym2612.OPN.ST.status &= ~1;\r
826\r
827 /* reset Timer b flag */\r
828 if (d & 0x20)\r
829 ym2612.OPN.ST.status &= ~2;\r
830\r
831 if ((d ^ old_mode) & 0xc0) {\r
832#ifdef __GP2X__\r
833 if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
834#endif\r
835 return 1;\r
836 }\r
837 return 0;\r
838 }\r
839 case 0x2b: { /* DAC Sel (YM2612) */\r
840 int scanline = get_scanline(is_from_z80);\r
841 ym2612.dacen = d & 0x80;\r
842 if (d & 0x80) PsndDacLine = scanline;\r
843#ifdef __GP2X__\r
844 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r
845#endif\r
846 return 0;\r
847 }\r
848 }\r
849 break;\r
850\r
851 case 2: /* address port 1 */\r
852 ym2612.OPN.ST.address = d;\r
853 ym2612.addr_A1 = 1;\r
854#ifdef __GP2X__\r
855 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
856#endif\r
857 return 0;\r
858\r
859 case 3: /* data port 1 */\r
860 if (ym2612.addr_A1 != 1)\r
861 return 0;\r
862\r
863 addr = ym2612.OPN.ST.address | 0x100;\r
864 ym2612.REGS[addr] = d;\r
865 break;\r
866 }\r
867\r
868#ifdef __GP2X__\r
869 if (PicoOpt & POPT_EXT_FM)\r
870 return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
871#endif\r
872 return YM2612Write_(a, d);\r
873}\r
874\r
875\r
876#define ym2612_read_local() \\r
877 if (xcycles >= timer_a_next_oflow) \\r
878 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \\r
879 if (xcycles >= timer_b_next_oflow) \\r
880 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r
881\r
882u32 ym2612_read_local_z80(void)\r
883{\r
884 int xcycles = z80_cyclesDone() << 8;\r
885\r
886 ym2612_read_local();\r
887\r
888 elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
889 timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
890 return ym2612.OPN.ST.status;\r
891}\r
892\r
893u32 ym2612_read_local_68k(void)\r
894{\r
895 int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r
896\r
897 ym2612_read_local();\r
898\r
899 elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
900 timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
901 return ym2612.OPN.ST.status;\r
902}\r
903\r
904void ym2612_pack_state(void)\r
905{\r
906 // timers are saved as tick counts, in 16.16 int format\r
907 int tac, tat = 0, tbc, tbt = 0;\r
908 tac = 1024 - ym2612.OPN.ST.TA;\r
909 tbc = 256 - ym2612.OPN.ST.TB;\r
910 if (timer_a_next_oflow != TIMER_NO_OFLOW)\r
911 tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);\r
912 if (timer_b_next_oflow != TIMER_NO_OFLOW)\r
913 tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);\r
914 elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);\r
915 elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);\r
916\r
917#ifdef __GP2X__\r
918 if (PicoOpt & POPT_EXT_FM)\r
919 YM2612PicoStateSave2_940(tat, tbt);\r
920 else\r
921#endif\r
922 YM2612PicoStateSave2(tat, tbt);\r
923}\r
924\r
925void ym2612_unpack_state(void)\r
926{\r
927 int i, ret, tac, tat, tbc, tbt;\r
928 YM2612PicoStateLoad();\r
929\r
930 // feed all the registers and update internal state\r
931 for (i = 0x20; i < 0xA0; i++) {\r
932 ym2612_write_local(0, i, 0);\r
933 ym2612_write_local(1, ym2612.REGS[i], 0);\r
934 }\r
935 for (i = 0x30; i < 0xA0; i++) {\r
936 ym2612_write_local(2, i, 0);\r
937 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
938 }\r
939 for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards\r
940 ym2612_write_local(2, i, 0);\r
941 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
942 ym2612_write_local(0, i, 0);\r
943 ym2612_write_local(1, ym2612.REGS[i], 0);\r
944 }\r
945 for (i = 0xB0; i < 0xB8; i++) {\r
946 ym2612_write_local(0, i, 0);\r
947 ym2612_write_local(1, ym2612.REGS[i], 0);\r
948 ym2612_write_local(2, i, 0);\r
949 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
950 }\r
951\r
952#ifdef __GP2X__\r
953 if (PicoOpt & POPT_EXT_FM)\r
954 ret = YM2612PicoStateLoad2_940(&tat, &tbt);\r
955 else\r
956#endif\r
957 ret = YM2612PicoStateLoad2(&tat, &tbt);\r
958 if (ret != 0) {\r
959 elprintf(EL_STATUS, "old ym2612 state");\r
960 return; // no saved timers\r
961 }\r
962\r
963 tac = (1024 - ym2612.OPN.ST.TA) << 16;\r
964 tbc = (256 - ym2612.OPN.ST.TB) << 16;\r
965 if (ym2612.OPN.ST.mode & 1)\r
966 timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);\r
967 else\r
968 timer_a_next_oflow = TIMER_NO_OFLOW;\r
969 if (ym2612.OPN.ST.mode & 2)\r
970 timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);\r
971 else\r
972 timer_b_next_oflow = TIMER_NO_OFLOW;\r
973 elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);\r
974 elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
975}\r
976\r
977// -----------------------------------------------------------------\r
978// z80 memhandlers\r
979\r
980PICO_INTERNAL unsigned char z80_read(unsigned short a)\r
981{\r
982 u8 ret = 0;\r
983\r
984 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
985 {\r
986 return ym2612_read_local_z80();\r
987 }\r
988\r
989 if (a>=0x8000)\r
990 {\r
991 extern u32 PicoReadM68k8(u32 a);\r
992 u32 addr68k;\r
993 addr68k=Pico.m.z80_bank68k<<15;\r
994 addr68k+=a&0x7fff;\r
995\r
996 if (addr68k < Pico.romsize) { ret = Pico.rom[addr68k^1]; goto bnkend; }\r
997 elprintf(EL_ANOMALY, "z80->68k upper read [%06x] %02x", addr68k, ret);\r
998 if (PicoAHW & PAHW_MCD)\r
999 ret = PicoReadM68k8(addr68k);\r
1000 else ret = PicoRead8(addr68k);\r
1001bnkend:\r
1002 elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
1003 return ret;\r
1004 }\r
1005\r
1006 // should not be needed, cores should be able to access RAM themselves\r
1007 if (a<0x4000) return Pico.zram[a&0x1fff];\r
1008\r
1009 elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);\r
1010 return ret;\r
1011}\r
1012\r
1013#ifndef _USE_CZ80\r
1014PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)\r
1015#else\r
1016PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)\r
1017#endif\r
1018{\r
1019 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
1020 {\r
1021 if(PicoOpt&POPT_EN_FM) emustatus|=ym2612_write_local(a, data, 1) & 1;\r
1022 return;\r
1023 }\r
1024\r
1025 if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
1026 {\r
1027 if(PicoOpt&POPT_EN_PSG) SN76496Write(data);\r
1028 return;\r
1029 }\r
1030\r
1031 if ((a>>8)==0x60)\r
1032 {\r
1033 Pico.m.z80_bank68k>>=1;\r
1034 Pico.m.z80_bank68k|=(data&1)<<8;\r
1035 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
1036 return;\r
1037 }\r
1038\r
1039 if (a>=0x8000)\r
1040 {\r
1041 extern void PicoWriteM68k8(u32 a,u8 d);\r
1042 u32 addr68k;\r
1043 addr68k=Pico.m.z80_bank68k<<15;\r
1044 addr68k+=a&0x7fff;\r
1045 elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
1046 if (PicoAHW & PAHW_MCD)\r
1047 PicoWriteM68k8(addr68k, data);\r
1048 else PicoWrite8(addr68k, data);\r
1049 return;\r
1050 }\r
1051\r
1052 // should not be needed\r
1053 if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
1054\r
1055 elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
1056}\r
1057\r
1058#ifndef _USE_CZ80\r
1059PICO_INTERNAL unsigned short z80_read16(unsigned short a)\r
1060{\r
1061 return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
1062}\r
1063\r
1064PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)\r
1065{\r
1066 z80_write((unsigned char) data,a);\r
1067 z80_write((unsigned char)(data>>8),(u16)(a+1));\r
1068}\r
1069#endif\r
1070\r