| 1 | // This is part of Pico Library\r |
| 2 | \r |
| 3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
| 4 | // (c) Copyright 2006 notaz, All rights reserved.\r |
| 5 | // Free for non-commercial use.\r |
| 6 | \r |
| 7 | // For commercial use, separate licencing terms must be obtained.\r |
| 8 | \r |
| 9 | \r |
| 10 | #define __debug_io\r |
| 11 | \r |
| 12 | #include "PicoInt.h"\r |
| 13 | \r |
| 14 | #include "sound/ym2612.h"\r |
| 15 | #include "sound/sn76496.h"\r |
| 16 | \r |
| 17 | #ifndef UTYPES_DEFINED\r |
| 18 | typedef unsigned char u8;\r |
| 19 | typedef unsigned short u16;\r |
| 20 | typedef unsigned int u32;\r |
| 21 | #define UTYPES_DEFINED\r |
| 22 | #endif\r |
| 23 | \r |
| 24 | extern unsigned int lastSSRamWrite; // used by serial SRAM code\r |
| 25 | \r |
| 26 | #ifdef _ASM_MEMORY_C\r |
| 27 | u32 PicoRead8(u32 a);\r |
| 28 | u32 PicoRead16(u32 a);\r |
| 29 | void PicoWrite8(u32 a,u8 d);\r |
| 30 | void PicoWriteRomHW_SSF2(u32 a,u32 d);\r |
| 31 | void PicoWriteRomHW_in1 (u32 a,u32 d);\r |
| 32 | #endif\r |
| 33 | \r |
| 34 | \r |
| 35 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
| 36 | // cyclone debug mode\r |
| 37 | u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r |
| 38 | int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r |
| 39 | extern unsigned int ppop;\r |
| 40 | #endif\r |
| 41 | \r |
| 42 | #ifdef IO_STATS\r |
| 43 | void log_io(unsigned int addr, int bits, int rw);\r |
| 44 | #else\r |
| 45 | #define log_io(...)\r |
| 46 | #endif\r |
| 47 | \r |
| 48 | #if defined(EMU_C68K) || defined(EMU_A68K)\r |
| 49 | static __inline int PicoMemBase(u32 pc)\r |
| 50 | {\r |
| 51 | int membase=0;\r |
| 52 | \r |
| 53 | if (pc<Pico.romsize+4)\r |
| 54 | {\r |
| 55 | membase=(int)Pico.rom; // Program Counter in Rom\r |
| 56 | }\r |
| 57 | else if ((pc&0xe00000)==0xe00000)\r |
| 58 | {\r |
| 59 | membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r |
| 60 | }\r |
| 61 | else\r |
| 62 | {\r |
| 63 | // Error - Program Counter is invalid\r |
| 64 | membase=(int)Pico.rom;\r |
| 65 | }\r |
| 66 | \r |
| 67 | return membase;\r |
| 68 | }\r |
| 69 | #endif\r |
| 70 | \r |
| 71 | \r |
| 72 | #ifdef EMU_A68K\r |
| 73 | extern u8 *OP_ROM=NULL,*OP_RAM=NULL;\r |
| 74 | #endif\r |
| 75 | \r |
| 76 | static u32 CPU_CALL PicoCheckPc(u32 pc)\r |
| 77 | {\r |
| 78 | u32 ret=0;\r |
| 79 | #if defined(EMU_C68K)\r |
| 80 | pc-=PicoCpu.membase; // Get real pc\r |
| 81 | // pc&=0xfffffe;\r |
| 82 | pc&=~1;\r |
| 83 | if ((pc<<8) == 0)\r |
| 84 | return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r |
| 85 | \r |
| 86 | PicoCpu.membase=PicoMemBase(pc&0x00ffffff);\r |
| 87 | PicoCpu.membase-=pc&0xff000000;\r |
| 88 | \r |
| 89 | ret = PicoCpu.membase+pc;\r |
| 90 | #elif defined(EMU_A68K)\r |
| 91 | OP_ROM=(u8 *)PicoMemBase(pc);\r |
| 92 | \r |
| 93 | // don't bother calling us back unless it's outside the 64k segment\r |
| 94 | M68000_regs.AsmBank=(pc>>16);\r |
| 95 | #endif\r |
| 96 | return ret;\r |
| 97 | }\r |
| 98 | \r |
| 99 | \r |
| 100 | PICO_INTERNAL int PicoInitPc(u32 pc)\r |
| 101 | {\r |
| 102 | PicoCheckPc(pc);\r |
| 103 | return 0;\r |
| 104 | }\r |
| 105 | \r |
| 106 | #ifndef _ASM_MEMORY_C\r |
| 107 | PICO_INTERNAL_ASM void PicoMemReset(void)\r |
| 108 | {\r |
| 109 | }\r |
| 110 | #endif\r |
| 111 | \r |
| 112 | // -----------------------------------------------------------------\r |
| 113 | \r |
| 114 | int PadRead(int i)\r |
| 115 | {\r |
| 116 | int pad,value,data_reg;\r |
| 117 | pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r |
| 118 | data_reg=Pico.ioports[i+1];\r |
| 119 | \r |
| 120 | // orr the bits, which are set as output\r |
| 121 | value = data_reg&(Pico.ioports[i+4]|0x80);\r |
| 122 | \r |
| 123 | if(PicoOpt & 0x20) { // 6 button gamepad enabled\r |
| 124 | int phase = Pico.m.padTHPhase[i];\r |
| 125 | \r |
| 126 | if(phase == 2 && !(data_reg&0x40)) { // TH\r |
| 127 | value|=(pad&0xc0)>>2; // ?0SA 0000\r |
| 128 | return value;\r |
| 129 | } else if(phase == 3) {\r |
| 130 | if(data_reg&0x40)\r |
| 131 | value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r |
| 132 | else\r |
| 133 | value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r |
| 134 | return value;\r |
| 135 | }\r |
| 136 | }\r |
| 137 | \r |
| 138 | if(data_reg&0x40) // TH\r |
| 139 | value|=(pad&0x3f); // ?1CB RLDU\r |
| 140 | else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r |
| 141 | \r |
| 142 | return value; // will mirror later\r |
| 143 | }\r |
| 144 | \r |
| 145 | \r |
| 146 | #ifndef _ASM_MEMORY_C\r |
| 147 | // address must already be checked\r |
| 148 | static int SRAMRead(u32 a)\r |
| 149 | {\r |
| 150 | u8 *d = SRam.data-SRam.start+a;\r |
| 151 | return (d[0]<<8)|d[1];\r |
| 152 | }\r |
| 153 | #endif\r |
| 154 | \r |
| 155 | \r |
| 156 | // for nonstandard reads\r |
| 157 | #ifndef _ASM_MEMORY_C\r |
| 158 | static\r |
| 159 | #endif\r |
| 160 | u32 OtherRead16End(u32 a, int realsize)\r |
| 161 | {\r |
| 162 | u32 d=0;\r |
| 163 | \r |
| 164 | dprintf("strange r%i: %06x @%06x", realsize, a&0xffffff, SekPc);\r |
| 165 | \r |
| 166 | // for games with simple protection devices, discovered by Haze\r |
| 167 | // some dumb detection is used, but that should be enough to make things work\r |
| 168 | if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r |
| 169 | if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r |
| 170 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
| 171 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
| 172 | }\r |
| 173 | else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r |
| 174 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
| 175 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
| 176 | else if (a == 0x400004) { d=0xaa<<8; goto end; }\r |
| 177 | else if (a == 0x400006) { d=0xf0<<8; goto end; }\r |
| 178 | }\r |
| 179 | else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r |
| 180 | if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r |
| 181 | else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r |
| 182 | // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r |
| 183 | }\r |
| 184 | else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r |
| 185 | if (a == 0x400000) { d=0x90<<8; goto end; }\r |
| 186 | else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r |
| 187 | // checks the result, which is of the above one. Left it just in case.\r |
| 188 | }\r |
| 189 | else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r |
| 190 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
| 191 | else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r |
| 192 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
| 193 | else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r |
| 194 | }\r |
| 195 | // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r |
| 196 | // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r |
| 197 | // @ 400004 which is expected @ 400006, so we really remember 2 values here\r |
| 198 | d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r |
| 199 | }\r |
| 200 | else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r |
| 201 | if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r |
| 202 | d=0x0c; goto end;\r |
| 203 | }\r |
| 204 | else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r |
| 205 | d=0x28; goto end; // does the check from RAM\r |
| 206 | }\r |
| 207 | else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r |
| 208 | d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r |
| 209 | }\r |
| 210 | else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r |
| 211 | d=0x0a; goto end;\r |
| 212 | }\r |
| 213 | }\r |
| 214 | else if (a == 0xa13002) { // Pocket Monsters (Unl)\r |
| 215 | d=0x01; goto end;\r |
| 216 | }\r |
| 217 | else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r |
| 218 | d=0x1f; goto end;\r |
| 219 | }\r |
| 220 | else if (a == 0x30fe02) {\r |
| 221 | // Virtua Racing - just for fun\r |
| 222 | // this seems to be some flag that SVP is ready or something similar\r |
| 223 | d=1; goto end;\r |
| 224 | }\r |
| 225 | \r |
| 226 | end:\r |
| 227 | dprintf("ret = %04x", d);\r |
| 228 | return d;\r |
| 229 | }\r |
| 230 | \r |
| 231 | \r |
| 232 | //extern UINT32 mz80GetRegisterValue(void *, UINT32);\r |
| 233 | \r |
| 234 | static void OtherWrite8End(u32 a,u32 d,int realsize)\r |
| 235 | {\r |
| 236 | // sram\r |
| 237 | //if(a==0x200000) dprintf("cc : %02x @ %06x [%i|%i]", d, SekPc, SekCyclesDoneT(), SekCyclesDone());\r |
| 238 | //if(a==0x200001) dprintf("w8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r |
| 239 | if(a >= SRam.start && a <= SRam.end) {\r |
| 240 | dprintf("sram w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r |
| 241 | unsigned int sreg = Pico.m.sram_reg;\r |
| 242 | if(!(sreg & 0x10)) {\r |
| 243 | // not detected SRAM\r |
| 244 | if((a&~1)==0x200000) {\r |
| 245 | Pico.m.sram_reg|=4; // this should be a game with EEPROM (like NBA Jam)\r |
| 246 | SRam.start=0x200000; SRam.end=SRam.start+1;\r |
| 247 | }\r |
| 248 | Pico.m.sram_reg|=0x10;\r |
| 249 | }\r |
| 250 | if(sreg & 4) { // EEPROM write\r |
| 251 | if(SekCyclesDoneT()-lastSSRamWrite < 46) {\r |
| 252 | // just update pending state\r |
| 253 | SRAMUpdPending(a, d);\r |
| 254 | } else {\r |
| 255 | SRAMWriteEEPROM(sreg>>6); // execute pending\r |
| 256 | SRAMUpdPending(a, d);\r |
| 257 | lastSSRamWrite = SekCyclesDoneT();\r |
| 258 | }\r |
| 259 | } else if(!(sreg & 2)) {\r |
| 260 | u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r |
| 261 | if(*pm != (u8)d) {\r |
| 262 | SRam.changed = 1;\r |
| 263 | *pm=(u8)d;\r |
| 264 | }\r |
| 265 | }\r |
| 266 | return;\r |
| 267 | }\r |
| 268 | \r |
| 269 | #ifdef _ASM_MEMORY_C\r |
| 270 | // special ROM hardware (currently only banking and sram reg supported)\r |
| 271 | if((a&0xfffff1) == 0xA130F1) {\r |
| 272 | PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r |
| 273 | return;\r |
| 274 | }\r |
| 275 | #else\r |
| 276 | // sram access register\r |
| 277 | if(a == 0xA130F1) {\r |
| 278 | dprintf("sram reg=%02x", d);\r |
| 279 | Pico.m.sram_reg &= ~3;\r |
| 280 | Pico.m.sram_reg |= (u8)(d&3);\r |
| 281 | return;\r |
| 282 | }\r |
| 283 | #endif\r |
| 284 | dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r |
| 285 | \r |
| 286 | if(a >= 0xA13004 && a < 0xA13040) {\r |
| 287 | // dumb 12-in-1 or 4-in-1 banking support\r |
| 288 | int len;\r |
| 289 | a &= 0x3f; a <<= 16;\r |
| 290 | len = Pico.romsize - a;\r |
| 291 | if (len <= 0) return; // invalid/missing bank\r |
| 292 | if (len > 0x200000) len = 0x200000; // 2 megs\r |
| 293 | memcpy(Pico.rom, Pico.rom+a, len); // code which does this is in RAM so this is safe.\r |
| 294 | return;\r |
| 295 | }\r |
| 296 | \r |
| 297 | // for games with simple protection devices, discovered by Haze\r |
| 298 | else if ((a>>22) == 1)\r |
| 299 | Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r |
| 300 | }\r |
| 301 | \r |
| 302 | \r |
| 303 | #include "MemoryCmn.c"\r |
| 304 | \r |
| 305 | \r |
| 306 | // -----------------------------------------------------------------\r |
| 307 | // Read Rom and read Ram\r |
| 308 | \r |
| 309 | #ifndef _ASM_MEMORY_C\r |
| 310 | PICO_INTERNAL_ASM u32 CPU_CALL PicoRead8(u32 a)\r |
| 311 | {\r |
| 312 | u32 d=0;\r |
| 313 | \r |
| 314 | if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r |
| 315 | \r |
| 316 | a&=0xffffff;\r |
| 317 | \r |
| 318 | #if !(defined(EMU_C68K) && defined(EMU_M68K))\r |
| 319 | // sram\r |
| 320 | if(a >= SRam.start && a <= SRam.end) {\r |
| 321 | unsigned int sreg = Pico.m.sram_reg;\r |
| 322 | if(!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r |
| 323 | Pico.m.sram_reg|=0x10; // should be normal SRAM\r |
| 324 | }\r |
| 325 | if(sreg & 4) { // EEPROM read\r |
| 326 | d = SRAMReadEEPROM();\r |
| 327 | goto end;\r |
| 328 | } else if(sreg & 1) {\r |
| 329 | d = *(u8 *)(SRam.data-SRam.start+a);\r |
| 330 | goto end;\r |
| 331 | }\r |
| 332 | }\r |
| 333 | #endif\r |
| 334 | \r |
| 335 | if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r |
| 336 | log_io(a, 8, 0);\r |
| 337 | if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r |
| 338 | \r |
| 339 | d=OtherRead16(a&~1, 8); if ((a&1)==0) d>>=8;\r |
| 340 | \r |
| 341 | end:\r |
| 342 | \r |
| 343 | //if ((a&0xe0ffff)==0xe0AE57+0x69c)\r |
| 344 | // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r |
| 345 | //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r |
| 346 | // dprintf("r8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
| 347 | \r |
| 348 | //if(a==0x200001) dprintf("r8 : %02x @ %06x [%i]", d, SekPc, SekCyclesDoneT());\r |
| 349 | //dprintf("r8 : %06x, %02x @%06x [%03i]", a&0xffffff, (u8)d, SekPc, Pico.m.scanline);\r |
| 350 | #ifdef __debug_io\r |
| 351 | dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r |
| 352 | #endif\r |
| 353 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
| 354 | if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r |
| 355 | lastread_a = a;\r |
| 356 | lastread_d[lrp_cyc++&15] = (u8)d;\r |
| 357 | }\r |
| 358 | #endif\r |
| 359 | return d;\r |
| 360 | }\r |
| 361 | \r |
| 362 | PICO_INTERNAL_ASM u32 CPU_CALL PicoRead16(u32 a)\r |
| 363 | {\r |
| 364 | u32 d=0;\r |
| 365 | \r |
| 366 | if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r |
| 367 | \r |
| 368 | a&=0xfffffe;\r |
| 369 | \r |
| 370 | #if !(defined(EMU_C68K) && defined(EMU_M68K))\r |
| 371 | // sram\r |
| 372 | if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r |
| 373 | d = SRAMRead(a);\r |
| 374 | goto end;\r |
| 375 | }\r |
| 376 | #endif\r |
| 377 | \r |
| 378 | if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r |
| 379 | log_io(a, 16, 0);\r |
| 380 | \r |
| 381 | d = OtherRead16(a, 16);\r |
| 382 | \r |
| 383 | end:\r |
| 384 | //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r |
| 385 | // dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
| 386 | \r |
| 387 | #ifdef __debug_io\r |
| 388 | dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
| 389 | #endif\r |
| 390 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
| 391 | if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r |
| 392 | lastread_a = a;\r |
| 393 | lastread_d[lrp_cyc++&15] = d;\r |
| 394 | }\r |
| 395 | #endif\r |
| 396 | return d;\r |
| 397 | }\r |
| 398 | \r |
| 399 | PICO_INTERNAL_ASM u32 CPU_CALL PicoRead32(u32 a)\r |
| 400 | {\r |
| 401 | u32 d=0;\r |
| 402 | \r |
| 403 | if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r |
| 404 | \r |
| 405 | a&=0xfffffe;\r |
| 406 | \r |
| 407 | // sram\r |
| 408 | if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r |
| 409 | d = (SRAMRead(a)<<16)|SRAMRead(a+2);\r |
| 410 | goto end;\r |
| 411 | }\r |
| 412 | \r |
| 413 | if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r |
| 414 | log_io(a, 32, 0);\r |
| 415 | \r |
| 416 | d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r |
| 417 | \r |
| 418 | end:\r |
| 419 | #ifdef __debug_io\r |
| 420 | dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r |
| 421 | #endif\r |
| 422 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
| 423 | if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r |
| 424 | lastread_a = a;\r |
| 425 | lastread_d[lrp_cyc++&15] = d;\r |
| 426 | }\r |
| 427 | #endif\r |
| 428 | return d;\r |
| 429 | }\r |
| 430 | #endif\r |
| 431 | \r |
| 432 | // -----------------------------------------------------------------\r |
| 433 | // Write Ram\r |
| 434 | \r |
| 435 | #ifndef _ASM_MEMORY_C\r |
| 436 | PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)\r |
| 437 | {\r |
| 438 | #ifdef __debug_io\r |
| 439 | dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
| 440 | #endif\r |
| 441 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
| 442 | lastwrite_cyc_d[lwp_cyc++&15] = d;\r |
| 443 | #endif\r |
| 444 | //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r |
| 445 | // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
| 446 | \r |
| 447 | if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r |
| 448 | log_io(a, 8, 1);\r |
| 449 | \r |
| 450 | a&=0xffffff;\r |
| 451 | OtherWrite8(a,d);\r |
| 452 | }\r |
| 453 | #endif\r |
| 454 | \r |
| 455 | void CPU_CALL PicoWrite16(u32 a,u16 d)\r |
| 456 | {\r |
| 457 | #ifdef __debug_io\r |
| 458 | dprintf("w16: %06x, %04x", a&0xffffff, d);\r |
| 459 | #endif\r |
| 460 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
| 461 | lastwrite_cyc_d[lwp_cyc++&15] = d;\r |
| 462 | #endif\r |
| 463 | //if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r |
| 464 | // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
| 465 | \r |
| 466 | if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r |
| 467 | log_io(a, 16, 1);\r |
| 468 | \r |
| 469 | a&=0xfffffe;\r |
| 470 | OtherWrite16(a,d);\r |
| 471 | }\r |
| 472 | \r |
| 473 | static void CPU_CALL PicoWrite32(u32 a,u32 d)\r |
| 474 | {\r |
| 475 | #ifdef __debug_io\r |
| 476 | dprintf("w32: %06x, %08x", a&0xffffff, d);\r |
| 477 | #endif\r |
| 478 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
| 479 | lastwrite_cyc_d[lwp_cyc++&15] = d;\r |
| 480 | #endif\r |
| 481 | \r |
| 482 | if ((a&0xe00000)==0xe00000)\r |
| 483 | {\r |
| 484 | // Ram:\r |
| 485 | u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r |
| 486 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
| 487 | return;\r |
| 488 | }\r |
| 489 | log_io(a, 32, 1);\r |
| 490 | \r |
| 491 | a&=0xfffffe;\r |
| 492 | OtherWrite16(a, (u16)(d>>16));\r |
| 493 | OtherWrite16(a+2,(u16)d);\r |
| 494 | }\r |
| 495 | \r |
| 496 | \r |
| 497 | // -----------------------------------------------------------------\r |
| 498 | PICO_INTERNAL void PicoMemSetup(void)\r |
| 499 | {\r |
| 500 | #ifdef EMU_C68K\r |
| 501 | // Setup memory callbacks:\r |
| 502 | PicoCpu.checkpc=PicoCheckPc;\r |
| 503 | PicoCpu.fetch8 =PicoCpu.read8 =PicoRead8;\r |
| 504 | PicoCpu.fetch16=PicoCpu.read16=PicoRead16;\r |
| 505 | PicoCpu.fetch32=PicoCpu.read32=PicoRead32;\r |
| 506 | PicoCpu.write8 =PicoWrite8;\r |
| 507 | PicoCpu.write16=PicoWrite16;\r |
| 508 | PicoCpu.write32=PicoWrite32;\r |
| 509 | #endif\r |
| 510 | }\r |
| 511 | \r |
| 512 | #ifdef EMU_A68K\r |
| 513 | struct A68KInter\r |
| 514 | {\r |
| 515 | u32 unknown;\r |
| 516 | u8 (__fastcall *Read8) (u32 a);\r |
| 517 | u16 (__fastcall *Read16)(u32 a);\r |
| 518 | u32 (__fastcall *Read32)(u32 a);\r |
| 519 | void (__fastcall *Write8) (u32 a,u8 d);\r |
| 520 | void (__fastcall *Write16) (u32 a,u16 d);\r |
| 521 | void (__fastcall *Write32) (u32 a,u32 d);\r |
| 522 | void (__fastcall *ChangePc)(u32 a);\r |
| 523 | u8 (__fastcall *PcRel8) (u32 a);\r |
| 524 | u16 (__fastcall *PcRel16)(u32 a);\r |
| 525 | u32 (__fastcall *PcRel32)(u32 a);\r |
| 526 | u16 (__fastcall *Dir16)(u32 a);\r |
| 527 | u32 (__fastcall *Dir32)(u32 a);\r |
| 528 | };\r |
| 529 | \r |
| 530 | struct A68KInter a68k_memory_intf=\r |
| 531 | {\r |
| 532 | 0,\r |
| 533 | PicoRead8,\r |
| 534 | PicoRead16,\r |
| 535 | PicoRead32,\r |
| 536 | PicoWrite8,\r |
| 537 | PicoWrite16,\r |
| 538 | PicoWrite32,\r |
| 539 | PicoCheckPc,\r |
| 540 | PicoRead8,\r |
| 541 | PicoRead16,\r |
| 542 | PicoRead32,\r |
| 543 | PicoRead16, // unused\r |
| 544 | PicoRead32, // unused\r |
| 545 | };\r |
| 546 | #endif\r |
| 547 | \r |
| 548 | #ifdef EMU_M68K\r |
| 549 | unsigned int m68k_read_pcrelative_CD8 (unsigned int a);\r |
| 550 | unsigned int m68k_read_pcrelative_CD16(unsigned int a);\r |
| 551 | unsigned int m68k_read_pcrelative_CD32(unsigned int a);\r |
| 552 | \r |
| 553 | // these are allowed to access RAM\r |
| 554 | static unsigned int m68k_read_8 (unsigned int a, int do_fake) {\r |
| 555 | a&=0xffffff;\r |
| 556 | if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r |
| 557 | if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r |
| 558 | #ifdef EMU_C68K\r |
| 559 | if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r |
| 560 | #endif\r |
| 561 | if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r |
| 562 | return 0;\r |
| 563 | }\r |
| 564 | static unsigned int m68k_read_16(unsigned int a, int do_fake) {\r |
| 565 | a&=0xffffff;\r |
| 566 | if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r |
| 567 | if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r |
| 568 | #ifdef EMU_C68K\r |
| 569 | if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r |
| 570 | #endif\r |
| 571 | if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r |
| 572 | return 0;\r |
| 573 | }\r |
| 574 | static unsigned int m68k_read_32(unsigned int a, int do_fake) {\r |
| 575 | a&=0xffffff;\r |
| 576 | if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r |
| 577 | if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r |
| 578 | #ifdef EMU_C68K\r |
| 579 | if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r |
| 580 | #endif\r |
| 581 | if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r |
| 582 | return 0;\r |
| 583 | }\r |
| 584 | \r |
| 585 | unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r |
| 586 | unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r |
| 587 | unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r |
| 588 | unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r |
| 589 | unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r |
| 590 | unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r |
| 591 | unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r |
| 592 | unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r |
| 593 | \r |
| 594 | #ifdef EMU_C68K\r |
| 595 | // ROM only\r |
| 596 | unsigned int m68k_read_memory_8(unsigned int a)\r |
| 597 | {\r |
| 598 | u8 d;\r |
| 599 | if(a<Pico.romsize) d = *(u8 *) (Pico.rom+(a^1));\r |
| 600 | else d = (u8) lastread_d[lrp_mus++&15];\r |
| 601 | #ifdef __debug_io\r |
| 602 | dprintf("r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
| 603 | #endif\r |
| 604 | return d;\r |
| 605 | }\r |
| 606 | unsigned int m68k_read_memory_16(unsigned int a)\r |
| 607 | {\r |
| 608 | u16 d;\r |
| 609 | if(a<Pico.romsize) d = *(u16 *)(Pico.rom+(a&~1));\r |
| 610 | else d = (u16) lastread_d[lrp_mus++&15];\r |
| 611 | #ifdef __debug_io\r |
| 612 | dprintf("r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
| 613 | #endif\r |
| 614 | return d;\r |
| 615 | }\r |
| 616 | unsigned int m68k_read_memory_32(unsigned int a)\r |
| 617 | {\r |
| 618 | u32 d;\r |
| 619 | if(a<Pico.romsize) {u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1];}\r |
| 620 | else d = lastread_d[lrp_mus++&15];\r |
| 621 | #ifdef __debug_io\r |
| 622 | dprintf("r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r |
| 623 | #endif\r |
| 624 | return d;\r |
| 625 | }\r |
| 626 | \r |
| 627 | // ignore writes, Cyclone already done that\r |
| 628 | void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
| 629 | void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
| 630 | void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
| 631 | #else\r |
| 632 | unsigned char PicoReadCD8w (unsigned int a);\r |
| 633 | unsigned short PicoReadCD16w(unsigned int a);\r |
| 634 | unsigned int PicoReadCD32w(unsigned int a);\r |
| 635 | void PicoWriteCD8w (unsigned int a, unsigned char d);\r |
| 636 | void PicoWriteCD16w(unsigned int a, unsigned short d);\r |
| 637 | void PicoWriteCD32w(unsigned int a, unsigned int d);\r |
| 638 | \r |
| 639 | unsigned int m68k_read_memory_8(unsigned int address)\r |
| 640 | {\r |
| 641 | return (PicoMCD&1) ? PicoReadCD8w(address) : PicoRead8(address);\r |
| 642 | }\r |
| 643 | \r |
| 644 | unsigned int m68k_read_memory_16(unsigned int address)\r |
| 645 | {\r |
| 646 | return (PicoMCD&1) ? PicoReadCD16w(address) : PicoRead16(address);\r |
| 647 | }\r |
| 648 | \r |
| 649 | unsigned int m68k_read_memory_32(unsigned int address)\r |
| 650 | {\r |
| 651 | return (PicoMCD&1) ? PicoReadCD32w(address) : PicoRead32(address);\r |
| 652 | }\r |
| 653 | \r |
| 654 | void m68k_write_memory_8(unsigned int address, unsigned int value)\r |
| 655 | {\r |
| 656 | if (PicoMCD&1) PicoWriteCD8w(address, (u8)value); else PicoWrite8(address, (u8)value);\r |
| 657 | }\r |
| 658 | \r |
| 659 | void m68k_write_memory_16(unsigned int address, unsigned int value)\r |
| 660 | {\r |
| 661 | if (PicoMCD&1) PicoWriteCD16w(address,(u16)value); else PicoWrite16(address,(u16)value);\r |
| 662 | }\r |
| 663 | \r |
| 664 | void m68k_write_memory_32(unsigned int address, unsigned int value)\r |
| 665 | {\r |
| 666 | if (PicoMCD&1) PicoWriteCD32w(address, value); else PicoWrite32(address, value);\r |
| 667 | }\r |
| 668 | #endif\r |
| 669 | #endif // EMU_M68K\r |
| 670 | \r |
| 671 | \r |
| 672 | // -----------------------------------------------------------------\r |
| 673 | // z80 memhandlers\r |
| 674 | \r |
| 675 | PICO_INTERNAL unsigned char z80_read(unsigned short a)\r |
| 676 | {\r |
| 677 | u8 ret = 0;\r |
| 678 | \r |
| 679 | if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r |
| 680 | {\r |
| 681 | if(PicoOpt&1) ret = (u8) YM2612Read();\r |
| 682 | goto end;\r |
| 683 | }\r |
| 684 | \r |
| 685 | if (a>=0x8000)\r |
| 686 | {\r |
| 687 | u32 addr68k;\r |
| 688 | addr68k=Pico.m.z80_bank68k<<15;\r |
| 689 | addr68k+=a&0x7fff;\r |
| 690 | \r |
| 691 | ret = (u8) PicoRead8(addr68k);\r |
| 692 | //dprintf("z80->68k w8 : %06x, %02x", addr68k, ret);\r |
| 693 | goto end;\r |
| 694 | }\r |
| 695 | \r |
| 696 | // should not be needed || dprintf("z80_read RAM");\r |
| 697 | if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r |
| 698 | \r |
| 699 | end:\r |
| 700 | return ret;\r |
| 701 | }\r |
| 702 | \r |
| 703 | PICO_INTERNAL unsigned short z80_read16(unsigned short a)\r |
| 704 | {\r |
| 705 | //dprintf("z80_read16");\r |
| 706 | \r |
| 707 | return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r |
| 708 | }\r |
| 709 | \r |
| 710 | PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)\r |
| 711 | {\r |
| 712 | //if (a<0x4000)\r |
| 713 | // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));\r |
| 714 | \r |
| 715 | if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r |
| 716 | {\r |
| 717 | if(PicoOpt&1) emustatus|=YM2612Write(a, data);\r |
| 718 | return;\r |
| 719 | }\r |
| 720 | \r |
| 721 | if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r |
| 722 | {\r |
| 723 | if(PicoOpt&2) SN76496Write(data);\r |
| 724 | return;\r |
| 725 | }\r |
| 726 | \r |
| 727 | if ((a>>8)==0x60)\r |
| 728 | {\r |
| 729 | Pico.m.z80_bank68k>>=1;\r |
| 730 | Pico.m.z80_bank68k|=(data&1)<<8;\r |
| 731 | Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r |
| 732 | return;\r |
| 733 | }\r |
| 734 | \r |
| 735 | if (a>=0x8000)\r |
| 736 | {\r |
| 737 | u32 addr68k;\r |
| 738 | addr68k=Pico.m.z80_bank68k<<15;\r |
| 739 | addr68k+=a&0x7fff;\r |
| 740 | PicoWrite8(addr68k, data);\r |
| 741 | //dprintf("z80->68k w8 : %06x, %02x", addr68k, data);\r |
| 742 | return;\r |
| 743 | }\r |
| 744 | \r |
| 745 | // should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r |
| 746 | if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r |
| 747 | }\r |
| 748 | \r |
| 749 | PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)\r |
| 750 | {\r |
| 751 | //dprintf("z80_write16");\r |
| 752 | \r |
| 753 | z80_write((unsigned char) data,a);\r |
| 754 | z80_write((unsigned char)(data>>8),(u16)(a+1));\r |
| 755 | }\r |
| 756 | \r |