| 1 | // common code for Memory.c and cd/Memory.c |
| 2 | // (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas |
| 3 | |
| 4 | #ifndef UTYPES_DEFINED |
| 5 | typedef unsigned char u8; |
| 6 | typedef unsigned short u16; |
| 7 | typedef unsigned int u32; |
| 8 | #define UTYPES_DEFINED |
| 9 | #endif |
| 10 | |
| 11 | #ifdef _ASM_MEMORY_C |
| 12 | u32 OtherRead16End(u32 a, int realsize); |
| 13 | #endif |
| 14 | #ifdef _ASM_CD_MEMORY_C |
| 15 | static void OtherWrite8End(u32 a,u32 d,int realsize); |
| 16 | #endif |
| 17 | |
| 18 | static int PadRead(int i) |
| 19 | { |
| 20 | int pad=0,value=0,TH; |
| 21 | pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU |
| 22 | TH=Pico.ioports[i+1]&0x40; |
| 23 | |
| 24 | if(PicoOpt & 0x20) { // 6 button gamepad enabled |
| 25 | int phase = Pico.m.padTHPhase[i]; |
| 26 | |
| 27 | if(phase == 2 && !TH) { |
| 28 | value=(pad&0xc0)>>2; // ?0SA 0000 |
| 29 | goto end; |
| 30 | } else if(phase == 3 && TH) { |
| 31 | value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ |
| 32 | goto end; |
| 33 | } else if(phase == 3 && !TH) { |
| 34 | value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111 |
| 35 | goto end; |
| 36 | } |
| 37 | } |
| 38 | |
| 39 | if(TH) value=(pad&0x3f); // ?1CB RLDU |
| 40 | else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU |
| 41 | |
| 42 | end: |
| 43 | |
| 44 | // orr the bits, which are set as output |
| 45 | value |= Pico.ioports[i+1]&Pico.ioports[i+4]; |
| 46 | |
| 47 | return value; // will mirror later |
| 48 | } |
| 49 | |
| 50 | |
| 51 | #ifndef _ASM_MEMORY_C |
| 52 | static |
| 53 | #endif |
| 54 | u8 z80Read8(u32 a) |
| 55 | { |
| 56 | if(Pico.m.z80Run&1) return 0; |
| 57 | |
| 58 | a&=0x1fff; |
| 59 | |
| 60 | if(!(PicoOpt&4)) { |
| 61 | // Z80 disabled, do some faking |
| 62 | static u8 zerosent = 0; |
| 63 | if(a == Pico.m.z80_lastaddr) { // probably polling something |
| 64 | u8 d = Pico.m.z80_fakeval; |
| 65 | if((d & 0xf) == 0xf && !zerosent) { |
| 66 | d = 0; zerosent = 1; |
| 67 | } else { |
| 68 | Pico.m.z80_fakeval++; |
| 69 | zerosent = 0; |
| 70 | } |
| 71 | return d; |
| 72 | } else { |
| 73 | Pico.m.z80_fakeval = 0; |
| 74 | } |
| 75 | } |
| 76 | |
| 77 | Pico.m.z80_lastaddr = (u16) a; |
| 78 | return Pico.zram[a]; |
| 79 | } |
| 80 | |
| 81 | |
| 82 | #ifndef _ASM_MEMORY_C |
| 83 | static |
| 84 | #endif |
| 85 | u32 OtherRead16(u32 a, int realsize) |
| 86 | { |
| 87 | u32 d=0; |
| 88 | |
| 89 | if ((a&0xff0000)==0xa00000) { |
| 90 | if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped) |
| 91 | if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled |
| 92 | if(PicoOpt&1) d=YM2612Read(); |
| 93 | else d=Pico.m.rotate++&3; |
| 94 | dprintf("read ym2612: %04x", d); |
| 95 | goto end; |
| 96 | } |
| 97 | d=0xffff; |
| 98 | goto end; |
| 99 | } |
| 100 | |
| 101 | if ((a&0xffffe0)==0xa10000) { // I/O ports |
| 102 | a=(a>>1)&0xf; |
| 103 | switch(a) { |
| 104 | case 0: d=Pico.m.hardware; break; // Hardware value (Version register) |
| 105 | case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break; |
| 106 | case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break; |
| 107 | default: d=Pico.ioports[a]; break; // IO ports can be used as RAM |
| 108 | } |
| 109 | d|=d<<8; |
| 110 | goto end; |
| 111 | } |
| 112 | |
| 113 | // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers |
| 114 | if (a==0xa11100) { // z80 busreq |
| 115 | d=Pico.m.z80Run&1; |
| 116 | #if 1 |
| 117 | if (!d) { |
| 118 | // needed by buggy Terminator (Sega CD) |
| 119 | int stop_before = SekCyclesDone() - z80stopCycle; |
| 120 | dprintf("stop before: %i", stop_before); |
| 121 | if (stop_before > 0 && stop_before <= 32) // Gens uses 16 here |
| 122 | d = 1; // bus not yet available |
| 123 | } |
| 124 | #endif |
| 125 | d=(d<<8)|0x8000|Pico.m.rotate++; |
| 126 | dprintf("get_zrun: %04x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), SekPc); |
| 127 | goto end; |
| 128 | } |
| 129 | |
| 130 | #ifndef _ASM_MEMORY_C |
| 131 | if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; } |
| 132 | #endif |
| 133 | |
| 134 | d = OtherRead16End(a, realsize); |
| 135 | |
| 136 | end: |
| 137 | return d; |
| 138 | } |
| 139 | |
| 140 | |
| 141 | //extern UINT32 mz80GetRegisterValue(void *, UINT32); |
| 142 | |
| 143 | #ifndef _ASM_CD_MEMORY_C |
| 144 | static |
| 145 | #endif |
| 146 | void OtherWrite8(u32 a,u32 d,int realsize) |
| 147 | { |
| 148 | if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound |
| 149 | if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram |
| 150 | if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound |
| 151 | if ((a&0xffffe0)==0xa10000) { // I/O ports |
| 152 | a=(a>>1)&0xf; |
| 153 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state |
| 154 | if(PicoOpt&0x20) { |
| 155 | if(a==1) { |
| 156 | Pico.m.padDelay[0] = 0; |
| 157 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++; |
| 158 | } |
| 159 | else if(a==2) { |
| 160 | Pico.m.padDelay[1] = 0; |
| 161 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++; |
| 162 | } |
| 163 | } |
| 164 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM |
| 165 | return; |
| 166 | } |
| 167 | if (a==0xa11100) { |
| 168 | //int lineCycles=(488-SekCyclesLeft)&0x1ff; |
| 169 | d&=1; d^=1; |
| 170 | if(!d) { |
| 171 | // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III) |
| 172 | if (Pico.m.z80Run) { |
| 173 | int lineCycles; |
| 174 | z80stopCycle = SekCyclesDone(); |
| 175 | if (Pico.m.z80Run&2) |
| 176 | lineCycles=(488-SekCyclesLeft)&0x1ff; |
| 177 | else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line |
| 178 | if (lineCycles > 0 && lineCycles <= 488) { |
| 179 | dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5)); |
| 180 | lineCycles=(lineCycles>>1)-(lineCycles>>5); |
| 181 | z80_run(lineCycles); |
| 182 | } |
| 183 | } |
| 184 | } else { |
| 185 | z80startCycle = SekCyclesDone(); |
| 186 | //if(Pico.m.scanline != -1) |
| 187 | } |
| 188 | dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc); |
| 189 | Pico.m.z80Run=(u8)d; return; |
| 190 | } |
| 191 | if (a==0xa11200) { |
| 192 | dprintf("write z80Reset: %02x", d); |
| 193 | if(!(d&1)) z80_reset(); |
| 194 | return; |
| 195 | } |
| 196 | |
| 197 | if ((a&0xff7f00)==0xa06000) // Z80 BANK register |
| 198 | { |
| 199 | Pico.m.z80_bank68k>>=1; |
| 200 | Pico.m.z80_bank68k|=(d&1)<<8; |
| 201 | Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one |
| 202 | return; |
| 203 | } |
| 204 | |
| 205 | if ((a&0xe700e0)==0xc00000) { |
| 206 | PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored |
| 207 | return; |
| 208 | } |
| 209 | |
| 210 | OtherWrite8End(a, d, realsize); |
| 211 | } |
| 212 | |
| 213 | |
| 214 | #ifndef _ASM_CD_MEMORY_C |
| 215 | static |
| 216 | #endif |
| 217 | void OtherWrite16(u32 a,u32 d) |
| 218 | { |
| 219 | if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } |
| 220 | if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only) |
| 221 | |
| 222 | if ((a&0xffffe0)==0xa10000) { // I/O ports |
| 223 | a=(a>>1)&0xf; |
| 224 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state |
| 225 | if(PicoOpt&0x20) { |
| 226 | if(a==1) { |
| 227 | Pico.m.padDelay[0] = 0; |
| 228 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++; |
| 229 | } |
| 230 | else if(a==2) { |
| 231 | Pico.m.padDelay[1] = 0; |
| 232 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++; |
| 233 | } |
| 234 | } |
| 235 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM |
| 236 | return; |
| 237 | } |
| 238 | if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; } |
| 239 | if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; } |
| 240 | |
| 241 | OtherWrite8(a, d>>8, 16); |
| 242 | OtherWrite8(a+1,d&0xff, 16); |
| 243 | } |
| 244 | |
| 245 | |