[picodrive.git] / Pico / MemoryCmn.c

// common code for Memory.c and cd/Memory.c
// (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas

#ifndef UTYPES_DEFINED
typedef unsigned char  u8;
typedef unsigned short u16;
typedef unsigned int   u32;
#define UTYPES_DEFINED
#endif


#ifndef _ASM_MEMORY_C
static
#endif
u8 z80Read8(u32 a)
{
  if(Pico.m.z80Run&1) return 0;

  a&=0x1fff;

  if (!(PicoOpt&POPT_EN_Z80))
  {
    // Z80 disabled, do some faking
    static u8 zerosent = 0;
    if(a == Pico.m.z80_lastaddr) { // probably polling something
      u8 d = Pico.m.z80_fakeval;
      if((d & 0xf) == 0xf && !zerosent) {
        d = 0; zerosent = 1;
      } else {
        Pico.m.z80_fakeval++;
        zerosent = 0;
      }
      return d;
    } else {
      Pico.m.z80_fakeval = 0;
    }
  }

  Pico.m.z80_lastaddr = (u16) a;
  return Pico.zram[a];
}

#ifndef _ASM_MEMORY_C
static
#endif
u32 z80ReadBusReq(void)
{
  u32 d=Pico.m.z80Run&1;
  if (!d && Pico.m.scanline != -1) {
    // needed by buggy Terminator (Sega CD)
    int stop_before = SekCyclesDone() - z80stopCycle;
    //elprintf(EL_BUSREQ, "get_zrun: stop before: %i", stop_before);
    // note: if we use 20 or more here, Barkley Shut Up and Jam! will purposedly crash itself.
    // but CD Terminator needs at least 32, so it only works because next frame cycle wrap.
    if (stop_before > 0 && stop_before < 20) // Gens uses 16 here
      d = 1; // bus not yet available
  }
  // |=0x80 for Shadow of the Beast & Super Offroad
  elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d|0x80, SekCyclesDone(), SekPc);
  return d|0x80;
}

#ifndef _ASM_MEMORY_C
static
#endif
void z80WriteBusReq(u32 d)
{
  d&=1; d^=1;
  {
    if (!d)
    {
      // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
      if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
      {
        int lineCycles;
        z80stopCycle = SekCyclesDone();
        if ((Pico.m.z80Run&2) && Pico.m.scanline != -1)
             lineCycles=(488-SekCyclesLeft)&0x1ff;
        else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line
        if (lineCycles > 0) { // && lineCycles <= 488) {
          //dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5));
          lineCycles=(lineCycles>>1)-(lineCycles>>5);
          z80_run_nr(lineCycles);
        }
      }
    } else {
      if (!Pico.m.z80Run)
        z80startCycle = SekCyclesDone();
      else
        d|=Pico.m.z80Run;
    }
  }
  elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
  Pico.m.z80Run=(u8)d;
}

#ifndef _ASM_MEMORY_C
static
#endif
u32 OtherRead16(u32 a, int realsize)
{
  u32 d=0;

  if ((a&0xffffe0)==0xa10000) { // I/O ports
    a=(a>>1)&0xf;
    switch(a) {
      case 0:  d=Pico.m.hardware; break; // Hardware value (Version register)
      case 1:  d=PadRead(0); break;
      case 2:  d=PadRead(1); break;
      default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
    }
    d|=d<<8;
    goto end;
  }

  // rotate fakes next fetched instruction for Time Killers
  if (a==0xa11100) { // z80 busreq
    d=(z80ReadBusReq()<<8)|Pico.m.rotate++;
    goto end;
  }

  if ((a&0xff0000)==0xa00000)
  {
    if (Pico.m.z80Run&1)
      elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
    if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
    if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled
      if(PicoOpt&POPT_EN_FM) d=YM2612Read();
      else d=Pico.m.rotate++&3;
      elprintf(EL_YM2612R, "read ym2612: %02x", d);
      goto end;
    }
    elprintf(EL_ANOMALY, "68k bad read [%06x]", a);
    d=0xffff;
    goto end;
  }

  d = PicoRead16Hook(a, realsize);

end:
  return d;
}

static void IoWrite8(u32 a, u32 d)
{
  a=(a>>1)&0xf;
  // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
  if (PicoOpt&POPT_6BTN_PAD)
  {
    if (a==1) {
      Pico.m.padDelay[0] = 0;
      if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
    }
    else if (a==2) {
      Pico.m.padDelay[1] = 0;
      if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
    }
  }
  Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
}

#ifndef _ASM_CD_MEMORY_C
static
#endif
void OtherWrite8(u32 a,u32 d)
{
#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
  if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
  if ((a&0xff4000)==0xa00000) { // z80 RAM
    if (!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d;
    else {
      elprintf(EL_ANOMALY, "68k z80 write with no bus! [%06x] %02x @ %06x", a, d, SekPc);
      SekCyclesBurn(4); // hack?
    }
    return;
  }
  if ((a&0xff6000)==0xa04000)  { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d)&1; return; } // FM Sound
  if ((a&0xffffe0)==0xa10000)  { IoWrite8(a, d); return; } // I/O ports
#endif
  if (a==0xa11100)             { z80WriteBusReq(d); return; }
  if (a==0xa11200) {
    elprintf(EL_BUSREQ, "write z80Reset: %02x", d);
    if (!(d&0x1)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
    else if (Pico.m.z80_reset) {
      Pico.m.z80_reset = 0;
      YM2612ResetChip();
      z80_reset();
    }
    return;
  }
#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
  if ((a&0xff7f00)==0xa06000) // Z80 BANK register
  {
    Pico.m.z80_bank68k>>=1;
    Pico.m.z80_bank68k|=(d&1)<<8;
    Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
    elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
    return;
  }
#endif
  if ((a&0xe700e0)==0xc00000) {
    d&=0xff;
    PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
    return;
  }

  PicoWrite8Hook(a, d, 8);
}


#ifndef _ASM_CD_MEMORY_C
static
#endif
void OtherWrite16(u32 a,u32 d)
{
  if (a==0xa11100)            { z80WriteBusReq(d>>8); return; }
  if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
  if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
  if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d)&1; return; } // FM Sound (??)
  if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
    if (!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8);
    else elprintf(EL_ANOMALY, "68k z80 write with no bus! [%06x] %02x @ %06x", a, d, SekPc);
    return;
  }
  if (a==0xa11200) {
    elprintf(EL_BUSREQ, "write z80reset: %04x", d);
    if (!(d&0x100)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
    else if (Pico.m.z80_reset) {
      Pico.m.z80_reset = 0;
      YM2612ResetChip();
      z80_reset();
    }
    return;
  }
  if ((a&0xff7f00)==0xa06000) // Z80 BANK register
  {
    Pico.m.z80_bank68k>>=1;
    Pico.m.z80_bank68k|=(d&1)<<8;
    Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
    elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
    return;
  }

#ifndef _CD_MEMORY_C
  if (a >= SRam.start && a <= SRam.end) {
    elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc);
    if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled
      u8 *pm=(u8 *)(SRam.data-SRam.start+a);
      *pm++=d>>8;
      *pm++=d;
      SRam.changed = 1;
    }
    else
      SRAMWrite(a, d);
    return;
  }
#endif

  PicoWrite16Hook(a, d, 16);
}
Commit	Line	Data
	1	// common code for Memory.c and cd/Memory.c
	2	// (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
	3
	4	#ifndef UTYPES_DEFINED
	5	typedef unsigned char u8;
	6	typedef unsigned short u16;
	7	typedef unsigned int u32;
	8	#define UTYPES_DEFINED
	9	#endif
	10
	11
	12	#ifndef _ASM_MEMORY_C
	13	static
	14	#endif
	15	u8 z80Read8(u32 a)
	16	{
	17	if(Pico.m.z80Run&1) return 0;
	18
	19	a&=0x1fff;
	20
	21	if (!(PicoOpt&POPT_EN_Z80))
	22	{
	23	// Z80 disabled, do some faking
	24	static u8 zerosent = 0;
	25	if(a == Pico.m.z80_lastaddr) { // probably polling something
	26	u8 d = Pico.m.z80_fakeval;
	27	if((d & 0xf) == 0xf && !zerosent) {
	28	d = 0; zerosent = 1;
	29	} else {
	30	Pico.m.z80_fakeval++;
	31	zerosent = 0;
	32	}
	33	return d;
	34	} else {
	35	Pico.m.z80_fakeval = 0;
	36	}
	37	}
	38
	39	Pico.m.z80_lastaddr = (u16) a;
	40	return Pico.zram[a];
	41	}
	42
	43	#ifndef _ASM_MEMORY_C
	44	static
	45	#endif
	46	u32 z80ReadBusReq(void)
	47	{
	48	u32 d=Pico.m.z80Run&1;
	49	if (!d && Pico.m.scanline != -1) {
	50	// needed by buggy Terminator (Sega CD)
	51	int stop_before = SekCyclesDone() - z80stopCycle;
	52	//elprintf(EL_BUSREQ, "get_zrun: stop before: %i", stop_before);
	53	// note: if we use 20 or more here, Barkley Shut Up and Jam! will purposedly crash itself.
	54	// but CD Terminator needs at least 32, so it only works because next frame cycle wrap.
	55	if (stop_before > 0 && stop_before < 20) // Gens uses 16 here
	56	d = 1; // bus not yet available
	57	}
	58	// \|=0x80 for Shadow of the Beast & Super Offroad
	59	elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d\|0x80, SekCyclesDone(), SekPc);
	60	return d\|0x80;
	61	}
	62
	63	#ifndef _ASM_MEMORY_C
	64	static
	65	#endif
	66	void z80WriteBusReq(u32 d)
	67	{
	68	d&=1; d^=1;
	69	{
	70	if (!d)
	71	{
	72	// this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
	73	if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
	74	{
	75	int lineCycles;
	76	z80stopCycle = SekCyclesDone();
	77	if ((Pico.m.z80Run&2) && Pico.m.scanline != -1)
	78	lineCycles=(488-SekCyclesLeft)&0x1ff;
	79	else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line
	80	if (lineCycles > 0) { // && lineCycles <= 488) {
	81	//dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5));
	82	lineCycles=(lineCycles>>1)-(lineCycles>>5);
	83	z80_run_nr(lineCycles);
	84	}
	85	}
	86	} else {
	87	if (!Pico.m.z80Run)
	88	z80startCycle = SekCyclesDone();
	89	else
	90	d\|=Pico.m.z80Run;
	91	}
	92	}
	93	elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
	94	Pico.m.z80Run=(u8)d;
	95	}
	96
	97	#ifndef _ASM_MEMORY_C
	98	static
	99	#endif
	100	u32 OtherRead16(u32 a, int realsize)
	101	{
	102	u32 d=0;
	103
	104	if ((a&0xffffe0)==0xa10000) { // I/O ports
	105	a=(a>>1)&0xf;
	106	switch(a) {
	107	case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
	108	case 1: d=PadRead(0); break;
	109	case 2: d=PadRead(1); break;
	110	default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
	111	}
	112	d\|=d<<8;
	113	goto end;
	114	}
	115
	116	// rotate fakes next fetched instruction for Time Killers
	117	if (a==0xa11100) { // z80 busreq
	118	d=(z80ReadBusReq()<<8)\|Pico.m.rotate++;
	119	goto end;
	120	}
	121
	122	if ((a&0xff0000)==0xa00000)
	123	{
	124	if (Pico.m.z80Run&1)
	125	elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
	126	if ((a&0x4000)==0x0000) { d=z80Read8(a); d\|=d<<8; goto end; } // Z80 ram (not byteswaped)
	127	if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled
	128	if(PicoOpt&POPT_EN_FM) d=YM2612Read();
	129	else d=Pico.m.rotate++&3;
	130	elprintf(EL_YM2612R, "read ym2612: %02x", d);
	131	goto end;
	132	}
	133	elprintf(EL_ANOMALY, "68k bad read [%06x]", a);
	134	d=0xffff;
	135	goto end;
	136	}
	137
	138	d = PicoRead16Hook(a, realsize);
	139
	140	end:
	141	return d;
	142	}
	143
	144	static void IoWrite8(u32 a, u32 d)
	145	{
	146	a=(a>>1)&0xf;
	147	// 6 button gamepad: if TH went from 0 to 1, gamepad changes state
	148	if (PicoOpt&POPT_6BTN_PAD)
	149	{
	150	if (a==1) {
	151	Pico.m.padDelay[0] = 0;
	152	if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
	153	}
	154	else if (a==2) {
	155	Pico.m.padDelay[1] = 0;
	156	if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
	157	}
	158	}
	159	Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
	160	}
	161
	162	#ifndef _ASM_CD_MEMORY_C
	163	static
	164	#endif
	165	void OtherWrite8(u32 a,u32 d)
	166	{
	167	#if !defined(_ASM_MEMORY_C) \|\| defined(_ASM_MEMORY_C_AMIPS)
	168	if ((a&0xe700f9)==0xc00011\|\|(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
	169	if ((a&0xff4000)==0xa00000) { // z80 RAM
	170	if (!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d;
	171	else {
	172	elprintf(EL_ANOMALY, "68k z80 write with no bus! [%06x] %02x @ %06x", a, d, SekPc);
	173	SekCyclesBurn(4); // hack?
	174	}
	175	return;
	176	}
	177	if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus\|=YM2612Write(a&3, d)&1; return; } // FM Sound
	178	if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
	179	#endif
	180	if (a==0xa11100) { z80WriteBusReq(d); return; }
	181	if (a==0xa11200) {
	182	elprintf(EL_BUSREQ, "write z80Reset: %02x", d);
	183	if (!(d&0x1)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
	184	else if (Pico.m.z80_reset) {
	185	Pico.m.z80_reset = 0;
	186	YM2612ResetChip();
	187	z80_reset();
	188	}
	189	return;
	190	}
	191	#if !defined(_ASM_MEMORY_C) \|\| defined(_ASM_MEMORY_C_AMIPS)
	192	if ((a&0xff7f00)==0xa06000) // Z80 BANK register
	193	{
	194	Pico.m.z80_bank68k>>=1;
	195	Pico.m.z80_bank68k\|=(d&1)<<8;
	196	Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
	197	elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
	198	return;
	199	}
	200	#endif
	201	if ((a&0xe700e0)==0xc00000) {
	202	d&=0xff;
	203	PicoVideoWrite(a,(u16)(d\|(d<<8))); // Byte access gets mirrored
	204	return;
	205	}
	206
	207	PicoWrite8Hook(a, d, 8);
	208	}
	209
	210
	211	#ifndef _ASM_CD_MEMORY_C
	212	static
	213	#endif
	214	void OtherWrite16(u32 a,u32 d)
	215	{
	216	if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
	217	if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
	218	if ((a&0xe700f8)==0xc00010\|\|(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
	219	if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus\|=YM2612Write(a&3, d)&1; return; } // FM Sound (??)
	220	if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
	221	if (!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8);
	222	else elprintf(EL_ANOMALY, "68k z80 write with no bus! [%06x] %02x @ %06x", a, d, SekPc);
	223	return;
	224	}
	225	if (a==0xa11200) {
	226	elprintf(EL_BUSREQ, "write z80reset: %04x", d);
	227	if (!(d&0x100)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
	228	else if (Pico.m.z80_reset) {
	229	Pico.m.z80_reset = 0;
	230	YM2612ResetChip();
	231	z80_reset();
	232	}
	233	return;
	234	}
	235	if ((a&0xff7f00)==0xa06000) // Z80 BANK register
	236	{
	237	Pico.m.z80_bank68k>>=1;
	238	Pico.m.z80_bank68k\|=(d&1)<<8;
	239	Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
	240	elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
	241	return;
	242	}
	243
	244	#ifndef _CD_MEMORY_C
	245	if (a >= SRam.start && a <= SRam.end) {
	246	elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc);
	247	if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled
	248	u8 pm=(u8 )(SRam.data-SRam.start+a);
	249	*pm++=d>>8;
	250	*pm++=d;
	251	SRam.changed = 1;
	252	}
	253	else
	254	SRAMWrite(a, d);
	255	return;
	256	}
	257	#endif
	258
	259	PicoWrite16Hook(a, d, 16);
	260	}
	261