SekStepM68k restored, pad read issues with D&D fixed

[picodrive.git] / Pico / Pico.c

// PicoDrive\r
\r
// (c) Copyright 2004 Dave, All rights reserved.\r
// (c) Copyright 2006-2008 notaz, All rights reserved.\r
// Free for non-commercial use.\r
\r
// For commercial use, separate licencing terms must be obtained.\r
\r
\r
#include "PicoInt.h"\r
#include "sound/ym2612.h"\r
\r
int PicoVer=0x0133;\r
struct Pico Pico;\r
int PicoOpt = 0;\r
int PicoSkipFrame = 0; // skip rendering frame?\r
int emustatus = 0;     // rapid_ym2612, multi_ym_updates\r
int PicoPad[2];        // Joypads, format is SACB RLDU\r
int PicoPadInt[2];     // internal copy\r
int PicoAHW = 0;       // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r
int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
int PicoAutoRgnOrder = 0;\r
struct PicoSRAM SRam = {0,};\r
\r
void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
void (*PicoResetHook)(void) = NULL;\r
void (*PicoLineHook)(void) = NULL;\r
\r
// to be called once on emu init\r
void PicoInit(void)\r
{\r
  // Blank space for state:\r
  memset(&Pico,0,sizeof(Pico));\r
  memset(&PicoPad,0,sizeof(PicoPad));\r
  memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
\r
  // Init CPUs:\r
  SekInit();\r
  z80_init(); // init even if we aren't going to use it\r
\r
  PicoInitMCD();\r
  PicoSVPInit();\r
\r
  SRam.data=0;\r
}\r
\r
// to be called once on emu exit\r
void PicoExit(void)\r
{\r
  if (PicoAHW & PAHW_MCD)\r
    PicoExitMCD();\r
  z80_exit();\r
\r
  if (SRam.data) free(SRam.data); SRam.data=0;\r
}\r
\r
void PicoPower(void)\r
{\r
  unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
\r
  Pico.m.frame_count = 0;\r
\r
  // clear all memory of the emulated machine\r
  memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r
\r
  memset(&Pico.video,0,sizeof(Pico.video));\r
  memset(&Pico.m,0,sizeof(Pico.m));\r
\r
  Pico.video.pending_ints=0;\r
  z80_reset();\r
\r
  // default VDP register values (based on Fusion)\r
  Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
  Pico.video.reg[0xc] = 0x81;\r
  Pico.video.reg[0xf] = 0x02;\r
\r
  if (PicoAHW & PAHW_MCD)\r
    PicoPowerMCD();\r
\r
  Pico.m.sram_reg=sram_reg;\r
  PicoReset();\r
}\r
\r
PICO_INTERNAL void PicoDetectRegion(void)\r
{\r
  int support=0, hw=0, i;\r
  unsigned char pal=0;\r
\r
  if (PicoRegionOverride)\r
  {\r
    support = PicoRegionOverride;\r
  }\r
  else\r
  {\r
    // Read cartridge region data:\r
    int region=PicoRead32(0x1f0);\r
\r
    for (i=0;i<4;i++)\r
    {\r
      int c=0;\r
\r
      c=region>>(i<<3); c&=0xff;\r
      if (c<=' ') continue;\r
\r
           if (c=='J')  support|=1;\r
      else if (c=='U')  support|=4;\r
      else if (c=='E')  support|=8;\r
      else if (c=='j') {support|=1; break; }\r
      else if (c=='u') {support|=4; break; }\r
      else if (c=='e') {support|=8; break; }\r
      else\r
      {\r
        // New style code:\r
        char s[2]={0,0};\r
        s[0]=(char)c;\r
        support|=strtol(s,NULL,16);\r
      }\r
    }\r
  }\r
\r
  // auto detection order override\r
  if (PicoAutoRgnOrder) {\r
         if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
    else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
    else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
  }\r
\r
  // Try to pick the best hardware value for English/50hz:\r
       if (support&8) { hw=0xc0; pal=1; } // Europe\r
  else if (support&4)   hw=0x80;          // USA\r
  else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
  else if (support&1)   hw=0x00;          // Japan NTSC\r
  else hw=0x80; // USA\r
\r
  Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
  Pico.m.pal=pal;\r
}\r
\r
int PicoReset(void)\r
{\r
  unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
\r
  if (Pico.romsize<=0) return 1;\r
\r
  /* must call now, so that banking is reset, and correct vectors get fetched */\r
  if (PicoResetHook) PicoResetHook();\r
\r
  PicoMemReset();\r
  SekReset();\r
  memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
  // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
  SekSetRealTAS(PicoAHW & PAHW_MCD);\r
  SekCycleCntT=0;\r
\r
  if (PicoAHW & PAHW_MCD)\r
    // needed for MCD to reset properly, probably some bug hides behind this..\r
    memset(Pico.ioports,0,sizeof(Pico.ioports));\r
  emustatus = 0;\r
\r
  Pico.m.dirtyPal = 1;\r
\r
  Pico.m.z80_bank68k = 0;\r
  memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
\r
  PicoDetectRegion();\r
  Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
\r
  PsndReset(); // pal must be known here\r
\r
  // create an empty "dma" to cause 68k exec start at random frame location\r
  if (Pico.m.dma_xfers == 0 && !(PicoOpt&POPT_DIS_VDP_FIFO))\r
    Pico.m.dma_xfers = rand() & 0x1fff;\r
\r
  if (PicoAHW & PAHW_MCD) {\r
    PicoResetMCD();\r
    return 0;\r
  }\r
  else {\r
    // reinit, so that checksum checks pass\r
    SekFinishIdleDet();\r
    if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
      SekInitIdleDet();\r
  }\r
\r
  // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
  Pico.m.sram_reg=sram_reg&0x14;\r
  if (!(Pico.m.sram_reg&4) && Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;\r
\r
  elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r
    (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);\r
\r
  return 0;\r
}\r
\r
\r
// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
// same for Outrunners (92-121, when active is set to 24)\r
// 96 is VR hack\r
static const int dma_timings[] = {\r
  96,  167, 166,  83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
  102, 205, 204, 102, // vblank: 40cell:\r
  16,   16,  15,   8, // active: 32cell:\r
  24,   18,  17,   9  // ...\r
};\r
\r
static const int dma_bsycles[] = {\r
  (488<<8)/96,  (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
  (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r
  (488<<8)/16,  (488<<8)/16,  (488<<8)/15,  (488<<8)/8,\r
  (488<<8)/24,  (488<<8)/18,  (488<<8)/17,  (488<<8)/9\r
};\r
\r
PICO_INTERNAL int CheckDMA(void)\r
{\r
  int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
  int xfers = Pico.m.dma_xfers;\r
  int dma_op1;\r
\r
  if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
  dma_op1 = dma_op;\r
  if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
  if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
  xfers_can = dma_timings[dma_op];\r
  if(xfers <= xfers_can)\r
  {\r
    if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
    else {\r
      burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
    }\r
    Pico.m.dma_xfers = 0;\r
  } else {\r
    if(!(dma_op&2)) burn = 488;\r
    Pico.m.dma_xfers -= xfers_can;\r
  }\r
\r
  elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
  //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
  return burn;\r
}\r
\r
static __inline void SekRunM68k(int cyc)\r
{\r
  int cyc_do;\r
  SekCycleAim+=cyc;\r
  if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
#if defined(EMU_CORE_DEBUG)\r
  // this means we do run-compare\r
  SekCycleCnt+=CM_compareRun(cyc_do, 0);\r
#elif defined(EMU_C68K)\r
  PicoCpuCM68k.cycles=cyc_do;\r
  CycloneRun(&PicoCpuCM68k);\r
  SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r
#elif defined(EMU_M68K)\r
  SekCycleCnt+=m68k_execute(cyc_do);\r
#elif defined(EMU_F68K)\r
  SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r
#endif\r
}\r
\r
\r
// to be called on 224 or line_sample scanlines only\r
static __inline void getSamples(int y)\r
{\r
#if SIMPLE_WRITE_SOUND\r
  if (y != 224) return;\r
  PsndRender(0, PsndLen);\r
  if (PicoWriteSound) PicoWriteSound(PsndLen);\r
  PsndClear();\r
#else\r
  static int curr_pos = 0;\r
\r
  if(y == 224) {\r
    if(emustatus & 2)\r
         curr_pos += PsndRender(curr_pos, PsndLen-PsndLen/2);\r
    else curr_pos  = PsndRender(0, PsndLen);\r
    if (emustatus&1) emustatus|=2; else emustatus&=~2;\r
    if (PicoWriteSound) PicoWriteSound(curr_pos);\r
    // clear sound buffer\r
    PsndClear();\r
  }\r
  else if(emustatus & 3) {\r
    emustatus|= 2;\r
    emustatus&=~1;\r
    curr_pos = PsndRender(0, PsndLen/2);\r
  }\r
#endif\r
}\r
\r
\r
#include "PicoFrameHints.c"\r
\r
\r
int z80stopCycle;\r
int z80_cycle_cnt;        /* 'done' z80 cycles before z80_run() */\r
int z80_cycle_aim;\r
int z80_scanline;\r
int z80_scanline_cycles;  /* cycles done until z80_scanline */\r
\r
/* sync z80 to 68k */\r
PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
{\r
  int cnt;\r
  z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
  cnt = z80_cycle_aim - z80_cycle_cnt;\r
\r
  elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
    z80_cycle_aim, z80_cycle_aim / 228);\r
\r
  if (cnt > 0)\r
    z80_cycle_cnt += z80_run(cnt);\r
}\r
\r
\r
void PicoFrame(void)\r
{\r
  Pico.m.frame_count++;\r
\r
  if (PicoAHW & PAHW_MCD) {\r
    PicoFrameMCD();\r
    return;\r
  }\r
\r
  //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
\r
  if (!(PicoOpt&POPT_ALT_RENDERER))\r
    PicoFrameStart();\r
\r
  PicoFrameHints();\r
}\r
\r
void PicoFrameDrawOnly(void)\r
{\r
  PicoFrameStart();\r
  PicoDrawSync(223, 0);\r
}\r
\r
void PicoGetInternal(pint_t which, pint_ret_t *r)\r
{\r
  switch (which)\r
  {\r
    case PI_ROM:         r->vptr = Pico.rom; break;\r
    case PI_ISPAL:       r->vint = Pico.m.pal; break;\r
    case PI_IS40_CELL:   r->vint = Pico.video.reg[12]&1; break;\r
    case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
  }\r
}\r
\r
// callback to output message from emu\r
void (*PicoMessage)(const char *msg)=NULL;\r
\r
#if 1 // defined(__DEBUG_PRINT)\r
#define bit(r, x) ((r>>x)&1)\r
#define MVP dstrp+=strlen(dstrp)\r
void z80_debug(char *dstr);\r
char *debugString(void)\r
{\r
#if 1\r
  static char dstr[1024];\r
  struct PicoVideo *pv=&Pico.video;\r
  unsigned char *reg=pv->reg, r;\r
  extern int HighPreSpr[];\r
  int i, sprites_lo, sprites_hi;\r
  char *dstrp;\r
\r
  sprites_lo = sprites_hi = 0;\r
  for (i = 0; HighPreSpr[i] != 0; i+=2)\r
    if (HighPreSpr[i+1] & 0x8000)\r
         sprites_hi++;\r
    else sprites_lo++;\r
\r
  dstrp = dstr;\r
  sprintf(dstrp, "mode set 1: %02x       spr lo: %2i, spr hi: %2i\n", (r=reg[0]), sprites_lo, sprites_hi); MVP;\r
  sprintf(dstrp, "display_disable: %i, M3: %i, palette: %i, ?, hints: %i\n", bit(r,0), bit(r,1), bit(r,2), bit(r,4)); MVP;\r
  sprintf(dstrp, "mode set 2: %02x                            hcnt: %i\n", (r=reg[1]), pv->reg[10]); MVP;\r
  sprintf(dstrp, "SMS/gen: %i, pal: %i, dma: %i, vints: %i, disp: %i, TMS: %i\n",bit(r,2),bit(r,3),bit(r,4),bit(r,5),bit(r,6),bit(r,7)); MVP;\r
  sprintf(dstrp, "mode set 3: %02x\n", (r=reg[0xB])); MVP;\r
  sprintf(dstrp, "LSCR: %i, HSCR: %i, 2cell vscroll: %i, IE2: %i\n", bit(r,0), bit(r,1), bit(r,2), bit(r,3)); MVP;\r
  sprintf(dstrp, "mode set 4: %02x\n", (r=reg[0xC])); MVP;\r
  sprintf(dstrp, "interlace: %i%i, cells: %i, shadow: %i\n", bit(r,2), bit(r,1), (r&0x80) ? 40 : 32, bit(r,3)); MVP;\r
  sprintf(dstrp, "scroll size: w: %i, h: %i  SRAM: %i; eeprom: %i (%i)\n", reg[0x10]&3, (reg[0x10]&0x30)>>4,\r
  	bit(Pico.m.sram_reg, 4), bit(Pico.m.sram_reg, 2), SRam.eeprom_type); MVP;\r
  sprintf(dstrp, "sram range: %06x-%06x, reg: %02x\n", SRam.start, SRam.end, Pico.m.sram_reg); MVP;\r
  sprintf(dstrp, "pend int: v:%i, h:%i, vdp status: %04x\n", bit(pv->pending_ints,5), bit(pv->pending_ints,4), pv->status); MVP;\r
  sprintf(dstrp, "pal: %i, hw: %02x, frame#: %i\n", Pico.m.pal, Pico.m.hardware, Pico.m.frame_count); MVP;\r
#if defined(EMU_C68K)\r
  sprintf(dstrp, "M68k: PC: %06x, st_flg: %x, cycles: %u\n", SekPc, PicoCpuCM68k.state_flags, SekCyclesDoneT()); MVP;\r
  sprintf(dstrp, "d0=%08x, a0=%08x, osp=%08x, irql=%i\n", PicoCpuCM68k.d[0], PicoCpuCM68k.a[0], PicoCpuCM68k.osp, PicoCpuCM68k.irq); MVP;\r
  sprintf(dstrp, "d1=%08x, a1=%08x,  sr=%04x\n", PicoCpuCM68k.d[1], PicoCpuCM68k.a[1], CycloneGetSr(&PicoCpuCM68k)); dstrp+=strlen(dstrp); MVP;\r
  for(r=2; r < 8; r++) {\r
    sprintf(dstrp, "d%i=%08x, a%i=%08x\n", r, PicoCpuCM68k.d[r], r, PicoCpuCM68k.a[r]); MVP;\r
  }\r
#elif defined(EMU_M68K)\r
  sprintf(dstrp, "M68k: PC: %06x, cycles: %u, irql: %i\n", SekPc, SekCyclesDoneT(), PicoCpuMM68k.int_level>>8); MVP;\r
#elif defined(EMU_F68K)\r
  sprintf(dstrp, "M68k: PC: %06x, cycles: %u, irql: %i\n", SekPc, SekCyclesDoneT(), PicoCpuFM68k.interrupts[0]); MVP;\r
#endif\r
  sprintf(dstrp, "z80Run: %i, z80_reset: %i, z80_bnk: %06x\n", Pico.m.z80Run, Pico.m.z80_reset, Pico.m.z80_bank68k<<15); MVP;\r
  z80_debug(dstrp); MVP;\r
  if (strlen(dstr) > sizeof(dstr))\r
    printf("warning: debug buffer overflow (%i/%i)\n", strlen(dstr), sizeof(dstr));\r
\r
#else\r
  struct PicoVideo *pvid=&Pico.video;\r
  int table=0;\r
  int i,u,n,link=0;\r
  static char dstr[1024*8];\r
  dstr[0] = 0;\r
\r
  table=pvid->reg[5]&0x7f;\r
  if (pvid->reg[12]&1) table&=0x7e; // Lowest bit 0 in 40-cell mode\r
  table<<=8; // Get sprite table address/2\r
\r
  for (i=u=n=0; u < 80 && n < 20; u++)\r
  {\r
    unsigned int *sprite;\r
    int code, code2, sx, sy, height;\r
\r
    sprite=(unsigned int *)(Pico.vram+((table+(link<<2))&0x7ffc)); // Find sprite\r
\r
    // get sprite info\r
    code = sprite[0];\r
\r
    // check if it is on this line\r
    sy = (code&0x1ff);//-0x80;\r
    height = ((code>>24)&3)+1;\r
\r
    // masking sprite?\r
    code2 = sprite[1];\r
    sx = (code2>>16)&0x1ff;\r
\r
    printf("#%02i x: %03i y: %03i %ix%i\n", u, sx, sy, ((code>>26)&3)+1, height);\r
\r
    link=(code>>16)&0x7f;\r
    if(!link) break; // End of sprites\r
  }\r
#endif\r
\r
  return dstr;\r
}\r
#endif\r