| 1 | // Pico Library - Header File\r |
| 2 | \r |
| 3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
| 4 | // (c) Copyright 2006 notaz, All rights reserved.\r |
| 5 | // Free for non-commercial use.\r |
| 6 | \r |
| 7 | // For commercial use, separate licencing terms must be obtained.\r |
| 8 | \r |
| 9 | \r |
| 10 | #include <stdio.h>\r |
| 11 | #include <stdlib.h>\r |
| 12 | #include <string.h>\r |
| 13 | #include "Pico.h"\r |
| 14 | \r |
| 15 | \r |
| 16 | // to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r |
| 17 | \r |
| 18 | #ifdef __cplusplus\r |
| 19 | extern "C" {\r |
| 20 | #endif\r |
| 21 | \r |
| 22 | \r |
| 23 | // ----------------------- 68000 CPU -----------------------\r |
| 24 | #ifdef EMU_C68K\r |
| 25 | #include "../cpu/Cyclone/Cyclone.h"\r |
| 26 | extern struct Cyclone PicoCpu, PicoCpuS68k;\r |
| 27 | #define SekCyclesLeft PicoCpu.cycles // cycles left for this run\r |
| 28 | #define SekSetCyclesLeft(c) PicoCpu.cycles=c\r |
| 29 | #define SekPc (PicoCpu.pc-PicoCpu.membase)\r |
| 30 | #define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r |
| 31 | #endif\r |
| 32 | \r |
| 33 | #ifdef EMU_A68K\r |
| 34 | void __cdecl M68000_RUN();\r |
| 35 | // The format of the data in a68k.asm (at the _M68000_regs location)\r |
| 36 | struct A68KContext\r |
| 37 | {\r |
| 38 | unsigned int d[8],a[8];\r |
| 39 | unsigned int isp,srh,ccr,xc,pc,irq,sr;\r |
| 40 | int (*IrqCallback) (int nIrq);\r |
| 41 | unsigned int ppc;\r |
| 42 | void *pResetCallback;\r |
| 43 | unsigned int sfc,dfc,usp,vbr;\r |
| 44 | unsigned int AsmBank,CpuVersion;\r |
| 45 | };\r |
| 46 | struct A68KContext M68000_regs;\r |
| 47 | extern int m68k_ICount;\r |
| 48 | #define SekCyclesLeft m68k_ICount\r |
| 49 | #define SekSetCyclesLeft(c) m68k_ICount=c\r |
| 50 | #define SekPc M68000_regs.pc\r |
| 51 | #endif\r |
| 52 | \r |
| 53 | #ifdef EMU_M68K\r |
| 54 | #include "../cpu/musashi/m68kcpu.h"\r |
| 55 | extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r |
| 56 | extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r |
| 57 | #ifndef SekCyclesLeft\r |
| 58 | #define SekCyclesLeft m68k_cycles_remaining()\r |
| 59 | #define SekSetCyclesLeft(c) SET_CYCLES(c)\r |
| 60 | #define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r |
| 61 | #define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r |
| 62 | #endif\r |
| 63 | #endif\r |
| 64 | \r |
| 65 | extern int SekCycleCnt; // cycles done in this frame\r |
| 66 | extern int SekCycleAim; // cycle aim\r |
| 67 | extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r |
| 68 | \r |
| 69 | #define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}\r |
| 70 | #define SekCyclesBurn(c) SekCycleCnt+=c\r |
| 71 | #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)\r |
| 72 | #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r |
| 73 | \r |
| 74 | #define SekEndRun(after) { \\r |
| 75 | SekCycleCnt -= SekCyclesLeft - after; \\r |
| 76 | if(SekCycleCnt < 0) SekCycleCnt = 0; \\r |
| 77 | SekSetCyclesLeft(after); \\r |
| 78 | }\r |
| 79 | \r |
| 80 | extern int SekCycleCntS68k;\r |
| 81 | extern int SekCycleAimS68k;\r |
| 82 | \r |
| 83 | #define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}\r |
| 84 | \r |
| 85 | // does not work as expected\r |
| 86 | //extern int z80ExtraCycles; // extra z80 cycles, used when z80 is [en|dis]abled\r |
| 87 | \r |
| 88 | extern int PicoMCD;\r |
| 89 | \r |
| 90 | // ---------------------------------------------------------\r |
| 91 | \r |
| 92 | // main oscillator clock which controls timing\r |
| 93 | #define OSC_NTSC 53693100\r |
| 94 | #define OSC_PAL 53203424 // not accurate\r |
| 95 | \r |
| 96 | struct PicoVideo\r |
| 97 | {\r |
| 98 | unsigned char reg[0x20];\r |
| 99 | unsigned int command; // 32-bit Command\r |
| 100 | unsigned char pending; // 1 if waiting for second half of 32-bit command\r |
| 101 | unsigned char type; // Command type (v/c/vsram read/write)\r |
| 102 | unsigned short addr; // Read/Write address\r |
| 103 | int status; // Status bits\r |
| 104 | unsigned char pending_ints; // pending interrupts: ??VH????\r |
| 105 | unsigned char pad[0x13];\r |
| 106 | };\r |
| 107 | \r |
| 108 | struct PicoMisc\r |
| 109 | {\r |
| 110 | unsigned char rotate;\r |
| 111 | unsigned char z80Run;\r |
| 112 | unsigned char padTHPhase[2]; // phase of gamepad TH switches\r |
| 113 | short scanline; // 0 to 261||311; -1 in fast mode\r |
| 114 | char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r |
| 115 | unsigned char hardware; // Hardware value for country\r |
| 116 | unsigned char pal; // 1=PAL 0=NTSC\r |
| 117 | unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM?\r |
| 118 | unsigned short z80_bank68k;\r |
| 119 | unsigned short z80_lastaddr; // this is for Z80 faking\r |
| 120 | unsigned char z80_fakeval;\r |
| 121 | unsigned char pad0;\r |
| 122 | unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay\r |
| 123 | unsigned short sram_addr; // EEPROM address register\r |
| 124 | unsigned char sram_cycle; // EEPROM SRAM cycle number\r |
| 125 | unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r |
| 126 | unsigned char prot_bytes[2]; // simple protection fakeing\r |
| 127 | unsigned short dma_bytes; //\r |
| 128 | unsigned char pad[2];\r |
| 129 | unsigned int frame_count; // mainly for movies\r |
| 130 | };\r |
| 131 | \r |
| 132 | // some assembly stuff depend on these, do not touch!\r |
| 133 | struct Pico\r |
| 134 | {\r |
| 135 | unsigned char ram[0x10000]; // 0x00000 scratch ram\r |
| 136 | unsigned short vram[0x8000]; // 0x10000\r |
| 137 | unsigned char zram[0x2000]; // 0x20000 Z80 ram\r |
| 138 | unsigned char ioports[0x10];\r |
| 139 | unsigned int pad[0x3c]; // unused\r |
| 140 | unsigned short cram[0x40]; // 0x22100\r |
| 141 | unsigned short vsram[0x40]; // 0x22180\r |
| 142 | \r |
| 143 | unsigned char *rom; // 0x22200\r |
| 144 | unsigned int romsize; // 0x22204\r |
| 145 | \r |
| 146 | struct PicoMisc m;\r |
| 147 | struct PicoVideo video;\r |
| 148 | };\r |
| 149 | \r |
| 150 | // sram\r |
| 151 | struct PicoSRAM\r |
| 152 | {\r |
| 153 | unsigned char *data; // actual data\r |
| 154 | unsigned int start; // start address in 68k address space\r |
| 155 | unsigned int end;\r |
| 156 | unsigned char resize; // 1=SRAM size changed and needs to be reallocated on PicoReset\r |
| 157 | unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset\r |
| 158 | unsigned char changed;\r |
| 159 | unsigned char pad;\r |
| 160 | };\r |
| 161 | \r |
| 162 | // MCD\r |
| 163 | #include "cd/cd_sys.h"\r |
| 164 | #include "cd/LC89510.h"\r |
| 165 | #include "cd/gfx_cd.h"\r |
| 166 | \r |
| 167 | struct mcd_pcm\r |
| 168 | {\r |
| 169 | unsigned char control; // reg7\r |
| 170 | unsigned char enabled; // reg8\r |
| 171 | unsigned char cur_ch;\r |
| 172 | unsigned char bank;\r |
| 173 | int pad1;\r |
| 174 | \r |
| 175 | struct pcm_chan\r |
| 176 | {\r |
| 177 | unsigned char regs[8];\r |
| 178 | unsigned int addr; // played sample address\r |
| 179 | int pad;\r |
| 180 | } ch[8];\r |
| 181 | };\r |
| 182 | \r |
| 183 | struct mcd_misc\r |
| 184 | {\r |
| 185 | unsigned short hint_vector;\r |
| 186 | unsigned char busreq;\r |
| 187 | unsigned char s68k_pend_ints;\r |
| 188 | unsigned int state_flags; // emu state: reset_pending,\r |
| 189 | unsigned int counter75hz;\r |
| 190 | unsigned short audio_offset; // for savestates: play pointer offset (0-1023)\r |
| 191 | unsigned char audio_track; // playing audio track # (zero based)\r |
| 192 | char pad1;\r |
| 193 | int timer_int3;\r |
| 194 | unsigned int timer_stopwatch;\r |
| 195 | int pad[10];\r |
| 196 | };\r |
| 197 | \r |
| 198 | typedef struct\r |
| 199 | {\r |
| 200 | unsigned char bios[0x20000]; // 128K\r |
| 201 | union { // 512K\r |
| 202 | unsigned char prg_ram[0x80000];\r |
| 203 | unsigned char prg_ram_b[4][0x20000];\r |
| 204 | };\r |
| 205 | union { // 256K\r |
| 206 | struct {\r |
| 207 | unsigned char word_ram2M[0x40000];\r |
| 208 | unsigned char unused[0x20000];\r |
| 209 | };\r |
| 210 | struct {\r |
| 211 | unsigned char unused[0x20000];\r |
| 212 | unsigned char word_ram1M[2][0x20000];\r |
| 213 | };\r |
| 214 | };\r |
| 215 | union { // 64K\r |
| 216 | unsigned char pcm_ram[0x10000];\r |
| 217 | unsigned char pcm_ram_b[0x10][0x1000];\r |
| 218 | };\r |
| 219 | unsigned char bram[0x2000]; // 8K\r |
| 220 | unsigned char s68k_regs[0x200]; // GA, not CPU regs\r |
| 221 | struct mcd_pcm pcm;\r |
| 222 | _scd_toc TOC; // not to be saved\r |
| 223 | CDD cdd;\r |
| 224 | CDC cdc;\r |
| 225 | _scd scd;\r |
| 226 | Rot_Comp rot_comp;\r |
| 227 | struct mcd_misc m;\r |
| 228 | } mcd_state;\r |
| 229 | \r |
| 230 | #define Pico_mcd ((mcd_state *)Pico.rom)\r |
| 231 | \r |
| 232 | // Area.c\r |
| 233 | int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r |
| 234 | int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r |
| 235 | \r |
| 236 | // cd/Area.c\r |
| 237 | int PicoCdSaveState(void *file);\r |
| 238 | int PicoCdLoadState(void *file);\r |
| 239 | \r |
| 240 | // Draw.c\r |
| 241 | int PicoLine(int scan);\r |
| 242 | void PicoFrameStart();\r |
| 243 | \r |
| 244 | // Draw2.c\r |
| 245 | void PicoFrameFull();\r |
| 246 | \r |
| 247 | // Memory.c\r |
| 248 | int PicoInitPc(unsigned int pc);\r |
| 249 | unsigned int CPU_CALL PicoRead32(unsigned int a);\r |
| 250 | void PicoMemSetup();\r |
| 251 | void PicoMemReset();\r |
| 252 | //void PicoDasm(int start,int len);\r |
| 253 | unsigned char z80_read(unsigned short a);\r |
| 254 | unsigned short z80_read16(unsigned short a);\r |
| 255 | void z80_write(unsigned char data, unsigned short a);\r |
| 256 | void z80_write16(unsigned short data, unsigned short a);\r |
| 257 | \r |
| 258 | // cd/Memory.c\r |
| 259 | void PicoMemSetupCD();\r |
| 260 | unsigned char PicoReadCD8 (unsigned int a);\r |
| 261 | unsigned short PicoReadCD16(unsigned int a);\r |
| 262 | unsigned int PicoReadCD32(unsigned int a);\r |
| 263 | void PicoWriteCD8 (unsigned int a, unsigned char d);\r |
| 264 | void PicoWriteCD16(unsigned int a, unsigned short d);\r |
| 265 | void PicoWriteCD32(unsigned int a, unsigned int d);\r |
| 266 | \r |
| 267 | // Pico.c\r |
| 268 | extern struct Pico Pico;\r |
| 269 | extern struct PicoSRAM SRam;\r |
| 270 | extern int emustatus;\r |
| 271 | int CheckDMA(void);\r |
| 272 | \r |
| 273 | // cd/Pico.c\r |
| 274 | int PicoInitMCD(void);\r |
| 275 | void PicoExitMCD(void);\r |
| 276 | int PicoResetMCD(int hard);\r |
| 277 | \r |
| 278 | // Sek.c\r |
| 279 | int SekInit(void);\r |
| 280 | int SekReset(void);\r |
| 281 | int SekInterrupt(int irq);\r |
| 282 | void SekState(unsigned char *data);\r |
| 283 | \r |
| 284 | // cd/Sek.c\r |
| 285 | int SekInitS68k(void);\r |
| 286 | int SekResetS68k(void);\r |
| 287 | int SekInterruptS68k(int irq);\r |
| 288 | \r |
| 289 | // sound/sound.c\r |
| 290 | extern int PsndLen_exc_cnt;\r |
| 291 | extern int PsndLen_exc_add;\r |
| 292 | \r |
| 293 | // VideoPort.c\r |
| 294 | void PicoVideoWrite(unsigned int a,unsigned short d);\r |
| 295 | unsigned int PicoVideoRead(unsigned int a);\r |
| 296 | \r |
| 297 | // Misc.c\r |
| 298 | void SRAMWriteEEPROM(unsigned int d);\r |
| 299 | unsigned int SRAMReadEEPROM();\r |
| 300 | void SRAMUpdPending(unsigned int a, unsigned int d);\r |
| 301 | void memcpy16(unsigned short *dest, unsigned short *src, int count);\r |
| 302 | void memcpy32(int *dest, int *src, int count);\r |
| 303 | void memset32(int *dest, int c, int count);\r |
| 304 | \r |
| 305 | // cd/Misc.c\r |
| 306 | void wram_2M_to_1M(unsigned char *m);\r |
| 307 | void wram_1M_to_2M(unsigned char *m);\r |
| 308 | \r |
| 309 | \r |
| 310 | #ifdef __cplusplus\r |
| 311 | } // End of extern "C"\r |
| 312 | #endif\r |