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final adjustments for Giz release
[picodrive.git] / Pico / cd / LC89510.c
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1/***********************************************************\r
2 * *\r
3 * This source was taken from the Gens project *\r
4 * Written by Stéphane Dallongeville *\r
5 * Copyright (c) 2002 by Stéphane Dallongeville *\r
6 * Modified/adapted for PicoDrive by notaz, 2007 *\r
7 * *\r
8 ***********************************************************/\r
9\r
10#include "../PicoInt.h"\r
11\r
12#define cdprintf dprintf\r
13//#define cdprintf(x...)\r
14\r
15\r
16#define CDC_DMA_SPEED 256\r
17\r
18\r
19static void CDD_Reset(void)\r
20{\r
21 // Reseting CDD\r
22\r
23 memset(Pico_mcd->s68k_regs+0x34, 0, 2*2); // CDD.Fader, CDD.Control\r
24 Pico_mcd->cdd.Status = 0;\r
25 Pico_mcd->cdd.Minute = 0;\r
26 Pico_mcd->cdd.Seconde = 0;\r
27 Pico_mcd->cdd.Frame = 0;\r
28 Pico_mcd->cdd.Ext = 0;\r
29\r
30 // clear receive status and transfer command\r
31 memset(Pico_mcd->s68k_regs+0x38, 0, 20);\r
32 Pico_mcd->s68k_regs[0x38+9] = 0xF; // Default checksum\r
33}\r
34\r
35\r
36static void CDC_Reset(void)\r
37{\r
38 // Reseting CDC\r
39\r
40 memset(Pico_mcd->cdc.Buffer, 0, sizeof(Pico_mcd->cdc.Buffer));\r
41\r
42 Pico_mcd->cdc.COMIN = 0;\r
43 Pico_mcd->cdc.IFSTAT = 0xFF;\r
44 Pico_mcd->cdc.DAC.N = 0;\r
45 Pico_mcd->cdc.DBC.N = 0;\r
46 Pico_mcd->cdc.HEAD.N = 0x01000000;\r
47 Pico_mcd->cdc.PT.N = 0;\r
48 Pico_mcd->cdc.WA.N = 2352 * 2;\r
49 Pico_mcd->cdc.STAT.N = 0x00000080;\r
50 Pico_mcd->cdc.SBOUT = 0;\r
51 Pico_mcd->cdc.IFCTRL = 0;\r
52 Pico_mcd->cdc.CTRL.N = 0;\r
53\r
54 Pico_mcd->cdc.Decode_Reg_Read = 0;\r
55 Pico_mcd->scd.Status_CDC &= ~0x08;\r
56}\r
57\r
58\r
59PICO_INTERNAL void LC89510_Reset(void)\r
60{\r
61 CDD_Reset();\r
62 CDC_Reset();\r
63\r
64 // clear DMA_Adr & Stop_Watch\r
65 memset(Pico_mcd->s68k_regs + 0xA, 0, 4);\r
66}\r
67\r
68\r
69PICO_INTERNAL void Update_CDC_TRansfer(int which)\r
70{\r
71 unsigned int DMA_Adr, dep, length;\r
72 unsigned short *dest;\r
73 unsigned char *src;\r
74\r
75 if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
76 {\r
77 length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
78 Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
79 Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r
80 Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
81 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
82\r
83 if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Trasnfer End Interrupt Enable ?\r
84 {\r
85 Pico_mcd->cdc.IFSTAT &= ~0x40;\r
86\r
87 if (Pico_mcd->s68k_regs[0x33] & (1<<5))\r
88 {\r
89 dprintf("cdc DTE irq 5");\r
90 SekInterruptS68k(5);\r
91 }\r
92 }\r
93 }\r
94 else length = CDC_DMA_SPEED;\r
95\r
96\r
97 // TODO: dst bounds checking?\r
98 src = Pico_mcd->cdc.Buffer + Pico_mcd->cdc.DAC.N;\r
99 DMA_Adr = (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB];\r
100\r
101 if (which == 7) // WORD RAM\r
102 {\r
103 if (Pico_mcd->s68k_regs[3] & 4)\r
104 {\r
105 // test: Final Fight\r
106 int bank = !(Pico_mcd->s68k_regs[3]&1);\r
107 dep = ((DMA_Adr & 0x3FFF) << 3);\r
108 cdprintf("CD DMA # %04x -> word_ram1M # %06x, len=%i",\r
109 Pico_mcd->cdc.DAC.N, dep, length);\r
110\r
111 dest = (unsigned short *) (Pico_mcd->word_ram1M[bank] + dep);\r
112\r
113 memcpy16bswap(dest, src, length);\r
114\r
115 /*{ // debug\r
116 unsigned char *b1 = Pico_mcd->word_ram1M[bank] + dep;\r
117 unsigned char *b2 = (unsigned char *)(dest+length) - 8;\r
118 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
119 b1[0], b1[1], b1[4], b1[5], b2[0], b2[1], b2[4], b2[5]);\r
120 }*/\r
121 }\r
122 else\r
123 {\r
124 dep = ((DMA_Adr & 0x7FFF) << 3);\r
125 cdprintf("CD DMA # %04x -> word_ram2M # %06x, len=%i",\r
126 Pico_mcd->cdc.DAC.N, dep, length);\r
127 dest = (unsigned short *) (Pico_mcd->word_ram2M + dep);\r
128\r
129 memcpy16bswap(dest, src, length);\r
130\r
131 /*{ // debug\r
132 unsigned char *b1 = Pico_mcd->word_ram2M + dep;\r
133 unsigned char *b2 = (unsigned char *)(dest+length) - 4;\r
134 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
135 b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
136 }*/\r
137 }\r
138 }\r
139 else if (which == 4) // PCM RAM (check: popful Mail)\r
140 {\r
141 dep = (DMA_Adr & 0x03FF) << 2;\r
142 dprintf("CD DMA # %04x -> PCM[%i] # %04x, len=%i",\r
143 Pico_mcd->cdc.DAC.N, Pico_mcd->pcm.bank, dep, length);\r
144 dest = (unsigned short *) (Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank] + dep);\r
145\r
146 if (Pico_mcd->cdc.DAC.N & 1) /* unaligned src? */\r
147 memcpy(dest, src, length*2);\r
148 else memcpy16(dest, (unsigned short *) src, length);\r
149 }\r
150 else if (which == 5) // PRG RAM\r
151 {\r
152 dep = DMA_Adr << 3;\r
153 dest = (unsigned short *) (Pico_mcd->prg_ram + dep);\r
154 cdprintf("CD DMA # %04x -> prg_ram # %06x, len=%i",\r
155 Pico_mcd->cdc.DAC.N, dep, length);\r
156\r
157 memcpy16bswap(dest, src, length);\r
158\r
159 /*{ // debug\r
160 unsigned char *b1 = Pico_mcd->prg_ram + dep;\r
161 unsigned char *b2 = (unsigned char *)(dest+length) - 4;\r
162 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
163 b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
164 }*/\r
165 }\r
166\r
167 length <<= 1;\r
168 Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;\r
169 if (Pico_mcd->scd.Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
170 else Pico_mcd->cdc.DBC.N = 0;\r
171\r
172 // update DMA_Adr\r
173 length >>= 2;\r
174 if (which != 4) length >>= 1;\r
175 DMA_Adr += length;\r
176 Pico_mcd->s68k_regs[0xA] = DMA_Adr >> 8;\r
177 Pico_mcd->s68k_regs[0xB] = DMA_Adr;\r
178}\r
179\r
180\r
181PICO_INTERNAL_ASM unsigned short Read_CDC_Host(int is_sub)\r
182{\r
183 int addr;\r
184\r
185 if (!(Pico_mcd->scd.Status_CDC & 0x08))\r
186 {\r
187 // Transfer data disabled\r
188 cdprintf("Read_CDC_Host FIXME: Transfer data disabled");\r
189 return 0;\r
190 }\r
191\r
192 if ((is_sub && (Pico_mcd->s68k_regs[4] & 7) != 3) ||\r
193 (!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r
194 {\r
195 // Wrong setting\r
196 cdprintf("Read_CDC_Host FIXME: Wrong setting");\r
197 return 0;\r
198 }\r
199\r
200 Pico_mcd->cdc.DBC.N -= 2;\r
201\r
202 if (Pico_mcd->cdc.DBC.N <= 0)\r
203 {\r
204 Pico_mcd->cdc.DBC.N = 0;\r
205 Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
206 Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer\r
207 Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready\r
208 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
209\r
210 if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Transfer End Interrupt Enable ?\r
211 {\r
212 Pico_mcd->cdc.IFSTAT &= ~0x40;\r
213\r
214 if (Pico_mcd->s68k_regs[0x33]&(1<<5)) {\r
215 dprintf("m68k: s68k irq 5");\r
216 SekInterruptS68k(5);\r
217 }\r
218\r
219 cdprintf("CDC - DTE interrupt");\r
220 }\r
221 }\r
222\r
223 addr = Pico_mcd->cdc.DAC.N;\r
224 Pico_mcd->cdc.DAC.N += 2;\r
225\r
226 cdprintf("Read_CDC_Host sub=%i d=%04x dac=%04x dbc=%04x", is_sub,\r
227 (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1], Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N);\r
228\r
229 return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];\r
230}\r
231\r
232\r
233PICO_INTERNAL void CDC_Update_Header(void)\r
234{\r
235 if (Pico_mcd->cdc.CTRL.B.B1 & 0x01) // Sub-Header wanted ?\r
236 {\r
237 Pico_mcd->cdc.HEAD.B.B0 = 0;\r
238 Pico_mcd->cdc.HEAD.B.B1 = 0;\r
239 Pico_mcd->cdc.HEAD.B.B2 = 0;\r
240 Pico_mcd->cdc.HEAD.B.B3 = 0;\r
241 }\r
242 else\r
243 {\r
244 _msf MSF;\r
245\r
246 LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r
247\r
248 Pico_mcd->cdc.HEAD.B.B0 = INT_TO_BCDB(MSF.M);\r
249 Pico_mcd->cdc.HEAD.B.B1 = INT_TO_BCDB(MSF.S);\r
250 Pico_mcd->cdc.HEAD.B.B2 = INT_TO_BCDB(MSF.F);\r
251 Pico_mcd->cdc.HEAD.B.B3 = 0x01;\r
252 }\r
253}\r
254\r
255\r
256PICO_INTERNAL unsigned char CDC_Read_Reg(void)\r
257{\r
258 unsigned char ret;\r
259\r
260 switch(Pico_mcd->s68k_regs[5] & 0xF)\r
261 {\r
262 case 0x0: // COMIN\r
263 cdprintf("CDC read reg 00 = %.2X", Pico_mcd->cdc.COMIN);\r
264\r
265 Pico_mcd->s68k_regs[5] = 0x1;\r
266 return Pico_mcd->cdc.COMIN;\r
267\r
268 case 0x1: // IFSTAT\r
269 cdprintf("CDC read reg 01 = %.2X", Pico_mcd->cdc.IFSTAT);\r
270\r
271 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 1); // Reg 1 (decoding)\r
272 Pico_mcd->s68k_regs[5] = 0x2;\r
273 return Pico_mcd->cdc.IFSTAT;\r
274\r
275 case 0x2: // DBCL\r
276 cdprintf("CDC read reg 02 = %.2X", Pico_mcd->cdc.DBC.B.L);\r
277\r
278 Pico_mcd->s68k_regs[5] = 0x3;\r
279 return Pico_mcd->cdc.DBC.B.L;\r
280\r
281 case 0x3: // DBCH\r
282 cdprintf("CDC read reg 03 = %.2X", Pico_mcd->cdc.DBC.B.H);\r
283\r
284 Pico_mcd->s68k_regs[5] = 0x4;\r
285 return Pico_mcd->cdc.DBC.B.H;\r
286\r
287 case 0x4: // HEAD0\r
288 cdprintf("CDC read reg 04 = %.2X", Pico_mcd->cdc.HEAD.B.B0);\r
289\r
290 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 4); // Reg 4 (decoding)\r
291 Pico_mcd->s68k_regs[5] = 0x5;\r
292 return Pico_mcd->cdc.HEAD.B.B0;\r
293\r
294 case 0x5: // HEAD1\r
295 cdprintf("CDC read reg 05 = %.2X", Pico_mcd->cdc.HEAD.B.B1);\r
296\r
297 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 5); // Reg 5 (decoding)\r
298 Pico_mcd->s68k_regs[5] = 0x6;\r
299 return Pico_mcd->cdc.HEAD.B.B1;\r
300\r
301 case 0x6: // HEAD2\r
302 cdprintf("CDC read reg 06 = %.2X", Pico_mcd->cdc.HEAD.B.B2);\r
303\r
304 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 6); // Reg 6 (decoding)\r
305 Pico_mcd->s68k_regs[5] = 0x7;\r
306 return Pico_mcd->cdc.HEAD.B.B2;\r
307\r
308 case 0x7: // HEAD3\r
309 cdprintf("CDC read reg 07 = %.2X", Pico_mcd->cdc.HEAD.B.B3);\r
310\r
311 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 7); // Reg 7 (decoding)\r
312 Pico_mcd->s68k_regs[5] = 0x8;\r
313 return Pico_mcd->cdc.HEAD.B.B3;\r
314\r
315 case 0x8: // PTL\r
316 cdprintf("CDC read reg 08 = %.2X", Pico_mcd->cdc.PT.B.L);\r
317\r
318 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 8); // Reg 8 (decoding)\r
319 Pico_mcd->s68k_regs[5] = 0x9;\r
320 return Pico_mcd->cdc.PT.B.L;\r
321\r
322 case 0x9: // PTH\r
323 cdprintf("CDC read reg 09 = %.2X", Pico_mcd->cdc.PT.B.H);\r
324\r
325 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 9); // Reg 9 (decoding)\r
326 Pico_mcd->s68k_regs[5] = 0xA;\r
327 return Pico_mcd->cdc.PT.B.H;\r
328\r
329 case 0xA: // WAL\r
330 cdprintf("CDC read reg 10 = %.2X", Pico_mcd->cdc.WA.B.L);\r
331\r
332 Pico_mcd->s68k_regs[5] = 0xB;\r
333 return Pico_mcd->cdc.WA.B.L;\r
334\r
335 case 0xB: // WAH\r
336 cdprintf("CDC read reg 11 = %.2X", Pico_mcd->cdc.WA.B.H);\r
337\r
338 Pico_mcd->s68k_regs[5] = 0xC;\r
339 return Pico_mcd->cdc.WA.B.H;\r
340\r
341 case 0xC: // STAT0\r
342 cdprintf("CDC read reg 12 = %.2X", Pico_mcd->cdc.STAT.B.B0);\r
343\r
344 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 12); // Reg 12 (decoding)\r
345 Pico_mcd->s68k_regs[5] = 0xD;\r
346 return Pico_mcd->cdc.STAT.B.B0;\r
347\r
348 case 0xD: // STAT1\r
349 cdprintf("CDC read reg 13 = %.2X", Pico_mcd->cdc.STAT.B.B1);\r
350\r
351 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 13); // Reg 13 (decoding)\r
352 Pico_mcd->s68k_regs[5] = 0xE;\r
353 return Pico_mcd->cdc.STAT.B.B1;\r
354\r
355 case 0xE: // STAT2\r
356 cdprintf("CDC read reg 14 = %.2X", Pico_mcd->cdc.STAT.B.B2);\r
357\r
358 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 14); // Reg 14 (decoding)\r
359 Pico_mcd->s68k_regs[5] = 0xF;\r
360 return Pico_mcd->cdc.STAT.B.B2;\r
361\r
362 case 0xF: // STAT3\r
363 cdprintf("CDC read reg 15 = %.2X", Pico_mcd->cdc.STAT.B.B3);\r
364\r
365 ret = Pico_mcd->cdc.STAT.B.B3;\r
366 Pico_mcd->cdc.IFSTAT |= 0x20; // decoding interrupt flag cleared\r
367 if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))\r
368 {\r
369 if ((Pico_mcd->cdc.Decode_Reg_Read & 0x73F2) == 0x73F2)\r
370 Pico_mcd->cdc.STAT.B.B3 = 0x80;\r
371 }\r
372 return ret;\r
373 }\r
374\r
375 return 0;\r
376}\r
377\r
378\r
379PICO_INTERNAL void CDC_Write_Reg(unsigned char Data)\r
380{\r
381 cdprintf("CDC write reg%02d = %.2X", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
382\r
383 switch (Pico_mcd->s68k_regs[5] & 0xF)\r
384 {\r
385 case 0x0: // SBOUT\r
386 Pico_mcd->s68k_regs[5] = 0x1;\r
387 Pico_mcd->cdc.SBOUT = Data;\r
388\r
389 break;\r
390\r
391 case 0x1: // IFCTRL\r
392 Pico_mcd->s68k_regs[5] = 0x2;\r
393 Pico_mcd->cdc.IFCTRL = Data;\r
394\r
395 if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0) // Stop data transfer\r
396 {\r
397 Pico_mcd->cdc.DBC.N = 0;\r
398 Pico_mcd->scd.Status_CDC &= ~0x08;\r
399 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress\r
400 }\r
401 break;\r
402\r
403 case 0x2: // DBCL\r
404 Pico_mcd->s68k_regs[5] = 0x3;\r
405 Pico_mcd->cdc.DBC.B.L = Data;\r
406\r
407 break;\r
408\r
409 case 0x3: // DBCH\r
410 Pico_mcd->s68k_regs[5] = 0x4;\r
411 Pico_mcd->cdc.DBC.B.H = Data;\r
412\r
413 break;\r
414\r
415 case 0x4: // DACL\r
416 Pico_mcd->s68k_regs[5] = 0x5;\r
417 Pico_mcd->cdc.DAC.B.L = Data;\r
418\r
419 break;\r
420\r
421 case 0x5: // DACH\r
422 Pico_mcd->s68k_regs[5] = 0x6;\r
423 Pico_mcd->cdc.DAC.B.H = Data;\r
424\r
425 break;\r
426\r
427 case 0x6: // DTTRG\r
428 if (Pico_mcd->cdc.IFCTRL & 0x02) // Data transfer enable ?\r
429 {\r
430 Pico_mcd->cdc.IFSTAT &= ~0x08; // Data transfer in progress\r
431 Pico_mcd->scd.Status_CDC |= 0x08; // Data transfer in progress\r
432 Pico_mcd->s68k_regs[4] &= 0x7F; // A data transfer start\r
433\r
434 cdprintf("************** Starting Data Transfer ***********");\r
435 cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
436 Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]);\r
437 }\r
438 break;\r
439\r
440 case 0x7: // DTACK\r
441 Pico_mcd->cdc.IFSTAT |= 0x40; // end data transfer interrupt flag cleared\r
442 break;\r
443\r
444 case 0x8: // WAL\r
445 Pico_mcd->s68k_regs[5] = 0x9;\r
446 Pico_mcd->cdc.WA.B.L = Data;\r
447\r
448 break;\r
449\r
450 case 0x9: // WAH\r
451 Pico_mcd->s68k_regs[5] = 0xA;\r
452 Pico_mcd->cdc.WA.B.H = Data;\r
453\r
454 break;\r
455\r
456 case 0xA: // CTRL0\r
457 Pico_mcd->s68k_regs[5] = 0xB;\r
458 Pico_mcd->cdc.CTRL.B.B0 = Data;\r
459\r
460 break;\r
461\r
462 case 0xB: // CTRL1\r
463 Pico_mcd->s68k_regs[5] = 0xC;\r
464 Pico_mcd->cdc.CTRL.B.B1 = Data;\r
465\r
466 break;\r
467\r
468 case 0xC: // PTL\r
469 Pico_mcd->s68k_regs[5] = 0xD;\r
470 Pico_mcd->cdc.PT.B.L = Data;\r
471\r
472 break;\r
473\r
474 case 0xD: // PTH\r
475 Pico_mcd->s68k_regs[5] = 0xE;\r
476 Pico_mcd->cdc.PT.B.H = Data;\r
477\r
478 break;\r
479\r
480 case 0xE: // CTRL2\r
481 Pico_mcd->cdc.CTRL.B.B2 = Data;\r
482 break;\r
483\r
484 case 0xF: // RESET\r
485 CDC_Reset();\r
486 break;\r
487 }\r
488}\r
489\r
490\r
491static int bswapwrite(int a, unsigned short d)\r
492{\r
493 *(unsigned short *)(Pico_mcd->s68k_regs + a) = (d>>8)|(d<<8);\r
494 return d + (d >> 8);\r
495}\r
496\r
497PICO_INTERNAL void CDD_Export_Status(void)\r
498{\r
499 unsigned int csum;\r
500\r
501 csum = bswapwrite( 0x38+0, Pico_mcd->cdd.Status);\r
502 csum += bswapwrite( 0x38+2, Pico_mcd->cdd.Minute);\r
503 csum += bswapwrite( 0x38+4, Pico_mcd->cdd.Seconde);\r
504 csum += bswapwrite( 0x38+6, Pico_mcd->cdd.Frame);\r
505 Pico_mcd->s68k_regs[0x38+8] = Pico_mcd->cdd.Ext;\r
506 csum += Pico_mcd->cdd.Ext;\r
507 Pico_mcd->s68k_regs[0x38+9] = ~csum & 0xf;\r
508\r
509 Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control\r
510\r
511 if (Pico_mcd->s68k_regs[0x33] & (1<<4))\r
512 {\r
513 dprintf("cdd export irq 4");\r
514 SekInterruptS68k(4);\r
515 }\r
516\r
517// cdprintf("CDD exported status\n");\r
518 cdprintf("out: Status=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",\r
519 (Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],\r
520 (Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],\r
521 (Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],\r
522 (Pico_mcd->s68k_regs[0x38+6] << 8) | Pico_mcd->s68k_regs[0x38+7],\r
523 (Pico_mcd->s68k_regs[0x38+8] << 8) | Pico_mcd->s68k_regs[0x38+9]);\r
524}\r
525\r
526\r
527PICO_INTERNAL void CDD_Import_Command(void)\r
528{\r
529// cdprintf("CDD importing command\n");\r
530 cdprintf("in: Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",\r
531 (Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],\r
532 (Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],\r
533 (Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],\r
534 (Pico_mcd->s68k_regs[0x38+10+6] << 8) | Pico_mcd->s68k_regs[0x38+10+7],\r
535 (Pico_mcd->s68k_regs[0x38+10+8] << 8) | Pico_mcd->s68k_regs[0x38+10+9]);\r
536\r
537 switch (Pico_mcd->s68k_regs[0x38+10+0])\r
538 {\r
539 case 0x0: // STATUS (?)\r
540 Get_Status_CDD_c0();\r
541 break;\r
542\r
543 case 0x1: // STOP ALL (?)\r
544 Stop_CDD_c1();\r
545 break;\r
546\r
547 case 0x2: // GET TOC INFORMATIONS\r
548 switch(Pico_mcd->s68k_regs[0x38+10+3])\r
549 {\r
550 case 0x0: // get current position (MSF format)\r
551 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00);\r
552 Get_Pos_CDD_c20();\r
553 break;\r
554\r
555 case 0x1: // get elapsed time of current track played/scanned (relative MSF format)\r
556 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 1;\r
557 Get_Track_Pos_CDD_c21();\r
558 break;\r
559\r
560 case 0x2: // get current track in RS2-RS3\r
561 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 2;\r
562 Get_Current_Track_CDD_c22();\r
563 break;\r
564\r
565 case 0x3: // get total length (MSF format)\r
566 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 3;\r
567 Get_Total_Lenght_CDD_c23();\r
568 break;\r
569\r
570 case 0x4: // first & last track number\r
571 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 4;\r
572 Get_First_Last_Track_CDD_c24();\r
573 break;\r
574\r
575 case 0x5: // get track addresse (MSF format)\r
576 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 5;\r
577 Get_Track_Adr_CDD_c25();\r
578 break;\r
579\r
580 default : // invalid, then we return status\r
581 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 0xF;\r
582 Get_Status_CDD_c0();\r
583 break;\r
584 }\r
585 break;\r
586\r
587 case 0x3: // READ\r
588 Play_CDD_c3();\r
589 break;\r
590\r
591 case 0x4: // SEEK\r
592 Seek_CDD_c4();\r
593 break;\r
594\r
595 case 0x6: // PAUSE/STOP\r
596 Pause_CDD_c6();\r
597 break;\r
598\r
599 case 0x7: // RESUME\r
600 Resume_CDD_c7();\r
601 break;\r
602\r
603 case 0x8: // FAST FOWARD\r
604 Fast_Foward_CDD_c8();\r
605 break;\r
606\r
607 case 0x9: // FAST REWIND\r
608 Fast_Rewind_CDD_c9();\r
609 break;\r
610\r
611 case 0xA: // RECOVER INITIAL STATE (?)\r
612 CDD_cA();\r
613 break;\r
614\r
615 case 0xC: // CLOSE TRAY\r
616 Close_Tray_CDD_cC();\r
617 break;\r
618\r
619 case 0xD: // OPEN TRAY\r
620 Open_Tray_CDD_cD();\r
621 break;\r
622\r
623 default: // UNKNOWN\r
624 CDD_Def();\r
625 break;\r
626 }\r
627}\r
628\r
fast MegaDrive/MegaCD/32X emulator