| 1 | // (c) Copyright 2007 notaz, All rights reserved. |
| 2 | |
| 3 | |
| 4 | #include "../PicoInt.h" |
| 5 | |
| 6 | |
| 7 | extern unsigned char formatted_bram[4*0x10]; |
| 8 | extern unsigned int s68k_poll_adclk; |
| 9 | |
| 10 | void (*PicoMCDopenTray)(void) = NULL; |
| 11 | int (*PicoMCDcloseTray)(void) = NULL; |
| 12 | |
| 13 | #define dump_ram(ram,fname) \ |
| 14 | { \ |
| 15 | int i, d; \ |
| 16 | FILE *f; \ |
| 17 | \ |
| 18 | for (i = 0; i < sizeof(ram); i+=2) { \ |
| 19 | d = (ram[i]<<8) | ram[i+1]; \ |
| 20 | *(unsigned short *)(ram+i) = d; \ |
| 21 | } \ |
| 22 | f = fopen(fname, "wb"); \ |
| 23 | if (f) { \ |
| 24 | fwrite(ram, 1, sizeof(ram), f); \ |
| 25 | fclose(f); \ |
| 26 | } \ |
| 27 | for (i = 0; i < sizeof(ram); i+=2) { \ |
| 28 | d = (ram[i]<<8) | ram[i+1]; \ |
| 29 | *(unsigned short *)(ram+i) = d; \ |
| 30 | } \ |
| 31 | } |
| 32 | |
| 33 | |
| 34 | PICO_INTERNAL int PicoInitMCD(void) |
| 35 | { |
| 36 | SekInitS68k(); |
| 37 | Init_CD_Driver(); |
| 38 | |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | |
| 43 | PICO_INTERNAL void PicoExitMCD(void) |
| 44 | { |
| 45 | End_CD_Driver(); |
| 46 | |
| 47 | //dump_ram(Pico_mcd->prg_ram, "prg.bin"); |
| 48 | //dump_ram(Pico.ram, "ram.bin"); |
| 49 | } |
| 50 | |
| 51 | PICO_INTERNAL int PicoResetMCD(int hard) |
| 52 | { |
| 53 | if (hard) { |
| 54 | int fmt_size = sizeof(formatted_bram); |
| 55 | memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram)); |
| 56 | memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M)); |
| 57 | memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); |
| 58 | memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); |
| 59 | memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size); |
| 60 | } |
| 61 | memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs)); |
| 62 | memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm)); |
| 63 | memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m)); |
| 64 | |
| 65 | *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6) |
| 66 | Pico_mcd->m.state_flags |= 1; // s68k reset pending |
| 67 | Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset |
| 68 | |
| 69 | Reset_CD(); |
| 70 | LC89510_Reset(); |
| 71 | gfx_cd_reset(); |
| 72 | #ifdef _ASM_CD_MEMORY_C |
| 73 | PicoMemResetCD(1); |
| 74 | //PicoMemResetCDdecode(1); // don't have to call this in 2M mode |
| 75 | #endif |
| 76 | |
| 77 | // use SRam.data for RAM cart |
| 78 | if (SRam.data) free(SRam.data); |
| 79 | SRam.data = NULL; |
| 80 | if (PicoOpt&0x8000) |
| 81 | SRam.data = calloc(1, 0x12000); |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
| 86 | static __inline void SekRunM68k(int cyc) |
| 87 | { |
| 88 | int cyc_do; |
| 89 | SekCycleAim+=cyc; |
| 90 | if((cyc_do=SekCycleAim-SekCycleCnt) < 0) return; |
| 91 | #if defined(EMU_C68K) |
| 92 | PicoCpu.cycles=cyc_do; |
| 93 | CycloneRun(&PicoCpu); |
| 94 | SekCycleCnt+=cyc_do-PicoCpu.cycles; |
| 95 | #elif defined(EMU_M68K) |
| 96 | m68k_set_context(&PicoM68kCPU); |
| 97 | SekCycleCnt+=m68k_execute(cyc_do); |
| 98 | #endif |
| 99 | } |
| 100 | |
| 101 | static __inline void SekRunS68k(int cyc) |
| 102 | { |
| 103 | int cyc_do; |
| 104 | SekCycleAimS68k+=cyc; |
| 105 | if((cyc_do=SekCycleAimS68k-SekCycleCntS68k) < 0) return; |
| 106 | #if defined(EMU_C68K) |
| 107 | PicoCpuS68k.cycles=cyc_do; |
| 108 | CycloneRun(&PicoCpuS68k); |
| 109 | SekCycleCntS68k+=cyc_do-PicoCpuS68k.cycles; |
| 110 | #elif defined(EMU_M68K) |
| 111 | m68k_set_context(&PicoS68kCPU); |
| 112 | SekCycleCntS68k+=m68k_execute(cyc_do); |
| 113 | #endif |
| 114 | } |
| 115 | |
| 116 | #define PS_STEP_M68K ((488<<16)/20) // ~24 |
| 117 | //#define PS_STEP_S68K 13 |
| 118 | |
| 119 | #ifdef _ASM_CD_PICO_C |
| 120 | void SekRunPS(int cyc_m68k, int cyc_s68k); |
| 121 | #else |
| 122 | static __inline void SekRunPS(int cyc_m68k, int cyc_s68k) |
| 123 | { |
| 124 | int cycn, cycn_s68k, cyc_do; |
| 125 | int ex; |
| 126 | SekCycleAim+=cyc_m68k; |
| 127 | SekCycleAimS68k+=cyc_s68k; |
| 128 | |
| 129 | // fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k, |
| 130 | // SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline); |
| 131 | |
| 132 | /* loop 488 downto 0 in steps of PS_STEP */ |
| 133 | for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K) |
| 134 | { |
| 135 | ex = 0; |
| 136 | cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16; |
| 137 | if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) { |
| 138 | #if defined(EMU_C68K) |
| 139 | PicoCpu.cycles = cyc_do; |
| 140 | CycloneRun(&PicoCpu); |
| 141 | SekCycleCnt += cyc_do - PicoCpu.cycles; |
| 142 | #elif defined(EMU_M68K) |
| 143 | m68k_set_context(&PicoM68kCPU); |
| 144 | SekCycleCnt += (ex = m68k_execute(cyc_do)); |
| 145 | #endif |
| 146 | } |
| 147 | if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) { |
| 148 | #if defined(EMU_C68K) |
| 149 | PicoCpuS68k.cycles = cyc_do; |
| 150 | CycloneRun(&PicoCpuS68k); |
| 151 | SekCycleCntS68k += cyc_do - PicoCpuS68k.cycles; |
| 152 | #elif defined(EMU_M68K) |
| 153 | m68k_set_context(&PicoS68kCPU); |
| 154 | SekCycleCntS68k += (ex = m68k_execute(cyc_do)); |
| 155 | #endif |
| 156 | } |
| 157 | } |
| 158 | } |
| 159 | #endif |
| 160 | |
| 161 | |
| 162 | static __inline void check_cd_dma(void) |
| 163 | { |
| 164 | int ddx; |
| 165 | |
| 166 | if (!(Pico_mcd->scd.Status_CDC & 0x08)) return; |
| 167 | |
| 168 | ddx = Pico_mcd->s68k_regs[4] & 7; |
| 169 | if (ddx < 2) return; // invalid |
| 170 | if (ddx < 4) { |
| 171 | Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port |
| 172 | return; |
| 173 | } |
| 174 | if (ddx == 6) return; // invalid |
| 175 | |
| 176 | Update_CDC_TRansfer(ddx); // now go and do the actual transfer |
| 177 | } |
| 178 | |
| 179 | static __inline void update_chips(void) |
| 180 | { |
| 181 | int counter_timer, int3_set; |
| 182 | int counter75hz_lim = Pico.m.pal ? 2080 : 2096; |
| 183 | |
| 184 | // 75Hz CDC update |
| 185 | if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) { |
| 186 | Pico_mcd->m.counter75hz -= counter75hz_lim; |
| 187 | Check_CD_Command(); |
| 188 | } |
| 189 | |
| 190 | // update timers |
| 191 | counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708; |
| 192 | Pico_mcd->m.timer_stopwatch += counter_timer; |
| 193 | if ((int3_set = Pico_mcd->s68k_regs[0x31])) { |
| 194 | Pico_mcd->m.timer_int3 -= counter_timer; |
| 195 | if (Pico_mcd->m.timer_int3 < 0) { |
| 196 | if (Pico_mcd->s68k_regs[0x33] & (1<<3)) { |
| 197 | elprintf(EL_INTS, "s68k: timer irq 3"); |
| 198 | SekInterruptS68k(3); |
| 199 | Pico_mcd->m.timer_int3 += int3_set << 16; |
| 200 | } |
| 201 | // is this really what happens if irq3 is masked out? |
| 202 | Pico_mcd->m.timer_int3 &= 0xffffff; |
| 203 | } |
| 204 | } |
| 205 | |
| 206 | // update gfx chip |
| 207 | if (Pico_mcd->rot_comp.Reg_58 & 0x8000) |
| 208 | gfx_cd_update(); |
| 209 | |
| 210 | // delayed setting of DMNA bit (needed for Silpheed) |
| 211 | if (Pico_mcd->m.state_flags & 2) { |
| 212 | Pico_mcd->m.state_flags &= ~2; |
| 213 | if (!(Pico_mcd->s68k_regs[3] & 4)) { |
| 214 | Pico_mcd->s68k_regs[3] |= 2; |
| 215 | Pico_mcd->s68k_regs[3] &= ~1; |
| 216 | #ifdef USE_POLL_DETECT |
| 217 | if ((s68k_poll_adclk&0xfe) == 2) { |
| 218 | SekSetStopS68k(0); s68k_poll_adclk = 0; |
| 219 | } |
| 220 | #endif |
| 221 | } |
| 222 | } |
| 223 | } |
| 224 | |
| 225 | |
| 226 | static __inline void getSamples(int y) |
| 227 | { |
| 228 | int len = sound_render(0, PsndLen); |
| 229 | if (PicoWriteSound) PicoWriteSound(len); |
| 230 | // clear sound buffer |
| 231 | sound_clear(); |
| 232 | } |
| 233 | |
| 234 | |
| 235 | #define PICO_CD |
| 236 | #include "../PicoFrameHints.c" |
| 237 | |
| 238 | |
| 239 | PICO_INTERNAL int PicoFrameMCD(void) |
| 240 | { |
| 241 | if(!(PicoOpt&0x10)) |
| 242 | PicoFrameStart(); |
| 243 | |
| 244 | PicoFrameHints(); |
| 245 | |
| 246 | return 0; |
| 247 | } |
| 248 | |
| 249 | |