(c) and stuff
[picodrive.git] / Pico / cd / Pico.c
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1// (c) Copyright 2007 notaz, All rights reserved.
2
3
4#include "../PicoInt.h"
5
6
7extern unsigned char formatted_bram[4*0x10];
8extern unsigned int s68k_poll_adclk;
9
10void (*PicoMCDopenTray)(void) = NULL;
11int (*PicoMCDcloseTray)(void) = NULL;
12
13#define dump_ram(ram,fname) \
14{ \
15 int i, d; \
16 FILE *f; \
17\
18 for (i = 0; i < sizeof(ram); i+=2) { \
19 d = (ram[i]<<8) | ram[i+1]; \
20 *(unsigned short *)(ram+i) = d; \
21 } \
22 f = fopen(fname, "wb"); \
23 if (f) { \
24 fwrite(ram, 1, sizeof(ram), f); \
25 fclose(f); \
26 } \
27 for (i = 0; i < sizeof(ram); i+=2) { \
28 d = (ram[i]<<8) | ram[i+1]; \
29 *(unsigned short *)(ram+i) = d; \
30 } \
31}
32
33
34PICO_INTERNAL int PicoInitMCD(void)
35{
36 SekInitS68k();
37 Init_CD_Driver();
38
39 return 0;
40}
41
42
43PICO_INTERNAL void PicoExitMCD(void)
44{
45 End_CD_Driver();
46
47 //dump_ram(Pico_mcd->prg_ram, "prg.bin");
48 //dump_ram(Pico.ram, "ram.bin");
49}
50
51PICO_INTERNAL int PicoResetMCD(int hard)
52{
53 if (hard) {
54 int fmt_size = sizeof(formatted_bram);
55 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
56 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
57 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
58 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
59 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
60 }
61 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
62 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
63 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
64
65 *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
66 Pico_mcd->m.state_flags |= 1; // s68k reset pending
67 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
68
69 Reset_CD();
70 LC89510_Reset();
71 gfx_cd_reset();
72 PicoMemResetCD(1);
73#ifdef _ASM_CD_MEMORY_C
74 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
75#endif
76
77 // use SRam.data for RAM cart
78 if (PicoOpt&0x8000) {
79 if (SRam.data == NULL)
80 SRam.data = calloc(1, 0x12000);
81 }
82 else if (SRam.data != NULL) {
83 free(SRam.data);
84 SRam.data = NULL;
85 }
86 SRam.start = SRam.end = 0; // unused
87
88 return 0;
89}
90
91static __inline void SekRunM68k(int cyc)
92{
93 int cyc_do;
94 SekCycleAim+=cyc;
95 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
96#if defined(EMU_CORE_DEBUG)
97 SekCycleCnt+=CM_compareRun(cyc_do, 0);
98#elif defined(EMU_C68K)
99 PicoCpuCM68k.cycles=cyc_do;
100 CycloneRun(&PicoCpuCM68k);
101 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
102#elif defined(EMU_M68K)
103 m68k_set_context(&PicoCpuMM68k);
104 SekCycleCnt+=m68k_execute(cyc_do);
105#elif defined(EMU_F68K)
106 g_m68kcontext=&PicoCpuFM68k;
107 SekCycleCnt+=fm68k_emulate(cyc_do, 0);
108#endif
109}
110
111static __inline void SekRunS68k(int cyc)
112{
113 int cyc_do;
114 SekCycleAimS68k+=cyc;
115 if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
116#if defined(EMU_CORE_DEBUG)
117 SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
118#elif defined(EMU_C68K)
119 PicoCpuCS68k.cycles=cyc_do;
120 CycloneRun(&PicoCpuCS68k);
121 SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
122#elif defined(EMU_M68K)
123 m68k_set_context(&PicoCpuMS68k);
124 SekCycleCntS68k+=m68k_execute(cyc_do);
125#elif defined(EMU_F68K)
126 g_m68kcontext=&PicoCpuFS68k;
127 SekCycleCntS68k+=fm68k_emulate(cyc_do, 0);
128#endif
129}
130
131#define PS_STEP_M68K ((488<<16)/20) // ~24
132//#define PS_STEP_S68K 13
133
134#if defined(_ASM_CD_PICO_C)
135extern void SekRunPS(int cyc_m68k, int cyc_s68k);
136#elif defined(EMU_F68K)
137static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
138{
139 SekCycleAim+=cyc_m68k;
140 SekCycleAimS68k+=cyc_s68k;
141 fm68k_emulate(0, 1);
142}
143#else
144static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
145{
146 int cycn, cycn_s68k, cyc_do;
147 SekCycleAim+=cyc_m68k;
148 SekCycleAimS68k+=cyc_s68k;
149
150// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
151// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
152
153 /* loop 488 downto 0 in steps of PS_STEP */
154 for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
155 {
156 cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
157 if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
158#if defined(EMU_C68K)
159 PicoCpuCM68k.cycles = cyc_do;
160 CycloneRun(&PicoCpuCM68k);
161 SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
162#elif defined(EMU_M68K)
163 m68k_set_context(&PicoCpuMM68k);
164 SekCycleCnt += m68k_execute(cyc_do);
165#elif defined(EMU_F68K)
166 g_m68kcontext = &PicoCpuFM68k;
167 SekCycleCnt += fm68k_emulate(cyc_do, 0);
168#endif
169 }
170 if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
171#if defined(EMU_C68K)
172 PicoCpuCS68k.cycles = cyc_do;
173 CycloneRun(&PicoCpuCS68k);
174 SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
175#elif defined(EMU_M68K)
176 m68k_set_context(&PicoCpuMS68k);
177 SekCycleCntS68k += m68k_execute(cyc_do);
178#elif defined(EMU_F68K)
179 g_m68kcontext = &PicoCpuFS68k;
180 SekCycleCntS68k += fm68k_emulate(cyc_do, 0);
181#endif
182 }
183 }
184}
185#endif
186
187
188static __inline void check_cd_dma(void)
189{
190 int ddx;
191
192 if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
193
194 ddx = Pico_mcd->s68k_regs[4] & 7;
195 if (ddx < 2) return; // invalid
196 if (ddx < 4) {
197 Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
198 return;
199 }
200 if (ddx == 6) return; // invalid
201
202 Update_CDC_TRansfer(ddx); // now go and do the actual transfer
203}
204
205static __inline void update_chips(void)
206{
207 int counter_timer, int3_set;
208 int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
209
210 // 75Hz CDC update
211 if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
212 Pico_mcd->m.counter75hz -= counter75hz_lim;
213 Check_CD_Command();
214 }
215
216 // update timers
217 counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
218 Pico_mcd->m.timer_stopwatch += counter_timer;
219 if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
220 Pico_mcd->m.timer_int3 -= counter_timer;
221 if (Pico_mcd->m.timer_int3 < 0) {
222 if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
223 elprintf(EL_INTS, "s68k: timer irq 3");
224 SekInterruptS68k(3);
225 Pico_mcd->m.timer_int3 += int3_set << 16;
226 }
227 // is this really what happens if irq3 is masked out?
228 Pico_mcd->m.timer_int3 &= 0xffffff;
229 }
230 }
231
232 // update gfx chip
233 if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
234 gfx_cd_update();
235
236 // delayed setting of DMNA bit (needed for Silpheed)
237 if (Pico_mcd->m.state_flags & 2) {
238 Pico_mcd->m.state_flags &= ~2;
239 if (!(Pico_mcd->s68k_regs[3] & 4)) {
240 Pico_mcd->s68k_regs[3] |= 2;
241 Pico_mcd->s68k_regs[3] &= ~1;
242#ifdef USE_POLL_DETECT
243 if ((s68k_poll_adclk&0xfe) == 2) {
244 SekSetStopS68k(0); s68k_poll_adclk = 0;
245 }
246#endif
247 }
248 }
249}
250
251
252static __inline void getSamples(int y)
253{
254 int len = PsndRender(0, PsndLen);
255 if (PicoWriteSound) PicoWriteSound(len);
256 // clear sound buffer
257 PsndClear();
258}
259
260
261#define PICO_CD
262#include "../PicoFrameHints.c"
263
264
265PICO_INTERNAL int PicoFrameMCD(void)
266{
267 if(!(PicoOpt&0x10))
268 PicoFrameStart();
269
270 PicoFrameHints();
271
272 return 0;
273}
274
275