| 1 | /*\r |
| 2 | header file for software emulation for FM sound generator\r |
| 3 | \r |
| 4 | */\r |
| 5 | #ifndef _H_FM_FM_\r |
| 6 | #define _H_FM_FM_\r |
| 7 | \r |
| 8 | /* compiler dependence */\r |
| 9 | #ifndef UINT8\r |
| 10 | typedef unsigned char UINT8; /* unsigned 8bit */\r |
| 11 | typedef unsigned short UINT16; /* unsigned 16bit */\r |
| 12 | typedef unsigned int UINT32; /* unsigned 32bit */\r |
| 13 | #endif\r |
| 14 | #ifndef INT8\r |
| 15 | typedef signed char INT8; /* signed 8bit */\r |
| 16 | typedef signed short INT16; /* signed 16bit */\r |
| 17 | typedef signed int INT32; /* signed 32bit */\r |
| 18 | #endif\r |
| 19 | \r |
| 20 | #if 1\r |
| 21 | /* struct describing a single operator (SLOT) */\r |
| 22 | typedef struct\r |
| 23 | {\r |
| 24 | INT32 *DT; /* #0x00 detune :dt_tab[DT] */\r |
| 25 | UINT8 ar; /* #0x04 attack rate */\r |
| 26 | UINT8 d1r; /* #0x05 decay rate */\r |
| 27 | UINT8 d2r; /* #0x06 sustain rate */\r |
| 28 | UINT8 rr; /* #0x07 release rate */\r |
| 29 | UINT32 mul; /* #0x08 multiple :ML_TABLE[ML] */\r |
| 30 | \r |
| 31 | /* Phase Generator */\r |
| 32 | UINT32 phase; /* #0x0c phase counter */\r |
| 33 | UINT32 Incr; /* #0x10 phase step */\r |
| 34 | \r |
| 35 | UINT8 KSR; /* #0x14 key scale rate :3-KSR */\r |
| 36 | UINT8 ksr; /* #0x15 key scale rate :kcode>>(3-KSR) */\r |
| 37 | \r |
| 38 | UINT8 key; /* #0x16 0=last key was KEY OFF, 1=KEY ON */\r |
| 39 | \r |
| 40 | /* Envelope Generator */\r |
| 41 | UINT8 state; /* #0x17 phase type: EG_OFF=0, EG_REL, EG_SUS, EG_DEC, EG_ATT */\r |
| 42 | UINT16 tl; /* #0x18 total level: TL << 3 */\r |
| 43 | INT16 volume; /* #0x1a envelope counter */\r |
| 44 | UINT32 sl; /* #0x1c sustain level:sl_table[SL] */\r |
| 45 | \r |
| 46 | UINT32 eg_pack_ar; /* #0x20 (attack state) */\r |
| 47 | UINT32 eg_pack_d1r; /* #0x24 (decay state) */\r |
| 48 | UINT32 eg_pack_d2r; /* #0x28 (sustain state) */\r |
| 49 | UINT32 eg_pack_rr; /* #0x2c (release state) */\r |
| 50 | } FM_SLOT;\r |
| 51 | \r |
| 52 | \r |
| 53 | typedef struct\r |
| 54 | {\r |
| 55 | FM_SLOT SLOT[4]; /* four SLOTs (operators) */\r |
| 56 | \r |
| 57 | UINT8 ALGO; /* algorithm */\r |
| 58 | UINT8 FB; /* feedback shift */\r |
| 59 | INT32 op1_out; /* op1 output for feedback */\r |
| 60 | \r |
| 61 | INT32 mem_value; /* delayed sample (MEM) value */\r |
| 62 | \r |
| 63 | INT32 pms; /* channel PMS */\r |
| 64 | UINT8 ams; /* channel AMS */\r |
| 65 | \r |
| 66 | UINT8 kcode; /* key code: */\r |
| 67 | UINT32 fc; /* fnum,blk:adjusted to sample rate */\r |
| 68 | UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r |
| 69 | \r |
| 70 | /* LFO */\r |
| 71 | UINT8 AMmasks; /* AM enable flag */\r |
| 72 | \r |
| 73 | } FM_CH;\r |
| 74 | \r |
| 75 | typedef struct\r |
| 76 | {\r |
| 77 | int clock; /* master clock (Hz) */\r |
| 78 | int rate; /* sampling rate (Hz) */\r |
| 79 | double freqbase; /* frequency base */\r |
| 80 | UINT8 address; /* address register */\r |
| 81 | UINT8 status; /* status flag */\r |
| 82 | UINT8 mode; /* mode CSM / 3SLOT */\r |
| 83 | UINT8 fn_h; /* freq latch */\r |
| 84 | int TA; /* timer a */\r |
| 85 | int TAC; /* timer a maxval */\r |
| 86 | int TAT; /* timer a ticker */\r |
| 87 | UINT8 TB; /* timer b */\r |
| 88 | int TBC; /* timer b maxval */\r |
| 89 | int TBT; /* timer b ticker */\r |
| 90 | /* local time tables */\r |
| 91 | INT32 dt_tab[8][32];/* DeTune table */\r |
| 92 | } FM_ST;\r |
| 93 | \r |
| 94 | /***********************************************************/\r |
| 95 | /* OPN unit */\r |
| 96 | /***********************************************************/\r |
| 97 | \r |
| 98 | /* OPN 3slot struct */\r |
| 99 | typedef struct\r |
| 100 | {\r |
| 101 | UINT32 fc[3]; /* fnum3,blk3: calculated */\r |
| 102 | UINT8 fn_h; /* freq3 latch */\r |
| 103 | UINT8 kcode[3]; /* key code */\r |
| 104 | UINT32 block_fnum[3]; /* current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r |
| 105 | } FM_3SLOT;\r |
| 106 | \r |
| 107 | /* OPN/A/B common state */\r |
| 108 | typedef struct\r |
| 109 | {\r |
| 110 | FM_ST ST; /* general state */\r |
| 111 | FM_3SLOT SL3; /* 3 slot mode state */\r |
| 112 | UINT32 pan; /* fm channels output mask (bit 1 = enable) */\r |
| 113 | \r |
| 114 | UINT32 eg_cnt; /* #0xb38 global envelope generator counter */\r |
| 115 | UINT32 eg_timer; /* #0xb3c global envelope generator counter works at frequency = chipclock/64/3 */\r |
| 116 | UINT32 eg_timer_add; /* #0xb40 step of eg_timer */\r |
| 117 | \r |
| 118 | /* LFO */\r |
| 119 | UINT32 lfo_cnt;\r |
| 120 | UINT32 lfo_inc;\r |
| 121 | \r |
| 122 | UINT32 lfo_freq[8]; /* LFO FREQ table */\r |
| 123 | } FM_OPN;\r |
| 124 | \r |
| 125 | /* here's the virtual YM2612 */\r |
| 126 | typedef struct\r |
| 127 | {\r |
| 128 | UINT8 REGS[0x200]; /* registers (for save states) */\r |
| 129 | INT32 addr_A1; /* address line A1 */\r |
| 130 | \r |
| 131 | FM_CH CH[6]; /* channel state (0x168 bytes each)? */\r |
| 132 | \r |
| 133 | /* dac output (YM2612) */\r |
| 134 | int dacen;\r |
| 135 | INT32 dacout;\r |
| 136 | \r |
| 137 | FM_OPN OPN; /* OPN state */\r |
| 138 | } YM2612;\r |
| 139 | #endif\r |
| 140 | \r |
| 141 | \r |
| 142 | \r |
| 143 | void YM2612Init_(int baseclock, int rate);\r |
| 144 | void YM2612ResetChip_(void);\r |
| 145 | int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty);\r |
| 146 | \r |
| 147 | int YM2612Write_(unsigned int a, unsigned int v);\r |
| 148 | unsigned char YM2612Read_(void);\r |
| 149 | \r |
| 150 | int YM2612PicoTick_(int n);\r |
| 151 | void YM2612PicoStateLoad_(void);\r |
| 152 | \r |
| 153 | void *YM2612GetRegs(void);\r |
| 154 | \r |
| 155 | #ifndef __GP2X__\r |
| 156 | #define YM2612Init YM2612Init_\r |
| 157 | #define YM2612ResetChip YM2612ResetChip_\r |
| 158 | #define YM2612UpdateOne YM2612UpdateOne_\r |
| 159 | #define YM2612Write YM2612Write_\r |
| 160 | #define YM2612Read YM2612Read_\r |
| 161 | #define YM2612PicoTick YM2612PicoTick_\r |
| 162 | #define YM2612PicoStateLoad YM2612PicoStateLoad_\r |
| 163 | #else\r |
| 164 | /* GP2X specific */\r |
| 165 | #include "../../platform/gp2x/940ctl.h"\r |
| 166 | extern int PicoOpt;\r |
| 167 | #define YM2612Init(baseclock,rate) { \\r |
| 168 | if (PicoOpt&0x200) YM2612Init_940(baseclock, rate); \\r |
| 169 | else YM2612Init_(baseclock, rate); \\r |
| 170 | }\r |
| 171 | #define YM2612ResetChip() { \\r |
| 172 | if (PicoOpt&0x200) YM2612ResetChip_940(); \\r |
| 173 | else YM2612ResetChip_(); \\r |
| 174 | }\r |
| 175 | #define YM2612UpdateOne(buffer,length,stereo,is_buf_empty) \\r |
| 176 | (PicoOpt&0x200) ? YM2612UpdateOne_940(buffer, length, stereo, is_buf_empty) : \\r |
| 177 | YM2612UpdateOne_(buffer, length, stereo, is_buf_empty);\r |
| 178 | #define YM2612Write(a,v) \\r |
| 179 | (PicoOpt&0x200) ? YM2612Write_940(a, v) : YM2612Write_(a, v)\r |
| 180 | #define YM2612Read() \\r |
| 181 | (PicoOpt&0x200) ? YM2612Read_940() : YM2612Read_()\r |
| 182 | #define YM2612PicoTick(n) \\r |
| 183 | (PicoOpt&0x200) ? YM2612PicoTick_940(n) : YM2612PicoTick_(n)\r |
| 184 | #define YM2612PicoStateLoad() { \\r |
| 185 | if (PicoOpt&0x200) YM2612PicoStateLoad_940(); \\r |
| 186 | else YM2612PicoStateLoad_(); \\r |
| 187 | }\r |
| 188 | #endif /* __GP2X__ */\r |
| 189 | \r |
| 190 | \r |
| 191 | #endif /* _H_FM_FM_ */\r |