| 1 | // This is part of Pico Library\r |
| 2 | \r |
| 3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
| 4 | // (c) Copyright 2007 notaz, All rights reserved.\r |
| 5 | // Free for non-commercial use.\r |
| 6 | \r |
| 7 | // For commercial use, separate licencing terms must be obtained.\r |
| 8 | \r |
| 9 | // A68K no longer supported here\r |
| 10 | \r |
| 11 | //#define __debug_io\r |
| 12 | \r |
| 13 | #include "../PicoInt.h"\r |
| 14 | \r |
| 15 | #include "../sound/sound.h"\r |
| 16 | #include "../sound/ym2612.h"\r |
| 17 | #include "../sound/sn76496.h"\r |
| 18 | \r |
| 19 | #include "gfx_cd.h"\r |
| 20 | #include "pcm.h"\r |
| 21 | \r |
| 22 | typedef unsigned char u8;\r |
| 23 | typedef unsigned short u16;\r |
| 24 | typedef unsigned int u32;\r |
| 25 | \r |
| 26 | //#define __debug_io\r |
| 27 | //#define __debug_io2\r |
| 28 | //#define rdprintf dprintf\r |
| 29 | #define rdprintf(...)\r |
| 30 | \r |
| 31 | // -----------------------------------------------------------------\r |
| 32 | \r |
| 33 | \r |
| 34 | static u32 m68k_reg_read16(u32 a)\r |
| 35 | {\r |
| 36 | u32 d=0;\r |
| 37 | a &= 0x3e;\r |
| 38 | // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r |
| 39 | \r |
| 40 | switch (a) {\r |
| 41 | case 0:\r |
| 42 | d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r |
| 43 | goto end;\r |
| 44 | case 2:\r |
| 45 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r |
| 46 | dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r |
| 47 | goto end;\r |
| 48 | case 4:\r |
| 49 | d = Pico_mcd->s68k_regs[4]<<8;\r |
| 50 | goto end;\r |
| 51 | case 6:\r |
| 52 | d = Pico_mcd->m.hint_vector;\r |
| 53 | goto end;\r |
| 54 | case 8:\r |
| 55 | d = Read_CDC_Host(0);\r |
| 56 | goto end;\r |
| 57 | case 0xA:\r |
| 58 | dprintf("m68k reserved read");\r |
| 59 | goto end;\r |
| 60 | case 0xC:\r |
| 61 | dprintf("m68k stopwatch timer read");\r |
| 62 | d = Pico_mcd->m.timer_stopwatch >> 16;\r |
| 63 | goto end;\r |
| 64 | }\r |
| 65 | \r |
| 66 | if (a < 0x30) {\r |
| 67 | // comm flag/cmd/status (0xE-0x2F)\r |
| 68 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
| 69 | goto end;\r |
| 70 | }\r |
| 71 | \r |
| 72 | dprintf("m68k_regs invalid read @ %02x", a);\r |
| 73 | \r |
| 74 | end:\r |
| 75 | \r |
| 76 | // dprintf("ret = %04x", d);\r |
| 77 | return d;\r |
| 78 | }\r |
| 79 | \r |
| 80 | static void m68k_reg_write8(u32 a, u32 d)\r |
| 81 | {\r |
| 82 | a &= 0x3f;\r |
| 83 | // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r |
| 84 | \r |
| 85 | switch (a) {\r |
| 86 | case 0:\r |
| 87 | d &= 1;\r |
| 88 | if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }\r |
| 89 | return;\r |
| 90 | case 1:\r |
| 91 | d &= 3;\r |
| 92 | if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r |
| 93 | if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));\r |
| 94 | if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);\r |
| 95 | if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r |
| 96 | SekResetS68k(); // S68k comes out of RESET or BRQ state\r |
| 97 | Pico_mcd->m.state_flags&=~1;\r |
| 98 | dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r |
| 99 | }\r |
| 100 | Pico_mcd->m.busreq = d;\r |
| 101 | return;\r |
| 102 | case 2:\r |
| 103 | Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r |
| 104 | return;\r |
| 105 | case 3:\r |
| 106 | dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
| 107 | d &= 0xc2;\r |
| 108 | if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))\r |
| 109 | dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r |
| 110 | //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r |
| 111 | //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r |
| 112 | // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r |
| 113 | d |= Pico_mcd->s68k_regs[3]&0x1d;\r |
| 114 | if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode\r |
| 115 | Pico_mcd->s68k_regs[3] = d; // really use s68k side register\r |
| 116 | return;\r |
| 117 | case 6:\r |
| 118 | *((char *)&Pico_mcd->m.hint_vector+1) = d;\r |
| 119 | Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r |
| 120 | return;\r |
| 121 | case 7:\r |
| 122 | *(char *)&Pico_mcd->m.hint_vector = d;\r |
| 123 | Pico_mcd->bios[0x72] = d;\r |
| 124 | return;\r |
| 125 | case 0xe:\r |
| 126 | //dprintf("m68k: comm flag: %02x", d);\r |
| 127 | Pico_mcd->s68k_regs[0xe] = d;\r |
| 128 | return;\r |
| 129 | }\r |
| 130 | \r |
| 131 | if ((a&0xf0) == 0x10) {\r |
| 132 | Pico_mcd->s68k_regs[a] = d;\r |
| 133 | return;\r |
| 134 | }\r |
| 135 | \r |
| 136 | dprintf("m68k: invalid write? [%02x] %02x", a, d);\r |
| 137 | }\r |
| 138 | \r |
| 139 | \r |
| 140 | \r |
| 141 | static u32 s68k_reg_read16(u32 a)\r |
| 142 | {\r |
| 143 | u32 d=0;\r |
| 144 | \r |
| 145 | // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r |
| 146 | \r |
| 147 | switch (a) {\r |
| 148 | case 0:\r |
| 149 | d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r |
| 150 | goto end;\r |
| 151 | case 2:\r |
| 152 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);\r |
| 153 | dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);\r |
| 154 | goto end;\r |
| 155 | case 6:\r |
| 156 | d = CDC_Read_Reg();\r |
| 157 | goto end;\r |
| 158 | case 8:\r |
| 159 | d = Read_CDC_Host(1); // Gens returns 0 here on byte reads\r |
| 160 | goto end;\r |
| 161 | case 0xC:\r |
| 162 | dprintf("s68k stopwatch timer read");\r |
| 163 | d = Pico_mcd->m.timer_stopwatch >> 16;\r |
| 164 | goto end;\r |
| 165 | case 0x30:\r |
| 166 | dprintf("s68k int3 timer read");\r |
| 167 | break;\r |
| 168 | case 0x34: // fader\r |
| 169 | d = 0; // no busy bit\r |
| 170 | goto end;\r |
| 171 | }\r |
| 172 | \r |
| 173 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
| 174 | \r |
| 175 | end:\r |
| 176 | \r |
| 177 | // dprintf("ret = %04x", d);\r |
| 178 | \r |
| 179 | return d;\r |
| 180 | }\r |
| 181 | \r |
| 182 | static void s68k_reg_write8(u32 a, u32 d)\r |
| 183 | {\r |
| 184 | //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r |
| 185 | \r |
| 186 | // TODO: review against Gens\r |
| 187 | switch (a) {\r |
| 188 | case 2:\r |
| 189 | return; // only m68k can change WP\r |
| 190 | case 3:\r |
| 191 | dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
| 192 | d &= 0x1d;\r |
| 193 | if (d&4) {\r |
| 194 | d |= Pico_mcd->s68k_regs[3]&0xc2;\r |
| 195 | if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r |
| 196 | } else {\r |
| 197 | d |= Pico_mcd->s68k_regs[3]&0xc3;\r |
| 198 | if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r |
| 199 | }\r |
| 200 | break;\r |
| 201 | case 4:\r |
| 202 | dprintf("s68k CDC dest: %x", d&7);\r |
| 203 | Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r |
| 204 | return;\r |
| 205 | case 5:\r |
| 206 | //dprintf("s68k CDC reg addr: %x", d&0xf);\r |
| 207 | break;\r |
| 208 | case 7:\r |
| 209 | CDC_Write_Reg(d);\r |
| 210 | return;\r |
| 211 | case 0xa:\r |
| 212 | dprintf("s68k set CDC dma addr");\r |
| 213 | break;\r |
| 214 | case 0xc:\r |
| 215 | case 0xd:\r |
| 216 | dprintf("s68k set stopwatch timer");\r |
| 217 | Pico_mcd->m.timer_stopwatch = 0;\r |
| 218 | return;\r |
| 219 | case 0xe:\r |
| 220 | Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair\r |
| 221 | Pico_mcd->m.timer_stopwatch = 0;\r |
| 222 | return;\r |
| 223 | case 0x31:\r |
| 224 | dprintf("s68k set int3 timer: %02x", d);\r |
| 225 | Pico_mcd->m.timer_int3 = d << 16;\r |
| 226 | break;\r |
| 227 | case 0x33: // IRQ mask\r |
| 228 | dprintf("s68k irq mask: %02x", d);\r |
| 229 | if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r |
| 230 | CDD_Export_Status();\r |
| 231 | }\r |
| 232 | break;\r |
| 233 | case 0x34: // fader\r |
| 234 | Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r |
| 235 | return;\r |
| 236 | case 0x36:\r |
| 237 | return; // d/m bit is unsetable\r |
| 238 | case 0x37: {\r |
| 239 | u32 d_old = Pico_mcd->s68k_regs[0x37];\r |
| 240 | Pico_mcd->s68k_regs[0x37] = d&7;\r |
| 241 | if ((d&4) && !(d_old&4)) {\r |
| 242 | CDD_Export_Status();\r |
| 243 | }\r |
| 244 | return;\r |
| 245 | }\r |
| 246 | case 0x4b:\r |
| 247 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
| 248 | CDD_Import_Command();\r |
| 249 | return;\r |
| 250 | }\r |
| 251 | \r |
| 252 | if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r |
| 253 | {\r |
| 254 | dprintf("s68k: invalid write @ %02x?", a);\r |
| 255 | return;\r |
| 256 | }\r |
| 257 | \r |
| 258 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
| 259 | }\r |
| 260 | \r |
| 261 | \r |
| 262 | \r |
| 263 | \r |
| 264 | \r |
| 265 | static int PadRead(int i)\r |
| 266 | {\r |
| 267 | int pad=0,value=0,TH;\r |
| 268 | pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r |
| 269 | TH=Pico.ioports[i+1]&0x40;\r |
| 270 | \r |
| 271 | if(PicoOpt & 0x20) { // 6 button gamepad enabled\r |
| 272 | int phase = Pico.m.padTHPhase[i];\r |
| 273 | \r |
| 274 | if(phase == 2 && !TH) {\r |
| 275 | value=(pad&0xc0)>>2; // ?0SA 0000\r |
| 276 | goto end;\r |
| 277 | } else if(phase == 3 && TH) {\r |
| 278 | value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r |
| 279 | goto end;\r |
| 280 | } else if(phase == 3 && !TH) {\r |
| 281 | value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r |
| 282 | goto end;\r |
| 283 | }\r |
| 284 | }\r |
| 285 | \r |
| 286 | if(TH) value=(pad&0x3f); // ?1CB RLDU\r |
| 287 | else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r |
| 288 | \r |
| 289 | end:\r |
| 290 | \r |
| 291 | // orr the bits, which are set as output\r |
| 292 | value |= Pico.ioports[i+1]&Pico.ioports[i+4];\r |
| 293 | \r |
| 294 | return value; // will mirror later\r |
| 295 | }\r |
| 296 | \r |
| 297 | static u8 z80Read8(u32 a)\r |
| 298 | {\r |
| 299 | if(Pico.m.z80Run&1) return 0;\r |
| 300 | \r |
| 301 | a&=0x1fff;\r |
| 302 | \r |
| 303 | if(!(PicoOpt&4)) {\r |
| 304 | // Z80 disabled, do some faking\r |
| 305 | static u8 zerosent = 0;\r |
| 306 | if(a == Pico.m.z80_lastaddr) { // probably polling something\r |
| 307 | u8 d = Pico.m.z80_fakeval;\r |
| 308 | if((d & 0xf) == 0xf && !zerosent) {\r |
| 309 | d = 0; zerosent = 1;\r |
| 310 | } else {\r |
| 311 | Pico.m.z80_fakeval++;\r |
| 312 | zerosent = 0;\r |
| 313 | }\r |
| 314 | return d;\r |
| 315 | } else {\r |
| 316 | Pico.m.z80_fakeval = 0;\r |
| 317 | }\r |
| 318 | }\r |
| 319 | \r |
| 320 | Pico.m.z80_lastaddr = (u16) a;\r |
| 321 | return Pico.zram[a];\r |
| 322 | }\r |
| 323 | \r |
| 324 | \r |
| 325 | // for nonstandard reads\r |
| 326 | static u32 UnusualRead16(u32 a, int realsize)\r |
| 327 | {\r |
| 328 | u32 d=0;\r |
| 329 | \r |
| 330 | dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r |
| 331 | \r |
| 332 | \r |
| 333 | dprintf("ret = %04x", d);\r |
| 334 | return d;\r |
| 335 | }\r |
| 336 | \r |
| 337 | static u32 OtherRead16(u32 a, int realsize)\r |
| 338 | {\r |
| 339 | u32 d=0;\r |
| 340 | \r |
| 341 | if ((a&0xff0000)==0xa00000) {\r |
| 342 | if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)\r |
| 343 | if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled\r |
| 344 | d=0xffff; goto end;\r |
| 345 | }\r |
| 346 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
| 347 | a=(a>>1)&0xf;\r |
| 348 | switch(a) {\r |
| 349 | case 0: d=Pico.m.hardware; break; // Hardware value (Version register)\r |
| 350 | case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;\r |
| 351 | case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;\r |
| 352 | default: d=Pico.ioports[a]; break; // IO ports can be used as RAM\r |
| 353 | }\r |
| 354 | d|=d<<8;\r |
| 355 | goto end;\r |
| 356 | }\r |
| 357 | // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers\r |
| 358 | if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }\r |
| 359 | \r |
| 360 | if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }\r |
| 361 | \r |
| 362 | if ((a&0xffffc0)==0xa12000) {\r |
| 363 | d=m68k_reg_read16(a);\r |
| 364 | goto end;\r |
| 365 | }\r |
| 366 | \r |
| 367 | d = UnusualRead16(a, realsize);\r |
| 368 | \r |
| 369 | end:\r |
| 370 | return d;\r |
| 371 | }\r |
| 372 | \r |
| 373 | //extern UINT32 mz80GetRegisterValue(void *, UINT32);\r |
| 374 | \r |
| 375 | static void OtherWrite8(u32 a,u32 d,int realsize)\r |
| 376 | {\r |
| 377 | if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound\r |
| 378 | if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram\r |
| 379 | if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound\r |
| 380 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
| 381 | a=(a>>1)&0xf;\r |
| 382 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
| 383 | if(PicoOpt&0x20) {\r |
| 384 | if(a==1) {\r |
| 385 | Pico.m.padDelay[0] = 0;\r |
| 386 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r |
| 387 | }\r |
| 388 | else if(a==2) {\r |
| 389 | Pico.m.padDelay[1] = 0;\r |
| 390 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r |
| 391 | }\r |
| 392 | }\r |
| 393 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r |
| 394 | return;\r |
| 395 | }\r |
| 396 | if (a==0xa11100) {\r |
| 397 | extern int z80startCycle, z80stopCycle;\r |
| 398 | //int lineCycles=(488-SekCyclesLeft)&0x1ff;\r |
| 399 | d&=1; d^=1;\r |
| 400 | if(!d) {\r |
| 401 | // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)\r |
| 402 | if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);\r |
| 403 | z80stopCycle = SekCyclesDone();\r |
| 404 | //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()\r |
| 405 | } else {\r |
| 406 | z80startCycle = SekCyclesDone();\r |
| 407 | //if(Pico.m.scanline != -1)\r |
| 408 | //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;\r |
| 409 | }\r |
| 410 | //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);\r |
| 411 | Pico.m.z80Run=(u8)d; return;\r |
| 412 | }\r |
| 413 | if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }\r |
| 414 | \r |
| 415 | if ((a&0xff7f00)==0xa06000) // Z80 BANK register\r |
| 416 | {\r |
| 417 | Pico.m.z80_bank68k>>=1;\r |
| 418 | Pico.m.z80_bank68k|=(d&1)<<8;\r |
| 419 | Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r |
| 420 | return;\r |
| 421 | }\r |
| 422 | \r |
| 423 | if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored\r |
| 424 | \r |
| 425 | if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r |
| 426 | \r |
| 427 | dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r |
| 428 | }\r |
| 429 | \r |
| 430 | static void OtherWrite16(u32 a,u32 d)\r |
| 431 | {\r |
| 432 | if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }\r |
| 433 | if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)\r |
| 434 | \r |
| 435 | if ((a&0xffffe0)==0xa10000) { // I/O ports\r |
| 436 | a=(a>>1)&0xf;\r |
| 437 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
| 438 | if(PicoOpt&0x20) {\r |
| 439 | if(a==1) {\r |
| 440 | Pico.m.padDelay[0] = 0;\r |
| 441 | if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;\r |
| 442 | }\r |
| 443 | else if(a==2) {\r |
| 444 | Pico.m.padDelay[1] = 0;\r |
| 445 | if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;\r |
| 446 | }\r |
| 447 | }\r |
| 448 | Pico.ioports[a]=(u8)d; // IO ports can be used as RAM\r |
| 449 | return;\r |
| 450 | }\r |
| 451 | if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }\r |
| 452 | if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }\r |
| 453 | \r |
| 454 | OtherWrite8(a, d>>8, 16);\r |
| 455 | OtherWrite8(a+1,d&0xff, 16);\r |
| 456 | }\r |
| 457 | \r |
| 458 | // -----------------------------------------------------------------\r |
| 459 | // Read Rom and read Ram\r |
| 460 | \r |
| 461 | u8 PicoReadM68k8(u32 a)\r |
| 462 | {\r |
| 463 | u32 d=0;\r |
| 464 | \r |
| 465 | if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r |
| 466 | \r |
| 467 | a&=0xffffff;\r |
| 468 | \r |
| 469 | if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios\r |
| 470 | \r |
| 471 | // prg RAM\r |
| 472 | if ((a&0xfe0000)==0x020000) {\r |
| 473 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
| 474 | d = *(prg_bank+((a^1)&0x1ffff));\r |
| 475 | goto end;\r |
| 476 | }\r |
| 477 | \r |
| 478 | #if 0\r |
| 479 | if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)\r |
| 480 | {\r |
| 481 | int i;\r |
| 482 | FILE *ff;\r |
| 483 | unsigned short *ram = (unsigned short *) Pico.ram;\r |
| 484 | // unswap and dump RAM\r |
| 485 | for (i = 0; i < 0x10000/2; i++)\r |
| 486 | ram[i] = (ram[i]>>8) | (ram[i]<<8);\r |
| 487 | ff = fopen("ram.bin", "wb");\r |
| 488 | fwrite(ram, 1, 0x10000, ff);\r |
| 489 | fclose(ff);\r |
| 490 | exit(0);\r |
| 491 | }\r |
| 492 | #endif\r |
| 493 | \r |
| 494 | // word RAM\r |
| 495 | if ((a&0xfc0000)==0x200000) {\r |
| 496 | dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r |
| 497 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 498 | if (a >= 0x220000) {\r |
| 499 | dprintf("cell");\r |
| 500 | } else {\r |
| 501 | a=((a&0x1fffe)<<1)|(a&1);\r |
| 502 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
| 503 | d = Pico_mcd->word_ram[a^1];\r |
| 504 | }\r |
| 505 | } else {\r |
| 506 | // allow access in any mode, like Gens does\r |
| 507 | d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r |
| 508 | }\r |
| 509 | dprintf("ret = %02x", (u8)d);\r |
| 510 | goto end;\r |
| 511 | }\r |
| 512 | \r |
| 513 | if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r |
| 514 | \r |
| 515 | if ((a&0xffffc0)==0xa12000)\r |
| 516 | rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r |
| 517 | \r |
| 518 | d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r |
| 519 | \r |
| 520 | if ((a&0xffffc0)==0xa12000)\r |
| 521 | rdprintf("ret = %02x", (u8)d);\r |
| 522 | \r |
| 523 | end:\r |
| 524 | \r |
| 525 | #ifdef __debug_io\r |
| 526 | dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r |
| 527 | #endif\r |
| 528 | return (u8)d;\r |
| 529 | }\r |
| 530 | \r |
| 531 | \r |
| 532 | u16 PicoReadM68k16(u32 a)\r |
| 533 | {\r |
| 534 | u16 d=0;\r |
| 535 | \r |
| 536 | if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r |
| 537 | \r |
| 538 | a&=0xfffffe;\r |
| 539 | \r |
| 540 | if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios\r |
| 541 | \r |
| 542 | // prg RAM\r |
| 543 | if ((a&0xfe0000)==0x020000) {\r |
| 544 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
| 545 | d = *(u16 *)(prg_bank+(a&0x1fffe));\r |
| 546 | goto end;\r |
| 547 | }\r |
| 548 | \r |
| 549 | // word RAM\r |
| 550 | if ((a&0xfc0000)==0x200000) {\r |
| 551 | dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r |
| 552 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 553 | if (a >= 0x220000) {\r |
| 554 | dprintf("cell");\r |
| 555 | } else {\r |
| 556 | a=((a&0x1fffe)<<1);\r |
| 557 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
| 558 | d = *(u16 *)(Pico_mcd->word_ram+a);\r |
| 559 | }\r |
| 560 | } else {\r |
| 561 | // allow access in any mode, like Gens does\r |
| 562 | d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
| 563 | }\r |
| 564 | dprintf("ret = %04x", d);\r |
| 565 | goto end;\r |
| 566 | }\r |
| 567 | \r |
| 568 | if ((a&0xffffc0)==0xa12000)\r |
| 569 | rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r |
| 570 | \r |
| 571 | d = (u16)OtherRead16(a, 16);\r |
| 572 | \r |
| 573 | if ((a&0xffffc0)==0xa12000)\r |
| 574 | rdprintf("ret = %04x", d);\r |
| 575 | \r |
| 576 | end:\r |
| 577 | \r |
| 578 | #ifdef __debug_io\r |
| 579 | dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
| 580 | #endif\r |
| 581 | return d;\r |
| 582 | }\r |
| 583 | \r |
| 584 | \r |
| 585 | u32 PicoReadM68k32(u32 a)\r |
| 586 | {\r |
| 587 | u32 d=0;\r |
| 588 | \r |
| 589 | if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r |
| 590 | \r |
| 591 | a&=0xfffffe;\r |
| 592 | \r |
| 593 | if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios\r |
| 594 | \r |
| 595 | // prg RAM\r |
| 596 | if ((a&0xfe0000)==0x020000) {\r |
| 597 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
| 598 | u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r |
| 599 | d = (pm[0]<<16)|pm[1];\r |
| 600 | goto end;\r |
| 601 | }\r |
| 602 | \r |
| 603 | // word RAM\r |
| 604 | if ((a&0xfc0000)==0x200000) {\r |
| 605 | dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r |
| 606 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 607 | if (a >= 0x220000) {\r |
| 608 | dprintf("cell");\r |
| 609 | } else {\r |
| 610 | a=((a&0x1fffe)<<1);\r |
| 611 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
| 612 | d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r |
| 613 | d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r |
| 614 | }\r |
| 615 | } else {\r |
| 616 | // allow access in any mode, like Gens does\r |
| 617 | u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r |
| 618 | }\r |
| 619 | dprintf("ret = %08x", d);\r |
| 620 | goto end;\r |
| 621 | }\r |
| 622 | \r |
| 623 | if ((a&0xffffc0)==0xa12000)\r |
| 624 | rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r |
| 625 | \r |
| 626 | d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r |
| 627 | \r |
| 628 | if ((a&0xffffc0)==0xa12000)\r |
| 629 | rdprintf("ret = %08x", d);\r |
| 630 | \r |
| 631 | end:\r |
| 632 | #ifdef __debug_io\r |
| 633 | dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r |
| 634 | #endif\r |
| 635 | return d;\r |
| 636 | }\r |
| 637 | \r |
| 638 | \r |
| 639 | // -----------------------------------------------------------------\r |
| 640 | // Write Ram\r |
| 641 | \r |
| 642 | void PicoWriteM68k8(u32 a,u8 d)\r |
| 643 | {\r |
| 644 | #ifdef __debug_io\r |
| 645 | dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
| 646 | #endif\r |
| 647 | //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r |
| 648 | // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
| 649 | \r |
| 650 | \r |
| 651 | if ((a&0xe00000)==0xe00000) { // Ram\r |
| 652 | *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r |
| 653 | return;\r |
| 654 | }\r |
| 655 | \r |
| 656 | a&=0xffffff;\r |
| 657 | \r |
| 658 | // prg RAM\r |
| 659 | if ((a&0xfe0000)==0x020000) {\r |
| 660 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
| 661 | *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r |
| 662 | return;\r |
| 663 | }\r |
| 664 | \r |
| 665 | // word RAM\r |
| 666 | if ((a&0xfc0000)==0x200000) {\r |
| 667 | dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r |
| 668 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 669 | if (a >= 0x220000) {\r |
| 670 | dprintf("cell");\r |
| 671 | } else {\r |
| 672 | a=((a&0x1fffe)<<1)|(a&1);\r |
| 673 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
| 674 | *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r |
| 675 | }\r |
| 676 | } else {\r |
| 677 | // allow access in any mode, like Gens does\r |
| 678 | *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r |
| 679 | }\r |
| 680 | return;\r |
| 681 | }\r |
| 682 | \r |
| 683 | if ((a&0xffffc0)==0xa12000)\r |
| 684 | rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r |
| 685 | \r |
| 686 | OtherWrite8(a,d,8);\r |
| 687 | }\r |
| 688 | \r |
| 689 | \r |
| 690 | void PicoWriteM68k16(u32 a,u16 d)\r |
| 691 | {\r |
| 692 | #ifdef __debug_io\r |
| 693 | dprintf("w16: %06x, %04x", a&0xffffff, d);\r |
| 694 | #endif\r |
| 695 | // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
| 696 | \r |
| 697 | if ((a&0xe00000)==0xe00000) { // Ram\r |
| 698 | *(u16 *)(Pico.ram+(a&0xfffe))=d;\r |
| 699 | return;\r |
| 700 | }\r |
| 701 | \r |
| 702 | a&=0xfffffe;\r |
| 703 | \r |
| 704 | // prg RAM\r |
| 705 | if ((a&0xfe0000)==0x020000) {\r |
| 706 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
| 707 | *(u16 *)(prg_bank+(a&0x1fffe))=d;\r |
| 708 | return;\r |
| 709 | }\r |
| 710 | \r |
| 711 | // word RAM\r |
| 712 | if ((a&0xfc0000)==0x200000) {\r |
| 713 | dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r |
| 714 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 715 | if (a >= 0x220000) {\r |
| 716 | dprintf("cell");\r |
| 717 | } else {\r |
| 718 | a=((a&0x1fffe)<<1);\r |
| 719 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
| 720 | *(u16 *)(Pico_mcd->word_ram+a)=d;\r |
| 721 | }\r |
| 722 | } else {\r |
| 723 | // allow access in any mode, like Gens does\r |
| 724 | *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r |
| 725 | }\r |
| 726 | return;\r |
| 727 | }\r |
| 728 | \r |
| 729 | if ((a&0xffffc0)==0xa12000)\r |
| 730 | rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r |
| 731 | \r |
| 732 | OtherWrite16(a,d);\r |
| 733 | }\r |
| 734 | \r |
| 735 | \r |
| 736 | void PicoWriteM68k32(u32 a,u32 d)\r |
| 737 | {\r |
| 738 | #ifdef __debug_io\r |
| 739 | dprintf("w32: %06x, %08x", a&0xffffff, d);\r |
| 740 | #endif\r |
| 741 | \r |
| 742 | if ((a&0xe00000)==0xe00000)\r |
| 743 | {\r |
| 744 | // Ram:\r |
| 745 | u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r |
| 746 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
| 747 | return;\r |
| 748 | }\r |
| 749 | \r |
| 750 | a&=0xfffffe;\r |
| 751 | \r |
| 752 | // prg RAM\r |
| 753 | if ((a&0xfe0000)==0x020000) {\r |
| 754 | u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r |
| 755 | u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r |
| 756 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
| 757 | return;\r |
| 758 | }\r |
| 759 | \r |
| 760 | // word RAM\r |
| 761 | if ((a&0xfc0000)==0x200000) {\r |
| 762 | if (d != 0) // don't log clears\r |
| 763 | dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r |
| 764 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 765 | if (a >= 0x220000) {\r |
| 766 | dprintf("cell");\r |
| 767 | } else {\r |
| 768 | a=((a&0x1fffe)<<1);\r |
| 769 | if (Pico_mcd->s68k_regs[3]&1) a+=2;\r |
| 770 | *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r |
| 771 | *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r |
| 772 | }\r |
| 773 | } else {\r |
| 774 | // allow access in any mode, like Gens does\r |
| 775 | u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
| 776 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
| 777 | }\r |
| 778 | return;\r |
| 779 | }\r |
| 780 | \r |
| 781 | if ((a&0xffffc0)==0xa12000)\r |
| 782 | rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r |
| 783 | \r |
| 784 | OtherWrite16(a, (u16)(d>>16));\r |
| 785 | OtherWrite16(a+2,(u16)d);\r |
| 786 | }\r |
| 787 | \r |
| 788 | \r |
| 789 | // -----------------------------------------------------------------\r |
| 790 | \r |
| 791 | \r |
| 792 | u8 PicoReadS68k8(u32 a)\r |
| 793 | {\r |
| 794 | u32 d=0;\r |
| 795 | \r |
| 796 | a&=0xffffff;\r |
| 797 | \r |
| 798 | // prg RAM\r |
| 799 | if (a < 0x80000) {\r |
| 800 | d = *(Pico_mcd->prg_ram+(a^1));\r |
| 801 | goto end;\r |
| 802 | }\r |
| 803 | \r |
| 804 | // regs\r |
| 805 | if ((a&0xfffe00) == 0xff8000) {\r |
| 806 | a &= 0x1ff;\r |
| 807 | rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r |
| 808 | if (a >= 0x50 && a < 0x68)\r |
| 809 | d = gfx_cd_read(a&~1);\r |
| 810 | else d = s68k_reg_read16(a&~1);\r |
| 811 | if ((a&1)==0) d>>=8;\r |
| 812 | rdprintf("ret = %02x", (u8)d);\r |
| 813 | goto end;\r |
| 814 | }\r |
| 815 | \r |
| 816 | // word RAM (2M area)\r |
| 817 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
| 818 | dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r |
| 819 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 820 | // TODO (decode)\r |
| 821 | dprintf("(decode)");\r |
| 822 | } else {\r |
| 823 | // allow access in any mode, like Gens does\r |
| 824 | d = Pico_mcd->word_ram[(a^1)&0x3ffff];\r |
| 825 | }\r |
| 826 | dprintf("ret = %02x", (u8)d);\r |
| 827 | goto end;\r |
| 828 | }\r |
| 829 | \r |
| 830 | // word RAM (1M area)\r |
| 831 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
| 832 | dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r |
| 833 | a=((a&0x1fffe)<<1)|(a&1);\r |
| 834 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
| 835 | d = Pico_mcd->word_ram[a^1];\r |
| 836 | dprintf("ret = %02x", (u8)d);\r |
| 837 | goto end;\r |
| 838 | }\r |
| 839 | \r |
| 840 | // PCM\r |
| 841 | if ((a&0xff8000)==0xff0000) {\r |
| 842 | dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r |
| 843 | a &= 0x7fff;\r |
| 844 | if (a >= 0x2000)\r |
| 845 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r |
| 846 | else if (a >= 0x20) {\r |
| 847 | a &= 0x1e;\r |
| 848 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
| 849 | if (a & 2) d >>= 8;\r |
| 850 | }\r |
| 851 | dprintf("ret = %02x", (u8)d);\r |
| 852 | goto end;\r |
| 853 | }\r |
| 854 | \r |
| 855 | // bram\r |
| 856 | if ((a&0xff0000)==0xfe0000) {\r |
| 857 | d = Pico_mcd->bram[(a>>1)&0x1fff];\r |
| 858 | goto end;\r |
| 859 | }\r |
| 860 | \r |
| 861 | dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r |
| 862 | \r |
| 863 | end:\r |
| 864 | \r |
| 865 | #ifdef __debug_io2\r |
| 866 | dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r |
| 867 | #endif\r |
| 868 | return (u8)d;\r |
| 869 | }\r |
| 870 | \r |
| 871 | \r |
| 872 | u16 PicoReadS68k16(u32 a)\r |
| 873 | {\r |
| 874 | u32 d=0;\r |
| 875 | \r |
| 876 | a&=0xfffffe;\r |
| 877 | \r |
| 878 | // prg RAM\r |
| 879 | if (a < 0x80000) {\r |
| 880 | d = *(u16 *)(Pico_mcd->prg_ram+a);\r |
| 881 | goto end;\r |
| 882 | }\r |
| 883 | \r |
| 884 | // regs\r |
| 885 | if ((a&0xfffe00) == 0xff8000) {\r |
| 886 | a &= 0x1fe;\r |
| 887 | rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r |
| 888 | if (a >= 0x50 && a < 0x68)\r |
| 889 | d = gfx_cd_read(a);\r |
| 890 | else d = s68k_reg_read16(a);\r |
| 891 | rdprintf("ret = %04x", d);\r |
| 892 | goto end;\r |
| 893 | }\r |
| 894 | \r |
| 895 | // word RAM (2M area)\r |
| 896 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
| 897 | dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r |
| 898 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 899 | // TODO (decode)\r |
| 900 | dprintf("(decode)");\r |
| 901 | } else {\r |
| 902 | // allow access in any mode, like Gens does\r |
| 903 | d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
| 904 | }\r |
| 905 | dprintf("ret = %04x", d);\r |
| 906 | goto end;\r |
| 907 | }\r |
| 908 | \r |
| 909 | // word RAM (1M area)\r |
| 910 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
| 911 | dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r |
| 912 | a=((a&0x1fffe)<<1);\r |
| 913 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
| 914 | d = *(u16 *)(Pico_mcd->word_ram+a);\r |
| 915 | dprintf("ret = %04x", d);\r |
| 916 | goto end;\r |
| 917 | }\r |
| 918 | \r |
| 919 | // bram\r |
| 920 | if ((a&0xff0000)==0xfe0000) {\r |
| 921 | dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r |
| 922 | a = (a>>1)&0x1fff;\r |
| 923 | d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r |
| 924 | d|= Pico_mcd->bram[a++] << 8;\r |
| 925 | dprintf("ret = %04x", d);\r |
| 926 | goto end;\r |
| 927 | }\r |
| 928 | \r |
| 929 | // PCM\r |
| 930 | if ((a&0xff8000)==0xff0000) {\r |
| 931 | dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r |
| 932 | a &= 0x7fff;\r |
| 933 | if (a >= 0x2000)\r |
| 934 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r |
| 935 | else if (a >= 0x20) {\r |
| 936 | a &= 0x1e;\r |
| 937 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
| 938 | if (a & 2) d >>= 8;\r |
| 939 | }\r |
| 940 | dprintf("ret = %04x", d);\r |
| 941 | goto end;\r |
| 942 | }\r |
| 943 | \r |
| 944 | dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 945 | \r |
| 946 | end:\r |
| 947 | \r |
| 948 | #ifdef __debug_io2\r |
| 949 | dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 950 | #endif\r |
| 951 | return d;\r |
| 952 | }\r |
| 953 | \r |
| 954 | \r |
| 955 | u32 PicoReadS68k32(u32 a)\r |
| 956 | {\r |
| 957 | u32 d=0;\r |
| 958 | \r |
| 959 | a&=0xfffffe;\r |
| 960 | \r |
| 961 | // prg RAM\r |
| 962 | if (a < 0x80000) {\r |
| 963 | u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r |
| 964 | d = (pm[0]<<16)|pm[1];\r |
| 965 | goto end;\r |
| 966 | }\r |
| 967 | \r |
| 968 | // regs\r |
| 969 | if ((a&0xfffe00) == 0xff8000) {\r |
| 970 | a &= 0x1fe;\r |
| 971 | rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r |
| 972 | if (a >= 0x50 && a < 0x68)\r |
| 973 | d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r |
| 974 | else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r |
| 975 | rdprintf("ret = %08x", d);\r |
| 976 | goto end;\r |
| 977 | }\r |
| 978 | \r |
| 979 | // word RAM (2M area)\r |
| 980 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
| 981 | dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r |
| 982 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 983 | // TODO (decode)\r |
| 984 | dprintf("(decode)");\r |
| 985 | } else {\r |
| 986 | // allow access in any mode, like Gens does\r |
| 987 | u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r |
| 988 | }\r |
| 989 | dprintf("ret = %08x", d);\r |
| 990 | goto end;\r |
| 991 | }\r |
| 992 | \r |
| 993 | // word RAM (1M area)\r |
| 994 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
| 995 | dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r |
| 996 | a=((a&0x1fffe)<<1);\r |
| 997 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
| 998 | d = *(u16 *)(Pico_mcd->word_ram+a) << 16;\r |
| 999 | d |= *(u16 *)(Pico_mcd->word_ram+a+4);\r |
| 1000 | dprintf("ret = %08x", d);\r |
| 1001 | goto end;\r |
| 1002 | }\r |
| 1003 | \r |
| 1004 | // PCM\r |
| 1005 | if ((a&0xff8000)==0xff0000) {\r |
| 1006 | dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r |
| 1007 | a &= 0x7fff;\r |
| 1008 | if (a >= 0x2000) {\r |
| 1009 | a >>= 1;\r |
| 1010 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r |
| 1011 | d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r |
| 1012 | } else if (a >= 0x20) {\r |
| 1013 | a &= 0x1e;\r |
| 1014 | if (a & 2) {\r |
| 1015 | a >>= 2;\r |
| 1016 | d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r |
| 1017 | d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r |
| 1018 | } else {\r |
| 1019 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
| 1020 | d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r |
| 1021 | }\r |
| 1022 | }\r |
| 1023 | dprintf("ret = %08x", d);\r |
| 1024 | goto end;\r |
| 1025 | }\r |
| 1026 | \r |
| 1027 | // bram\r |
| 1028 | if ((a&0xff0000)==0xfe0000) {\r |
| 1029 | dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r |
| 1030 | a = (a>>1)&0x1fff;\r |
| 1031 | d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r |
| 1032 | d|= Pico_mcd->bram[a++] << 24;\r |
| 1033 | d|= Pico_mcd->bram[a++];\r |
| 1034 | d|= Pico_mcd->bram[a++] << 8;\r |
| 1035 | dprintf("ret = %08x", d);\r |
| 1036 | goto end;\r |
| 1037 | }\r |
| 1038 | \r |
| 1039 | dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 1040 | \r |
| 1041 | end:\r |
| 1042 | \r |
| 1043 | #ifdef __debug_io2\r |
| 1044 | dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 1045 | #endif\r |
| 1046 | return d;\r |
| 1047 | }\r |
| 1048 | \r |
| 1049 | \r |
| 1050 | // -----------------------------------------------------------------\r |
| 1051 | \r |
| 1052 | void PicoWriteS68k8(u32 a,u8 d)\r |
| 1053 | {\r |
| 1054 | #ifdef __debug_io2\r |
| 1055 | dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 1056 | #endif\r |
| 1057 | \r |
| 1058 | a&=0xffffff;\r |
| 1059 | \r |
| 1060 | // prg RAM\r |
| 1061 | if (a < 0x80000) {\r |
| 1062 | u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r |
| 1063 | *pm=d;\r |
| 1064 | return;\r |
| 1065 | }\r |
| 1066 | \r |
| 1067 | // regs\r |
| 1068 | if ((a&0xfffe00) == 0xff8000) {\r |
| 1069 | a &= 0x1ff;\r |
| 1070 | rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r |
| 1071 | if (a >= 0x50 && a < 0x68)\r |
| 1072 | gfx_cd_write(a&~1, (d<<8)|d);\r |
| 1073 | else s68k_reg_write8(a,d);\r |
| 1074 | return;\r |
| 1075 | }\r |
| 1076 | \r |
| 1077 | // word RAM (2M area)\r |
| 1078 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
| 1079 | dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r |
| 1080 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 1081 | // TODO (decode)\r |
| 1082 | dprintf("(decode)");\r |
| 1083 | } else {\r |
| 1084 | // allow access in any mode, like Gens does\r |
| 1085 | *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;\r |
| 1086 | }\r |
| 1087 | return;\r |
| 1088 | }\r |
| 1089 | \r |
| 1090 | // word RAM (1M area)\r |
| 1091 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
| 1092 | if (d)\r |
| 1093 | dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r |
| 1094 | a=((a&0x1fffe)<<1)|(a&1);\r |
| 1095 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
| 1096 | *(u8 *)(Pico_mcd->word_ram+(a^1))=d;\r |
| 1097 | return;\r |
| 1098 | }\r |
| 1099 | \r |
| 1100 | // PCM\r |
| 1101 | if ((a&0xff8000)==0xff0000) {\r |
| 1102 | a &= 0x7fff;\r |
| 1103 | if (a >= 0x2000)\r |
| 1104 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
| 1105 | else if (a < 0x12)\r |
| 1106 | pcm_write(a>>1, d);\r |
| 1107 | return;\r |
| 1108 | }\r |
| 1109 | \r |
| 1110 | // bram\r |
| 1111 | if ((a&0xff0000)==0xfe0000) {\r |
| 1112 | Pico_mcd->bram[(a>>1)&0x1fff] = d;\r |
| 1113 | SRam.changed = 1;\r |
| 1114 | return;\r |
| 1115 | }\r |
| 1116 | \r |
| 1117 | dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 1118 | }\r |
| 1119 | \r |
| 1120 | \r |
| 1121 | void PicoWriteS68k16(u32 a,u16 d)\r |
| 1122 | {\r |
| 1123 | #ifdef __debug_io2\r |
| 1124 | dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 1125 | #endif\r |
| 1126 | \r |
| 1127 | a&=0xfffffe;\r |
| 1128 | \r |
| 1129 | // prg RAM\r |
| 1130 | if (a < 0x80000) {\r |
| 1131 | *(u16 *)(Pico_mcd->prg_ram+a)=d;\r |
| 1132 | return;\r |
| 1133 | }\r |
| 1134 | \r |
| 1135 | // regs\r |
| 1136 | if ((a&0xfffe00) == 0xff8000) {\r |
| 1137 | a &= 0x1fe;\r |
| 1138 | rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r |
| 1139 | if (a >= 0x50 && a < 0x68)\r |
| 1140 | gfx_cd_write(a, d);\r |
| 1141 | else {\r |
| 1142 | if (a == 0xe) { // special case, 2 byte writes would be handled differently\r |
| 1143 | Pico_mcd->s68k_regs[0xf] = d;\r |
| 1144 | return;\r |
| 1145 | }\r |
| 1146 | s68k_reg_write8(a, d>>8);\r |
| 1147 | s68k_reg_write8(a+1,d&0xff);\r |
| 1148 | }\r |
| 1149 | return;\r |
| 1150 | }\r |
| 1151 | \r |
| 1152 | // word RAM (2M area)\r |
| 1153 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
| 1154 | dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
| 1155 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 1156 | // TODO (decode)\r |
| 1157 | dprintf("(decode)");\r |
| 1158 | } else {\r |
| 1159 | // allow access in any mode, like Gens does\r |
| 1160 | *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;\r |
| 1161 | }\r |
| 1162 | return;\r |
| 1163 | }\r |
| 1164 | \r |
| 1165 | // word RAM (1M area)\r |
| 1166 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
| 1167 | if (d)\r |
| 1168 | dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
| 1169 | a=((a&0x1fffe)<<1);\r |
| 1170 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
| 1171 | *(u16 *)(Pico_mcd->word_ram+a)=d;\r |
| 1172 | return;\r |
| 1173 | }\r |
| 1174 | \r |
| 1175 | // PCM\r |
| 1176 | if ((a&0xff8000)==0xff0000) {\r |
| 1177 | a &= 0x7fff;\r |
| 1178 | if (a >= 0x2000)\r |
| 1179 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
| 1180 | else if (a < 0x12)\r |
| 1181 | pcm_write(a>>1, d & 0xff);\r |
| 1182 | return;\r |
| 1183 | }\r |
| 1184 | \r |
| 1185 | // bram\r |
| 1186 | if ((a&0xff0000)==0xfe0000) {\r |
| 1187 | dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
| 1188 | a = (a>>1)&0x1fff;\r |
| 1189 | Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r |
| 1190 | Pico_mcd->bram[a++] = d >> 8;\r |
| 1191 | SRam.changed = 1;\r |
| 1192 | return;\r |
| 1193 | }\r |
| 1194 | \r |
| 1195 | dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 1196 | }\r |
| 1197 | \r |
| 1198 | \r |
| 1199 | void PicoWriteS68k32(u32 a,u32 d)\r |
| 1200 | {\r |
| 1201 | #ifdef __debug_io2\r |
| 1202 | dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 1203 | #endif\r |
| 1204 | \r |
| 1205 | a&=0xfffffe;\r |
| 1206 | \r |
| 1207 | // prg RAM\r |
| 1208 | if (a < 0x80000) {\r |
| 1209 | u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r |
| 1210 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
| 1211 | return;\r |
| 1212 | }\r |
| 1213 | \r |
| 1214 | // regs\r |
| 1215 | if ((a&0xfffe00) == 0xff8000) {\r |
| 1216 | a &= 0x1fe;\r |
| 1217 | rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r |
| 1218 | if (a >= 0x50 && a < 0x68) {\r |
| 1219 | gfx_cd_write(a, d>>16);\r |
| 1220 | gfx_cd_write(a+2, d&0xffff);\r |
| 1221 | } else {\r |
| 1222 | s68k_reg_write8(a, d>>24);\r |
| 1223 | s68k_reg_write8(a+1,(d>>16)&0xff);\r |
| 1224 | s68k_reg_write8(a+2,(d>>8) &0xff);\r |
| 1225 | s68k_reg_write8(a+3, d &0xff);\r |
| 1226 | }\r |
| 1227 | return;\r |
| 1228 | }\r |
| 1229 | \r |
| 1230 | // word RAM (2M area)\r |
| 1231 | if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r |
| 1232 | dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r |
| 1233 | if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r |
| 1234 | // TODO (decode)\r |
| 1235 | dprintf("(decode)");\r |
| 1236 | } else {\r |
| 1237 | // allow access in any mode, like Gens does\r |
| 1238 | u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
| 1239 | pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r |
| 1240 | }\r |
| 1241 | return;\r |
| 1242 | }\r |
| 1243 | \r |
| 1244 | // word RAM (1M area)\r |
| 1245 | if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r |
| 1246 | if (d)\r |
| 1247 | dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r |
| 1248 | a=((a&0x1fffe)<<1);\r |
| 1249 | if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;\r |
| 1250 | *(u16 *)(Pico_mcd->word_ram+a) = d>>16;\r |
| 1251 | *(u16 *)(Pico_mcd->word_ram+a+4) = d;\r |
| 1252 | return;\r |
| 1253 | }\r |
| 1254 | \r |
| 1255 | // PCM\r |
| 1256 | if ((a&0xff8000)==0xff0000) {\r |
| 1257 | a &= 0x7fff;\r |
| 1258 | if (a >= 0x2000) {\r |
| 1259 | a >>= 1;\r |
| 1260 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r |
| 1261 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r |
| 1262 | } else if (a < 0x12) {\r |
| 1263 | a >>= 1;\r |
| 1264 | pcm_write(a, (d>>16) & 0xff);\r |
| 1265 | pcm_write(a+1, d & 0xff);\r |
| 1266 | }\r |
| 1267 | return;\r |
| 1268 | }\r |
| 1269 | \r |
| 1270 | // bram\r |
| 1271 | if ((a&0xff0000)==0xfe0000) {\r |
| 1272 | dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r |
| 1273 | a = (a>>1)&0x1fff;\r |
| 1274 | Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r |
| 1275 | Pico_mcd->bram[a++] = d >> 24;\r |
| 1276 | Pico_mcd->bram[a++] = d;\r |
| 1277 | Pico_mcd->bram[a++] = d >> 8;\r |
| 1278 | SRam.changed = 1;\r |
| 1279 | return;\r |
| 1280 | }\r |
| 1281 | \r |
| 1282 | dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r |
| 1283 | }\r |
| 1284 | \r |
| 1285 | \r |
| 1286 | \r |
| 1287 | // -----------------------------------------------------------------\r |
| 1288 | \r |
| 1289 | \r |
| 1290 | #if defined(EMU_C68K)\r |
| 1291 | static __inline int PicoMemBaseM68k(u32 pc)\r |
| 1292 | {\r |
| 1293 | int membase=0;\r |
| 1294 | \r |
| 1295 | if (pc < 0x20000)\r |
| 1296 | {\r |
| 1297 | membase=(int)Pico_mcd->bios; // Program Counter in BIOS\r |
| 1298 | }\r |
| 1299 | else if ((pc&0xe00000)==0xe00000)\r |
| 1300 | {\r |
| 1301 | membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r |
| 1302 | }\r |
| 1303 | else if ((pc&0xfc0000)==0x200000 && !(Pico_mcd->s68k_regs[3]&4))\r |
| 1304 | {\r |
| 1305 | membase=(int)Pico_mcd->word_ram-0x200000; // Program Counter in Word Ram\r |
| 1306 | }\r |
| 1307 | else\r |
| 1308 | {\r |
| 1309 | // Error - Program Counter is invalid\r |
| 1310 | dprintf("m68k: unhandled jump to %06x", pc);\r |
| 1311 | membase=(int)Pico.rom;\r |
| 1312 | }\r |
| 1313 | \r |
| 1314 | return membase;\r |
| 1315 | }\r |
| 1316 | \r |
| 1317 | \r |
| 1318 | static u32 PicoCheckPcM68k(u32 pc)\r |
| 1319 | {\r |
| 1320 | pc-=PicoCpu.membase; // Get real pc\r |
| 1321 | pc&=0xfffffe;\r |
| 1322 | \r |
| 1323 | PicoCpu.membase=PicoMemBaseM68k(pc);\r |
| 1324 | \r |
| 1325 | return PicoCpu.membase+pc;\r |
| 1326 | }\r |
| 1327 | \r |
| 1328 | \r |
| 1329 | static __inline int PicoMemBaseS68k(u32 pc)\r |
| 1330 | {\r |
| 1331 | int membase;\r |
| 1332 | \r |
| 1333 | membase=(int)Pico_mcd->prg_ram; // Program Counter in Prg RAM\r |
| 1334 | if (pc >= 0x80000)\r |
| 1335 | {\r |
| 1336 | // Error - Program Counter is invalid\r |
| 1337 | dprintf("s68k: unhandled jump to %06x", pc);\r |
| 1338 | }\r |
| 1339 | \r |
| 1340 | return membase;\r |
| 1341 | }\r |
| 1342 | \r |
| 1343 | \r |
| 1344 | static u32 PicoCheckPcS68k(u32 pc)\r |
| 1345 | {\r |
| 1346 | pc-=PicoCpuS68k.membase; // Get real pc\r |
| 1347 | pc&=0xfffffe;\r |
| 1348 | \r |
| 1349 | PicoCpuS68k.membase=PicoMemBaseS68k(pc);\r |
| 1350 | \r |
| 1351 | return PicoCpuS68k.membase+pc;\r |
| 1352 | }\r |
| 1353 | #endif\r |
| 1354 | \r |
| 1355 | \r |
| 1356 | void PicoMemSetupCD()\r |
| 1357 | {\r |
| 1358 | dprintf("PicoMemSetupCD()");\r |
| 1359 | #ifdef EMU_C68K\r |
| 1360 | // Setup m68k memory callbacks:\r |
| 1361 | PicoCpu.checkpc=PicoCheckPcM68k;\r |
| 1362 | PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;\r |
| 1363 | PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;\r |
| 1364 | PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;\r |
| 1365 | PicoCpu.write8 =PicoWriteM68k8;\r |
| 1366 | PicoCpu.write16=PicoWriteM68k16;\r |
| 1367 | PicoCpu.write32=PicoWriteM68k32;\r |
| 1368 | // s68k\r |
| 1369 | PicoCpuS68k.checkpc=PicoCheckPcS68k;\r |
| 1370 | PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;\r |
| 1371 | PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;\r |
| 1372 | PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;\r |
| 1373 | PicoCpuS68k.write8 =PicoWriteS68k8;\r |
| 1374 | PicoCpuS68k.write16=PicoWriteS68k16;\r |
| 1375 | PicoCpuS68k.write32=PicoWriteS68k32;\r |
| 1376 | #endif\r |
| 1377 | }\r |
| 1378 | \r |
| 1379 | \r |
| 1380 | #ifdef EMU_M68K\r |
| 1381 | unsigned char PicoReadCD8w (unsigned int a) {\r |
| 1382 | return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);\r |
| 1383 | }\r |
| 1384 | unsigned short PicoReadCD16w(unsigned int a) {\r |
| 1385 | return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);\r |
| 1386 | }\r |
| 1387 | unsigned int PicoReadCD32w(unsigned int a) {\r |
| 1388 | return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);\r |
| 1389 | }\r |
| 1390 | void PicoWriteCD8w (unsigned int a, unsigned char d) {\r |
| 1391 | if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r |
| 1392 | }\r |
| 1393 | void PicoWriteCD16w(unsigned int a, unsigned short d) {\r |
| 1394 | if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r |
| 1395 | }\r |
| 1396 | void PicoWriteCD32w(unsigned int a, unsigned int d) {\r |
| 1397 | if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r |
| 1398 | }\r |
| 1399 | \r |
| 1400 | // these are allowed to access RAM\r |
| 1401 | unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {\r |
| 1402 | a&=0xffffff;\r |
| 1403 | if(m68ki_cpu_p == &PicoS68kCPU) {\r |
| 1404 | if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r |
| 1405 | dprintf("s68k_read_pcrelative_CD8: can't handle %06x", a);\r |
| 1406 | } else {\r |
| 1407 | if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r |
| 1408 | if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r |
| 1409 | if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r |
| 1410 | return Pico_mcd->word_ram[(a^1)&0x3fffe];\r |
| 1411 | dprintf("m68k_read_pcrelative_CD8: can't handle %06x", a);\r |
| 1412 | }\r |
| 1413 | return 0;//(u8) lastread_d;\r |
| 1414 | }\r |
| 1415 | unsigned int m68k_read_pcrelative_CD16(unsigned int a) {\r |
| 1416 | a&=0xffffff;\r |
| 1417 | if(m68ki_cpu_p == &PicoS68kCPU) {\r |
| 1418 | if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r |
| 1419 | dprintf("s68k_read_pcrelative_CD16: can't handle %06x", a);\r |
| 1420 | } else {\r |
| 1421 | if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r |
| 1422 | if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r |
| 1423 | if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r |
| 1424 | return *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));\r |
| 1425 | dprintf("m68k_read_pcrelative_CD16: can't handle %06x", a);\r |
| 1426 | }\r |
| 1427 | return 0;\r |
| 1428 | }\r |
| 1429 | unsigned int m68k_read_pcrelative_CD32(unsigned int a) {\r |
| 1430 | a&=0xffffff;\r |
| 1431 | if(m68ki_cpu_p == &PicoS68kCPU) {\r |
| 1432 | if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r |
| 1433 | dprintf("s68k_read_pcrelative_CD32: can't handle %06x", a);\r |
| 1434 | } else {\r |
| 1435 | if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r |
| 1436 | if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r |
| 1437 | if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)\r |
| 1438 | { u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r |
| 1439 | dprintf("m68k_read_pcrelative_CD32: can't handle %06x", a);\r |
| 1440 | }\r |
| 1441 | return 0;\r |
| 1442 | }\r |
| 1443 | #endif // EMU_M68K\r |
| 1444 | \r |