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(QNX) Fix build
[picodrive.git] / cpu / DrZ80 / drz80.s
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1;@ Reesy's Z80 Emulator Version 0.001\r
2\r
3;@ (c) Copyright 2004 Reesy, All rights reserved\r
4;@ DrZ80 is free for non-commercial use.\r
5\r
6;@ For commercial use, separate licencing terms must be obtained.\r
7\r
8 .data\r
9 .align 4\r
10\r
11 .global DrZ80Run\r
12 .global DrZ80Ver\r
13\r
14 .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
15 .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
16 .equiv UPDATE_CONTEXT, 0\r
17 .equiv DRZ80_XMAP, 1\r
18 .equiv DRZ80_XMAP_MORE_INLINE, 1\r
19\r
20.if DRZ80_XMAP\r
21 .equ Z80_MEM_SHIFT, 13\r
22.endif\r
23\r
24.if INTERRUPT_MODE\r
25 .extern Interrupt\r
26.endif\r
27\r
28DrZ80Ver: .long 0x0001\r
29\r
30;@ --------------------------- Defines ----------------------------\r
31;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
32\r
33 z80_icount .req r3\r
34 opcodes .req r4\r
35 cpucontext .req r5\r
36 z80pc .req r6\r
37 z80a .req r7\r
38 z80f .req r8\r
39 z80bc .req r9\r
40 z80de .req r10\r
41 z80hl .req r11\r
42 z80sp .req r12 \r
43 z80xx .req lr\r
44\r
45 .equ z80pc_pointer, 0 ;@ 0\r
46 .equ z80a_pointer, z80pc_pointer+4 ;@ 4\r
47 .equ z80f_pointer, z80a_pointer+4 ;@ 8\r
48 .equ z80bc_pointer, z80f_pointer+4 ;@ \r
49 .equ z80de_pointer, z80bc_pointer+4\r
50 .equ z80hl_pointer, z80de_pointer+4\r
51 .equ z80sp_pointer, z80hl_pointer+4\r
52 .equ z80pc_base, z80sp_pointer+4\r
53 .equ z80sp_base, z80pc_base+4\r
54 .equ z80ix, z80sp_base+4\r
55 .equ z80iy, z80ix+4\r
56 .equ z80i, z80iy+4\r
57 .equ z80a2, z80i+4\r
58 .equ z80f2, z80a2+4\r
59 .equ z80bc2, z80f2+4\r
60 .equ z80de2, z80bc2+4\r
61 .equ z80hl2, z80de2+4\r
62 .equ cycles_pointer, z80hl2+4 \r
63 .equ previouspc, cycles_pointer+4 \r
64 .equ z80irq, previouspc+4\r
65 .equ z80if, z80irq+1\r
66 .equ z80im, z80if+1\r
67 .equ z80r, z80im+1\r
68 .equ z80irqvector, z80r+1\r
69 .equ z80irqcallback, z80irqvector+4\r
70 .equ z80_write8, z80irqcallback+4\r
71 .equ z80_write16, z80_write8+4\r
72 .equ z80_in, z80_write16+4\r
73 .equ z80_out, z80_in+4\r
74 .equ z80_read8, z80_out+4\r
75 .equ z80_read16, z80_read8+4\r
76 .equ z80_rebaseSP, z80_read16+4\r
77 .equ z80_rebasePC, z80_rebaseSP+4\r
78\r
79 .equ VFlag, 0\r
80 .equ CFlag, 1\r
81 .equ ZFlag, 2\r
82 .equ SFlag, 3\r
83 .equ HFlag, 4\r
84 .equ NFlag, 5\r
85 .equ Flag3, 6\r
86 .equ Flag5, 7\r
87\r
88 .equ Z80_CFlag, 0\r
89 .equ Z80_NFlag, 1\r
90 .equ Z80_VFlag, 2\r
91 .equ Z80_Flag3, 3\r
92 .equ Z80_HFlag, 4\r
93 .equ Z80_Flag5, 5\r
94 .equ Z80_ZFlag, 6\r
95 .equ Z80_SFlag, 7\r
96\r
97 .equ Z80_IF1, 1<<0\r
98 .equ Z80_IF2, 1<<1\r
99 .equ Z80_HALT, 1<<2\r
100 .equ Z80_NMI, 1<<3\r
101\r
102;@---------------------------------------\r
103\r
104.text\r
105\r
106.if DRZ80_XMAP\r
107\r
108z80_xmap_read8: @ addr\r
109 ldr r1,[cpucontext,#z80_read8]\r
110 mov r2,r0,lsr #Z80_MEM_SHIFT\r
111 ldr r1,[r1,r2,lsl #2]\r
112 movs r1,r1,lsl #1\r
113 ldrccb r0,[r1,r0]\r
114 bxcc lr\r
115\r
116z80_xmap_read8_handler: @ addr, func\r
117 str z80_icount,[cpucontext,#cycles_pointer]\r
118 stmfd sp!,{r12,lr}\r
119 mov lr,pc\r
120 bx r1\r
121 ldr z80_icount,[cpucontext,#cycles_pointer]\r
122 ldmfd sp!,{r12,pc}\r
123\r
124z80_xmap_write8: @ data, addr\r
125 ldr r2,[cpucontext,#z80_write8]\r
126 add r2,r2,r1,lsr #Z80_MEM_SHIFT-2\r
127 bic r2,r2,#3\r
128 ldr r2,[r2]\r
129 movs r2,r2,lsl #1\r
130 strccb r0,[r2,r1]\r
131 bxcc lr\r
132\r
133z80_xmap_write8_handler: @ data, addr, func\r
134 str z80_icount,[cpucontext,#cycles_pointer]\r
135 mov r3,r0\r
136 mov r0,r1\r
137 mov r1,r3\r
138 stmfd sp!,{r12,lr}\r
139 mov lr,pc\r
140 bx r2\r
141 ldr z80_icount,[cpucontext,#cycles_pointer]\r
142 ldmfd sp!,{r12,pc}\r
143\r
144z80_xmap_read16: @ addr\r
145 @ check if we cross bank boundary\r
146 add r1,r0,#1\r
147 eor r1,r1,r0\r
148 tst r1,#1<<Z80_MEM_SHIFT\r
149 bne 0f\r
150\r
151 ldr r1,[cpucontext,#z80_read8]\r
152 mov r2,r0,lsr #Z80_MEM_SHIFT\r
153 ldr r1,[r1,r2,lsl #2]\r
154 movs r1,r1,lsl #1\r
155 bcs 0f\r
156 ldrb r0,[r1,r0]!\r
157 ldrb r1,[r1,#1]\r
158 orr r0,r0,r1,lsl #8\r
159 bx lr\r
160\r
1610:\r
162 @ z80_xmap_read8 will save r3 and r12 for us\r
163 stmfd sp!,{r8,r9,lr}\r
164 mov r8,r0\r
165 bl z80_xmap_read8\r
166 mov r9,r0\r
167 add r0,r8,#1\r
168 bl z80_xmap_read8\r
169 orr r0,r9,r0,lsl #8\r
170 ldmfd sp!,{r8,r9,pc}\r
171\r
172z80_xmap_write16: @ data, addr\r
173 add r2,r1,#1\r
174 eor r2,r2,r1\r
175 tst r2,#1<<Z80_MEM_SHIFT\r
176 bne 0f\r
177\r
178 ldr r2,[cpucontext,#z80_write8]\r
179 add r2,r2,r1,lsr #Z80_MEM_SHIFT-2\r
180 bic r2,r2,#3\r
181 ldr r2,[r2]\r
182 movs r2,r2,lsl #1\r
183 bcs 0f\r
184 strb r0,[r2,r1]!\r
185 mov r0,r0,lsr #8\r
186 strb r0,[r2,#1]\r
187 bx lr\r
188\r
1890:\r
190 stmfd sp!,{r8,r9,lr}\r
191 mov r8,r0\r
192 mov r9,r1\r
193 bl z80_xmap_write8\r
194 mov r0,r8,lsr #8\r
195 add r1,r9,#1\r
196 bl z80_xmap_write8\r
197 ldmfd sp!,{r8,r9,pc}\r
198\r
199z80_xmap_rebase_pc:\r
200 ldr r1,[cpucontext,#z80_read8]\r
201 mov r2,r0,lsr #Z80_MEM_SHIFT\r
202 ldr r1,[r1,r2,lsl #2]\r
203 movs r1,r1,lsl #1\r
204 strcc r1,[cpucontext,#z80pc_base]\r
205 addcc z80pc,r1,r0\r
206 bxcc lr\r
207\r
208z80_bad_jump:\r
209 stmfd sp!,{r3,r12,lr}\r
210 mov lr,pc\r
211 ldr pc,[cpucontext,#z80_rebasePC]\r
212 mov z80pc,r0\r
213 ldmfd sp!,{r3,r12,pc}\r
214\r
215z80_xmap_rebase_sp:\r
216 ldr r1,[cpucontext,#z80_read8]\r
217 sub r2,r0,#1\r
218 mov r2,r2,lsl #16\r
219 mov r2,r2,lsr #(Z80_MEM_SHIFT+16)\r
220 ldr r1,[r1,r2,lsl #2]\r
221 movs r1,r1,lsl #1\r
222 strcc r1,[cpucontext,#z80sp_base]\r
223 addcc z80sp,r1,r0\r
224 bxcc lr\r
225\r
226 stmfd sp!,{r3,r12,lr}\r
227 mov lr,pc\r
228 ldr pc,[cpucontext,#z80_rebaseSP]\r
229 mov z80sp,r0\r
230 ldmfd sp!,{r3,r12,pc}\r
231 \r
232.endif @ DRZ80_XMAP\r
233\r
234\r
235.macro fetch cycs\r
236 subs z80_icount,z80_icount,#\cycs\r
237.if UPDATE_CONTEXT\r
238 str z80pc,[cpucontext,#z80pc_pointer]\r
239 str z80_icount,[cpucontext,#cycles_pointer]\r
240 ldr r1,[cpucontext,#z80pc_base]\r
241 sub r2,z80pc,r1\r
242 str r2,[cpucontext,#previouspc]\r
243.endif\r
244 ldrplb r0,[z80pc],#1\r
245 ldrpl pc,[opcodes,r0, lsl #2]\r
246 bmi z80_execute_end\r
247.endm\r
248\r
249.macro eatcycles cycs\r
250 sub z80_icount,z80_icount,#\cycs\r
251.if UPDATE_CONTEXT\r
252 str z80_icount,[cpucontext,#cycles_pointer]\r
253.endif\r
254.endm\r
255\r
256.macro readmem8\r
257.if UPDATE_CONTEXT\r
258 str z80pc,[cpucontext,#z80pc_pointer]\r
259.endif\r
260.if DRZ80_XMAP\r
261.if !DRZ80_XMAP_MORE_INLINE\r
262 ldr r1,[cpucontext,#z80_read8]\r
263 mov r2,r0,lsr #Z80_MEM_SHIFT\r
264 ldr r1,[r1,r2,lsl #2]\r
265 movs r1,r1,lsl #1\r
266 ldrccb r0,[r1,r0]\r
267 blcs z80_xmap_read8_handler\r
268.else\r
269 bl z80_xmap_read8\r
270.endif\r
271.else ;@ if !DRZ80_XMAP\r
272 stmfd sp!,{r3,r12}\r
273 mov lr,pc\r
274 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
275 ldmfd sp!,{r3,r12}\r
276.endif\r
277.endm\r
278\r
279.macro readmem8HL\r
280 mov r0,z80hl, lsr #16\r
281 readmem8\r
282.endm\r
283\r
284.macro readmem16\r
285.if UPDATE_CONTEXT\r
286 str z80pc,[cpucontext,#z80pc_pointer]\r
287.endif\r
288.if DRZ80_XMAP\r
289 bl z80_xmap_read16\r
290.else\r
291 stmfd sp!,{r3,r12}\r
292 mov lr,pc\r
293 ldr pc,[cpucontext,#z80_read16]\r
294 ldmfd sp!,{r3,r12}\r
295.endif\r
296.endm\r
297\r
298.macro writemem8\r
299.if UPDATE_CONTEXT\r
300 str z80pc,[cpucontext,#z80pc_pointer]\r
301.endif\r
302.if DRZ80_XMAP\r
303.if DRZ80_XMAP_MORE_INLINE\r
304 ldr r2,[cpucontext,#z80_write8]\r
305 mov lr,r1,lsr #Z80_MEM_SHIFT\r
306 ldr r2,[r2,lr,lsl #2]\r
307 movs r2,r2,lsl #1\r
308 strccb r0,[r2,r1]\r
309 blcs z80_xmap_write8_handler\r
310.else\r
311 bl z80_xmap_write8\r
312.endif\r
313.else ;@ if !DRZ80_XMAP\r
314 stmfd sp!,{r3,r12}\r
315 mov lr,pc\r
316 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
317 ldmfd sp!,{r3,r12}\r
318.endif\r
319.endm\r
320\r
321.macro writemem8DE\r
322 mov r1,z80de, lsr #16\r
323 writemem8\r
324.endm\r
325\r
326.macro writemem8HL\r
327 mov r1,z80hl, lsr #16\r
328 writemem8\r
329.endm\r
330\r
331.macro writemem16\r
332.if UPDATE_CONTEXT\r
333 str z80pc,[cpucontext,#z80pc_pointer]\r
334.endif\r
335.if DRZ80_XMAP\r
336 bl z80_xmap_write16\r
337.else\r
338 stmfd sp!,{r3,r12}\r
339 mov lr,pc\r
340 ldr pc,[cpucontext,#z80_write16] ;@ r0=data r1=addr\r
341 ldmfd sp!,{r3,r12}\r
342.endif\r
343.endm\r
344\r
345.macro copymem8HL_DE\r
346.if UPDATE_CONTEXT\r
347 str z80pc,[cpucontext,#z80pc_pointer]\r
348.endif\r
349 mov r0,z80hl, lsr #16\r
350.if DRZ80_XMAP\r
351 bl z80_xmap_read8\r
352.else\r
353 stmfd sp!,{r3,r12}\r
354 mov lr,pc\r
355 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
356.endif\r
357 mov r1,z80de, lsr #16\r
358.if DRZ80_XMAP\r
359 bl z80_xmap_write8\r
360.else\r
361 mov lr,pc\r
362 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
363 ldmfd sp!,{r3,r12}\r
364.endif\r
365.endm\r
366;@---------------------------------------\r
367\r
368.macro rebasepc\r
369.if UPDATE_CONTEXT\r
370 str z80pc,[cpucontext,#z80pc_pointer]\r
371.endif\r
372.if DRZ80_XMAP\r
373 bl z80_xmap_rebase_pc\r
374.else\r
375 stmfd sp!,{r3,r12}\r
376 mov lr,pc\r
377 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
378 ldmfd sp!,{r3,r12}\r
379 mov z80pc,r0\r
380.endif\r
381.endm\r
382\r
383.macro rebasesp\r
384.if UPDATE_CONTEXT\r
385 str z80pc,[cpucontext,#z80pc_pointer]\r
386.endif\r
387.if DRZ80_XMAP\r
388 bl z80_xmap_rebase_sp\r
389.else\r
390 stmfd sp!,{r3,r12}\r
391 mov lr,pc\r
392 ldr pc,[cpucontext,#z80_rebaseSP] ;@ external function must rebase sp\r
393 ldmfd sp!,{r3,r12}\r
394 mov z80sp,r0\r
395.endif\r
396.endm\r
397;@----------------------------------------------------------------------------\r
398\r
399.macro opADC\r
400 movs z80f,z80f,lsr#2 ;@ get C\r
401 subcs r0,r0,#0x100\r
402 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of half carry\r
403 adcs z80a,z80a,r0,ror#8\r
404 mrs r0,cpsr ;@ S,Z,V&C\r
405 eor z80f,z80f,z80a,lsr#24\r
406 and z80f,z80f,#1<<HFlag ;@ H, correct\r
407 orr z80f,z80f,r0,lsr#28\r
408.endm\r
409\r
410.macro opADCA\r
411 movs z80f,z80f,lsr#2 ;@ get C\r
412 orrcs z80a,z80a,#0x00800000\r
413 adds z80a,z80a,z80a\r
414 mrs z80f,cpsr ;@ S,Z,V&C\r
415 mov z80f,z80f,lsr#28\r
416 tst z80a,#0x10000000 ;@ H, correct\r
417 orrne z80f,z80f,#1<<HFlag\r
418 fetch 4\r
419.endm\r
420\r
421.macro opADCH reg\r
422 mov r0,\reg,lsr#24\r
423 opADC\r
424 fetch 4\r
425.endm\r
426\r
427.macro opADCL reg\r
428 movs z80f,z80f,lsr#2 ;@ get C\r
429 adc r0,\reg,\reg,lsr#15\r
430 orrcs z80a,z80a,#0x00800000\r
431 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
432 adds z80a,z80a,r0,lsl#23\r
433 mrs z80f,cpsr ;@ S,Z,V&C\r
434 mov z80f,z80f,lsr#28\r
435 cmn r1,r0,lsl#27\r
436 orrcs z80f,z80f,#1<<HFlag ;@ H, correct\r
437 fetch 4\r
438.endm\r
439\r
440.macro opADCb\r
441 opADC\r
442.endm\r
443;@---------------------------------------\r
444\r
445.macro opADD reg shift\r
446 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
447 adds z80a,z80a,\reg,lsl#\shift\r
448 mrs z80f,cpsr ;@ S,Z,V&C\r
449 mov z80f,z80f,lsr#28\r
450 cmn r1,\reg,lsl#\shift+4\r
451 orrcs z80f,z80f,#1<<HFlag\r
452.endm\r
453\r
454.macro opADDA\r
455 adds z80a,z80a,z80a\r
456 mrs z80f,cpsr ;@ S,Z,V&C\r
457 mov z80f,z80f,lsr#28\r
458 tst z80a,#0x10000000 ;@ H, correct\r
459 orrne z80f,z80f,#1<<HFlag\r
460 fetch 4\r
461.endm\r
462\r
463.macro opADDH reg\r
464 and r0,\reg,#0xFF000000\r
465 opADD r0 0\r
466 fetch 4\r
467.endm\r
468\r
469.macro opADDL reg\r
470 opADD \reg 8\r
471 fetch 4\r
472.endm\r
473\r
474.macro opADDb \r
475 opADD r0 24\r
476.endm\r
477;@---------------------------------------\r
478\r
479.macro opADC16 reg\r
480 movs z80f,z80f,lsr#2 ;@ get C\r
481 adc r0,z80a,\reg,lsr#15\r
482 orrcs z80hl,z80hl,#0x00008000\r
483 mov r1,z80hl,lsl#4\r
484 adds z80hl,z80hl,r0,lsl#15\r
485 mrs z80f,cpsr ;@ S, Z, V & C\r
486 mov z80f,z80f,lsr#28\r
487 cmn r1,r0,lsl#19\r
488 orrcs z80f,z80f,#1<<HFlag\r
489 fetch 15\r
490.endm\r
491\r
492.macro opADC16HL\r
493 movs z80f,z80f,lsr#2 ;@ get C\r
494 orrcs z80hl,z80hl,#0x00008000\r
495 adds z80hl,z80hl,z80hl\r
496 mrs z80f,cpsr ;@ S, Z, V & C\r
497 mov z80f,z80f,lsr#28\r
498 tst z80hl,#0x10000000 ;@ H, correct.\r
499 orrne z80f,z80f,#1<<HFlag\r
500 fetch 15\r
501.endm\r
502\r
503.macro opADD16 reg1 reg2\r
504 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
505 adds \reg1,\reg1,\reg2\r
506 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
507 orrcs z80f,z80f,#1<<CFlag\r
508 cmn r1,\reg2,lsl#4\r
509 orrcs z80f,z80f,#1<<HFlag\r
510.endm\r
511\r
512.macro opADD16s reg1 reg2 shift\r
513 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
514 adds \reg1,\reg1,\reg2,lsl#\shift\r
515 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
516 orrcs z80f,z80f,#1<<CFlag\r
517 cmn r1,\reg2,lsl#4+\shift\r
518 orrcs z80f,z80f,#1<<HFlag\r
519.endm\r
520\r
521.macro opADD16_2 reg\r
522 adds \reg,\reg,\reg\r
523 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
524 orrcs z80f,z80f,#1<<CFlag\r
525 tst \reg,#0x10000000 ;@ H, correct.\r
526 orrne z80f,z80f,#1<<HFlag\r
527.endm\r
528;@---------------------------------------\r
529\r
530.macro opAND reg shift\r
531 and z80a,z80a,\reg,lsl#\shift\r
532 sub r0,opcodes,#0x100\r
533 ldrb z80f,[r0,z80a, lsr #24]\r
534 orr z80f,z80f,#1<<HFlag\r
535.endm\r
536\r
537.macro opANDA\r
538 sub r0,opcodes,#0x100\r
539 ldrb z80f,[r0,z80a, lsr #24]\r
540 orr z80f,z80f,#1<<HFlag\r
541 fetch 4\r
542.endm\r
543\r
544.macro opANDH reg\r
545 opAND \reg 0\r
546 fetch 4\r
547.endm\r
548\r
549.macro opANDL reg\r
550 opAND \reg 8\r
551 fetch 4\r
552.endm\r
553\r
554.macro opANDb\r
555 opAND r0 24\r
556.endm\r
557;@---------------------------------------\r
558\r
559.macro opBITH reg bit\r
560 and z80f,z80f,#1<<CFlag\r
561 tst \reg,#1<<(24+\bit)\r
562 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
563 orrne z80f,z80f,#(1<<HFlag)\r
564 fetch 8\r
565.endm\r
566\r
567.macro opBIT7H reg\r
568 and z80f,z80f,#1<<CFlag\r
569 tst \reg,#1<<(24+7)\r
570 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
571 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
572 fetch 8\r
573.endm\r
574\r
575.macro opBITL reg bit\r
576 and z80f,z80f,#1<<CFlag\r
577 tst \reg,#1<<(16+\bit)\r
578 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
579 orrne z80f,z80f,#(1<<HFlag)\r
580 fetch 8\r
581.endm\r
582\r
583.macro opBIT7L reg\r
584 and z80f,z80f,#1<<CFlag\r
585 tst \reg,#1<<(16+7)\r
586 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
587 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
588 fetch 8\r
589.endm\r
590\r
591.macro opBITb bit\r
592 and z80f,z80f,#1<<CFlag\r
593 tst r0,#1<<\bit\r
594 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
595 orrne z80f,z80f,#(1<<HFlag)\r
596.endm\r
597\r
598.macro opBIT7b\r
599 and z80f,z80f,#1<<CFlag\r
600 tst r0,#1<<7\r
601 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
602 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
603.endm\r
604;@---------------------------------------\r
605\r
606.macro opCP reg shift\r
607 mov r1,z80a,lsl#4 ;@ prepare for check of half carry\r
608 cmp z80a,\reg,lsl#\shift\r
609 mrs z80f,cpsr\r
610 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
611 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
612 cmp r1,\reg,lsl#\shift+4\r
613 orrcc z80f,z80f,#1<<HFlag\r
614.endm\r
615\r
616.macro opCPA\r
617 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
618 fetch 4\r
619.endm\r
620\r
621.macro opCPH reg\r
622 and r0,\reg,#0xFF000000\r
623 opCP r0 0\r
624 fetch 4\r
625.endm\r
626\r
627.macro opCPL reg\r
628 opCP \reg 8\r
629 fetch 4\r
630.endm\r
631\r
632.macro opCPb\r
633 opCP r0 24\r
634.endm\r
635;@---------------------------------------\r
636\r
637.macro opDEC8 reg ;@for A and memory\r
638 and z80f,z80f,#1<<CFlag ;@save carry\r
639 orr z80f,z80f,#1<<NFlag ;@set n\r
640 tst \reg,#0x0f000000\r
641 orreq z80f,z80f,#1<<HFlag\r
642 subs \reg,\reg,#0x01000000\r
643 orrmi z80f,z80f,#1<<SFlag\r
644 orrvs z80f,z80f,#1<<VFlag\r
645 orreq z80f,z80f,#1<<ZFlag\r
646.endm\r
647\r
648.macro opDEC8H reg ;@for B, D & H\r
649 and z80f,z80f,#1<<CFlag ;@save carry\r
650 orr z80f,z80f,#1<<NFlag ;@set n\r
651 tst \reg,#0x0f000000\r
652 orreq z80f,z80f,#1<<HFlag\r
653 subs \reg,\reg,#0x01000000\r
654 orrmi z80f,z80f,#1<<SFlag\r
655 orrvs z80f,z80f,#1<<VFlag\r
656 tst \reg,#0xff000000 ;@Z\r
657 orreq z80f,z80f,#1<<ZFlag\r
658.endm\r
659\r
660.macro opDEC8L reg ;@for C, E & L\r
661 mov \reg,\reg,ror#24\r
662 opDEC8H \reg\r
663 mov \reg,\reg,ror#8\r
664.endm\r
665\r
666.macro opDEC8b ;@for memory\r
667 mov r0,r0,lsl#24\r
668 opDEC8 r0\r
669 mov r0,r0,lsr#24\r
670.endm\r
671;@---------------------------------------\r
672\r
673.macro opIN\r
674 stmfd sp!,{r3,r12}\r
675 mov lr,pc\r
676 ldr pc,[cpucontext,#z80_in] ;@ r0=port - data returned in r0\r
677 ldmfd sp!,{r3,r12}\r
678.endm\r
679\r
680.macro opIN_C\r
681 mov r0,z80bc, lsr #16\r
682 opIN\r
683.endm\r
684;@---------------------------------------\r
685\r
686.macro opINC8 reg ;@for A and memory\r
687 and z80f,z80f,#1<<CFlag ;@save carry, clear n\r
688 adds \reg,\reg,#0x01000000\r
689 orrmi z80f,z80f,#1<<SFlag\r
690 orrvs z80f,z80f,#1<<VFlag\r
691 orrcs z80f,z80f,#1<<ZFlag ;@cs when going from 0xFF to 0x00\r
692 tst \reg,#0x0f000000\r
693 orreq z80f,z80f,#1<<HFlag\r
694.endm\r
695\r
696.macro opINC8H reg ;@for B, D & H\r
697 opINC8 \reg\r
698.endm\r
699\r
700.macro opINC8L reg ;@for C, E & L\r
701 mov \reg,\reg,ror#24\r
702 opINC8 \reg\r
703 mov \reg,\reg,ror#8\r
704.endm\r
705\r
706.macro opINC8b ;@for memory\r
707 mov r0,r0,lsl#24\r
708 opINC8 r0\r
709 mov r0,r0,lsr#24\r
710.endm\r
711;@---------------------------------------\r
712\r
713.macro opOR reg shift\r
714 orr z80a,z80a,\reg,lsl#\shift\r
715 sub r0,opcodes,#0x100\r
716 ldrb z80f,[r0,z80a, lsr #24]\r
717.endm\r
718\r
719.macro opORA\r
720 sub r0,opcodes,#0x100\r
721 ldrb z80f,[r0,z80a, lsr #24]\r
722 fetch 4\r
723.endm\r
724\r
725.macro opORH reg\r
726 and r0,\reg,#0xFF000000\r
727 opOR r0 0\r
728 fetch 4\r
729.endm\r
730\r
731.macro opORL reg\r
732 opOR \reg 8\r
733 fetch 4\r
734.endm\r
735\r
736.macro opORb\r
737 opOR r0 24\r
738.endm\r
739;@---------------------------------------\r
740\r
741.macro opOUT\r
742 stmfd sp!,{r3,r12}\r
743 mov lr,pc\r
744 ldr pc,[cpucontext,#z80_out] ;@ r0=port r1=data\r
745 ldmfd sp!,{r3,r12}\r
746.endm\r
747\r
748.macro opOUT_C\r
749 mov r0,z80bc, lsr #16\r
750 opOUT\r
751.endm\r
752;@---------------------------------------\r
753\r
754.macro opPOP\r
755.if FAST_Z80SP\r
756 ldrb r0,[z80sp],#1\r
757 ldrb r1,[z80sp],#1\r
758 orr r0,r0,r1, lsl #8\r
759.else\r
760 mov r0,z80sp\r
761 readmem16\r
762 add z80sp,z80sp,#2\r
763.endif\r
764.endm\r
765\r
766.macro opPOPreg reg\r
767 opPOP\r
768 mov \reg,r0, lsl #16\r
769 fetch 10\r
770.endm\r
771;@---------------------------------------\r
772\r
773.macro stack_check\r
774 @ try to protect against stack overflows, lock into current bank\r
775 ldr r1,[cpucontext,#z80sp_base]\r
776 sub r1,z80sp,r1\r
777 cmp r1,#2\r
778 addlt z80sp,z80sp,#1<<Z80_MEM_SHIFT\r
779.endm\r
780\r
781.macro opPUSHareg reg @ reg > r1\r
782.if FAST_Z80SP\r
783.if DRZ80_XMAP\r
784 stack_check\r
785.endif\r
786 mov r1,\reg, lsr #8\r
787 strb r1,[z80sp,#-1]!\r
788 strb \reg,[z80sp,#-1]!\r
789.else\r
790 mov r0,\reg\r
791 sub z80sp,z80sp,#2\r
792 mov r1,z80sp\r
793 writemem16\r
794.endif\r
795.endm\r
796\r
797.macro opPUSHreg reg\r
798.if FAST_Z80SP\r
799.if DRZ80_XMAP\r
800 stack_check\r
801.endif\r
802 mov r1,\reg, lsr #24\r
803 strb r1,[z80sp,#-1]!\r
804 mov r1,\reg, lsr #16\r
805 strb r1,[z80sp,#-1]!\r
806.else\r
807 mov r0,\reg,lsr #16\r
808 sub z80sp,z80sp,#2\r
809 mov r1,z80sp\r
810 writemem16\r
811.endif\r
812.endm\r
813;@---------------------------------------\r
814\r
815.macro opRESmemHL bit\r
816 mov r0,z80hl, lsr #16\r
817.if DRZ80_XMAP\r
818 bl z80_xmap_read8\r
819 bic r0,r0,#1<<\bit\r
820 mov r1,z80hl, lsr #16\r
821 bl z80_xmap_write8\r
822.else\r
823 stmfd sp!,{r3,r12}\r
824 mov lr,pc\r
825 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
826 bic r0,r0,#1<<\bit\r
827 mov r1,z80hl, lsr #16\r
828 mov lr,pc\r
829 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
830 ldmfd sp!,{r3,r12}\r
831.endif\r
832 fetch 15\r
833.endm\r
834;@---------------------------------------\r
835\r
836.macro opRESmem bit\r
837.if DRZ80_XMAP\r
838 stmfd sp!,{r0} ;@ save addr as well\r
839 bl z80_xmap_read8\r
840 bic r0,r0,#1<<\bit\r
841 ldmfd sp!,{r1} ;@ restore addr into r1\r
842 bl z80_xmap_write8\r
843.else\r
844 stmfd sp!,{r3,r12}\r
845 stmfd sp!,{r0} ;@ save addr as well\r
846 mov lr,pc\r
847 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
848 bic r0,r0,#1<<\bit\r
849 ldmfd sp!,{r1} ;@ restore addr into r1\r
850 mov lr,pc\r
851 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
852 ldmfd sp!,{r3,r12}\r
853.endif\r
854 fetch 23\r
855.endm\r
856;@---------------------------------------\r
857\r
858.macro opRL reg1 reg2 shift\r
859 movs \reg1,\reg2,lsl \shift\r
860 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
861 orrne \reg1,\reg1,#0x01000000\r
862;@ and r2,z80f,#1<<CFlag\r
863;@ orr $x,$x,r2,lsl#23\r
864 sub r1,opcodes,#0x100\r
865 ldrb z80f,[r1,\reg1,lsr#24] ;@get PZS\r
866 orrcs z80f,z80f,#1<<CFlag\r
867.endm\r
868\r
869.macro opRLA\r
870 opRL z80a, z80a, #1\r
871 fetch 8\r
872.endm\r
873\r
874.macro opRLH reg\r
875 and r0,\reg,#0xFF000000 ;@mask high to r0\r
876 adds \reg,\reg,r0\r
877 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
878 orrne \reg,\reg,#0x01000000\r
879 sub r1,opcodes,#0x100\r
880 ldrb z80f,[r1,\reg,lsr#24] ;@get PZS\r
881 orrcs z80f,z80f,#1<<CFlag\r
882 fetch 8\r
883.endm\r
884\r
885.macro opRLL reg\r
886 opRL r0, \reg, #9\r
887 and \reg,\reg,#0xFF000000 ;@mask out high\r
888 orr \reg,\reg,r0,lsr#8\r
889 fetch 8\r
890.endm\r
891\r
892.macro opRLb\r
893 opRL r0, r0, #25\r
894 mov r0,r0,lsr#24\r
895.endm\r
896;@---------------------------------------\r
897\r
898.macro opRLC reg1 reg2 shift\r
899 movs \reg1,\reg2,lsl#\shift\r
900 orrcs \reg1,\reg1,#0x01000000\r
901 sub r1,opcodes,#0x100\r
902 ldrb z80f,[r1,\reg1,lsr#24]\r
903 orrcs z80f,z80f,#1<<CFlag\r
904.endm\r
905\r
906.macro opRLCA\r
907 opRLC z80a, z80a, 1\r
908 fetch 8\r
909.endm\r
910\r
911.macro opRLCH reg\r
912 and r0,\reg,#0xFF000000 ;@mask high to r0\r
913 adds \reg,\reg,r0\r
914 orrcs \reg,\reg,#0x01000000\r
915 sub r1,opcodes,#0x100\r
916 ldrb z80f,[r1,\reg,lsr#24]\r
917 orrcs z80f,z80f,#1<<CFlag\r
918 fetch 8\r
919.endm\r
920\r
921.macro opRLCL reg\r
922 opRLC r0, \reg, 9\r
923 and \reg,\reg,#0xFF000000 ;@mask out high\r
924 orr \reg,\reg,r0,lsr#8\r
925 fetch 8\r
926.endm\r
927\r
928.macro opRLCb\r
929 opRLC r0, r0, 25\r
930 mov r0,r0,lsr#24\r
931.endm\r
932;@---------------------------------------\r
933\r
934.macro opRR reg1 reg2 shift\r
935 movs \reg1,\reg2,lsr#\shift\r
936 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
937 orrne \reg1,\reg1,#0x00000080\r
938;@ and r2,z80_f,#PSR_C\r
939;@ orr \reg1,\reg1,r2,lsl#6\r
940 sub r1,opcodes,#0x100\r
941 ldrb z80f,[r1,\reg1]\r
942 orrcs z80f,z80f,#1<<CFlag\r
943.endm\r
944\r
945.macro opRRA\r
946 orr z80a,z80a,z80f,lsr#1 ;@get C\r
947 movs z80a,z80a,ror#25\r
948 mov z80a,z80a,lsl#24\r
949 sub r1,opcodes,#0x100\r
950 ldrb z80f,[r1,z80a,lsr#24]\r
951 orrcs z80f,z80f,#1<<CFlag\r
952 fetch 8\r
953.endm\r
954\r
955.macro opRRH reg\r
956 orr r0,\reg,z80f,lsr#1 ;@get C\r
957 movs r0,r0,ror#25\r
958 and \reg,\reg,#0x00FF0000 ;@mask out low\r
959 orr \reg,\reg,r0,lsl#24\r
960 sub r1,opcodes,#0x100\r
961 ldrb z80f,[r1,\reg,lsr#24]\r
962 orrcs z80f,z80f,#1<<CFlag\r
963 fetch 8\r
964.endm\r
965\r
966.macro opRRL reg\r
967 and r0,\reg,#0x00FF0000 ;@mask out low to r0\r
968 opRR r0 r0 17\r
969 and \reg,\reg,#0xFF000000 ;@mask out high\r
970 orr \reg,\reg,r0,lsl#16\r
971 fetch 8\r
972.endm\r
973\r
974.macro opRRb\r
975 opRR r0 r0 1\r
976.endm\r
977;@---------------------------------------\r
978\r
979.macro opRRC reg1 reg2 shift\r
980 movs \reg1,\reg2,lsr#\shift\r
981 orrcs \reg1,\reg1,#0x00000080\r
982 sub r1,opcodes,#0x100\r
983 ldrb z80f,[r1,\reg1]\r
984 orrcs z80f,z80f,#1<<CFlag\r
985.endm\r
986\r
987.macro opRRCA\r
988 opRRC z80a, z80a, 25\r
989 mov z80a,z80a,lsl#24\r
990 fetch 8\r
991.endm\r
992\r
993.macro opRRCH reg\r
994 opRRC r0, \reg, 25\r
995 and \reg,\reg,#0x00FF0000 ;@mask out low\r
996 orr \reg,\reg,r0,lsl#24\r
997 fetch 8\r
998.endm\r
999\r
1000.macro opRRCL reg\r
1001 and r0,\reg,#0x00FF0000 ;@mask low to r0\r
1002 opRRC r0, r0, 17\r
1003 and \reg,\reg,#0xFF000000 ;@mask out high\r
1004 orr \reg,\reg,r0,lsl#16\r
1005 fetch 8\r
1006.endm\r
1007\r
1008.macro opRRCb\r
1009 opRRC r0, r0, 1\r
1010.endm\r
1011;@---------------------------------------\r
1012\r
1013.macro opRST addr\r
1014 ldr r0,[cpucontext,#z80pc_base]\r
1015 sub r2,z80pc,r0\r
1016 opPUSHareg r2\r
1017 mov r0,#\addr\r
1018 rebasepc\r
1019 fetch 11\r
1020.endm\r
1021;@---------------------------------------\r
1022\r
1023.macro opSBC\r
1024 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1025 movs z80f,z80f,lsr#2 ;@ get C\r
1026 subcc r0,r0,#0x100\r
1027 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of H\r
1028 sbcs z80a,z80a,r0,ror#8\r
1029 mrs r0,cpsr\r
1030 eor z80f,z80f,z80a,lsr#24\r
1031 and z80f,z80f,#1<<HFlag ;@ H, correct\r
1032 orr z80f,z80f,r0,lsr#28 ;@ S,Z,V&C\r
1033 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1034.endm\r
1035\r
1036.macro opSBCA\r
1037 movs z80f,z80f,lsr#2 ;@ get C\r
1038 movcc z80a,#0x00000000\r
1039 movcs z80a,#0xFF000000\r
1040 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1041 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1042 fetch 4\r
1043.endm\r
1044\r
1045.macro opSBCH reg\r
1046 mov r0,\reg,lsr#24\r
1047 opSBC\r
1048 fetch 4\r
1049.endm\r
1050\r
1051.macro opSBCL reg\r
1052 mov r0,\reg,lsl#8\r
1053 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1054 movs z80f,z80f,lsr#2 ;@ get C\r
1055 sbccc r0,r0,#0xFF000000\r
1056 mov r1,z80a,lsl#4 ;@ prepare for check of H\r
1057 sbcs z80a,z80a,r0\r
1058 mrs z80f,cpsr\r
1059 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1060 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1061 cmp r1,r0,lsl#4\r
1062 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1063 fetch 4\r
1064.endm\r
1065\r
1066.macro opSBCb\r
1067 opSBC\r
1068.endm\r
1069;@---------------------------------------\r
1070\r
1071.macro opSBC16 reg\r
1072 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1073 movs z80f,z80f,lsr#2 ;@ get C\r
1074 sbc r1,r1,r1 ;@ set r1 to -1 or 0.\r
1075 orr r0,\reg,r1,lsr#16\r
1076 mov r1,z80hl,lsl#4 ;@ prepare for check of H\r
1077 sbcs z80hl,z80hl,r0\r
1078 mrs z80f,cpsr\r
1079 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1080 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1081 cmp r1,r0,lsl#4\r
1082 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1083 fetch 15\r
1084.endm\r
1085\r
1086.macro opSBC16HL\r
1087 movs z80f,z80f,lsr#2 ;@ get C\r
1088 mov z80hl,#0x00000000\r
1089 subcs z80hl,z80hl,#0x00010000\r
1090 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1091 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1092 fetch 15\r
1093.endm\r
1094;@---------------------------------------\r
1095\r
1096.macro opSETmemHL bit\r
1097 mov r0,z80hl, lsr #16\r
1098.if DRZ80_XMAP\r
1099 bl z80_xmap_read8\r
1100 orr r0,r0,#1<<\bit\r
1101 mov r1,z80hl, lsr #16\r
1102 bl z80_xmap_write8\r
1103.else\r
1104 stmfd sp!,{r3,r12}\r
1105 mov lr,pc\r
1106 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
1107 orr r0,r0,#1<<\bit\r
1108 mov r1,z80hl, lsr #16\r
1109 mov lr,pc\r
1110 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1111 ldmfd sp!,{r3,r12}\r
1112.endif\r
1113 fetch 15\r
1114.endm\r
1115;@---------------------------------------\r
1116\r
1117.macro opSETmem bit\r
1118.if DRZ80_XMAP\r
1119 stmfd sp!,{r0} ;@ save addr as well\r
1120 bl z80_xmap_read8\r
1121 orr r0,r0,#1<<\bit\r
1122 ldmfd sp!,{r1} ;@ restore addr into r1\r
1123 bl z80_xmap_write8\r
1124.else\r
1125 stmfd sp!,{r3,r12}\r
1126 stmfd sp!,{r0} ;@ save addr as well\r
1127 mov lr,pc\r
1128 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
1129 orr r0,r0,#1<<\bit\r
1130 ldmfd sp!,{r1} ;@ restore addr into r1\r
1131 mov lr,pc\r
1132 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1133 ldmfd sp!,{r3,r12}\r
1134.endif\r
1135 fetch 23\r
1136.endm\r
1137;@---------------------------------------\r
1138\r
1139.macro opSLA reg1 reg2 shift\r
1140 movs \reg1,\reg2,lsl#\shift\r
1141 sub r1,opcodes,#0x100\r
1142 ldrb z80f,[r1,\reg1,lsr#24]\r
1143 orrcs z80f,z80f,#1<<CFlag\r
1144.endm\r
1145\r
1146.macro opSLAA\r
1147 opSLA z80a, z80a, 1\r
1148 fetch 8\r
1149.endm\r
1150\r
1151.macro opSLAH reg\r
1152 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1153 adds \reg,\reg,r0\r
1154 sub r1,opcodes,#0x100\r
1155 ldrb z80f,[r1,\reg,lsr#24]\r
1156 orrcs z80f,z80f,#1<<CFlag\r
1157 fetch 8\r
1158.endm\r
1159\r
1160.macro opSLAL reg\r
1161 opSLA r0, \reg, 9\r
1162 and \reg,\reg,#0xFF000000 ;@mask out high\r
1163 orr \reg,\reg,r0,lsr#8\r
1164 fetch 8\r
1165.endm\r
1166\r
1167.macro opSLAb\r
1168 opSLA r0, r0, 25\r
1169 mov r0,r0,lsr#24\r
1170.endm\r
1171;@---------------------------------------\r
1172\r
1173.macro opSLL reg1 reg2 shift\r
1174 movs \reg1,\reg2,lsl#\shift\r
1175 orr \reg1,\reg1,#0x01000000\r
1176 sub r1,opcodes,#0x100\r
1177 ldrb z80f,[r1,\reg1,lsr#24]\r
1178 orrcs z80f,z80f,#1<<CFlag\r
1179.endm\r
1180\r
1181.macro opSLLA\r
1182 opSLL z80a, z80a, 1\r
1183 fetch 8\r
1184.endm\r
1185\r
1186.macro opSLLH reg\r
1187 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1188 adds \reg,\reg,r0\r
1189 orr \reg,\reg,#0x01000000\r
1190 sub r1,opcodes,#0x100\r
1191 ldrb z80f,[r1,\reg,lsr#24]\r
1192 orrcs z80f,z80f,#1<<CFlag\r
1193 fetch 8\r
1194.endm\r
1195\r
1196.macro opSLLL reg\r
1197 opSLL r0, \reg, 9\r
1198 and \reg,\reg,#0xFF000000 ;@mask out high\r
1199 orr \reg,\reg,r0,lsr#8\r
1200 fetch 8\r
1201.endm\r
1202\r
1203.macro opSLLb\r
1204 opSLL r0, r0, 25\r
1205 mov r0,r0,lsr#24\r
1206.endm\r
1207;@---------------------------------------\r
1208\r
1209.macro opSRA reg1 reg2\r
1210 movs \reg1,\reg2,asr#25\r
1211 and \reg1,\reg1,#0xFF\r
1212 sub r1,opcodes,#0x100\r
1213 ldrb z80f,[r1,\reg1]\r
1214 orrcs z80f,z80f,#1<<CFlag\r
1215.endm\r
1216\r
1217.macro opSRAA\r
1218 movs r0,z80a,asr#25\r
1219 mov z80a,r0,lsl#24\r
1220 sub r1,opcodes,#0x100\r
1221 ldrb z80f,[r1,z80a,lsr#24]\r
1222 orrcs z80f,z80f,#1<<CFlag\r
1223 fetch 8\r
1224.endm\r
1225\r
1226.macro opSRAH reg\r
1227 movs r0,\reg,asr#25\r
1228 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1229 orr \reg,\reg,r0,lsl#24\r
1230 sub r1,opcodes,#0x100\r
1231 ldrb z80f,[r1,\reg,lsr#24]\r
1232 orrcs z80f,z80f,#1<<CFlag\r
1233 fetch 8\r
1234.endm\r
1235\r
1236.macro opSRAL reg\r
1237 mov r0,\reg,lsl#8\r
1238 opSRA r0, r0\r
1239 and \reg,\reg,#0xFF000000 ;@mask out high\r
1240 orr \reg,\reg,r0,lsl#16\r
1241 fetch 8\r
1242.endm\r
1243\r
1244.macro opSRAb\r
1245 mov r0,r0,lsl#24\r
1246 opSRA r0, r0\r
1247.endm\r
1248;@---------------------------------------\r
1249\r
1250.macro opSRL reg1 reg2 shift\r
1251 movs \reg1,\reg2,lsr#\shift\r
1252 sub r1,opcodes,#0x100\r
1253 ldrb z80f,[r1,\reg1]\r
1254 orrcs z80f,z80f,#1<<CFlag\r
1255.endm\r
1256\r
1257.macro opSRLA\r
1258 opSRL z80a, z80a, 25\r
1259 mov z80a,z80a,lsl#24\r
1260 fetch 8\r
1261.endm\r
1262\r
1263.macro opSRLH reg\r
1264 opSRL r0, \reg, 25\r
1265 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1266 orr \reg,\reg,r0,lsl#24\r
1267 fetch 8\r
1268.endm\r
1269\r
1270.macro opSRLL reg\r
1271 mov r0,\reg,lsl#8\r
1272 opSRL r0, r0, 25\r
1273 and \reg,\reg,#0xFF000000 ;@mask out high\r
1274 orr \reg,\reg,r0,lsl#16\r
1275 fetch 8\r
1276.endm\r
1277\r
1278.macro opSRLb\r
1279 opSRL r0, r0, 1\r
1280.endm\r
1281;@---------------------------------------\r
1282\r
1283.macro opSUB reg shift\r
1284 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
1285 subs z80a,z80a,\reg,lsl#\shift\r
1286 mrs z80f,cpsr\r
1287 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1288 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
1289 cmp r1,\reg,lsl#\shift+4\r
1290 orrcc z80f,z80f,#1<<HFlag\r
1291.endm\r
1292\r
1293.macro opSUBA\r
1294 mov z80a,#0\r
1295 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
1296 fetch 4\r
1297.endm\r
1298\r
1299.macro opSUBH reg\r
1300 and r0,\reg,#0xFF000000\r
1301 opSUB r0, 0\r
1302 fetch 4\r
1303.endm\r
1304\r
1305.macro opSUBL reg\r
1306 opSUB \reg, 8\r
1307 fetch 4\r
1308.endm\r
1309\r
1310.macro opSUBb\r
1311 opSUB r0, 24\r
1312.endm\r
1313;@---------------------------------------\r
1314\r
1315.macro opXOR reg shift\r
1316 eor z80a,z80a,\reg,lsl#\shift\r
1317 sub r0,opcodes,#0x100\r
1318 ldrb z80f,[r0,z80a, lsr #24]\r
1319.endm\r
1320\r
1321.macro opXORA\r
1322 mov z80a,#0\r
1323 mov z80f,#(1<<ZFlag)|(1<<VFlag)\r
1324 fetch 4\r
1325.endm\r
1326\r
1327.macro opXORH reg\r
1328 and r0,\reg,#0xFF000000\r
1329 opXOR r0, 0\r
1330 fetch 4\r
1331.endm\r
1332\r
1333.macro opXORL reg\r
1334 opXOR \reg, 8\r
1335 fetch 4\r
1336.endm\r
1337\r
1338.macro opXORb\r
1339 opXOR r0, 24\r
1340.endm\r
1341;@---------------------------------------\r
1342\r
1343\r
1344;@ --------------------------- Framework --------------------------\r
1345 \r
1346.text\r
1347\r
1348DrZ80Run:\r
1349 ;@ r0 = pointer to cpu context\r
1350 ;@ r1 = ISTATES to execute \r
1351 ;@######################################### \r
1352 stmdb sp!,{r4-r12,lr} ;@ save registers on stack\r
1353 mov cpucontext,r0 ;@ setup main memory pointer\r
1354 mov z80_icount,r1 ;@ setup number of Tstates to execute\r
1355\r
1356.if INTERRUPT_MODE == 0\r
1357 ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
1358.endif\r
1359 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1360\r
1361.if INTERRUPT_MODE == 0\r
1362 ;@ check ints\r
1363 tst r0,#(Z80_NMI<<8)\r
1364 blne DoNMI\r
1365 tst r0,#0xff\r
1366 movne r0,r0,lsr #8\r
1367 tstne r0,#Z80_IF1\r
1368 blne DoInterrupt\r
1369.endif\r
1370\r
1371 ldr opcodes,MAIN_opcodes_POINTER2\r
1372\r
1373 cmp z80_icount,#0 ;@ irq might have used all cycles\r
1374 ldrplb r0,[z80pc],#1\r
1375 ldrpl pc,[opcodes,r0, lsl #2]\r
1376\r
1377\r
1378z80_execute_end:\r
1379 ;@ save registers in CPU context\r
1380 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1381 mov r0,z80_icount\r
1382 ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
1383\r
1384MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
1385.if INTERRUPT_MODE\r
1386Interrupt_local: .word Interrupt\r
1387.endif\r
1388\r
1389DoInterrupt:\r
1390.if INTERRUPT_MODE\r
1391 ;@ Don't do own int handler, call mames instead\r
1392\r
1393 ;@ save everything back into DrZ80 context\r
1394 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1395 stmfd sp!,{r3,r4,r5,lr} ;@ save rest of regs on stack\r
1396 mov lr,pc\r
1397 ldr pc,Interrupt_local\r
1398 ldmfd sp!,{r3,r4,r5,lr} ;@ load regs from stack\r
1399 ;@ reload regs from DrZ80 context\r
1400 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1401 mov pc,lr ;@ return\r
1402.else\r
1403\r
1404 ;@ r0 == z80if\r
1405 stmfd sp!,{lr}\r
1406\r
1407 tst r0,#4 ;@ check halt\r
1408 addne z80pc,z80pc,#1\r
1409\r
1410 ldrb r1,[cpucontext,#z80im]\r
1411\r
1412 ;@ clear halt and int flags\r
1413 eor r0,r0,r0\r
1414 strb r0,[cpucontext,#z80if]\r
1415\r
1416 ;@ now check int mode\r
1417 cmp r1,#1\r
1418 beq DoInterrupt_mode1\r
1419 bgt DoInterrupt_mode2\r
1420\r
1421DoInterrupt_mode0:\r
1422 ;@ get 3 byte vector\r
1423 ldr r2,[cpucontext, #z80irqvector]\r
1424 and r1,r2,#0xFF0000\r
1425 cmp r1,#0xCD0000 ;@ call\r
1426 bne 1f\r
1427 ;@ ########\r
1428 ;@ # call\r
1429 ;@ ########\r
1430 ;@ save current pc on stack\r
1431 ldr r0,[cpucontext,#z80pc_base]\r
1432 sub r0,z80pc,r0\r
1433.if FAST_Z80SP\r
1434 mov r1,r0, lsr #8\r
1435 strb r1,[z80sp,#-1]!\r
1436 strb r0,[z80sp,#-1]!\r
1437.else\r
1438 sub z80sp,z80sp,#2\r
1439 mov r1,z80sp\r
1440 writemem16\r
1441 ldr r2,[cpucontext, #z80irqvector]\r
1442.endif\r
1443 ;@ jump to vector\r
1444 mov r2,r2,lsl#16\r
1445 mov r0,r2,lsr#16\r
1446 ;@ rebase new pc\r
1447 rebasepc\r
1448\r
1449 eatcycles 13\r
1450 b DoInterrupt_end\r
1451\r
14521:\r
1453 cmp r1,#0xC30000 ;@ jump\r
1454 bne DoInterrupt_mode1 ;@ rst\r
1455 ;@ #######\r
1456 ;@ # jump\r
1457 ;@ #######\r
1458 ;@ jump to vector\r
1459 mov r2,r2,lsl#16\r
1460 mov r0,r2,lsr#16\r
1461 ;@ rebase new pc\r
1462 rebasepc\r
1463\r
1464 eatcycles 13\r
1465 b DoInterrupt_end\r
1466\r
1467DoInterrupt_mode1:\r
1468 ldr r0,[cpucontext,#z80pc_base]\r
1469 sub r2,z80pc,r0\r
1470 opPUSHareg r2\r
1471 mov r0,#0x38\r
1472 rebasepc\r
1473\r
1474 eatcycles 13\r
1475 b DoInterrupt_end\r
1476\r
1477DoInterrupt_mode2:\r
1478 ;@ push pc on stack\r
1479 ldr r0,[cpucontext,#z80pc_base]\r
1480 sub r2,z80pc,r0\r
1481 opPUSHareg r2\r
1482\r
1483 ;@ get 1 byte vector address\r
1484 ldrb r0,[cpucontext, #z80irqvector]\r
1485 ldr r1,[cpucontext, #z80i]\r
1486 orr r0,r0,r1,lsr#16\r
1487\r
1488 ;@ read new pc from vector address\r
1489.if UPDATE_CONTEXT\r
1490 str z80pc,[cpucontext,#z80pc_pointer]\r
1491.endif\r
1492.if DRZ80_XMAP\r
1493 bl z80_xmap_read16\r
1494 rebasepc\r
1495.else\r
1496 stmfd sp!,{r3,r12}\r
1497 mov lr,pc\r
1498 ldr pc,[cpucontext,#z80_read16]\r
1499\r
1500 ;@ rebase new pc\r
1501 mov lr,pc\r
1502 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1503 ldmfd sp!,{r3,r12}\r
1504 mov z80pc,r0 \r
1505.endif\r
1506 eatcycles 17\r
1507\r
1508DoInterrupt_end:\r
1509 ;@ interupt accepted so callback irq interface\r
1510 ldr r0,[cpucontext, #z80irqcallback]\r
1511 tst r0,r0\r
1512 streqb r0,[cpucontext,#z80irq] ;@ default handling\r
1513 ldmeqfd sp!,{pc}\r
1514 stmfd sp!,{r3,r12}\r
1515 mov lr,pc\r
1516 mov pc,r0 ;@ call callback function\r
1517 ldmfd sp!,{r3,r12}\r
1518 ldmfd sp!,{pc} ;@ return\r
1519.endif\r
1520\r
1521DoNMI:\r
1522 stmfd sp!,{lr}\r
1523\r
1524 bic r0,r0,#((Z80_NMI|Z80_HALT|Z80_IF1)<<8)\r
1525 strh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
1526\r
1527 ;@ push pc on stack\r
1528 ldr r0,[cpucontext,#z80pc_base]\r
1529 sub r2,z80pc,r0\r
1530 opPUSHareg r2\r
1531\r
1532 ;@ read new pc from vector address\r
1533.if UPDATE_CONTEXT\r
1534 str z80pc,[cpucontext,#z80pc_pointer]\r
1535.endif\r
1536 mov r0,#0x66\r
1537.if DRZ80_XMAP\r
1538 rebasepc\r
1539.else\r
1540 stmfd sp!,{r3,r12}\r
1541 mov lr,pc\r
1542 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1543 ldmfd sp!,{r3,r12}\r
1544 mov z80pc,r0 \r
1545.endif\r
1546 ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
1547 eatcycles 11\r
1548 ldmfd sp!,{pc}\r
1549\r
1550\r
1551.data\r
1552.align 4\r
1553\r
1554DAATable: .hword (0x00<<8)|(1<<ZFlag)|(1<<VFlag)\r
1555 .hword (0x01<<8) \r
1556 .hword (0x02<<8) \r
1557 .hword (0x03<<8) |(1<<VFlag)\r
1558 .hword (0x04<<8) \r
1559 .hword (0x05<<8) |(1<<VFlag)\r
1560 .hword (0x06<<8) |(1<<VFlag)\r
1561 .hword (0x07<<8) \r
1562 .hword (0x08<<8) \r
1563 .hword (0x09<<8) |(1<<VFlag)\r
1564 .hword (0x10<<8) |(1<<HFlag) \r
1565 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
1566 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
1567 .hword (0x13<<8) |(1<<HFlag) \r
1568 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
1569 .hword (0x15<<8) |(1<<HFlag) \r
1570 .hword (0x10<<8) \r
1571 .hword (0x11<<8) |(1<<VFlag)\r
1572 .hword (0x12<<8) |(1<<VFlag)\r
1573 .hword (0x13<<8) \r
1574 .hword (0x14<<8) |(1<<VFlag)\r
1575 .hword (0x15<<8) \r
1576 .hword (0x16<<8) \r
1577 .hword (0x17<<8) |(1<<VFlag)\r
1578 .hword (0x18<<8) |(1<<VFlag)\r
1579 .hword (0x19<<8) \r
1580 .hword (0x20<<8) |(1<<HFlag) \r
1581 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
1582 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
1583 .hword (0x23<<8) |(1<<HFlag) \r
1584 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
1585 .hword (0x25<<8) |(1<<HFlag) \r
1586 .hword (0x20<<8) \r
1587 .hword (0x21<<8) |(1<<VFlag)\r
1588 .hword (0x22<<8) |(1<<VFlag)\r
1589 .hword (0x23<<8) \r
1590 .hword (0x24<<8) |(1<<VFlag)\r
1591 .hword (0x25<<8) \r
1592 .hword (0x26<<8) \r
1593 .hword (0x27<<8) |(1<<VFlag)\r
1594 .hword (0x28<<8) |(1<<VFlag)\r
1595 .hword (0x29<<8) \r
1596 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
1597 .hword (0x31<<8) |(1<<HFlag) \r
1598 .hword (0x32<<8) |(1<<HFlag) \r
1599 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
1600 .hword (0x34<<8) |(1<<HFlag) \r
1601 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
1602 .hword (0x30<<8) |(1<<VFlag)\r
1603 .hword (0x31<<8) \r
1604 .hword (0x32<<8) \r
1605 .hword (0x33<<8) |(1<<VFlag)\r
1606 .hword (0x34<<8) \r
1607 .hword (0x35<<8) |(1<<VFlag)\r
1608 .hword (0x36<<8) |(1<<VFlag)\r
1609 .hword (0x37<<8) \r
1610 .hword (0x38<<8) \r
1611 .hword (0x39<<8) |(1<<VFlag)\r
1612 .hword (0x40<<8) |(1<<HFlag) \r
1613 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
1614 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
1615 .hword (0x43<<8) |(1<<HFlag) \r
1616 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
1617 .hword (0x45<<8) |(1<<HFlag) \r
1618 .hword (0x40<<8) \r
1619 .hword (0x41<<8) |(1<<VFlag)\r
1620 .hword (0x42<<8) |(1<<VFlag)\r
1621 .hword (0x43<<8) \r
1622 .hword (0x44<<8) |(1<<VFlag)\r
1623 .hword (0x45<<8) \r
1624 .hword (0x46<<8) \r
1625 .hword (0x47<<8) |(1<<VFlag)\r
1626 .hword (0x48<<8) |(1<<VFlag)\r
1627 .hword (0x49<<8) \r
1628 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
1629 .hword (0x51<<8) |(1<<HFlag) \r
1630 .hword (0x52<<8) |(1<<HFlag) \r
1631 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
1632 .hword (0x54<<8) |(1<<HFlag) \r
1633 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
1634 .hword (0x50<<8) |(1<<VFlag)\r
1635 .hword (0x51<<8) \r
1636 .hword (0x52<<8) \r
1637 .hword (0x53<<8) |(1<<VFlag)\r
1638 .hword (0x54<<8) \r
1639 .hword (0x55<<8) |(1<<VFlag)\r
1640 .hword (0x56<<8) |(1<<VFlag)\r
1641 .hword (0x57<<8) \r
1642 .hword (0x58<<8) \r
1643 .hword (0x59<<8) |(1<<VFlag)\r
1644 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
1645 .hword (0x61<<8) |(1<<HFlag) \r
1646 .hword (0x62<<8) |(1<<HFlag) \r
1647 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
1648 .hword (0x64<<8) |(1<<HFlag) \r
1649 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
1650 .hword (0x60<<8) |(1<<VFlag)\r
1651 .hword (0x61<<8) \r
1652 .hword (0x62<<8) \r
1653 .hword (0x63<<8) |(1<<VFlag)\r
1654 .hword (0x64<<8) \r
1655 .hword (0x65<<8) |(1<<VFlag)\r
1656 .hword (0x66<<8) |(1<<VFlag)\r
1657 .hword (0x67<<8) \r
1658 .hword (0x68<<8) \r
1659 .hword (0x69<<8) |(1<<VFlag)\r
1660 .hword (0x70<<8) |(1<<HFlag) \r
1661 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
1662 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
1663 .hword (0x73<<8) |(1<<HFlag) \r
1664 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
1665 .hword (0x75<<8) |(1<<HFlag) \r
1666 .hword (0x70<<8) \r
1667 .hword (0x71<<8) |(1<<VFlag)\r
1668 .hword (0x72<<8) |(1<<VFlag)\r
1669 .hword (0x73<<8) \r
1670 .hword (0x74<<8) |(1<<VFlag)\r
1671 .hword (0x75<<8) \r
1672 .hword (0x76<<8) \r
1673 .hword (0x77<<8) |(1<<VFlag)\r
1674 .hword (0x78<<8) |(1<<VFlag)\r
1675 .hword (0x79<<8) \r
1676 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
1677 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1678 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1679 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
1680 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1681 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
1682 .hword (0x80<<8)|(1<<SFlag) \r
1683 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)\r
1684 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)\r
1685 .hword (0x83<<8)|(1<<SFlag) \r
1686 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)\r
1687 .hword (0x85<<8)|(1<<SFlag) \r
1688 .hword (0x86<<8)|(1<<SFlag) \r
1689 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
1690 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
1691 .hword (0x89<<8)|(1<<SFlag) \r
1692 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1693 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
1694 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
1695 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1696 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
1697 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1698 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)\r
1699 .hword (0x91<<8)|(1<<SFlag) \r
1700 .hword (0x92<<8)|(1<<SFlag) \r
1701 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)\r
1702 .hword (0x94<<8)|(1<<SFlag) \r
1703 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)\r
1704 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
1705 .hword (0x97<<8)|(1<<SFlag) \r
1706 .hword (0x98<<8)|(1<<SFlag) \r
1707 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
1708 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1709 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1710 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1711 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1712 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1713 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1714 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1715 .hword (0x01<<8) |(1<<CFlag)\r
1716 .hword (0x02<<8) |(1<<CFlag)\r
1717 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1718 .hword (0x04<<8) |(1<<CFlag)\r
1719 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1720 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1721 .hword (0x07<<8) |(1<<CFlag)\r
1722 .hword (0x08<<8) |(1<<CFlag)\r
1723 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1724 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1725 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1726 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1727 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1728 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1729 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1730 .hword (0x10<<8) |(1<<CFlag)\r
1731 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1732 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1733 .hword (0x13<<8) |(1<<CFlag)\r
1734 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1735 .hword (0x15<<8) |(1<<CFlag)\r
1736 .hword (0x16<<8) |(1<<CFlag)\r
1737 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1738 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1739 .hword (0x19<<8) |(1<<CFlag)\r
1740 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1741 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1742 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1743 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1744 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1745 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1746 .hword (0x20<<8) |(1<<CFlag)\r
1747 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1748 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1749 .hword (0x23<<8) |(1<<CFlag)\r
1750 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1751 .hword (0x25<<8) |(1<<CFlag)\r
1752 .hword (0x26<<8) |(1<<CFlag)\r
1753 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1754 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1755 .hword (0x29<<8) |(1<<CFlag)\r
1756 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1757 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1758 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1759 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1760 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
1761 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1762 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
1763 .hword (0x31<<8) |(1<<CFlag)\r
1764 .hword (0x32<<8) |(1<<CFlag)\r
1765 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
1766 .hword (0x34<<8) |(1<<CFlag)\r
1767 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
1768 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
1769 .hword (0x37<<8) |(1<<CFlag)\r
1770 .hword (0x38<<8) |(1<<CFlag)\r
1771 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
1772 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
1773 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1774 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1775 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
1776 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1777 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
1778 .hword (0x40<<8) |(1<<CFlag)\r
1779 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
1780 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
1781 .hword (0x43<<8) |(1<<CFlag)\r
1782 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
1783 .hword (0x45<<8) |(1<<CFlag)\r
1784 .hword (0x46<<8) |(1<<CFlag)\r
1785 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
1786 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
1787 .hword (0x49<<8) |(1<<CFlag)\r
1788 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1789 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
1790 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
1791 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1792 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
1793 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1794 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
1795 .hword (0x51<<8) |(1<<CFlag)\r
1796 .hword (0x52<<8) |(1<<CFlag)\r
1797 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
1798 .hword (0x54<<8) |(1<<CFlag)\r
1799 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
1800 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
1801 .hword (0x57<<8) |(1<<CFlag)\r
1802 .hword (0x58<<8) |(1<<CFlag)\r
1803 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
1804 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1805 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
1806 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
1807 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1808 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
1809 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1810 .hword (0x60<<8) |(1<<VFlag) |(1<<CFlag)\r
1811 .hword (0x61<<8) |(1<<CFlag)\r
1812 .hword (0x62<<8) |(1<<CFlag)\r
1813 .hword (0x63<<8) |(1<<VFlag) |(1<<CFlag)\r
1814 .hword (0x64<<8) |(1<<CFlag)\r
1815 .hword (0x65<<8) |(1<<VFlag) |(1<<CFlag)\r
1816 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
1817 .hword (0x67<<8) |(1<<CFlag)\r
1818 .hword (0x68<<8) |(1<<CFlag)\r
1819 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
1820 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
1821 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1822 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1823 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
1824 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1825 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
1826 .hword (0x70<<8) |(1<<CFlag)\r
1827 .hword (0x71<<8) |(1<<VFlag) |(1<<CFlag)\r
1828 .hword (0x72<<8) |(1<<VFlag) |(1<<CFlag)\r
1829 .hword (0x73<<8) |(1<<CFlag)\r
1830 .hword (0x74<<8) |(1<<VFlag) |(1<<CFlag)\r
1831 .hword (0x75<<8) |(1<<CFlag)\r
1832 .hword (0x76<<8) |(1<<CFlag)\r
1833 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
1834 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
1835 .hword (0x79<<8) |(1<<CFlag)\r
1836 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1837 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1838 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1839 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1840 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1841 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1842 .hword (0x80<<8)|(1<<SFlag) |(1<<CFlag)\r
1843 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1844 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1845 .hword (0x83<<8)|(1<<SFlag) |(1<<CFlag)\r
1846 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1847 .hword (0x85<<8)|(1<<SFlag) |(1<<CFlag)\r
1848 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
1849 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1850 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1851 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
1852 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1853 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1854 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1855 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1856 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1857 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1858 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1859 .hword (0x91<<8)|(1<<SFlag) |(1<<CFlag)\r
1860 .hword (0x92<<8)|(1<<SFlag) |(1<<CFlag)\r
1861 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1862 .hword (0x94<<8)|(1<<SFlag) |(1<<CFlag)\r
1863 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1864 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1865 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
1866 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
1867 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1868 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1869 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1870 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1871 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1872 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1873 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1874 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1875 .hword (0xA1<<8)|(1<<SFlag) |(1<<CFlag)\r
1876 .hword (0xA2<<8)|(1<<SFlag) |(1<<CFlag)\r
1877 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1878 .hword (0xA4<<8)|(1<<SFlag) |(1<<CFlag)\r
1879 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1880 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1881 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
1882 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
1883 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1884 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1885 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1886 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1887 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1888 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1889 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1890 .hword (0xB0<<8)|(1<<SFlag) |(1<<CFlag)\r
1891 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1892 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1893 .hword (0xB3<<8)|(1<<SFlag) |(1<<CFlag)\r
1894 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1895 .hword (0xB5<<8)|(1<<SFlag) |(1<<CFlag)\r
1896 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
1897 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1898 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1899 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
1900 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1901 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1902 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1903 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1904 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1905 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1906 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1907 .hword (0xC1<<8)|(1<<SFlag) |(1<<CFlag)\r
1908 .hword (0xC2<<8)|(1<<SFlag) |(1<<CFlag)\r
1909 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1910 .hword (0xC4<<8)|(1<<SFlag) |(1<<CFlag)\r
1911 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1912 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1913 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
1914 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
1915 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1916 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1917 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1918 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1919 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1920 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1921 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1922 .hword (0xD0<<8)|(1<<SFlag) |(1<<CFlag)\r
1923 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1924 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1925 .hword (0xD3<<8)|(1<<SFlag) |(1<<CFlag)\r
1926 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1927 .hword (0xD5<<8)|(1<<SFlag) |(1<<CFlag)\r
1928 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
1929 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1930 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1931 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
1932 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1933 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1934 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1935 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1936 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1937 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1938 .hword (0xE0<<8)|(1<<SFlag) |(1<<CFlag)\r
1939 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1940 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1941 .hword (0xE3<<8)|(1<<SFlag) |(1<<CFlag)\r
1942 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1943 .hword (0xE5<<8)|(1<<SFlag) |(1<<CFlag)\r
1944 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
1945 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1946 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1947 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
1948 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1949 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1950 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1951 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1952 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1953 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1954 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1955 .hword (0xF1<<8)|(1<<SFlag) |(1<<CFlag)\r
1956 .hword (0xF2<<8)|(1<<SFlag) |(1<<CFlag)\r
1957 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1958 .hword (0xF4<<8)|(1<<SFlag) |(1<<CFlag)\r
1959 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1960 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1961 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
1962 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
1963 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1964 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1965 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1966 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1967 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1968 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1969 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1970 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1971 .hword (0x01<<8) |(1<<CFlag)\r
1972 .hword (0x02<<8) |(1<<CFlag)\r
1973 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1974 .hword (0x04<<8) |(1<<CFlag)\r
1975 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1976 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1977 .hword (0x07<<8) |(1<<CFlag)\r
1978 .hword (0x08<<8) |(1<<CFlag)\r
1979 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1980 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1981 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1982 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1983 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1984 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1985 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1986 .hword (0x10<<8) |(1<<CFlag)\r
1987 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1988 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1989 .hword (0x13<<8) |(1<<CFlag)\r
1990 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1991 .hword (0x15<<8) |(1<<CFlag)\r
1992 .hword (0x16<<8) |(1<<CFlag)\r
1993 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1994 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1995 .hword (0x19<<8) |(1<<CFlag)\r
1996 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1997 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1998 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1999 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2000 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2001 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2002 .hword (0x20<<8) |(1<<CFlag)\r
2003 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
2004 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
2005 .hword (0x23<<8) |(1<<CFlag)\r
2006 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
2007 .hword (0x25<<8) |(1<<CFlag)\r
2008 .hword (0x26<<8) |(1<<CFlag)\r
2009 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2010 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2011 .hword (0x29<<8) |(1<<CFlag)\r
2012 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2013 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2014 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2015 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2016 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2017 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2018 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
2019 .hword (0x31<<8) |(1<<CFlag)\r
2020 .hword (0x32<<8) |(1<<CFlag)\r
2021 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
2022 .hword (0x34<<8) |(1<<CFlag)\r
2023 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
2024 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2025 .hword (0x37<<8) |(1<<CFlag)\r
2026 .hword (0x38<<8) |(1<<CFlag)\r
2027 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2028 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2029 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2030 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2031 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2032 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2033 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2034 .hword (0x40<<8) |(1<<CFlag)\r
2035 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
2036 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
2037 .hword (0x43<<8) |(1<<CFlag)\r
2038 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
2039 .hword (0x45<<8) |(1<<CFlag)\r
2040 .hword (0x46<<8) |(1<<CFlag)\r
2041 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2042 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2043 .hword (0x49<<8) |(1<<CFlag)\r
2044 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2045 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2046 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2047 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2048 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2049 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2050 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
2051 .hword (0x51<<8) |(1<<CFlag)\r
2052 .hword (0x52<<8) |(1<<CFlag)\r
2053 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
2054 .hword (0x54<<8) |(1<<CFlag)\r
2055 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
2056 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2057 .hword (0x57<<8) |(1<<CFlag)\r
2058 .hword (0x58<<8) |(1<<CFlag)\r
2059 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2060 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2061 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2062 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2063 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2064 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2065 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2066 .hword (0x06<<8) |(1<<VFlag)\r
2067 .hword (0x07<<8) \r
2068 .hword (0x08<<8) \r
2069 .hword (0x09<<8) |(1<<VFlag)\r
2070 .hword (0x0A<<8) |(1<<VFlag)\r
2071 .hword (0x0B<<8) \r
2072 .hword (0x0C<<8) |(1<<VFlag)\r
2073 .hword (0x0D<<8) \r
2074 .hword (0x0E<<8) \r
2075 .hword (0x0F<<8) |(1<<VFlag)\r
2076 .hword (0x10<<8) |(1<<HFlag) \r
2077 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
2078 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
2079 .hword (0x13<<8) |(1<<HFlag) \r
2080 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
2081 .hword (0x15<<8) |(1<<HFlag) \r
2082 .hword (0x16<<8) \r
2083 .hword (0x17<<8) |(1<<VFlag)\r
2084 .hword (0x18<<8) |(1<<VFlag)\r
2085 .hword (0x19<<8) \r
2086 .hword (0x1A<<8) \r
2087 .hword (0x1B<<8) |(1<<VFlag)\r
2088 .hword (0x1C<<8) \r
2089 .hword (0x1D<<8) |(1<<VFlag)\r
2090 .hword (0x1E<<8) |(1<<VFlag)\r
2091 .hword (0x1F<<8) \r
2092 .hword (0x20<<8) |(1<<HFlag) \r
2093 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
2094 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
2095 .hword (0x23<<8) |(1<<HFlag) \r
2096 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
2097 .hword (0x25<<8) |(1<<HFlag) \r
2098 .hword (0x26<<8) \r
2099 .hword (0x27<<8) |(1<<VFlag)\r
2100 .hword (0x28<<8) |(1<<VFlag)\r
2101 .hword (0x29<<8) \r
2102 .hword (0x2A<<8) \r
2103 .hword (0x2B<<8) |(1<<VFlag)\r
2104 .hword (0x2C<<8) \r
2105 .hword (0x2D<<8) |(1<<VFlag)\r
2106 .hword (0x2E<<8) |(1<<VFlag)\r
2107 .hword (0x2F<<8) \r
2108 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
2109 .hword (0x31<<8) |(1<<HFlag) \r
2110 .hword (0x32<<8) |(1<<HFlag) \r
2111 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
2112 .hword (0x34<<8) |(1<<HFlag) \r
2113 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
2114 .hword (0x36<<8) |(1<<VFlag)\r
2115 .hword (0x37<<8) \r
2116 .hword (0x38<<8) \r
2117 .hword (0x39<<8) |(1<<VFlag)\r
2118 .hword (0x3A<<8) |(1<<VFlag)\r
2119 .hword (0x3B<<8) \r
2120 .hword (0x3C<<8) |(1<<VFlag)\r
2121 .hword (0x3D<<8) \r
2122 .hword (0x3E<<8) \r
2123 .hword (0x3F<<8) |(1<<VFlag)\r
2124 .hword (0x40<<8) |(1<<HFlag) \r
2125 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
2126 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
2127 .hword (0x43<<8) |(1<<HFlag) \r
2128 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
2129 .hword (0x45<<8) |(1<<HFlag) \r
2130 .hword (0x46<<8) \r
2131 .hword (0x47<<8) |(1<<VFlag)\r
2132 .hword (0x48<<8) |(1<<VFlag)\r
2133 .hword (0x49<<8) \r
2134 .hword (0x4A<<8) \r
2135 .hword (0x4B<<8) |(1<<VFlag)\r
2136 .hword (0x4C<<8) \r
2137 .hword (0x4D<<8) |(1<<VFlag)\r
2138 .hword (0x4E<<8) |(1<<VFlag)\r
2139 .hword (0x4F<<8) \r
2140 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
2141 .hword (0x51<<8) |(1<<HFlag) \r
2142 .hword (0x52<<8) |(1<<HFlag) \r
2143 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
2144 .hword (0x54<<8) |(1<<HFlag) \r
2145 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
2146 .hword (0x56<<8) |(1<<VFlag)\r
2147 .hword (0x57<<8) \r
2148 .hword (0x58<<8) \r
2149 .hword (0x59<<8) |(1<<VFlag)\r
2150 .hword (0x5A<<8) |(1<<VFlag)\r
2151 .hword (0x5B<<8) \r
2152 .hword (0x5C<<8) |(1<<VFlag)\r
2153 .hword (0x5D<<8) \r
2154 .hword (0x5E<<8) \r
2155 .hword (0x5F<<8) |(1<<VFlag)\r
2156 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
2157 .hword (0x61<<8) |(1<<HFlag) \r
2158 .hword (0x62<<8) |(1<<HFlag) \r
2159 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
2160 .hword (0x64<<8) |(1<<HFlag) \r
2161 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
2162 .hword (0x66<<8) |(1<<VFlag)\r
2163 .hword (0x67<<8) \r
2164 .hword (0x68<<8) \r
2165 .hword (0x69<<8) |(1<<VFlag)\r
2166 .hword (0x6A<<8) |(1<<VFlag)\r
2167 .hword (0x6B<<8) \r
2168 .hword (0x6C<<8) |(1<<VFlag)\r
2169 .hword (0x6D<<8) \r
2170 .hword (0x6E<<8) \r
2171 .hword (0x6F<<8) |(1<<VFlag)\r
2172 .hword (0x70<<8) |(1<<HFlag) \r
2173 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
2174 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
2175 .hword (0x73<<8) |(1<<HFlag) \r
2176 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
2177 .hword (0x75<<8) |(1<<HFlag) \r
2178 .hword (0x76<<8) \r
2179 .hword (0x77<<8) |(1<<VFlag)\r
2180 .hword (0x78<<8) |(1<<VFlag)\r
2181 .hword (0x79<<8) \r
2182 .hword (0x7A<<8) \r
2183 .hword (0x7B<<8) |(1<<VFlag)\r
2184 .hword (0x7C<<8) \r
2185 .hword (0x7D<<8) |(1<<VFlag)\r
2186 .hword (0x7E<<8) |(1<<VFlag)\r
2187 .hword (0x7F<<8) \r
2188 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
2189 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2190 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2191 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
2192 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2193 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
2194 .hword (0x86<<8)|(1<<SFlag) \r
2195 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
2196 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
2197 .hword (0x89<<8)|(1<<SFlag) \r
2198 .hword (0x8A<<8)|(1<<SFlag) \r
2199 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag)\r
2200 .hword (0x8C<<8)|(1<<SFlag) \r
2201 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag)\r
2202 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag)\r
2203 .hword (0x8F<<8)|(1<<SFlag) \r
2204 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2205 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
2206 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
2207 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2208 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
2209 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2210 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
2211 .hword (0x97<<8)|(1<<SFlag) \r
2212 .hword (0x98<<8)|(1<<SFlag) \r
2213 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
2214 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag)\r
2215 .hword (0x9B<<8)|(1<<SFlag) \r
2216 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag)\r
2217 .hword (0x9D<<8)|(1<<SFlag) \r
2218 .hword (0x9E<<8)|(1<<SFlag) \r
2219 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag)\r
2220 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2221 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2222 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2223 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2224 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2225 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2226 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2227 .hword (0x07<<8) |(1<<CFlag)\r
2228 .hword (0x08<<8) |(1<<CFlag)\r
2229 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2230 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2231 .hword (0x0B<<8) |(1<<CFlag)\r
2232 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2233 .hword (0x0D<<8) |(1<<CFlag)\r
2234 .hword (0x0E<<8) |(1<<CFlag)\r
2235 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2236 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2237 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2238 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2239 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2240 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2241 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2242 .hword (0x16<<8) |(1<<CFlag)\r
2243 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2244 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2245 .hword (0x19<<8) |(1<<CFlag)\r
2246 .hword (0x1A<<8) |(1<<CFlag)\r
2247 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2248 .hword (0x1C<<8) |(1<<CFlag)\r
2249 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2250 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2251 .hword (0x1F<<8) |(1<<CFlag)\r
2252 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2253 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2254 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2255 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2256 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2257 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2258 .hword (0x26<<8) |(1<<CFlag)\r
2259 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2260 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2261 .hword (0x29<<8) |(1<<CFlag)\r
2262 .hword (0x2A<<8) |(1<<CFlag)\r
2263 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2264 .hword (0x2C<<8) |(1<<CFlag)\r
2265 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2266 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2267 .hword (0x2F<<8) |(1<<CFlag)\r
2268 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2269 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2270 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2271 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2272 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2273 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2274 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2275 .hword (0x37<<8) |(1<<CFlag)\r
2276 .hword (0x38<<8) |(1<<CFlag)\r
2277 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2278 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2279 .hword (0x3B<<8) |(1<<CFlag)\r
2280 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2281 .hword (0x3D<<8) |(1<<CFlag)\r
2282 .hword (0x3E<<8) |(1<<CFlag)\r
2283 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2284 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2285 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2286 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2287 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2288 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2289 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2290 .hword (0x46<<8) |(1<<CFlag)\r
2291 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2292 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2293 .hword (0x49<<8) |(1<<CFlag)\r
2294 .hword (0x4A<<8) |(1<<CFlag)\r
2295 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2296 .hword (0x4C<<8) |(1<<CFlag)\r
2297 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2298 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2299 .hword (0x4F<<8) |(1<<CFlag)\r
2300 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2301 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2302 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2303 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2304 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2305 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2306 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2307 .hword (0x57<<8) |(1<<CFlag)\r
2308 .hword (0x58<<8) |(1<<CFlag)\r
2309 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2310 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2311 .hword (0x5B<<8) |(1<<CFlag)\r
2312 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2313 .hword (0x5D<<8) |(1<<CFlag)\r
2314 .hword (0x5E<<8) |(1<<CFlag)\r
2315 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2316 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2317 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2318 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2319 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2320 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2321 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2322 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
2323 .hword (0x67<<8) |(1<<CFlag)\r
2324 .hword (0x68<<8) |(1<<CFlag)\r
2325 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
2326 .hword (0x6A<<8) |(1<<VFlag) |(1<<CFlag)\r
2327 .hword (0x6B<<8) |(1<<CFlag)\r
2328 .hword (0x6C<<8) |(1<<VFlag) |(1<<CFlag)\r
2329 .hword (0x6D<<8) |(1<<CFlag)\r
2330 .hword (0x6E<<8) |(1<<CFlag)\r
2331 .hword (0x6F<<8) |(1<<VFlag) |(1<<CFlag)\r
2332 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
2333 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2334 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2335 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
2336 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2337 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
2338 .hword (0x76<<8) |(1<<CFlag)\r
2339 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
2340 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
2341 .hword (0x79<<8) |(1<<CFlag)\r
2342 .hword (0x7A<<8) |(1<<CFlag)\r
2343 .hword (0x7B<<8) |(1<<VFlag) |(1<<CFlag)\r
2344 .hword (0x7C<<8) |(1<<CFlag)\r
2345 .hword (0x7D<<8) |(1<<VFlag) |(1<<CFlag)\r
2346 .hword (0x7E<<8) |(1<<VFlag) |(1<<CFlag)\r
2347 .hword (0x7F<<8) |(1<<CFlag)\r
2348 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2349 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2350 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2351 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2352 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2353 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2354 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
2355 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2356 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2357 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
2358 .hword (0x8A<<8)|(1<<SFlag) |(1<<CFlag)\r
2359 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2360 .hword (0x8C<<8)|(1<<SFlag) |(1<<CFlag)\r
2361 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2362 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2363 .hword (0x8F<<8)|(1<<SFlag) |(1<<CFlag)\r
2364 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2365 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2366 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2367 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2368 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2369 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2370 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2371 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
2372 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
2373 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2374 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2375 .hword (0x9B<<8)|(1<<SFlag) |(1<<CFlag)\r
2376 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2377 .hword (0x9D<<8)|(1<<SFlag) |(1<<CFlag)\r
2378 .hword (0x9E<<8)|(1<<SFlag) |(1<<CFlag)\r
2379 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2380 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2381 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2382 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2383 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2384 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2385 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2386 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2387 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
2388 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
2389 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2390 .hword (0xAA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2391 .hword (0xAB<<8)|(1<<SFlag) |(1<<CFlag)\r
2392 .hword (0xAC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2393 .hword (0xAD<<8)|(1<<SFlag) |(1<<CFlag)\r
2394 .hword (0xAE<<8)|(1<<SFlag) |(1<<CFlag)\r
2395 .hword (0xAF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2396 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2397 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2398 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2399 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2400 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2401 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2402 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
2403 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2404 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2405 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
2406 .hword (0xBA<<8)|(1<<SFlag) |(1<<CFlag)\r
2407 .hword (0xBB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2408 .hword (0xBC<<8)|(1<<SFlag) |(1<<CFlag)\r
2409 .hword (0xBD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2410 .hword (0xBE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2411 .hword (0xBF<<8)|(1<<SFlag) |(1<<CFlag)\r
2412 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2413 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2414 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2415 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2416 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2417 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2418 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2419 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
2420 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
2421 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2422 .hword (0xCA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2423 .hword (0xCB<<8)|(1<<SFlag) |(1<<CFlag)\r
2424 .hword (0xCC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2425 .hword (0xCD<<8)|(1<<SFlag) |(1<<CFlag)\r
2426 .hword (0xCE<<8)|(1<<SFlag) |(1<<CFlag)\r
2427 .hword (0xCF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2428 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2429 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2430 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2431 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2432 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2433 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2434 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
2435 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2436 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2437 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
2438 .hword (0xDA<<8)|(1<<SFlag) |(1<<CFlag)\r
2439 .hword (0xDB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2440 .hword (0xDC<<8)|(1<<SFlag) |(1<<CFlag)\r
2441 .hword (0xDD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2442 .hword (0xDE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2443 .hword (0xDF<<8)|(1<<SFlag) |(1<<CFlag)\r
2444 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2445 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2446 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2447 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2448 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2449 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2450 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
2451 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2452 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2453 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
2454 .hword (0xEA<<8)|(1<<SFlag) |(1<<CFlag)\r
2455 .hword (0xEB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2456 .hword (0xEC<<8)|(1<<SFlag) |(1<<CFlag)\r
2457 .hword (0xED<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2458 .hword (0xEE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2459 .hword (0xEF<<8)|(1<<SFlag) |(1<<CFlag)\r
2460 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2461 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2462 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2463 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2464 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2465 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2466 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2467 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
2468 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
2469 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2470 .hword (0xFA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2471 .hword (0xFB<<8)|(1<<SFlag) |(1<<CFlag)\r
2472 .hword (0xFC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2473 .hword (0xFD<<8)|(1<<SFlag) |(1<<CFlag)\r
2474 .hword (0xFE<<8)|(1<<SFlag) |(1<<CFlag)\r
2475 .hword (0xFF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2476 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2477 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2478 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2479 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2480 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2481 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2482 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2483 .hword (0x07<<8) |(1<<CFlag)\r
2484 .hword (0x08<<8) |(1<<CFlag)\r
2485 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2486 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2487 .hword (0x0B<<8) |(1<<CFlag)\r
2488 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2489 .hword (0x0D<<8) |(1<<CFlag)\r
2490 .hword (0x0E<<8) |(1<<CFlag)\r
2491 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2492 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2493 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2494 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2495 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2496 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2497 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2498 .hword (0x16<<8) |(1<<CFlag)\r
2499 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2500 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2501 .hword (0x19<<8) |(1<<CFlag)\r
2502 .hword (0x1A<<8) |(1<<CFlag)\r
2503 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2504 .hword (0x1C<<8) |(1<<CFlag)\r
2505 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2506 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2507 .hword (0x1F<<8) |(1<<CFlag)\r
2508 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2509 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2510 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2511 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2512 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2513 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2514 .hword (0x26<<8) |(1<<CFlag)\r
2515 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2516 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2517 .hword (0x29<<8) |(1<<CFlag)\r
2518 .hword (0x2A<<8) |(1<<CFlag)\r
2519 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2520 .hword (0x2C<<8) |(1<<CFlag)\r
2521 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2522 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2523 .hword (0x2F<<8) |(1<<CFlag)\r
2524 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2525 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2526 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2527 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2528 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2529 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2530 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2531 .hword (0x37<<8) |(1<<CFlag)\r
2532 .hword (0x38<<8) |(1<<CFlag)\r
2533 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2534 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2535 .hword (0x3B<<8) |(1<<CFlag)\r
2536 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2537 .hword (0x3D<<8) |(1<<CFlag)\r
2538 .hword (0x3E<<8) |(1<<CFlag)\r
2539 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2540 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2541 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2542 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2543 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2544 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2545 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2546 .hword (0x46<<8) |(1<<CFlag)\r
2547 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2548 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2549 .hword (0x49<<8) |(1<<CFlag)\r
2550 .hword (0x4A<<8) |(1<<CFlag)\r
2551 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2552 .hword (0x4C<<8) |(1<<CFlag)\r
2553 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2554 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2555 .hword (0x4F<<8) |(1<<CFlag)\r
2556 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2557 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2558 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2559 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2560 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2561 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2562 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2563 .hword (0x57<<8) |(1<<CFlag)\r
2564 .hword (0x58<<8) |(1<<CFlag)\r
2565 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2566 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2567 .hword (0x5B<<8) |(1<<CFlag)\r
2568 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2569 .hword (0x5D<<8) |(1<<CFlag)\r
2570 .hword (0x5E<<8) |(1<<CFlag)\r
2571 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2572 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2573 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2574 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2575 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2576 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2577 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2578 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
2579 .hword (0x01<<8) |(1<<NFlag) \r
2580 .hword (0x02<<8) |(1<<NFlag) \r
2581 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
2582 .hword (0x04<<8) |(1<<NFlag) \r
2583 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2584 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2585 .hword (0x07<<8) |(1<<NFlag) \r
2586 .hword (0x08<<8) |(1<<NFlag) \r
2587 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2588 .hword (0x04<<8) |(1<<NFlag) \r
2589 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2590 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2591 .hword (0x07<<8) |(1<<NFlag) \r
2592 .hword (0x08<<8) |(1<<NFlag) \r
2593 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2594 .hword (0x10<<8) |(1<<NFlag) \r
2595 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
2596 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
2597 .hword (0x13<<8) |(1<<NFlag) \r
2598 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2599 .hword (0x15<<8) |(1<<NFlag) \r
2600 .hword (0x16<<8) |(1<<NFlag) \r
2601 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2602 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2603 .hword (0x19<<8) |(1<<NFlag) \r
2604 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2605 .hword (0x15<<8) |(1<<NFlag) \r
2606 .hword (0x16<<8) |(1<<NFlag) \r
2607 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2608 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2609 .hword (0x19<<8) |(1<<NFlag) \r
2610 .hword (0x20<<8) |(1<<NFlag) \r
2611 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
2612 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
2613 .hword (0x23<<8) |(1<<NFlag) \r
2614 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2615 .hword (0x25<<8) |(1<<NFlag) \r
2616 .hword (0x26<<8) |(1<<NFlag) \r
2617 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2618 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2619 .hword (0x29<<8) |(1<<NFlag) \r
2620 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2621 .hword (0x25<<8) |(1<<NFlag) \r
2622 .hword (0x26<<8) |(1<<NFlag) \r
2623 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2624 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2625 .hword (0x29<<8) |(1<<NFlag) \r
2626 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
2627 .hword (0x31<<8) |(1<<NFlag) \r
2628 .hword (0x32<<8) |(1<<NFlag) \r
2629 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
2630 .hword (0x34<<8) |(1<<NFlag) \r
2631 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2632 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2633 .hword (0x37<<8) |(1<<NFlag) \r
2634 .hword (0x38<<8) |(1<<NFlag) \r
2635 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2636 .hword (0x34<<8) |(1<<NFlag) \r
2637 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2638 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2639 .hword (0x37<<8) |(1<<NFlag) \r
2640 .hword (0x38<<8) |(1<<NFlag) \r
2641 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2642 .hword (0x40<<8) |(1<<NFlag) \r
2643 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
2644 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
2645 .hword (0x43<<8) |(1<<NFlag) \r
2646 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2647 .hword (0x45<<8) |(1<<NFlag) \r
2648 .hword (0x46<<8) |(1<<NFlag) \r
2649 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2650 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2651 .hword (0x49<<8) |(1<<NFlag) \r
2652 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2653 .hword (0x45<<8) |(1<<NFlag) \r
2654 .hword (0x46<<8) |(1<<NFlag) \r
2655 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2656 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2657 .hword (0x49<<8) |(1<<NFlag) \r
2658 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
2659 .hword (0x51<<8) |(1<<NFlag) \r
2660 .hword (0x52<<8) |(1<<NFlag) \r
2661 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
2662 .hword (0x54<<8) |(1<<NFlag) \r
2663 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2664 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2665 .hword (0x57<<8) |(1<<NFlag) \r
2666 .hword (0x58<<8) |(1<<NFlag) \r
2667 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2668 .hword (0x54<<8) |(1<<NFlag) \r
2669 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2670 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2671 .hword (0x57<<8) |(1<<NFlag) \r
2672 .hword (0x58<<8) |(1<<NFlag) \r
2673 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2674 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
2675 .hword (0x61<<8) |(1<<NFlag) \r
2676 .hword (0x62<<8) |(1<<NFlag) \r
2677 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
2678 .hword (0x64<<8) |(1<<NFlag) \r
2679 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2680 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2681 .hword (0x67<<8) |(1<<NFlag) \r
2682 .hword (0x68<<8) |(1<<NFlag) \r
2683 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2684 .hword (0x64<<8) |(1<<NFlag) \r
2685 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2686 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2687 .hword (0x67<<8) |(1<<NFlag) \r
2688 .hword (0x68<<8) |(1<<NFlag) \r
2689 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2690 .hword (0x70<<8) |(1<<NFlag) \r
2691 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
2692 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
2693 .hword (0x73<<8) |(1<<NFlag) \r
2694 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2695 .hword (0x75<<8) |(1<<NFlag) \r
2696 .hword (0x76<<8) |(1<<NFlag) \r
2697 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2698 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2699 .hword (0x79<<8) |(1<<NFlag) \r
2700 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2701 .hword (0x75<<8) |(1<<NFlag) \r
2702 .hword (0x76<<8) |(1<<NFlag) \r
2703 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2704 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2705 .hword (0x79<<8) |(1<<NFlag) \r
2706 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
2707 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2708 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2709 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
2710 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2711 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2712 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2713 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2714 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2715 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2716 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2717 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2718 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2719 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2720 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2721 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2722 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2723 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
2724 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
2725 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2726 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag) \r
2727 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2728 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2729 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag) \r
2730 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag) \r
2731 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2732 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2733 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2734 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2735 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2736 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2737 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2738 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2739 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2740 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2741 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2742 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2743 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2744 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2745 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2746 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2747 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2748 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2749 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2750 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2751 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2752 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2753 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2754 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2755 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2756 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2757 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2758 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2759 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2760 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2761 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2762 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2763 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2764 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2765 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2766 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2767 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2768 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2769 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2770 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2771 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
2772 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
2773 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2774 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2775 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2776 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2777 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2778 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2779 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2780 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2781 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2782 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2783 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2784 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2785 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2786 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
2787 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2788 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2789 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
2790 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2791 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2792 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2793 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2794 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2795 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2796 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2797 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2798 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2799 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2800 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2801 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2802 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2803 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2804 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2805 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2806 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2807 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2808 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2809 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2810 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2811 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2812 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2813 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2814 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2815 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2816 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2817 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2818 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2819 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2820 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2821 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2822 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2823 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2824 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2825 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2826 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2827 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2828 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2829 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2830 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2831 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2832 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2833 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2834 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2835 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2836 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2837 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2838 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2839 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2840 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2841 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2842 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2843 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2844 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2845 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2846 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2847 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2848 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2849 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2850 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2851 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2852 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2853 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2854 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2855 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2856 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2857 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2858 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2859 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2860 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2861 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2862 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2863 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2864 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2865 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2866 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2867 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2868 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2869 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2870 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2871 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2872 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2873 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2874 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2875 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2876 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2877 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2878 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2879 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2880 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2881 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2882 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2883 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2884 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2885 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2886 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2887 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2888 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2889 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2890 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2891 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2892 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2893 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2894 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2895 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2896 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2897 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2898 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2899 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2900 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2901 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2902 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2903 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2904 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2905 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2906 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2907 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2908 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2909 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2910 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2911 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2912 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2913 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2914 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2915 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2916 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2917 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2918 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2919 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2920 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2921 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2922 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2923 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2924 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2925 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2926 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2927 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2928 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2929 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2930 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2931 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
2932 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
2933 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2934 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2935 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2936 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2937 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2938 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2939 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2940 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2941 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2942 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2943 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2944 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2945 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2946 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
2947 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2948 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2949 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
2950 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2951 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2952 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2953 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2954 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2955 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2956 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2957 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2958 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2959 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2960 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2961 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2962 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
2963 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2964 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2965 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
2966 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2967 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2968 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2969 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2970 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2971 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2972 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2973 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2974 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2975 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2976 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2977 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2978 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2979 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
2980 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
2981 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2982 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2983 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2984 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2985 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2986 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2987 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2988 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2989 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2990 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2991 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2992 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2993 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2994 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2995 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2996 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2997 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2998 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2999 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3000 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3001 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3002 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3003 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3004 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3005 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3006 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3007 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3008 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3009 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3010 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3011 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3012 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3013 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3014 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3015 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3016 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3017 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3018 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3019 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3020 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3021 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3022 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3023 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3024 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3025 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3026 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3027 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3028 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3029 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3030 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3031 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3032 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3033 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3034 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3035 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3036 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3037 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3038 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3039 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3040 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3041 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3042 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3043 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3044 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3045 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3046 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3047 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3048 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3049 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3050 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3051 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3052 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3053 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3054 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3055 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3056 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3057 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3058 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3059 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3060 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3061 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3062 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3063 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3064 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3065 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3066 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3067 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3068 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3069 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3070 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3071 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3072 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3073 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3074 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3075 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3076 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3077 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3078 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3079 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3080 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3081 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3082 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3083 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3084 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3085 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3086 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3087 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3088 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3089 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3090 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3091 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3092 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3093 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3094 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3095 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3096 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
3097 .hword (0x01<<8) |(1<<NFlag) \r
3098 .hword (0x02<<8) |(1<<NFlag) \r
3099 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
3100 .hword (0x04<<8) |(1<<NFlag) \r
3101 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
3102 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
3103 .hword (0x07<<8) |(1<<NFlag) \r
3104 .hword (0x08<<8) |(1<<NFlag) \r
3105 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
3106 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3107 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag) \r
3108 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3109 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag) \r
3110 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag) \r
3111 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3112 .hword (0x10<<8) |(1<<NFlag) \r
3113 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
3114 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
3115 .hword (0x13<<8) |(1<<NFlag) \r
3116 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
3117 .hword (0x15<<8) |(1<<NFlag) \r
3118 .hword (0x16<<8) |(1<<NFlag) \r
3119 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
3120 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
3121 .hword (0x19<<8) |(1<<NFlag) \r
3122 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag) \r
3123 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3124 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag) \r
3125 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3126 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3127 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag) \r
3128 .hword (0x20<<8) |(1<<NFlag) \r
3129 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
3130 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
3131 .hword (0x23<<8) |(1<<NFlag) \r
3132 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
3133 .hword (0x25<<8) |(1<<NFlag) \r
3134 .hword (0x26<<8) |(1<<NFlag) \r
3135 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
3136 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
3137 .hword (0x29<<8) |(1<<NFlag) \r
3138 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag) \r
3139 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3140 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag) \r
3141 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3142 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3143 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag) \r
3144 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
3145 .hword (0x31<<8) |(1<<NFlag) \r
3146 .hword (0x32<<8) |(1<<NFlag) \r
3147 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
3148 .hword (0x34<<8) |(1<<NFlag) \r
3149 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
3150 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
3151 .hword (0x37<<8) |(1<<NFlag) \r
3152 .hword (0x38<<8) |(1<<NFlag) \r
3153 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
3154 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3155 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag) \r
3156 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3157 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag) \r
3158 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag) \r
3159 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3160 .hword (0x40<<8) |(1<<NFlag) \r
3161 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
3162 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
3163 .hword (0x43<<8) |(1<<NFlag) \r
3164 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
3165 .hword (0x45<<8) |(1<<NFlag) \r
3166 .hword (0x46<<8) |(1<<NFlag) \r
3167 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
3168 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
3169 .hword (0x49<<8) |(1<<NFlag) \r
3170 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag) \r
3171 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3172 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag) \r
3173 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3174 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3175 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag) \r
3176 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
3177 .hword (0x51<<8) |(1<<NFlag) \r
3178 .hword (0x52<<8) |(1<<NFlag) \r
3179 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
3180 .hword (0x54<<8) |(1<<NFlag) \r
3181 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
3182 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
3183 .hword (0x57<<8) |(1<<NFlag) \r
3184 .hword (0x58<<8) |(1<<NFlag) \r
3185 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
3186 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3187 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag) \r
3188 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3189 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag) \r
3190 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag) \r
3191 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3192 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
3193 .hword (0x61<<8) |(1<<NFlag) \r
3194 .hword (0x62<<8) |(1<<NFlag) \r
3195 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
3196 .hword (0x64<<8) |(1<<NFlag) \r
3197 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
3198 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
3199 .hword (0x67<<8) |(1<<NFlag) \r
3200 .hword (0x68<<8) |(1<<NFlag) \r
3201 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
3202 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3203 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag) \r
3204 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3205 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag) \r
3206 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag) \r
3207 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3208 .hword (0x70<<8) |(1<<NFlag) \r
3209 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
3210 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
3211 .hword (0x73<<8) |(1<<NFlag) \r
3212 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
3213 .hword (0x75<<8) |(1<<NFlag) \r
3214 .hword (0x76<<8) |(1<<NFlag) \r
3215 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
3216 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
3217 .hword (0x79<<8) |(1<<NFlag) \r
3218 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag) \r
3219 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3220 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag) \r
3221 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3222 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3223 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag) \r
3224 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
3225 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3226 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3227 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
3228 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3229 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
3230 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
3231 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3232 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3233 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
3234 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3235 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3236 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3237 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3238 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3239 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3240 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3241 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
3242 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
3243 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3244 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3245 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3246 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3247 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3248 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3249 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3250 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3251 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3252 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3253 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3254 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3255 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3256 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3257 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3258 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3259 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3260 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3261 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3262 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3263 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3264 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3265 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3266 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3267 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3268 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3269 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3270 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3271 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3272 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3273 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3274 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3275 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3276 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3277 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3278 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3279 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3280 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3281 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3282 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3283 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3284 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3285 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3286 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3287 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3288 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3289 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3290 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3291 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3292 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3293 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3294 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3295 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3296 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3297 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3298 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3299 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3300 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3301 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3302 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3303 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3304 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3305 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3306 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3307 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3308 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3309 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3310 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3311 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3312 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3313 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3314 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3315 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3316 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3317 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3318 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3319 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3320 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3321 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3322 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3323 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3324 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3325 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3326 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3327 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3328 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3329 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3330 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3331 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3332 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3333 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3334 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3335 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3336 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3337 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3338 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3339 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3340 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3341 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3342 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3343 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3344 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3345 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3346 .hword (0x9A<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3347 .hword (0x9B<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3348 .hword (0x9C<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3349 .hword (0x9D<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3350 .hword (0x9E<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3351 .hword (0x9F<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3352 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3353 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3354 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3355 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3356 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3357 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3358 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3359 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3360 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3361 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3362 .hword (0xAA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3363 .hword (0xAB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3364 .hword (0xAC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3365 .hword (0xAD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3366 .hword (0xAE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3367 .hword (0xAF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3368 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3369 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3370 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3371 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3372 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3373 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3374 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3375 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3376 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3377 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3378 .hword (0xBA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3379 .hword (0xBB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3380 .hword (0xBC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3381 .hword (0xBD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3382 .hword (0xBE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3383 .hword (0xBF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3384 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3385 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3386 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3387 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3388 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3389 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3390 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3391 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3392 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3393 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3394 .hword (0xCA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3395 .hword (0xCB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3396 .hword (0xCC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3397 .hword (0xCD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3398 .hword (0xCE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3399 .hword (0xCF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3400 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3401 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3402 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3403 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3404 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3405 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3406 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3407 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3408 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3409 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3410 .hword (0xDA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3411 .hword (0xDB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3412 .hword (0xDC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3413 .hword (0xDD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3414 .hword (0xDE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3415 .hword (0xDF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3416 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3417 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3418 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3419 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3420 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3421 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3422 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3423 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3424 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3425 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3426 .hword (0xEA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3427 .hword (0xEB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3428 .hword (0xEC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3429 .hword (0xED<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3430 .hword (0xEE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3431 .hword (0xEF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3432 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3433 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3434 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3435 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3436 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3437 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3438 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3439 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3440 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3441 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3442 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3443 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3444 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3445 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3446 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3447 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3448 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3449 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
3450 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
3451 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3452 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
3453 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3454 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3455 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
3456 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
3457 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3458 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3459 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3460 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3461 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3462 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3463 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3464 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
3465 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3466 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3467 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
3468 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3469 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
3470 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
3471 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3472 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3473 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
3474 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3475 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3476 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3477 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3478 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3479 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3480 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
3481 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3482 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3483 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
3484 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3485 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
3486 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
3487 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3488 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3489 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
3490 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3491 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3492 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3493 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3494 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3495 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3496 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3497 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
3498 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
3499 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3500 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3501 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3502 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3503 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3504 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3505 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3506 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3507 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3508 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3509 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3510 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3511 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3512 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3513 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3514 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3515 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3516 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3517 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3518 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3519 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3520 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3521 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3522 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3523 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3524 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3525 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3526 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3527 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3528 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3529 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3530 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3531 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3532 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3533 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3534 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3535 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3536 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3537 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3538 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3539 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3540 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3541 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3542 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3543 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3544 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3545 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3546 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3547 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3548 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3549 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3550 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3551 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3552 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3553 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3554 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3555 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3556 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3557 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3558 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3559 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3560 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3561 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3562 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3563 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3564 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3565 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3566 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3567 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3568 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3569 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3570 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3571 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3572 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3573 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3574 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3575 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3576 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3577 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3578 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3579 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3580 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3581 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3582 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3583 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3584 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3585 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3586 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3587 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3588 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3589 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3590 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3591 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3592 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3593 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3594 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3595 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3596 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3597 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3598 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3599 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3600 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3601 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3602 \r
3603.align 4\r
3604\r
3605AF_Z80: .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 0\r
3606 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 1\r
3607 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 2\r
3608 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 3\r
3609 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 4\r
3610 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 5\r
3611 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 6\r
3612 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 7\r
3613 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 8\r
3614 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 9\r
3615 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 10\r
3616 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 11\r
3617 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 12\r
3618 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 13\r
3619 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 14\r
3620 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 15\r
3621 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 16\r
3622 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 17\r
3623 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 18\r
3624 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 19\r
3625 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 20\r
3626 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 21\r
3627 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 22\r
3628 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 23\r
3629 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 24\r
3630 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 25\r
3631 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 26\r
3632 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 27\r
3633 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 28\r
3634 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 29\r
3635 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 30\r
3636 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 31\r
3637 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 32\r
3638 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 33\r
3639 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 34\r
3640 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 35\r
3641 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 36\r
3642 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 37\r
3643 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 38\r
3644 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 39\r
3645 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 40\r
3646 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 41\r
3647 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 42\r
3648 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 43\r
3649 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 44\r
3650 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 45\r
3651 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 46\r
3652 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 47\r
3653 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 48\r
3654 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 49\r
3655 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 50\r
3656 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 51\r
3657 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 52\r
3658 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 53\r
3659 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 54\r
3660 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 55\r
3661 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 56\r
3662 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 57\r
3663 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 58\r
3664 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 59\r
3665 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 60\r
3666 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 61\r
3667 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 62\r
3668 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 63\r
3669 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 64\r
3670 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 65\r
3671 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 66\r
3672 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 67\r
3673 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 68\r
3674 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 69\r
3675 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 70\r
3676 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 71\r
3677 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 72\r
3678 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 73\r
3679 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 74\r
3680 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 75\r
3681 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 76\r
3682 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 77\r
3683 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 78\r
3684 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 79\r
3685 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 80\r
3686 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 81\r
3687 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 82\r
3688 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 83\r
3689 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 84\r
3690 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 85\r
3691 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 86\r
3692 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 87\r
3693 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 88\r
3694 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 89\r
3695 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 90\r
3696 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 91\r
3697 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 92\r
3698 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 93\r
3699 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 94\r
3700 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 95\r
3701 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 96\r
3702 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 97\r
3703 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 98\r
3704 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 99\r
3705 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 100\r
3706 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 101\r
3707 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 102\r
3708 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 103\r
3709 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 104\r
3710 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 105\r
3711 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 106\r
3712 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 107\r
3713 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 108\r
3714 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 109\r
3715 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 110\r
3716 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 111\r
3717 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 112\r
3718 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 113\r
3719 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 114\r
3720 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 115\r
3721 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 116\r
3722 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 117\r
3723 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 118\r
3724 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 119\r
3725 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 120\r
3726 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 121\r
3727 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 122\r
3728 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 123\r
3729 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 124\r
3730 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 125\r
3731 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 126\r
3732 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 127\r
3733 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 128\r
3734 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 129\r
3735 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 130\r
3736 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 131\r
3737 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 132\r
3738 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 133\r
3739 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 134\r
3740 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 135\r
3741 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 136\r
3742 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 137\r
3743 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 138\r
3744 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 139\r
3745 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 140\r
3746 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 141\r
3747 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 142\r
3748 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 143\r
3749 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 144\r
3750 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 145\r
3751 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 146\r
3752 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 147\r
3753 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 148\r
3754 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 149\r
3755 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 150\r
3756 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 151\r
3757 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 152\r
3758 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 153\r
3759 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 154\r
3760 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 155\r
3761 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 156\r
3762 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 157\r
3763 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 158\r
3764 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 159\r
3765 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 160\r
3766 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 161\r
3767 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 162\r
3768 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 163\r
3769 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 164\r
3770 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 165\r
3771 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 166\r
3772 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 167\r
3773 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 168\r
3774 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 169\r
3775 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 170\r
3776 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 171\r
3777 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 172\r
3778 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 173\r
3779 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 174\r
3780 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 175\r
3781 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 176\r
3782 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 177\r
3783 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 178\r
3784 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 179\r
3785 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 180\r
3786 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 181\r
3787 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 182\r
3788 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 183\r
3789 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 184\r
3790 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 185\r
3791 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 186\r
3792 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 187\r
3793 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 188\r
3794 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 189\r
3795 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 190\r
3796 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 191\r
3797 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 192\r
3798 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 193\r
3799 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 194\r
3800 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 195\r
3801 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 196\r
3802 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 197\r
3803 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 198\r
3804 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 199\r
3805 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 200\r
3806 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 201\r
3807 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 202\r
3808 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 203\r
3809 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 204\r
3810 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 205\r
3811 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 206\r
3812 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 207\r
3813 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 208\r
3814 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 209\r
3815 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 210\r
3816 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 211\r
3817 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 212\r
3818 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 213\r
3819 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 214\r
3820 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 215\r
3821 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 216\r
3822 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 217\r
3823 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 218\r
3824 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 219\r
3825 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 220\r
3826 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 221\r
3827 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 222\r
3828 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 223\r
3829 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 224\r
3830 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 225\r
3831 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 226\r
3832 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 227\r
3833 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 228\r
3834 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 229\r
3835 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 230\r
3836 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 231\r
3837 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 232\r
3838 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 233\r
3839 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 234\r
3840 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 235\r
3841 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 236\r
3842 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 237\r
3843 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 238\r
3844 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 239\r
3845 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 240\r
3846 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 241\r
3847 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 242\r
3848 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 243\r
3849 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 244\r
3850 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 245\r
3851 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 246\r
3852 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 247\r
3853 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 248\r
3854 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 249\r
3855 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 250\r
3856 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 251\r
3857 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 252\r
3858 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 253\r
3859 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 254\r
3860 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 255\r
3861\r
3862.align 4\r
3863\r
3864AF_ARM: .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 0\r
3865 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 1\r
3866 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 2\r
3867 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 3\r
3868 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 4\r
3869 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 5\r
3870 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 6\r
3871 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 7\r
3872 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 8\r
3873 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 9\r
3874 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 10\r
3875 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 11\r
3876 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 12\r
3877 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 13\r
3878 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 14\r
3879 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 15\r
3880 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 16\r
3881 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 17\r
3882 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 18\r
3883 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 19\r
3884 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 20\r
3885 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 21\r
3886 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 22\r
3887 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 23\r
3888 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 24\r
3889 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 25\r
3890 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 26\r
3891 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 27\r
3892 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 28\r
3893 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 29\r
3894 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 30\r
3895 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 31\r
3896 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 32\r
3897 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 33\r
3898 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 34\r
3899 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 35\r
3900 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 36\r
3901 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 37\r
3902 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 38\r
3903 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 39\r
3904 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 40\r
3905 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 41\r
3906 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 42\r
3907 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 43\r
3908 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 44\r
3909 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 45\r
3910 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 46\r
3911 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 47\r
3912 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 48\r
3913 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 49\r
3914 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 50\r
3915 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 51\r
3916 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 52\r
3917 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 53\r
3918 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 54\r
3919 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 55\r
3920 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 56\r
3921 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 57\r
3922 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 58\r
3923 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 59\r
3924 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 60\r
3925 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 61\r
3926 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 62\r
3927 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 63\r
3928 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 64\r
3929 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 65\r
3930 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 66\r
3931 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 67\r
3932 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 68\r
3933 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 69\r
3934 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 70\r
3935 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 71\r
3936 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 72\r
3937 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 73\r
3938 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 74\r
3939 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 75\r
3940 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 76\r
3941 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 77\r
3942 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 78\r
3943 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 79\r
3944 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 80\r
3945 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 81\r
3946 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 82\r
3947 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 83\r
3948 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 84\r
3949 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 85\r
3950 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 86\r
3951 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 87\r
3952 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 88\r
3953 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 89\r
3954 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 90\r
3955 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 91\r
3956 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 92\r
3957 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 93\r
3958 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 94\r
3959 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 95\r
3960 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 96\r
3961 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 97\r
3962 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 98\r
3963 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 99\r
3964 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 100\r
3965 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 101\r
3966 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 102\r
3967 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 103\r
3968 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 104\r
3969 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 105\r
3970 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 106\r
3971 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 107\r
3972 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 108\r
3973 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 109\r
3974 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 110\r
3975 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 111\r
3976 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 112\r
3977 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 113\r
3978 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 114\r
3979 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 115\r
3980 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 116\r
3981 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 117\r
3982 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 118\r
3983 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 119\r
3984 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 120\r
3985 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 121\r
3986 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 122\r
3987 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 123\r
3988 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 124\r
3989 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 125\r
3990 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 126\r
3991 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 127\r
3992 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 128\r
3993 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 129\r
3994 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 130\r
3995 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 131\r
3996 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 132\r
3997 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 133\r
3998 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 134\r
3999 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 135\r
4000 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 136\r
4001 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 137\r
4002 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 138\r
4003 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 139\r
4004 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 140\r
4005 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 141\r
4006 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 142\r
4007 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 143\r
4008 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 144\r
4009 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 145\r
4010 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 146\r
4011 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 147\r
4012 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 148\r
4013 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 149\r
4014 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 150\r
4015 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 151\r
4016 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 152\r
4017 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 153\r
4018 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 154\r
4019 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 155\r
4020 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 156\r
4021 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 157\r
4022 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 158\r
4023 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 159\r
4024 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 160\r
4025 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 161\r
4026 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 162\r
4027 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 163\r
4028 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 164\r
4029 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 165\r
4030 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 166\r
4031 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 167\r
4032 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 168\r
4033 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 169\r
4034 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 170\r
4035 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 171\r
4036 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 172\r
4037 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 173\r
4038 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 174\r
4039 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 175\r
4040 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 176\r
4041 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 177\r
4042 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 178\r
4043 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 179\r
4044 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 180\r
4045 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 181\r
4046 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 182\r
4047 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 183\r
4048 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 184\r
4049 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 185\r
4050 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 186\r
4051 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 187\r
4052 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 188\r
4053 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 189\r
4054 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 190\r
4055 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 191\r
4056 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 192\r
4057 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 193\r
4058 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 194\r
4059 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 195\r
4060 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 196\r
4061 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 197\r
4062 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 198\r
4063 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 199\r
4064 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 200\r
4065 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 201\r
4066 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 202\r
4067 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 203\r
4068 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 204\r
4069 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 205\r
4070 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 206\r
4071 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 207\r
4072 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 208\r
4073 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 209\r
4074 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 210\r
4075 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 211\r
4076 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 212\r
4077 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 213\r
4078 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 214\r
4079 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 215\r
4080 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 216\r
4081 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 217\r
4082 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 218\r
4083 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 219\r
4084 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 220\r
4085 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 221\r
4086 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 222\r
4087 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 223\r
4088 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 224\r
4089 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 225\r
4090 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 226\r
4091 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 227\r
4092 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 228\r
4093 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 229\r
4094 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 230\r
4095 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 231\r
4096 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 232\r
4097 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 233\r
4098 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 234\r
4099 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 235\r
4100 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 236\r
4101 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 237\r
4102 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 238\r
4103 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 239\r
4104 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 240\r
4105 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 241\r
4106 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 242\r
4107 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 243\r
4108 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 244\r
4109 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 245\r
4110 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 246\r
4111 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 247\r
4112 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 248\r
4113 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 249\r
4114 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 250\r
4115 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 251\r
4116 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 252\r
4117 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 253\r
4118 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 254\r
4119 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 255\r
4120\r
4121.align 4\r
4122\r
4123PZSTable_data: .byte (1<<ZFlag)|(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4124 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4125 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4126 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4127 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4128 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4129 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4130 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4131 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4132 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4133 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4134 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4135 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4136 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4137 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4138 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4139 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4140 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4141 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4142 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4143 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4144 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4145 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4146 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4147 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4148 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4149 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4150 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4151 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4152 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4153 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4154 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4155 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4156 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4157 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4158 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4159 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4160 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4161 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4162 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4163 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag) \r
4164\r
4165.align 4\r
4166\r
4167MAIN_opcodes: \r
4168 .word opcode_0_0,opcode_0_1,opcode_0_2,opcode_0_3,opcode_0_4,opcode_0_5,opcode_0_6,opcode_0_7\r
4169 .word opcode_0_8,opcode_0_9,opcode_0_A,opcode_0_B,opcode_0_C,opcode_0_D,opcode_0_E,opcode_0_F\r
4170 .word opcode_1_0,opcode_1_1,opcode_1_2,opcode_1_3,opcode_1_4,opcode_1_5,opcode_1_6,opcode_1_7\r
4171 .word opcode_1_8,opcode_1_9,opcode_1_A,opcode_1_B,opcode_1_C,opcode_1_D,opcode_1_E,opcode_1_F\r
4172 .word opcode_2_0,opcode_2_1,opcode_2_2,opcode_2_3,opcode_2_4,opcode_2_5,opcode_2_6,opcode_2_7\r
4173 .word opcode_2_8,opcode_2_9,opcode_2_A,opcode_2_B,opcode_2_C,opcode_2_D,opcode_2_E,opcode_2_F\r
4174 .word opcode_3_0,opcode_3_1,opcode_3_2,opcode_3_3,opcode_3_4,opcode_3_5,opcode_3_6,opcode_3_7\r
4175 .word opcode_3_8,opcode_3_9,opcode_3_A,opcode_3_B,opcode_3_C,opcode_3_D,opcode_3_E,opcode_3_F\r
4176 .word opcode_4_0,opcode_4_1,opcode_4_2,opcode_4_3,opcode_4_4,opcode_4_5,opcode_4_6,opcode_4_7\r
4177 .word opcode_4_8,opcode_4_9,opcode_4_A,opcode_4_B,opcode_4_C,opcode_4_D,opcode_4_E,opcode_4_F\r
4178 .word opcode_5_0,opcode_5_1,opcode_5_2,opcode_5_3,opcode_5_4,opcode_5_5,opcode_5_6,opcode_5_7\r
4179 .word opcode_5_8,opcode_5_9,opcode_5_A,opcode_5_B,opcode_5_C,opcode_5_D,opcode_5_E,opcode_5_F\r
4180 .word opcode_6_0,opcode_6_1,opcode_6_2,opcode_6_3,opcode_6_4,opcode_6_5,opcode_6_6,opcode_6_7\r
4181 .word opcode_6_8,opcode_6_9,opcode_6_A,opcode_6_B,opcode_6_C,opcode_6_D,opcode_6_E,opcode_6_F\r
4182 .word opcode_7_0,opcode_7_1,opcode_7_2,opcode_7_3,opcode_7_4,opcode_7_5,opcode_7_6,opcode_7_7\r
4183 .word opcode_7_8,opcode_7_9,opcode_7_A,opcode_7_B,opcode_7_C,opcode_7_D,opcode_7_E,opcode_7_F\r
4184 .word opcode_8_0,opcode_8_1,opcode_8_2,opcode_8_3,opcode_8_4,opcode_8_5,opcode_8_6,opcode_8_7\r
4185 .word opcode_8_8,opcode_8_9,opcode_8_A,opcode_8_B,opcode_8_C,opcode_8_D,opcode_8_E,opcode_8_F\r
4186 .word opcode_9_0,opcode_9_1,opcode_9_2,opcode_9_3,opcode_9_4,opcode_9_5,opcode_9_6,opcode_9_7\r
4187 .word opcode_9_8,opcode_9_9,opcode_9_A,opcode_9_B,opcode_9_C,opcode_9_D,opcode_9_E,opcode_9_F\r
4188 .word opcode_A_0,opcode_A_1,opcode_A_2,opcode_A_3,opcode_A_4,opcode_A_5,opcode_A_6,opcode_A_7\r
4189 .word opcode_A_8,opcode_A_9,opcode_A_A,opcode_A_B,opcode_A_C,opcode_A_D,opcode_A_E,opcode_A_F\r
4190 .word opcode_B_0,opcode_B_1,opcode_B_2,opcode_B_3,opcode_B_4,opcode_B_5,opcode_B_6,opcode_B_7\r
4191 .word opcode_B_8,opcode_B_9,opcode_B_A,opcode_B_B,opcode_B_C,opcode_B_D,opcode_B_E,opcode_B_F\r
4192 .word opcode_C_0,opcode_C_1,opcode_C_2,opcode_C_3,opcode_C_4,opcode_C_5,opcode_C_6,opcode_C_7\r
4193 .word opcode_C_8,opcode_C_9,opcode_C_A,opcode_C_B,opcode_C_C,opcode_C_D,opcode_C_E,opcode_C_F\r
4194 .word opcode_D_0,opcode_D_1,opcode_D_2,opcode_D_3,opcode_D_4,opcode_D_5,opcode_D_6,opcode_D_7\r
4195 .word opcode_D_8,opcode_D_9,opcode_D_A,opcode_D_B,opcode_D_C,opcode_D_D,opcode_D_E,opcode_D_F\r
4196 .word opcode_E_0,opcode_E_1,opcode_E_2,opcode_E_3,opcode_E_4,opcode_E_5,opcode_E_6,opcode_E_7\r
4197 .word opcode_E_8,opcode_E_9,opcode_E_A,opcode_E_B,opcode_E_C,opcode_E_D,opcode_E_E,opcode_E_F\r
4198 .word opcode_F_0,opcode_F_1,opcode_F_2,opcode_F_3,opcode_F_4,opcode_F_5,opcode_F_6,opcode_F_7\r
4199 .word opcode_F_8,opcode_F_9,opcode_F_A,opcode_F_B,opcode_F_C,opcode_F_D,opcode_F_E,opcode_F_F\r
4200\r
4201.align 4\r
4202\r
4203EI_DUMMY_opcodes:\r
4204 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4205 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4206 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4207 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4208 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4209 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4210 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4211 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4212 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4213 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4214 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4215 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4216 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4217 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4218 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4219 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4220 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4221 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4222 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4223 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4224 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4225 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4226 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4227 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4228 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4229 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4230 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4231 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4232 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4233 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4234 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4235 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4236\r
4237.text\r
4238.align 4\r
4239\r
4240;@NOP\r
4241opcode_0_0:\r
4242;@LD B,B\r
4243opcode_4_0:\r
4244;@LD C,C\r
4245opcode_4_9:\r
4246;@LD D,D\r
4247opcode_5_2:\r
4248;@LD E,E\r
4249opcode_5_B:\r
4250;@LD H,H\r
4251opcode_6_4:\r
4252;@LD L,L\r
4253opcode_6_D:\r
4254;@LD A,A\r
4255opcode_7_F:\r
4256 fetch 4\r
4257;@LD BC,NN\r
4258opcode_0_1:\r
4259 ldrb r0,[z80pc],#1\r
4260 ldrb r1,[z80pc],#1\r
4261 orr r0,r0,r1, lsl #8\r
4262 mov z80bc,r0, lsl #16\r
4263 fetch 10\r
4264;@LD (BC),A\r
4265opcode_0_2:\r
4266 mov r0,z80a, lsr #24\r
4267 mov r1,z80bc, lsr #16\r
4268 writemem8\r
4269 fetch 7\r
4270;@INC BC\r
4271opcode_0_3:\r
4272 add z80bc,z80bc,#1<<16\r
4273 fetch 6\r
4274;@INC B\r
4275opcode_0_4:\r
4276 opINC8H z80bc\r
4277 fetch 4\r
4278;@DEC B\r
4279opcode_0_5:\r
4280 opDEC8H z80bc\r
4281 fetch 4\r
4282;@LD B,N\r
4283opcode_0_6:\r
4284 ldrb r1,[z80pc],#1\r
4285 and z80bc,z80bc,#0xFF<<16\r
4286 orr z80bc,z80bc,r1, lsl #24\r
4287 fetch 7\r
4288;@RLCA\r
4289opcode_0_7:\r
4290 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4291 movs z80a,z80a, lsl #1\r
4292 orrcs z80a,z80a,#1<<24\r
4293 orrcs z80f,z80f,#1<<CFlag\r
4294 fetch 4\r
4295;@EX AF,AF'\r
4296opcode_0_8:\r
4297 ldr r0,[cpucontext,#z80a2]\r
4298 ldr r1,[cpucontext,#z80f2]\r
4299 str z80a,[cpucontext,#z80a2]\r
4300 str z80f,[cpucontext,#z80f2]\r
4301 mov z80a,r0\r
4302 mov z80f,r1\r
4303 fetch 4\r
4304;@ADD HL,BC\r
4305opcode_0_9:\r
4306 opADD16 z80hl z80bc\r
4307 fetch 11\r
4308;@LD A,(BC)\r
4309opcode_0_A:\r
4310 mov r0,z80bc, lsr #16\r
4311 readmem8\r
4312 mov z80a,r0, lsl #24\r
4313 fetch 7\r
4314;@DEC BC\r
4315opcode_0_B:\r
4316 sub z80bc,z80bc,#1<<16\r
4317 fetch 6\r
4318;@INC C\r
4319opcode_0_C:\r
4320 opINC8L z80bc\r
4321 fetch 4\r
4322;@DEC C\r
4323opcode_0_D:\r
4324 opDEC8L z80bc\r
4325 fetch 4\r
4326;@LD C,N\r
4327opcode_0_E:\r
4328 ldrb r1,[z80pc],#1\r
4329 and z80bc,z80bc,#0xFF<<24\r
4330 orr z80bc,z80bc,r1, lsl #16\r
4331 fetch 7\r
4332;@RRCA\r
4333opcode_0_F:\r
4334 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4335 movs z80a,z80a, lsr #25\r
4336 orrcs z80a,z80a,#1<<7\r
4337 orrcs z80f,z80f,#1<<CFlag\r
4338 mov z80a,z80a, lsl #24\r
4339 fetch 4\r
4340;@DJNZ $+2\r
4341opcode_1_0:\r
4342 sub z80bc,z80bc,#1<<24\r
4343 tst z80bc,#0xFF<<24\r
4344 ldrsb r1,[z80pc],#1\r
4345 addne z80pc,z80pc,r1\r
4346 subne z80_icount,z80_icount,#5\r
4347 fetch 8\r
4348\r
4349;@LD DE,NN\r
4350opcode_1_1:\r
4351 ldrb r0,[z80pc],#1\r
4352 ldrb r1,[z80pc],#1\r
4353 orr r0,r0,r1, lsl #8\r
4354 mov z80de,r0, lsl #16\r
4355 fetch 10\r
4356;@LD (DE),A\r
4357opcode_1_2:\r
4358 mov r0,z80a, lsr #24\r
4359 writemem8DE\r
4360 fetch 7\r
4361;@INC DE\r
4362opcode_1_3:\r
4363 add z80de,z80de,#1<<16\r
4364 fetch 6\r
4365;@INC D\r
4366opcode_1_4:\r
4367 opINC8H z80de\r
4368 fetch 4\r
4369;@DEC D\r
4370opcode_1_5:\r
4371 opDEC8H z80de\r
4372 fetch 4\r
4373;@LD D,N\r
4374opcode_1_6:\r
4375 ldrb r1,[z80pc],#1\r
4376 and z80de,z80de,#0xFF<<16\r
4377 orr z80de,z80de,r1, lsl #24\r
4378 fetch 7\r
4379;@RLA\r
4380opcode_1_7:\r
4381 tst z80f,#1<<CFlag\r
4382 orrne z80a,z80a,#1<<23\r
4383 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4384 movs z80a,z80a, lsl #1\r
4385 orrcs z80f,z80f,#1<<CFlag\r
4386 fetch 4\r
4387;@JR $+2\r
4388opcode_1_8:\r
4389 ldrsb r1,[z80pc],#1\r
4390 add z80pc,z80pc,r1\r
4391 fetch 12\r
4392;@ADD HL,DE\r
4393opcode_1_9:\r
4394 opADD16 z80hl z80de\r
4395 fetch 11\r
4396;@LD A,(DE)\r
4397opcode_1_A:\r
4398 mov r0,z80de, lsr #16\r
4399 readmem8\r
4400 mov z80a,r0, lsl #24\r
4401 fetch 7\r
4402;@DEC DE\r
4403opcode_1_B:\r
4404 sub z80de,z80de,#1<<16\r
4405 fetch 6\r
4406;@INC E\r
4407opcode_1_C:\r
4408 opINC8L z80de\r
4409 fetch 4\r
4410;@DEC E\r
4411opcode_1_D:\r
4412 opDEC8L z80de\r
4413 fetch 4\r
4414;@LD E,N\r
4415opcode_1_E:\r
4416 ldrb r0,[z80pc],#1\r
4417 and z80de,z80de,#0xFF<<24\r
4418 orr z80de,z80de,r0, lsl #16\r
4419 fetch 7\r
4420;@RRA\r
4421opcode_1_F:\r
4422 orr z80a,z80a,z80f,lsr#1 ;@get C\r
4423 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4424 movs z80a,z80a,ror#25\r
4425 orrcs z80f,z80f,#1<<CFlag\r
4426 mov z80a,z80a,lsl#24\r
4427 fetch 4\r
4428;@JR NZ,$+2\r
4429opcode_2_0:\r
4430 tst z80f,#1<<ZFlag\r
4431 beq opcode_1_8\r
4432 add z80pc,z80pc,#1\r
4433 fetch 7\r
4434;@LD HL,NN\r
4435opcode_2_1:\r
4436 ldrb r0,[z80pc],#1\r
4437 ldrb r1,[z80pc],#1\r
4438 orr r0,r0,r1, lsl #8\r
4439 mov z80hl,r0, lsl #16\r
4440 fetch 10\r
4441;@LD (NN),HL\r
4442opcode_ED_63:\r
4443 eatcycles 4\r
4444;@LD (NN),HL\r
4445opcode_2_2:\r
4446 ldrb r0,[z80pc],#1\r
4447 ldrb r1,[z80pc],#1\r
4448 orr r1,r0,r1, lsl #8\r
4449 mov r0,z80hl, lsr #16\r
4450 writemem16\r
4451 fetch 16\r
4452;@INC HL\r
4453opcode_2_3:\r
4454 add z80hl,z80hl,#1<<16\r
4455 fetch 6\r
4456;@INC H\r
4457opcode_2_4:\r
4458 opINC8H z80hl\r
4459 fetch 4\r
4460;@DEC H\r
4461opcode_2_5:\r
4462 opDEC8H z80hl\r
4463 fetch 4\r
4464;@LD H,N\r
4465opcode_2_6:\r
4466 ldrb r1,[z80pc],#1\r
4467 and z80hl,z80hl,#0xFF<<16\r
4468 orr z80hl,z80hl,r1, lsl #24\r
4469 fetch 7\r
4470DAATABLE_LOCAL: .word DAATable\r
4471;@DAA\r
4472opcode_2_7:\r
4473 mov r1,z80a, lsr #24\r
4474 tst z80f,#1<<CFlag\r
4475 orrne r1,r1,#256\r
4476 tst z80f,#1<<HFlag\r
4477 orrne r1,r1,#512\r
4478 tst z80f,#1<<NFlag\r
4479 orrne r1,r1,#1024\r
4480 ldr r2,DAATABLE_LOCAL\r
4481 add r2,r2,r1, lsl #1\r
4482 ldrh r1,[r2]\r
4483 and z80f,r1,#0xFF\r
4484 and r2,r1,#0xFF<<8\r
4485 mov z80a,r2, lsl #16\r
4486 fetch 4\r
4487;@JR Z,$+2\r
4488opcode_2_8:\r
4489 tst z80f,#1<<ZFlag\r
4490 bne opcode_1_8\r
4491 add z80pc,z80pc,#1\r
4492 fetch 7\r
4493;@ADD HL,HL\r
4494opcode_2_9:\r
4495 opADD16_2 z80hl\r
4496 fetch 11\r
4497;@LD HL,(NN)\r
4498opcode_ED_6B:\r
4499 eatcycles 4\r
4500;@LD HL,(NN)\r
4501opcode_2_A:\r
4502 ldrb r0,[z80pc],#1\r
4503 ldrb r1,[z80pc],#1\r
4504 orr r0,r0,r1, lsl #8\r
4505 readmem16\r
4506 mov z80hl,r0, lsl #16\r
4507 fetch 16\r
4508;@DEC HL\r
4509opcode_2_B:\r
4510 sub z80hl,z80hl,#1<<16\r
4511 fetch 6\r
4512;@INC L\r
4513opcode_2_C:\r
4514 opINC8L z80hl\r
4515 fetch 4\r
4516;@DEC L\r
4517opcode_2_D:\r
4518 opDEC8L z80hl\r
4519 fetch 4\r
4520;@LD L,N\r
4521opcode_2_E:\r
4522 ldrb r0,[z80pc],#1\r
4523 and z80hl,z80hl,#0xFF<<24\r
4524 orr z80hl,z80hl,r0, lsl #16\r
4525 fetch 7\r
4526;@CPL\r
4527opcode_2_F:\r
4528 eor z80a,z80a,#0xFF<<24\r
4529 orr z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4530 fetch 4\r
4531;@JR NC,$+2\r
4532opcode_3_0:\r
4533 tst z80f,#1<<CFlag\r
4534 beq opcode_1_8\r
4535 add z80pc,z80pc,#1\r
4536 fetch 7\r
4537;@LD SP,NN\r
4538opcode_3_1:\r
4539 ldrb r0,[z80pc],#1\r
4540 ldrb r1,[z80pc],#1\r
4541\r
4542.if FAST_Z80SP\r
4543 orr r0,r0,r1, lsl #8\r
4544 rebasesp\r
4545.else\r
4546 orr z80sp,r0,r1, lsl #8\r
4547.endif\r
4548 fetch 10\r
4549;@LD (NN),A\r
4550opcode_3_2:\r
4551 ldrb r0,[z80pc],#1\r
4552 ldrb r1,[z80pc],#1\r
4553 orr r1,r0,r1, lsl #8\r
4554 mov r0,z80a, lsr #24\r
4555 writemem8\r
4556 fetch 13\r
4557;@INC SP\r
4558opcode_3_3:\r
4559 add z80sp,z80sp,#1\r
4560 fetch 6\r
4561;@INC (HL)\r
4562opcode_3_4:\r
4563 readmem8HL\r
4564 opINC8b\r
4565 writemem8HL\r
4566 fetch 11\r
4567;@DEC (HL)\r
4568opcode_3_5:\r
4569 readmem8HL\r
4570 opDEC8b\r
4571 writemem8HL\r
4572 fetch 11\r
4573;@LD (HL),N\r
4574opcode_3_6:\r
4575 ldrb r0,[z80pc],#1\r
4576 writemem8HL\r
4577 fetch 10\r
4578;@SCF\r
4579opcode_3_7:\r
4580 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4581 orr z80f,z80f,#1<<CFlag\r
4582 fetch 4\r
4583;@JR C,$+2\r
4584opcode_3_8:\r
4585 tst z80f,#1<<CFlag\r
4586 bne opcode_1_8\r
4587 add z80pc,z80pc,#1\r
4588 fetch 7\r
4589;@ADD HL,SP\r
4590opcode_3_9:\r
4591.if FAST_Z80SP\r
4592 ldr r0,[cpucontext,#z80sp_base]\r
4593 sub r0,z80sp,r0\r
4594 opADD16s z80hl r0 16\r
4595.else\r
4596 opADD16s z80hl z80sp 16\r
4597.endif\r
4598 fetch 11\r
4599;@LD A,(NN)\r
4600opcode_3_A:\r
4601 ldrb r0,[z80pc],#1\r
4602 ldrb r1,[z80pc],#1\r
4603 orr r0,r0,r1, lsl #8\r
4604 readmem8\r
4605 mov z80a,r0, lsl #24\r
4606 fetch 13\r
4607;@DEC SP\r
4608opcode_3_B:\r
4609 sub z80sp,z80sp,#1\r
4610 fetch 6\r
4611;@INC A\r
4612opcode_3_C:\r
4613 opINC8 z80a\r
4614 fetch 4\r
4615;@DEC A\r
4616opcode_3_D:\r
4617 opDEC8 z80a\r
4618 fetch 4\r
4619;@LD A,N\r
4620opcode_3_E:\r
4621 ldrb r0,[z80pc],#1\r
4622 mov z80a,r0, lsl #24\r
4623 fetch 7\r
4624;@CCF\r
4625opcode_3_F:\r
4626 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4627 tst z80f,#1<<CFlag\r
4628 orrne z80f,z80f,#1<<HFlag\r
4629 eor z80f,z80f,#1<<CFlag\r
4630 fetch 4\r
4631\r
4632;@LD B,C\r
4633opcode_4_1:\r
4634 and z80bc,z80bc,#0xFF<<16\r
4635 orr z80bc,z80bc,z80bc, lsl #8\r
4636 fetch 4\r
4637;@LD B,D\r
4638opcode_4_2:\r
4639 and z80bc,z80bc,#0xFF<<16\r
4640 and r1,z80de,#0xFF<<24\r
4641 orr z80bc,z80bc,r1\r
4642 fetch 4\r
4643;@LD B,E\r
4644opcode_4_3:\r
4645 and z80bc,z80bc,#0xFF<<16\r
4646 and r1,z80de,#0xFF<<16\r
4647 orr z80bc,z80bc,r1, lsl #8\r
4648 fetch 4\r
4649;@LD B,H\r
4650opcode_4_4:\r
4651 and z80bc,z80bc,#0xFF<<16\r
4652 and r1,z80hl,#0xFF<<24\r
4653 orr z80bc,z80bc,r1\r
4654 fetch 4\r
4655;@LD B,L\r
4656opcode_4_5:\r
4657 and z80bc,z80bc,#0xFF<<16\r
4658 and r1,z80hl,#0xFF<<16\r
4659 orr z80bc,z80bc,r1, lsl #8\r
4660 fetch 4\r
4661;@LD B,(HL)\r
4662opcode_4_6:\r
4663 readmem8HL\r
4664 and z80bc,z80bc,#0xFF<<16\r
4665 orr z80bc,z80bc,r0, lsl #24\r
4666 fetch 7\r
4667;@LD B,A\r
4668opcode_4_7:\r
4669 and z80bc,z80bc,#0xFF<<16\r
4670 orr z80bc,z80bc,z80a\r
4671 fetch 4\r
4672;@LD C,B\r
4673opcode_4_8:\r
4674 and z80bc,z80bc,#0xFF<<24\r
4675 orr z80bc,z80bc,z80bc, lsr #8\r
4676 fetch 4\r
4677;@LD C,D\r
4678opcode_4_A:\r
4679 and z80bc,z80bc,#0xFF<<24\r
4680 and r1,z80de,#0xFF<<24\r
4681 orr z80bc,z80bc,r1, lsr #8\r
4682 fetch 4\r
4683;@LD C,E\r
4684opcode_4_B:\r
4685 and z80bc,z80bc,#0xFF<<24\r
4686 and r1,z80de,#0xFF<<16\r
4687 orr z80bc,z80bc,r1 \r
4688 fetch 4\r
4689;@LD C,H\r
4690opcode_4_C:\r
4691 and z80bc,z80bc,#0xFF<<24\r
4692 and r1,z80hl,#0xFF<<24\r
4693 orr z80bc,z80bc,r1, lsr #8\r
4694 fetch 4\r
4695;@LD C,L\r
4696opcode_4_D:\r
4697 and z80bc,z80bc,#0xFF<<24\r
4698 and r1,z80hl,#0xFF<<16\r
4699 orr z80bc,z80bc,r1 \r
4700 fetch 4\r
4701;@LD C,(HL)\r
4702opcode_4_E:\r
4703 readmem8HL\r
4704 and z80bc,z80bc,#0xFF<<24\r
4705 orr z80bc,z80bc,r0, lsl #16\r
4706 fetch 7\r
4707;@LD C,A\r
4708opcode_4_F:\r
4709 and z80bc,z80bc,#0xFF<<24\r
4710 orr z80bc,z80bc,z80a, lsr #8\r
4711 fetch 4\r
4712;@LD D,B\r
4713opcode_5_0:\r
4714 and z80de,z80de,#0xFF<<16\r
4715 and r1,z80bc,#0xFF<<24\r
4716 orr z80de,z80de,r1\r
4717 fetch 4\r
4718;@LD D,C\r
4719opcode_5_1:\r
4720 and z80de,z80de,#0xFF<<16\r
4721 orr z80de,z80de,z80bc, lsl #8\r
4722 fetch 4\r
4723;@LD D,E\r
4724opcode_5_3:\r
4725 and z80de,z80de,#0xFF<<16\r
4726 orr z80de,z80de,z80de, lsl #8\r
4727 fetch 4\r
4728;@LD D,H\r
4729opcode_5_4:\r
4730 and z80de,z80de,#0xFF<<16\r
4731 and r1,z80hl,#0xFF<<24\r
4732 orr z80de,z80de,r1\r
4733 fetch 4\r
4734;@LD D,L\r
4735opcode_5_5:\r
4736 and z80de,z80de,#0xFF<<16\r
4737 orr z80de,z80de,z80hl, lsl #8\r
4738 fetch 4\r
4739;@LD D,(HL)\r
4740opcode_5_6:\r
4741 readmem8HL\r
4742 and z80de,z80de,#0xFF<<16\r
4743 orr z80de,z80de,r0, lsl #24\r
4744 fetch 7\r
4745;@LD D,A\r
4746opcode_5_7:\r
4747 and z80de,z80de,#0xFF<<16\r
4748 orr z80de,z80de,z80a\r
4749 fetch 4\r
4750;@LD E,B\r
4751opcode_5_8:\r
4752 and z80de,z80de,#0xFF<<24\r
4753 and r1,z80bc,#0xFF<<24\r
4754 orr z80de,z80de,r1, lsr #8\r
4755 fetch 4\r
4756;@LD E,C\r
4757opcode_5_9:\r
4758 and z80de,z80de,#0xFF<<24\r
4759 and r1,z80bc,#0xFF<<16\r
4760 orr z80de,z80de,r1 \r
4761 fetch 4\r
4762;@LD E,D\r
4763opcode_5_A:\r
4764 and z80de,z80de,#0xFF<<24\r
4765 orr z80de,z80de,z80de, lsr #8\r
4766 fetch 4\r
4767;@LD E,H\r
4768opcode_5_C:\r
4769 and z80de,z80de,#0xFF<<24\r
4770 and r1,z80hl,#0xFF<<24\r
4771 orr z80de,z80de,r1, lsr #8\r
4772 fetch 4\r
4773;@LD E,L\r
4774opcode_5_D:\r
4775 and z80de,z80de,#0xFF<<24\r
4776 and r1,z80hl,#0xFF<<16\r
4777 orr z80de,z80de,r1 \r
4778 fetch 4\r
4779;@LD E,(HL)\r
4780opcode_5_E:\r
4781 readmem8HL\r
4782 and z80de,z80de,#0xFF<<24\r
4783 orr z80de,z80de,r0, lsl #16\r
4784 fetch 7\r
4785;@LD E,A\r
4786opcode_5_F:\r
4787 and z80de,z80de,#0xFF<<24\r
4788 orr z80de,z80de,z80a, lsr #8\r
4789 fetch 4\r
4790\r
4791;@LD H,B\r
4792opcode_6_0:\r
4793 and z80hl,z80hl,#0xFF<<16\r
4794 and r1,z80bc,#0xFF<<24\r
4795 orr z80hl,z80hl,r1\r
4796 fetch 4\r
4797;@LD H,C\r
4798opcode_6_1:\r
4799 and z80hl,z80hl,#0xFF<<16\r
4800 orr z80hl,z80hl,z80bc, lsl #8\r
4801 fetch 4\r
4802;@LD H,D\r
4803opcode_6_2:\r
4804 and z80hl,z80hl,#0xFF<<16\r
4805 and r1,z80de,#0xFF<<24\r
4806 orr z80hl,z80hl,r1\r
4807 fetch 4\r
4808;@LD H,E\r
4809opcode_6_3:\r
4810 and z80hl,z80hl,#0xFF<<16\r
4811 orr z80hl,z80hl,z80de, lsl #8\r
4812 fetch 4\r
4813;@LD H,L\r
4814opcode_6_5:\r
4815 and z80hl,z80hl,#0xFF<<16\r
4816 orr z80hl,z80hl,z80hl, lsl #8\r
4817 fetch 4\r
4818;@LD H,(HL)\r
4819opcode_6_6:\r
4820 readmem8HL\r
4821 and z80hl,z80hl,#0xFF<<16\r
4822 orr z80hl,z80hl,r0, lsl #24\r
4823 fetch 7\r
4824;@LD H,A\r
4825opcode_6_7:\r
4826 and z80hl,z80hl,#0xFF<<16\r
4827 orr z80hl,z80hl,z80a\r
4828 fetch 4\r
4829\r
4830;@LD L,B\r
4831opcode_6_8:\r
4832 and z80hl,z80hl,#0xFF<<24\r
4833 and r1,z80bc,#0xFF<<24\r
4834 orr z80hl,z80hl,r1, lsr #8\r
4835 fetch 4\r
4836;@LD L,C\r
4837opcode_6_9:\r
4838 and z80hl,z80hl,#0xFF<<24\r
4839 and r1,z80bc,#0xFF<<16\r
4840 orr z80hl,z80hl,r1\r
4841 fetch 4\r
4842;@LD L,D\r
4843opcode_6_A:\r
4844 and z80hl,z80hl,#0xFF<<24\r
4845 and r1,z80de,#0xFF<<24\r
4846 orr z80hl,z80hl,r1, lsr #8\r
4847 fetch 4\r
4848;@LD L,E\r
4849opcode_6_B:\r
4850 and z80hl,z80hl,#0xFF<<24\r
4851 and r1,z80de,#0xFF<<16\r
4852 orr z80hl,z80hl,r1\r
4853 fetch 4\r
4854;@LD L,H\r
4855opcode_6_C:\r
4856 and z80hl,z80hl,#0xFF<<24\r
4857 orr z80hl,z80hl,z80hl, lsr #8\r
4858 fetch 4\r
4859;@LD L,(HL)\r
4860opcode_6_E:\r
4861 readmem8HL\r
4862 and z80hl,z80hl,#0xFF<<24\r
4863 orr z80hl,z80hl,r0, lsl #16\r
4864 fetch 7\r
4865;@LD L,A\r
4866opcode_6_F:\r
4867 and z80hl,z80hl,#0xFF<<24\r
4868 orr z80hl,z80hl,z80a, lsr #8\r
4869 fetch 4\r
4870\r
4871;@LD (HL),B\r
4872opcode_7_0:\r
4873 mov r0,z80bc, lsr #24\r
4874 writemem8HL\r
4875 fetch 7\r
4876;@LD (HL),C\r
4877opcode_7_1:\r
4878 mov r0,z80bc, lsr #16\r
4879 and r0,r0,#0xFF\r
4880 writemem8HL\r
4881 fetch 7\r
4882;@LD (HL),D\r
4883opcode_7_2:\r
4884 mov r0,z80de, lsr #24\r
4885 writemem8HL\r
4886 fetch 7\r
4887;@LD (HL),E\r
4888opcode_7_3:\r
4889 mov r0,z80de, lsr #16\r
4890 and r0,r0,#0xFF\r
4891 writemem8HL\r
4892 fetch 7\r
4893;@LD (HL),H\r
4894opcode_7_4:\r
4895 mov r0,z80hl, lsr #24\r
4896 writemem8HL\r
4897 fetch 7\r
4898;@LD (HL),L\r
4899opcode_7_5:\r
4900 mov r1,z80hl, lsr #16\r
4901 and r0,r1,#0xFF\r
4902 writemem8\r
4903 fetch 7\r
4904;@HALT\r
4905opcode_7_6:\r
4906 sub z80pc,z80pc,#1\r
4907 ldrb r0,[cpucontext,#z80if]\r
4908 orr r0,r0,#Z80_HALT\r
4909 strb r0,[cpucontext,#z80if]\r
4910 mov z80_icount,#0\r
4911 b z80_execute_end\r
4912;@LD (HL),A\r
4913opcode_7_7:\r
4914 mov r0,z80a, lsr #24\r
4915 writemem8HL\r
4916 fetch 7\r
4917\r
4918;@LD A,B\r
4919opcode_7_8:\r
4920 and z80a,z80bc,#0xFF<<24\r
4921 fetch 4\r
4922;@LD A,C\r
4923opcode_7_9:\r
4924 mov z80a,z80bc, lsl #8\r
4925 fetch 4\r
4926;@LD A,D\r
4927opcode_7_A:\r
4928 and z80a,z80de,#0xFF<<24\r
4929 fetch 4\r
4930;@LD A,E\r
4931opcode_7_B:\r
4932 mov z80a,z80de, lsl #8\r
4933 fetch 4\r
4934;@LD A,H\r
4935opcode_7_C:\r
4936 and z80a,z80hl,#0xFF<<24\r
4937 fetch 4\r
4938;@LD A,L\r
4939opcode_7_D:\r
4940 mov z80a,z80hl, lsl #8\r
4941 fetch 4\r
4942;@LD A,(HL)\r
4943opcode_7_E:\r
4944 readmem8HL\r
4945 mov z80a,r0, lsl #24\r
4946 fetch 7\r
4947\r
4948;@ADD A,B\r
4949opcode_8_0:\r
4950 opADDH z80bc\r
4951;@ADD A,C\r
4952opcode_8_1:\r
4953 opADDL z80bc\r
4954;@ADD A,D\r
4955opcode_8_2:\r
4956 opADDH z80de\r
4957;@ADD A,E\r
4958opcode_8_3:\r
4959 opADDL z80de\r
4960;@ADD A,H\r
4961opcode_8_4:\r
4962 opADDH z80hl\r
4963;@ADD A,L\r
4964opcode_8_5:\r
4965 opADDL z80hl\r
4966;@ADD A,(HL)\r
4967opcode_8_6:\r
4968 readmem8HL\r
4969 opADDb\r
4970 fetch 7\r
4971;@ADD A,A\r
4972opcode_8_7:\r
4973 opADDA\r
4974\r
4975;@ADC A,B\r
4976opcode_8_8:\r
4977 opADCH z80bc\r
4978;@ADC A,C\r
4979opcode_8_9:\r
4980 opADCL z80bc\r
4981;@ADC A,D\r
4982opcode_8_A:\r
4983 opADCH z80de\r
4984;@ADC A,E\r
4985opcode_8_B:\r
4986 opADCL z80de\r
4987;@ADC A,H\r
4988opcode_8_C:\r
4989 opADCH z80hl\r
4990;@ADC A,L\r
4991opcode_8_D:\r
4992 opADCL z80hl\r
4993;@ADC A,(HL)\r
4994opcode_8_E:\r
4995 readmem8HL\r
4996 opADCb\r
4997 fetch 7\r
4998;@ADC A,A\r
4999opcode_8_F:\r
5000 opADCA\r
5001\r
5002;@SUB B\r
5003opcode_9_0:\r
5004 opSUBH z80bc\r
5005;@SUB C\r
5006opcode_9_1:\r
5007 opSUBL z80bc\r
5008;@SUB D\r
5009opcode_9_2:\r
5010 opSUBH z80de\r
5011;@SUB E\r
5012opcode_9_3:\r
5013 opSUBL z80de\r
5014;@SUB H\r
5015opcode_9_4:\r
5016 opSUBH z80hl\r
5017;@SUB L\r
5018opcode_9_5:\r
5019 opSUBL z80hl\r
5020;@SUB (HL)\r
5021opcode_9_6:\r
5022 readmem8HL\r
5023 opSUBb\r
5024 fetch 7\r
5025;@SUB A\r
5026opcode_9_7:\r
5027 opSUBA\r
5028\r
5029;@SBC B \r
5030opcode_9_8:\r
5031 opSBCH z80bc\r
5032;@SBC C\r
5033opcode_9_9:\r
5034 opSBCL z80bc\r
5035;@SBC D\r
5036opcode_9_A:\r
5037 opSBCH z80de\r
5038;@SBC E\r
5039opcode_9_B:\r
5040 opSBCL z80de\r
5041;@SBC H\r
5042opcode_9_C:\r
5043 opSBCH z80hl\r
5044;@SBC L\r
5045opcode_9_D:\r
5046 opSBCL z80hl\r
5047;@SBC (HL)\r
5048opcode_9_E:\r
5049 readmem8HL\r
5050 opSBCb\r
5051 fetch 7\r
5052;@SBC A\r
5053opcode_9_F:\r
5054 opSBCA\r
5055\r
5056;@AND B\r
5057opcode_A_0:\r
5058 opANDH z80bc\r
5059;@AND C\r
5060opcode_A_1:\r
5061 opANDL z80bc\r
5062;@AND D\r
5063opcode_A_2:\r
5064 opANDH z80de\r
5065;@AND E\r
5066opcode_A_3:\r
5067 opANDL z80de\r
5068;@AND H\r
5069opcode_A_4:\r
5070 opANDH z80hl\r
5071;@AND L\r
5072opcode_A_5:\r
5073 opANDL z80hl\r
5074;@AND (HL)\r
5075opcode_A_6:\r
5076 readmem8HL\r
5077 opANDb\r
5078 fetch 7\r
5079;@AND A\r
5080opcode_A_7:\r
5081 opANDA\r
5082\r
5083;@XOR B\r
5084opcode_A_8:\r
5085 opXORH z80bc\r
5086;@XOR C\r
5087opcode_A_9:\r
5088 opXORL z80bc\r
5089;@XOR D\r
5090opcode_A_A:\r
5091 opXORH z80de\r
5092;@XOR E\r
5093opcode_A_B:\r
5094 opXORL z80de\r
5095;@XOR H\r
5096opcode_A_C:\r
5097 opXORH z80hl\r
5098;@XOR L\r
5099opcode_A_D:\r
5100 opXORL z80hl\r
5101;@XOR (HL)\r
5102opcode_A_E:\r
5103 readmem8HL\r
5104 opXORb\r
5105 fetch 7\r
5106;@XOR A\r
5107opcode_A_F:\r
5108 opXORA\r
5109\r
5110;@OR B\r
5111opcode_B_0:\r
5112 opORH z80bc\r
5113;@OR C\r
5114opcode_B_1:\r
5115 opORL z80bc\r
5116;@OR D\r
5117opcode_B_2:\r
5118 opORH z80de\r
5119;@OR E\r
5120opcode_B_3:\r
5121 opORL z80de\r
5122;@OR H\r
5123opcode_B_4:\r
5124 opORH z80hl\r
5125;@OR L\r
5126opcode_B_5:\r
5127 opORL z80hl\r
5128;@OR (HL)\r
5129opcode_B_6:\r
5130 readmem8HL\r
5131 opORb\r
5132 fetch 7\r
5133;@OR A\r
5134opcode_B_7:\r
5135 opORA\r
5136\r
5137;@CP B\r
5138opcode_B_8:\r
5139 opCPH z80bc\r
5140;@CP C\r
5141opcode_B_9:\r
5142 opCPL z80bc\r
5143;@CP D\r
5144opcode_B_A:\r
5145 opCPH z80de\r
5146;@CP E\r
5147opcode_B_B:\r
5148 opCPL z80de\r
5149;@CP H\r
5150opcode_B_C:\r
5151 opCPH z80hl\r
5152;@CP L\r
5153opcode_B_D:\r
5154 opCPL z80hl\r
5155;@CP (HL)\r
5156opcode_B_E:\r
5157 readmem8HL\r
5158 opCPb\r
5159 fetch 7\r
5160;@CP A\r
5161opcode_B_F:\r
5162 opCPA\r
5163\r
5164;@RET NZ\r
5165opcode_C_0:\r
5166 tst z80f,#1<<ZFlag\r
5167 beq opcode_C_9_cond ;@unconditional RET\r
5168 fetch 5\r
5169\r
5170;@POP BC\r
5171opcode_C_1:\r
5172 opPOPreg z80bc\r
5173\r
5174;@JP NZ,$+3\r
5175opcode_C_2:\r
5176 tst z80f,#1<<ZFlag\r
5177 beq opcode_C_3 ;@unconditional JP\r
5178 add z80pc,z80pc,#2\r
5179 fetch 10\r
5180;@JP $+3\r
5181opcode_C_3:\r
5182 ldrb r0,[z80pc],#1\r
5183 ldrb r1,[z80pc],#1\r
5184 orr r0,r0,r1, lsl #8\r
5185 rebasepc\r
5186 fetch 10\r
5187;@CALL NZ,NN\r
5188opcode_C_4:\r
5189 tst z80f,#1<<ZFlag\r
5190 beq opcode_C_D ;@unconditional CALL\r
5191 add z80pc,z80pc,#2\r
5192 fetch 10\r
5193\r
5194;@PUSH BC\r
5195opcode_C_5:\r
5196 opPUSHreg z80bc\r
5197 fetch 11\r
5198;@ADD A,N\r
5199opcode_C_6:\r
5200 ldrb r0,[z80pc],#1\r
5201 opADDb\r
5202 fetch 7\r
5203;@RST 0\r
5204opcode_C_7:\r
5205 opRST 0x00\r
5206\r
5207;@RET Z\r
5208opcode_C_8:\r
5209 tst z80f,#1<<ZFlag\r
5210 bne opcode_C_9_cond ;@unconditional RET\r
5211 fetch 5\r
5212\r
5213opcode_C_9_cond:\r
5214 eatcycles 1\r
5215;@RET\r
5216opcode_C_9:\r
5217 opPOP\r
5218 rebasepc\r
5219 fetch 10\r
5220;@JP Z,$+3\r
5221opcode_C_A:\r
5222 tst z80f,#1<<ZFlag\r
5223 bne opcode_C_3 ;@unconditional JP\r
5224 add z80pc,z80pc,#2\r
5225 fetch 10\r
5226\r
5227;@This reads this opcodes_CB lookup table to find the location of\r
5228;@the CB sub for the intruction and then branches to that location\r
5229opcode_C_B:\r
5230 ldrb r0,[z80pc],#1\r
5231 ldr pc,[pc,r0, lsl #2]\r
5232opcodes_CB: .word 0x00000000\r
5233 .word opcode_CB_00,opcode_CB_01,opcode_CB_02,opcode_CB_03,opcode_CB_04,opcode_CB_05,opcode_CB_06,opcode_CB_07\r
5234 .word opcode_CB_08,opcode_CB_09,opcode_CB_0A,opcode_CB_0B,opcode_CB_0C,opcode_CB_0D,opcode_CB_0E,opcode_CB_0F\r
5235 .word opcode_CB_10,opcode_CB_11,opcode_CB_12,opcode_CB_13,opcode_CB_14,opcode_CB_15,opcode_CB_16,opcode_CB_17\r
5236 .word opcode_CB_18,opcode_CB_19,opcode_CB_1A,opcode_CB_1B,opcode_CB_1C,opcode_CB_1D,opcode_CB_1E,opcode_CB_1F\r
5237 .word opcode_CB_20,opcode_CB_21,opcode_CB_22,opcode_CB_23,opcode_CB_24,opcode_CB_25,opcode_CB_26,opcode_CB_27\r
5238 .word opcode_CB_28,opcode_CB_29,opcode_CB_2A,opcode_CB_2B,opcode_CB_2C,opcode_CB_2D,opcode_CB_2E,opcode_CB_2F\r
5239 .word opcode_CB_30,opcode_CB_31,opcode_CB_32,opcode_CB_33,opcode_CB_34,opcode_CB_35,opcode_CB_36,opcode_CB_37\r
5240 .word opcode_CB_38,opcode_CB_39,opcode_CB_3A,opcode_CB_3B,opcode_CB_3C,opcode_CB_3D,opcode_CB_3E,opcode_CB_3F\r
5241 .word opcode_CB_40,opcode_CB_41,opcode_CB_42,opcode_CB_43,opcode_CB_44,opcode_CB_45,opcode_CB_46,opcode_CB_47\r
5242 .word opcode_CB_48,opcode_CB_49,opcode_CB_4A,opcode_CB_4B,opcode_CB_4C,opcode_CB_4D,opcode_CB_4E,opcode_CB_4F\r
5243 .word opcode_CB_50,opcode_CB_51,opcode_CB_52,opcode_CB_53,opcode_CB_54,opcode_CB_55,opcode_CB_56,opcode_CB_57\r
5244 .word opcode_CB_58,opcode_CB_59,opcode_CB_5A,opcode_CB_5B,opcode_CB_5C,opcode_CB_5D,opcode_CB_5E,opcode_CB_5F\r
5245 .word opcode_CB_60,opcode_CB_61,opcode_CB_62,opcode_CB_63,opcode_CB_64,opcode_CB_65,opcode_CB_66,opcode_CB_67\r
5246 .word opcode_CB_68,opcode_CB_69,opcode_CB_6A,opcode_CB_6B,opcode_CB_6C,opcode_CB_6D,opcode_CB_6E,opcode_CB_6F\r
5247 .word opcode_CB_70,opcode_CB_71,opcode_CB_72,opcode_CB_73,opcode_CB_74,opcode_CB_75,opcode_CB_76,opcode_CB_77\r
5248 .word opcode_CB_78,opcode_CB_79,opcode_CB_7A,opcode_CB_7B,opcode_CB_7C,opcode_CB_7D,opcode_CB_7E,opcode_CB_7F\r
5249 .word opcode_CB_80,opcode_CB_81,opcode_CB_82,opcode_CB_83,opcode_CB_84,opcode_CB_85,opcode_CB_86,opcode_CB_87\r
5250 .word opcode_CB_88,opcode_CB_89,opcode_CB_8A,opcode_CB_8B,opcode_CB_8C,opcode_CB_8D,opcode_CB_8E,opcode_CB_8F\r
5251 .word opcode_CB_90,opcode_CB_91,opcode_CB_92,opcode_CB_93,opcode_CB_94,opcode_CB_95,opcode_CB_96,opcode_CB_97\r
5252 .word opcode_CB_98,opcode_CB_99,opcode_CB_9A,opcode_CB_9B,opcode_CB_9C,opcode_CB_9D,opcode_CB_9E,opcode_CB_9F\r
5253 .word opcode_CB_A0,opcode_CB_A1,opcode_CB_A2,opcode_CB_A3,opcode_CB_A4,opcode_CB_A5,opcode_CB_A6,opcode_CB_A7\r
5254 .word opcode_CB_A8,opcode_CB_A9,opcode_CB_AA,opcode_CB_AB,opcode_CB_AC,opcode_CB_AD,opcode_CB_AE,opcode_CB_AF\r
5255 .word opcode_CB_B0,opcode_CB_B1,opcode_CB_B2,opcode_CB_B3,opcode_CB_B4,opcode_CB_B5,opcode_CB_B6,opcode_CB_B7\r
5256 .word opcode_CB_B8,opcode_CB_B9,opcode_CB_BA,opcode_CB_BB,opcode_CB_BC,opcode_CB_BD,opcode_CB_BE,opcode_CB_BF\r
5257 .word opcode_CB_C0,opcode_CB_C1,opcode_CB_C2,opcode_CB_C3,opcode_CB_C4,opcode_CB_C5,opcode_CB_C6,opcode_CB_C7\r
5258 .word opcode_CB_C8,opcode_CB_C9,opcode_CB_CA,opcode_CB_CB,opcode_CB_CC,opcode_CB_CD,opcode_CB_CE,opcode_CB_CF\r
5259 .word opcode_CB_D0,opcode_CB_D1,opcode_CB_D2,opcode_CB_D3,opcode_CB_D4,opcode_CB_D5,opcode_CB_D6,opcode_CB_D7\r
5260 .word opcode_CB_D8,opcode_CB_D9,opcode_CB_DA,opcode_CB_DB,opcode_CB_DC,opcode_CB_DD,opcode_CB_DE,opcode_CB_DF\r
5261 .word opcode_CB_E0,opcode_CB_E1,opcode_CB_E2,opcode_CB_E3,opcode_CB_E4,opcode_CB_E5,opcode_CB_E6,opcode_CB_E7\r
5262 .word opcode_CB_E8,opcode_CB_E9,opcode_CB_EA,opcode_CB_EB,opcode_CB_EC,opcode_CB_ED,opcode_CB_EE,opcode_CB_EF\r
5263 .word opcode_CB_F0,opcode_CB_F1,opcode_CB_F2,opcode_CB_F3,opcode_CB_F4,opcode_CB_F5,opcode_CB_F6,opcode_CB_F7\r
5264 .word opcode_CB_F8,opcode_CB_F9,opcode_CB_FA,opcode_CB_FB,opcode_CB_FC,opcode_CB_FD,opcode_CB_FE,opcode_CB_FF\r
5265\r
5266;@CALL Z,NN\r
5267opcode_C_C:\r
5268 tst z80f,#1<<ZFlag\r
5269 bne opcode_C_D ;@unconditional CALL\r
5270 add z80pc,z80pc,#2\r
5271 fetch 10\r
5272;@CALL NN\r
5273opcode_C_D:\r
5274 ldrb r0,[z80pc],#1\r
5275 ldrb r1,[z80pc],#1\r
5276 ldr r2,[cpucontext,#z80pc_base]\r
5277 sub r2,z80pc,r2\r
5278 orr z80pc,r0,r1, lsl #8\r
5279 opPUSHareg r2\r
5280 mov r0,z80pc\r
5281 rebasepc\r
5282 fetch 17\r
5283;@ADC A,N\r
5284opcode_C_E:\r
5285 ldrb r0,[z80pc],#1\r
5286 opADCb\r
5287 fetch 7\r
5288;@RST 8H\r
5289opcode_C_F:\r
5290 opRST 0x08\r
5291\r
5292;@RET NC\r
5293opcode_D_0:\r
5294 tst z80f,#1<<CFlag\r
5295 beq opcode_C_9_cond ;@unconditional RET\r
5296 fetch 5\r
5297;@POP DE\r
5298opcode_D_1:\r
5299 opPOPreg z80de\r
5300\r
5301;@JP NC, $+3\r
5302opcode_D_2 :\r
5303 tst z80f,#1<<CFlag\r
5304 beq opcode_C_3 ;@unconditional JP\r
5305 add z80pc,z80pc,#2\r
5306 fetch 10\r
5307;@OUT (N),A\r
5308opcode_D_3:\r
5309 ldrb r0,[z80pc],#1\r
5310 orr r0,r0,z80a,lsr#16\r
5311 mov r1,z80a, lsr #24\r
5312 opOUT\r
5313 fetch 11\r
5314;@CALL NC,NN\r
5315opcode_D_4:\r
5316 tst z80f,#1<<CFlag\r
5317 beq opcode_C_D ;@unconditional CALL\r
5318 add z80pc,z80pc,#2\r
5319 fetch 10\r
5320;@PUSH DE\r
5321opcode_D_5:\r
5322 opPUSHreg z80de\r
5323 fetch 11\r
5324;@SUB N\r
5325opcode_D_6:\r
5326 ldrb r0,[z80pc],#1\r
5327 opSUBb\r
5328 fetch 7\r
5329\r
5330;@RST 10H\r
5331opcode_D_7:\r
5332 opRST 0x10\r
5333\r
5334;@RET C\r
5335opcode_D_8:\r
5336 tst z80f,#1<<CFlag\r
5337 bne opcode_C_9_cond ;@unconditional RET\r
5338 fetch 5\r
5339;@EXX\r
5340opcode_D_9:\r
5341 ldr r0,[cpucontext,#z80bc2]\r
5342 ldr r1,[cpucontext,#z80de2]\r
5343 ldr r2,[cpucontext,#z80hl2]\r
5344 str z80bc,[cpucontext,#z80bc2]\r
5345 str z80de,[cpucontext,#z80de2]\r
5346 str z80hl,[cpucontext,#z80hl2]\r
5347 mov z80bc,r0\r
5348 mov z80de,r1\r
5349 mov z80hl,r2\r
5350 fetch 4\r
5351;@JP C,$+3\r
5352opcode_D_A:\r
5353 tst z80f,#1<<CFlag\r
5354 bne opcode_C_3 ;@unconditional JP\r
5355 add z80pc,z80pc,#2\r
5356 fetch 10\r
5357;@IN A,(N)\r
5358opcode_D_B:\r
5359 ldrb r0,[z80pc],#1\r
5360 orr r0,r0,z80a,lsr#16\r
5361 opIN\r
5362 mov z80a,r0, lsl #24 ;@ r0 = data read\r
5363 fetch 11\r
5364;@CALL C,NN\r
5365opcode_D_C:\r
5366 tst z80f,#1<<CFlag\r
5367 bne opcode_C_D ;@unconditional CALL\r
5368 add z80pc,z80pc,#2\r
5369 fetch 10\r
5370\r
5371;@opcodes_DD\r
5372opcode_D_D:\r
5373 add z80xx,cpucontext,#z80ix\r
5374 b opcode_D_D_F_D\r
5375opcode_F_D:\r
5376 add z80xx,cpucontext,#z80iy\r
5377opcode_D_D_F_D:\r
5378 ldrb r0,[z80pc],#1\r
5379 ldr pc,[pc,r0, lsl #2]\r
5380opcodes_DD: .word 0x00000000\r
5381 .word opcode_0_0, opcode_0_1, opcode_0_2, opcode_0_3, opcode_0_4, opcode_0_5, opcode_0_6, opcode_0_7\r
5382 .word opcode_0_8, opcode_DD_09,opcode_0_A, opcode_0_B, opcode_0_C, opcode_0_D, opcode_0_E, opcode_0_F\r
5383 .word opcode_1_0, opcode_1_1, opcode_1_2, opcode_1_3, opcode_1_4, opcode_1_5, opcode_1_6, opcode_1_7\r
5384 .word opcode_1_8, opcode_DD_19,opcode_1_A, opcode_1_B, opcode_1_C, opcode_1_D, opcode_1_E, opcode_1_F\r
5385 .word opcode_2_0, opcode_DD_21,opcode_DD_22,opcode_DD_23,opcode_DD_24,opcode_DD_25,opcode_DD_26,opcode_2_7\r
5386 .word opcode_2_8, opcode_DD_29,opcode_DD_2A,opcode_DD_2B,opcode_DD_2C,opcode_DD_2D,opcode_DD_2E,opcode_2_F\r
5387 .word opcode_3_0, opcode_3_1, opcode_3_2, opcode_3_3, opcode_DD_34,opcode_DD_35,opcode_DD_36,opcode_3_7\r
5388 .word opcode_3_8, opcode_DD_39,opcode_3_A, opcode_3_B, opcode_3_C, opcode_3_D, opcode_3_E, opcode_3_F\r
5389 .word opcode_4_0, opcode_4_1, opcode_4_2, opcode_4_3, opcode_DD_44,opcode_DD_45,opcode_DD_46,opcode_4_7\r
5390 .word opcode_4_8, opcode_4_9, opcode_4_A, opcode_4_B, opcode_DD_4C,opcode_DD_4D,opcode_DD_4E,opcode_4_F\r
5391 .word opcode_5_0, opcode_5_1, opcode_5_2, opcode_5_3, opcode_DD_54,opcode_DD_55,opcode_DD_56,opcode_5_7\r
5392 .word opcode_5_8, opcode_5_9, opcode_5_A, opcode_5_B, opcode_DD_5C,opcode_DD_5D,opcode_DD_5E,opcode_5_F\r
5393 .word opcode_DD_60,opcode_DD_61,opcode_DD_62,opcode_DD_63,opcode_DD_64,opcode_DD_65,opcode_DD_66,opcode_DD_67\r
5394 .word opcode_DD_68,opcode_DD_69,opcode_DD_6A,opcode_DD_6B,opcode_DD_6C,opcode_DD_6D,opcode_DD_6E,opcode_DD_6F\r
5395 .word opcode_DD_70,opcode_DD_71,opcode_DD_72,opcode_DD_73,opcode_DD_74,opcode_DD_75,opcode_7_6, opcode_DD_77\r
5396 .word opcode_7_8, opcode_7_9, opcode_7_A, opcode_7_B, opcode_DD_7C,opcode_DD_7D,opcode_DD_7E,opcode_7_F\r
5397 .word opcode_8_0, opcode_8_1, opcode_8_2, opcode_8_3, opcode_DD_84,opcode_DD_85,opcode_DD_86,opcode_8_7\r
5398 .word opcode_8_8, opcode_8_9, opcode_8_A, opcode_8_B, opcode_DD_8C,opcode_DD_8D,opcode_DD_8E,opcode_8_F\r
5399 .word opcode_9_0, opcode_9_1, opcode_9_2, opcode_9_3, opcode_DD_94,opcode_DD_95,opcode_DD_96,opcode_9_7\r
5400 .word opcode_9_8, opcode_9_9, opcode_9_A, opcode_9_B, opcode_DD_9C,opcode_DD_9D,opcode_DD_9E,opcode_9_F\r
5401 .word opcode_A_0, opcode_A_1, opcode_A_2, opcode_A_3, opcode_DD_A4,opcode_DD_A5,opcode_DD_A6,opcode_A_7\r
5402 .word opcode_A_8, opcode_A_9, opcode_A_A, opcode_A_B, opcode_DD_AC,opcode_DD_AD,opcode_DD_AE,opcode_A_F\r
5403 .word opcode_B_0, opcode_B_1, opcode_B_2, opcode_B_3, opcode_DD_B4,opcode_DD_B5,opcode_DD_B6,opcode_B_7\r
5404 .word opcode_B_8, opcode_B_9, opcode_B_A, opcode_B_B, opcode_DD_BC,opcode_DD_BD,opcode_DD_BE,opcode_B_F\r
5405 .word opcode_C_0, opcode_C_1, opcode_C_2, opcode_C_3, opcode_C_4, opcode_C_5, opcode_C_6, opcode_C_7\r
5406 .word opcode_C_8, opcode_C_9, opcode_C_A, opcode_DD_CB,opcode_C_C, opcode_C_D, opcode_C_E, opcode_C_F\r
5407 .word opcode_D_0, opcode_D_1, opcode_D_2, opcode_D_3, opcode_D_4, opcode_D_5, opcode_D_6, opcode_D_7\r
5408 .word opcode_D_8, opcode_D_9, opcode_D_A, opcode_D_B, opcode_D_C, opcode_D_D, opcode_D_E, opcode_D_F\r
5409 .word opcode_E_0, opcode_DD_E1,opcode_E_2, opcode_DD_E3,opcode_E_4, opcode_DD_E5,opcode_E_6, opcode_E_7\r
5410 .word opcode_E_8, opcode_DD_E9,opcode_E_A, opcode_E_B, opcode_E_C, opcode_E_D, opcode_E_E, opcode_E_F\r
5411 .word opcode_F_0, opcode_F_1, opcode_F_2, opcode_F_3, opcode_F_4, opcode_F_5, opcode_F_6, opcode_F_7\r
5412 .word opcode_F_8, opcode_DD_F9,opcode_F_A, opcode_F_B, opcode_F_C, opcode_F_D, opcode_F_E, opcode_F_F\r
5413\r
5414;@SBC A,N\r
5415opcode_D_E:\r
5416 ldrb r0,[z80pc],#1\r
5417 opSBCb\r
5418 fetch 7\r
5419;@RST 18H\r
5420opcode_D_F:\r
5421 opRST 0x18\r
5422\r
5423;@RET PO\r
5424opcode_E_0:\r
5425 tst z80f,#1<<VFlag\r
5426 beq opcode_C_9_cond ;@unconditional RET\r
5427 fetch 5\r
5428;@POP HL\r
5429opcode_E_1:\r
5430 opPOPreg z80hl\r
5431\r
5432;@JP PO,$+3\r
5433opcode_E_2:\r
5434 tst z80f,#1<<VFlag\r
5435 beq opcode_C_3 ;@unconditional JP\r
5436 add z80pc,z80pc,#2\r
5437 fetch 10\r
5438;@EX (SP),HL\r
5439opcode_E_3:\r
5440.if FAST_Z80SP\r
5441 ldrb r0,[z80sp]\r
5442 ldrb r1,[z80sp,#1]\r
5443 orr r0,r0,r1, lsl #8\r
5444 mov r1,z80hl, lsr #24\r
5445 strb r1,[z80sp,#1]\r
5446 mov r1,z80hl, lsr #16\r
5447 strb r1,[z80sp]\r
5448 mov z80hl,r0, lsl #16\r
5449.else\r
5450 mov r0,z80sp\r
5451 readmem16\r
5452 mov r1,r0\r
5453 mov r0,z80hl,lsr#16\r
5454 mov z80hl,r1,lsl#16\r
5455 mov r1,z80sp\r
5456 writemem16\r
5457.endif\r
5458 fetch 19\r
5459;@CALL PO,NN\r
5460opcode_E_4:\r
5461 tst z80f,#1<<VFlag\r
5462 beq opcode_C_D ;@unconditional CALL\r
5463 add z80pc,z80pc,#2\r
5464 fetch 10\r
5465;@PUSH HL\r
5466opcode_E_5:\r
5467 opPUSHreg z80hl\r
5468 fetch 11\r
5469;@AND N\r
5470opcode_E_6:\r
5471 ldrb r0,[z80pc],#1\r
5472 opANDb\r
5473 fetch 7\r
5474;@RST 20H\r
5475opcode_E_7:\r
5476 opRST 0x20\r
5477\r
5478;@RET PE\r
5479opcode_E_8:\r
5480 tst z80f,#1<<VFlag\r
5481 bne opcode_C_9_cond ;@unconditional RET\r
5482 fetch 5\r
5483;@JP (HL)\r
5484opcode_E_9:\r
5485 mov r0,z80hl, lsr #16\r
5486 rebasepc\r
5487 fetch 4\r
5488;@JP PE,$+3\r
5489opcode_E_A:\r
5490 tst z80f,#1<<VFlag\r
5491 bne opcode_C_3 ;@unconditional JP\r
5492 add z80pc,z80pc,#2\r
5493 fetch 10\r
5494;@EX DE,HL\r
5495opcode_E_B:\r
5496 mov r1,z80de\r
5497 mov z80de,z80hl\r
5498 mov z80hl,r1\r
5499 fetch 4\r
5500;@CALL PE,NN\r
5501opcode_E_C:\r
5502 tst z80f,#1<<VFlag\r
5503 bne opcode_C_D ;@unconditional CALL\r
5504 add z80pc,z80pc,#2\r
5505 fetch 10\r
5506\r
5507;@This should be caught at start\r
5508opcode_E_D:\r
5509 ldrb r1,[z80pc],#1\r
5510 ldr pc,[pc,r1, lsl #2]\r
5511opcodes_ED: .word 0x00000000\r
5512 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5513 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5514 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5515 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5516 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5517 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5518 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5519 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5520 .word opcode_ED_40,opcode_ED_41,opcode_ED_42,opcode_ED_43,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_47\r
5521 .word opcode_ED_48,opcode_ED_49,opcode_ED_4A,opcode_ED_4B,opcode_ED_44,opcode_ED_4D,opcode_ED_46,opcode_ED_4F\r
5522 .word opcode_ED_50,opcode_ED_51,opcode_ED_52,opcode_ED_53,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_57\r
5523 .word opcode_ED_58,opcode_ED_59,opcode_ED_5A,opcode_ED_5B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_5F\r
5524 .word opcode_ED_60,opcode_ED_61,opcode_ED_62,opcode_ED_63,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_67\r
5525 .word opcode_ED_68,opcode_ED_69,opcode_ED_6A,opcode_ED_6B,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_6F\r
5526 .word opcode_ED_70,opcode_ED_71,opcode_ED_72,opcode_ED_73,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_NF\r
5527 .word opcode_ED_78,opcode_ED_79,opcode_ED_7A,opcode_ED_7B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_NF\r
5528 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5529 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5530 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5531 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5532 .word opcode_ED_A0,opcode_ED_A1,opcode_ED_A2,opcode_ED_A3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5533 .word opcode_ED_A8,opcode_ED_A9,opcode_ED_AA,opcode_ED_AB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5534 .word opcode_ED_B0,opcode_ED_B1,opcode_ED_B2,opcode_ED_B3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5535 .word opcode_ED_B8,opcode_ED_B9,opcode_ED_BA,opcode_ED_BB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5536 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5537 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5538 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5539 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5540 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5541 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5542 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5543 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5544\r
5545;@XOR N\r
5546opcode_E_E:\r
5547 ldrb r0,[z80pc],#1\r
5548 opXORb\r
5549 fetch 7\r
5550;@RST 28H\r
5551opcode_E_F:\r
5552 opRST 0x28\r
5553\r
5554;@RET P\r
5555opcode_F_0:\r
5556 tst z80f,#1<<SFlag\r
5557 beq opcode_C_9_cond ;@unconditional RET\r
5558 fetch 5\r
5559;@POP AF\r
5560opcode_F_1:\r
5561.if FAST_Z80SP\r
5562 ldrb z80f,[z80sp],#1\r
5563 sub r0,opcodes,#0x200\r
5564 ldrb z80f,[r0,z80f]\r
5565 ldrb z80a,[z80sp],#1\r
5566 mov z80a,z80a, lsl #24\r
5567.else\r
5568 mov r0,z80sp\r
5569 readmem16\r
5570 add z80sp,z80sp,#2\r
5571 and z80a,r0,#0xFF00\r
5572 mov z80a,z80a,lsl#16\r
5573 and z80f,r0,#0xFF\r
5574 sub r0,opcodes,#0x200\r
5575 ldrb z80f,[r0,z80f]\r
5576.endif\r
5577 fetch 10\r
5578;@JP P,$+3\r
5579opcode_F_2:\r
5580 tst z80f,#1<<SFlag\r
5581 beq opcode_C_3 ;@unconditional JP\r
5582 add z80pc,z80pc,#2\r
5583 fetch 10\r
5584;@DI\r
5585opcode_F_3:\r
5586 ldrb r1,[cpucontext,#z80if]\r
5587 bic r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5588 strb r1,[cpucontext,#z80if]\r
5589 fetch 4\r
5590;@CALL P,NN\r
5591opcode_F_4:\r
5592 tst z80f,#1<<SFlag\r
5593 beq opcode_C_D ;@unconditional CALL\r
5594 add z80pc,z80pc,#2\r
5595 fetch 10\r
5596;@PUSH AF\r
5597opcode_F_5:\r
5598 sub r0,opcodes,#0x300\r
5599 ldrb r0,[r0,z80f]\r
5600 orr r2,r0,z80a,lsr#16\r
5601 opPUSHareg r2\r
5602 fetch 11\r
5603;@OR N\r
5604opcode_F_6:\r
5605 ldrb r0,[z80pc],#1\r
5606 opORb\r
5607 fetch 7\r
5608;@RST 30H\r
5609opcode_F_7:\r
5610 opRST 0x30\r
5611\r
5612;@RET M\r
5613opcode_F_8:\r
5614 tst z80f,#1<<SFlag\r
5615 bne opcode_C_9_cond ;@unconditional RET\r
5616 fetch 5\r
5617;@LD SP,HL\r
5618opcode_F_9:\r
5619.if FAST_Z80SP\r
5620 mov r0,z80hl, lsr #16\r
5621 rebasesp\r
5622.else\r
5623 mov z80sp,z80hl, lsr #16\r
5624.endif\r
5625 fetch 6\r
5626;@JP M,$+3\r
5627opcode_F_A:\r
5628 tst z80f,#1<<SFlag\r
5629 bne opcode_C_3 ;@unconditional JP\r
5630 add z80pc,z80pc,#2\r
5631 fetch 10\r
5632MAIN_opcodes_POINTER: .word MAIN_opcodes\r
5633EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes\r
5634;@EI\r
5635opcode_F_B:\r
5636 ldrb r1,[cpucontext,#z80if]\r
5637 mov r2,opcodes\r
5638 orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5639 strb r1,[cpucontext,#z80if]\r
5640\r
5641 ldrb r0,[z80pc],#1\r
5642 eatcycles 4\r
5643 ldr opcodes,EI_DUMMY_opcodes_POINTER\r
5644 ldr pc,[r2,r0, lsl #2]\r
5645\r
5646ei_return:\r
5647 ;@point that program returns from EI to check interupts\r
5648 ;@an interupt can not be taken directly after a EI opcode\r
5649 ;@ reset z80pc and opcode pointer\r
5650 ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
5651 sub z80pc,z80pc,#1\r
5652 ldr opcodes,MAIN_opcodes_POINTER\r
5653 ;@ check ints\r
5654 tst r0,#0xff\r
5655 movne r0,r0,lsr #8\r
5656 tstne r0,#Z80_IF1\r
5657 blne DoInterrupt\r
5658\r
5659 ;@ continue\r
5660 fetch 0\r
5661\r
5662;@CALL M,NN\r
5663opcode_F_C:\r
5664 tst z80f,#1<<SFlag\r
5665 bne opcode_C_D ;@unconditional CALL\r
5666 add z80pc,z80pc,#2\r
5667 fetch 10\r
5668\r
5669;@SHOULD BE CAUGHT AT START - FD SECTION\r
5670\r
5671;@CP N\r
5672opcode_F_E:\r
5673 ldrb r0,[z80pc],#1\r
5674 opCPb\r
5675 fetch 7\r
5676;@RST 38H\r
5677opcode_F_F:\r
5678 opRST 0x38\r
5679\r
5680\r
5681;@##################################\r
5682;@##################################\r
5683;@### opcodes CB #########################\r
5684;@##################################\r
5685;@##################################\r
5686\r
5687\r
5688;@RLC B\r
5689opcode_CB_00:\r
5690 opRLCH z80bc\r
5691;@RLC C\r
5692opcode_CB_01:\r
5693 opRLCL z80bc\r
5694;@RLC D\r
5695opcode_CB_02:\r
5696 opRLCH z80de\r
5697;@RLC E\r
5698opcode_CB_03:\r
5699 opRLCL z80de\r
5700;@RLC H\r
5701opcode_CB_04:\r
5702 opRLCH z80hl\r
5703;@RLC L\r
5704opcode_CB_05:\r
5705 opRLCL z80hl\r
5706;@RLC (HL)\r
5707opcode_CB_06:\r
5708 readmem8HL\r
5709 opRLCb\r
5710 writemem8HL\r
5711 fetch 15\r
5712;@RLC A\r
5713opcode_CB_07:\r
5714 opRLCA\r
5715\r
5716;@RRC B\r
5717opcode_CB_08:\r
5718 opRRCH z80bc\r
5719;@RRC C\r
5720opcode_CB_09:\r
5721 opRRCL z80bc\r
5722;@RRC D\r
5723opcode_CB_0A:\r
5724 opRRCH z80de\r
5725;@RRC E\r
5726opcode_CB_0B:\r
5727 opRRCL z80de\r
5728;@RRC H\r
5729opcode_CB_0C:\r
5730 opRRCH z80hl\r
5731;@RRC L\r
5732opcode_CB_0D:\r
5733 opRRCL z80hl\r
5734;@RRC (HL)\r
5735opcode_CB_0E :\r
5736 readmem8HL\r
5737 opRRCb\r
5738 writemem8HL\r
5739 fetch 15\r
5740;@RRC A\r
5741opcode_CB_0F:\r
5742 opRRCA\r
5743\r
5744;@RL B\r
5745opcode_CB_10:\r
5746 opRLH z80bc\r
5747;@RL C\r
5748opcode_CB_11:\r
5749 opRLL z80bc\r
5750;@RL D\r
5751opcode_CB_12:\r
5752 opRLH z80de\r
5753;@RL E\r
5754opcode_CB_13:\r
5755 opRLL z80de\r
5756;@RL H\r
5757opcode_CB_14:\r
5758 opRLH z80hl\r
5759;@RL L\r
5760opcode_CB_15:\r
5761 opRLL z80hl\r
5762;@RL (HL)\r
5763opcode_CB_16:\r
5764 readmem8HL\r
5765 opRLb\r
5766 writemem8HL\r
5767 fetch 15\r
5768;@RL A\r
5769opcode_CB_17:\r
5770 opRLA\r
5771\r
5772;@RR B \r
5773opcode_CB_18:\r
5774 opRRH z80bc\r
5775;@RR C\r
5776opcode_CB_19:\r
5777 opRRL z80bc\r
5778;@RR D\r
5779opcode_CB_1A:\r
5780 opRRH z80de\r
5781;@RR E\r
5782opcode_CB_1B:\r
5783 opRRL z80de\r
5784;@RR H\r
5785opcode_CB_1C:\r
5786 opRRH z80hl\r
5787;@RR L\r
5788opcode_CB_1D:\r
5789 opRRL z80hl\r
5790;@RR (HL)\r
5791opcode_CB_1E:\r
5792 readmem8HL\r
5793 opRRb\r
5794 writemem8HL\r
5795 fetch 15\r
5796;@RR A\r
5797opcode_CB_1F:\r
5798 opRRA\r
5799\r
5800;@SLA B\r
5801opcode_CB_20:\r
5802 opSLAH z80bc\r
5803;@SLA C\r
5804opcode_CB_21:\r
5805 opSLAL z80bc\r
5806;@SLA D\r
5807opcode_CB_22:\r
5808 opSLAH z80de\r
5809;@SLA E\r
5810opcode_CB_23:\r
5811 opSLAL z80de\r
5812;@SLA H\r
5813opcode_CB_24:\r
5814 opSLAH z80hl\r
5815;@SLA L\r
5816opcode_CB_25:\r
5817 opSLAL z80hl\r
5818;@SLA (HL)\r
5819opcode_CB_26:\r
5820 readmem8HL\r
5821 opSLAb\r
5822 writemem8HL\r
5823 fetch 15\r
5824;@SLA A\r
5825opcode_CB_27:\r
5826 opSLAA\r
5827\r
5828;@SRA B\r
5829opcode_CB_28:\r
5830 opSRAH z80bc\r
5831;@SRA C\r
5832opcode_CB_29:\r
5833 opSRAL z80bc\r
5834;@SRA D\r
5835opcode_CB_2A:\r
5836 opSRAH z80de\r
5837;@SRA E\r
5838opcode_CB_2B:\r
5839 opSRAL z80de\r
5840;@SRA H\r
5841opcode_CB_2C:\r
5842 opSRAH z80hl\r
5843;@SRA L\r
5844opcode_CB_2D:\r
5845 opSRAL z80hl\r
5846;@SRA (HL)\r
5847opcode_CB_2E:\r
5848 readmem8HL\r
5849 opSRAb\r
5850 writemem8HL\r
5851 fetch 15\r
5852;@SRA A\r
5853opcode_CB_2F:\r
5854 opSRAA\r
5855\r
5856;@SLL B\r
5857opcode_CB_30:\r
5858 opSLLH z80bc\r
5859;@SLL C\r
5860opcode_CB_31:\r
5861 opSLLL z80bc\r
5862;@SLL D\r
5863opcode_CB_32:\r
5864 opSLLH z80de\r
5865;@SLL E\r
5866opcode_CB_33:\r
5867 opSLLL z80de\r
5868;@SLL H\r
5869opcode_CB_34:\r
5870 opSLLH z80hl\r
5871;@SLL L\r
5872opcode_CB_35:\r
5873 opSLLL z80hl\r
5874;@SLL (HL)\r
5875opcode_CB_36:\r
5876 readmem8HL\r
5877 opSLLb\r
5878 writemem8HL\r
5879 fetch 15\r
5880;@SLL A\r
5881opcode_CB_37:\r
5882 opSLLA\r
5883\r
5884;@SRL B\r
5885opcode_CB_38:\r
5886 opSRLH z80bc\r
5887;@SRL C\r
5888opcode_CB_39:\r
5889 opSRLL z80bc\r
5890;@SRL D\r
5891opcode_CB_3A:\r
5892 opSRLH z80de\r
5893;@SRL E\r
5894opcode_CB_3B:\r
5895 opSRLL z80de\r
5896;@SRL H\r
5897opcode_CB_3C:\r
5898 opSRLH z80hl\r
5899;@SRL L\r
5900opcode_CB_3D:\r
5901 opSRLL z80hl\r
5902;@SRL (HL)\r
5903opcode_CB_3E:\r
5904 readmem8HL\r
5905 opSRLb\r
5906 writemem8HL\r
5907 fetch 15\r
5908;@SRL A\r
5909opcode_CB_3F:\r
5910 opSRLA\r
5911\r
5912\r
5913;@BIT 0,B\r
5914opcode_CB_40:\r
5915 opBITH z80bc 0\r
5916;@BIT 0,C\r
5917opcode_CB_41:\r
5918 opBITL z80bc 0\r
5919;@BIT 0,D\r
5920opcode_CB_42:\r
5921 opBITH z80de 0\r
5922;@BIT 0,E\r
5923opcode_CB_43:\r
5924 opBITL z80de 0\r
5925;@BIT 0,H\r
5926opcode_CB_44:\r
5927 opBITH z80hl 0\r
5928;@BIT 0,L\r
5929opcode_CB_45:\r
5930 opBITL z80hl 0\r
5931;@BIT 0,(HL)\r
5932opcode_CB_46:\r
5933 readmem8HL\r
5934 opBITb 0\r
5935 fetch 12\r
5936;@BIT 0,A\r
5937opcode_CB_47:\r
5938 opBITH z80a 0\r
5939\r
5940;@BIT 1,B\r
5941opcode_CB_48:\r
5942 opBITH z80bc 1\r
5943;@BIT 1,C\r
5944opcode_CB_49:\r
5945 opBITL z80bc 1\r
5946;@BIT 1,D\r
5947opcode_CB_4A:\r
5948 opBITH z80de 1\r
5949;@BIT 1,E\r
5950opcode_CB_4B:\r
5951 opBITL z80de 1\r
5952;@BIT 1,H\r
5953opcode_CB_4C:\r
5954 opBITH z80hl 1\r
5955;@BIT 1,L\r
5956opcode_CB_4D:\r
5957 opBITL z80hl 1\r
5958;@BIT 1,(HL)\r
5959opcode_CB_4E:\r
5960 readmem8HL\r
5961 opBITb 1\r
5962 fetch 12\r
5963;@BIT 1,A\r
5964opcode_CB_4F:\r
5965 opBITH z80a 1\r
5966\r
5967;@BIT 2,B\r
5968opcode_CB_50:\r
5969 opBITH z80bc 2\r
5970;@BIT 2,C\r
5971opcode_CB_51:\r
5972 opBITL z80bc 2\r
5973;@BIT 2,D\r
5974opcode_CB_52:\r
5975 opBITH z80de 2\r
5976;@BIT 2,E\r
5977opcode_CB_53:\r
5978 opBITL z80de 2\r
5979;@BIT 2,H\r
5980opcode_CB_54:\r
5981 opBITH z80hl 2\r
5982;@BIT 2,L\r
5983opcode_CB_55:\r
5984 opBITL z80hl 2\r
5985;@BIT 2,(HL)\r
5986opcode_CB_56:\r
5987 readmem8HL\r
5988 opBITb 2\r
5989 fetch 12\r
5990;@BIT 2,A\r
5991opcode_CB_57:\r
5992 opBITH z80a 2\r
5993\r
5994;@BIT 3,B\r
5995opcode_CB_58:\r
5996 opBITH z80bc 3\r
5997;@BIT 3,C\r
5998opcode_CB_59:\r
5999 opBITL z80bc 3\r
6000;@BIT 3,D\r
6001opcode_CB_5A:\r
6002 opBITH z80de 3\r
6003;@BIT 3,E\r
6004opcode_CB_5B:\r
6005 opBITL z80de 3\r
6006;@BIT 3,H\r
6007opcode_CB_5C:\r
6008 opBITH z80hl 3\r
6009;@BIT 3,L\r
6010opcode_CB_5D:\r
6011 opBITL z80hl 3\r
6012;@BIT 3,(HL)\r
6013opcode_CB_5E:\r
6014 readmem8HL\r
6015 opBITb 3\r
6016 fetch 12\r
6017;@BIT 3,A\r
6018opcode_CB_5F:\r
6019 opBITH z80a 3\r
6020\r
6021;@BIT 4,B\r
6022opcode_CB_60:\r
6023 opBITH z80bc 4\r
6024;@BIT 4,C\r
6025opcode_CB_61:\r
6026 opBITL z80bc 4\r
6027;@BIT 4,D\r
6028opcode_CB_62:\r
6029 opBITH z80de 4\r
6030;@BIT 4,E\r
6031opcode_CB_63:\r
6032 opBITL z80de 4\r
6033;@BIT 4,H\r
6034opcode_CB_64:\r
6035 opBITH z80hl 4\r
6036;@BIT 4,L\r
6037opcode_CB_65:\r
6038 opBITL z80hl 4\r
6039;@BIT 4,(HL)\r
6040opcode_CB_66:\r
6041 readmem8HL\r
6042 opBITb 4\r
6043 fetch 12\r
6044;@BIT 4,A\r
6045opcode_CB_67:\r
6046 opBITH z80a 4\r
6047\r
6048;@BIT 5,B\r
6049opcode_CB_68:\r
6050 opBITH z80bc 5\r
6051;@BIT 5,C\r
6052opcode_CB_69:\r
6053 opBITL z80bc 5\r
6054;@BIT 5,D\r
6055opcode_CB_6A:\r
6056 opBITH z80de 5\r
6057;@BIT 5,E\r
6058opcode_CB_6B:\r
6059 opBITL z80de 5\r
6060;@BIT 5,H\r
6061opcode_CB_6C:\r
6062 opBITH z80hl 5\r
6063;@BIT 5,L\r
6064opcode_CB_6D:\r
6065 opBITL z80hl 5\r
6066;@BIT 5,(HL)\r
6067opcode_CB_6E:\r
6068 readmem8HL\r
6069 opBITb 5\r
6070 fetch 12\r
6071;@BIT 5,A\r
6072opcode_CB_6F:\r
6073 opBITH z80a 5\r
6074\r
6075;@BIT 6,B\r
6076opcode_CB_70:\r
6077 opBITH z80bc 6\r
6078;@BIT 6,C\r
6079opcode_CB_71:\r
6080 opBITL z80bc 6\r
6081;@BIT 6,D\r
6082opcode_CB_72:\r
6083 opBITH z80de 6\r
6084;@BIT 6,E\r
6085opcode_CB_73:\r
6086 opBITL z80de 6\r
6087;@BIT 6,H\r
6088opcode_CB_74:\r
6089 opBITH z80hl 6\r
6090;@BIT 6,L\r
6091opcode_CB_75:\r
6092 opBITL z80hl 6\r
6093;@BIT 6,(HL)\r
6094opcode_CB_76:\r
6095 readmem8HL\r
6096 opBITb 6\r
6097 fetch 12\r
6098;@BIT 6,A\r
6099opcode_CB_77:\r
6100 opBITH z80a 6\r
6101\r
6102;@BIT 7,B\r
6103opcode_CB_78:\r
6104 opBIT7H z80bc\r
6105;@BIT 7,C\r
6106opcode_CB_79:\r
6107 opBIT7L z80bc\r
6108;@BIT 7,D\r
6109opcode_CB_7A:\r
6110 opBIT7H z80de\r
6111;@BIT 7,E\r
6112opcode_CB_7B:\r
6113 opBIT7L z80de\r
6114;@BIT 7,H\r
6115opcode_CB_7C:\r
6116 opBIT7H z80hl\r
6117;@BIT 7,L\r
6118opcode_CB_7D:\r
6119 opBIT7L z80hl\r
6120;@BIT 7,(HL)\r
6121opcode_CB_7E:\r
6122 readmem8HL\r
6123 opBIT7b\r
6124 fetch 12\r
6125;@BIT 7,A\r
6126opcode_CB_7F:\r
6127 opBIT7H z80a\r
6128\r
6129;@RES 0,B\r
6130opcode_CB_80:\r
6131 bic z80bc,z80bc,#1<<24\r
6132 fetch 8\r
6133;@RES 0,C\r
6134opcode_CB_81:\r
6135 bic z80bc,z80bc,#1<<16\r
6136 fetch 8\r
6137;@RES 0,D\r
6138opcode_CB_82:\r
6139 bic z80de,z80de,#1<<24\r
6140 fetch 8\r
6141;@RES 0,E\r
6142opcode_CB_83:\r
6143 bic z80de,z80de,#1<<16\r
6144 fetch 8\r
6145;@RES 0,H\r
6146opcode_CB_84:\r
6147 bic z80hl,z80hl,#1<<24\r
6148 fetch 8\r
6149;@RES 0,L\r
6150opcode_CB_85:\r
6151 bic z80hl,z80hl,#1<<16\r
6152 fetch 8\r
6153;@RES 0,(HL)\r
6154opcode_CB_86:\r
6155 opRESmemHL 0\r
6156;@RES 0,A\r
6157opcode_CB_87:\r
6158 bic z80a,z80a,#1<<24\r
6159 fetch 8\r
6160\r
6161;@RES 1,B\r
6162opcode_CB_88:\r
6163 bic z80bc,z80bc,#1<<25\r
6164 fetch 8\r
6165;@RES 1,C\r
6166opcode_CB_89:\r
6167 bic z80bc,z80bc,#1<<17\r
6168 fetch 8\r
6169;@RES 1,D\r
6170opcode_CB_8A:\r
6171 bic z80de,z80de,#1<<25\r
6172 fetch 8\r
6173;@RES 1,E\r
6174opcode_CB_8B:\r
6175 bic z80de,z80de,#1<<17\r
6176 fetch 8\r
6177;@RES 1,H\r
6178opcode_CB_8C:\r
6179 bic z80hl,z80hl,#1<<25\r
6180 fetch 8\r
6181;@RES 1,L\r
6182opcode_CB_8D:\r
6183 bic z80hl,z80hl,#1<<17\r
6184 fetch 8\r
6185;@RES 1,(HL)\r
6186opcode_CB_8E:\r
6187 opRESmemHL 1\r
6188;@RES 1,A\r
6189opcode_CB_8F:\r
6190 bic z80a,z80a,#1<<25\r
6191 fetch 8\r
6192\r
6193;@RES 2,B\r
6194opcode_CB_90:\r
6195 bic z80bc,z80bc,#1<<26\r
6196 fetch 8\r
6197;@RES 2,C\r
6198opcode_CB_91:\r
6199 bic z80bc,z80bc,#1<<18\r
6200 fetch 8\r
6201;@RES 2,D\r
6202opcode_CB_92:\r
6203 bic z80de,z80de,#1<<26\r
6204 fetch 8\r
6205;@RES 2,E\r
6206opcode_CB_93:\r
6207 bic z80de,z80de,#1<<18\r
6208 fetch 8\r
6209;@RES 2,H\r
6210opcode_CB_94:\r
6211 bic z80hl,z80hl,#1<<26\r
6212 fetch 8\r
6213;@RES 2,L\r
6214opcode_CB_95:\r
6215 bic z80hl,z80hl,#1<<18\r
6216 fetch 8\r
6217;@RES 2,(HL)\r
6218opcode_CB_96:\r
6219 opRESmemHL 2\r
6220;@RES 2,A\r
6221opcode_CB_97:\r
6222 bic z80a,z80a,#1<<26\r
6223 fetch 8\r
6224\r
6225;@RES 3,B\r
6226opcode_CB_98:\r
6227 bic z80bc,z80bc,#1<<27\r
6228 fetch 8\r
6229;@RES 3,C\r
6230opcode_CB_99:\r
6231 bic z80bc,z80bc,#1<<19\r
6232 fetch 8\r
6233;@RES 3,D\r
6234opcode_CB_9A:\r
6235 bic z80de,z80de,#1<<27\r
6236 fetch 8\r
6237;@RES 3,E\r
6238opcode_CB_9B:\r
6239 bic z80de,z80de,#1<<19\r
6240 fetch 8\r
6241;@RES 3,H\r
6242opcode_CB_9C:\r
6243 bic z80hl,z80hl,#1<<27\r
6244 fetch 8\r
6245;@RES 3,L\r
6246opcode_CB_9D:\r
6247 bic z80hl,z80hl,#1<<19\r
6248 fetch 8\r
6249;@RES 3,(HL)\r
6250opcode_CB_9E:\r
6251 opRESmemHL 3\r
6252;@RES 3,A\r
6253opcode_CB_9F:\r
6254 bic z80a,z80a,#1<<27\r
6255 fetch 8\r
6256\r
6257;@RES 4,B\r
6258opcode_CB_A0:\r
6259 bic z80bc,z80bc,#1<<28\r
6260 fetch 8\r
6261;@RES 4,C\r
6262opcode_CB_A1:\r
6263 bic z80bc,z80bc,#1<<20\r
6264 fetch 8\r
6265;@RES 4,D\r
6266opcode_CB_A2:\r
6267 bic z80de,z80de,#1<<28\r
6268 fetch 8\r
6269;@RES 4,E\r
6270opcode_CB_A3:\r
6271 bic z80de,z80de,#1<<20\r
6272 fetch 8\r
6273;@RES 4,H\r
6274opcode_CB_A4:\r
6275 bic z80hl,z80hl,#1<<28\r
6276 fetch 8\r
6277;@RES 4,L\r
6278opcode_CB_A5:\r
6279 bic z80hl,z80hl,#1<<20\r
6280 fetch 8\r
6281;@RES 4,(HL)\r
6282opcode_CB_A6:\r
6283 opRESmemHL 4\r
6284;@RES 4,A\r
6285opcode_CB_A7:\r
6286 bic z80a,z80a,#1<<28\r
6287 fetch 8\r
6288\r
6289;@RES 5,B\r
6290opcode_CB_A8:\r
6291 bic z80bc,z80bc,#1<<29\r
6292 fetch 8\r
6293;@RES 5,C\r
6294opcode_CB_A9:\r
6295 bic z80bc,z80bc,#1<<21\r
6296 fetch 8\r
6297;@RES 5,D\r
6298opcode_CB_AA:\r
6299 bic z80de,z80de,#1<<29\r
6300 fetch 8\r
6301;@RES 5,E\r
6302opcode_CB_AB:\r
6303 bic z80de,z80de,#1<<21\r
6304 fetch 8\r
6305;@RES 5,H\r
6306opcode_CB_AC:\r
6307 bic z80hl,z80hl,#1<<29\r
6308 fetch 8\r
6309;@RES 5,L\r
6310opcode_CB_AD:\r
6311 bic z80hl,z80hl,#1<<21\r
6312 fetch 8\r
6313;@RES 5,(HL)\r
6314opcode_CB_AE:\r
6315 opRESmemHL 5\r
6316;@RES 5,A\r
6317opcode_CB_AF:\r
6318 bic z80a,z80a,#1<<29\r
6319 fetch 8\r
6320\r
6321;@RES 6,B\r
6322opcode_CB_B0:\r
6323 bic z80bc,z80bc,#1<<30\r
6324 fetch 8\r
6325;@RES 6,C\r
6326opcode_CB_B1:\r
6327 bic z80bc,z80bc,#1<<22\r
6328 fetch 8\r
6329;@RES 6,D\r
6330opcode_CB_B2:\r
6331 bic z80de,z80de,#1<<30\r
6332 fetch 8\r
6333;@RES 6,E\r
6334opcode_CB_B3:\r
6335 bic z80de,z80de,#1<<22\r
6336 fetch 8\r
6337;@RES 6,H\r
6338opcode_CB_B4:\r
6339 bic z80hl,z80hl,#1<<30\r
6340 fetch 8\r
6341;@RES 6,L\r
6342opcode_CB_B5:\r
6343 bic z80hl,z80hl,#1<<22\r
6344 fetch 8\r
6345;@RES 6,(HL)\r
6346opcode_CB_B6:\r
6347 opRESmemHL 6\r
6348;@RES 6,A\r
6349opcode_CB_B7:\r
6350 bic z80a,z80a,#1<<30\r
6351 fetch 8\r
6352\r
6353;@RES 7,B\r
6354opcode_CB_B8:\r
6355 bic z80bc,z80bc,#1<<31\r
6356 fetch 8\r
6357;@RES 7,C\r
6358opcode_CB_B9:\r
6359 bic z80bc,z80bc,#1<<23\r
6360 fetch 8\r
6361;@RES 7,D\r
6362opcode_CB_BA:\r
6363 bic z80de,z80de,#1<<31\r
6364 fetch 8\r
6365;@RES 7,E\r
6366opcode_CB_BB:\r
6367 bic z80de,z80de,#1<<23\r
6368 fetch 8\r
6369;@RES 7,H\r
6370opcode_CB_BC:\r
6371 bic z80hl,z80hl,#1<<31\r
6372 fetch 8\r
6373;@RES 7,L\r
6374opcode_CB_BD:\r
6375 bic z80hl,z80hl,#1<<23\r
6376 fetch 8\r
6377;@RES 7,(HL)\r
6378opcode_CB_BE:\r
6379 opRESmemHL 7\r
6380;@RES 7,A\r
6381opcode_CB_BF:\r
6382 bic z80a,z80a,#1<<31\r
6383 fetch 8\r
6384\r
6385;@SET 0,B\r
6386opcode_CB_C0:\r
6387 orr z80bc,z80bc,#1<<24\r
6388 fetch 8\r
6389;@SET 0,C\r
6390opcode_CB_C1:\r
6391 orr z80bc,z80bc,#1<<16\r
6392 fetch 8\r
6393;@SET 0,D\r
6394opcode_CB_C2:\r
6395 orr z80de,z80de,#1<<24\r
6396 fetch 8\r
6397;@SET 0,E\r
6398opcode_CB_C3:\r
6399 orr z80de,z80de,#1<<16\r
6400 fetch 8\r
6401;@SET 0,H\r
6402opcode_CB_C4:\r
6403 orr z80hl,z80hl,#1<<24\r
6404 fetch 8\r
6405;@SET 0,L\r
6406opcode_CB_C5:\r
6407 orr z80hl,z80hl,#1<<16\r
6408 fetch 8\r
6409;@SET 0,(HL)\r
6410opcode_CB_C6:\r
6411 opSETmemHL 0\r
6412;@SET 0,A\r
6413opcode_CB_C7:\r
6414 orr z80a,z80a,#1<<24\r
6415 fetch 8\r
6416\r
6417;@SET 1,B\r
6418opcode_CB_C8:\r
6419 orr z80bc,z80bc,#1<<25\r
6420 fetch 8\r
6421;@SET 1,C\r
6422opcode_CB_C9:\r
6423 orr z80bc,z80bc,#1<<17\r
6424 fetch 8\r
6425;@SET 1,D\r
6426opcode_CB_CA:\r
6427 orr z80de,z80de,#1<<25\r
6428 fetch 8\r
6429;@SET 1,E\r
6430opcode_CB_CB:\r
6431 orr z80de,z80de,#1<<17\r
6432 fetch 8\r
6433;@SET 1,H\r
6434opcode_CB_CC:\r
6435 orr z80hl,z80hl,#1<<25\r
6436 fetch 8\r
6437;@SET 1,L\r
6438opcode_CB_CD:\r
6439 orr z80hl,z80hl,#1<<17\r
6440 fetch 8\r
6441;@SET 1,(HL)\r
6442opcode_CB_CE:\r
6443 opSETmemHL 1\r
6444;@SET 1,A\r
6445opcode_CB_CF:\r
6446 orr z80a,z80a,#1<<25\r
6447 fetch 8\r
6448\r
6449;@SET 2,B\r
6450opcode_CB_D0:\r
6451 orr z80bc,z80bc,#1<<26\r
6452 fetch 8\r
6453;@SET 2,C\r
6454opcode_CB_D1:\r
6455 orr z80bc,z80bc,#1<<18\r
6456 fetch 8\r
6457;@SET 2,D\r
6458opcode_CB_D2:\r
6459 orr z80de,z80de,#1<<26\r
6460 fetch 8\r
6461;@SET 2,E\r
6462opcode_CB_D3:\r
6463 orr z80de,z80de,#1<<18\r
6464 fetch 8\r
6465;@SET 2,H\r
6466opcode_CB_D4:\r
6467 orr z80hl,z80hl,#1<<26\r
6468 fetch 8\r
6469;@SET 2,L\r
6470opcode_CB_D5:\r
6471 orr z80hl,z80hl,#1<<18\r
6472 fetch 8\r
6473;@SET 2,(HL)\r
6474opcode_CB_D6:\r
6475 opSETmemHL 2\r
6476;@SET 2,A\r
6477opcode_CB_D7:\r
6478 orr z80a,z80a,#1<<26\r
6479 fetch 8\r
6480\r
6481;@SET 3,B\r
6482opcode_CB_D8:\r
6483 orr z80bc,z80bc,#1<<27\r
6484 fetch 8\r
6485;@SET 3,C\r
6486opcode_CB_D9:\r
6487 orr z80bc,z80bc,#1<<19\r
6488 fetch 8\r
6489;@SET 3,D\r
6490opcode_CB_DA:\r
6491 orr z80de,z80de,#1<<27\r
6492 fetch 8\r
6493;@SET 3,E\r
6494opcode_CB_DB:\r
6495 orr z80de,z80de,#1<<19\r
6496 fetch 8\r
6497;@SET 3,H\r
6498opcode_CB_DC:\r
6499 orr z80hl,z80hl,#1<<27\r
6500 fetch 8\r
6501;@SET 3,L\r
6502opcode_CB_DD:\r
6503 orr z80hl,z80hl,#1<<19\r
6504 fetch 8\r
6505;@SET 3,(HL)\r
6506opcode_CB_DE:\r
6507 opSETmemHL 3\r
6508;@SET 3,A\r
6509opcode_CB_DF:\r
6510 orr z80a,z80a,#1<<27\r
6511 fetch 8\r
6512\r
6513;@SET 4,B\r
6514opcode_CB_E0:\r
6515 orr z80bc,z80bc,#1<<28\r
6516 fetch 8\r
6517;@SET 4,C\r
6518opcode_CB_E1:\r
6519 orr z80bc,z80bc,#1<<20\r
6520 fetch 8\r
6521;@SET 4,D\r
6522opcode_CB_E2:\r
6523 orr z80de,z80de,#1<<28\r
6524 fetch 8\r
6525;@SET 4,E\r
6526opcode_CB_E3:\r
6527 orr z80de,z80de,#1<<20\r
6528 fetch 8\r
6529;@SET 4,H\r
6530opcode_CB_E4:\r
6531 orr z80hl,z80hl,#1<<28\r
6532 fetch 8\r
6533;@SET 4,L\r
6534opcode_CB_E5:\r
6535 orr z80hl,z80hl,#1<<20\r
6536 fetch 8\r
6537;@SET 4,(HL)\r
6538opcode_CB_E6:\r
6539 opSETmemHL 4\r
6540;@SET 4,A\r
6541opcode_CB_E7:\r
6542 orr z80a,z80a,#1<<28\r
6543 fetch 8\r
6544\r
6545;@SET 5,B\r
6546opcode_CB_E8:\r
6547 orr z80bc,z80bc,#1<<29\r
6548 fetch 8\r
6549;@SET 5,C\r
6550opcode_CB_E9:\r
6551 orr z80bc,z80bc,#1<<21\r
6552 fetch 8\r
6553;@SET 5,D\r
6554opcode_CB_EA:\r
6555 orr z80de,z80de,#1<<29\r
6556 fetch 8\r
6557;@SET 5,E\r
6558opcode_CB_EB:\r
6559 orr z80de,z80de,#1<<21\r
6560 fetch 8\r
6561;@SET 5,H\r
6562opcode_CB_EC:\r
6563 orr z80hl,z80hl,#1<<29\r
6564 fetch 8\r
6565;@SET 5,L\r
6566opcode_CB_ED:\r
6567 orr z80hl,z80hl,#1<<21\r
6568 fetch 8\r
6569;@SET 5,(HL)\r
6570opcode_CB_EE:\r
6571 opSETmemHL 5\r
6572;@SET 5,A\r
6573opcode_CB_EF:\r
6574 orr z80a,z80a,#1<<29\r
6575 fetch 8\r
6576\r
6577;@SET 6,B\r
6578opcode_CB_F0:\r
6579 orr z80bc,z80bc,#1<<30\r
6580 fetch 8\r
6581;@SET 6,C\r
6582opcode_CB_F1:\r
6583 orr z80bc,z80bc,#1<<22\r
6584 fetch 8\r
6585;@SET 6,D\r
6586opcode_CB_F2:\r
6587 orr z80de,z80de,#1<<30\r
6588 fetch 8\r
6589;@SET 6,E\r
6590opcode_CB_F3:\r
6591 orr z80de,z80de,#1<<22\r
6592 fetch 8\r
6593;@SET 6,H\r
6594opcode_CB_F4:\r
6595 orr z80hl,z80hl,#1<<30\r
6596 fetch 8\r
6597;@SET 6,L\r
6598opcode_CB_F5:\r
6599 orr z80hl,z80hl,#1<<22\r
6600 fetch 8\r
6601;@SET 6,(HL)\r
6602opcode_CB_F6:\r
6603 opSETmemHL 6\r
6604;@SET 6,A\r
6605opcode_CB_F7:\r
6606 orr z80a,z80a,#1<<30\r
6607 fetch 8\r
6608\r
6609;@SET 7,B\r
6610opcode_CB_F8:\r
6611 orr z80bc,z80bc,#1<<31\r
6612 fetch 8\r
6613;@SET 7,C\r
6614opcode_CB_F9:\r
6615 orr z80bc,z80bc,#1<<23\r
6616 fetch 8\r
6617;@SET 7,D\r
6618opcode_CB_FA:\r
6619 orr z80de,z80de,#1<<31\r
6620 fetch 8\r
6621;@SET 7,E\r
6622opcode_CB_FB:\r
6623 orr z80de,z80de,#1<<23\r
6624 fetch 8\r
6625;@SET 7,H\r
6626opcode_CB_FC:\r
6627 orr z80hl,z80hl,#1<<31\r
6628 fetch 8\r
6629;@SET 7,L\r
6630opcode_CB_FD:\r
6631 orr z80hl,z80hl,#1<<23\r
6632 fetch 8\r
6633;@SET 7,(HL)\r
6634opcode_CB_FE:\r
6635 opSETmemHL 7\r
6636;@SET 7,A\r
6637opcode_CB_FF:\r
6638 orr z80a,z80a,#1<<31\r
6639 fetch 8\r
6640\r
6641\r
6642\r
6643;@##################################\r
6644;@##################################\r
6645;@### opcodes DD #########################\r
6646;@##################################\r
6647;@##################################\r
6648;@Because the DD opcodes are not a complete range from 00-FF I have\r
6649;@created this sub routine that will catch any undocumented ops\r
6650;@halt the emulator and mov the current instruction to r0\r
6651;@at a later stage I may change to display a text message on the screen\r
6652opcode_DD_NF:\r
6653 eatcycles 4\r
6654 ldr pc,[opcodes,r0, lsl #2]\r
6655;@ mov r2,#0x10*4\r
6656;@ cmp r2,z80xx\r
6657;@ bne opcode_FD_NF\r
6658;@ mov r0,#0xDD00\r
6659;@ orr r0,r0,r1\r
6660;@ b end_loop\r
6661;@opcode_FD_NF:\r
6662;@ mov r0,#0xFD00\r
6663;@ orr r0,r0,r1\r
6664;@ b end_loop\r
6665\r
6666opcode_DD_NF2:\r
6667 fetch 23\r
6668;@ notaz: we don't want to deadlock here\r
6669;@ mov r0,#0xDD0000\r
6670;@ orr r0,r0,#0xCB00\r
6671;@ orr r0,r0,r1\r
6672;@ b end_loop\r
6673\r
6674;@ADD IX,BC\r
6675opcode_DD_09:\r
6676 ldr r0,[z80xx]\r
6677 opADD16 r0 z80bc\r
6678 str r0,[z80xx]\r
6679 fetch 15\r
6680;@ADD IX,DE\r
6681opcode_DD_19:\r
6682 ldr r0,[z80xx]\r
6683 opADD16 r0 z80de\r
6684 str r0,[z80xx]\r
6685 fetch 15\r
6686;@LD IX,NN\r
6687opcode_DD_21:\r
6688 ldrb r0,[z80pc],#1\r
6689 ldrb r1,[z80pc],#1\r
6690 orr r0,r0,r1, lsl #8\r
6691 strh r0,[z80xx,#2]\r
6692 fetch 14\r
6693;@LD (NN),IX\r
6694opcode_DD_22:\r
6695 ldrb r0,[z80pc],#1\r
6696 ldrb r1,[z80pc],#1\r
6697 orr r1,r0,r1, lsl #8\r
6698 ldrh r0,[z80xx,#2]\r
6699 writemem16\r
6700 fetch 20\r
6701;@INC IX\r
6702opcode_DD_23:\r
6703 ldr r0,[z80xx]\r
6704 add r0,r0,#1<<16\r
6705 str r0,[z80xx]\r
6706 fetch 10\r
6707;@INC I (IX)\r
6708opcode_DD_24:\r
6709 ldr r0,[z80xx]\r
6710 opINC8H r0\r
6711 str r0,[z80xx]\r
6712 fetch 8\r
6713;@DEC I (IX)\r
6714opcode_DD_25:\r
6715 ldr r0,[z80xx]\r
6716 opDEC8H r0\r
6717 str r0,[z80xx]\r
6718 fetch 8\r
6719;@LD I,N (IX)\r
6720opcode_DD_26:\r
6721 ldrb r0,[z80pc],#1\r
6722 strb r0,[z80xx,#3]\r
6723 fetch 11\r
6724;@ADD IX,IX\r
6725opcode_DD_29:\r
6726 ldr r0,[z80xx]\r
6727 opADD16_2 r0\r
6728 str r0,[z80xx]\r
6729 fetch 15\r
6730;@LD IX,(NN)\r
6731opcode_DD_2A:\r
6732 ldrb r0,[z80pc],#1\r
6733 ldrb r1,[z80pc],#1\r
6734 orr r0,r0,r1, lsl #8\r
6735 stmfd sp!,{z80xx}\r
6736 readmem16\r
6737 ldmfd sp!,{z80xx}\r
6738 strh r0,[z80xx,#2]\r
6739 fetch 20\r
6740;@DEC IX\r
6741opcode_DD_2B:\r
6742 ldr r0,[z80xx]\r
6743 sub r0,r0,#1<<16\r
6744 str r0,[z80xx]\r
6745 fetch 10\r
6746;@INC X (IX)\r
6747opcode_DD_2C:\r
6748 ldr r0,[z80xx]\r
6749 opINC8L r0\r
6750 str r0,[z80xx]\r
6751 fetch 8\r
6752;@DEC X (IX)\r
6753opcode_DD_2D:\r
6754 ldr r0,[z80xx]\r
6755 opDEC8L r0\r
6756 str r0,[z80xx]\r
6757 fetch 8\r
6758;@LD X,N (IX)\r
6759opcode_DD_2E:\r
6760 ldrb r0,[z80pc],#1\r
6761 strb r0,[z80xx,#2]\r
6762 fetch 11\r
6763;@INC (IX+N)\r
6764opcode_DD_34:\r
6765 ldrsb r0,[z80pc],#1\r
6766 ldr r1,[z80xx]\r
6767 add r0,r1,r0, lsl #16\r
6768 mov r0,r0,lsr #16\r
6769 stmfd sp!,{r0} ;@ save addr\r
6770 readmem8\r
6771 opINC8b\r
6772 ldmfd sp!,{r1} ;@ restore addr into r1\r
6773 writemem8\r
6774 fetch 23\r
6775;@DEC (IX+N)\r
6776opcode_DD_35:\r
6777 ldrsb r0,[z80pc],#1\r
6778 ldr r1,[z80xx]\r
6779 add r0,r1,r0, lsl #16\r
6780 mov r0,r0,lsr #16\r
6781 stmfd sp!,{r0} ;@ save addr\r
6782 readmem8\r
6783 opDEC8b\r
6784 ldmfd sp!,{r1} ;@ restore addr into r1\r
6785 writemem8\r
6786 fetch 23\r
6787;@LD (IX+N),N\r
6788opcode_DD_36:\r
6789 ldrsb r2,[z80pc],#1\r
6790 ldrb r0,[z80pc],#1\r
6791 ldr r1,[z80xx]\r
6792 add r1,r1,r2, lsl #16\r
6793 mov r1,r1,lsr #16\r
6794 writemem8\r
6795 fetch 19\r
6796;@ADD IX,SP\r
6797opcode_DD_39:\r
6798 ldr r0,[z80xx]\r
6799.if FAST_Z80SP\r
6800 ldr r2,[cpucontext,#z80sp_base]\r
6801 sub r2,z80sp,r2\r
6802 opADD16s r0 r2 16\r
6803.else\r
6804 opADD16s r0 z80sp 16\r
6805.endif\r
6806 str r0,[z80xx]\r
6807 fetch 15\r
6808;@LD B,I ( IX )\r
6809opcode_DD_44:\r
6810 ldrb r0,[z80xx,#3]\r
6811 and z80bc,z80bc,#0xFF<<16\r
6812 orr z80bc,z80bc,r0, lsl #24\r
6813 fetch 8\r
6814;@LD B,X ( IX )\r
6815opcode_DD_45:\r
6816 ldrb r0,[z80xx,#2]\r
6817 and z80bc,z80bc,#0xFF<<16\r
6818 orr z80bc,z80bc,r0, lsl #24\r
6819 fetch 8\r
6820;@LD B,(IX,N)\r
6821opcode_DD_46:\r
6822 ldrsb r0,[z80pc],#1\r
6823 ldr r1,[z80xx]\r
6824 add r0,r1,r0, lsl #16\r
6825 mov r0,r0,lsr #16\r
6826 readmem8\r
6827 and z80bc,z80bc,#0xFF<<16\r
6828 orr z80bc,z80bc,r0, lsl #24\r
6829 fetch 19\r
6830;@LD C,I (IX)\r
6831opcode_DD_4C:\r
6832 ldrb r0,[z80xx,#3]\r
6833 and z80bc,z80bc,#0xFF<<24\r
6834 orr z80bc,z80bc,r0, lsl #16\r
6835 fetch 8\r
6836;@LD C,X (IX)\r
6837opcode_DD_4D:\r
6838 ldrb r0,[z80xx,#2]\r
6839 and z80bc,z80bc,#0xFF<<24\r
6840 orr z80bc,z80bc,r0, lsl #16\r
6841 fetch 8\r
6842;@LD C,(IX,N)\r
6843opcode_DD_4E:\r
6844 ldrsb r0,[z80pc],#1\r
6845 ldr r1,[z80xx]\r
6846 add r0,r1,r0, lsl #16\r
6847 mov r0,r0,lsr #16\r
6848 readmem8\r
6849 and z80bc,z80bc,#0xFF<<24\r
6850 orr z80bc,z80bc,r0, lsl #16\r
6851 fetch 19\r
6852\r
6853;@LD D,I (IX)\r
6854opcode_DD_54:\r
6855 ldrb r0,[z80xx,#3]\r
6856 and z80de,z80de,#0xFF<<16\r
6857 orr z80de,z80de,r0, lsl #24\r
6858 fetch 8\r
6859;@LD D,X (IX)\r
6860opcode_DD_55:\r
6861 ldrb r0,[z80xx,#2]\r
6862 and z80de,z80de,#0xFF<<16\r
6863 orr z80de,z80de,r0, lsl #24\r
6864 fetch 8\r
6865;@LD D,(IX,N)\r
6866opcode_DD_56:\r
6867 ldrsb r0,[z80pc],#1\r
6868 ldr r1,[z80xx]\r
6869 add r0,r1,r0, lsl #16\r
6870 mov r0,r0,lsr #16\r
6871 readmem8\r
6872 and z80de,z80de,#0xFF<<16\r
6873 orr z80de,z80de,r0, lsl #24\r
6874 fetch 19\r
6875;@LD E,I (IX)\r
6876opcode_DD_5C:\r
6877 ldrb r0,[z80xx,#3]\r
6878 and z80de,z80de,#0xFF<<24\r
6879 orr z80de,z80de,r0, lsl #16\r
6880 fetch 8\r
6881;@LD E,X (IX)\r
6882opcode_DD_5D:\r
6883 ldrb r0,[z80xx,#2]\r
6884 and z80de,z80de,#0xFF<<24\r
6885 orr z80de,z80de,r0, lsl #16\r
6886 fetch 8\r
6887;@LD E,(IX,N)\r
6888opcode_DD_5E:\r
6889 ldrsb r0,[z80pc],#1\r
6890 ldr r1,[z80xx]\r
6891 add r0,r1,r0, lsl #16\r
6892 mov r0,r0,lsr #16\r
6893 readmem8\r
6894 and z80de,z80de,#0xFF<<24\r
6895 orr z80de,z80de,r0, lsl #16\r
6896 fetch 19\r
6897;@LD I,B (IX)\r
6898opcode_DD_60:\r
6899 mov r0,z80bc,lsr#24\r
6900 strb r0,[z80xx,#3]\r
6901 fetch 8\r
6902;@LD I,C (IX)\r
6903opcode_DD_61:\r
6904 mov r0,z80bc,lsr#16\r
6905 strb r0,[z80xx,#3]\r
6906 fetch 8\r
6907;@LD I,D (IX)\r
6908opcode_DD_62:\r
6909 mov r0,z80de,lsr#24\r
6910 strb r0,[z80xx,#3]\r
6911 fetch 8\r
6912;@LD I,E (IX)\r
6913opcode_DD_63:\r
6914 mov r0,z80de,lsr#16\r
6915 strb r0,[z80xx,#3]\r
6916 fetch 8\r
6917;@LD I,I (IX)\r
6918opcode_DD_64:\r
6919 fetch 8\r
6920;@LD I,X (IX)\r
6921opcode_DD_65:\r
6922 ldrb r0,[z80xx,#2]\r
6923 strb r0,[z80xx,#3]\r
6924 fetch 8\r
6925;@LD H,(IX,N)\r
6926opcode_DD_66:\r
6927 ldrsb r0,[z80pc],#1\r
6928 ldr r1,[z80xx]\r
6929 add r0,r1,r0, lsl #16\r
6930 mov r0,r0,lsr #16\r
6931 readmem8\r
6932 and z80hl,z80hl,#0xFF<<16\r
6933 orr z80hl,z80hl,r0, lsl #24\r
6934 fetch 19\r
6935;@LD I,A (IX)\r
6936opcode_DD_67:\r
6937 mov r0,z80a,lsr#24\r
6938 strb r0,[z80xx,#3]\r
6939 fetch 8\r
6940;@LD X,B (IX)\r
6941opcode_DD_68:\r
6942 mov r0,z80bc,lsr#24\r
6943 strb r0,[z80xx,#2]\r
6944 fetch 8\r
6945;@LD X,C (IX)\r
6946opcode_DD_69:\r
6947 mov r0,z80bc,lsr#16\r
6948 strb r0,[z80xx,#2]\r
6949 fetch 8\r
6950;@LD X,D (IX)\r
6951opcode_DD_6A:\r
6952 mov r0,z80de,lsr#24\r
6953 strb r0,[z80xx,#2]\r
6954 fetch 8\r
6955;@LD X,E (IX)\r
6956opcode_DD_6B:\r
6957 mov r0,z80de,lsr#16\r
6958 strb r0,[z80xx,#2]\r
6959 fetch 8\r
6960;@LD X,I (IX)\r
6961opcode_DD_6C:\r
6962 ldrb r0,[z80xx,#3]\r
6963 strb r0,[z80xx,#2]\r
6964 fetch 8\r
6965;@LD X,X (IX)\r
6966opcode_DD_6D:\r
6967 fetch 8\r
6968;@LD L,(IX,N)\r
6969opcode_DD_6E:\r
6970 ldrsb r0,[z80pc],#1\r
6971 ldr r1,[z80xx]\r
6972 add r0,r1,r0, lsl #16\r
6973 mov r0,r0,lsr #16\r
6974 readmem8\r
6975 and z80hl,z80hl,#0xFF<<24\r
6976 orr z80hl,z80hl,r0, lsl #16\r
6977 fetch 19\r
6978;@LD X,A (IX)\r
6979opcode_DD_6F:\r
6980 mov r0,z80a,lsr#24\r
6981 strb r0,[z80xx,#2]\r
6982 fetch 8\r
6983\r
6984;@LD (IX,N),B\r
6985opcode_DD_70:\r
6986 ldrsb r0,[z80pc],#1\r
6987 ldr r1,[z80xx]\r
6988 add r1,r1,r0, lsl #16\r
6989 mov r1,r1,lsr #16\r
6990 mov r0,z80bc, lsr #24\r
6991 writemem8\r
6992 fetch 19\r
6993;@LD (IX,N),C\r
6994opcode_DD_71:\r
6995 ldrsb r0,[z80pc],#1\r
6996 ldr r1,[z80xx]\r
6997 add r1,r1,r0, lsl #16\r
6998 mov r1,r1,lsr #16\r
6999 mov r0,z80bc, lsr #16\r
7000 and r0,r0,#0xFF\r
7001 writemem8\r
7002 fetch 19\r
7003;@LD (IX,N),D\r
7004opcode_DD_72:\r
7005 ldrsb r0,[z80pc],#1\r
7006 ldr r1,[z80xx]\r
7007 add r1,r1,r0, lsl #16\r
7008 mov r1,r1,lsr #16\r
7009 mov r0,z80de, lsr #24\r
7010 writemem8\r
7011 fetch 19\r
7012;@LD (IX,N),E\r
7013opcode_DD_73:\r
7014 ldrsb r0,[z80pc],#1\r
7015 ldr r1,[z80xx]\r
7016 add r1,r1,r0, lsl #16\r
7017 mov r1,r1,lsr #16\r
7018 mov r0,z80de, lsr #16\r
7019 and r0,r0,#0xFF\r
7020 writemem8\r
7021 fetch 19\r
7022;@LD (IX,N),H\r
7023opcode_DD_74:\r
7024 ldrsb r0,[z80pc],#1\r
7025 ldr r1,[z80xx]\r
7026 add r1,r1,r0, lsl #16\r
7027 mov r1,r1,lsr #16\r
7028 mov r0,z80hl, lsr #24\r
7029 writemem8\r
7030 fetch 19\r
7031;@LD (IX,N),L\r
7032opcode_DD_75:\r
7033 ldrsb r0,[z80pc],#1\r
7034 ldr r1,[z80xx]\r
7035 add r1,r1,r0, lsl #16\r
7036 mov r1,r1,lsr #16\r
7037 mov r0,z80hl, lsr #16\r
7038 and r0,r0,#0xFF\r
7039 writemem8\r
7040 fetch 19\r
7041;@LD (IX,N),A\r
7042opcode_DD_77:\r
7043 ldrsb r0,[z80pc],#1\r
7044 ldr r1,[z80xx]\r
7045 add r1,r1,r0, lsl #16\r
7046 mov r1,r1,lsr #16\r
7047 mov r0,z80a, lsr #24\r
7048 writemem8\r
7049 fetch 19\r
7050\r
7051;@LD A,I from (IX)\r
7052opcode_DD_7C:\r
7053 ldrb r0,[z80xx,#3]\r
7054 mov z80a,r0, lsl #24\r
7055 fetch 8\r
7056;@LD A,X from (IX)\r
7057opcode_DD_7D:\r
7058 ldrb r0,[z80xx,#2]\r
7059 mov z80a,r0, lsl #24\r
7060 fetch 8\r
7061;@LD A,(IX,N)\r
7062opcode_DD_7E:\r
7063 ldrsb r0,[z80pc],#1\r
7064 ldr r1,[z80xx]\r
7065 add r0,r1,r0, lsl #16\r
7066 mov r0,r0,lsr #16\r
7067 readmem8\r
7068 mov z80a,r0, lsl #24\r
7069 fetch 19\r
7070\r
7071;@ADD A,I ( IX)\r
7072opcode_DD_84:\r
7073 ldrb r0,[z80xx,#3]\r
7074 opADDb\r
7075 fetch 8\r
7076;@ADD A,X ( IX)\r
7077opcode_DD_85:\r
7078 ldrb r0,[z80xx,#2]\r
7079 opADDb\r
7080 fetch 8\r
7081;@ADD A,(IX+N)\r
7082opcode_DD_86:\r
7083 ldrsb r0,[z80pc],#1\r
7084 ldr r1,[z80xx]\r
7085 add r0,r1,r0, lsl #16\r
7086 mov r0,r0,lsr #16\r
7087 readmem8\r
7088 opADDb\r
7089 fetch 19\r
7090\r
7091;@ADC A,I (IX)\r
7092opcode_DD_8C:\r
7093 ldrb r0,[z80xx,#3]\r
7094 opADCb\r
7095 fetch 8\r
7096;@ADC A,X (IX)\r
7097opcode_DD_8D:\r
7098 ldrb r0,[z80xx,#2]\r
7099 opADCb\r
7100 fetch 8\r
7101;@ADC A,(IX+N)\r
7102opcode_DD_8E:\r
7103 ldrsb r0,[z80pc],#1\r
7104 ldr r1,[z80xx]\r
7105 add r0,r1,r0, lsl #16\r
7106 mov r0,r0,lsr #16\r
7107 readmem8\r
7108 opADCb\r
7109 fetch 19\r
7110\r
7111;@SUB A,I (IX)\r
7112opcode_DD_94:\r
7113 ldrb r0,[z80xx,#3]\r
7114 opSUBb\r
7115 fetch 8\r
7116;@SUB A,X (IX)\r
7117opcode_DD_95:\r
7118 ldrb r0,[z80xx,#2]\r
7119 opSUBb\r
7120 fetch 8\r
7121;@SUB A,(IX+N)\r
7122opcode_DD_96:\r
7123 ldrsb r0,[z80pc],#1\r
7124 ldr r1,[z80xx]\r
7125 add r0,r1,r0, lsl #16\r
7126 mov r0,r0,lsr #16\r
7127 readmem8\r
7128 opSUBb\r
7129 fetch 19\r
7130\r
7131;@SBC A,I (IX)\r
7132opcode_DD_9C:\r
7133 ldrb r0,[z80xx,#3]\r
7134 opSBCb\r
7135 fetch 8\r
7136;@SBC A,X (IX)\r
7137opcode_DD_9D:\r
7138 ldrb r0,[z80xx,#2]\r
7139 opSBCb\r
7140 fetch 8\r
7141;@SBC A,(IX+N)\r
7142opcode_DD_9E:\r
7143 ldrsb r0,[z80pc],#1\r
7144 ldr r1,[z80xx]\r
7145 add r0,r1,r0, lsl #16\r
7146 mov r0,r0,lsr #16\r
7147 readmem8\r
7148 opSBCb\r
7149 fetch 19\r
7150\r
7151;@AND I (IX)\r
7152opcode_DD_A4:\r
7153 ldrb r0,[z80xx,#3]\r
7154 opANDb\r
7155 fetch 8\r
7156;@AND X (IX)\r
7157opcode_DD_A5:\r
7158 ldrb r0,[z80xx,#2]\r
7159 opANDb\r
7160 fetch 8\r
7161;@AND (IX+N)\r
7162opcode_DD_A6:\r
7163 ldrsb r0,[z80pc],#1\r
7164 ldr r1,[z80xx]\r
7165 add r0,r1,r0, lsl #16\r
7166 mov r0,r0,lsr #16\r
7167 readmem8\r
7168 opANDb\r
7169 fetch 19\r
7170\r
7171;@XOR I (IX)\r
7172opcode_DD_AC:\r
7173 ldrb r0,[z80xx,#3]\r
7174 opXORb\r
7175 fetch 8\r
7176;@XOR X (IX)\r
7177opcode_DD_AD:\r
7178 ldrb r0,[z80xx,#2]\r
7179 opXORb\r
7180 fetch 8\r
7181;@XOR (IX+N)\r
7182opcode_DD_AE:\r
7183 ldrsb r0,[z80pc],#1\r
7184 ldr r1,[z80xx]\r
7185 add r0,r1,r0, lsl #16\r
7186 mov r0,r0,lsr #16\r
7187 readmem8\r
7188 opXORb\r
7189 fetch 19\r
7190\r
7191;@OR I (IX)\r
7192opcode_DD_B4:\r
7193 ldrb r0,[z80xx,#3]\r
7194 opORb\r
7195 fetch 8\r
7196;@OR X (IX)\r
7197opcode_DD_B5:\r
7198 ldrb r0,[z80xx,#2]\r
7199 opORb\r
7200 fetch 8\r
7201;@OR (IX+N)\r
7202opcode_DD_B6:\r
7203 ldrsb r0,[z80pc],#1\r
7204 ldr r1,[z80xx]\r
7205 add r0,r1,r0, lsl #16\r
7206 mov r0,r0,lsr #16\r
7207 readmem8\r
7208 opORb\r
7209 fetch 19\r
7210\r
7211;@CP I (IX)\r
7212opcode_DD_BC:\r
7213 ldrb r0,[z80xx,#3]\r
7214 opCPb\r
7215 fetch 8\r
7216;@CP X (IX)\r
7217opcode_DD_BD:\r
7218 ldrb r0,[z80xx,#2]\r
7219 opCPb\r
7220 fetch 8\r
7221;@CP (IX+N)\r
7222opcode_DD_BE:\r
7223 ldrsb r0,[z80pc],#1\r
7224 ldr r1,[z80xx]\r
7225 add r0,r1,r0, lsl #16\r
7226 mov r0,r0,lsr #16\r
7227 readmem8\r
7228 opCPb\r
7229 fetch 19\r
7230\r
7231\r
7232opcodes_DD_CB_LOCAL: .word opcodes_DD_CB\r
7233opcode_DD_CB:\r
7234;@Looks up the opcode on the opcodes_DD_CB table and then \r
7235;@moves the PC to the location of the subroutine\r
7236 ldrsb r0,[z80pc],#1\r
7237 ldr r1,[z80xx]\r
7238 add r0,r1,r0, lsl #16\r
7239 mov r0,r0,lsr #16\r
7240\r
7241 ldrb r1,[z80pc],#1\r
7242 ldr pc,[pc,r1, lsl #2]\r
7243 .word 0x00\r
7244opcodes_DD_CB:\r
7245 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_06,opcode_DD_NF2\r
7246 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_0E,opcode_DD_NF2\r
7247 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_16,opcode_DD_NF2\r
7248 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_1E,opcode_DD_NF2\r
7249 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_26,opcode_DD_NF2\r
7250 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_2E,opcode_DD_NF2\r
7251 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_36,opcode_DD_NF2\r
7252 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_3E,opcode_DD_NF2\r
7253 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_46,opcode_DD_NF2\r
7254 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_4E,opcode_DD_NF2\r
7255 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_56,opcode_DD_NF2\r
7256 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_5E,opcode_DD_NF2\r
7257 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_66,opcode_DD_NF2\r
7258 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_6E,opcode_DD_NF2\r
7259 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_76,opcode_DD_NF2\r
7260 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_7E,opcode_DD_NF2\r
7261 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_86,opcode_DD_NF2\r
7262 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_8E,opcode_DD_NF2\r
7263 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_96,opcode_DD_NF2\r
7264 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_9E,opcode_DD_NF2\r
7265 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_A6,opcode_DD_NF2\r
7266 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_AE,opcode_DD_NF2\r
7267 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_B6,opcode_DD_NF2\r
7268 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_BE,opcode_DD_NF2\r
7269 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_C6,opcode_DD_NF2\r
7270 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_CE,opcode_DD_NF2\r
7271 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_D6,opcode_DD_NF2\r
7272 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_DE,opcode_DD_NF2\r
7273 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_E6,opcode_DD_NF2\r
7274 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_EE,opcode_DD_NF2\r
7275 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_F6,opcode_DD_NF2\r
7276 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_FE,opcode_DD_NF2\r
7277\r
7278;@RLC (IX+N) \r
7279opcode_DD_CB_06:\r
7280 stmfd sp!,{r0} ;@ save addr\r
7281 readmem8\r
7282 opRLCb\r
7283 ldmfd sp!,{r1} ;@ restore addr into r1\r
7284 writemem8\r
7285 fetch 23\r
7286;@RRC (IX+N) \r
7287opcode_DD_CB_0E:\r
7288 stmfd sp!,{r0} ;@ save addr\r
7289 readmem8\r
7290 opRRCb\r
7291 ldmfd sp!,{r1} ;@ restore addr into r1\r
7292 writemem8\r
7293 fetch 23\r
7294;@RL (IX+N) \r
7295opcode_DD_CB_16:\r
7296 stmfd sp!,{r0} ;@ save addr\r
7297 readmem8\r
7298 opRLb\r
7299 ldmfd sp!,{r1} ;@ restore addr into r1\r
7300 writemem8\r
7301 fetch 23\r
7302;@RR (IX+N) \r
7303opcode_DD_CB_1E:\r
7304 stmfd sp!,{r0} ;@ save addr \r
7305 readmem8\r
7306 opRRb\r
7307 ldmfd sp!,{r1} ;@ restore addr into r1\r
7308 writemem8\r
7309 fetch 23\r
7310\r
7311;@SLA (IX+N) \r
7312opcode_DD_CB_26:\r
7313 stmfd sp!,{r0} ;@ save addr \r
7314 readmem8\r
7315 opSLAb\r
7316 ldmfd sp!,{r1} ;@ restore addr into r1\r
7317 writemem8\r
7318 fetch 23\r
7319;@SRA (IX+N) \r
7320opcode_DD_CB_2E:\r
7321 stmfd sp!,{r0} ;@ save addr \r
7322 readmem8\r
7323 opSRAb\r
7324 ldmfd sp!,{r1} ;@ restore addr into r1\r
7325 writemem8\r
7326 fetch 23\r
7327;@SLL (IX+N) \r
7328opcode_DD_CB_36:\r
7329 stmfd sp!,{r0} ;@ save addr \r
7330 readmem8\r
7331 opSLLb\r
7332 ldmfd sp!,{r1} ;@ restore addr into r1\r
7333 writemem8\r
7334 fetch 23\r
7335;@SRL (IX+N)\r
7336opcode_DD_CB_3E:\r
7337 stmfd sp!,{r0} ;@ save addr \r
7338 readmem8\r
7339 opSRLb\r
7340 ldmfd sp!,{r1} ;@ restore addr into r1\r
7341 writemem8\r
7342 fetch 23\r
7343\r
7344;@BIT 0,(IX+N) \r
7345opcode_DD_CB_46:\r
7346 readmem8\r
7347 opBITb 0\r
7348 fetch 20\r
7349;@BIT 1,(IX+N) \r
7350opcode_DD_CB_4E:\r
7351 readmem8\r
7352 opBITb 1\r
7353 fetch 20\r
7354;@BIT 2,(IX+N) \r
7355opcode_DD_CB_56:\r
7356 readmem8\r
7357 opBITb 2\r
7358 fetch 20\r
7359;@BIT 3,(IX+N) \r
7360opcode_DD_CB_5E:\r
7361 readmem8\r
7362 opBITb 3\r
7363 fetch 20\r
7364;@BIT 4,(IX+N) \r
7365opcode_DD_CB_66:\r
7366 readmem8\r
7367 opBITb 4\r
7368 fetch 20\r
7369;@BIT 5,(IX+N) \r
7370opcode_DD_CB_6E:\r
7371 readmem8\r
7372 opBITb 5\r
7373 fetch 20\r
7374;@BIT 6,(IX+N) \r
7375opcode_DD_CB_76:\r
7376 readmem8\r
7377 opBITb 6\r
7378 fetch 20\r
7379;@BIT 7,(IX+N) \r
7380opcode_DD_CB_7E:\r
7381 readmem8\r
7382 opBIT7b\r
7383 fetch 20\r
7384;@RES 0,(IX+N) \r
7385opcode_DD_CB_86:\r
7386 opRESmem 0\r
7387;@RES 1,(IX+N) \r
7388opcode_DD_CB_8E:\r
7389 opRESmem 1\r
7390;@RES 2,(IX+N) \r
7391opcode_DD_CB_96:\r
7392 opRESmem 2\r
7393;@RES 3,(IX+N) \r
7394opcode_DD_CB_9E:\r
7395 opRESmem 3\r
7396;@RES 4,(IX+N) \r
7397opcode_DD_CB_A6:\r
7398 opRESmem 4\r
7399;@RES 5,(IX+N) \r
7400opcode_DD_CB_AE:\r
7401 opRESmem 5\r
7402;@RES 6,(IX+N) \r
7403opcode_DD_CB_B6:\r
7404 opRESmem 6\r
7405;@RES 7,(IX+N) \r
7406opcode_DD_CB_BE:\r
7407 opRESmem 7\r
7408\r
7409;@SET 0,(IX+N) \r
7410opcode_DD_CB_C6:\r
7411 opSETmem 0\r
7412;@SET 1,(IX+N) \r
7413opcode_DD_CB_CE:\r
7414 opSETmem 1\r
7415;@SET 2,(IX+N) \r
7416opcode_DD_CB_D6:\r
7417 opSETmem 2\r
7418;@SET 3,(IX+N) \r
7419opcode_DD_CB_DE:\r
7420 opSETmem 3\r
7421;@SET 4,(IX+N) \r
7422opcode_DD_CB_E6:\r
7423 opSETmem 4\r
7424;@SET 5,(IX+N) \r
7425opcode_DD_CB_EE:\r
7426 opSETmem 5\r
7427;@SET 6,(IX+N) \r
7428opcode_DD_CB_F6:\r
7429 opSETmem 6\r
7430;@SET 7,(IX+N) \r
7431opcode_DD_CB_FE:\r
7432 opSETmem 7\r
7433\r
7434\r
7435\r
7436;@POP IX\r
7437opcode_DD_E1:\r
7438.if FAST_Z80SP\r
7439 opPOP\r
7440.else\r
7441 mov r0,z80sp\r
7442 stmfd sp!,{z80xx}\r
7443 readmem16\r
7444 ldmfd sp!,{z80xx}\r
7445 add z80sp,z80sp,#2\r
7446.endif\r
7447 strh r0,[z80xx,#2]\r
7448 fetch 14\r
7449;@EX (SP),IX\r
7450opcode_DD_E3:\r
7451.if FAST_Z80SP\r
7452 ldrb r0,[z80sp]\r
7453 ldrb r1,[z80sp,#1]\r
7454 orr r2,r0,r1, lsl #8\r
7455 ldrh r1,[z80xx,#2]\r
7456 mov r0,r1, lsr #8\r
7457 strb r0,[z80sp,#1]\r
7458 strb r1,[z80sp]\r
7459 strh r2,[z80xx,#2]\r
7460.else\r
7461 mov r0,z80sp\r
7462 stmfd sp!,{z80xx}\r
7463 readmem16\r
7464 ldmfd sp!,{z80xx}\r
7465 mov r2,r0\r
7466 ldrh r0,[z80xx,#2]\r
7467 strh r2,[z80xx,#2]\r
7468 mov r1,z80sp\r
7469 writemem16\r
7470.endif\r
7471 fetch 23\r
7472;@PUSH IX\r
7473opcode_DD_E5:\r
7474 ldr r2,[z80xx]\r
7475 opPUSHreg r2\r
7476 fetch 15\r
7477;@JP (IX)\r
7478opcode_DD_E9:\r
7479 ldrh r0,[z80xx,#2]\r
7480 rebasepc\r
7481 fetch 8\r
7482;@LD SP,IX\r
7483opcode_DD_F9:\r
7484.if FAST_Z80SP\r
7485 ldrh r0,[z80xx,#2]\r
7486 rebasesp\r
7487.else\r
7488 ldrh z80sp,[z80xx,#2]\r
7489.endif\r
7490 fetch 10\r
7491\r
7492;@##################################\r
7493;@##################################\r
7494;@### opcodes ED #########################\r
7495;@##################################\r
7496;@##################################\r
7497\r
7498opcode_ED_NF:\r
7499 fetch 8\r
7500;@ ldrb r0,[z80pc],#1\r
7501;@ ldr pc,[opcodes,r0, lsl #2]\r
7502;@ mov r0,#0xED00\r
7503;@ orr r0,r0,r1\r
7504;@ b end_loop\r
7505\r
7506;@IN B,(C)\r
7507opcode_ED_40:\r
7508 opIN_C\r
7509 and z80bc,z80bc,#0xFF<<16\r
7510 orr z80bc,z80bc,r0, lsl #24\r
7511 sub r1,opcodes,#0x100\r
7512 ldrb r0,[r1,r0]\r
7513 and z80f,z80f,#1<<CFlag\r
7514 orr z80f,z80f,r0\r
7515 fetch 12\r
7516;@OUT (C),B\r
7517opcode_ED_41:\r
7518 mov r1,z80bc, lsr #24\r
7519 opOUT_C\r
7520 fetch 12\r
7521\r
7522;@SBC HL,BC\r
7523opcode_ED_42:\r
7524 opSBC16 z80bc\r
7525\r
7526;@LD (NN),BC\r
7527opcode_ED_43:\r
7528 ldrb r0,[z80pc],#1\r
7529 ldrb r1,[z80pc],#1\r
7530 orr r1,r0,r1, lsl #8\r
7531 mov r0,z80bc, lsr #16\r
7532 writemem16\r
7533 fetch 20\r
7534;@NEG\r
7535opcode_ED_44:\r
7536 rsbs z80a,z80a,#0\r
7537 mrs z80f,cpsr\r
7538 mov z80f,z80f,lsr#28 ;@S,Z,V&C\r
7539 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@invert C and set n.\r
7540 tst z80a,#0x0F000000 ;@H, correct\r
7541 orrne z80f,z80f,#1<<HFlag\r
7542 fetch 8\r
7543 \r
7544;@RETN, moved to ED_4D\r
7545;@opcode_ED_45:\r
7546\r
7547;@IM 0\r
7548opcode_ED_46:\r
7549 strb z80a,[cpucontext,#z80im]\r
7550 fetch 8\r
7551;@LD I,A\r
7552opcode_ED_47:\r
7553 str z80a,[cpucontext,#z80i]\r
7554 fetch 9\r
7555;@IN C,(C)\r
7556opcode_ED_48:\r
7557 opIN_C\r
7558 and z80bc,z80bc,#0xFF<<24\r
7559 orr z80bc,z80bc,r0, lsl #16\r
7560 sub r1,opcodes,#0x100\r
7561 ldrb r0,[r1,r0]\r
7562 and z80f,z80f,#1<<CFlag\r
7563 orr z80f,z80f,r0\r
7564 fetch 12\r
7565;@OUT (C),C\r
7566opcode_ED_49:\r
7567 mov r0,z80bc, lsr #16\r
7568 and r1,r0,#0xFF\r
7569 opOUT\r
7570 fetch 12\r
7571;@ADC HL,BC\r
7572opcode_ED_4A:\r
7573 opADC16 z80bc\r
7574;@LD BC,(NN)\r
7575opcode_ED_4B:\r
7576 ldrb r0,[z80pc],#1\r
7577 ldrb r1,[z80pc],#1\r
7578 orr r0,r0,r1, lsl #8\r
7579 readmem16\r
7580 mov z80bc,r0, lsl #16\r
7581 fetch 20\r
7582\r
7583;@RETN\r
7584opcode_ED_45:\r
7585;@RETI\r
7586opcode_ED_4D:\r
7587 ldrb r0,[cpucontext,#z80if]\r
7588 tst r0,#Z80_IF2\r
7589 orrne r0,r0,#Z80_IF1\r
7590 biceq r0,r0,#Z80_IF1\r
7591 strb r0,[cpucontext,#z80if]\r
7592 opPOP\r
7593 rebasepc\r
7594 fetch 14\r
7595\r
7596;@LD R,A\r
7597opcode_ED_4F:\r
7598 mov r0,z80a,lsr#24\r
7599 strb r0,[cpucontext,#z80r]\r
7600 fetch 9\r
7601\r
7602;@IN D,(C)\r
7603opcode_ED_50:\r
7604 opIN_C\r
7605 and z80de,z80de,#0xFF<<16\r
7606 orr z80de,z80de,r0, lsl #24\r
7607 sub r1,opcodes,#0x100\r
7608 ldrb r0,[r1,r0]\r
7609 and z80f,z80f,#1<<CFlag\r
7610 orr z80f,z80f,r0\r
7611 fetch 12\r
7612;@OUT (C),D\r
7613opcode_ED_51:\r
7614 mov r1,z80de, lsr #24\r
7615 opOUT_C\r
7616 fetch 12\r
7617;@SBC HL,DE\r
7618opcode_ED_52:\r
7619 opSBC16 z80de\r
7620;@LD (NN),DE\r
7621opcode_ED_53:\r
7622 ldrb r0,[z80pc],#1\r
7623 ldrb r1,[z80pc],#1\r
7624 orr r1,r0,r1, lsl #8\r
7625 mov r0,z80de, lsr #16\r
7626 writemem16\r
7627 fetch 20\r
7628;@IM 1\r
7629opcode_ED_56:\r
7630 mov r0,#1\r
7631 strb r0,[cpucontext,#z80im]\r
7632 fetch 8\r
7633;@LD A,I\r
7634opcode_ED_57:\r
7635 ldr z80a,[cpucontext,#z80i]\r
7636 tst z80a,#0xFF000000\r
7637 and z80f,z80f,#(1<<CFlag)\r
7638 orreq z80f,z80f,#(1<<ZFlag)\r
7639 orrmi z80f,z80f,#(1<<SFlag)\r
7640 ldrb r0,[cpucontext,#z80if]\r
7641 tst r0,#Z80_IF2\r
7642 orrne z80f,z80f,#(1<<VFlag)\r
7643 fetch 9\r
7644;@IN E,(C)\r
7645opcode_ED_58:\r
7646 opIN_C\r
7647 and z80de,z80de,#0xFF<<24\r
7648 orr z80de,z80de,r0, lsl #16\r
7649 sub r1,opcodes,#0x100\r
7650 ldrb r0,[r1,r0]\r
7651 and z80f,z80f,#1<<CFlag\r
7652 orr z80f,z80f,r0\r
7653 fetch 12\r
7654;@OUT (C),E\r
7655opcode_ED_59:\r
7656 mov r1,z80de, lsr #16\r
7657 and r1,r1,#0xFF\r
7658 opOUT_C\r
7659 fetch 12\r
7660;@ADC HL,DE\r
7661opcode_ED_5A:\r
7662 opADC16 z80de\r
7663;@LD DE,(NN)\r
7664opcode_ED_5B:\r
7665 ldrb r0,[z80pc],#1\r
7666 ldrb r1,[z80pc],#1\r
7667 orr r0,r0,r1, lsl #8\r
7668 readmem16\r
7669 mov z80de,r0, lsl #16\r
7670 fetch 20\r
7671;@IM 2\r
7672opcode_ED_5E:\r
7673 mov r0,#2\r
7674 strb r0,[cpucontext,#z80im]\r
7675 fetch 8\r
7676;@LD A,R\r
7677opcode_ED_5F:\r
7678 ldrb r0,[cpucontext,#z80r]\r
7679 and r0,r0,#0x80\r
7680 rsb r1,z80_icount,#0\r
7681 and r1,r1,#0x7F\r
7682 orr r0,r0,r1\r
7683 movs z80a,r0, lsl #24\r
7684 and z80f,z80f,#1<<CFlag\r
7685 orrmi z80f,z80f,#(1<<SFlag)\r
7686 orreq z80f,z80f,#(1<<ZFlag)\r
7687 ldrb r0,[cpucontext,#z80if]\r
7688 tst r0,#Z80_IF2\r
7689 orrne z80f,z80f,#(1<<VFlag)\r
7690 fetch 9\r
7691;@IN H,(C)\r
7692opcode_ED_60:\r
7693 opIN_C\r
7694 and z80hl,z80hl,#0xFF<<16\r
7695 orr z80hl,z80hl,r0, lsl #24\r
7696 sub r1,opcodes,#0x100\r
7697 ldrb r0,[r1,r0]\r
7698 and z80f,z80f,#1<<CFlag\r
7699 orr z80f,z80f,r0\r
7700 fetch 12\r
7701;@OUT (C),H\r
7702opcode_ED_61:\r
7703 mov r1,z80hl, lsr #24\r
7704 opOUT_C\r
7705 fetch 12\r
7706;@SBC HL,HL\r
7707opcode_ED_62:\r
7708 opSBC16HL\r
7709;@RRD\r
7710opcode_ED_67:\r
7711 readmem8HL\r
7712 mov r1,r0,ror#4\r
7713 orr r0,r1,z80a,lsr#20\r
7714 bic z80a,z80a,#0x0F000000\r
7715 orr z80a,z80a,r1,lsr#4\r
7716 writemem8HL\r
7717 sub r1,opcodes,#0x100\r
7718 ldrb r0,[r1,z80a, lsr #24]\r
7719 and z80f,z80f,#1<<CFlag\r
7720 orr z80f,z80f,r0\r
7721 fetch 18\r
7722;@IN L,(C)\r
7723opcode_ED_68:\r
7724 opIN_C\r
7725 and z80hl,z80hl,#0xFF<<24\r
7726 orr z80hl,z80hl,r0, lsl #16\r
7727 and z80f,z80f,#1<<CFlag\r
7728 sub r1,opcodes,#0x100\r
7729 ldrb r0,[r1,r0]\r
7730 orr z80f,z80f,r0\r
7731 fetch 12\r
7732;@OUT (C),L\r
7733opcode_ED_69:\r
7734 mov r1,z80hl, lsr #16\r
7735 and r1,r1,#0xFF\r
7736 opOUT_C\r
7737 fetch 12\r
7738;@ADC HL,HL\r
7739opcode_ED_6A:\r
7740 opADC16HL\r
7741;@RLD\r
7742opcode_ED_6F:\r
7743 readmem8HL\r
7744 orr r0,r0,z80a,lsl#4\r
7745 mov r0,r0,ror#28\r
7746 and z80a,z80a,#0xF0000000\r
7747 orr z80a,z80a,r0,lsl#16\r
7748 and z80a,z80a,#0xFF000000\r
7749 writemem8HL\r
7750 sub r1,opcodes,#0x100\r
7751 ldrb r0,[r1,z80a, lsr #24]\r
7752 and z80f,z80f,#1<<CFlag\r
7753 orr z80f,z80f,r0\r
7754 fetch 18\r
7755;@IN F,(C)\r
7756opcode_ED_70:\r
7757 opIN_C\r
7758 and z80f,z80f,#1<<CFlag\r
7759 sub r1,opcodes,#0x100\r
7760 ldrb r0,[r1,r0]\r
7761 orr z80f,z80f,r0\r
7762 fetch 12\r
7763;@OUT (C),0\r
7764opcode_ED_71:\r
7765 mov r1,#0\r
7766 opOUT_C\r
7767 fetch 12\r
7768\r
7769;@SBC HL,SP\r
7770opcode_ED_72:\r
7771.if FAST_Z80SP\r
7772 ldr r0,[cpucontext,#z80sp_base]\r
7773 sub r0,z80sp,r0\r
7774 mov r0, r0, lsl #16\r
7775.else\r
7776 mov r0,z80sp,lsl#16\r
7777.endif\r
7778 opSBC16 r0\r
7779;@LD (NN),SP\r
7780opcode_ED_73:\r
7781 ldrb r0,[z80pc],#1\r
7782 ldrb r1,[z80pc],#1\r
7783 orr r1,r0,r1, lsl #8\r
7784.if FAST_Z80SP\r
7785 ldr r0,[cpucontext,#z80sp_base]\r
7786 sub r0,z80sp,r0\r
7787.else\r
7788 mov r0,z80sp\r
7789.endif\r
7790 writemem16\r
7791 fetch 16\r
7792;@IN A,(C)\r
7793opcode_ED_78:\r
7794 opIN_C\r
7795 mov z80a,r0, lsl #24\r
7796 and z80f,z80f,#1<<CFlag\r
7797 sub r1,opcodes,#0x100\r
7798 ldrb r0,[r1,r0]\r
7799 orr z80f,z80f,r0\r
7800 fetch 12\r
7801;@OUT (C),A\r
7802opcode_ED_79:\r
7803 mov r1,z80a, lsr #24\r
7804 opOUT_C\r
7805 fetch 12\r
7806;@ADC HL,SP\r
7807opcode_ED_7A:\r
7808.if FAST_Z80SP\r
7809 ldr r0,[cpucontext,#z80sp_base]\r
7810 sub r0,z80sp,r0\r
7811 mov r0, r0, lsl #16\r
7812.else\r
7813 mov r0,z80sp,lsl#16\r
7814.endif\r
7815 opADC16 r0\r
7816;@LD SP,(NN)\r
7817opcode_ED_7B:\r
7818 ldrb r0,[z80pc],#1\r
7819 ldrb r1,[z80pc],#1\r
7820 orr r0,r0,r1, lsl #8\r
7821 readmem16\r
7822.if FAST_Z80SP\r
7823 rebasesp\r
7824.else\r
7825 mov z80sp,r0\r
7826.endif\r
7827 fetch 20\r
7828;@LDI\r
7829opcode_ED_A0:\r
7830 copymem8HL_DE\r
7831 add z80hl,z80hl,#1<<16\r
7832 add z80de,z80de,#1<<16\r
7833 subs z80bc,z80bc,#1<<16\r
7834 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7835 orrne z80f,z80f,#1<<VFlag\r
7836 fetch 16\r
7837;@CPI\r
7838opcode_ED_A1:\r
7839 readmem8HL\r
7840 add z80hl,z80hl,#0x00010000\r
7841 mov r1,z80a,lsl#4\r
7842 cmp z80a,r0,lsl#24\r
7843 and z80f,z80f,#1<<CFlag\r
7844 orr z80f,z80f,#1<<NFlag\r
7845 orrmi z80f,z80f,#1<<SFlag\r
7846 orreq z80f,z80f,#1<<ZFlag\r
7847 cmp r1,r0,lsl#28\r
7848 orrcc z80f,z80f,#1<<HFlag\r
7849 subs z80bc,z80bc,#0x00010000\r
7850 orrne z80f,z80f,#1<<VFlag\r
7851 fetch 16\r
7852;@INI\r
7853opcode_ED_A2:\r
7854 opIN_C\r
7855 and z80f,r0,#0x80\r
7856 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7857;@ mov r1,z80bc,lsl#8\r
7858;@ add r1,r1,#0x01000000\r
7859;@ adds r1,r1,r0,lsl#24\r
7860;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7861 writemem8HL\r
7862 add z80hl,z80hl,#1<<16\r
7863 sub z80bc,z80bc,#1<<24\r
7864 tst z80bc,#0xFF<<24\r
7865 orrmi z80f,z80f,#1<<SFlag\r
7866 orreq z80f,z80f,#1<<ZFlag\r
7867 fetch 16\r
7868\r
7869;@OUTI\r
7870opcode_ED_A3:\r
7871 readmem8HL\r
7872 add z80hl,z80hl,#1<<16\r
7873 and z80f,r0,#0x80\r
7874 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7875 mov r1,z80hl,lsl#8\r
7876 adds r1,r1,r0,lsl#24\r
7877 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL)+L > 0xFF\r
7878 sub z80bc,z80bc,#1<<24\r
7879 tst z80bc,#0xFF<<24\r
7880 orrmi z80f,z80f,#1<<SFlag\r
7881 orreq z80f,z80f,#1<<ZFlag\r
7882 mov r1,r0\r
7883 opOUT_C\r
7884 fetch 16\r
7885\r
7886;@LDD\r
7887opcode_ED_A8:\r
7888 copymem8HL_DE\r
7889 sub z80hl,z80hl,#1<<16\r
7890 sub z80de,z80de,#1<<16\r
7891 subs z80bc,z80bc,#1<<16\r
7892 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7893 orrne z80f,z80f,#1<<VFlag\r
7894 fetch 16\r
7895\r
7896;@CPD\r
7897opcode_ED_A9:\r
7898 readmem8HL\r
7899 sub z80hl,z80hl,#1<<16\r
7900 mov r1,z80a,lsl#4\r
7901 cmp z80a,r0,lsl#24\r
7902 and z80f,z80f,#1<<CFlag\r
7903 orr z80f,z80f,#1<<NFlag\r
7904 orrmi z80f,z80f,#1<<SFlag\r
7905 orreq z80f,z80f,#1<<ZFlag\r
7906 cmp r1,r0,lsl#28\r
7907 orrcc z80f,z80f,#1<<HFlag\r
7908 subs z80bc,z80bc,#0x00010000\r
7909 orrne z80f,z80f,#1<<VFlag\r
7910 fetch 16\r
7911\r
7912;@IND\r
7913opcode_ED_AA:\r
7914 opIN_C\r
7915 and z80f,r0,#0x80\r
7916 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7917;@ mov r1,z80bc,lsl#8\r
7918;@ sub r1,r1,#0x01000000\r
7919;@ adds r1,r1,r0,lsl#24\r
7920;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
7921 writemem8HL\r
7922 sub z80hl,z80hl,#1<<16\r
7923 sub z80bc,z80bc,#1<<24\r
7924 tst z80bc,#0xFF<<24\r
7925 orrmi z80f,z80f,#1<<SFlag\r
7926 orreq z80f,z80f,#1<<ZFlag\r
7927 fetch 16\r
7928\r
7929;@OUTD\r
7930opcode_ED_AB:\r
7931 readmem8HL\r
7932 sub z80hl,z80hl,#1<<16\r
7933 and z80f,r0,#0x80\r
7934 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7935 mov r1,z80hl,lsl#8\r
7936 adds r1,r1,r0,lsl#24\r
7937 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7938 sub z80bc,z80bc,#1<<24\r
7939 tst z80bc,#0xFF<<24\r
7940 orrmi z80f,z80f,#1<<SFlag\r
7941 orreq z80f,z80f,#1<<ZFlag\r
7942 mov r1,r0\r
7943 opOUT_C\r
7944 fetch 16\r
7945;@LDIR\r
7946opcode_ED_B0:\r
7947 copymem8HL_DE\r
7948 add z80hl,z80hl,#1<<16\r
7949 add z80de,z80de,#1<<16\r
7950 subs z80bc,z80bc,#1<<16\r
7951 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7952 orrne z80f,z80f,#1<<VFlag\r
7953 subne z80pc,z80pc,#2\r
7954 subne z80_icount,z80_icount,#5\r
7955 fetch 16\r
7956\r
7957;@CPIR\r
7958opcode_ED_B1:\r
7959 readmem8HL\r
7960 add z80hl,z80hl,#1<<16 \r
7961 mov r1,z80a,lsl#4\r
7962 cmp z80a,r0,lsl#24\r
7963 and z80f,z80f,#1<<CFlag\r
7964 orr z80f,z80f,#1<<NFlag\r
7965 orrmi z80f,z80f,#1<<SFlag\r
7966 orreq z80f,z80f,#1<<ZFlag\r
7967 cmp r1,r0,lsl#28\r
7968 orrcc z80f,z80f,#1<<HFlag\r
7969 subs z80bc,z80bc,#1<<16\r
7970 bne opcode_ED_B1_decpc\r
7971 fetch 16\r
7972opcode_ED_B1_decpc:\r
7973 orr z80f,z80f,#1<<VFlag\r
7974 tst z80f,#1<<ZFlag\r
7975 subeq z80pc,z80pc,#2\r
7976 subeq z80_icount,z80_icount,#5\r
7977 fetch 16\r
7978;@INIR\r
7979opcode_ED_B2:\r
7980 opIN_C\r
7981 and z80f,r0,#0x80\r
7982 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7983;@ mov r1,z80bc,lsl#8\r
7984;@ add r1,r1,#0x01000000\r
7985;@ adds r1,r1,r0,lsl#24\r
7986;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7987 writemem8HL\r
7988 add z80hl,z80hl,#1<<16\r
7989 sub z80bc,z80bc,#1<<24\r
7990 tst z80bc,#0xFF<<24\r
7991 orrmi z80f,z80f,#1<<SFlag\r
7992 orreq z80f,z80f,#1<<ZFlag\r
7993 subne z80pc,z80pc,#2\r
7994 subne z80_icount,z80_icount,#5\r
7995 fetch 16\r
7996;@OTIR\r
7997opcode_ED_B3:\r
7998 readmem8HL\r
7999 add z80hl,z80hl,#1<<16\r
8000 and z80f,r0,#0x80\r
8001 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8002 mov r1,z80hl,lsl#8\r
8003 adds r1,r1,r0,lsl#24\r
8004 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8005 sub z80bc,z80bc,#1<<24\r
8006 tst z80bc,#0xFF<<24\r
8007 orrmi z80f,z80f,#1<<SFlag\r
8008 orreq z80f,z80f,#1<<ZFlag\r
8009 subne z80pc,z80pc,#2\r
8010 subne z80_icount,z80_icount,#5\r
8011 mov r1,r0\r
8012 opOUT_C\r
8013 fetch 16\r
8014;@LDDR\r
8015opcode_ED_B8:\r
8016 copymem8HL_DE\r
8017 sub z80hl,z80hl,#1<<16\r
8018 sub z80de,z80de,#1<<16\r
8019 subs z80bc,z80bc,#1<<16\r
8020 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
8021 orrne z80f,z80f,#1<<VFlag\r
8022 subne z80pc,z80pc,#2\r
8023 subne z80_icount,z80_icount,#5\r
8024 fetch 16\r
8025\r
8026;@CPDR\r
8027opcode_ED_B9:\r
8028 readmem8HL\r
8029 sub z80hl,z80hl,#1<<16\r
8030 mov r1,z80a,lsl#4\r
8031 cmp z80a,r0,lsl#24\r
8032 and z80f,z80f,#1<<CFlag\r
8033 orr z80f,z80f,#1<<NFlag\r
8034 orrmi z80f,z80f,#1<<SFlag\r
8035 orreq z80f,z80f,#1<<ZFlag\r
8036 cmp r1,r0,lsl#28\r
8037 orrcc z80f,z80f,#1<<HFlag\r
8038 subs z80bc,z80bc,#1<<16\r
8039 bne opcode_ED_B9_decpc\r
8040 fetch 16\r
8041opcode_ED_B9_decpc:\r
8042 orr z80f,z80f,#1<<VFlag\r
8043 tst z80f,#1<<ZFlag\r
8044 subeq z80pc,z80pc,#2\r
8045 subeq z80_icount,z80_icount,#5\r
8046 fetch 16\r
8047;@INDR\r
8048opcode_ED_BA:\r
8049 opIN_C\r
8050 and z80f,r0,#0x80\r
8051 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8052;@ mov r1,z80bc,lsl#8\r
8053;@ sub r1,r1,#0x01000000\r
8054;@ adds r1,r1,r0,lsl#24\r
8055;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
8056 writemem8HL\r
8057 sub z80hl,z80hl,#1<<16\r
8058 sub z80bc,z80bc,#1<<24\r
8059 tst z80bc,#0xFF<<24\r
8060 orrmi z80f,z80f,#1<<SFlag\r
8061 orreq z80f,z80f,#1<<ZFlag\r
8062 subne z80pc,z80pc,#2\r
8063 subne z80_icount,z80_icount,#5\r
8064 fetch 16\r
8065;@OTDR\r
8066opcode_ED_BB:\r
8067 readmem8HL\r
8068 sub z80hl,z80hl,#1<<16\r
8069 and z80f,r0,#0x80\r
8070 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8071 mov r1,z80hl,lsl#8\r
8072 adds r1,r1,r0,lsl#24\r
8073 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8074 sub z80bc,z80bc,#1<<24\r
8075 tst z80bc,#0xFF<<24\r
8076 orrmi z80f,z80f,#1<<SFlag\r
8077 orreq z80f,z80f,#1<<ZFlag\r
8078 subne z80pc,z80pc,#2\r
8079 subne z80_icount,z80_icount,#5\r
8080 mov r1,r0\r
8081 opOUT_C\r
8082 fetch 16\r
8083;@##################################\r
8084;@##################################\r
8085;@### opcodes FD #########################\r
8086;@##################################\r
8087;@##################################\r
8088;@Since DD and FD opcodes are all the same apart from the address\r
8089;@register they use. When a FD intruction the program runs the code\r
8090;@from the DD location but the address of the IY reg is passed instead\r
8091;@of IX\r
8092\r
8093;@end_loop:\r
8094;@ b end_loop\r
8095\r
8096;@ vim:filetype=armasm\r
8097\r
fast MegaDrive/MegaCD/32X emulator