| 1 | #include <stdarg.h> |
| 2 | |
| 3 | #if (DRC_DEBUG & 1) |
| 4 | #define COUNT_OP \ |
| 5 | host_insn_count++ |
| 6 | #else |
| 7 | #define COUNT_OP |
| 8 | #endif |
| 9 | |
| 10 | // TODO: move |
| 11 | static int reg_map_g2h[] = { |
| 12 | -1, -1, -1, -1, |
| 13 | -1, -1, -1, -1, |
| 14 | -1, -1, -1, -1, |
| 15 | -1, -1, -1, -1, |
| 16 | -1, -1, -1, -1, |
| 17 | -1, -1, -1, -1, |
| 18 | }; |
| 19 | |
| 20 | enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; |
| 21 | |
| 22 | #define EMIT_PTR(ptr, val, type) \ |
| 23 | *(type *)(ptr) = val |
| 24 | |
| 25 | #define EMIT(val, type) { \ |
| 26 | EMIT_PTR(tcache_ptr, val, type); \ |
| 27 | tcache_ptr = (char *)tcache_ptr + sizeof(type); \ |
| 28 | } |
| 29 | |
| 30 | #define EMIT_OP(op) { \ |
| 31 | COUNT_OP; \ |
| 32 | EMIT(op, u8); \ |
| 33 | } |
| 34 | |
| 35 | #define EMIT_MODRM(mod,r,rm) \ |
| 36 | EMIT(((mod)<<6) | ((r)<<3) | (rm), u8) |
| 37 | |
| 38 | #define EMIT_OP_MODRM(op,mod,r,rm) { \ |
| 39 | EMIT_OP(op); \ |
| 40 | EMIT_MODRM(mod, r, rm); \ |
| 41 | } |
| 42 | |
| 43 | #define emith_move_r_r(dst, src) \ |
| 44 | EMIT_OP_MODRM(0x8b, 3, dst, src) |
| 45 | |
| 46 | #define emith_move_r_imm(r, imm) { \ |
| 47 | EMIT_OP(0xb8 + (r)); \ |
| 48 | EMIT(imm, u32); \ |
| 49 | } |
| 50 | |
| 51 | #define emith_add_r_imm(r, imm) { \ |
| 52 | EMIT_OP_MODRM(0x81, 3, 0, r); \ |
| 53 | EMIT(imm, u32); \ |
| 54 | } |
| 55 | |
| 56 | #define emith_sub_r_imm(r, imm) { \ |
| 57 | EMIT_OP_MODRM(0x81, 3, 5, r); \ |
| 58 | EMIT(imm, u32); \ |
| 59 | } |
| 60 | |
| 61 | // XXX: offs is 8bit only |
| 62 | #define emith_ctx_read(r, offs) { \ |
| 63 | EMIT_OP_MODRM(0x8b, 1, r, 5); \ |
| 64 | EMIT(offs, u8); /* mov tmp, [ebp+#offs] */ \ |
| 65 | } |
| 66 | |
| 67 | #define emith_ctx_write(r, offs) { \ |
| 68 | EMIT_OP_MODRM(0x89, 1, r, 5); \ |
| 69 | EMIT(offs, u8); /* mov [ebp+#offs], tmp */ \ |
| 70 | } |
| 71 | |
| 72 | #define emith_ctx_sub(val, offs) { \ |
| 73 | EMIT_OP_MODRM(0x81, 1, 5, 5); \ |
| 74 | EMIT(offs, u8); \ |
| 75 | EMIT(val, u32); /* sub [ebp+#offs], dword val */ \ |
| 76 | } |
| 77 | |
| 78 | #define emith_test_t() { \ |
| 79 | if (reg_map_g2h[SHR_SR] == -1) { \ |
| 80 | EMIT_OP_MODRM(0xf6, 1, 0, 5); \ |
| 81 | EMIT(SHR_SR * 4, u8); \ |
| 82 | EMIT(0x01, u8); /* test [ebp+SHR_SR], byte 1 */ \ |
| 83 | } else { \ |
| 84 | EMIT_OP_MODRM(0xf7, 3, 0, reg_map_g2h[SHR_SR]); \ |
| 85 | EMIT(0x01, u16); /* test <reg>, word 1 */ \ |
| 86 | } \ |
| 87 | } |
| 88 | |
| 89 | #define emith_jump(ptr) { \ |
| 90 | u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \ |
| 91 | EMIT_OP(0xe9); \ |
| 92 | EMIT(disp, u32); \ |
| 93 | } |
| 94 | |
| 95 | #define emith_call(ptr) { \ |
| 96 | u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \ |
| 97 | EMIT_OP(0xe8); \ |
| 98 | EMIT(disp, u32); \ |
| 99 | } |
| 100 | |
| 101 | #define EMIT_CONDITIONAL(code, is_nonzero) { \ |
| 102 | char *ptr = tcache_ptr; \ |
| 103 | tcache_ptr = (char *)tcache_ptr + 2; \ |
| 104 | code; \ |
| 105 | EMIT_PTR(ptr, ((is_nonzero) ? 0x75 : 0x74), u8); \ |
| 106 | EMIT_PTR(ptr + 1, ((char *)tcache_ptr - (ptr + 2)), u8); \ |
| 107 | } |
| 108 | |
| 109 | static void emith_pass_arg(int count, ...) |
| 110 | { |
| 111 | va_list vl; |
| 112 | int i; |
| 113 | |
| 114 | va_start(vl, count); |
| 115 | |
| 116 | for (i = 0; i < count; i++) { |
| 117 | long av = va_arg(vl, long); |
| 118 | int r = 7; |
| 119 | |
| 120 | switch (i) { |
| 121 | case 0: r = xAX; break; |
| 122 | case 1: r = xDX; break; |
| 123 | case 2: r = xCX; break; |
| 124 | } |
| 125 | emith_move_r_imm(r, av); |
| 126 | } |
| 127 | |
| 128 | va_end(vl); |
| 129 | } |
| 130 | |