| 1 | /* |
| 2 | * note: |
| 3 | * temp registers must be eax-edx due to use of SETcc. |
| 4 | * note about silly things like emith_eor_r_r_r: |
| 5 | * these are here because the compiler was designed |
| 6 | * for ARM as it's primary target. |
| 7 | */ |
| 8 | #include <stdarg.h> |
| 9 | |
| 10 | enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; |
| 11 | |
| 12 | #define CONTEXT_REG xBP |
| 13 | |
| 14 | #define ICOND_JO 0x00 |
| 15 | #define ICOND_JNO 0x01 |
| 16 | #define ICOND_JB 0x02 |
| 17 | #define ICOND_JAE 0x03 |
| 18 | #define ICOND_JE 0x04 |
| 19 | #define ICOND_JNE 0x05 |
| 20 | #define ICOND_JBE 0x06 |
| 21 | #define ICOND_JA 0x07 |
| 22 | #define ICOND_JS 0x08 |
| 23 | #define ICOND_JNS 0x09 |
| 24 | #define ICOND_JL 0x0c |
| 25 | #define ICOND_JGE 0x0d |
| 26 | #define ICOND_JLE 0x0e |
| 27 | #define ICOND_JG 0x0f |
| 28 | |
| 29 | #define IOP_JMP 0xeb |
| 30 | |
| 31 | // unified conditions (we just use rel8 jump instructions for x86) |
| 32 | #define DCOND_EQ ICOND_JE |
| 33 | #define DCOND_NE ICOND_JNE |
| 34 | #define DCOND_MI ICOND_JS // MInus |
| 35 | #define DCOND_PL ICOND_JNS // PLus or zero |
| 36 | #define DCOND_HI ICOND_JA // higher (unsigned) |
| 37 | #define DCOND_HS ICOND_JAE // higher || same (unsigned) |
| 38 | #define DCOND_LO ICOND_JB // lower (unsigned) |
| 39 | #define DCOND_LS ICOND_JBE // lower || same (unsigned) |
| 40 | #define DCOND_GE ICOND_JGE // greater || equal (signed) |
| 41 | #define DCOND_GT ICOND_JG // greater (signed) |
| 42 | #define DCOND_LE ICOND_JLE // less || equal (signed) |
| 43 | #define DCOND_LT ICOND_JL // less (signed) |
| 44 | #define DCOND_VS ICOND_JO // oVerflow Set |
| 45 | #define DCOND_VC ICOND_JNO // oVerflow Clear |
| 46 | |
| 47 | #define EMIT_PTR(ptr, val, type) \ |
| 48 | *(type *)(ptr) = val |
| 49 | |
| 50 | #define EMIT(val, type) { \ |
| 51 | EMIT_PTR(tcache_ptr, val, type); \ |
| 52 | tcache_ptr += sizeof(type); \ |
| 53 | } |
| 54 | |
| 55 | #define EMIT_OP(op) { \ |
| 56 | COUNT_OP; \ |
| 57 | EMIT(op, u8); \ |
| 58 | } |
| 59 | |
| 60 | #define EMIT_MODRM(mod,r,rm) \ |
| 61 | EMIT(((mod)<<6) | ((r)<<3) | (rm), u8) |
| 62 | |
| 63 | #define EMIT_SIB(scale,index,base) \ |
| 64 | EMIT(((scale)<<6) | ((index)<<3) | (base), u8) |
| 65 | |
| 66 | #define EMIT_OP_MODRM(op,mod,r,rm) { \ |
| 67 | EMIT_OP(op); \ |
| 68 | EMIT_MODRM(mod, r, rm); \ |
| 69 | } |
| 70 | |
| 71 | #define JMP8_POS(ptr) \ |
| 72 | ptr = tcache_ptr; \ |
| 73 | tcache_ptr += 2 |
| 74 | |
| 75 | #define JMP8_EMIT(op, ptr) \ |
| 76 | EMIT_PTR(ptr, 0x70|(op), u8); \ |
| 77 | EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8) |
| 78 | |
| 79 | #define JMP8_EMIT_NC(ptr) \ |
| 80 | EMIT_PTR(ptr, IOP_JMP, u8); \ |
| 81 | EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8) |
| 82 | |
| 83 | // _r_r |
| 84 | #define emith_move_r_r(dst, src) \ |
| 85 | EMIT_OP_MODRM(0x8b, 3, dst, src) |
| 86 | |
| 87 | #define emith_add_r_r(d, s) \ |
| 88 | EMIT_OP_MODRM(0x01, 3, s, d) |
| 89 | |
| 90 | #define emith_sub_r_r(d, s) \ |
| 91 | EMIT_OP_MODRM(0x29, 3, s, d) |
| 92 | |
| 93 | #define emith_adc_r_r(d, s) \ |
| 94 | EMIT_OP_MODRM(0x11, 3, s, d) |
| 95 | |
| 96 | #define emith_sbc_r_r(d, s) \ |
| 97 | EMIT_OP_MODRM(0x19, 3, s, d) /* SBB */ |
| 98 | |
| 99 | #define emith_or_r_r(d, s) \ |
| 100 | EMIT_OP_MODRM(0x09, 3, s, d) |
| 101 | |
| 102 | #define emith_and_r_r(d, s) \ |
| 103 | EMIT_OP_MODRM(0x21, 3, s, d) |
| 104 | |
| 105 | #define emith_eor_r_r(d, s) \ |
| 106 | EMIT_OP_MODRM(0x31, 3, s, d) /* XOR */ |
| 107 | |
| 108 | #define emith_tst_r_r(d, s) \ |
| 109 | EMIT_OP_MODRM(0x85, 3, s, d) /* TEST */ |
| 110 | |
| 111 | #define emith_cmp_r_r(d, s) \ |
| 112 | EMIT_OP_MODRM(0x39, 3, s, d) |
| 113 | |
| 114 | // fake teq - test equivalence - get_flags(d ^ s) |
| 115 | #define emith_teq_r_r(d, s) { \ |
| 116 | emith_push(d); \ |
| 117 | emith_eor_r_r(d, s); \ |
| 118 | emith_pop(d); \ |
| 119 | } |
| 120 | |
| 121 | #define emith_mvn_r_r(d, s) { \ |
| 122 | if (d != s) \ |
| 123 | emith_move_r_r(d, s); \ |
| 124 | EMIT_OP_MODRM(0xf7, 3, 2, d); /* NOT d */ \ |
| 125 | } |
| 126 | |
| 127 | #define emith_negc_r_r(d, s) { \ |
| 128 | int tmp_ = rcache_get_tmp(); \ |
| 129 | emith_move_r_imm(tmp_, 0); \ |
| 130 | emith_sbc_r_r(tmp_, s); \ |
| 131 | emith_move_r_r(d, tmp_); \ |
| 132 | rcache_free_tmp(tmp_); \ |
| 133 | } |
| 134 | |
| 135 | #define emith_neg_r_r(d, s) { \ |
| 136 | if (d != s) \ |
| 137 | emith_move_r_r(d, s); \ |
| 138 | EMIT_OP_MODRM(0xf7, 3, 3, d); /* NEG d */ \ |
| 139 | } |
| 140 | |
| 141 | // _r_r_r |
| 142 | #define emith_eor_r_r_r(d, s1, s2) { \ |
| 143 | if (d == s1) { \ |
| 144 | emith_eor_r_r(d, s2); \ |
| 145 | } else if (d == s2) { \ |
| 146 | emith_eor_r_r(d, s1); \ |
| 147 | } else { \ |
| 148 | emith_move_r_r(d, s1); \ |
| 149 | emith_eor_r_r(d, s2); \ |
| 150 | } \ |
| 151 | } |
| 152 | |
| 153 | // _r_r_shift |
| 154 | #define emith_or_r_r_lsl(d, s, lslimm) { \ |
| 155 | int tmp_ = rcache_get_tmp(); \ |
| 156 | emith_lsl(tmp_, s, lslimm); \ |
| 157 | emith_or_r_r(d, tmp_); \ |
| 158 | rcache_free_tmp(tmp_); \ |
| 159 | } |
| 160 | |
| 161 | // d != s |
| 162 | #define emith_eor_r_r_lsr(d, s, lsrimm) { \ |
| 163 | emith_push(s); \ |
| 164 | emith_lsr(s, s, lsrimm); \ |
| 165 | emith_eor_r_r(d, s); \ |
| 166 | emith_pop(s); \ |
| 167 | } |
| 168 | |
| 169 | // _r_imm |
| 170 | #define emith_move_r_imm(r, imm) { \ |
| 171 | EMIT_OP(0xb8 + (r)); \ |
| 172 | EMIT(imm, u32); \ |
| 173 | } |
| 174 | |
| 175 | #define emith_move_r_imm_s8(r, imm) \ |
| 176 | emith_move_r_imm(r, (u32)(signed int)(signed char)(imm)) |
| 177 | |
| 178 | #define emith_arith_r_imm(op, r, imm) do { \ |
| 179 | EMIT_OP_MODRM(0x81, 3, op, r); \ |
| 180 | EMIT(imm, u32); \ |
| 181 | } while (0) |
| 182 | |
| 183 | // 2 - adc, 3 - sbb |
| 184 | #define emith_add_r_imm(r, imm) \ |
| 185 | emith_arith_r_imm(0, r, imm) |
| 186 | |
| 187 | #define emith_or_r_imm(r, imm) \ |
| 188 | emith_arith_r_imm(1, r, imm) |
| 189 | |
| 190 | #define emith_and_r_imm(r, imm) \ |
| 191 | emith_arith_r_imm(4, r, imm) |
| 192 | |
| 193 | #define emith_sub_r_imm(r, imm) \ |
| 194 | emith_arith_r_imm(5, r, imm) |
| 195 | |
| 196 | #define emith_eor_r_imm(r, imm) \ |
| 197 | emith_arith_r_imm(6, r, imm) |
| 198 | |
| 199 | #define emith_cmp_r_imm(r, imm) \ |
| 200 | emith_arith_r_imm(7, r, imm) |
| 201 | |
| 202 | #define emith_tst_r_imm(r, imm) do { \ |
| 203 | EMIT_OP_MODRM(0xf7, 3, 0, r); \ |
| 204 | EMIT(imm, u32); \ |
| 205 | } while (0) |
| 206 | |
| 207 | // fake |
| 208 | #define emith_bic_r_imm(r, imm) \ |
| 209 | emith_arith_r_imm(4, r, ~(imm)) |
| 210 | |
| 211 | // fake conditionals (using SJMP instead) |
| 212 | #define emith_move_r_imm_c(cond, r, imm) { \ |
| 213 | (void)(cond); \ |
| 214 | emith_move_r_imm(r, imm); \ |
| 215 | } |
| 216 | |
| 217 | #define emith_add_r_imm_c(cond, r, imm) { \ |
| 218 | (void)(cond); \ |
| 219 | emith_add_r_imm(r, imm); \ |
| 220 | } |
| 221 | |
| 222 | #define emith_or_r_imm_c(cond, r, imm) { \ |
| 223 | (void)(cond); \ |
| 224 | emith_or_r_imm(r, imm); \ |
| 225 | } |
| 226 | |
| 227 | #define emith_eor_r_imm_c(cond, r, imm) { \ |
| 228 | (void)(cond); \ |
| 229 | emith_eor_r_imm(r, imm); \ |
| 230 | } |
| 231 | |
| 232 | #define emith_sub_r_imm_c(cond, r, imm) { \ |
| 233 | (void)(cond); \ |
| 234 | emith_sub_r_imm(r, imm); \ |
| 235 | } |
| 236 | |
| 237 | #define emith_bic_r_imm_c(cond, r, imm) { \ |
| 238 | (void)(cond); \ |
| 239 | emith_bic_r_imm(r, imm); \ |
| 240 | } |
| 241 | |
| 242 | // _r_r_imm |
| 243 | #define emith_and_r_r_imm(d, s, imm) { \ |
| 244 | if (d != s) \ |
| 245 | emith_move_r_r(d, s); \ |
| 246 | emith_and_r_imm(d, imm); \ |
| 247 | } |
| 248 | |
| 249 | // shift |
| 250 | #define emith_shift(op, d, s, cnt) { \ |
| 251 | if (d != s) \ |
| 252 | emith_move_r_r(d, s); \ |
| 253 | EMIT_OP_MODRM(0xc1, 3, op, d); \ |
| 254 | EMIT(cnt, u8); \ |
| 255 | } |
| 256 | |
| 257 | #define emith_lsl(d, s, cnt) \ |
| 258 | emith_shift(4, d, s, cnt) |
| 259 | |
| 260 | #define emith_lsr(d, s, cnt) \ |
| 261 | emith_shift(5, d, s, cnt) |
| 262 | |
| 263 | #define emith_asr(d, s, cnt) \ |
| 264 | emith_shift(7, d, s, cnt) |
| 265 | |
| 266 | #define emith_rol(d, s, cnt) \ |
| 267 | emith_shift(0, d, s, cnt) |
| 268 | |
| 269 | #define emith_ror(d, s, cnt) \ |
| 270 | emith_shift(1, d, s, cnt) |
| 271 | |
| 272 | #define emith_rolc(r) \ |
| 273 | EMIT_OP_MODRM(0xd1, 3, 2, r) |
| 274 | |
| 275 | #define emith_rorc(r) \ |
| 276 | EMIT_OP_MODRM(0xd1, 3, 3, r) |
| 277 | |
| 278 | // misc |
| 279 | #define emith_push(r) \ |
| 280 | EMIT_OP(0x50 + (r)) |
| 281 | |
| 282 | #define emith_pop(r) \ |
| 283 | EMIT_OP(0x58 + (r)) |
| 284 | |
| 285 | #define emith_neg_r(r) \ |
| 286 | EMIT_OP_MODRM(0xf7, 3, 3, r) |
| 287 | |
| 288 | #define emith_clear_msb(d, s, count) { \ |
| 289 | u32 t = (u32)-1; \ |
| 290 | t >>= count; \ |
| 291 | if (d != s) \ |
| 292 | emith_move_r_r(d, s); \ |
| 293 | emith_and_r_imm(d, t); \ |
| 294 | } |
| 295 | |
| 296 | #define emith_clear_msb_c(cond, d, s, count) { \ |
| 297 | (void)(cond); \ |
| 298 | emith_clear_msb(d, s, count); \ |
| 299 | } |
| 300 | |
| 301 | #define emith_sext(d, s, bits) { \ |
| 302 | emith_lsl(d, s, 32 - (bits)); \ |
| 303 | emith_asr(d, d, 32 - (bits)); \ |
| 304 | } |
| 305 | |
| 306 | #define emith_setc(r) { \ |
| 307 | EMIT_OP(0x0f); \ |
| 308 | EMIT_OP_MODRM(0x92, 3, 0, r); /* SETC r */ \ |
| 309 | } |
| 310 | |
| 311 | // XXX: stupid mess |
| 312 | #define emith_mul_(op, dlo, dhi, s1, s2) { \ |
| 313 | int rmr; \ |
| 314 | if (dlo != xAX && dhi != xAX) \ |
| 315 | emith_push(xAX); \ |
| 316 | if (dlo != xDX && dhi != xDX) \ |
| 317 | emith_push(xDX); \ |
| 318 | if ((s1) == xAX) \ |
| 319 | rmr = s2; \ |
| 320 | else if ((s2) == xAX) \ |
| 321 | rmr = s1; \ |
| 322 | else { \ |
| 323 | emith_move_r_r(xAX, s1); \ |
| 324 | rmr = s2; \ |
| 325 | } \ |
| 326 | EMIT_OP_MODRM(0xf7, 3, op, rmr); /* xMUL rmr */ \ |
| 327 | /* XXX: using push/pop for the case of edx->eax; eax->edx */ \ |
| 328 | if (dhi != xDX && dhi != -1) \ |
| 329 | emith_push(xDX); \ |
| 330 | if (dlo != xAX) \ |
| 331 | emith_move_r_r(dlo, xAX); \ |
| 332 | if (dhi != xDX && dhi != -1) \ |
| 333 | emith_pop(dhi); \ |
| 334 | if (dlo != xDX && dhi != xDX) \ |
| 335 | emith_pop(xDX); \ |
| 336 | if (dlo != xAX && dhi != xAX) \ |
| 337 | emith_pop(xAX); \ |
| 338 | } |
| 339 | |
| 340 | #define emith_mul_u64(dlo, dhi, s1, s2) \ |
| 341 | emith_mul_(4, dlo, dhi, s1, s2) /* MUL */ |
| 342 | |
| 343 | #define emith_mul_s64(dlo, dhi, s1, s2) \ |
| 344 | emith_mul_(5, dlo, dhi, s1, s2) /* IMUL */ |
| 345 | |
| 346 | #define emith_mul(d, s1, s2) \ |
| 347 | emith_mul_(4, d, -1, s1, s2) |
| 348 | |
| 349 | // (dlo,dhi) += signed(s1) * signed(s2) |
| 350 | #define emith_mula_s64(dlo, dhi, s1, s2) { \ |
| 351 | emith_push(dhi); \ |
| 352 | emith_push(dlo); \ |
| 353 | emith_mul_(5, dlo, dhi, s1, s2); \ |
| 354 | EMIT_OP_MODRM(0x03, 0, dlo, 4); \ |
| 355 | EMIT_SIB(0, 4, 4); /* add dlo, [esp] */ \ |
| 356 | EMIT_OP_MODRM(0x13, 1, dhi, 4); \ |
| 357 | EMIT_SIB(0, 4, 4); \ |
| 358 | EMIT(4, u8); /* adc dhi, [esp+4] */ \ |
| 359 | emith_add_r_imm(xSP, 4*2); \ |
| 360 | } |
| 361 | |
| 362 | // "flag" instructions are the same |
| 363 | #define emith_subf_r_imm emith_sub_r_imm |
| 364 | #define emith_addf_r_r emith_add_r_r |
| 365 | #define emith_subf_r_r emith_sub_r_r |
| 366 | #define emith_adcf_r_r emith_adc_r_r |
| 367 | #define emith_sbcf_r_r emith_sbc_r_r |
| 368 | #define emith_eorf_r_r emith_eor_r_r |
| 369 | #define emith_negcf_r_r emith_negc_r_r |
| 370 | |
| 371 | #define emith_lslf emith_lsl |
| 372 | #define emith_lsrf emith_lsr |
| 373 | #define emith_asrf emith_asr |
| 374 | #define emith_rolf emith_rol |
| 375 | #define emith_rorf emith_ror |
| 376 | #define emith_rolcf emith_rolc |
| 377 | #define emith_rorcf emith_rorc |
| 378 | |
| 379 | // XXX: offs is 8bit only |
| 380 | #define emith_ctx_read(r, offs) do { \ |
| 381 | EMIT_OP_MODRM(0x8b, 1, r, xBP); \ |
| 382 | EMIT(offs, u8); /* mov tmp, [ebp+#offs] */ \ |
| 383 | } while (0) |
| 384 | |
| 385 | #define emith_ctx_read_multiple(r, offs, cnt, tmpr) do { \ |
| 386 | int r_ = r, offs_ = offs, cnt_ = cnt; \ |
| 387 | for (; cnt_ > 0; r_++, offs_ += 4, cnt_--) \ |
| 388 | emith_ctx_read(r_, offs_); \ |
| 389 | } while (0) |
| 390 | |
| 391 | #define emith_ctx_write(r, offs) do { \ |
| 392 | EMIT_OP_MODRM(0x89, 1, r, xBP); \ |
| 393 | EMIT(offs, u8); /* mov [ebp+#offs], tmp */ \ |
| 394 | } while (0) |
| 395 | |
| 396 | #define emith_ctx_write_multiple(r, offs, cnt, tmpr) do { \ |
| 397 | int r_ = r, offs_ = offs, cnt_ = cnt; \ |
| 398 | for (; cnt_ > 0; r_++, offs_ += 4, cnt_--) \ |
| 399 | emith_ctx_write(r_, offs_); \ |
| 400 | } while (0) |
| 401 | |
| 402 | #define emith_jump(ptr) { \ |
| 403 | u32 disp = (u32)(ptr) - ((u32)tcache_ptr + 5); \ |
| 404 | EMIT_OP(0xe9); \ |
| 405 | EMIT(disp, u32); \ |
| 406 | } |
| 407 | |
| 408 | #define emith_jump_cond(cond, ptr) { \ |
| 409 | u32 disp = (u32)(ptr) - ((u32)tcache_ptr + 6); \ |
| 410 | EMIT(0x0f, u8); \ |
| 411 | EMIT_OP(0x80 | (cond)); \ |
| 412 | EMIT(disp, u32); \ |
| 413 | } |
| 414 | |
| 415 | #define emith_jump_patchable(cond) \ |
| 416 | emith_jump_cond(cond, 0) |
| 417 | |
| 418 | #define emith_jump_patch(ptr, target) do { \ |
| 419 | u32 disp = (u32)(target) - ((u32)(ptr) + 6); \ |
| 420 | EMIT_PTR((u8 *)(ptr) + 2, disp, u32); \ |
| 421 | } while (0) |
| 422 | |
| 423 | #define emith_call(ptr) { \ |
| 424 | u32 disp = (u32)(ptr) - ((u32)tcache_ptr + 5); \ |
| 425 | EMIT_OP(0xe8); \ |
| 426 | EMIT(disp, u32); \ |
| 427 | } |
| 428 | |
| 429 | #define emith_call_cond(cond, ptr) \ |
| 430 | emith_call(ptr) |
| 431 | |
| 432 | #define emith_jump_reg(r) \ |
| 433 | EMIT_OP_MODRM(0xff, 3, 4, r) |
| 434 | |
| 435 | #define EMITH_JMP_START(cond) { \ |
| 436 | u8 *cond_ptr; \ |
| 437 | JMP8_POS(cond_ptr) |
| 438 | |
| 439 | #define EMITH_JMP_END(cond) \ |
| 440 | JMP8_EMIT(cond, cond_ptr); \ |
| 441 | } |
| 442 | |
| 443 | // "simple" jump (no more then a few insns) |
| 444 | #define EMITH_SJMP_START EMITH_JMP_START |
| 445 | #define EMITH_SJMP_END EMITH_JMP_END |
| 446 | |
| 447 | #define host_arg2reg(rd, arg) \ |
| 448 | switch (arg) { \ |
| 449 | case 0: rd = xAX; break; \ |
| 450 | case 1: rd = xDX; break; \ |
| 451 | case 2: rd = xCX; break; \ |
| 452 | } |
| 453 | |
| 454 | #define emith_pass_arg_r(arg, reg) { \ |
| 455 | int rd = 7; \ |
| 456 | host_arg2reg(rd, arg); \ |
| 457 | emith_move_r_r(rd, reg); \ |
| 458 | } |
| 459 | |
| 460 | #define emith_pass_arg_imm(arg, imm) { \ |
| 461 | int rd = 7; \ |
| 462 | host_arg2reg(rd, arg); \ |
| 463 | emith_move_r_imm(rd, imm); \ |
| 464 | } |
| 465 | |
| 466 | /* SH2 drc specific */ |
| 467 | #define emith_sh2_drc_entry() { \ |
| 468 | emith_push(xBX); \ |
| 469 | emith_push(xBP); \ |
| 470 | emith_push(xSI); \ |
| 471 | emith_push(xDI); \ |
| 472 | } |
| 473 | |
| 474 | #define emith_sh2_drc_exit() { \ |
| 475 | emith_pop(xDI); \ |
| 476 | emith_pop(xSI); \ |
| 477 | emith_pop(xBP); \ |
| 478 | emith_pop(xBX); \ |
| 479 | EMIT_OP(0xc3); /* ret */\ |
| 480 | } |
| 481 | |
| 482 | #define emith_sh2_dtbf_loop() { \ |
| 483 | u8 *jmp0; /* negative cycles check */ \ |
| 484 | u8 *jmp1; /* unsinged overflow check */ \ |
| 485 | int cr, rn; \ |
| 486 | int tmp_ = rcache_get_tmp(); \ |
| 487 | cr = rcache_get_reg(SHR_SR, RC_GR_RMW); \ |
| 488 | rn = rcache_get_reg((op >> 8) & 0x0f, RC_GR_RMW);\ |
| 489 | emith_sub_r_imm(rn, 1); \ |
| 490 | emith_sub_r_imm(cr, (cycles+1) << 12); \ |
| 491 | cycles = 0; \ |
| 492 | emith_asr(tmp_, cr, 2+12); \ |
| 493 | JMP8_POS(jmp0); /* no negative cycles */ \ |
| 494 | emith_move_r_imm(tmp_, 0); \ |
| 495 | JMP8_EMIT(ICOND_JNS, jmp0); \ |
| 496 | emith_and_r_imm(cr, 0xffe); \ |
| 497 | emith_subf_r_r(rn, tmp_); \ |
| 498 | JMP8_POS(jmp1); /* no overflow */ \ |
| 499 | emith_neg_r(rn); /* count left */ \ |
| 500 | emith_lsl(rn, rn, 2+12); \ |
| 501 | emith_or_r_r(cr, rn); \ |
| 502 | emith_or_r_imm(cr, 1); \ |
| 503 | emith_move_r_imm(rn, 0); \ |
| 504 | JMP8_EMIT(ICOND_JA, jmp1); \ |
| 505 | rcache_free_tmp(tmp_); \ |
| 506 | } |
| 507 | |
| 508 | #define emith_write_sr(sr, srcr) { \ |
| 509 | int tmp_ = rcache_get_tmp(); \ |
| 510 | emith_clear_msb(tmp_, srcr, 22); \ |
| 511 | emith_bic_r_imm(sr, 0x3ff); \ |
| 512 | emith_or_r_r(sr, tmp_); \ |
| 513 | rcache_free_tmp(tmp_); \ |
| 514 | } |
| 515 | |
| 516 | #define emith_tpop_carry(sr, is_sub) \ |
| 517 | emith_lsr(sr, sr, 1) |
| 518 | |
| 519 | #define emith_tpush_carry(sr, is_sub) \ |
| 520 | emith_adc_r_r(sr, sr) |
| 521 | |
| 522 | /* |
| 523 | * if Q |
| 524 | * t = carry(Rn += Rm) |
| 525 | * else |
| 526 | * t = carry(Rn -= Rm) |
| 527 | * T ^= t |
| 528 | */ |
| 529 | #define emith_sh2_div1_step(rn, rm, sr) { \ |
| 530 | u8 *jmp0, *jmp1; \ |
| 531 | int tmp_ = rcache_get_tmp(); \ |
| 532 | emith_eor_r_r(tmp_, tmp_); \ |
| 533 | emith_tst_r_imm(sr, Q); /* if (Q ^ M) */ \ |
| 534 | JMP8_POS(jmp0); /* je do_sub */ \ |
| 535 | emith_add_r_r(rn, rm); \ |
| 536 | JMP8_POS(jmp1); /* jmp done */ \ |
| 537 | JMP8_EMIT(ICOND_JE, jmp0); /* do_sub: */ \ |
| 538 | emith_sub_r_r(rn, rm); \ |
| 539 | JMP8_EMIT_NC(jmp1); /* done: */ \ |
| 540 | emith_setc(tmp_); \ |
| 541 | EMIT_OP_MODRM(0x31, 3, tmp_, sr); /* T = Q1 ^ Q2 */ \ |
| 542 | rcache_free_tmp(tmp_); \ |
| 543 | } |
| 544 | |