| | 1 | /* |
| | 2 | * Basic macros to emit x86 instructions and some utils |
| | 3 | * Copyright (C) 2008,2009,2010 notaz |
| | 4 | * |
| | 5 | * This work is licensed under the terms of MAME license. |
| | 6 | * See COPYING file in the top-level directory. |
| | 7 | * |
| | 8 | * note: |
| | 9 | * temp registers must be eax-edx due to use of SETcc and r/w 8/16. |
| | 10 | * note about silly things like emith_eor_r_r_r: |
| | 11 | * these are here because the compiler was designed |
| | 12 | * for ARM as it's primary target. |
| | 13 | */ |
| | 14 | #include <stdarg.h> |
| | 15 | |
| | 16 | enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; |
| | 17 | |
| | 18 | #define CONTEXT_REG xBP |
| | 19 | #define RET_REG xAX |
| | 20 | |
| | 21 | #define ICOND_JO 0x00 |
| | 22 | #define ICOND_JNO 0x01 |
| | 23 | #define ICOND_JB 0x02 |
| | 24 | #define ICOND_JAE 0x03 |
| | 25 | #define ICOND_JE 0x04 |
| | 26 | #define ICOND_JNE 0x05 |
| | 27 | #define ICOND_JBE 0x06 |
| | 28 | #define ICOND_JA 0x07 |
| | 29 | #define ICOND_JS 0x08 |
| | 30 | #define ICOND_JNS 0x09 |
| | 31 | #define ICOND_JL 0x0c |
| | 32 | #define ICOND_JGE 0x0d |
| | 33 | #define ICOND_JLE 0x0e |
| | 34 | #define ICOND_JG 0x0f |
| | 35 | |
| | 36 | #define IOP_JMP 0xeb |
| | 37 | |
| | 38 | // unified conditions (we just use rel8 jump instructions for x86) |
| | 39 | #define DCOND_EQ ICOND_JE |
| | 40 | #define DCOND_NE ICOND_JNE |
| | 41 | #define DCOND_MI ICOND_JS // MInus |
| | 42 | #define DCOND_PL ICOND_JNS // PLus or zero |
| | 43 | #define DCOND_HI ICOND_JA // higher (unsigned) |
| | 44 | #define DCOND_HS ICOND_JAE // higher || same (unsigned) |
| | 45 | #define DCOND_LO ICOND_JB // lower (unsigned) |
| | 46 | #define DCOND_LS ICOND_JBE // lower || same (unsigned) |
| | 47 | #define DCOND_GE ICOND_JGE // greater || equal (signed) |
| | 48 | #define DCOND_GT ICOND_JG // greater (signed) |
| | 49 | #define DCOND_LE ICOND_JLE // less || equal (signed) |
| | 50 | #define DCOND_LT ICOND_JL // less (signed) |
| | 51 | #define DCOND_VS ICOND_JO // oVerflow Set |
| | 52 | #define DCOND_VC ICOND_JNO // oVerflow Clear |
| | 53 | |
| | 54 | #define EMIT_PTR(ptr, val, type) \ |
| | 55 | *(type *)(ptr) = val |
| | 56 | |
| | 57 | #define EMIT(val, type) do { \ |
| | 58 | EMIT_PTR(tcache_ptr, val, type); \ |
| | 59 | tcache_ptr += sizeof(type); \ |
| | 60 | } while (0) |
| | 61 | |
| | 62 | #define EMIT_OP(op) do { \ |
| | 63 | COUNT_OP; \ |
| | 64 | EMIT(op, u8); \ |
| | 65 | } while (0) |
| | 66 | |
| | 67 | #define EMIT_MODRM(mod, r, rm) do { \ |
| | 68 | assert((mod) < 4u); \ |
| | 69 | assert((r) < 8u); \ |
| | 70 | assert((rm) < 8u); \ |
| | 71 | EMIT(((mod)<<6) | ((r)<<3) | (rm), u8); \ |
| | 72 | } while (0) |
| | 73 | |
| | 74 | #define EMIT_SIB(scale, index, base) do { \ |
| | 75 | assert((scale) < 4u); \ |
| | 76 | assert((index) < 8u); \ |
| | 77 | assert((base) < 8u); \ |
| | 78 | EMIT(((scale)<<6) | ((index)<<3) | (base), u8); \ |
| | 79 | } while (0) |
| | 80 | |
| | 81 | #define EMIT_SIB64(scale, index, base) \ |
| | 82 | EMIT_SIB(scale, (index) & ~8u, (base) & ~8u) |
| | 83 | |
| | 84 | #define EMIT_REX(w,r,x,b) \ |
| | 85 | EMIT(0x40 | ((w)<<3) | ((r)<<2) | ((x)<<1) | (b), u8) |
| | 86 | |
| | 87 | #define EMIT_OP_MODRM(op,mod,r,rm) do { \ |
| | 88 | EMIT_OP(op); \ |
| | 89 | EMIT_MODRM(mod, (r), rm); \ |
| | 90 | } while (0) |
| | 91 | |
| | 92 | // 64bit friendly, rm when everything is converted |
| | 93 | #define EMIT_OP_MODRM64(op, mod, r, rm) \ |
| | 94 | EMIT_OP_MODRM(op, mod, (r) & ~8u, (rm) & ~8u) |
| | 95 | |
| | 96 | #define JMP8_POS(ptr) \ |
| | 97 | ptr = tcache_ptr; \ |
| | 98 | tcache_ptr += 2 |
| | 99 | |
| | 100 | #define JMP8_EMIT(op, ptr) \ |
| | 101 | EMIT_PTR(ptr, 0x70|(op), u8); \ |
| | 102 | EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8) |
| | 103 | |
| | 104 | #define JMP8_EMIT_NC(ptr) \ |
| | 105 | EMIT_PTR(ptr, IOP_JMP, u8); \ |
| | 106 | EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8) |
| | 107 | |
| | 108 | // _r_r |
| | 109 | #define emith_move_r_r(dst, src) \ |
| | 110 | EMIT_OP_MODRM(0x8b, 3, dst, src) |
| | 111 | |
| | 112 | #define emith_move_r_r_ptr(dst, src) do { \ |
| | 113 | EMIT_REX_IF(1, dst, src); \ |
| | 114 | EMIT_OP_MODRM64(0x8b, 3, dst, src); \ |
| | 115 | } while (0) |
| | 116 | |
| | 117 | #define emith_add_r_r(d, s) \ |
| | 118 | EMIT_OP_MODRM(0x01, 3, s, d) |
| | 119 | |
| | 120 | #define emith_sub_r_r(d, s) \ |
| | 121 | EMIT_OP_MODRM(0x29, 3, s, d) |
| | 122 | |
| | 123 | #define emith_adc_r_r(d, s) \ |
| | 124 | EMIT_OP_MODRM(0x11, 3, s, d) |
| | 125 | |
| | 126 | #define emith_sbc_r_r(d, s) \ |
| | 127 | EMIT_OP_MODRM(0x19, 3, s, d) /* SBB */ |
| | 128 | |
| | 129 | #define emith_or_r_r(d, s) \ |
| | 130 | EMIT_OP_MODRM(0x09, 3, s, d) |
| | 131 | |
| | 132 | #define emith_and_r_r(d, s) \ |
| | 133 | EMIT_OP_MODRM(0x21, 3, s, d) |
| | 134 | |
| | 135 | #define emith_eor_r_r(d, s) \ |
| | 136 | EMIT_OP_MODRM(0x31, 3, s, d) /* XOR */ |
| | 137 | |
| | 138 | #define emith_tst_r_r(d, s) \ |
| | 139 | EMIT_OP_MODRM(0x85, 3, s, d) /* TEST */ |
| | 140 | |
| | 141 | #define emith_tst_r_r_ptr(d, s) do { \ |
| | 142 | EMIT_REX_IF(1, s, d); \ |
| | 143 | EMIT_OP_MODRM64(0x85, 3, s, d); /* TEST */ \ |
| | 144 | } while (0) |
| | 145 | |
| | 146 | #define emith_cmp_r_r(d, s) \ |
| | 147 | EMIT_OP_MODRM(0x39, 3, s, d) |
| | 148 | |
| | 149 | // fake teq - test equivalence - get_flags(d ^ s) |
| | 150 | #define emith_teq_r_r(d, s) do { \ |
| | 151 | emith_push(d); \ |
| | 152 | emith_eor_r_r(d, s); \ |
| | 153 | emith_pop(d); \ |
| | 154 | } while (0) |
| | 155 | |
| | 156 | #define emith_mvn_r_r(d, s) do { \ |
| | 157 | if (d != s) \ |
| | 158 | emith_move_r_r(d, s); \ |
| | 159 | EMIT_OP_MODRM(0xf7, 3, 2, d); /* NOT d */ \ |
| | 160 | } while (0) |
| | 161 | |
| | 162 | #define emith_negc_r_r(d, s) do { \ |
| | 163 | int tmp_ = rcache_get_tmp(); \ |
| | 164 | emith_move_r_imm(tmp_, 0); \ |
| | 165 | emith_sbc_r_r(tmp_, s); \ |
| | 166 | emith_move_r_r(d, tmp_); \ |
| | 167 | rcache_free_tmp(tmp_); \ |
| | 168 | } while (0) |
| | 169 | |
| | 170 | #define emith_neg_r_r(d, s) do { \ |
| | 171 | if (d != s) \ |
| | 172 | emith_move_r_r(d, s); \ |
| | 173 | EMIT_OP_MODRM(0xf7, 3, 3, d); /* NEG d */ \ |
| | 174 | } while (0) |
| | 175 | |
| | 176 | // _r_r_r |
| | 177 | #define emith_add_r_r_r(d, s1, s2) do { \ |
| | 178 | if (d == s1) { \ |
| | 179 | emith_add_r_r(d, s2); \ |
| | 180 | } else if (d == s2) { \ |
| | 181 | emith_add_r_r(d, s1); \ |
| | 182 | } else { \ |
| | 183 | emith_move_r_r(d, s1); \ |
| | 184 | emith_add_r_r(d, s2); \ |
| | 185 | } \ |
| | 186 | } while (0) |
| | 187 | |
| | 188 | #define emith_eor_r_r_r(d, s1, s2) do { \ |
| | 189 | if (d == s1) { \ |
| | 190 | emith_eor_r_r(d, s2); \ |
| | 191 | } else if (d == s2) { \ |
| | 192 | emith_eor_r_r(d, s1); \ |
| | 193 | } else { \ |
| | 194 | emith_move_r_r(d, s1); \ |
| | 195 | emith_eor_r_r(d, s2); \ |
| | 196 | } \ |
| | 197 | } while (0) |
| | 198 | |
| | 199 | // _r_r_shift |
| | 200 | #define emith_or_r_r_lsl(d, s, lslimm) do { \ |
| | 201 | int tmp_ = rcache_get_tmp(); \ |
| | 202 | emith_lsl(tmp_, s, lslimm); \ |
| | 203 | emith_or_r_r(d, tmp_); \ |
| | 204 | rcache_free_tmp(tmp_); \ |
| | 205 | } while (0) |
| | 206 | |
| | 207 | // d != s |
| | 208 | #define emith_eor_r_r_lsr(d, s, lsrimm) do { \ |
| | 209 | emith_push(s); \ |
| | 210 | emith_lsr(s, s, lsrimm); \ |
| | 211 | emith_eor_r_r(d, s); \ |
| | 212 | emith_pop(s); \ |
| | 213 | } while (0) |
| | 214 | |
| | 215 | // _r_imm |
| | 216 | #define emith_move_r_imm(r, imm) do { \ |
| | 217 | EMIT_OP(0xb8 + (r)); \ |
| | 218 | EMIT(imm, u32); \ |
| | 219 | } while (0) |
| | 220 | |
| | 221 | #define emith_move_r_imm_s8(r, imm) \ |
| | 222 | emith_move_r_imm(r, (u32)(signed int)(signed char)(imm)) |
| | 223 | |
| | 224 | #define emith_arith_r_imm(op, r, imm) do { \ |
| | 225 | EMIT_OP_MODRM(0x81, 3, op, r); \ |
| | 226 | EMIT(imm, u32); \ |
| | 227 | } while (0) |
| | 228 | |
| | 229 | #define emith_add_r_imm(r, imm) \ |
| | 230 | emith_arith_r_imm(0, r, imm) |
| | 231 | |
| | 232 | #define emith_or_r_imm(r, imm) \ |
| | 233 | emith_arith_r_imm(1, r, imm) |
| | 234 | |
| | 235 | #define emith_adc_r_imm(r, imm) \ |
| | 236 | emith_arith_r_imm(2, r, imm) |
| | 237 | |
| | 238 | #define emith_sbc_r_imm(r, imm) \ |
| | 239 | emith_arith_r_imm(3, r, imm) // sbb |
| | 240 | |
| | 241 | #define emith_and_r_imm(r, imm) \ |
| | 242 | emith_arith_r_imm(4, r, imm) |
| | 243 | |
| | 244 | /* used for sub cycles after test, so retain flags with lea */ |
| | 245 | #define emith_sub_r_imm(r, imm) do { \ |
| | 246 | assert(r != xSP); \ |
| | 247 | EMIT_OP_MODRM(0x8d, 2, r, r); \ |
| | 248 | EMIT(-(s32)(imm), s32); \ |
| | 249 | } while (0) |
| | 250 | |
| | 251 | #define emith_subf_r_imm(r, imm) \ |
| | 252 | emith_arith_r_imm(5, r, imm) |
| | 253 | |
| | 254 | #define emith_eor_r_imm(r, imm) \ |
| | 255 | emith_arith_r_imm(6, r, imm) |
| | 256 | |
| | 257 | #define emith_cmp_r_imm(r, imm) \ |
| | 258 | emith_arith_r_imm(7, r, imm) |
| | 259 | |
| | 260 | #define emith_tst_r_imm(r, imm) do { \ |
| | 261 | EMIT_OP_MODRM(0xf7, 3, 0, r); \ |
| | 262 | EMIT(imm, u32); \ |
| | 263 | } while (0) |
| | 264 | |
| | 265 | // fake |
| | 266 | #define emith_bic_r_imm(r, imm) \ |
| | 267 | emith_arith_r_imm(4, r, ~(imm)) |
| | 268 | |
| | 269 | // fake conditionals (using SJMP instead) |
| | 270 | #define emith_move_r_imm_c(cond, r, imm) do { \ |
| | 271 | (void)(cond); \ |
| | 272 | emith_move_r_imm(r, imm); \ |
| | 273 | } while (0) |
| | 274 | |
| | 275 | #define emith_add_r_imm_c(cond, r, imm) do { \ |
| | 276 | (void)(cond); \ |
| | 277 | emith_add_r_imm(r, imm); \ |
| | 278 | } while (0) |
| | 279 | |
| | 280 | #define emith_sub_r_imm_c(cond, r, imm) do { \ |
| | 281 | (void)(cond); \ |
| | 282 | emith_sub_r_imm(r, imm); \ |
| | 283 | } while (0) |
| | 284 | |
| | 285 | #define emith_or_r_imm_c(cond, r, imm) \ |
| | 286 | emith_or_r_imm(r, imm) |
| | 287 | #define emith_eor_r_imm_c(cond, r, imm) \ |
| | 288 | emith_eor_r_imm(r, imm) |
| | 289 | #define emith_bic_r_imm_c(cond, r, imm) \ |
| | 290 | emith_bic_r_imm(r, imm) |
| | 291 | #define emith_ror_c(cond, d, s, cnt) \ |
| | 292 | emith_ror(d, s, cnt) |
| | 293 | |
| | 294 | #define emith_read_r_r_offs_c(cond, r, rs, offs) \ |
| | 295 | emith_read_r_r_offs(r, rs, offs) |
| | 296 | #define emith_write_r_r_offs_c(cond, r, rs, offs) \ |
| | 297 | emith_write_r_r_offs(r, rs, offs) |
| | 298 | #define emith_read8_r_r_offs_c(cond, r, rs, offs) \ |
| | 299 | emith_read8_r_r_offs(r, rs, offs) |
| | 300 | #define emith_write8_r_r_offs_c(cond, r, rs, offs) \ |
| | 301 | emith_write8_r_r_offs(r, rs, offs) |
| | 302 | #define emith_read16_r_r_offs_c(cond, r, rs, offs) \ |
| | 303 | emith_read16_r_r_offs(r, rs, offs) |
| | 304 | #define emith_write16_r_r_offs_c(cond, r, rs, offs) \ |
| | 305 | emith_write16_r_r_offs(r, rs, offs) |
| | 306 | #define emith_jump_reg_c(cond, r) \ |
| | 307 | emith_jump_reg(r) |
| | 308 | #define emith_jump_ctx_c(cond, offs) \ |
| | 309 | emith_jump_ctx(offs) |
| | 310 | #define emith_ret_c(cond) \ |
| | 311 | emith_ret() |
| | 312 | |
| | 313 | // _r_r_imm - use lea |
| | 314 | #define emith_add_r_r_imm(d, s, imm) do { \ |
| | 315 | assert(s != xSP); \ |
| | 316 | EMIT_OP_MODRM(0x8d, 2, d, s); /* lea */ \ |
| | 317 | EMIT(imm, s32); \ |
| | 318 | } while (0) |
| | 319 | |
| | 320 | #define emith_add_r_r_ptr_imm(d, s, imm) do { \ |
| | 321 | if ((s) != xSP) { \ |
| | 322 | EMIT_REX_IF(1, d, s); \ |
| | 323 | EMIT_OP_MODRM64(0x8d, 2, d, s); /* lea */ \ |
| | 324 | } \ |
| | 325 | else { \ |
| | 326 | if (d != s) \ |
| | 327 | emith_move_r_r_ptr(d, s); \ |
| | 328 | EMIT_REX_IF(1, 0, d); \ |
| | 329 | EMIT_OP_MODRM64(0x81, 3, 0, d); /* add */ \ |
| | 330 | } \ |
| | 331 | EMIT(imm, s32); \ |
| | 332 | } while (0) |
| | 333 | |
| | 334 | #define emith_and_r_r_imm(d, s, imm) do { \ |
| | 335 | if (d != s) \ |
| | 336 | emith_move_r_r(d, s); \ |
| | 337 | emith_and_r_imm(d, imm); \ |
| | 338 | } while (0) |
| | 339 | |
| | 340 | // shift |
| | 341 | #define emith_shift(op, d, s, cnt) do { \ |
| | 342 | if (d != s) \ |
| | 343 | emith_move_r_r(d, s); \ |
| | 344 | EMIT_OP_MODRM(0xc1, 3, op, d); \ |
| | 345 | EMIT(cnt, u8); \ |
| | 346 | } while (0) |
| | 347 | |
| | 348 | #define emith_lsl(d, s, cnt) \ |
| | 349 | emith_shift(4, d, s, cnt) |
| | 350 | |
| | 351 | #define emith_lsr(d, s, cnt) \ |
| | 352 | emith_shift(5, d, s, cnt) |
| | 353 | |
| | 354 | #define emith_asr(d, s, cnt) \ |
| | 355 | emith_shift(7, d, s, cnt) |
| | 356 | |
| | 357 | #define emith_rol(d, s, cnt) \ |
| | 358 | emith_shift(0, d, s, cnt) |
| | 359 | |
| | 360 | #define emith_ror(d, s, cnt) \ |
| | 361 | emith_shift(1, d, s, cnt) |
| | 362 | |
| | 363 | #define emith_rolc(r) \ |
| | 364 | EMIT_OP_MODRM(0xd1, 3, 2, r) |
| | 365 | |
| | 366 | #define emith_rorc(r) \ |
| | 367 | EMIT_OP_MODRM(0xd1, 3, 3, r) |
| | 368 | |
| | 369 | // misc |
| | 370 | #define emith_push(r) \ |
| | 371 | EMIT_OP(0x50 + (r)) |
| | 372 | |
| | 373 | #define emith_push_imm(imm) do { \ |
| | 374 | EMIT_OP(0x68); \ |
| | 375 | EMIT(imm, u32); \ |
| | 376 | } while (0) |
| | 377 | |
| | 378 | #define emith_pop(r) \ |
| | 379 | EMIT_OP(0x58 + (r)) |
| | 380 | |
| | 381 | #define emith_neg_r(r) \ |
| | 382 | EMIT_OP_MODRM(0xf7, 3, 3, r) |
| | 383 | |
| | 384 | #define emith_clear_msb(d, s, count) { \ |
| | 385 | u32 t = (u32)-1; \ |
| | 386 | t >>= count; \ |
| | 387 | if (d != s) \ |
| | 388 | emith_move_r_r(d, s); \ |
| | 389 | emith_and_r_imm(d, t); \ |
| | 390 | } |
| | 391 | |
| | 392 | #define emith_clear_msb_c(cond, d, s, count) { \ |
| | 393 | (void)(cond); \ |
| | 394 | emith_clear_msb(d, s, count); \ |
| | 395 | } |
| | 396 | |
| | 397 | #define emith_sext(d, s, bits) { \ |
| | 398 | emith_lsl(d, s, 32 - (bits)); \ |
| | 399 | emith_asr(d, d, 32 - (bits)); \ |
| | 400 | } |
| | 401 | |
| | 402 | #define emith_setc(r) do { \ |
| | 403 | assert(is_abcdx(r)); \ |
| | 404 | EMIT_OP(0x0f); \ |
| | 405 | EMIT_OP_MODRM(0x92, 3, 0, r); /* SETC r */ \ |
| | 406 | } while (0) |
| | 407 | |
| | 408 | // XXX: stupid mess |
| | 409 | #define emith_mul_(op, dlo, dhi, s1, s2) do { \ |
| | 410 | int rmr; \ |
| | 411 | if (dlo != xAX && dhi != xAX) \ |
| | 412 | emith_push(xAX); \ |
| | 413 | if (dlo != xDX && dhi != xDX) \ |
| | 414 | emith_push(xDX); \ |
| | 415 | if ((s1) == xAX) \ |
| | 416 | rmr = s2; \ |
| | 417 | else if ((s2) == xAX) \ |
| | 418 | rmr = s1; \ |
| | 419 | else { \ |
| | 420 | emith_move_r_r(xAX, s1); \ |
| | 421 | rmr = s2; \ |
| | 422 | } \ |
| | 423 | EMIT_OP_MODRM(0xf7, 3, op, rmr); /* xMUL rmr */ \ |
| | 424 | /* XXX: using push/pop for the case of edx->eax; eax->edx */ \ |
| | 425 | if (dhi != xDX && dhi != -1) \ |
| | 426 | emith_push(xDX); \ |
| | 427 | if (dlo != xAX) \ |
| | 428 | emith_move_r_r(dlo, xAX); \ |
| | 429 | if (dhi != xDX && dhi != -1) \ |
| | 430 | emith_pop(dhi); \ |
| | 431 | if (dlo != xDX && dhi != xDX) \ |
| | 432 | emith_pop(xDX); \ |
| | 433 | if (dlo != xAX && dhi != xAX) \ |
| | 434 | emith_pop(xAX); \ |
| | 435 | } while (0) |
| | 436 | |
| | 437 | #define emith_mul_u64(dlo, dhi, s1, s2) \ |
| | 438 | emith_mul_(4, dlo, dhi, s1, s2) /* MUL */ |
| | 439 | |
| | 440 | #define emith_mul_s64(dlo, dhi, s1, s2) \ |
| | 441 | emith_mul_(5, dlo, dhi, s1, s2) /* IMUL */ |
| | 442 | |
| | 443 | #define emith_mul(d, s1, s2) \ |
| | 444 | emith_mul_(4, d, -1, s1, s2) |
| | 445 | |
| | 446 | // (dlo,dhi) += signed(s1) * signed(s2) |
| | 447 | #define emith_mula_s64(dlo, dhi, s1, s2) do { \ |
| | 448 | emith_push(dhi); \ |
| | 449 | emith_push(dlo); \ |
| | 450 | emith_mul_(5, dlo, dhi, s1, s2); \ |
| | 451 | EMIT_OP_MODRM(0x03, 0, dlo, 4); \ |
| | 452 | EMIT_SIB(0, 4, 4); /* add dlo, [xsp] */ \ |
| | 453 | EMIT_OP_MODRM(0x13, 1, dhi, 4); \ |
| | 454 | EMIT_SIB(0, 4, 4); \ |
| | 455 | EMIT(sizeof(void *), u8); /* adc dhi, [xsp+{4,8}] */ \ |
| | 456 | emith_add_r_r_ptr_imm(xSP, xSP, sizeof(void *) * 2); \ |
| | 457 | } while (0) |
| | 458 | |
| | 459 | // "flag" instructions are the same |
| | 460 | #define emith_addf_r_r emith_add_r_r |
| | 461 | #define emith_subf_r_r emith_sub_r_r |
| | 462 | #define emith_adcf_r_r emith_adc_r_r |
| | 463 | #define emith_sbcf_r_r emith_sbc_r_r |
| | 464 | #define emith_eorf_r_r emith_eor_r_r |
| | 465 | #define emith_negcf_r_r emith_negc_r_r |
| | 466 | |
| | 467 | #define emith_lslf emith_lsl |
| | 468 | #define emith_lsrf emith_lsr |
| | 469 | #define emith_asrf emith_asr |
| | 470 | #define emith_rolf emith_rol |
| | 471 | #define emith_rorf emith_ror |
| | 472 | #define emith_rolcf emith_rolc |
| | 473 | #define emith_rorcf emith_rorc |
| | 474 | |
| | 475 | #define emith_deref_op(op, r, rs, offs) do { \ |
| | 476 | /* mov r <-> [ebp+#offs] */ \ |
| | 477 | if ((offs) >= 0x80) { \ |
| | 478 | EMIT_OP_MODRM64(op, 2, r, rs); \ |
| | 479 | EMIT(offs, u32); \ |
| | 480 | } else { \ |
| | 481 | EMIT_OP_MODRM64(op, 1, r, rs); \ |
| | 482 | EMIT(offs, u8); \ |
| | 483 | } \ |
| | 484 | } while (0) |
| | 485 | |
| | 486 | #define is_abcdx(r) (xAX <= (r) && (r) <= xDX) |
| | 487 | |
| | 488 | #define emith_read_r_r_offs(r, rs, offs) \ |
| | 489 | emith_deref_op(0x8b, r, rs, offs) |
| | 490 | |
| | 491 | #define emith_write_r_r_offs(r, rs, offs) \ |
| | 492 | emith_deref_op(0x89, r, rs, offs) |
| | 493 | |
| | 494 | // note: don't use prefixes on this |
| | 495 | #define emith_read8_r_r_offs(r, rs, offs) do { \ |
| | 496 | int r_ = r; \ |
| | 497 | if (!is_abcdx(r)) \ |
| | 498 | r_ = rcache_get_tmp(); \ |
| | 499 | emith_deref_op(0x8a, r_, rs, offs); \ |
| | 500 | if ((r) != r_) { \ |
| | 501 | emith_move_r_r(r, r_); \ |
| | 502 | rcache_free_tmp(r_); \ |
| | 503 | } \ |
| | 504 | } while (0) |
| | 505 | |
| | 506 | #define emith_write8_r_r_offs(r, rs, offs) do {\ |
| | 507 | int r_ = r; \ |
| | 508 | if (!is_abcdx(r)) { \ |
| | 509 | r_ = rcache_get_tmp(); \ |
| | 510 | emith_move_r_r(r_, r); \ |
| | 511 | } \ |
| | 512 | emith_deref_op(0x88, r_, rs, offs); \ |
| | 513 | if ((r) != r_) \ |
| | 514 | rcache_free_tmp(r_); \ |
| | 515 | } while (0) |
| | 516 | |
| | 517 | #define emith_read16_r_r_offs(r, rs, offs) do { \ |
| | 518 | EMIT(0x66, u8); /* operand override */ \ |
| | 519 | emith_read_r_r_offs(r, rs, offs); \ |
| | 520 | } while (0) |
| | 521 | |
| | 522 | #define emith_write16_r_r_offs(r, rs, offs) do { \ |
| | 523 | EMIT(0x66, u8); \ |
| | 524 | emith_write_r_r_offs(r, rs, offs); \ |
| | 525 | } while (0) |
| | 526 | |
| | 527 | #define emith_ctx_read(r, offs) \ |
| | 528 | emith_read_r_r_offs(r, CONTEXT_REG, offs) |
| | 529 | |
| | 530 | #define emith_ctx_read_ptr(r, offs) do { \ |
| | 531 | EMIT_REX_IF(1, r, CONTEXT_REG); \ |
| | 532 | emith_deref_op(0x8b, r, CONTEXT_REG, offs); \ |
| | 533 | } while (0) |
| | 534 | |
| | 535 | #define emith_ctx_write(r, offs) \ |
| | 536 | emith_write_r_r_offs(r, CONTEXT_REG, offs) |
| | 537 | |
| | 538 | #define emith_ctx_read_multiple(r, offs, cnt, tmpr) do { \ |
| | 539 | int r_ = r, offs_ = offs, cnt_ = cnt; \ |
| | 540 | for (; cnt_ > 0; r_++, offs_ += 4, cnt_--) \ |
| | 541 | emith_ctx_read(r_, offs_); \ |
| | 542 | } while (0) |
| | 543 | |
| | 544 | #define emith_ctx_write_multiple(r, offs, cnt, tmpr) do { \ |
| | 545 | int r_ = r, offs_ = offs, cnt_ = cnt; \ |
| | 546 | for (; cnt_ > 0; r_++, offs_ += 4, cnt_--) \ |
| | 547 | emith_ctx_write(r_, offs_); \ |
| | 548 | } while (0) |
| | 549 | |
| | 550 | // assumes EBX is free |
| | 551 | #define emith_ret_to_ctx(offs) { \ |
| | 552 | emith_pop(xBX); \ |
| | 553 | emith_ctx_write(xBX, offs); \ |
| | 554 | } |
| | 555 | |
| | 556 | #define emith_jump(ptr) { \ |
| | 557 | u32 disp = (u8 *)(ptr) - ((u8 *)tcache_ptr + 5); \ |
| | 558 | EMIT_OP(0xe9); \ |
| | 559 | EMIT(disp, u32); \ |
| | 560 | } |
| | 561 | |
| | 562 | #define emith_jump_patchable(target) \ |
| | 563 | emith_jump(target) |
| | 564 | |
| | 565 | #define emith_jump_cond(cond, ptr) do { \ |
| | 566 | u32 disp = (u8 *)(ptr) - ((u8 *)tcache_ptr + 6); \ |
| | 567 | EMIT(0x0f, u8); \ |
| | 568 | EMIT_OP(0x80 | (cond)); \ |
| | 569 | EMIT(disp, u32); \ |
| | 570 | } while (0) |
| | 571 | |
| | 572 | #define emith_jump_cond_patchable(cond, target) \ |
| | 573 | emith_jump_cond(cond, target) |
| | 574 | |
| | 575 | #define emith_jump_patch(ptr, target) do { \ |
| | 576 | u32 disp_ = (u8 *)(target) - ((u8 *)(ptr) + 4); \ |
| | 577 | u32 offs_ = (*(u8 *)(ptr) == 0x0f) ? 2 : 1; \ |
| | 578 | EMIT_PTR((u8 *)(ptr) + offs_, disp_ - offs_, u32); \ |
| | 579 | } while (0) |
| | 580 | |
| | 581 | #define emith_jump_at(ptr, target) { \ |
| | 582 | u32 disp_ = (u8 *)(target) - ((u8 *)(ptr) + 5); \ |
| | 583 | EMIT_PTR(ptr, 0xe9, u8); \ |
| | 584 | EMIT_PTR((u8 *)(ptr) + 1, disp_, u32); \ |
| | 585 | } |
| | 586 | |
| | 587 | #define emith_call(ptr) { \ |
| | 588 | u32 disp = (u8 *)(ptr) - ((u8 *)tcache_ptr + 5); \ |
| | 589 | EMIT_OP(0xe8); \ |
| | 590 | EMIT(disp, u32); \ |
| | 591 | } |
| | 592 | |
| | 593 | #define emith_call_cond(cond, ptr) \ |
| | 594 | emith_call(ptr) |
| | 595 | |
| | 596 | #define emith_call_reg(r) \ |
| | 597 | EMIT_OP_MODRM(0xff, 3, 2, r) |
| | 598 | |
| | 599 | #define emith_call_ctx(offs) do { \ |
| | 600 | EMIT_OP_MODRM(0xff, 2, 2, CONTEXT_REG); \ |
| | 601 | EMIT(offs, u32); \ |
| | 602 | } while (0) |
| | 603 | |
| | 604 | #define emith_ret() \ |
| | 605 | EMIT_OP(0xc3) |
| | 606 | |
| | 607 | #define emith_jump_reg(r) \ |
| | 608 | EMIT_OP_MODRM(0xff, 3, 4, r) |
| | 609 | |
| | 610 | #define emith_jump_ctx(offs) do { \ |
| | 611 | EMIT_OP_MODRM(0xff, 2, 4, CONTEXT_REG); \ |
| | 612 | EMIT(offs, u32); \ |
| | 613 | } while (0) |
| | 614 | |
| | 615 | #define emith_push_ret() |
| | 616 | |
| | 617 | #define emith_pop_and_ret() \ |
| | 618 | emith_ret() |
| | 619 | |
| | 620 | #define EMITH_JMP_START(cond) { \ |
| | 621 | u8 *cond_ptr; \ |
| | 622 | JMP8_POS(cond_ptr) |
| | 623 | |
| | 624 | #define EMITH_JMP_END(cond) \ |
| | 625 | JMP8_EMIT(cond, cond_ptr); \ |
| | 626 | } |
| | 627 | |
| | 628 | #define EMITH_JMP3_START(cond) { \ |
| | 629 | u8 *cond_ptr, *else_ptr; \ |
| | 630 | JMP8_POS(cond_ptr) |
| | 631 | |
| | 632 | #define EMITH_JMP3_MID(cond) \ |
| | 633 | JMP8_POS(else_ptr); \ |
| | 634 | JMP8_EMIT(cond, cond_ptr); |
| | 635 | |
| | 636 | #define EMITH_JMP3_END() \ |
| | 637 | JMP8_EMIT_NC(else_ptr); \ |
| | 638 | } |
| | 639 | |
| | 640 | // "simple" jump (no more then a few insns) |
| | 641 | // ARM will use conditional instructions here |
| | 642 | #define EMITH_SJMP_DECL_() \ |
| | 643 | u8 *cond_ptr |
| | 644 | |
| | 645 | #define EMITH_SJMP_START_(cond) \ |
| | 646 | JMP8_POS(cond_ptr) |
| | 647 | |
| | 648 | #define EMITH_SJMP_END_(cond) \ |
| | 649 | JMP8_EMIT(cond, cond_ptr) |
| | 650 | |
| | 651 | #define EMITH_SJMP_START EMITH_JMP_START |
| | 652 | #define EMITH_SJMP_END EMITH_JMP_END |
| | 653 | |
| | 654 | #define EMITH_SJMP3_START EMITH_JMP3_START |
| | 655 | #define EMITH_SJMP3_MID EMITH_JMP3_MID |
| | 656 | #define EMITH_SJMP3_END EMITH_JMP3_END |
| | 657 | |
| | 658 | #define emith_pass_arg_r(arg, reg) do { \ |
| | 659 | int rd = 7; \ |
| | 660 | host_arg2reg(rd, arg); \ |
| | 661 | emith_move_r_r_ptr(rd, reg); \ |
| | 662 | } while (0) |
| | 663 | |
| | 664 | #define emith_pass_arg_imm(arg, imm) do { \ |
| | 665 | int rd = 7; \ |
| | 666 | host_arg2reg(rd, arg); \ |
| | 667 | emith_move_r_imm(rd, imm); \ |
| | 668 | } while (0) |
| | 669 | |
| | 670 | #define host_instructions_updated(base, end) |
| | 671 | |
| | 672 | #ifdef __x86_64__ |
| | 673 | |
| | 674 | #define PTR_SCALE 3 |
| | 675 | #define NA_TMP_REG xAX // non-arg tmp from reg_temp[] |
| | 676 | |
| | 677 | #define EMIT_REX_IF(w, r, rm) do { \ |
| | 678 | int r_ = (r) > 7 ? 1 : 0; \ |
| | 679 | int rm_ = (rm) > 7 ? 1 : 0; \ |
| | 680 | if ((w) | r_ | rm_) \ |
| | 681 | EMIT_REX(1, r_, 0, rm_); \ |
| | 682 | } while (0) |
| | 683 | |
| | 684 | #ifndef _WIN32 |
| | 685 | |
| | 686 | #define host_arg2reg(rd, arg) \ |
| | 687 | switch (arg) { \ |
| | 688 | case 0: rd = xDI; break; \ |
| | 689 | case 1: rd = xSI; break; \ |
| | 690 | case 2: rd = xDX; break; \ |
| | 691 | } |
| | 692 | |
| | 693 | #define emith_sh2_drc_entry() { \ |
| | 694 | emith_push(xBX); \ |
| | 695 | emith_push(xBP); \ |
| | 696 | emith_push(xSI); /* to align */ \ |
| | 697 | } |
| | 698 | |
| | 699 | #define emith_sh2_drc_exit() { \ |
| | 700 | emith_pop(xSI); \ |
| | 701 | emith_pop(xBP); \ |
| | 702 | emith_pop(xBX); \ |
| | 703 | emith_ret(); \ |
| | 704 | } |
| | 705 | |
| | 706 | #else // _WIN32 |
| | 707 | |
| | 708 | #define host_arg2reg(rd, arg) \ |
| | 709 | switch (arg) { \ |
| | 710 | case 0: rd = xCX; break; \ |
| | 711 | case 1: rd = xDX; break; \ |
| | 712 | case 2: rd = 8; break; \ |
| | 713 | } |
| | 714 | |
| | 715 | #define emith_sh2_drc_entry() { \ |
| | 716 | emith_push(xBX); \ |
| | 717 | emith_push(xBP); \ |
| | 718 | emith_push(xSI); \ |
| | 719 | emith_push(xDI); \ |
| | 720 | emith_add_r_r_ptr_imm(xSP, xSP, -8*5); \ |
| | 721 | } |
| | 722 | |
| | 723 | #define emith_sh2_drc_exit() { \ |
| | 724 | emith_add_r_r_ptr_imm(xSP, xSP, 8*5); \ |
| | 725 | emith_pop(xDI); \ |
| | 726 | emith_pop(xSI); \ |
| | 727 | emith_pop(xBP); \ |
| | 728 | emith_pop(xBX); \ |
| | 729 | emith_ret(); \ |
| | 730 | } |
| | 731 | |
| | 732 | #endif // _WIN32 |
| | 733 | |
| | 734 | #else // !__x86_64__ |
| | 735 | |
| | 736 | #define PTR_SCALE 2 |
| | 737 | #define NA_TMP_REG xBX // non-arg tmp from reg_temp[] |
| | 738 | |
| | 739 | #define EMIT_REX_IF(w, r, rm) do { \ |
| | 740 | assert((u32)(r) < 8u); \ |
| | 741 | assert((u32)(rm) < 8u); \ |
| | 742 | } while (0) |
| | 743 | |
| | 744 | #define host_arg2reg(rd, arg) \ |
| | 745 | switch (arg) { \ |
| | 746 | case 0: rd = xAX; break; \ |
| | 747 | case 1: rd = xDX; break; \ |
| | 748 | case 2: rd = xCX; break; \ |
| | 749 | } |
| | 750 | |
| | 751 | #define emith_sh2_drc_entry() { \ |
| | 752 | emith_push(xBX); \ |
| | 753 | emith_push(xBP); \ |
| | 754 | emith_push(xSI); \ |
| | 755 | emith_push(xDI); \ |
| | 756 | } |
| | 757 | |
| | 758 | #define emith_sh2_drc_exit() { \ |
| | 759 | emith_pop(xDI); \ |
| | 760 | emith_pop(xSI); \ |
| | 761 | emith_pop(xBP); \ |
| | 762 | emith_pop(xBX); \ |
| | 763 | emith_ret(); \ |
| | 764 | } |
| | 765 | |
| | 766 | #endif |
| | 767 | |
| | 768 | #define emith_save_caller_regs(mask) do { \ |
| | 769 | if ((mask) & (1 << xAX)) emith_push(xAX); \ |
| | 770 | if ((mask) & (1 << xCX)) emith_push(xCX); \ |
| | 771 | if ((mask) & (1 << xDX)) emith_push(xDX); \ |
| | 772 | if ((mask) & (1 << xSI)) emith_push(xSI); \ |
| | 773 | if ((mask) & (1 << xDI)) emith_push(xDI); \ |
| | 774 | } while (0) |
| | 775 | |
| | 776 | #define emith_restore_caller_regs(mask) do { \ |
| | 777 | if ((mask) & (1 << xDI)) emith_pop(xDI); \ |
| | 778 | if ((mask) & (1 << xSI)) emith_pop(xSI); \ |
| | 779 | if ((mask) & (1 << xDX)) emith_pop(xDX); \ |
| | 780 | if ((mask) & (1 << xCX)) emith_pop(xCX); \ |
| | 781 | if ((mask) & (1 << xAX)) emith_pop(xAX); \ |
| | 782 | } while (0) |
| | 783 | |
| | 784 | #define emith_sh2_wcall(a, tab) { \ |
| | 785 | int arg2_; \ |
| | 786 | host_arg2reg(arg2_, 2); \ |
| | 787 | emith_lsr(NA_TMP_REG, a, SH2_WRITE_SHIFT); \ |
| | 788 | EMIT_REX_IF(1, NA_TMP_REG, tab); \ |
| | 789 | EMIT_OP_MODRM64(0x8b, 0, NA_TMP_REG, 4); \ |
| | 790 | EMIT_SIB64(PTR_SCALE, NA_TMP_REG, tab); /* mov tmp, [tab + tmp * {4,8}] */ \ |
| | 791 | emith_move_r_r_ptr(arg2_, CONTEXT_REG); \ |
| | 792 | emith_jump_reg(NA_TMP_REG); \ |
| | 793 | } |
| | 794 | |
| | 795 | #define emith_sh2_dtbf_loop() { \ |
| | 796 | u8 *jmp0; /* negative cycles check */ \ |
| | 797 | u8 *jmp1; /* unsinged overflow check */ \ |
| | 798 | int cr, rn; \ |
| | 799 | int tmp_ = rcache_get_tmp(); \ |
| | 800 | cr = rcache_get_reg(SHR_SR, RC_GR_RMW); \ |
| | 801 | rn = rcache_get_reg((op >> 8) & 0x0f, RC_GR_RMW);\ |
| | 802 | emith_sub_r_imm(rn, 1); \ |
| | 803 | emith_sub_r_imm(cr, (cycles+1) << 12); \ |
| | 804 | cycles = 0; \ |
| | 805 | emith_asr(tmp_, cr, 2+12); \ |
| | 806 | JMP8_POS(jmp0); /* no negative cycles */ \ |
| | 807 | emith_move_r_imm(tmp_, 0); \ |
| | 808 | JMP8_EMIT(ICOND_JNS, jmp0); \ |
| | 809 | emith_and_r_imm(cr, 0xffe); \ |
| | 810 | emith_subf_r_r(rn, tmp_); \ |
| | 811 | JMP8_POS(jmp1); /* no overflow */ \ |
| | 812 | emith_neg_r(rn); /* count left */ \ |
| | 813 | emith_lsl(rn, rn, 2+12); \ |
| | 814 | emith_or_r_r(cr, rn); \ |
| | 815 | emith_or_r_imm(cr, 1); \ |
| | 816 | emith_move_r_imm(rn, 0); \ |
| | 817 | JMP8_EMIT(ICOND_JA, jmp1); \ |
| | 818 | rcache_free_tmp(tmp_); \ |
| | 819 | } |
| | 820 | |
| | 821 | #define emith_write_sr(sr, srcr) { \ |
| | 822 | int tmp_ = rcache_get_tmp(); \ |
| | 823 | emith_clear_msb(tmp_, srcr, 22); \ |
| | 824 | emith_bic_r_imm(sr, 0x3ff); \ |
| | 825 | emith_or_r_r(sr, tmp_); \ |
| | 826 | rcache_free_tmp(tmp_); \ |
| | 827 | } |
| | 828 | |
| | 829 | #define emith_tpop_carry(sr, is_sub) \ |
| | 830 | emith_lsr(sr, sr, 1) |
| | 831 | |
| | 832 | #define emith_tpush_carry(sr, is_sub) \ |
| | 833 | emith_adc_r_r(sr, sr) |
| | 834 | |
| | 835 | /* |
| | 836 | * if Q |
| | 837 | * t = carry(Rn += Rm) |
| | 838 | * else |
| | 839 | * t = carry(Rn -= Rm) |
| | 840 | * T ^= t |
| | 841 | */ |
| | 842 | #define emith_sh2_div1_step(rn, rm, sr) { \ |
| | 843 | u8 *jmp0, *jmp1; \ |
| | 844 | int tmp_ = rcache_get_tmp(); \ |
| | 845 | emith_eor_r_r(tmp_, tmp_); \ |
| | 846 | emith_tst_r_imm(sr, Q); /* if (Q ^ M) */ \ |
| | 847 | JMP8_POS(jmp0); /* je do_sub */ \ |
| | 848 | emith_add_r_r(rn, rm); \ |
| | 849 | JMP8_POS(jmp1); /* jmp done */ \ |
| | 850 | JMP8_EMIT(ICOND_JE, jmp0); /* do_sub: */ \ |
| | 851 | emith_sub_r_r(rn, rm); \ |
| | 852 | JMP8_EMIT_NC(jmp1); /* done: */ \ |
| | 853 | emith_adc_r_r(tmp_, tmp_); \ |
| | 854 | emith_eor_r_r(sr, tmp_); \ |
| | 855 | rcache_free_tmp(tmp_); \ |
| | 856 | } |
| | 857 | |
notaz.gp2x.de / picodrive.git / blame_incremental