| 1 | |
| 2 | #ifdef PICODRIVE_HACK |
| 3 | #define NOT_POLLING g_m68kcontext->not_polling = 1; |
| 4 | #else |
| 5 | #define NOT_POLLING |
| 6 | #endif |
| 7 | |
| 8 | // ORI |
| 9 | OPCODE(0x0000) |
| 10 | { |
| 11 | u32 adr, res; |
| 12 | u32 src, dst; |
| 13 | |
| 14 | FETCH_BYTE(src); |
| 15 | res = DREGu8((Opcode >> 0) & 7); |
| 16 | res |= src; |
| 17 | flag_C = 0; |
| 18 | flag_V = 0; |
| 19 | flag_NotZ = res; |
| 20 | flag_N = res; |
| 21 | DREGu8((Opcode >> 0) & 7) = res; |
| 22 | RET(8) |
| 23 | } |
| 24 | |
| 25 | // ORI |
| 26 | OPCODE(0x0010) |
| 27 | { |
| 28 | u32 adr, res; |
| 29 | u32 src, dst; |
| 30 | |
| 31 | FETCH_BYTE(src); |
| 32 | adr = AREG((Opcode >> 0) & 7); |
| 33 | PRE_IO |
| 34 | READ_BYTE_F(adr, res) |
| 35 | res |= src; |
| 36 | flag_C = 0; |
| 37 | flag_V = 0; |
| 38 | flag_NotZ = res; |
| 39 | flag_N = res; |
| 40 | WRITE_BYTE_F(adr, res) |
| 41 | POST_IO |
| 42 | RET(16) |
| 43 | } |
| 44 | |
| 45 | // ORI |
| 46 | OPCODE(0x0018) |
| 47 | { |
| 48 | u32 adr, res; |
| 49 | u32 src, dst; |
| 50 | |
| 51 | FETCH_BYTE(src); |
| 52 | adr = AREG((Opcode >> 0) & 7); |
| 53 | AREG((Opcode >> 0) & 7) += 1; |
| 54 | PRE_IO |
| 55 | READ_BYTE_F(adr, res) |
| 56 | res |= src; |
| 57 | flag_C = 0; |
| 58 | flag_V = 0; |
| 59 | flag_NotZ = res; |
| 60 | flag_N = res; |
| 61 | WRITE_BYTE_F(adr, res) |
| 62 | POST_IO |
| 63 | RET(16) |
| 64 | } |
| 65 | |
| 66 | // ORI |
| 67 | OPCODE(0x0020) |
| 68 | { |
| 69 | u32 adr, res; |
| 70 | u32 src, dst; |
| 71 | |
| 72 | FETCH_BYTE(src); |
| 73 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 74 | AREG((Opcode >> 0) & 7) = adr; |
| 75 | PRE_IO |
| 76 | READ_BYTE_F(adr, res) |
| 77 | res |= src; |
| 78 | flag_C = 0; |
| 79 | flag_V = 0; |
| 80 | flag_NotZ = res; |
| 81 | flag_N = res; |
| 82 | WRITE_BYTE_F(adr, res) |
| 83 | POST_IO |
| 84 | RET(18) |
| 85 | } |
| 86 | |
| 87 | // ORI |
| 88 | OPCODE(0x0028) |
| 89 | { |
| 90 | u32 adr, res; |
| 91 | u32 src, dst; |
| 92 | |
| 93 | FETCH_BYTE(src); |
| 94 | FETCH_SWORD(adr); |
| 95 | adr += AREG((Opcode >> 0) & 7); |
| 96 | PRE_IO |
| 97 | READ_BYTE_F(adr, res) |
| 98 | res |= src; |
| 99 | flag_C = 0; |
| 100 | flag_V = 0; |
| 101 | flag_NotZ = res; |
| 102 | flag_N = res; |
| 103 | WRITE_BYTE_F(adr, res) |
| 104 | POST_IO |
| 105 | RET(20) |
| 106 | } |
| 107 | |
| 108 | // ORI |
| 109 | OPCODE(0x0030) |
| 110 | { |
| 111 | u32 adr, res; |
| 112 | u32 src, dst; |
| 113 | |
| 114 | FETCH_BYTE(src); |
| 115 | adr = AREG((Opcode >> 0) & 7); |
| 116 | DECODE_EXT_WORD |
| 117 | PRE_IO |
| 118 | READ_BYTE_F(adr, res) |
| 119 | res |= src; |
| 120 | flag_C = 0; |
| 121 | flag_V = 0; |
| 122 | flag_NotZ = res; |
| 123 | flag_N = res; |
| 124 | WRITE_BYTE_F(adr, res) |
| 125 | POST_IO |
| 126 | RET(22) |
| 127 | } |
| 128 | |
| 129 | // ORI |
| 130 | OPCODE(0x0038) |
| 131 | { |
| 132 | u32 adr, res; |
| 133 | u32 src, dst; |
| 134 | |
| 135 | FETCH_BYTE(src); |
| 136 | FETCH_SWORD(adr); |
| 137 | PRE_IO |
| 138 | READ_BYTE_F(adr, res) |
| 139 | res |= src; |
| 140 | flag_C = 0; |
| 141 | flag_V = 0; |
| 142 | flag_NotZ = res; |
| 143 | flag_N = res; |
| 144 | WRITE_BYTE_F(adr, res) |
| 145 | POST_IO |
| 146 | RET(20) |
| 147 | } |
| 148 | |
| 149 | // ORI |
| 150 | OPCODE(0x0039) |
| 151 | { |
| 152 | u32 adr, res; |
| 153 | u32 src, dst; |
| 154 | |
| 155 | FETCH_BYTE(src); |
| 156 | FETCH_LONG(adr); |
| 157 | PRE_IO |
| 158 | READ_BYTE_F(adr, res) |
| 159 | res |= src; |
| 160 | flag_C = 0; |
| 161 | flag_V = 0; |
| 162 | flag_NotZ = res; |
| 163 | flag_N = res; |
| 164 | WRITE_BYTE_F(adr, res) |
| 165 | POST_IO |
| 166 | RET(24) |
| 167 | } |
| 168 | |
| 169 | // ORI |
| 170 | OPCODE(0x001F) |
| 171 | { |
| 172 | u32 adr, res; |
| 173 | u32 src, dst; |
| 174 | |
| 175 | FETCH_BYTE(src); |
| 176 | adr = AREG(7); |
| 177 | AREG(7) += 2; |
| 178 | PRE_IO |
| 179 | READ_BYTE_F(adr, res) |
| 180 | res |= src; |
| 181 | flag_C = 0; |
| 182 | flag_V = 0; |
| 183 | flag_NotZ = res; |
| 184 | flag_N = res; |
| 185 | WRITE_BYTE_F(adr, res) |
| 186 | POST_IO |
| 187 | RET(16) |
| 188 | } |
| 189 | |
| 190 | // ORI |
| 191 | OPCODE(0x0027) |
| 192 | { |
| 193 | u32 adr, res; |
| 194 | u32 src, dst; |
| 195 | |
| 196 | FETCH_BYTE(src); |
| 197 | adr = AREG(7) - 2; |
| 198 | AREG(7) = adr; |
| 199 | PRE_IO |
| 200 | READ_BYTE_F(adr, res) |
| 201 | res |= src; |
| 202 | flag_C = 0; |
| 203 | flag_V = 0; |
| 204 | flag_NotZ = res; |
| 205 | flag_N = res; |
| 206 | WRITE_BYTE_F(adr, res) |
| 207 | POST_IO |
| 208 | RET(18) |
| 209 | } |
| 210 | |
| 211 | // ORI |
| 212 | OPCODE(0x0040) |
| 213 | { |
| 214 | u32 adr, res; |
| 215 | u32 src, dst; |
| 216 | |
| 217 | FETCH_WORD(src); |
| 218 | res = DREGu16((Opcode >> 0) & 7); |
| 219 | res |= src; |
| 220 | flag_C = 0; |
| 221 | flag_V = 0; |
| 222 | flag_NotZ = res; |
| 223 | flag_N = res >> 8; |
| 224 | DREGu16((Opcode >> 0) & 7) = res; |
| 225 | RET(8) |
| 226 | } |
| 227 | |
| 228 | // ORI |
| 229 | OPCODE(0x0050) |
| 230 | { |
| 231 | u32 adr, res; |
| 232 | u32 src, dst; |
| 233 | |
| 234 | FETCH_WORD(src); |
| 235 | adr = AREG((Opcode >> 0) & 7); |
| 236 | PRE_IO |
| 237 | READ_WORD_F(adr, res) |
| 238 | res |= src; |
| 239 | flag_C = 0; |
| 240 | flag_V = 0; |
| 241 | flag_NotZ = res; |
| 242 | flag_N = res >> 8; |
| 243 | WRITE_WORD_F(adr, res) |
| 244 | POST_IO |
| 245 | RET(16) |
| 246 | } |
| 247 | |
| 248 | // ORI |
| 249 | OPCODE(0x0058) |
| 250 | { |
| 251 | u32 adr, res; |
| 252 | u32 src, dst; |
| 253 | |
| 254 | FETCH_WORD(src); |
| 255 | adr = AREG((Opcode >> 0) & 7); |
| 256 | AREG((Opcode >> 0) & 7) += 2; |
| 257 | PRE_IO |
| 258 | READ_WORD_F(adr, res) |
| 259 | res |= src; |
| 260 | flag_C = 0; |
| 261 | flag_V = 0; |
| 262 | flag_NotZ = res; |
| 263 | flag_N = res >> 8; |
| 264 | WRITE_WORD_F(adr, res) |
| 265 | POST_IO |
| 266 | RET(16) |
| 267 | } |
| 268 | |
| 269 | // ORI |
| 270 | OPCODE(0x0060) |
| 271 | { |
| 272 | u32 adr, res; |
| 273 | u32 src, dst; |
| 274 | |
| 275 | FETCH_WORD(src); |
| 276 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 277 | AREG((Opcode >> 0) & 7) = adr; |
| 278 | PRE_IO |
| 279 | READ_WORD_F(adr, res) |
| 280 | res |= src; |
| 281 | flag_C = 0; |
| 282 | flag_V = 0; |
| 283 | flag_NotZ = res; |
| 284 | flag_N = res >> 8; |
| 285 | WRITE_WORD_F(adr, res) |
| 286 | POST_IO |
| 287 | RET(18) |
| 288 | } |
| 289 | |
| 290 | // ORI |
| 291 | OPCODE(0x0068) |
| 292 | { |
| 293 | u32 adr, res; |
| 294 | u32 src, dst; |
| 295 | |
| 296 | FETCH_WORD(src); |
| 297 | FETCH_SWORD(adr); |
| 298 | adr += AREG((Opcode >> 0) & 7); |
| 299 | PRE_IO |
| 300 | READ_WORD_F(adr, res) |
| 301 | res |= src; |
| 302 | flag_C = 0; |
| 303 | flag_V = 0; |
| 304 | flag_NotZ = res; |
| 305 | flag_N = res >> 8; |
| 306 | WRITE_WORD_F(adr, res) |
| 307 | POST_IO |
| 308 | RET(20) |
| 309 | } |
| 310 | |
| 311 | // ORI |
| 312 | OPCODE(0x0070) |
| 313 | { |
| 314 | u32 adr, res; |
| 315 | u32 src, dst; |
| 316 | |
| 317 | FETCH_WORD(src); |
| 318 | adr = AREG((Opcode >> 0) & 7); |
| 319 | DECODE_EXT_WORD |
| 320 | PRE_IO |
| 321 | READ_WORD_F(adr, res) |
| 322 | res |= src; |
| 323 | flag_C = 0; |
| 324 | flag_V = 0; |
| 325 | flag_NotZ = res; |
| 326 | flag_N = res >> 8; |
| 327 | WRITE_WORD_F(adr, res) |
| 328 | POST_IO |
| 329 | RET(22) |
| 330 | } |
| 331 | |
| 332 | // ORI |
| 333 | OPCODE(0x0078) |
| 334 | { |
| 335 | u32 adr, res; |
| 336 | u32 src, dst; |
| 337 | |
| 338 | FETCH_WORD(src); |
| 339 | FETCH_SWORD(adr); |
| 340 | PRE_IO |
| 341 | READ_WORD_F(adr, res) |
| 342 | res |= src; |
| 343 | flag_C = 0; |
| 344 | flag_V = 0; |
| 345 | flag_NotZ = res; |
| 346 | flag_N = res >> 8; |
| 347 | WRITE_WORD_F(adr, res) |
| 348 | POST_IO |
| 349 | RET(20) |
| 350 | } |
| 351 | |
| 352 | // ORI |
| 353 | OPCODE(0x0079) |
| 354 | { |
| 355 | u32 adr, res; |
| 356 | u32 src, dst; |
| 357 | |
| 358 | FETCH_WORD(src); |
| 359 | FETCH_LONG(adr); |
| 360 | PRE_IO |
| 361 | READ_WORD_F(adr, res) |
| 362 | res |= src; |
| 363 | flag_C = 0; |
| 364 | flag_V = 0; |
| 365 | flag_NotZ = res; |
| 366 | flag_N = res >> 8; |
| 367 | WRITE_WORD_F(adr, res) |
| 368 | POST_IO |
| 369 | RET(24) |
| 370 | } |
| 371 | |
| 372 | // ORI |
| 373 | OPCODE(0x005F) |
| 374 | { |
| 375 | u32 adr, res; |
| 376 | u32 src, dst; |
| 377 | |
| 378 | FETCH_WORD(src); |
| 379 | adr = AREG(7); |
| 380 | AREG(7) += 2; |
| 381 | PRE_IO |
| 382 | READ_WORD_F(adr, res) |
| 383 | res |= src; |
| 384 | flag_C = 0; |
| 385 | flag_V = 0; |
| 386 | flag_NotZ = res; |
| 387 | flag_N = res >> 8; |
| 388 | WRITE_WORD_F(adr, res) |
| 389 | POST_IO |
| 390 | RET(16) |
| 391 | } |
| 392 | |
| 393 | // ORI |
| 394 | OPCODE(0x0067) |
| 395 | { |
| 396 | u32 adr, res; |
| 397 | u32 src, dst; |
| 398 | |
| 399 | FETCH_WORD(src); |
| 400 | adr = AREG(7) - 2; |
| 401 | AREG(7) = adr; |
| 402 | PRE_IO |
| 403 | READ_WORD_F(adr, res) |
| 404 | res |= src; |
| 405 | flag_C = 0; |
| 406 | flag_V = 0; |
| 407 | flag_NotZ = res; |
| 408 | flag_N = res >> 8; |
| 409 | WRITE_WORD_F(adr, res) |
| 410 | POST_IO |
| 411 | RET(18) |
| 412 | } |
| 413 | |
| 414 | // ORI |
| 415 | OPCODE(0x0080) |
| 416 | { |
| 417 | u32 adr, res; |
| 418 | u32 src, dst; |
| 419 | |
| 420 | FETCH_LONG(src); |
| 421 | res = DREGu32((Opcode >> 0) & 7); |
| 422 | res |= src; |
| 423 | flag_C = 0; |
| 424 | flag_V = 0; |
| 425 | flag_NotZ = res; |
| 426 | flag_N = res >> 24; |
| 427 | DREGu32((Opcode >> 0) & 7) = res; |
| 428 | RET(16) |
| 429 | } |
| 430 | |
| 431 | // ORI |
| 432 | OPCODE(0x0090) |
| 433 | { |
| 434 | u32 adr, res; |
| 435 | u32 src, dst; |
| 436 | |
| 437 | FETCH_LONG(src); |
| 438 | adr = AREG((Opcode >> 0) & 7); |
| 439 | PRE_IO |
| 440 | READ_LONG_F(adr, res) |
| 441 | res |= src; |
| 442 | flag_C = 0; |
| 443 | flag_V = 0; |
| 444 | flag_NotZ = res; |
| 445 | flag_N = res >> 24; |
| 446 | WRITE_LONG_F(adr, res) |
| 447 | POST_IO |
| 448 | RET(28) |
| 449 | } |
| 450 | |
| 451 | // ORI |
| 452 | OPCODE(0x0098) |
| 453 | { |
| 454 | u32 adr, res; |
| 455 | u32 src, dst; |
| 456 | |
| 457 | FETCH_LONG(src); |
| 458 | adr = AREG((Opcode >> 0) & 7); |
| 459 | AREG((Opcode >> 0) & 7) += 4; |
| 460 | PRE_IO |
| 461 | READ_LONG_F(adr, res) |
| 462 | res |= src; |
| 463 | flag_C = 0; |
| 464 | flag_V = 0; |
| 465 | flag_NotZ = res; |
| 466 | flag_N = res >> 24; |
| 467 | WRITE_LONG_F(adr, res) |
| 468 | POST_IO |
| 469 | RET(28) |
| 470 | } |
| 471 | |
| 472 | // ORI |
| 473 | OPCODE(0x00A0) |
| 474 | { |
| 475 | u32 adr, res; |
| 476 | u32 src, dst; |
| 477 | |
| 478 | FETCH_LONG(src); |
| 479 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 480 | AREG((Opcode >> 0) & 7) = adr; |
| 481 | PRE_IO |
| 482 | READ_LONG_F(adr, res) |
| 483 | res |= src; |
| 484 | flag_C = 0; |
| 485 | flag_V = 0; |
| 486 | flag_NotZ = res; |
| 487 | flag_N = res >> 24; |
| 488 | WRITE_LONG_F(adr, res) |
| 489 | POST_IO |
| 490 | RET(30) |
| 491 | } |
| 492 | |
| 493 | // ORI |
| 494 | OPCODE(0x00A8) |
| 495 | { |
| 496 | u32 adr, res; |
| 497 | u32 src, dst; |
| 498 | |
| 499 | FETCH_LONG(src); |
| 500 | FETCH_SWORD(adr); |
| 501 | adr += AREG((Opcode >> 0) & 7); |
| 502 | PRE_IO |
| 503 | READ_LONG_F(adr, res) |
| 504 | res |= src; |
| 505 | flag_C = 0; |
| 506 | flag_V = 0; |
| 507 | flag_NotZ = res; |
| 508 | flag_N = res >> 24; |
| 509 | WRITE_LONG_F(adr, res) |
| 510 | POST_IO |
| 511 | RET(32) |
| 512 | } |
| 513 | |
| 514 | // ORI |
| 515 | OPCODE(0x00B0) |
| 516 | { |
| 517 | u32 adr, res; |
| 518 | u32 src, dst; |
| 519 | |
| 520 | FETCH_LONG(src); |
| 521 | adr = AREG((Opcode >> 0) & 7); |
| 522 | DECODE_EXT_WORD |
| 523 | PRE_IO |
| 524 | READ_LONG_F(adr, res) |
| 525 | res |= src; |
| 526 | flag_C = 0; |
| 527 | flag_V = 0; |
| 528 | flag_NotZ = res; |
| 529 | flag_N = res >> 24; |
| 530 | WRITE_LONG_F(adr, res) |
| 531 | POST_IO |
| 532 | RET(34) |
| 533 | } |
| 534 | |
| 535 | // ORI |
| 536 | OPCODE(0x00B8) |
| 537 | { |
| 538 | u32 adr, res; |
| 539 | u32 src, dst; |
| 540 | |
| 541 | FETCH_LONG(src); |
| 542 | FETCH_SWORD(adr); |
| 543 | PRE_IO |
| 544 | READ_LONG_F(adr, res) |
| 545 | res |= src; |
| 546 | flag_C = 0; |
| 547 | flag_V = 0; |
| 548 | flag_NotZ = res; |
| 549 | flag_N = res >> 24; |
| 550 | WRITE_LONG_F(adr, res) |
| 551 | POST_IO |
| 552 | RET(32) |
| 553 | } |
| 554 | |
| 555 | // ORI |
| 556 | OPCODE(0x00B9) |
| 557 | { |
| 558 | u32 adr, res; |
| 559 | u32 src, dst; |
| 560 | |
| 561 | FETCH_LONG(src); |
| 562 | FETCH_LONG(adr); |
| 563 | PRE_IO |
| 564 | READ_LONG_F(adr, res) |
| 565 | res |= src; |
| 566 | flag_C = 0; |
| 567 | flag_V = 0; |
| 568 | flag_NotZ = res; |
| 569 | flag_N = res >> 24; |
| 570 | WRITE_LONG_F(adr, res) |
| 571 | POST_IO |
| 572 | RET(36) |
| 573 | } |
| 574 | |
| 575 | // ORI |
| 576 | OPCODE(0x009F) |
| 577 | { |
| 578 | u32 adr, res; |
| 579 | u32 src, dst; |
| 580 | |
| 581 | FETCH_LONG(src); |
| 582 | adr = AREG(7); |
| 583 | AREG(7) += 4; |
| 584 | PRE_IO |
| 585 | READ_LONG_F(adr, res) |
| 586 | res |= src; |
| 587 | flag_C = 0; |
| 588 | flag_V = 0; |
| 589 | flag_NotZ = res; |
| 590 | flag_N = res >> 24; |
| 591 | WRITE_LONG_F(adr, res) |
| 592 | POST_IO |
| 593 | RET(28) |
| 594 | } |
| 595 | |
| 596 | // ORI |
| 597 | OPCODE(0x00A7) |
| 598 | { |
| 599 | u32 adr, res; |
| 600 | u32 src, dst; |
| 601 | |
| 602 | FETCH_LONG(src); |
| 603 | adr = AREG(7) - 4; |
| 604 | AREG(7) = adr; |
| 605 | PRE_IO |
| 606 | READ_LONG_F(adr, res) |
| 607 | res |= src; |
| 608 | flag_C = 0; |
| 609 | flag_V = 0; |
| 610 | flag_NotZ = res; |
| 611 | flag_N = res >> 24; |
| 612 | WRITE_LONG_F(adr, res) |
| 613 | POST_IO |
| 614 | RET(30) |
| 615 | } |
| 616 | |
| 617 | // ORICCR |
| 618 | OPCODE(0x003C) |
| 619 | { |
| 620 | u32 adr, res; |
| 621 | u32 src, dst; |
| 622 | |
| 623 | FETCH_BYTE(res); |
| 624 | res &= M68K_CCR_MASK; |
| 625 | res |= GET_CCR; |
| 626 | SET_CCR(res) |
| 627 | RET(20) |
| 628 | } |
| 629 | |
| 630 | // ORISR |
| 631 | OPCODE(0x007C) |
| 632 | { |
| 633 | u32 adr, res; |
| 634 | u32 src, dst; |
| 635 | |
| 636 | if (flag_S) |
| 637 | { |
| 638 | u32 res; |
| 639 | FETCH_WORD(res); |
| 640 | res &= M68K_SR_MASK; |
| 641 | res |= GET_SR; |
| 642 | SET_SR(res) |
| 643 | CHECK_INT_TO_JUMP(20) |
| 644 | } |
| 645 | else |
| 646 | { |
| 647 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 648 | #ifdef USE_CYCLONE_TIMING |
| 649 | RET(0) |
| 650 | #else |
| 651 | RET(4) |
| 652 | #endif |
| 653 | } |
| 654 | RET(20) |
| 655 | } |
| 656 | |
| 657 | // ANDI |
| 658 | OPCODE(0x0200) |
| 659 | { |
| 660 | u32 adr, res; |
| 661 | u32 src, dst; |
| 662 | |
| 663 | FETCH_BYTE(src); |
| 664 | res = DREGu8((Opcode >> 0) & 7); |
| 665 | res &= src; |
| 666 | flag_C = 0; |
| 667 | flag_V = 0; |
| 668 | flag_NotZ = res; |
| 669 | flag_N = res; |
| 670 | DREGu8((Opcode >> 0) & 7) = res; |
| 671 | RET(8) |
| 672 | } |
| 673 | |
| 674 | // ANDI |
| 675 | OPCODE(0x0210) |
| 676 | { |
| 677 | u32 adr, res; |
| 678 | u32 src, dst; |
| 679 | |
| 680 | FETCH_BYTE(src); |
| 681 | adr = AREG((Opcode >> 0) & 7); |
| 682 | PRE_IO |
| 683 | READ_BYTE_F(adr, res) |
| 684 | res &= src; |
| 685 | flag_C = 0; |
| 686 | flag_V = 0; |
| 687 | flag_NotZ = res; |
| 688 | flag_N = res; |
| 689 | WRITE_BYTE_F(adr, res) |
| 690 | POST_IO |
| 691 | RET(16) |
| 692 | } |
| 693 | |
| 694 | // ANDI |
| 695 | OPCODE(0x0218) |
| 696 | { |
| 697 | u32 adr, res; |
| 698 | u32 src, dst; |
| 699 | |
| 700 | FETCH_BYTE(src); |
| 701 | adr = AREG((Opcode >> 0) & 7); |
| 702 | AREG((Opcode >> 0) & 7) += 1; |
| 703 | PRE_IO |
| 704 | READ_BYTE_F(adr, res) |
| 705 | res &= src; |
| 706 | flag_C = 0; |
| 707 | flag_V = 0; |
| 708 | flag_NotZ = res; |
| 709 | flag_N = res; |
| 710 | WRITE_BYTE_F(adr, res) |
| 711 | POST_IO |
| 712 | RET(16) |
| 713 | } |
| 714 | |
| 715 | // ANDI |
| 716 | OPCODE(0x0220) |
| 717 | { |
| 718 | u32 adr, res; |
| 719 | u32 src, dst; |
| 720 | |
| 721 | FETCH_BYTE(src); |
| 722 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 723 | AREG((Opcode >> 0) & 7) = adr; |
| 724 | PRE_IO |
| 725 | READ_BYTE_F(adr, res) |
| 726 | res &= src; |
| 727 | flag_C = 0; |
| 728 | flag_V = 0; |
| 729 | flag_NotZ = res; |
| 730 | flag_N = res; |
| 731 | WRITE_BYTE_F(adr, res) |
| 732 | POST_IO |
| 733 | RET(18) |
| 734 | } |
| 735 | |
| 736 | // ANDI |
| 737 | OPCODE(0x0228) |
| 738 | { |
| 739 | u32 adr, res; |
| 740 | u32 src, dst; |
| 741 | |
| 742 | FETCH_BYTE(src); |
| 743 | FETCH_SWORD(adr); |
| 744 | adr += AREG((Opcode >> 0) & 7); |
| 745 | PRE_IO |
| 746 | READ_BYTE_F(adr, res) |
| 747 | res &= src; |
| 748 | flag_C = 0; |
| 749 | flag_V = 0; |
| 750 | flag_NotZ = res; |
| 751 | flag_N = res; |
| 752 | WRITE_BYTE_F(adr, res) |
| 753 | POST_IO |
| 754 | RET(20) |
| 755 | } |
| 756 | |
| 757 | // ANDI |
| 758 | OPCODE(0x0230) |
| 759 | { |
| 760 | u32 adr, res; |
| 761 | u32 src, dst; |
| 762 | |
| 763 | FETCH_BYTE(src); |
| 764 | adr = AREG((Opcode >> 0) & 7); |
| 765 | DECODE_EXT_WORD |
| 766 | PRE_IO |
| 767 | READ_BYTE_F(adr, res) |
| 768 | res &= src; |
| 769 | flag_C = 0; |
| 770 | flag_V = 0; |
| 771 | flag_NotZ = res; |
| 772 | flag_N = res; |
| 773 | WRITE_BYTE_F(adr, res) |
| 774 | POST_IO |
| 775 | RET(22) |
| 776 | } |
| 777 | |
| 778 | // ANDI |
| 779 | OPCODE(0x0238) |
| 780 | { |
| 781 | u32 adr, res; |
| 782 | u32 src, dst; |
| 783 | |
| 784 | FETCH_BYTE(src); |
| 785 | FETCH_SWORD(adr); |
| 786 | PRE_IO |
| 787 | READ_BYTE_F(adr, res) |
| 788 | res &= src; |
| 789 | flag_C = 0; |
| 790 | flag_V = 0; |
| 791 | flag_NotZ = res; |
| 792 | flag_N = res; |
| 793 | WRITE_BYTE_F(adr, res) |
| 794 | POST_IO |
| 795 | RET(20) |
| 796 | } |
| 797 | |
| 798 | // ANDI |
| 799 | OPCODE(0x0239) |
| 800 | { |
| 801 | u32 adr, res; |
| 802 | u32 src, dst; |
| 803 | |
| 804 | FETCH_BYTE(src); |
| 805 | FETCH_LONG(adr); |
| 806 | PRE_IO |
| 807 | READ_BYTE_F(adr, res) |
| 808 | res &= src; |
| 809 | flag_C = 0; |
| 810 | flag_V = 0; |
| 811 | flag_NotZ = res; |
| 812 | flag_N = res; |
| 813 | WRITE_BYTE_F(adr, res) |
| 814 | POST_IO |
| 815 | RET(24) |
| 816 | } |
| 817 | |
| 818 | // ANDI |
| 819 | OPCODE(0x021F) |
| 820 | { |
| 821 | u32 adr, res; |
| 822 | u32 src, dst; |
| 823 | |
| 824 | FETCH_BYTE(src); |
| 825 | adr = AREG(7); |
| 826 | AREG(7) += 2; |
| 827 | PRE_IO |
| 828 | READ_BYTE_F(adr, res) |
| 829 | res &= src; |
| 830 | flag_C = 0; |
| 831 | flag_V = 0; |
| 832 | flag_NotZ = res; |
| 833 | flag_N = res; |
| 834 | WRITE_BYTE_F(adr, res) |
| 835 | POST_IO |
| 836 | RET(16) |
| 837 | } |
| 838 | |
| 839 | // ANDI |
| 840 | OPCODE(0x0227) |
| 841 | { |
| 842 | u32 adr, res; |
| 843 | u32 src, dst; |
| 844 | |
| 845 | FETCH_BYTE(src); |
| 846 | adr = AREG(7) - 2; |
| 847 | AREG(7) = adr; |
| 848 | PRE_IO |
| 849 | READ_BYTE_F(adr, res) |
| 850 | res &= src; |
| 851 | flag_C = 0; |
| 852 | flag_V = 0; |
| 853 | flag_NotZ = res; |
| 854 | flag_N = res; |
| 855 | WRITE_BYTE_F(adr, res) |
| 856 | POST_IO |
| 857 | RET(18) |
| 858 | } |
| 859 | |
| 860 | // ANDI |
| 861 | OPCODE(0x0240) |
| 862 | { |
| 863 | u32 adr, res; |
| 864 | u32 src, dst; |
| 865 | |
| 866 | FETCH_WORD(src); |
| 867 | res = DREGu16((Opcode >> 0) & 7); |
| 868 | res &= src; |
| 869 | flag_C = 0; |
| 870 | flag_V = 0; |
| 871 | flag_NotZ = res; |
| 872 | flag_N = res >> 8; |
| 873 | DREGu16((Opcode >> 0) & 7) = res; |
| 874 | RET(8) |
| 875 | } |
| 876 | |
| 877 | // ANDI |
| 878 | OPCODE(0x0250) |
| 879 | { |
| 880 | u32 adr, res; |
| 881 | u32 src, dst; |
| 882 | |
| 883 | FETCH_WORD(src); |
| 884 | adr = AREG((Opcode >> 0) & 7); |
| 885 | PRE_IO |
| 886 | READ_WORD_F(adr, res) |
| 887 | res &= src; |
| 888 | flag_C = 0; |
| 889 | flag_V = 0; |
| 890 | flag_NotZ = res; |
| 891 | flag_N = res >> 8; |
| 892 | WRITE_WORD_F(adr, res) |
| 893 | POST_IO |
| 894 | RET(16) |
| 895 | } |
| 896 | |
| 897 | // ANDI |
| 898 | OPCODE(0x0258) |
| 899 | { |
| 900 | u32 adr, res; |
| 901 | u32 src, dst; |
| 902 | |
| 903 | FETCH_WORD(src); |
| 904 | adr = AREG((Opcode >> 0) & 7); |
| 905 | AREG((Opcode >> 0) & 7) += 2; |
| 906 | PRE_IO |
| 907 | READ_WORD_F(adr, res) |
| 908 | res &= src; |
| 909 | flag_C = 0; |
| 910 | flag_V = 0; |
| 911 | flag_NotZ = res; |
| 912 | flag_N = res >> 8; |
| 913 | WRITE_WORD_F(adr, res) |
| 914 | POST_IO |
| 915 | RET(16) |
| 916 | } |
| 917 | |
| 918 | // ANDI |
| 919 | OPCODE(0x0260) |
| 920 | { |
| 921 | u32 adr, res; |
| 922 | u32 src, dst; |
| 923 | |
| 924 | FETCH_WORD(src); |
| 925 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 926 | AREG((Opcode >> 0) & 7) = adr; |
| 927 | PRE_IO |
| 928 | READ_WORD_F(adr, res) |
| 929 | res &= src; |
| 930 | flag_C = 0; |
| 931 | flag_V = 0; |
| 932 | flag_NotZ = res; |
| 933 | flag_N = res >> 8; |
| 934 | WRITE_WORD_F(adr, res) |
| 935 | POST_IO |
| 936 | RET(18) |
| 937 | } |
| 938 | |
| 939 | // ANDI |
| 940 | OPCODE(0x0268) |
| 941 | { |
| 942 | u32 adr, res; |
| 943 | u32 src, dst; |
| 944 | |
| 945 | FETCH_WORD(src); |
| 946 | FETCH_SWORD(adr); |
| 947 | adr += AREG((Opcode >> 0) & 7); |
| 948 | PRE_IO |
| 949 | READ_WORD_F(adr, res) |
| 950 | res &= src; |
| 951 | flag_C = 0; |
| 952 | flag_V = 0; |
| 953 | flag_NotZ = res; |
| 954 | flag_N = res >> 8; |
| 955 | WRITE_WORD_F(adr, res) |
| 956 | POST_IO |
| 957 | RET(20) |
| 958 | } |
| 959 | |
| 960 | // ANDI |
| 961 | OPCODE(0x0270) |
| 962 | { |
| 963 | u32 adr, res; |
| 964 | u32 src, dst; |
| 965 | |
| 966 | FETCH_WORD(src); |
| 967 | adr = AREG((Opcode >> 0) & 7); |
| 968 | DECODE_EXT_WORD |
| 969 | PRE_IO |
| 970 | READ_WORD_F(adr, res) |
| 971 | res &= src; |
| 972 | flag_C = 0; |
| 973 | flag_V = 0; |
| 974 | flag_NotZ = res; |
| 975 | flag_N = res >> 8; |
| 976 | WRITE_WORD_F(adr, res) |
| 977 | POST_IO |
| 978 | RET(22) |
| 979 | } |
| 980 | |
| 981 | // ANDI |
| 982 | OPCODE(0x0278) |
| 983 | { |
| 984 | u32 adr, res; |
| 985 | u32 src, dst; |
| 986 | |
| 987 | FETCH_WORD(src); |
| 988 | FETCH_SWORD(adr); |
| 989 | PRE_IO |
| 990 | READ_WORD_F(adr, res) |
| 991 | res &= src; |
| 992 | flag_C = 0; |
| 993 | flag_V = 0; |
| 994 | flag_NotZ = res; |
| 995 | flag_N = res >> 8; |
| 996 | WRITE_WORD_F(adr, res) |
| 997 | POST_IO |
| 998 | RET(20) |
| 999 | } |
| 1000 | |
| 1001 | // ANDI |
| 1002 | OPCODE(0x0279) |
| 1003 | { |
| 1004 | u32 adr, res; |
| 1005 | u32 src, dst; |
| 1006 | |
| 1007 | FETCH_WORD(src); |
| 1008 | FETCH_LONG(adr); |
| 1009 | PRE_IO |
| 1010 | READ_WORD_F(adr, res) |
| 1011 | res &= src; |
| 1012 | flag_C = 0; |
| 1013 | flag_V = 0; |
| 1014 | flag_NotZ = res; |
| 1015 | flag_N = res >> 8; |
| 1016 | WRITE_WORD_F(adr, res) |
| 1017 | POST_IO |
| 1018 | RET(24) |
| 1019 | } |
| 1020 | |
| 1021 | // ANDI |
| 1022 | OPCODE(0x025F) |
| 1023 | { |
| 1024 | u32 adr, res; |
| 1025 | u32 src, dst; |
| 1026 | |
| 1027 | FETCH_WORD(src); |
| 1028 | adr = AREG(7); |
| 1029 | AREG(7) += 2; |
| 1030 | PRE_IO |
| 1031 | READ_WORD_F(adr, res) |
| 1032 | res &= src; |
| 1033 | flag_C = 0; |
| 1034 | flag_V = 0; |
| 1035 | flag_NotZ = res; |
| 1036 | flag_N = res >> 8; |
| 1037 | WRITE_WORD_F(adr, res) |
| 1038 | POST_IO |
| 1039 | RET(16) |
| 1040 | } |
| 1041 | |
| 1042 | // ANDI |
| 1043 | OPCODE(0x0267) |
| 1044 | { |
| 1045 | u32 adr, res; |
| 1046 | u32 src, dst; |
| 1047 | |
| 1048 | FETCH_WORD(src); |
| 1049 | adr = AREG(7) - 2; |
| 1050 | AREG(7) = adr; |
| 1051 | PRE_IO |
| 1052 | READ_WORD_F(adr, res) |
| 1053 | res &= src; |
| 1054 | flag_C = 0; |
| 1055 | flag_V = 0; |
| 1056 | flag_NotZ = res; |
| 1057 | flag_N = res >> 8; |
| 1058 | WRITE_WORD_F(adr, res) |
| 1059 | POST_IO |
| 1060 | RET(18) |
| 1061 | } |
| 1062 | |
| 1063 | // ANDI |
| 1064 | OPCODE(0x0280) |
| 1065 | { |
| 1066 | u32 adr, res; |
| 1067 | u32 src, dst; |
| 1068 | |
| 1069 | FETCH_LONG(src); |
| 1070 | res = DREGu32((Opcode >> 0) & 7); |
| 1071 | res &= src; |
| 1072 | flag_C = 0; |
| 1073 | flag_V = 0; |
| 1074 | flag_NotZ = res; |
| 1075 | flag_N = res >> 24; |
| 1076 | DREGu32((Opcode >> 0) & 7) = res; |
| 1077 | #ifdef USE_CYCLONE_TIMING |
| 1078 | RET(14) |
| 1079 | #else |
| 1080 | RET(16) |
| 1081 | #endif |
| 1082 | } |
| 1083 | |
| 1084 | // ANDI |
| 1085 | OPCODE(0x0290) |
| 1086 | { |
| 1087 | u32 adr, res; |
| 1088 | u32 src, dst; |
| 1089 | |
| 1090 | FETCH_LONG(src); |
| 1091 | adr = AREG((Opcode >> 0) & 7); |
| 1092 | PRE_IO |
| 1093 | READ_LONG_F(adr, res) |
| 1094 | res &= src; |
| 1095 | flag_C = 0; |
| 1096 | flag_V = 0; |
| 1097 | flag_NotZ = res; |
| 1098 | flag_N = res >> 24; |
| 1099 | WRITE_LONG_F(adr, res) |
| 1100 | POST_IO |
| 1101 | RET(28) |
| 1102 | } |
| 1103 | |
| 1104 | // ANDI |
| 1105 | OPCODE(0x0298) |
| 1106 | { |
| 1107 | u32 adr, res; |
| 1108 | u32 src, dst; |
| 1109 | |
| 1110 | FETCH_LONG(src); |
| 1111 | adr = AREG((Opcode >> 0) & 7); |
| 1112 | AREG((Opcode >> 0) & 7) += 4; |
| 1113 | PRE_IO |
| 1114 | READ_LONG_F(adr, res) |
| 1115 | res &= src; |
| 1116 | flag_C = 0; |
| 1117 | flag_V = 0; |
| 1118 | flag_NotZ = res; |
| 1119 | flag_N = res >> 24; |
| 1120 | WRITE_LONG_F(adr, res) |
| 1121 | POST_IO |
| 1122 | RET(28) |
| 1123 | } |
| 1124 | |
| 1125 | // ANDI |
| 1126 | OPCODE(0x02A0) |
| 1127 | { |
| 1128 | u32 adr, res; |
| 1129 | u32 src, dst; |
| 1130 | |
| 1131 | FETCH_LONG(src); |
| 1132 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 1133 | AREG((Opcode >> 0) & 7) = adr; |
| 1134 | PRE_IO |
| 1135 | READ_LONG_F(adr, res) |
| 1136 | res &= src; |
| 1137 | flag_C = 0; |
| 1138 | flag_V = 0; |
| 1139 | flag_NotZ = res; |
| 1140 | flag_N = res >> 24; |
| 1141 | WRITE_LONG_F(adr, res) |
| 1142 | POST_IO |
| 1143 | RET(30) |
| 1144 | } |
| 1145 | |
| 1146 | // ANDI |
| 1147 | OPCODE(0x02A8) |
| 1148 | { |
| 1149 | u32 adr, res; |
| 1150 | u32 src, dst; |
| 1151 | |
| 1152 | FETCH_LONG(src); |
| 1153 | FETCH_SWORD(adr); |
| 1154 | adr += AREG((Opcode >> 0) & 7); |
| 1155 | PRE_IO |
| 1156 | READ_LONG_F(adr, res) |
| 1157 | res &= src; |
| 1158 | flag_C = 0; |
| 1159 | flag_V = 0; |
| 1160 | flag_NotZ = res; |
| 1161 | flag_N = res >> 24; |
| 1162 | WRITE_LONG_F(adr, res) |
| 1163 | POST_IO |
| 1164 | RET(32) |
| 1165 | } |
| 1166 | |
| 1167 | // ANDI |
| 1168 | OPCODE(0x02B0) |
| 1169 | { |
| 1170 | u32 adr, res; |
| 1171 | u32 src, dst; |
| 1172 | |
| 1173 | FETCH_LONG(src); |
| 1174 | adr = AREG((Opcode >> 0) & 7); |
| 1175 | DECODE_EXT_WORD |
| 1176 | PRE_IO |
| 1177 | READ_LONG_F(adr, res) |
| 1178 | res &= src; |
| 1179 | flag_C = 0; |
| 1180 | flag_V = 0; |
| 1181 | flag_NotZ = res; |
| 1182 | flag_N = res >> 24; |
| 1183 | WRITE_LONG_F(adr, res) |
| 1184 | POST_IO |
| 1185 | RET(34) |
| 1186 | } |
| 1187 | |
| 1188 | // ANDI |
| 1189 | OPCODE(0x02B8) |
| 1190 | { |
| 1191 | u32 adr, res; |
| 1192 | u32 src, dst; |
| 1193 | |
| 1194 | FETCH_LONG(src); |
| 1195 | FETCH_SWORD(adr); |
| 1196 | PRE_IO |
| 1197 | READ_LONG_F(adr, res) |
| 1198 | res &= src; |
| 1199 | flag_C = 0; |
| 1200 | flag_V = 0; |
| 1201 | flag_NotZ = res; |
| 1202 | flag_N = res >> 24; |
| 1203 | WRITE_LONG_F(adr, res) |
| 1204 | POST_IO |
| 1205 | RET(32) |
| 1206 | } |
| 1207 | |
| 1208 | // ANDI |
| 1209 | OPCODE(0x02B9) |
| 1210 | { |
| 1211 | u32 adr, res; |
| 1212 | u32 src, dst; |
| 1213 | |
| 1214 | FETCH_LONG(src); |
| 1215 | FETCH_LONG(adr); |
| 1216 | PRE_IO |
| 1217 | READ_LONG_F(adr, res) |
| 1218 | res &= src; |
| 1219 | flag_C = 0; |
| 1220 | flag_V = 0; |
| 1221 | flag_NotZ = res; |
| 1222 | flag_N = res >> 24; |
| 1223 | WRITE_LONG_F(adr, res) |
| 1224 | POST_IO |
| 1225 | RET(36) |
| 1226 | } |
| 1227 | |
| 1228 | // ANDI |
| 1229 | OPCODE(0x029F) |
| 1230 | { |
| 1231 | u32 adr, res; |
| 1232 | u32 src, dst; |
| 1233 | |
| 1234 | FETCH_LONG(src); |
| 1235 | adr = AREG(7); |
| 1236 | AREG(7) += 4; |
| 1237 | PRE_IO |
| 1238 | READ_LONG_F(adr, res) |
| 1239 | res &= src; |
| 1240 | flag_C = 0; |
| 1241 | flag_V = 0; |
| 1242 | flag_NotZ = res; |
| 1243 | flag_N = res >> 24; |
| 1244 | WRITE_LONG_F(adr, res) |
| 1245 | POST_IO |
| 1246 | RET(28) |
| 1247 | } |
| 1248 | |
| 1249 | // ANDI |
| 1250 | OPCODE(0x02A7) |
| 1251 | { |
| 1252 | u32 adr, res; |
| 1253 | u32 src, dst; |
| 1254 | |
| 1255 | FETCH_LONG(src); |
| 1256 | adr = AREG(7) - 4; |
| 1257 | AREG(7) = adr; |
| 1258 | PRE_IO |
| 1259 | READ_LONG_F(adr, res) |
| 1260 | res &= src; |
| 1261 | flag_C = 0; |
| 1262 | flag_V = 0; |
| 1263 | flag_NotZ = res; |
| 1264 | flag_N = res >> 24; |
| 1265 | WRITE_LONG_F(adr, res) |
| 1266 | POST_IO |
| 1267 | RET(30) |
| 1268 | } |
| 1269 | |
| 1270 | // ANDICCR |
| 1271 | OPCODE(0x023C) |
| 1272 | { |
| 1273 | u32 adr, res; |
| 1274 | u32 src, dst; |
| 1275 | |
| 1276 | FETCH_BYTE(res); |
| 1277 | res &= M68K_CCR_MASK; |
| 1278 | res &= GET_CCR; |
| 1279 | SET_CCR(res) |
| 1280 | RET(20) |
| 1281 | } |
| 1282 | |
| 1283 | // ANDISR |
| 1284 | OPCODE(0x027C) |
| 1285 | { |
| 1286 | u32 adr, res; |
| 1287 | u32 src, dst; |
| 1288 | |
| 1289 | if (flag_S) |
| 1290 | { |
| 1291 | FETCH_WORD(res); |
| 1292 | res &= M68K_SR_MASK; |
| 1293 | res &= GET_SR; |
| 1294 | SET_SR(res) |
| 1295 | if (!flag_S) |
| 1296 | { |
| 1297 | res = AREG(7); |
| 1298 | AREG(7) = ASP; |
| 1299 | ASP = res; |
| 1300 | } |
| 1301 | CHECK_INT_TO_JUMP(20) |
| 1302 | } |
| 1303 | else |
| 1304 | { |
| 1305 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 1306 | RET(4) |
| 1307 | } |
| 1308 | RET(20) |
| 1309 | } |
| 1310 | |
| 1311 | // EORI |
| 1312 | OPCODE(0x0A00) |
| 1313 | { |
| 1314 | u32 adr, res; |
| 1315 | u32 src, dst; |
| 1316 | |
| 1317 | FETCH_BYTE(src); |
| 1318 | res = DREGu8((Opcode >> 0) & 7); |
| 1319 | res ^= src; |
| 1320 | flag_C = 0; |
| 1321 | flag_V = 0; |
| 1322 | flag_NotZ = res; |
| 1323 | flag_N = res; |
| 1324 | DREGu8((Opcode >> 0) & 7) = res; |
| 1325 | RET(8) |
| 1326 | } |
| 1327 | |
| 1328 | // EORI |
| 1329 | OPCODE(0x0A10) |
| 1330 | { |
| 1331 | u32 adr, res; |
| 1332 | u32 src, dst; |
| 1333 | |
| 1334 | FETCH_BYTE(src); |
| 1335 | adr = AREG((Opcode >> 0) & 7); |
| 1336 | PRE_IO |
| 1337 | READ_BYTE_F(adr, res) |
| 1338 | res ^= src; |
| 1339 | flag_C = 0; |
| 1340 | flag_V = 0; |
| 1341 | flag_NotZ = res; |
| 1342 | flag_N = res; |
| 1343 | WRITE_BYTE_F(adr, res) |
| 1344 | POST_IO |
| 1345 | RET(16) |
| 1346 | } |
| 1347 | |
| 1348 | // EORI |
| 1349 | OPCODE(0x0A18) |
| 1350 | { |
| 1351 | u32 adr, res; |
| 1352 | u32 src, dst; |
| 1353 | |
| 1354 | FETCH_BYTE(src); |
| 1355 | adr = AREG((Opcode >> 0) & 7); |
| 1356 | AREG((Opcode >> 0) & 7) += 1; |
| 1357 | PRE_IO |
| 1358 | READ_BYTE_F(adr, res) |
| 1359 | res ^= src; |
| 1360 | flag_C = 0; |
| 1361 | flag_V = 0; |
| 1362 | flag_NotZ = res; |
| 1363 | flag_N = res; |
| 1364 | WRITE_BYTE_F(adr, res) |
| 1365 | POST_IO |
| 1366 | RET(16) |
| 1367 | } |
| 1368 | |
| 1369 | // EORI |
| 1370 | OPCODE(0x0A20) |
| 1371 | { |
| 1372 | u32 adr, res; |
| 1373 | u32 src, dst; |
| 1374 | |
| 1375 | FETCH_BYTE(src); |
| 1376 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 1377 | AREG((Opcode >> 0) & 7) = adr; |
| 1378 | PRE_IO |
| 1379 | READ_BYTE_F(adr, res) |
| 1380 | res ^= src; |
| 1381 | flag_C = 0; |
| 1382 | flag_V = 0; |
| 1383 | flag_NotZ = res; |
| 1384 | flag_N = res; |
| 1385 | WRITE_BYTE_F(adr, res) |
| 1386 | POST_IO |
| 1387 | RET(18) |
| 1388 | } |
| 1389 | |
| 1390 | // EORI |
| 1391 | OPCODE(0x0A28) |
| 1392 | { |
| 1393 | u32 adr, res; |
| 1394 | u32 src, dst; |
| 1395 | |
| 1396 | FETCH_BYTE(src); |
| 1397 | FETCH_SWORD(adr); |
| 1398 | adr += AREG((Opcode >> 0) & 7); |
| 1399 | PRE_IO |
| 1400 | READ_BYTE_F(adr, res) |
| 1401 | res ^= src; |
| 1402 | flag_C = 0; |
| 1403 | flag_V = 0; |
| 1404 | flag_NotZ = res; |
| 1405 | flag_N = res; |
| 1406 | WRITE_BYTE_F(adr, res) |
| 1407 | POST_IO |
| 1408 | RET(20) |
| 1409 | } |
| 1410 | |
| 1411 | // EORI |
| 1412 | OPCODE(0x0A30) |
| 1413 | { |
| 1414 | u32 adr, res; |
| 1415 | u32 src, dst; |
| 1416 | |
| 1417 | FETCH_BYTE(src); |
| 1418 | adr = AREG((Opcode >> 0) & 7); |
| 1419 | DECODE_EXT_WORD |
| 1420 | PRE_IO |
| 1421 | READ_BYTE_F(adr, res) |
| 1422 | res ^= src; |
| 1423 | flag_C = 0; |
| 1424 | flag_V = 0; |
| 1425 | flag_NotZ = res; |
| 1426 | flag_N = res; |
| 1427 | WRITE_BYTE_F(adr, res) |
| 1428 | POST_IO |
| 1429 | RET(22) |
| 1430 | } |
| 1431 | |
| 1432 | // EORI |
| 1433 | OPCODE(0x0A38) |
| 1434 | { |
| 1435 | u32 adr, res; |
| 1436 | u32 src, dst; |
| 1437 | |
| 1438 | FETCH_BYTE(src); |
| 1439 | FETCH_SWORD(adr); |
| 1440 | PRE_IO |
| 1441 | READ_BYTE_F(adr, res) |
| 1442 | res ^= src; |
| 1443 | flag_C = 0; |
| 1444 | flag_V = 0; |
| 1445 | flag_NotZ = res; |
| 1446 | flag_N = res; |
| 1447 | WRITE_BYTE_F(adr, res) |
| 1448 | POST_IO |
| 1449 | RET(20) |
| 1450 | } |
| 1451 | |
| 1452 | // EORI |
| 1453 | OPCODE(0x0A39) |
| 1454 | { |
| 1455 | u32 adr, res; |
| 1456 | u32 src, dst; |
| 1457 | |
| 1458 | FETCH_BYTE(src); |
| 1459 | FETCH_LONG(adr); |
| 1460 | PRE_IO |
| 1461 | READ_BYTE_F(adr, res) |
| 1462 | res ^= src; |
| 1463 | flag_C = 0; |
| 1464 | flag_V = 0; |
| 1465 | flag_NotZ = res; |
| 1466 | flag_N = res; |
| 1467 | WRITE_BYTE_F(adr, res) |
| 1468 | POST_IO |
| 1469 | RET(24) |
| 1470 | } |
| 1471 | |
| 1472 | // EORI |
| 1473 | OPCODE(0x0A1F) |
| 1474 | { |
| 1475 | u32 adr, res; |
| 1476 | u32 src, dst; |
| 1477 | |
| 1478 | FETCH_BYTE(src); |
| 1479 | adr = AREG(7); |
| 1480 | AREG(7) += 2; |
| 1481 | PRE_IO |
| 1482 | READ_BYTE_F(adr, res) |
| 1483 | res ^= src; |
| 1484 | flag_C = 0; |
| 1485 | flag_V = 0; |
| 1486 | flag_NotZ = res; |
| 1487 | flag_N = res; |
| 1488 | WRITE_BYTE_F(adr, res) |
| 1489 | POST_IO |
| 1490 | RET(16) |
| 1491 | } |
| 1492 | |
| 1493 | // EORI |
| 1494 | OPCODE(0x0A27) |
| 1495 | { |
| 1496 | u32 adr, res; |
| 1497 | u32 src, dst; |
| 1498 | |
| 1499 | FETCH_BYTE(src); |
| 1500 | adr = AREG(7) - 2; |
| 1501 | AREG(7) = adr; |
| 1502 | PRE_IO |
| 1503 | READ_BYTE_F(adr, res) |
| 1504 | res ^= src; |
| 1505 | flag_C = 0; |
| 1506 | flag_V = 0; |
| 1507 | flag_NotZ = res; |
| 1508 | flag_N = res; |
| 1509 | WRITE_BYTE_F(adr, res) |
| 1510 | POST_IO |
| 1511 | RET(18) |
| 1512 | } |
| 1513 | |
| 1514 | // EORI |
| 1515 | OPCODE(0x0A40) |
| 1516 | { |
| 1517 | u32 adr, res; |
| 1518 | u32 src, dst; |
| 1519 | |
| 1520 | FETCH_WORD(src); |
| 1521 | res = DREGu16((Opcode >> 0) & 7); |
| 1522 | res ^= src; |
| 1523 | flag_C = 0; |
| 1524 | flag_V = 0; |
| 1525 | flag_NotZ = res; |
| 1526 | flag_N = res >> 8; |
| 1527 | DREGu16((Opcode >> 0) & 7) = res; |
| 1528 | RET(8) |
| 1529 | } |
| 1530 | |
| 1531 | // EORI |
| 1532 | OPCODE(0x0A50) |
| 1533 | { |
| 1534 | u32 adr, res; |
| 1535 | u32 src, dst; |
| 1536 | |
| 1537 | FETCH_WORD(src); |
| 1538 | adr = AREG((Opcode >> 0) & 7); |
| 1539 | PRE_IO |
| 1540 | READ_WORD_F(adr, res) |
| 1541 | res ^= src; |
| 1542 | flag_C = 0; |
| 1543 | flag_V = 0; |
| 1544 | flag_NotZ = res; |
| 1545 | flag_N = res >> 8; |
| 1546 | WRITE_WORD_F(adr, res) |
| 1547 | POST_IO |
| 1548 | RET(16) |
| 1549 | } |
| 1550 | |
| 1551 | // EORI |
| 1552 | OPCODE(0x0A58) |
| 1553 | { |
| 1554 | u32 adr, res; |
| 1555 | u32 src, dst; |
| 1556 | |
| 1557 | FETCH_WORD(src); |
| 1558 | adr = AREG((Opcode >> 0) & 7); |
| 1559 | AREG((Opcode >> 0) & 7) += 2; |
| 1560 | PRE_IO |
| 1561 | READ_WORD_F(adr, res) |
| 1562 | res ^= src; |
| 1563 | flag_C = 0; |
| 1564 | flag_V = 0; |
| 1565 | flag_NotZ = res; |
| 1566 | flag_N = res >> 8; |
| 1567 | WRITE_WORD_F(adr, res) |
| 1568 | POST_IO |
| 1569 | RET(16) |
| 1570 | } |
| 1571 | |
| 1572 | // EORI |
| 1573 | OPCODE(0x0A60) |
| 1574 | { |
| 1575 | u32 adr, res; |
| 1576 | u32 src, dst; |
| 1577 | |
| 1578 | FETCH_WORD(src); |
| 1579 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 1580 | AREG((Opcode >> 0) & 7) = adr; |
| 1581 | PRE_IO |
| 1582 | READ_WORD_F(adr, res) |
| 1583 | res ^= src; |
| 1584 | flag_C = 0; |
| 1585 | flag_V = 0; |
| 1586 | flag_NotZ = res; |
| 1587 | flag_N = res >> 8; |
| 1588 | WRITE_WORD_F(adr, res) |
| 1589 | POST_IO |
| 1590 | RET(18) |
| 1591 | } |
| 1592 | |
| 1593 | // EORI |
| 1594 | OPCODE(0x0A68) |
| 1595 | { |
| 1596 | u32 adr, res; |
| 1597 | u32 src, dst; |
| 1598 | |
| 1599 | FETCH_WORD(src); |
| 1600 | FETCH_SWORD(adr); |
| 1601 | adr += AREG((Opcode >> 0) & 7); |
| 1602 | PRE_IO |
| 1603 | READ_WORD_F(adr, res) |
| 1604 | res ^= src; |
| 1605 | flag_C = 0; |
| 1606 | flag_V = 0; |
| 1607 | flag_NotZ = res; |
| 1608 | flag_N = res >> 8; |
| 1609 | WRITE_WORD_F(adr, res) |
| 1610 | POST_IO |
| 1611 | RET(20) |
| 1612 | } |
| 1613 | |
| 1614 | // EORI |
| 1615 | OPCODE(0x0A70) |
| 1616 | { |
| 1617 | u32 adr, res; |
| 1618 | u32 src, dst; |
| 1619 | |
| 1620 | FETCH_WORD(src); |
| 1621 | adr = AREG((Opcode >> 0) & 7); |
| 1622 | DECODE_EXT_WORD |
| 1623 | PRE_IO |
| 1624 | READ_WORD_F(adr, res) |
| 1625 | res ^= src; |
| 1626 | flag_C = 0; |
| 1627 | flag_V = 0; |
| 1628 | flag_NotZ = res; |
| 1629 | flag_N = res >> 8; |
| 1630 | WRITE_WORD_F(adr, res) |
| 1631 | POST_IO |
| 1632 | RET(22) |
| 1633 | } |
| 1634 | |
| 1635 | // EORI |
| 1636 | OPCODE(0x0A78) |
| 1637 | { |
| 1638 | u32 adr, res; |
| 1639 | u32 src, dst; |
| 1640 | |
| 1641 | FETCH_WORD(src); |
| 1642 | FETCH_SWORD(adr); |
| 1643 | PRE_IO |
| 1644 | READ_WORD_F(adr, res) |
| 1645 | res ^= src; |
| 1646 | flag_C = 0; |
| 1647 | flag_V = 0; |
| 1648 | flag_NotZ = res; |
| 1649 | flag_N = res >> 8; |
| 1650 | WRITE_WORD_F(adr, res) |
| 1651 | POST_IO |
| 1652 | RET(20) |
| 1653 | } |
| 1654 | |
| 1655 | // EORI |
| 1656 | OPCODE(0x0A79) |
| 1657 | { |
| 1658 | u32 adr, res; |
| 1659 | u32 src, dst; |
| 1660 | |
| 1661 | FETCH_WORD(src); |
| 1662 | FETCH_LONG(adr); |
| 1663 | PRE_IO |
| 1664 | READ_WORD_F(adr, res) |
| 1665 | res ^= src; |
| 1666 | flag_C = 0; |
| 1667 | flag_V = 0; |
| 1668 | flag_NotZ = res; |
| 1669 | flag_N = res >> 8; |
| 1670 | WRITE_WORD_F(adr, res) |
| 1671 | POST_IO |
| 1672 | RET(24) |
| 1673 | } |
| 1674 | |
| 1675 | // EORI |
| 1676 | OPCODE(0x0A5F) |
| 1677 | { |
| 1678 | u32 adr, res; |
| 1679 | u32 src, dst; |
| 1680 | |
| 1681 | FETCH_WORD(src); |
| 1682 | adr = AREG(7); |
| 1683 | AREG(7) += 2; |
| 1684 | PRE_IO |
| 1685 | READ_WORD_F(adr, res) |
| 1686 | res ^= src; |
| 1687 | flag_C = 0; |
| 1688 | flag_V = 0; |
| 1689 | flag_NotZ = res; |
| 1690 | flag_N = res >> 8; |
| 1691 | WRITE_WORD_F(adr, res) |
| 1692 | POST_IO |
| 1693 | RET(16) |
| 1694 | } |
| 1695 | |
| 1696 | // EORI |
| 1697 | OPCODE(0x0A67) |
| 1698 | { |
| 1699 | u32 adr, res; |
| 1700 | u32 src, dst; |
| 1701 | |
| 1702 | FETCH_WORD(src); |
| 1703 | adr = AREG(7) - 2; |
| 1704 | AREG(7) = adr; |
| 1705 | PRE_IO |
| 1706 | READ_WORD_F(adr, res) |
| 1707 | res ^= src; |
| 1708 | flag_C = 0; |
| 1709 | flag_V = 0; |
| 1710 | flag_NotZ = res; |
| 1711 | flag_N = res >> 8; |
| 1712 | WRITE_WORD_F(adr, res) |
| 1713 | POST_IO |
| 1714 | RET(18) |
| 1715 | } |
| 1716 | |
| 1717 | // EORI |
| 1718 | OPCODE(0x0A80) |
| 1719 | { |
| 1720 | u32 adr, res; |
| 1721 | u32 src, dst; |
| 1722 | |
| 1723 | FETCH_LONG(src); |
| 1724 | res = DREGu32((Opcode >> 0) & 7); |
| 1725 | res ^= src; |
| 1726 | flag_C = 0; |
| 1727 | flag_V = 0; |
| 1728 | flag_NotZ = res; |
| 1729 | flag_N = res >> 24; |
| 1730 | DREGu32((Opcode >> 0) & 7) = res; |
| 1731 | RET(16) |
| 1732 | } |
| 1733 | |
| 1734 | // EORI |
| 1735 | OPCODE(0x0A90) |
| 1736 | { |
| 1737 | u32 adr, res; |
| 1738 | u32 src, dst; |
| 1739 | |
| 1740 | FETCH_LONG(src); |
| 1741 | adr = AREG((Opcode >> 0) & 7); |
| 1742 | PRE_IO |
| 1743 | READ_LONG_F(adr, res) |
| 1744 | res ^= src; |
| 1745 | flag_C = 0; |
| 1746 | flag_V = 0; |
| 1747 | flag_NotZ = res; |
| 1748 | flag_N = res >> 24; |
| 1749 | WRITE_LONG_F(adr, res) |
| 1750 | POST_IO |
| 1751 | RET(28) |
| 1752 | } |
| 1753 | |
| 1754 | // EORI |
| 1755 | OPCODE(0x0A98) |
| 1756 | { |
| 1757 | u32 adr, res; |
| 1758 | u32 src, dst; |
| 1759 | |
| 1760 | FETCH_LONG(src); |
| 1761 | adr = AREG((Opcode >> 0) & 7); |
| 1762 | AREG((Opcode >> 0) & 7) += 4; |
| 1763 | PRE_IO |
| 1764 | READ_LONG_F(adr, res) |
| 1765 | res ^= src; |
| 1766 | flag_C = 0; |
| 1767 | flag_V = 0; |
| 1768 | flag_NotZ = res; |
| 1769 | flag_N = res >> 24; |
| 1770 | WRITE_LONG_F(adr, res) |
| 1771 | POST_IO |
| 1772 | RET(28) |
| 1773 | } |
| 1774 | |
| 1775 | // EORI |
| 1776 | OPCODE(0x0AA0) |
| 1777 | { |
| 1778 | u32 adr, res; |
| 1779 | u32 src, dst; |
| 1780 | |
| 1781 | FETCH_LONG(src); |
| 1782 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 1783 | AREG((Opcode >> 0) & 7) = adr; |
| 1784 | PRE_IO |
| 1785 | READ_LONG_F(adr, res) |
| 1786 | res ^= src; |
| 1787 | flag_C = 0; |
| 1788 | flag_V = 0; |
| 1789 | flag_NotZ = res; |
| 1790 | flag_N = res >> 24; |
| 1791 | WRITE_LONG_F(adr, res) |
| 1792 | POST_IO |
| 1793 | RET(30) |
| 1794 | } |
| 1795 | |
| 1796 | // EORI |
| 1797 | OPCODE(0x0AA8) |
| 1798 | { |
| 1799 | u32 adr, res; |
| 1800 | u32 src, dst; |
| 1801 | |
| 1802 | FETCH_LONG(src); |
| 1803 | FETCH_SWORD(adr); |
| 1804 | adr += AREG((Opcode >> 0) & 7); |
| 1805 | PRE_IO |
| 1806 | READ_LONG_F(adr, res) |
| 1807 | res ^= src; |
| 1808 | flag_C = 0; |
| 1809 | flag_V = 0; |
| 1810 | flag_NotZ = res; |
| 1811 | flag_N = res >> 24; |
| 1812 | WRITE_LONG_F(adr, res) |
| 1813 | POST_IO |
| 1814 | RET(32) |
| 1815 | } |
| 1816 | |
| 1817 | // EORI |
| 1818 | OPCODE(0x0AB0) |
| 1819 | { |
| 1820 | u32 adr, res; |
| 1821 | u32 src, dst; |
| 1822 | |
| 1823 | FETCH_LONG(src); |
| 1824 | adr = AREG((Opcode >> 0) & 7); |
| 1825 | DECODE_EXT_WORD |
| 1826 | PRE_IO |
| 1827 | READ_LONG_F(adr, res) |
| 1828 | res ^= src; |
| 1829 | flag_C = 0; |
| 1830 | flag_V = 0; |
| 1831 | flag_NotZ = res; |
| 1832 | flag_N = res >> 24; |
| 1833 | WRITE_LONG_F(adr, res) |
| 1834 | POST_IO |
| 1835 | RET(34) |
| 1836 | } |
| 1837 | |
| 1838 | // EORI |
| 1839 | OPCODE(0x0AB8) |
| 1840 | { |
| 1841 | u32 adr, res; |
| 1842 | u32 src, dst; |
| 1843 | |
| 1844 | FETCH_LONG(src); |
| 1845 | FETCH_SWORD(adr); |
| 1846 | PRE_IO |
| 1847 | READ_LONG_F(adr, res) |
| 1848 | res ^= src; |
| 1849 | flag_C = 0; |
| 1850 | flag_V = 0; |
| 1851 | flag_NotZ = res; |
| 1852 | flag_N = res >> 24; |
| 1853 | WRITE_LONG_F(adr, res) |
| 1854 | POST_IO |
| 1855 | RET(32) |
| 1856 | } |
| 1857 | |
| 1858 | // EORI |
| 1859 | OPCODE(0x0AB9) |
| 1860 | { |
| 1861 | u32 adr, res; |
| 1862 | u32 src, dst; |
| 1863 | |
| 1864 | FETCH_LONG(src); |
| 1865 | FETCH_LONG(adr); |
| 1866 | PRE_IO |
| 1867 | READ_LONG_F(adr, res) |
| 1868 | res ^= src; |
| 1869 | flag_C = 0; |
| 1870 | flag_V = 0; |
| 1871 | flag_NotZ = res; |
| 1872 | flag_N = res >> 24; |
| 1873 | WRITE_LONG_F(adr, res) |
| 1874 | POST_IO |
| 1875 | RET(36) |
| 1876 | } |
| 1877 | |
| 1878 | // EORI |
| 1879 | OPCODE(0x0A9F) |
| 1880 | { |
| 1881 | u32 adr, res; |
| 1882 | u32 src, dst; |
| 1883 | |
| 1884 | FETCH_LONG(src); |
| 1885 | adr = AREG(7); |
| 1886 | AREG(7) += 4; |
| 1887 | PRE_IO |
| 1888 | READ_LONG_F(adr, res) |
| 1889 | res ^= src; |
| 1890 | flag_C = 0; |
| 1891 | flag_V = 0; |
| 1892 | flag_NotZ = res; |
| 1893 | flag_N = res >> 24; |
| 1894 | WRITE_LONG_F(adr, res) |
| 1895 | POST_IO |
| 1896 | RET(28) |
| 1897 | } |
| 1898 | |
| 1899 | // EORI |
| 1900 | OPCODE(0x0AA7) |
| 1901 | { |
| 1902 | u32 adr, res; |
| 1903 | u32 src, dst; |
| 1904 | |
| 1905 | FETCH_LONG(src); |
| 1906 | adr = AREG(7) - 4; |
| 1907 | AREG(7) = adr; |
| 1908 | PRE_IO |
| 1909 | READ_LONG_F(adr, res) |
| 1910 | res ^= src; |
| 1911 | flag_C = 0; |
| 1912 | flag_V = 0; |
| 1913 | flag_NotZ = res; |
| 1914 | flag_N = res >> 24; |
| 1915 | WRITE_LONG_F(adr, res) |
| 1916 | POST_IO |
| 1917 | RET(30) |
| 1918 | } |
| 1919 | |
| 1920 | // EORICCR |
| 1921 | OPCODE(0x0A3C) |
| 1922 | { |
| 1923 | u32 adr, res; |
| 1924 | u32 src, dst; |
| 1925 | |
| 1926 | FETCH_BYTE(res); |
| 1927 | res &= M68K_CCR_MASK; |
| 1928 | res ^= GET_CCR; |
| 1929 | SET_CCR(res) |
| 1930 | RET(20) |
| 1931 | } |
| 1932 | |
| 1933 | // EORISR |
| 1934 | OPCODE(0x0A7C) |
| 1935 | { |
| 1936 | u32 adr, res; |
| 1937 | u32 src, dst; |
| 1938 | |
| 1939 | if (flag_S) |
| 1940 | { |
| 1941 | FETCH_WORD(res); |
| 1942 | res &= M68K_SR_MASK; |
| 1943 | res ^= GET_SR; |
| 1944 | SET_SR(res) |
| 1945 | if (!flag_S) |
| 1946 | { |
| 1947 | res = AREG(7); |
| 1948 | AREG(7) = ASP; |
| 1949 | ASP = res; |
| 1950 | } |
| 1951 | CHECK_INT_TO_JUMP(20) |
| 1952 | } |
| 1953 | else |
| 1954 | { |
| 1955 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 1956 | RET(0) |
| 1957 | } |
| 1958 | RET(20) |
| 1959 | } |
| 1960 | |
| 1961 | // SUBI |
| 1962 | OPCODE(0x0400) |
| 1963 | { |
| 1964 | u32 adr, res; |
| 1965 | u32 src, dst; |
| 1966 | |
| 1967 | FETCH_BYTE(src); |
| 1968 | dst = DREGu8((Opcode >> 0) & 7); |
| 1969 | res = dst - src; |
| 1970 | flag_N = flag_X = flag_C = res; |
| 1971 | flag_V = (src ^ dst) & (res ^ dst); |
| 1972 | flag_NotZ = res & 0xFF; |
| 1973 | DREGu8((Opcode >> 0) & 7) = res; |
| 1974 | RET(8) |
| 1975 | } |
| 1976 | |
| 1977 | // SUBI |
| 1978 | OPCODE(0x0410) |
| 1979 | { |
| 1980 | u32 adr, res; |
| 1981 | u32 src, dst; |
| 1982 | |
| 1983 | FETCH_BYTE(src); |
| 1984 | adr = AREG((Opcode >> 0) & 7); |
| 1985 | PRE_IO |
| 1986 | READ_BYTE_F(adr, dst) |
| 1987 | res = dst - src; |
| 1988 | flag_N = flag_X = flag_C = res; |
| 1989 | flag_V = (src ^ dst) & (res ^ dst); |
| 1990 | flag_NotZ = res & 0xFF; |
| 1991 | WRITE_BYTE_F(adr, res) |
| 1992 | POST_IO |
| 1993 | RET(16) |
| 1994 | } |
| 1995 | |
| 1996 | // SUBI |
| 1997 | OPCODE(0x0418) |
| 1998 | { |
| 1999 | u32 adr, res; |
| 2000 | u32 src, dst; |
| 2001 | |
| 2002 | FETCH_BYTE(src); |
| 2003 | adr = AREG((Opcode >> 0) & 7); |
| 2004 | AREG((Opcode >> 0) & 7) += 1; |
| 2005 | PRE_IO |
| 2006 | READ_BYTE_F(adr, dst) |
| 2007 | res = dst - src; |
| 2008 | flag_N = flag_X = flag_C = res; |
| 2009 | flag_V = (src ^ dst) & (res ^ dst); |
| 2010 | flag_NotZ = res & 0xFF; |
| 2011 | WRITE_BYTE_F(adr, res) |
| 2012 | POST_IO |
| 2013 | RET(16) |
| 2014 | } |
| 2015 | |
| 2016 | // SUBI |
| 2017 | OPCODE(0x0420) |
| 2018 | { |
| 2019 | u32 adr, res; |
| 2020 | u32 src, dst; |
| 2021 | |
| 2022 | FETCH_BYTE(src); |
| 2023 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 2024 | AREG((Opcode >> 0) & 7) = adr; |
| 2025 | PRE_IO |
| 2026 | READ_BYTE_F(adr, dst) |
| 2027 | res = dst - src; |
| 2028 | flag_N = flag_X = flag_C = res; |
| 2029 | flag_V = (src ^ dst) & (res ^ dst); |
| 2030 | flag_NotZ = res & 0xFF; |
| 2031 | WRITE_BYTE_F(adr, res) |
| 2032 | POST_IO |
| 2033 | RET(18) |
| 2034 | } |
| 2035 | |
| 2036 | // SUBI |
| 2037 | OPCODE(0x0428) |
| 2038 | { |
| 2039 | u32 adr, res; |
| 2040 | u32 src, dst; |
| 2041 | |
| 2042 | FETCH_BYTE(src); |
| 2043 | FETCH_SWORD(adr); |
| 2044 | adr += AREG((Opcode >> 0) & 7); |
| 2045 | PRE_IO |
| 2046 | READ_BYTE_F(adr, dst) |
| 2047 | res = dst - src; |
| 2048 | flag_N = flag_X = flag_C = res; |
| 2049 | flag_V = (src ^ dst) & (res ^ dst); |
| 2050 | flag_NotZ = res & 0xFF; |
| 2051 | WRITE_BYTE_F(adr, res) |
| 2052 | POST_IO |
| 2053 | RET(20) |
| 2054 | } |
| 2055 | |
| 2056 | // SUBI |
| 2057 | OPCODE(0x0430) |
| 2058 | { |
| 2059 | u32 adr, res; |
| 2060 | u32 src, dst; |
| 2061 | |
| 2062 | FETCH_BYTE(src); |
| 2063 | adr = AREG((Opcode >> 0) & 7); |
| 2064 | DECODE_EXT_WORD |
| 2065 | PRE_IO |
| 2066 | READ_BYTE_F(adr, dst) |
| 2067 | res = dst - src; |
| 2068 | flag_N = flag_X = flag_C = res; |
| 2069 | flag_V = (src ^ dst) & (res ^ dst); |
| 2070 | flag_NotZ = res & 0xFF; |
| 2071 | WRITE_BYTE_F(adr, res) |
| 2072 | POST_IO |
| 2073 | RET(22) |
| 2074 | } |
| 2075 | |
| 2076 | // SUBI |
| 2077 | OPCODE(0x0438) |
| 2078 | { |
| 2079 | u32 adr, res; |
| 2080 | u32 src, dst; |
| 2081 | |
| 2082 | FETCH_BYTE(src); |
| 2083 | FETCH_SWORD(adr); |
| 2084 | PRE_IO |
| 2085 | READ_BYTE_F(adr, dst) |
| 2086 | res = dst - src; |
| 2087 | flag_N = flag_X = flag_C = res; |
| 2088 | flag_V = (src ^ dst) & (res ^ dst); |
| 2089 | flag_NotZ = res & 0xFF; |
| 2090 | WRITE_BYTE_F(adr, res) |
| 2091 | POST_IO |
| 2092 | RET(20) |
| 2093 | } |
| 2094 | |
| 2095 | // SUBI |
| 2096 | OPCODE(0x0439) |
| 2097 | { |
| 2098 | u32 adr, res; |
| 2099 | u32 src, dst; |
| 2100 | |
| 2101 | FETCH_BYTE(src); |
| 2102 | FETCH_LONG(adr); |
| 2103 | PRE_IO |
| 2104 | READ_BYTE_F(adr, dst) |
| 2105 | res = dst - src; |
| 2106 | flag_N = flag_X = flag_C = res; |
| 2107 | flag_V = (src ^ dst) & (res ^ dst); |
| 2108 | flag_NotZ = res & 0xFF; |
| 2109 | WRITE_BYTE_F(adr, res) |
| 2110 | POST_IO |
| 2111 | RET(24) |
| 2112 | } |
| 2113 | |
| 2114 | // SUBI |
| 2115 | OPCODE(0x041F) |
| 2116 | { |
| 2117 | u32 adr, res; |
| 2118 | u32 src, dst; |
| 2119 | |
| 2120 | FETCH_BYTE(src); |
| 2121 | adr = AREG(7); |
| 2122 | AREG(7) += 2; |
| 2123 | PRE_IO |
| 2124 | READ_BYTE_F(adr, dst) |
| 2125 | res = dst - src; |
| 2126 | flag_N = flag_X = flag_C = res; |
| 2127 | flag_V = (src ^ dst) & (res ^ dst); |
| 2128 | flag_NotZ = res & 0xFF; |
| 2129 | WRITE_BYTE_F(adr, res) |
| 2130 | POST_IO |
| 2131 | RET(16) |
| 2132 | } |
| 2133 | |
| 2134 | // SUBI |
| 2135 | OPCODE(0x0427) |
| 2136 | { |
| 2137 | u32 adr, res; |
| 2138 | u32 src, dst; |
| 2139 | |
| 2140 | FETCH_BYTE(src); |
| 2141 | adr = AREG(7) - 2; |
| 2142 | AREG(7) = adr; |
| 2143 | PRE_IO |
| 2144 | READ_BYTE_F(adr, dst) |
| 2145 | res = dst - src; |
| 2146 | flag_N = flag_X = flag_C = res; |
| 2147 | flag_V = (src ^ dst) & (res ^ dst); |
| 2148 | flag_NotZ = res & 0xFF; |
| 2149 | WRITE_BYTE_F(adr, res) |
| 2150 | POST_IO |
| 2151 | RET(18) |
| 2152 | } |
| 2153 | |
| 2154 | // SUBI |
| 2155 | OPCODE(0x0440) |
| 2156 | { |
| 2157 | u32 adr, res; |
| 2158 | u32 src, dst; |
| 2159 | |
| 2160 | FETCH_WORD(src); |
| 2161 | dst = DREGu16((Opcode >> 0) & 7); |
| 2162 | res = dst - src; |
| 2163 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2164 | flag_N = flag_X = flag_C = res >> 8; |
| 2165 | flag_NotZ = res & 0xFFFF; |
| 2166 | DREGu16((Opcode >> 0) & 7) = res; |
| 2167 | RET(8) |
| 2168 | } |
| 2169 | |
| 2170 | // SUBI |
| 2171 | OPCODE(0x0450) |
| 2172 | { |
| 2173 | u32 adr, res; |
| 2174 | u32 src, dst; |
| 2175 | |
| 2176 | FETCH_WORD(src); |
| 2177 | adr = AREG((Opcode >> 0) & 7); |
| 2178 | PRE_IO |
| 2179 | READ_WORD_F(adr, dst) |
| 2180 | res = dst - src; |
| 2181 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2182 | flag_N = flag_X = flag_C = res >> 8; |
| 2183 | flag_NotZ = res & 0xFFFF; |
| 2184 | WRITE_WORD_F(adr, res) |
| 2185 | POST_IO |
| 2186 | RET(16) |
| 2187 | } |
| 2188 | |
| 2189 | // SUBI |
| 2190 | OPCODE(0x0458) |
| 2191 | { |
| 2192 | u32 adr, res; |
| 2193 | u32 src, dst; |
| 2194 | |
| 2195 | FETCH_WORD(src); |
| 2196 | adr = AREG((Opcode >> 0) & 7); |
| 2197 | AREG((Opcode >> 0) & 7) += 2; |
| 2198 | PRE_IO |
| 2199 | READ_WORD_F(adr, dst) |
| 2200 | res = dst - src; |
| 2201 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2202 | flag_N = flag_X = flag_C = res >> 8; |
| 2203 | flag_NotZ = res & 0xFFFF; |
| 2204 | WRITE_WORD_F(adr, res) |
| 2205 | POST_IO |
| 2206 | RET(16) |
| 2207 | } |
| 2208 | |
| 2209 | // SUBI |
| 2210 | OPCODE(0x0460) |
| 2211 | { |
| 2212 | u32 adr, res; |
| 2213 | u32 src, dst; |
| 2214 | |
| 2215 | FETCH_WORD(src); |
| 2216 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 2217 | AREG((Opcode >> 0) & 7) = adr; |
| 2218 | PRE_IO |
| 2219 | READ_WORD_F(adr, dst) |
| 2220 | res = dst - src; |
| 2221 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2222 | flag_N = flag_X = flag_C = res >> 8; |
| 2223 | flag_NotZ = res & 0xFFFF; |
| 2224 | WRITE_WORD_F(adr, res) |
| 2225 | POST_IO |
| 2226 | RET(18) |
| 2227 | } |
| 2228 | |
| 2229 | // SUBI |
| 2230 | OPCODE(0x0468) |
| 2231 | { |
| 2232 | u32 adr, res; |
| 2233 | u32 src, dst; |
| 2234 | |
| 2235 | FETCH_WORD(src); |
| 2236 | FETCH_SWORD(adr); |
| 2237 | adr += AREG((Opcode >> 0) & 7); |
| 2238 | PRE_IO |
| 2239 | READ_WORD_F(adr, dst) |
| 2240 | res = dst - src; |
| 2241 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2242 | flag_N = flag_X = flag_C = res >> 8; |
| 2243 | flag_NotZ = res & 0xFFFF; |
| 2244 | WRITE_WORD_F(adr, res) |
| 2245 | POST_IO |
| 2246 | RET(20) |
| 2247 | } |
| 2248 | |
| 2249 | // SUBI |
| 2250 | OPCODE(0x0470) |
| 2251 | { |
| 2252 | u32 adr, res; |
| 2253 | u32 src, dst; |
| 2254 | |
| 2255 | FETCH_WORD(src); |
| 2256 | adr = AREG((Opcode >> 0) & 7); |
| 2257 | DECODE_EXT_WORD |
| 2258 | PRE_IO |
| 2259 | READ_WORD_F(adr, dst) |
| 2260 | res = dst - src; |
| 2261 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2262 | flag_N = flag_X = flag_C = res >> 8; |
| 2263 | flag_NotZ = res & 0xFFFF; |
| 2264 | WRITE_WORD_F(adr, res) |
| 2265 | POST_IO |
| 2266 | RET(22) |
| 2267 | } |
| 2268 | |
| 2269 | // SUBI |
| 2270 | OPCODE(0x0478) |
| 2271 | { |
| 2272 | u32 adr, res; |
| 2273 | u32 src, dst; |
| 2274 | |
| 2275 | FETCH_WORD(src); |
| 2276 | FETCH_SWORD(adr); |
| 2277 | PRE_IO |
| 2278 | READ_WORD_F(adr, dst) |
| 2279 | res = dst - src; |
| 2280 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2281 | flag_N = flag_X = flag_C = res >> 8; |
| 2282 | flag_NotZ = res & 0xFFFF; |
| 2283 | WRITE_WORD_F(adr, res) |
| 2284 | POST_IO |
| 2285 | RET(20) |
| 2286 | } |
| 2287 | |
| 2288 | // SUBI |
| 2289 | OPCODE(0x0479) |
| 2290 | { |
| 2291 | u32 adr, res; |
| 2292 | u32 src, dst; |
| 2293 | |
| 2294 | FETCH_WORD(src); |
| 2295 | FETCH_LONG(adr); |
| 2296 | PRE_IO |
| 2297 | READ_WORD_F(adr, dst) |
| 2298 | res = dst - src; |
| 2299 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2300 | flag_N = flag_X = flag_C = res >> 8; |
| 2301 | flag_NotZ = res & 0xFFFF; |
| 2302 | WRITE_WORD_F(adr, res) |
| 2303 | POST_IO |
| 2304 | RET(24) |
| 2305 | } |
| 2306 | |
| 2307 | // SUBI |
| 2308 | OPCODE(0x045F) |
| 2309 | { |
| 2310 | u32 adr, res; |
| 2311 | u32 src, dst; |
| 2312 | |
| 2313 | FETCH_WORD(src); |
| 2314 | adr = AREG(7); |
| 2315 | AREG(7) += 2; |
| 2316 | PRE_IO |
| 2317 | READ_WORD_F(adr, dst) |
| 2318 | res = dst - src; |
| 2319 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2320 | flag_N = flag_X = flag_C = res >> 8; |
| 2321 | flag_NotZ = res & 0xFFFF; |
| 2322 | WRITE_WORD_F(adr, res) |
| 2323 | POST_IO |
| 2324 | RET(16) |
| 2325 | } |
| 2326 | |
| 2327 | // SUBI |
| 2328 | OPCODE(0x0467) |
| 2329 | { |
| 2330 | u32 adr, res; |
| 2331 | u32 src, dst; |
| 2332 | |
| 2333 | FETCH_WORD(src); |
| 2334 | adr = AREG(7) - 2; |
| 2335 | AREG(7) = adr; |
| 2336 | PRE_IO |
| 2337 | READ_WORD_F(adr, dst) |
| 2338 | res = dst - src; |
| 2339 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 2340 | flag_N = flag_X = flag_C = res >> 8; |
| 2341 | flag_NotZ = res & 0xFFFF; |
| 2342 | WRITE_WORD_F(adr, res) |
| 2343 | POST_IO |
| 2344 | RET(18) |
| 2345 | } |
| 2346 | |
| 2347 | // SUBI |
| 2348 | OPCODE(0x0480) |
| 2349 | { |
| 2350 | u32 adr, res; |
| 2351 | u32 src, dst; |
| 2352 | |
| 2353 | FETCH_LONG(src); |
| 2354 | dst = DREGu32((Opcode >> 0) & 7); |
| 2355 | res = dst - src; |
| 2356 | flag_NotZ = res; |
| 2357 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2358 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2359 | flag_N = res >> 24; |
| 2360 | DREGu32((Opcode >> 0) & 7) = res; |
| 2361 | RET(16) |
| 2362 | } |
| 2363 | |
| 2364 | // SUBI |
| 2365 | OPCODE(0x0490) |
| 2366 | { |
| 2367 | u32 adr, res; |
| 2368 | u32 src, dst; |
| 2369 | |
| 2370 | FETCH_LONG(src); |
| 2371 | adr = AREG((Opcode >> 0) & 7); |
| 2372 | PRE_IO |
| 2373 | READ_LONG_F(adr, dst) |
| 2374 | res = dst - src; |
| 2375 | flag_NotZ = res; |
| 2376 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2377 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2378 | flag_N = res >> 24; |
| 2379 | WRITE_LONG_F(adr, res) |
| 2380 | POST_IO |
| 2381 | RET(28) |
| 2382 | } |
| 2383 | |
| 2384 | // SUBI |
| 2385 | OPCODE(0x0498) |
| 2386 | { |
| 2387 | u32 adr, res; |
| 2388 | u32 src, dst; |
| 2389 | |
| 2390 | FETCH_LONG(src); |
| 2391 | adr = AREG((Opcode >> 0) & 7); |
| 2392 | AREG((Opcode >> 0) & 7) += 4; |
| 2393 | PRE_IO |
| 2394 | READ_LONG_F(adr, dst) |
| 2395 | res = dst - src; |
| 2396 | flag_NotZ = res; |
| 2397 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2398 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2399 | flag_N = res >> 24; |
| 2400 | WRITE_LONG_F(adr, res) |
| 2401 | POST_IO |
| 2402 | RET(28) |
| 2403 | } |
| 2404 | |
| 2405 | // SUBI |
| 2406 | OPCODE(0x04A0) |
| 2407 | { |
| 2408 | u32 adr, res; |
| 2409 | u32 src, dst; |
| 2410 | |
| 2411 | FETCH_LONG(src); |
| 2412 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 2413 | AREG((Opcode >> 0) & 7) = adr; |
| 2414 | PRE_IO |
| 2415 | READ_LONG_F(adr, dst) |
| 2416 | res = dst - src; |
| 2417 | flag_NotZ = res; |
| 2418 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2419 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2420 | flag_N = res >> 24; |
| 2421 | WRITE_LONG_F(adr, res) |
| 2422 | POST_IO |
| 2423 | RET(30) |
| 2424 | } |
| 2425 | |
| 2426 | // SUBI |
| 2427 | OPCODE(0x04A8) |
| 2428 | { |
| 2429 | u32 adr, res; |
| 2430 | u32 src, dst; |
| 2431 | |
| 2432 | FETCH_LONG(src); |
| 2433 | FETCH_SWORD(adr); |
| 2434 | adr += AREG((Opcode >> 0) & 7); |
| 2435 | PRE_IO |
| 2436 | READ_LONG_F(adr, dst) |
| 2437 | res = dst - src; |
| 2438 | flag_NotZ = res; |
| 2439 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2440 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2441 | flag_N = res >> 24; |
| 2442 | WRITE_LONG_F(adr, res) |
| 2443 | POST_IO |
| 2444 | RET(32) |
| 2445 | } |
| 2446 | |
| 2447 | // SUBI |
| 2448 | OPCODE(0x04B0) |
| 2449 | { |
| 2450 | u32 adr, res; |
| 2451 | u32 src, dst; |
| 2452 | |
| 2453 | FETCH_LONG(src); |
| 2454 | adr = AREG((Opcode >> 0) & 7); |
| 2455 | DECODE_EXT_WORD |
| 2456 | PRE_IO |
| 2457 | READ_LONG_F(adr, dst) |
| 2458 | res = dst - src; |
| 2459 | flag_NotZ = res; |
| 2460 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2461 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2462 | flag_N = res >> 24; |
| 2463 | WRITE_LONG_F(adr, res) |
| 2464 | POST_IO |
| 2465 | RET(34) |
| 2466 | } |
| 2467 | |
| 2468 | // SUBI |
| 2469 | OPCODE(0x04B8) |
| 2470 | { |
| 2471 | u32 adr, res; |
| 2472 | u32 src, dst; |
| 2473 | |
| 2474 | FETCH_LONG(src); |
| 2475 | FETCH_SWORD(adr); |
| 2476 | PRE_IO |
| 2477 | READ_LONG_F(adr, dst) |
| 2478 | res = dst - src; |
| 2479 | flag_NotZ = res; |
| 2480 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2481 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2482 | flag_N = res >> 24; |
| 2483 | WRITE_LONG_F(adr, res) |
| 2484 | POST_IO |
| 2485 | RET(32) |
| 2486 | } |
| 2487 | |
| 2488 | // SUBI |
| 2489 | OPCODE(0x04B9) |
| 2490 | { |
| 2491 | u32 adr, res; |
| 2492 | u32 src, dst; |
| 2493 | |
| 2494 | FETCH_LONG(src); |
| 2495 | FETCH_LONG(adr); |
| 2496 | PRE_IO |
| 2497 | READ_LONG_F(adr, dst) |
| 2498 | res = dst - src; |
| 2499 | flag_NotZ = res; |
| 2500 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2501 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2502 | flag_N = res >> 24; |
| 2503 | WRITE_LONG_F(adr, res) |
| 2504 | POST_IO |
| 2505 | RET(36) |
| 2506 | } |
| 2507 | |
| 2508 | // SUBI |
| 2509 | OPCODE(0x049F) |
| 2510 | { |
| 2511 | u32 adr, res; |
| 2512 | u32 src, dst; |
| 2513 | |
| 2514 | FETCH_LONG(src); |
| 2515 | adr = AREG(7); |
| 2516 | AREG(7) += 4; |
| 2517 | PRE_IO |
| 2518 | READ_LONG_F(adr, dst) |
| 2519 | res = dst - src; |
| 2520 | flag_NotZ = res; |
| 2521 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2522 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2523 | flag_N = res >> 24; |
| 2524 | WRITE_LONG_F(adr, res) |
| 2525 | POST_IO |
| 2526 | RET(28) |
| 2527 | } |
| 2528 | |
| 2529 | // SUBI |
| 2530 | OPCODE(0x04A7) |
| 2531 | { |
| 2532 | u32 adr, res; |
| 2533 | u32 src, dst; |
| 2534 | |
| 2535 | FETCH_LONG(src); |
| 2536 | adr = AREG(7) - 4; |
| 2537 | AREG(7) = adr; |
| 2538 | PRE_IO |
| 2539 | READ_LONG_F(adr, dst) |
| 2540 | res = dst - src; |
| 2541 | flag_NotZ = res; |
| 2542 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 2543 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 2544 | flag_N = res >> 24; |
| 2545 | WRITE_LONG_F(adr, res) |
| 2546 | POST_IO |
| 2547 | RET(30) |
| 2548 | } |
| 2549 | |
| 2550 | // ADDI |
| 2551 | OPCODE(0x0600) |
| 2552 | { |
| 2553 | u32 adr, res; |
| 2554 | u32 src, dst; |
| 2555 | |
| 2556 | FETCH_BYTE(src); |
| 2557 | dst = DREGu8((Opcode >> 0) & 7); |
| 2558 | res = dst + src; |
| 2559 | flag_N = flag_X = flag_C = res; |
| 2560 | flag_V = (src ^ res) & (dst ^ res); |
| 2561 | flag_NotZ = res & 0xFF; |
| 2562 | DREGu8((Opcode >> 0) & 7) = res; |
| 2563 | RET(8) |
| 2564 | } |
| 2565 | |
| 2566 | // ADDI |
| 2567 | OPCODE(0x0610) |
| 2568 | { |
| 2569 | u32 adr, res; |
| 2570 | u32 src, dst; |
| 2571 | |
| 2572 | FETCH_BYTE(src); |
| 2573 | adr = AREG((Opcode >> 0) & 7); |
| 2574 | PRE_IO |
| 2575 | READ_BYTE_F(adr, dst) |
| 2576 | res = dst + src; |
| 2577 | flag_N = flag_X = flag_C = res; |
| 2578 | flag_V = (src ^ res) & (dst ^ res); |
| 2579 | flag_NotZ = res & 0xFF; |
| 2580 | WRITE_BYTE_F(adr, res) |
| 2581 | POST_IO |
| 2582 | RET(16) |
| 2583 | } |
| 2584 | |
| 2585 | // ADDI |
| 2586 | OPCODE(0x0618) |
| 2587 | { |
| 2588 | u32 adr, res; |
| 2589 | u32 src, dst; |
| 2590 | |
| 2591 | FETCH_BYTE(src); |
| 2592 | adr = AREG((Opcode >> 0) & 7); |
| 2593 | AREG((Opcode >> 0) & 7) += 1; |
| 2594 | PRE_IO |
| 2595 | READ_BYTE_F(adr, dst) |
| 2596 | res = dst + src; |
| 2597 | flag_N = flag_X = flag_C = res; |
| 2598 | flag_V = (src ^ res) & (dst ^ res); |
| 2599 | flag_NotZ = res & 0xFF; |
| 2600 | WRITE_BYTE_F(adr, res) |
| 2601 | POST_IO |
| 2602 | RET(16) |
| 2603 | } |
| 2604 | |
| 2605 | // ADDI |
| 2606 | OPCODE(0x0620) |
| 2607 | { |
| 2608 | u32 adr, res; |
| 2609 | u32 src, dst; |
| 2610 | |
| 2611 | FETCH_BYTE(src); |
| 2612 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 2613 | AREG((Opcode >> 0) & 7) = adr; |
| 2614 | PRE_IO |
| 2615 | READ_BYTE_F(adr, dst) |
| 2616 | res = dst + src; |
| 2617 | flag_N = flag_X = flag_C = res; |
| 2618 | flag_V = (src ^ res) & (dst ^ res); |
| 2619 | flag_NotZ = res & 0xFF; |
| 2620 | WRITE_BYTE_F(adr, res) |
| 2621 | POST_IO |
| 2622 | RET(18) |
| 2623 | } |
| 2624 | |
| 2625 | // ADDI |
| 2626 | OPCODE(0x0628) |
| 2627 | { |
| 2628 | u32 adr, res; |
| 2629 | u32 src, dst; |
| 2630 | |
| 2631 | FETCH_BYTE(src); |
| 2632 | FETCH_SWORD(adr); |
| 2633 | adr += AREG((Opcode >> 0) & 7); |
| 2634 | PRE_IO |
| 2635 | READ_BYTE_F(adr, dst) |
| 2636 | res = dst + src; |
| 2637 | flag_N = flag_X = flag_C = res; |
| 2638 | flag_V = (src ^ res) & (dst ^ res); |
| 2639 | flag_NotZ = res & 0xFF; |
| 2640 | WRITE_BYTE_F(adr, res) |
| 2641 | POST_IO |
| 2642 | RET(20) |
| 2643 | } |
| 2644 | |
| 2645 | // ADDI |
| 2646 | OPCODE(0x0630) |
| 2647 | { |
| 2648 | u32 adr, res; |
| 2649 | u32 src, dst; |
| 2650 | |
| 2651 | FETCH_BYTE(src); |
| 2652 | adr = AREG((Opcode >> 0) & 7); |
| 2653 | DECODE_EXT_WORD |
| 2654 | PRE_IO |
| 2655 | READ_BYTE_F(adr, dst) |
| 2656 | res = dst + src; |
| 2657 | flag_N = flag_X = flag_C = res; |
| 2658 | flag_V = (src ^ res) & (dst ^ res); |
| 2659 | flag_NotZ = res & 0xFF; |
| 2660 | WRITE_BYTE_F(adr, res) |
| 2661 | POST_IO |
| 2662 | RET(22) |
| 2663 | } |
| 2664 | |
| 2665 | // ADDI |
| 2666 | OPCODE(0x0638) |
| 2667 | { |
| 2668 | u32 adr, res; |
| 2669 | u32 src, dst; |
| 2670 | |
| 2671 | FETCH_BYTE(src); |
| 2672 | FETCH_SWORD(adr); |
| 2673 | PRE_IO |
| 2674 | READ_BYTE_F(adr, dst) |
| 2675 | res = dst + src; |
| 2676 | flag_N = flag_X = flag_C = res; |
| 2677 | flag_V = (src ^ res) & (dst ^ res); |
| 2678 | flag_NotZ = res & 0xFF; |
| 2679 | WRITE_BYTE_F(adr, res) |
| 2680 | POST_IO |
| 2681 | RET(20) |
| 2682 | } |
| 2683 | |
| 2684 | // ADDI |
| 2685 | OPCODE(0x0639) |
| 2686 | { |
| 2687 | u32 adr, res; |
| 2688 | u32 src, dst; |
| 2689 | |
| 2690 | FETCH_BYTE(src); |
| 2691 | FETCH_LONG(adr); |
| 2692 | PRE_IO |
| 2693 | READ_BYTE_F(adr, dst) |
| 2694 | res = dst + src; |
| 2695 | flag_N = flag_X = flag_C = res; |
| 2696 | flag_V = (src ^ res) & (dst ^ res); |
| 2697 | flag_NotZ = res & 0xFF; |
| 2698 | WRITE_BYTE_F(adr, res) |
| 2699 | POST_IO |
| 2700 | RET(24) |
| 2701 | } |
| 2702 | |
| 2703 | // ADDI |
| 2704 | OPCODE(0x061F) |
| 2705 | { |
| 2706 | u32 adr, res; |
| 2707 | u32 src, dst; |
| 2708 | |
| 2709 | FETCH_BYTE(src); |
| 2710 | adr = AREG(7); |
| 2711 | AREG(7) += 2; |
| 2712 | PRE_IO |
| 2713 | READ_BYTE_F(adr, dst) |
| 2714 | res = dst + src; |
| 2715 | flag_N = flag_X = flag_C = res; |
| 2716 | flag_V = (src ^ res) & (dst ^ res); |
| 2717 | flag_NotZ = res & 0xFF; |
| 2718 | WRITE_BYTE_F(adr, res) |
| 2719 | POST_IO |
| 2720 | RET(16) |
| 2721 | } |
| 2722 | |
| 2723 | // ADDI |
| 2724 | OPCODE(0x0627) |
| 2725 | { |
| 2726 | u32 adr, res; |
| 2727 | u32 src, dst; |
| 2728 | |
| 2729 | FETCH_BYTE(src); |
| 2730 | adr = AREG(7) - 2; |
| 2731 | AREG(7) = adr; |
| 2732 | PRE_IO |
| 2733 | READ_BYTE_F(adr, dst) |
| 2734 | res = dst + src; |
| 2735 | flag_N = flag_X = flag_C = res; |
| 2736 | flag_V = (src ^ res) & (dst ^ res); |
| 2737 | flag_NotZ = res & 0xFF; |
| 2738 | WRITE_BYTE_F(adr, res) |
| 2739 | POST_IO |
| 2740 | RET(18) |
| 2741 | } |
| 2742 | |
| 2743 | // ADDI |
| 2744 | OPCODE(0x0640) |
| 2745 | { |
| 2746 | u32 adr, res; |
| 2747 | u32 src, dst; |
| 2748 | |
| 2749 | FETCH_WORD(src); |
| 2750 | dst = DREGu16((Opcode >> 0) & 7); |
| 2751 | res = dst + src; |
| 2752 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2753 | flag_N = flag_X = flag_C = res >> 8; |
| 2754 | flag_NotZ = res & 0xFFFF; |
| 2755 | DREGu16((Opcode >> 0) & 7) = res; |
| 2756 | RET(8) |
| 2757 | } |
| 2758 | |
| 2759 | // ADDI |
| 2760 | OPCODE(0x0650) |
| 2761 | { |
| 2762 | u32 adr, res; |
| 2763 | u32 src, dst; |
| 2764 | |
| 2765 | FETCH_WORD(src); |
| 2766 | adr = AREG((Opcode >> 0) & 7); |
| 2767 | PRE_IO |
| 2768 | READ_WORD_F(adr, dst) |
| 2769 | res = dst + src; |
| 2770 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2771 | flag_N = flag_X = flag_C = res >> 8; |
| 2772 | flag_NotZ = res & 0xFFFF; |
| 2773 | WRITE_WORD_F(adr, res) |
| 2774 | POST_IO |
| 2775 | RET(16) |
| 2776 | } |
| 2777 | |
| 2778 | // ADDI |
| 2779 | OPCODE(0x0658) |
| 2780 | { |
| 2781 | u32 adr, res; |
| 2782 | u32 src, dst; |
| 2783 | |
| 2784 | FETCH_WORD(src); |
| 2785 | adr = AREG((Opcode >> 0) & 7); |
| 2786 | AREG((Opcode >> 0) & 7) += 2; |
| 2787 | PRE_IO |
| 2788 | READ_WORD_F(adr, dst) |
| 2789 | res = dst + src; |
| 2790 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2791 | flag_N = flag_X = flag_C = res >> 8; |
| 2792 | flag_NotZ = res & 0xFFFF; |
| 2793 | WRITE_WORD_F(adr, res) |
| 2794 | POST_IO |
| 2795 | RET(16) |
| 2796 | } |
| 2797 | |
| 2798 | // ADDI |
| 2799 | OPCODE(0x0660) |
| 2800 | { |
| 2801 | u32 adr, res; |
| 2802 | u32 src, dst; |
| 2803 | |
| 2804 | FETCH_WORD(src); |
| 2805 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 2806 | AREG((Opcode >> 0) & 7) = adr; |
| 2807 | PRE_IO |
| 2808 | READ_WORD_F(adr, dst) |
| 2809 | res = dst + src; |
| 2810 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2811 | flag_N = flag_X = flag_C = res >> 8; |
| 2812 | flag_NotZ = res & 0xFFFF; |
| 2813 | WRITE_WORD_F(adr, res) |
| 2814 | POST_IO |
| 2815 | RET(18) |
| 2816 | } |
| 2817 | |
| 2818 | // ADDI |
| 2819 | OPCODE(0x0668) |
| 2820 | { |
| 2821 | u32 adr, res; |
| 2822 | u32 src, dst; |
| 2823 | |
| 2824 | FETCH_WORD(src); |
| 2825 | FETCH_SWORD(adr); |
| 2826 | adr += AREG((Opcode >> 0) & 7); |
| 2827 | PRE_IO |
| 2828 | READ_WORD_F(adr, dst) |
| 2829 | res = dst + src; |
| 2830 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2831 | flag_N = flag_X = flag_C = res >> 8; |
| 2832 | flag_NotZ = res & 0xFFFF; |
| 2833 | WRITE_WORD_F(adr, res) |
| 2834 | POST_IO |
| 2835 | RET(20) |
| 2836 | } |
| 2837 | |
| 2838 | // ADDI |
| 2839 | OPCODE(0x0670) |
| 2840 | { |
| 2841 | u32 adr, res; |
| 2842 | u32 src, dst; |
| 2843 | |
| 2844 | FETCH_WORD(src); |
| 2845 | adr = AREG((Opcode >> 0) & 7); |
| 2846 | DECODE_EXT_WORD |
| 2847 | PRE_IO |
| 2848 | READ_WORD_F(adr, dst) |
| 2849 | res = dst + src; |
| 2850 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2851 | flag_N = flag_X = flag_C = res >> 8; |
| 2852 | flag_NotZ = res & 0xFFFF; |
| 2853 | WRITE_WORD_F(adr, res) |
| 2854 | POST_IO |
| 2855 | RET(22) |
| 2856 | } |
| 2857 | |
| 2858 | // ADDI |
| 2859 | OPCODE(0x0678) |
| 2860 | { |
| 2861 | u32 adr, res; |
| 2862 | u32 src, dst; |
| 2863 | |
| 2864 | FETCH_WORD(src); |
| 2865 | FETCH_SWORD(adr); |
| 2866 | PRE_IO |
| 2867 | READ_WORD_F(adr, dst) |
| 2868 | res = dst + src; |
| 2869 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2870 | flag_N = flag_X = flag_C = res >> 8; |
| 2871 | flag_NotZ = res & 0xFFFF; |
| 2872 | WRITE_WORD_F(adr, res) |
| 2873 | POST_IO |
| 2874 | RET(20) |
| 2875 | } |
| 2876 | |
| 2877 | // ADDI |
| 2878 | OPCODE(0x0679) |
| 2879 | { |
| 2880 | u32 adr, res; |
| 2881 | u32 src, dst; |
| 2882 | |
| 2883 | FETCH_WORD(src); |
| 2884 | FETCH_LONG(adr); |
| 2885 | PRE_IO |
| 2886 | READ_WORD_F(adr, dst) |
| 2887 | res = dst + src; |
| 2888 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2889 | flag_N = flag_X = flag_C = res >> 8; |
| 2890 | flag_NotZ = res & 0xFFFF; |
| 2891 | WRITE_WORD_F(adr, res) |
| 2892 | POST_IO |
| 2893 | RET(24) |
| 2894 | } |
| 2895 | |
| 2896 | // ADDI |
| 2897 | OPCODE(0x065F) |
| 2898 | { |
| 2899 | u32 adr, res; |
| 2900 | u32 src, dst; |
| 2901 | |
| 2902 | FETCH_WORD(src); |
| 2903 | adr = AREG(7); |
| 2904 | AREG(7) += 2; |
| 2905 | PRE_IO |
| 2906 | READ_WORD_F(adr, dst) |
| 2907 | res = dst + src; |
| 2908 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2909 | flag_N = flag_X = flag_C = res >> 8; |
| 2910 | flag_NotZ = res & 0xFFFF; |
| 2911 | WRITE_WORD_F(adr, res) |
| 2912 | POST_IO |
| 2913 | RET(16) |
| 2914 | } |
| 2915 | |
| 2916 | // ADDI |
| 2917 | OPCODE(0x0667) |
| 2918 | { |
| 2919 | u32 adr, res; |
| 2920 | u32 src, dst; |
| 2921 | |
| 2922 | FETCH_WORD(src); |
| 2923 | adr = AREG(7) - 2; |
| 2924 | AREG(7) = adr; |
| 2925 | PRE_IO |
| 2926 | READ_WORD_F(adr, dst) |
| 2927 | res = dst + src; |
| 2928 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 2929 | flag_N = flag_X = flag_C = res >> 8; |
| 2930 | flag_NotZ = res & 0xFFFF; |
| 2931 | WRITE_WORD_F(adr, res) |
| 2932 | POST_IO |
| 2933 | RET(18) |
| 2934 | } |
| 2935 | |
| 2936 | // ADDI |
| 2937 | OPCODE(0x0680) |
| 2938 | { |
| 2939 | u32 adr, res; |
| 2940 | u32 src, dst; |
| 2941 | |
| 2942 | FETCH_LONG(src); |
| 2943 | dst = DREGu32((Opcode >> 0) & 7); |
| 2944 | res = dst + src; |
| 2945 | flag_NotZ = res; |
| 2946 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 2947 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 2948 | flag_N = res >> 24; |
| 2949 | DREGu32((Opcode >> 0) & 7) = res; |
| 2950 | RET(16) |
| 2951 | } |
| 2952 | |
| 2953 | // ADDI |
| 2954 | OPCODE(0x0690) |
| 2955 | { |
| 2956 | u32 adr, res; |
| 2957 | u32 src, dst; |
| 2958 | |
| 2959 | FETCH_LONG(src); |
| 2960 | adr = AREG((Opcode >> 0) & 7); |
| 2961 | PRE_IO |
| 2962 | READ_LONG_F(adr, dst) |
| 2963 | res = dst + src; |
| 2964 | flag_NotZ = res; |
| 2965 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 2966 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 2967 | flag_N = res >> 24; |
| 2968 | WRITE_LONG_F(adr, res) |
| 2969 | POST_IO |
| 2970 | RET(28) |
| 2971 | } |
| 2972 | |
| 2973 | // ADDI |
| 2974 | OPCODE(0x0698) |
| 2975 | { |
| 2976 | u32 adr, res; |
| 2977 | u32 src, dst; |
| 2978 | |
| 2979 | FETCH_LONG(src); |
| 2980 | adr = AREG((Opcode >> 0) & 7); |
| 2981 | AREG((Opcode >> 0) & 7) += 4; |
| 2982 | PRE_IO |
| 2983 | READ_LONG_F(adr, dst) |
| 2984 | res = dst + src; |
| 2985 | flag_NotZ = res; |
| 2986 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 2987 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 2988 | flag_N = res >> 24; |
| 2989 | WRITE_LONG_F(adr, res) |
| 2990 | POST_IO |
| 2991 | RET(28) |
| 2992 | } |
| 2993 | |
| 2994 | // ADDI |
| 2995 | OPCODE(0x06A0) |
| 2996 | { |
| 2997 | u32 adr, res; |
| 2998 | u32 src, dst; |
| 2999 | |
| 3000 | FETCH_LONG(src); |
| 3001 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 3002 | AREG((Opcode >> 0) & 7) = adr; |
| 3003 | PRE_IO |
| 3004 | READ_LONG_F(adr, dst) |
| 3005 | res = dst + src; |
| 3006 | flag_NotZ = res; |
| 3007 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 3008 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 3009 | flag_N = res >> 24; |
| 3010 | WRITE_LONG_F(adr, res) |
| 3011 | POST_IO |
| 3012 | RET(30) |
| 3013 | } |
| 3014 | |
| 3015 | // ADDI |
| 3016 | OPCODE(0x06A8) |
| 3017 | { |
| 3018 | u32 adr, res; |
| 3019 | u32 src, dst; |
| 3020 | |
| 3021 | FETCH_LONG(src); |
| 3022 | FETCH_SWORD(adr); |
| 3023 | adr += AREG((Opcode >> 0) & 7); |
| 3024 | PRE_IO |
| 3025 | READ_LONG_F(adr, dst) |
| 3026 | res = dst + src; |
| 3027 | flag_NotZ = res; |
| 3028 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 3029 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 3030 | flag_N = res >> 24; |
| 3031 | WRITE_LONG_F(adr, res) |
| 3032 | POST_IO |
| 3033 | RET(32) |
| 3034 | } |
| 3035 | |
| 3036 | // ADDI |
| 3037 | OPCODE(0x06B0) |
| 3038 | { |
| 3039 | u32 adr, res; |
| 3040 | u32 src, dst; |
| 3041 | |
| 3042 | FETCH_LONG(src); |
| 3043 | adr = AREG((Opcode >> 0) & 7); |
| 3044 | DECODE_EXT_WORD |
| 3045 | PRE_IO |
| 3046 | READ_LONG_F(adr, dst) |
| 3047 | res = dst + src; |
| 3048 | flag_NotZ = res; |
| 3049 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 3050 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 3051 | flag_N = res >> 24; |
| 3052 | WRITE_LONG_F(adr, res) |
| 3053 | POST_IO |
| 3054 | RET(34) |
| 3055 | } |
| 3056 | |
| 3057 | // ADDI |
| 3058 | OPCODE(0x06B8) |
| 3059 | { |
| 3060 | u32 adr, res; |
| 3061 | u32 src, dst; |
| 3062 | |
| 3063 | FETCH_LONG(src); |
| 3064 | FETCH_SWORD(adr); |
| 3065 | PRE_IO |
| 3066 | READ_LONG_F(adr, dst) |
| 3067 | res = dst + src; |
| 3068 | flag_NotZ = res; |
| 3069 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 3070 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 3071 | flag_N = res >> 24; |
| 3072 | WRITE_LONG_F(adr, res) |
| 3073 | POST_IO |
| 3074 | RET(32) |
| 3075 | } |
| 3076 | |
| 3077 | // ADDI |
| 3078 | OPCODE(0x06B9) |
| 3079 | { |
| 3080 | u32 adr, res; |
| 3081 | u32 src, dst; |
| 3082 | |
| 3083 | FETCH_LONG(src); |
| 3084 | FETCH_LONG(adr); |
| 3085 | PRE_IO |
| 3086 | READ_LONG_F(adr, dst) |
| 3087 | res = dst + src; |
| 3088 | flag_NotZ = res; |
| 3089 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 3090 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 3091 | flag_N = res >> 24; |
| 3092 | WRITE_LONG_F(adr, res) |
| 3093 | POST_IO |
| 3094 | RET(36) |
| 3095 | } |
| 3096 | |
| 3097 | // ADDI |
| 3098 | OPCODE(0x069F) |
| 3099 | { |
| 3100 | u32 adr, res; |
| 3101 | u32 src, dst; |
| 3102 | |
| 3103 | FETCH_LONG(src); |
| 3104 | adr = AREG(7); |
| 3105 | AREG(7) += 4; |
| 3106 | PRE_IO |
| 3107 | READ_LONG_F(adr, dst) |
| 3108 | res = dst + src; |
| 3109 | flag_NotZ = res; |
| 3110 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 3111 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 3112 | flag_N = res >> 24; |
| 3113 | WRITE_LONG_F(adr, res) |
| 3114 | POST_IO |
| 3115 | RET(28) |
| 3116 | } |
| 3117 | |
| 3118 | // ADDI |
| 3119 | OPCODE(0x06A7) |
| 3120 | { |
| 3121 | u32 adr, res; |
| 3122 | u32 src, dst; |
| 3123 | |
| 3124 | FETCH_LONG(src); |
| 3125 | adr = AREG(7) - 4; |
| 3126 | AREG(7) = adr; |
| 3127 | PRE_IO |
| 3128 | READ_LONG_F(adr, dst) |
| 3129 | res = dst + src; |
| 3130 | flag_NotZ = res; |
| 3131 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 3132 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 3133 | flag_N = res >> 24; |
| 3134 | WRITE_LONG_F(adr, res) |
| 3135 | POST_IO |
| 3136 | RET(30) |
| 3137 | } |
| 3138 | |
| 3139 | // CMPI |
| 3140 | OPCODE(0x0C00) |
| 3141 | { |
| 3142 | u32 adr, res; |
| 3143 | u32 src, dst; |
| 3144 | |
| 3145 | FETCH_BYTE(src); |
| 3146 | dst = DREGu8((Opcode >> 0) & 7); |
| 3147 | res = dst - src; |
| 3148 | flag_N = flag_C = res; |
| 3149 | flag_V = (src ^ dst) & (res ^ dst); |
| 3150 | flag_NotZ = res & 0xFF; |
| 3151 | RET(8) |
| 3152 | } |
| 3153 | |
| 3154 | // CMPI |
| 3155 | OPCODE(0x0C10) |
| 3156 | { |
| 3157 | u32 adr, res; |
| 3158 | u32 src, dst; |
| 3159 | |
| 3160 | FETCH_BYTE(src); |
| 3161 | adr = AREG((Opcode >> 0) & 7); |
| 3162 | PRE_IO |
| 3163 | READ_BYTE_F(adr, dst) |
| 3164 | res = dst - src; |
| 3165 | flag_N = flag_C = res; |
| 3166 | flag_V = (src ^ dst) & (res ^ dst); |
| 3167 | flag_NotZ = res & 0xFF; |
| 3168 | POST_IO |
| 3169 | RET(12) |
| 3170 | } |
| 3171 | |
| 3172 | // CMPI |
| 3173 | OPCODE(0x0C18) |
| 3174 | { |
| 3175 | u32 adr, res; |
| 3176 | u32 src, dst; |
| 3177 | |
| 3178 | FETCH_BYTE(src); |
| 3179 | adr = AREG((Opcode >> 0) & 7); |
| 3180 | AREG((Opcode >> 0) & 7) += 1; |
| 3181 | PRE_IO |
| 3182 | READ_BYTE_F(adr, dst) |
| 3183 | res = dst - src; |
| 3184 | flag_N = flag_C = res; |
| 3185 | flag_V = (src ^ dst) & (res ^ dst); |
| 3186 | flag_NotZ = res & 0xFF; |
| 3187 | POST_IO |
| 3188 | RET(12) |
| 3189 | } |
| 3190 | |
| 3191 | // CMPI |
| 3192 | OPCODE(0x0C20) |
| 3193 | { |
| 3194 | u32 adr, res; |
| 3195 | u32 src, dst; |
| 3196 | |
| 3197 | FETCH_BYTE(src); |
| 3198 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 3199 | AREG((Opcode >> 0) & 7) = adr; |
| 3200 | PRE_IO |
| 3201 | READ_BYTE_F(adr, dst) |
| 3202 | res = dst - src; |
| 3203 | flag_N = flag_C = res; |
| 3204 | flag_V = (src ^ dst) & (res ^ dst); |
| 3205 | flag_NotZ = res & 0xFF; |
| 3206 | POST_IO |
| 3207 | RET(14) |
| 3208 | } |
| 3209 | |
| 3210 | // CMPI |
| 3211 | OPCODE(0x0C28) |
| 3212 | { |
| 3213 | u32 adr, res; |
| 3214 | u32 src, dst; |
| 3215 | |
| 3216 | FETCH_BYTE(src); |
| 3217 | FETCH_SWORD(adr); |
| 3218 | adr += AREG((Opcode >> 0) & 7); |
| 3219 | PRE_IO |
| 3220 | READ_BYTE_F(adr, dst) |
| 3221 | res = dst - src; |
| 3222 | flag_N = flag_C = res; |
| 3223 | flag_V = (src ^ dst) & (res ^ dst); |
| 3224 | flag_NotZ = res & 0xFF; |
| 3225 | POST_IO |
| 3226 | RET(16) |
| 3227 | } |
| 3228 | |
| 3229 | // CMPI |
| 3230 | OPCODE(0x0C30) |
| 3231 | { |
| 3232 | u32 adr, res; |
| 3233 | u32 src, dst; |
| 3234 | |
| 3235 | FETCH_BYTE(src); |
| 3236 | adr = AREG((Opcode >> 0) & 7); |
| 3237 | DECODE_EXT_WORD |
| 3238 | PRE_IO |
| 3239 | READ_BYTE_F(adr, dst) |
| 3240 | res = dst - src; |
| 3241 | flag_N = flag_C = res; |
| 3242 | flag_V = (src ^ dst) & (res ^ dst); |
| 3243 | flag_NotZ = res & 0xFF; |
| 3244 | POST_IO |
| 3245 | RET(18) |
| 3246 | } |
| 3247 | |
| 3248 | // CMPI |
| 3249 | OPCODE(0x0C38) |
| 3250 | { |
| 3251 | u32 adr, res; |
| 3252 | u32 src, dst; |
| 3253 | |
| 3254 | FETCH_BYTE(src); |
| 3255 | FETCH_SWORD(adr); |
| 3256 | PRE_IO |
| 3257 | READ_BYTE_F(adr, dst) |
| 3258 | res = dst - src; |
| 3259 | flag_N = flag_C = res; |
| 3260 | flag_V = (src ^ dst) & (res ^ dst); |
| 3261 | flag_NotZ = res & 0xFF; |
| 3262 | POST_IO |
| 3263 | RET(16) |
| 3264 | } |
| 3265 | |
| 3266 | // CMPI |
| 3267 | OPCODE(0x0C39) |
| 3268 | { |
| 3269 | u32 adr, res; |
| 3270 | u32 src, dst; |
| 3271 | |
| 3272 | FETCH_BYTE(src); |
| 3273 | FETCH_LONG(adr); |
| 3274 | PRE_IO |
| 3275 | READ_BYTE_F(adr, dst) |
| 3276 | res = dst - src; |
| 3277 | flag_N = flag_C = res; |
| 3278 | flag_V = (src ^ dst) & (res ^ dst); |
| 3279 | flag_NotZ = res & 0xFF; |
| 3280 | POST_IO |
| 3281 | RET(20) |
| 3282 | } |
| 3283 | |
| 3284 | // CMPI |
| 3285 | OPCODE(0x0C1F) |
| 3286 | { |
| 3287 | u32 adr, res; |
| 3288 | u32 src, dst; |
| 3289 | |
| 3290 | FETCH_BYTE(src); |
| 3291 | adr = AREG(7); |
| 3292 | AREG(7) += 2; |
| 3293 | PRE_IO |
| 3294 | READ_BYTE_F(adr, dst) |
| 3295 | res = dst - src; |
| 3296 | flag_N = flag_C = res; |
| 3297 | flag_V = (src ^ dst) & (res ^ dst); |
| 3298 | flag_NotZ = res & 0xFF; |
| 3299 | POST_IO |
| 3300 | RET(12) |
| 3301 | } |
| 3302 | |
| 3303 | // CMPI |
| 3304 | OPCODE(0x0C27) |
| 3305 | { |
| 3306 | u32 adr, res; |
| 3307 | u32 src, dst; |
| 3308 | |
| 3309 | FETCH_BYTE(src); |
| 3310 | adr = AREG(7) - 2; |
| 3311 | AREG(7) = adr; |
| 3312 | PRE_IO |
| 3313 | READ_BYTE_F(adr, dst) |
| 3314 | res = dst - src; |
| 3315 | flag_N = flag_C = res; |
| 3316 | flag_V = (src ^ dst) & (res ^ dst); |
| 3317 | flag_NotZ = res & 0xFF; |
| 3318 | POST_IO |
| 3319 | RET(14) |
| 3320 | } |
| 3321 | |
| 3322 | // CMPI |
| 3323 | OPCODE(0x0C40) |
| 3324 | { |
| 3325 | u32 adr, res; |
| 3326 | u32 src, dst; |
| 3327 | |
| 3328 | FETCH_WORD(src); |
| 3329 | dst = DREGu16((Opcode >> 0) & 7); |
| 3330 | res = dst - src; |
| 3331 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3332 | flag_N = flag_C = res >> 8; |
| 3333 | flag_NotZ = res & 0xFFFF; |
| 3334 | RET(8) |
| 3335 | } |
| 3336 | |
| 3337 | // CMPI |
| 3338 | OPCODE(0x0C50) |
| 3339 | { |
| 3340 | u32 adr, res; |
| 3341 | u32 src, dst; |
| 3342 | |
| 3343 | FETCH_WORD(src); |
| 3344 | adr = AREG((Opcode >> 0) & 7); |
| 3345 | PRE_IO |
| 3346 | READ_WORD_F(adr, dst) |
| 3347 | res = dst - src; |
| 3348 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3349 | flag_N = flag_C = res >> 8; |
| 3350 | flag_NotZ = res & 0xFFFF; |
| 3351 | POST_IO |
| 3352 | RET(12) |
| 3353 | } |
| 3354 | |
| 3355 | // CMPI |
| 3356 | OPCODE(0x0C58) |
| 3357 | { |
| 3358 | u32 adr, res; |
| 3359 | u32 src, dst; |
| 3360 | |
| 3361 | FETCH_WORD(src); |
| 3362 | adr = AREG((Opcode >> 0) & 7); |
| 3363 | AREG((Opcode >> 0) & 7) += 2; |
| 3364 | PRE_IO |
| 3365 | READ_WORD_F(adr, dst) |
| 3366 | res = dst - src; |
| 3367 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3368 | flag_N = flag_C = res >> 8; |
| 3369 | flag_NotZ = res & 0xFFFF; |
| 3370 | POST_IO |
| 3371 | RET(12) |
| 3372 | } |
| 3373 | |
| 3374 | // CMPI |
| 3375 | OPCODE(0x0C60) |
| 3376 | { |
| 3377 | u32 adr, res; |
| 3378 | u32 src, dst; |
| 3379 | |
| 3380 | FETCH_WORD(src); |
| 3381 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 3382 | AREG((Opcode >> 0) & 7) = adr; |
| 3383 | PRE_IO |
| 3384 | READ_WORD_F(adr, dst) |
| 3385 | res = dst - src; |
| 3386 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3387 | flag_N = flag_C = res >> 8; |
| 3388 | flag_NotZ = res & 0xFFFF; |
| 3389 | POST_IO |
| 3390 | RET(14) |
| 3391 | } |
| 3392 | |
| 3393 | // CMPI |
| 3394 | OPCODE(0x0C68) |
| 3395 | { |
| 3396 | u32 adr, res; |
| 3397 | u32 src, dst; |
| 3398 | |
| 3399 | FETCH_WORD(src); |
| 3400 | FETCH_SWORD(adr); |
| 3401 | adr += AREG((Opcode >> 0) & 7); |
| 3402 | PRE_IO |
| 3403 | READ_WORD_F(adr, dst) |
| 3404 | res = dst - src; |
| 3405 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3406 | flag_N = flag_C = res >> 8; |
| 3407 | flag_NotZ = res & 0xFFFF; |
| 3408 | POST_IO |
| 3409 | RET(16) |
| 3410 | } |
| 3411 | |
| 3412 | // CMPI |
| 3413 | OPCODE(0x0C70) |
| 3414 | { |
| 3415 | u32 adr, res; |
| 3416 | u32 src, dst; |
| 3417 | |
| 3418 | FETCH_WORD(src); |
| 3419 | adr = AREG((Opcode >> 0) & 7); |
| 3420 | DECODE_EXT_WORD |
| 3421 | PRE_IO |
| 3422 | READ_WORD_F(adr, dst) |
| 3423 | res = dst - src; |
| 3424 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3425 | flag_N = flag_C = res >> 8; |
| 3426 | flag_NotZ = res & 0xFFFF; |
| 3427 | POST_IO |
| 3428 | RET(18) |
| 3429 | } |
| 3430 | |
| 3431 | // CMPI |
| 3432 | OPCODE(0x0C78) |
| 3433 | { |
| 3434 | u32 adr, res; |
| 3435 | u32 src, dst; |
| 3436 | |
| 3437 | FETCH_WORD(src); |
| 3438 | FETCH_SWORD(adr); |
| 3439 | PRE_IO |
| 3440 | READ_WORD_F(adr, dst) |
| 3441 | res = dst - src; |
| 3442 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3443 | flag_N = flag_C = res >> 8; |
| 3444 | flag_NotZ = res & 0xFFFF; |
| 3445 | POST_IO |
| 3446 | RET(16) |
| 3447 | } |
| 3448 | |
| 3449 | // CMPI |
| 3450 | OPCODE(0x0C79) |
| 3451 | { |
| 3452 | u32 adr, res; |
| 3453 | u32 src, dst; |
| 3454 | |
| 3455 | FETCH_WORD(src); |
| 3456 | FETCH_LONG(adr); |
| 3457 | PRE_IO |
| 3458 | READ_WORD_F(adr, dst) |
| 3459 | res = dst - src; |
| 3460 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3461 | flag_N = flag_C = res >> 8; |
| 3462 | flag_NotZ = res & 0xFFFF; |
| 3463 | POST_IO |
| 3464 | RET(20) |
| 3465 | } |
| 3466 | |
| 3467 | // CMPI |
| 3468 | OPCODE(0x0C5F) |
| 3469 | { |
| 3470 | u32 adr, res; |
| 3471 | u32 src, dst; |
| 3472 | |
| 3473 | FETCH_WORD(src); |
| 3474 | adr = AREG(7); |
| 3475 | AREG(7) += 2; |
| 3476 | PRE_IO |
| 3477 | READ_WORD_F(adr, dst) |
| 3478 | res = dst - src; |
| 3479 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3480 | flag_N = flag_C = res >> 8; |
| 3481 | flag_NotZ = res & 0xFFFF; |
| 3482 | POST_IO |
| 3483 | RET(12) |
| 3484 | } |
| 3485 | |
| 3486 | // CMPI |
| 3487 | OPCODE(0x0C67) |
| 3488 | { |
| 3489 | u32 adr, res; |
| 3490 | u32 src, dst; |
| 3491 | |
| 3492 | FETCH_WORD(src); |
| 3493 | adr = AREG(7) - 2; |
| 3494 | AREG(7) = adr; |
| 3495 | PRE_IO |
| 3496 | READ_WORD_F(adr, dst) |
| 3497 | res = dst - src; |
| 3498 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 3499 | flag_N = flag_C = res >> 8; |
| 3500 | flag_NotZ = res & 0xFFFF; |
| 3501 | POST_IO |
| 3502 | RET(14) |
| 3503 | } |
| 3504 | |
| 3505 | // CMPI |
| 3506 | OPCODE(0x0C80) |
| 3507 | { |
| 3508 | u32 adr, res; |
| 3509 | u32 src, dst; |
| 3510 | |
| 3511 | FETCH_LONG(src); |
| 3512 | dst = DREGu32((Opcode >> 0) & 7); |
| 3513 | res = dst - src; |
| 3514 | flag_NotZ = res; |
| 3515 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3516 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3517 | flag_N = res >> 24; |
| 3518 | RET(14) |
| 3519 | } |
| 3520 | |
| 3521 | // CMPI |
| 3522 | OPCODE(0x0C90) |
| 3523 | { |
| 3524 | u32 adr, res; |
| 3525 | u32 src, dst; |
| 3526 | |
| 3527 | FETCH_LONG(src); |
| 3528 | adr = AREG((Opcode >> 0) & 7); |
| 3529 | PRE_IO |
| 3530 | READ_LONG_F(adr, dst) |
| 3531 | res = dst - src; |
| 3532 | flag_NotZ = res; |
| 3533 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3534 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3535 | flag_N = res >> 24; |
| 3536 | POST_IO |
| 3537 | RET(20) |
| 3538 | } |
| 3539 | |
| 3540 | // CMPI |
| 3541 | OPCODE(0x0C98) |
| 3542 | { |
| 3543 | u32 adr, res; |
| 3544 | u32 src, dst; |
| 3545 | |
| 3546 | FETCH_LONG(src); |
| 3547 | adr = AREG((Opcode >> 0) & 7); |
| 3548 | AREG((Opcode >> 0) & 7) += 4; |
| 3549 | PRE_IO |
| 3550 | READ_LONG_F(adr, dst) |
| 3551 | res = dst - src; |
| 3552 | flag_NotZ = res; |
| 3553 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3554 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3555 | flag_N = res >> 24; |
| 3556 | POST_IO |
| 3557 | RET(20) |
| 3558 | } |
| 3559 | |
| 3560 | // CMPI |
| 3561 | OPCODE(0x0CA0) |
| 3562 | { |
| 3563 | u32 adr, res; |
| 3564 | u32 src, dst; |
| 3565 | |
| 3566 | FETCH_LONG(src); |
| 3567 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 3568 | AREG((Opcode >> 0) & 7) = adr; |
| 3569 | PRE_IO |
| 3570 | READ_LONG_F(adr, dst) |
| 3571 | res = dst - src; |
| 3572 | flag_NotZ = res; |
| 3573 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3574 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3575 | flag_N = res >> 24; |
| 3576 | POST_IO |
| 3577 | RET(22) |
| 3578 | } |
| 3579 | |
| 3580 | // CMPI |
| 3581 | OPCODE(0x0CA8) |
| 3582 | { |
| 3583 | u32 adr, res; |
| 3584 | u32 src, dst; |
| 3585 | |
| 3586 | FETCH_LONG(src); |
| 3587 | FETCH_SWORD(adr); |
| 3588 | adr += AREG((Opcode >> 0) & 7); |
| 3589 | PRE_IO |
| 3590 | READ_LONG_F(adr, dst) |
| 3591 | res = dst - src; |
| 3592 | flag_NotZ = res; |
| 3593 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3594 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3595 | flag_N = res >> 24; |
| 3596 | POST_IO |
| 3597 | RET(24) |
| 3598 | } |
| 3599 | |
| 3600 | // CMPI |
| 3601 | OPCODE(0x0CB0) |
| 3602 | { |
| 3603 | u32 adr, res; |
| 3604 | u32 src, dst; |
| 3605 | |
| 3606 | FETCH_LONG(src); |
| 3607 | adr = AREG((Opcode >> 0) & 7); |
| 3608 | DECODE_EXT_WORD |
| 3609 | PRE_IO |
| 3610 | READ_LONG_F(adr, dst) |
| 3611 | res = dst - src; |
| 3612 | flag_NotZ = res; |
| 3613 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3614 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3615 | flag_N = res >> 24; |
| 3616 | POST_IO |
| 3617 | RET(26) |
| 3618 | } |
| 3619 | |
| 3620 | // CMPI |
| 3621 | OPCODE(0x0CB8) |
| 3622 | { |
| 3623 | u32 adr, res; |
| 3624 | u32 src, dst; |
| 3625 | |
| 3626 | FETCH_LONG(src); |
| 3627 | FETCH_SWORD(adr); |
| 3628 | PRE_IO |
| 3629 | READ_LONG_F(adr, dst) |
| 3630 | res = dst - src; |
| 3631 | flag_NotZ = res; |
| 3632 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3633 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3634 | flag_N = res >> 24; |
| 3635 | POST_IO |
| 3636 | RET(24) |
| 3637 | } |
| 3638 | |
| 3639 | // CMPI |
| 3640 | OPCODE(0x0CB9) |
| 3641 | { |
| 3642 | u32 adr, res; |
| 3643 | u32 src, dst; |
| 3644 | |
| 3645 | FETCH_LONG(src); |
| 3646 | FETCH_LONG(adr); |
| 3647 | PRE_IO |
| 3648 | READ_LONG_F(adr, dst) |
| 3649 | res = dst - src; |
| 3650 | flag_NotZ = res; |
| 3651 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3652 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3653 | flag_N = res >> 24; |
| 3654 | POST_IO |
| 3655 | RET(28) |
| 3656 | } |
| 3657 | |
| 3658 | // CMPI |
| 3659 | OPCODE(0x0C9F) |
| 3660 | { |
| 3661 | u32 adr, res; |
| 3662 | u32 src, dst; |
| 3663 | |
| 3664 | FETCH_LONG(src); |
| 3665 | adr = AREG(7); |
| 3666 | AREG(7) += 4; |
| 3667 | PRE_IO |
| 3668 | READ_LONG_F(adr, dst) |
| 3669 | res = dst - src; |
| 3670 | flag_NotZ = res; |
| 3671 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3672 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3673 | flag_N = res >> 24; |
| 3674 | POST_IO |
| 3675 | RET(20) |
| 3676 | } |
| 3677 | |
| 3678 | // CMPI |
| 3679 | OPCODE(0x0CA7) |
| 3680 | { |
| 3681 | u32 adr, res; |
| 3682 | u32 src, dst; |
| 3683 | |
| 3684 | FETCH_LONG(src); |
| 3685 | adr = AREG(7) - 4; |
| 3686 | AREG(7) = adr; |
| 3687 | PRE_IO |
| 3688 | READ_LONG_F(adr, dst) |
| 3689 | res = dst - src; |
| 3690 | flag_NotZ = res; |
| 3691 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 3692 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 3693 | flag_N = res >> 24; |
| 3694 | POST_IO |
| 3695 | RET(22) |
| 3696 | } |
| 3697 | |
| 3698 | // BTSTn |
| 3699 | OPCODE(0x0800) |
| 3700 | { |
| 3701 | u32 adr, res; |
| 3702 | u32 src, dst; |
| 3703 | |
| 3704 | FETCH_BYTE(src); |
| 3705 | src = 1 << (src & 31); |
| 3706 | res = DREGu32((Opcode >> 0) & 7); |
| 3707 | flag_NotZ = res & src; |
| 3708 | RET(10) |
| 3709 | } |
| 3710 | |
| 3711 | // BTSTn |
| 3712 | OPCODE(0x0810) |
| 3713 | { |
| 3714 | u32 adr, res; |
| 3715 | u32 src, dst; |
| 3716 | |
| 3717 | FETCH_BYTE(src); |
| 3718 | src = 1 << (src & 7); |
| 3719 | adr = AREG((Opcode >> 0) & 7); |
| 3720 | PRE_IO |
| 3721 | READ_BYTE_F(adr, res) |
| 3722 | flag_NotZ = res & src; |
| 3723 | POST_IO |
| 3724 | RET(12) |
| 3725 | } |
| 3726 | |
| 3727 | // BTSTn |
| 3728 | OPCODE(0x0818) |
| 3729 | { |
| 3730 | u32 adr, res; |
| 3731 | u32 src, dst; |
| 3732 | |
| 3733 | FETCH_BYTE(src); |
| 3734 | src = 1 << (src & 7); |
| 3735 | adr = AREG((Opcode >> 0) & 7); |
| 3736 | AREG((Opcode >> 0) & 7) += 1; |
| 3737 | PRE_IO |
| 3738 | READ_BYTE_F(adr, res) |
| 3739 | flag_NotZ = res & src; |
| 3740 | POST_IO |
| 3741 | RET(12) |
| 3742 | } |
| 3743 | |
| 3744 | // BTSTn |
| 3745 | OPCODE(0x0820) |
| 3746 | { |
| 3747 | u32 adr, res; |
| 3748 | u32 src, dst; |
| 3749 | |
| 3750 | FETCH_BYTE(src); |
| 3751 | src = 1 << (src & 7); |
| 3752 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 3753 | AREG((Opcode >> 0) & 7) = adr; |
| 3754 | PRE_IO |
| 3755 | READ_BYTE_F(adr, res) |
| 3756 | flag_NotZ = res & src; |
| 3757 | POST_IO |
| 3758 | RET(14) |
| 3759 | } |
| 3760 | |
| 3761 | // BTSTn |
| 3762 | OPCODE(0x0828) |
| 3763 | { |
| 3764 | u32 adr, res; |
| 3765 | u32 src, dst; |
| 3766 | |
| 3767 | FETCH_BYTE(src); |
| 3768 | src = 1 << (src & 7); |
| 3769 | FETCH_SWORD(adr); |
| 3770 | adr += AREG((Opcode >> 0) & 7); |
| 3771 | PRE_IO |
| 3772 | READ_BYTE_F(adr, res) |
| 3773 | flag_NotZ = res & src; |
| 3774 | POST_IO |
| 3775 | RET(16) |
| 3776 | } |
| 3777 | |
| 3778 | // BTSTn |
| 3779 | OPCODE(0x0830) |
| 3780 | { |
| 3781 | u32 adr, res; |
| 3782 | u32 src, dst; |
| 3783 | |
| 3784 | FETCH_BYTE(src); |
| 3785 | src = 1 << (src & 7); |
| 3786 | adr = AREG((Opcode >> 0) & 7); |
| 3787 | DECODE_EXT_WORD |
| 3788 | PRE_IO |
| 3789 | READ_BYTE_F(adr, res) |
| 3790 | flag_NotZ = res & src; |
| 3791 | POST_IO |
| 3792 | RET(18) |
| 3793 | } |
| 3794 | |
| 3795 | // BTSTn |
| 3796 | OPCODE(0x0838) |
| 3797 | { |
| 3798 | u32 adr, res; |
| 3799 | u32 src, dst; |
| 3800 | |
| 3801 | FETCH_BYTE(src); |
| 3802 | src = 1 << (src & 7); |
| 3803 | FETCH_SWORD(adr); |
| 3804 | PRE_IO |
| 3805 | READ_BYTE_F(adr, res) |
| 3806 | flag_NotZ = res & src; |
| 3807 | POST_IO |
| 3808 | RET(16) |
| 3809 | } |
| 3810 | |
| 3811 | // BTSTn |
| 3812 | OPCODE(0x0839) |
| 3813 | { |
| 3814 | u32 adr, res; |
| 3815 | u32 src, dst; |
| 3816 | |
| 3817 | FETCH_BYTE(src); |
| 3818 | src = 1 << (src & 7); |
| 3819 | FETCH_LONG(adr); |
| 3820 | PRE_IO |
| 3821 | READ_BYTE_F(adr, res) |
| 3822 | flag_NotZ = res & src; |
| 3823 | POST_IO |
| 3824 | RET(20) |
| 3825 | } |
| 3826 | |
| 3827 | // BTSTn |
| 3828 | OPCODE(0x083A) |
| 3829 | { |
| 3830 | u32 adr, res; |
| 3831 | u32 src, dst; |
| 3832 | |
| 3833 | FETCH_BYTE(src); |
| 3834 | src = 1 << (src & 7); |
| 3835 | adr = GET_SWORD + GET_PC; |
| 3836 | PC++; |
| 3837 | PRE_IO |
| 3838 | READ_BYTE_F(adr, res) |
| 3839 | flag_NotZ = res & src; |
| 3840 | POST_IO |
| 3841 | RET(16) |
| 3842 | } |
| 3843 | |
| 3844 | // BTSTn |
| 3845 | OPCODE(0x083B) |
| 3846 | { |
| 3847 | u32 adr, res; |
| 3848 | u32 src, dst; |
| 3849 | |
| 3850 | FETCH_BYTE(src); |
| 3851 | src = 1 << (src & 7); |
| 3852 | adr = (uptr)(PC) - BasePC; |
| 3853 | DECODE_EXT_WORD |
| 3854 | PRE_IO |
| 3855 | READ_BYTE_F(adr, res) |
| 3856 | flag_NotZ = res & src; |
| 3857 | POST_IO |
| 3858 | RET(18) |
| 3859 | } |
| 3860 | |
| 3861 | // BTSTn |
| 3862 | OPCODE(0x081F) |
| 3863 | { |
| 3864 | u32 adr, res; |
| 3865 | u32 src, dst; |
| 3866 | |
| 3867 | FETCH_BYTE(src); |
| 3868 | src = 1 << (src & 7); |
| 3869 | adr = AREG(7); |
| 3870 | AREG(7) += 2; |
| 3871 | PRE_IO |
| 3872 | READ_BYTE_F(adr, res) |
| 3873 | flag_NotZ = res & src; |
| 3874 | POST_IO |
| 3875 | RET(12) |
| 3876 | } |
| 3877 | |
| 3878 | // BTSTn |
| 3879 | OPCODE(0x0827) |
| 3880 | { |
| 3881 | u32 adr, res; |
| 3882 | u32 src, dst; |
| 3883 | |
| 3884 | FETCH_BYTE(src); |
| 3885 | src = 1 << (src & 7); |
| 3886 | adr = AREG(7) - 2; |
| 3887 | AREG(7) = adr; |
| 3888 | PRE_IO |
| 3889 | READ_BYTE_F(adr, res) |
| 3890 | flag_NotZ = res & src; |
| 3891 | POST_IO |
| 3892 | RET(14) |
| 3893 | } |
| 3894 | |
| 3895 | // BCHGn |
| 3896 | OPCODE(0x0840) |
| 3897 | { |
| 3898 | u32 adr, res; |
| 3899 | u32 src, dst; |
| 3900 | |
| 3901 | FETCH_BYTE(src); |
| 3902 | src = 1 << (src & 31); |
| 3903 | res = DREGu32((Opcode >> 0) & 7); |
| 3904 | flag_NotZ = res & src; |
| 3905 | res ^= src; |
| 3906 | DREGu32((Opcode >> 0) & 7) = res; |
| 3907 | RET(12) |
| 3908 | } |
| 3909 | |
| 3910 | // BCHGn |
| 3911 | OPCODE(0x0850) |
| 3912 | { |
| 3913 | u32 adr, res; |
| 3914 | u32 src, dst; |
| 3915 | |
| 3916 | FETCH_BYTE(src); |
| 3917 | src = 1 << (src & 7); |
| 3918 | adr = AREG((Opcode >> 0) & 7); |
| 3919 | PRE_IO |
| 3920 | READ_BYTE_F(adr, res) |
| 3921 | flag_NotZ = res & src; |
| 3922 | res ^= src; |
| 3923 | WRITE_BYTE_F(adr, res) |
| 3924 | POST_IO |
| 3925 | RET(16) |
| 3926 | } |
| 3927 | |
| 3928 | // BCHGn |
| 3929 | OPCODE(0x0858) |
| 3930 | { |
| 3931 | u32 adr, res; |
| 3932 | u32 src, dst; |
| 3933 | |
| 3934 | FETCH_BYTE(src); |
| 3935 | src = 1 << (src & 7); |
| 3936 | adr = AREG((Opcode >> 0) & 7); |
| 3937 | AREG((Opcode >> 0) & 7) += 1; |
| 3938 | PRE_IO |
| 3939 | READ_BYTE_F(adr, res) |
| 3940 | flag_NotZ = res & src; |
| 3941 | res ^= src; |
| 3942 | WRITE_BYTE_F(adr, res) |
| 3943 | POST_IO |
| 3944 | RET(16) |
| 3945 | } |
| 3946 | |
| 3947 | // BCHGn |
| 3948 | OPCODE(0x0860) |
| 3949 | { |
| 3950 | u32 adr, res; |
| 3951 | u32 src, dst; |
| 3952 | |
| 3953 | FETCH_BYTE(src); |
| 3954 | src = 1 << (src & 7); |
| 3955 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 3956 | AREG((Opcode >> 0) & 7) = adr; |
| 3957 | PRE_IO |
| 3958 | READ_BYTE_F(adr, res) |
| 3959 | flag_NotZ = res & src; |
| 3960 | res ^= src; |
| 3961 | WRITE_BYTE_F(adr, res) |
| 3962 | POST_IO |
| 3963 | RET(18) |
| 3964 | } |
| 3965 | |
| 3966 | // BCHGn |
| 3967 | OPCODE(0x0868) |
| 3968 | { |
| 3969 | u32 adr, res; |
| 3970 | u32 src, dst; |
| 3971 | |
| 3972 | FETCH_BYTE(src); |
| 3973 | src = 1 << (src & 7); |
| 3974 | FETCH_SWORD(adr); |
| 3975 | adr += AREG((Opcode >> 0) & 7); |
| 3976 | PRE_IO |
| 3977 | READ_BYTE_F(adr, res) |
| 3978 | flag_NotZ = res & src; |
| 3979 | res ^= src; |
| 3980 | WRITE_BYTE_F(adr, res) |
| 3981 | POST_IO |
| 3982 | RET(20) |
| 3983 | } |
| 3984 | |
| 3985 | // BCHGn |
| 3986 | OPCODE(0x0870) |
| 3987 | { |
| 3988 | u32 adr, res; |
| 3989 | u32 src, dst; |
| 3990 | |
| 3991 | FETCH_BYTE(src); |
| 3992 | src = 1 << (src & 7); |
| 3993 | adr = AREG((Opcode >> 0) & 7); |
| 3994 | DECODE_EXT_WORD |
| 3995 | PRE_IO |
| 3996 | READ_BYTE_F(adr, res) |
| 3997 | flag_NotZ = res & src; |
| 3998 | res ^= src; |
| 3999 | WRITE_BYTE_F(adr, res) |
| 4000 | POST_IO |
| 4001 | RET(22) |
| 4002 | } |
| 4003 | |
| 4004 | // BCHGn |
| 4005 | OPCODE(0x0878) |
| 4006 | { |
| 4007 | u32 adr, res; |
| 4008 | u32 src, dst; |
| 4009 | |
| 4010 | FETCH_BYTE(src); |
| 4011 | src = 1 << (src & 7); |
| 4012 | FETCH_SWORD(adr); |
| 4013 | PRE_IO |
| 4014 | READ_BYTE_F(adr, res) |
| 4015 | flag_NotZ = res & src; |
| 4016 | res ^= src; |
| 4017 | WRITE_BYTE_F(adr, res) |
| 4018 | POST_IO |
| 4019 | RET(20) |
| 4020 | } |
| 4021 | |
| 4022 | // BCHGn |
| 4023 | OPCODE(0x0879) |
| 4024 | { |
| 4025 | u32 adr, res; |
| 4026 | u32 src, dst; |
| 4027 | |
| 4028 | FETCH_BYTE(src); |
| 4029 | src = 1 << (src & 7); |
| 4030 | FETCH_LONG(adr); |
| 4031 | PRE_IO |
| 4032 | READ_BYTE_F(adr, res) |
| 4033 | flag_NotZ = res & src; |
| 4034 | res ^= src; |
| 4035 | WRITE_BYTE_F(adr, res) |
| 4036 | POST_IO |
| 4037 | RET(24) |
| 4038 | } |
| 4039 | |
| 4040 | // BCHGn |
| 4041 | OPCODE(0x085F) |
| 4042 | { |
| 4043 | u32 adr, res; |
| 4044 | u32 src, dst; |
| 4045 | |
| 4046 | FETCH_BYTE(src); |
| 4047 | src = 1 << (src & 7); |
| 4048 | adr = AREG(7); |
| 4049 | AREG(7) += 2; |
| 4050 | PRE_IO |
| 4051 | READ_BYTE_F(adr, res) |
| 4052 | flag_NotZ = res & src; |
| 4053 | res ^= src; |
| 4054 | WRITE_BYTE_F(adr, res) |
| 4055 | POST_IO |
| 4056 | RET(16) |
| 4057 | } |
| 4058 | |
| 4059 | // BCHGn |
| 4060 | OPCODE(0x0867) |
| 4061 | { |
| 4062 | u32 adr, res; |
| 4063 | u32 src, dst; |
| 4064 | |
| 4065 | FETCH_BYTE(src); |
| 4066 | src = 1 << (src & 7); |
| 4067 | adr = AREG(7) - 2; |
| 4068 | AREG(7) = adr; |
| 4069 | PRE_IO |
| 4070 | READ_BYTE_F(adr, res) |
| 4071 | flag_NotZ = res & src; |
| 4072 | res ^= src; |
| 4073 | WRITE_BYTE_F(adr, res) |
| 4074 | POST_IO |
| 4075 | RET(18) |
| 4076 | } |
| 4077 | |
| 4078 | // BCLRn |
| 4079 | OPCODE(0x0880) |
| 4080 | { |
| 4081 | u32 adr, res; |
| 4082 | u32 src, dst; |
| 4083 | |
| 4084 | FETCH_BYTE(src); |
| 4085 | src = 1 << (src & 31); |
| 4086 | res = DREGu32((Opcode >> 0) & 7); |
| 4087 | flag_NotZ = res & src; |
| 4088 | res &= ~src; |
| 4089 | DREGu32((Opcode >> 0) & 7) = res; |
| 4090 | RET(14) |
| 4091 | } |
| 4092 | |
| 4093 | // BCLRn |
| 4094 | OPCODE(0x0890) |
| 4095 | { |
| 4096 | u32 adr, res; |
| 4097 | u32 src, dst; |
| 4098 | |
| 4099 | FETCH_BYTE(src); |
| 4100 | src = 1 << (src & 7); |
| 4101 | adr = AREG((Opcode >> 0) & 7); |
| 4102 | PRE_IO |
| 4103 | READ_BYTE_F(adr, res) |
| 4104 | flag_NotZ = res & src; |
| 4105 | res &= ~src; |
| 4106 | WRITE_BYTE_F(adr, res) |
| 4107 | POST_IO |
| 4108 | RET(16) |
| 4109 | } |
| 4110 | |
| 4111 | // BCLRn |
| 4112 | OPCODE(0x0898) |
| 4113 | { |
| 4114 | u32 adr, res; |
| 4115 | u32 src, dst; |
| 4116 | |
| 4117 | FETCH_BYTE(src); |
| 4118 | src = 1 << (src & 7); |
| 4119 | adr = AREG((Opcode >> 0) & 7); |
| 4120 | AREG((Opcode >> 0) & 7) += 1; |
| 4121 | PRE_IO |
| 4122 | READ_BYTE_F(adr, res) |
| 4123 | flag_NotZ = res & src; |
| 4124 | res &= ~src; |
| 4125 | WRITE_BYTE_F(adr, res) |
| 4126 | POST_IO |
| 4127 | RET(16) |
| 4128 | } |
| 4129 | |
| 4130 | // BCLRn |
| 4131 | OPCODE(0x08A0) |
| 4132 | { |
| 4133 | u32 adr, res; |
| 4134 | u32 src, dst; |
| 4135 | |
| 4136 | FETCH_BYTE(src); |
| 4137 | src = 1 << (src & 7); |
| 4138 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 4139 | AREG((Opcode >> 0) & 7) = adr; |
| 4140 | PRE_IO |
| 4141 | READ_BYTE_F(adr, res) |
| 4142 | flag_NotZ = res & src; |
| 4143 | res &= ~src; |
| 4144 | WRITE_BYTE_F(adr, res) |
| 4145 | POST_IO |
| 4146 | RET(18) |
| 4147 | } |
| 4148 | |
| 4149 | // BCLRn |
| 4150 | OPCODE(0x08A8) |
| 4151 | { |
| 4152 | u32 adr, res; |
| 4153 | u32 src, dst; |
| 4154 | |
| 4155 | FETCH_BYTE(src); |
| 4156 | src = 1 << (src & 7); |
| 4157 | FETCH_SWORD(adr); |
| 4158 | adr += AREG((Opcode >> 0) & 7); |
| 4159 | PRE_IO |
| 4160 | READ_BYTE_F(adr, res) |
| 4161 | flag_NotZ = res & src; |
| 4162 | res &= ~src; |
| 4163 | WRITE_BYTE_F(adr, res) |
| 4164 | POST_IO |
| 4165 | RET(20) |
| 4166 | } |
| 4167 | |
| 4168 | // BCLRn |
| 4169 | OPCODE(0x08B0) |
| 4170 | { |
| 4171 | u32 adr, res; |
| 4172 | u32 src, dst; |
| 4173 | |
| 4174 | FETCH_BYTE(src); |
| 4175 | src = 1 << (src & 7); |
| 4176 | adr = AREG((Opcode >> 0) & 7); |
| 4177 | DECODE_EXT_WORD |
| 4178 | PRE_IO |
| 4179 | READ_BYTE_F(adr, res) |
| 4180 | flag_NotZ = res & src; |
| 4181 | res &= ~src; |
| 4182 | WRITE_BYTE_F(adr, res) |
| 4183 | POST_IO |
| 4184 | RET(22) |
| 4185 | } |
| 4186 | |
| 4187 | // BCLRn |
| 4188 | OPCODE(0x08B8) |
| 4189 | { |
| 4190 | u32 adr, res; |
| 4191 | u32 src, dst; |
| 4192 | |
| 4193 | FETCH_BYTE(src); |
| 4194 | src = 1 << (src & 7); |
| 4195 | FETCH_SWORD(adr); |
| 4196 | PRE_IO |
| 4197 | READ_BYTE_F(adr, res) |
| 4198 | flag_NotZ = res & src; |
| 4199 | res &= ~src; |
| 4200 | WRITE_BYTE_F(adr, res) |
| 4201 | POST_IO |
| 4202 | RET(20) |
| 4203 | } |
| 4204 | |
| 4205 | // BCLRn |
| 4206 | OPCODE(0x08B9) |
| 4207 | { |
| 4208 | u32 adr, res; |
| 4209 | u32 src, dst; |
| 4210 | |
| 4211 | FETCH_BYTE(src); |
| 4212 | src = 1 << (src & 7); |
| 4213 | FETCH_LONG(adr); |
| 4214 | PRE_IO |
| 4215 | READ_BYTE_F(adr, res) |
| 4216 | flag_NotZ = res & src; |
| 4217 | res &= ~src; |
| 4218 | WRITE_BYTE_F(adr, res) |
| 4219 | POST_IO |
| 4220 | RET(24) |
| 4221 | } |
| 4222 | |
| 4223 | // BCLRn |
| 4224 | OPCODE(0x089F) |
| 4225 | { |
| 4226 | u32 adr, res; |
| 4227 | u32 src, dst; |
| 4228 | |
| 4229 | FETCH_BYTE(src); |
| 4230 | src = 1 << (src & 7); |
| 4231 | adr = AREG(7); |
| 4232 | AREG(7) += 2; |
| 4233 | PRE_IO |
| 4234 | READ_BYTE_F(adr, res) |
| 4235 | flag_NotZ = res & src; |
| 4236 | res &= ~src; |
| 4237 | WRITE_BYTE_F(adr, res) |
| 4238 | POST_IO |
| 4239 | RET(16) |
| 4240 | } |
| 4241 | |
| 4242 | // BCLRn |
| 4243 | OPCODE(0x08A7) |
| 4244 | { |
| 4245 | u32 adr, res; |
| 4246 | u32 src, dst; |
| 4247 | |
| 4248 | FETCH_BYTE(src); |
| 4249 | src = 1 << (src & 7); |
| 4250 | adr = AREG(7) - 2; |
| 4251 | AREG(7) = adr; |
| 4252 | PRE_IO |
| 4253 | READ_BYTE_F(adr, res) |
| 4254 | flag_NotZ = res & src; |
| 4255 | res &= ~src; |
| 4256 | WRITE_BYTE_F(adr, res) |
| 4257 | POST_IO |
| 4258 | RET(18) |
| 4259 | } |
| 4260 | |
| 4261 | // BSETn |
| 4262 | OPCODE(0x08C0) |
| 4263 | { |
| 4264 | u32 adr, res; |
| 4265 | u32 src, dst; |
| 4266 | |
| 4267 | FETCH_BYTE(src); |
| 4268 | src = 1 << (src & 31); |
| 4269 | res = DREGu32((Opcode >> 0) & 7); |
| 4270 | flag_NotZ = res & src; |
| 4271 | res |= src; |
| 4272 | DREGu32((Opcode >> 0) & 7) = res; |
| 4273 | RET(12) |
| 4274 | } |
| 4275 | |
| 4276 | // BSETn |
| 4277 | OPCODE(0x08D0) |
| 4278 | { |
| 4279 | u32 adr, res; |
| 4280 | u32 src, dst; |
| 4281 | |
| 4282 | FETCH_BYTE(src); |
| 4283 | src = 1 << (src & 7); |
| 4284 | adr = AREG((Opcode >> 0) & 7); |
| 4285 | PRE_IO |
| 4286 | READ_BYTE_F(adr, res) |
| 4287 | flag_NotZ = res & src; |
| 4288 | res |= src; |
| 4289 | WRITE_BYTE_F(adr, res) |
| 4290 | POST_IO |
| 4291 | RET(16) |
| 4292 | } |
| 4293 | |
| 4294 | // BSETn |
| 4295 | OPCODE(0x08D8) |
| 4296 | { |
| 4297 | u32 adr, res; |
| 4298 | u32 src, dst; |
| 4299 | |
| 4300 | FETCH_BYTE(src); |
| 4301 | src = 1 << (src & 7); |
| 4302 | adr = AREG((Opcode >> 0) & 7); |
| 4303 | AREG((Opcode >> 0) & 7) += 1; |
| 4304 | PRE_IO |
| 4305 | READ_BYTE_F(adr, res) |
| 4306 | flag_NotZ = res & src; |
| 4307 | res |= src; |
| 4308 | WRITE_BYTE_F(adr, res) |
| 4309 | POST_IO |
| 4310 | RET(16) |
| 4311 | } |
| 4312 | |
| 4313 | // BSETn |
| 4314 | OPCODE(0x08E0) |
| 4315 | { |
| 4316 | u32 adr, res; |
| 4317 | u32 src, dst; |
| 4318 | |
| 4319 | FETCH_BYTE(src); |
| 4320 | src = 1 << (src & 7); |
| 4321 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 4322 | AREG((Opcode >> 0) & 7) = adr; |
| 4323 | PRE_IO |
| 4324 | READ_BYTE_F(adr, res) |
| 4325 | flag_NotZ = res & src; |
| 4326 | res |= src; |
| 4327 | WRITE_BYTE_F(adr, res) |
| 4328 | POST_IO |
| 4329 | RET(18) |
| 4330 | } |
| 4331 | |
| 4332 | // BSETn |
| 4333 | OPCODE(0x08E8) |
| 4334 | { |
| 4335 | u32 adr, res; |
| 4336 | u32 src, dst; |
| 4337 | |
| 4338 | FETCH_BYTE(src); |
| 4339 | src = 1 << (src & 7); |
| 4340 | FETCH_SWORD(adr); |
| 4341 | adr += AREG((Opcode >> 0) & 7); |
| 4342 | PRE_IO |
| 4343 | READ_BYTE_F(adr, res) |
| 4344 | flag_NotZ = res & src; |
| 4345 | res |= src; |
| 4346 | WRITE_BYTE_F(adr, res) |
| 4347 | POST_IO |
| 4348 | RET(20) |
| 4349 | } |
| 4350 | |
| 4351 | // BSETn |
| 4352 | OPCODE(0x08F0) |
| 4353 | { |
| 4354 | u32 adr, res; |
| 4355 | u32 src, dst; |
| 4356 | |
| 4357 | FETCH_BYTE(src); |
| 4358 | src = 1 << (src & 7); |
| 4359 | adr = AREG((Opcode >> 0) & 7); |
| 4360 | DECODE_EXT_WORD |
| 4361 | PRE_IO |
| 4362 | READ_BYTE_F(adr, res) |
| 4363 | flag_NotZ = res & src; |
| 4364 | res |= src; |
| 4365 | WRITE_BYTE_F(adr, res) |
| 4366 | POST_IO |
| 4367 | RET(22) |
| 4368 | } |
| 4369 | |
| 4370 | // BSETn |
| 4371 | OPCODE(0x08F8) |
| 4372 | { |
| 4373 | u32 adr, res; |
| 4374 | u32 src, dst; |
| 4375 | |
| 4376 | FETCH_BYTE(src); |
| 4377 | src = 1 << (src & 7); |
| 4378 | FETCH_SWORD(adr); |
| 4379 | PRE_IO |
| 4380 | READ_BYTE_F(adr, res) |
| 4381 | flag_NotZ = res & src; |
| 4382 | res |= src; |
| 4383 | WRITE_BYTE_F(adr, res) |
| 4384 | POST_IO |
| 4385 | RET(20) |
| 4386 | } |
| 4387 | |
| 4388 | // BSETn |
| 4389 | OPCODE(0x08F9) |
| 4390 | { |
| 4391 | u32 adr, res; |
| 4392 | u32 src, dst; |
| 4393 | |
| 4394 | FETCH_BYTE(src); |
| 4395 | src = 1 << (src & 7); |
| 4396 | FETCH_LONG(adr); |
| 4397 | PRE_IO |
| 4398 | READ_BYTE_F(adr, res) |
| 4399 | flag_NotZ = res & src; |
| 4400 | res |= src; |
| 4401 | WRITE_BYTE_F(adr, res) |
| 4402 | POST_IO |
| 4403 | RET(24) |
| 4404 | } |
| 4405 | |
| 4406 | // BSETn |
| 4407 | OPCODE(0x08DF) |
| 4408 | { |
| 4409 | u32 adr, res; |
| 4410 | u32 src, dst; |
| 4411 | |
| 4412 | FETCH_BYTE(src); |
| 4413 | src = 1 << (src & 7); |
| 4414 | adr = AREG(7); |
| 4415 | AREG(7) += 2; |
| 4416 | PRE_IO |
| 4417 | READ_BYTE_F(adr, res) |
| 4418 | flag_NotZ = res & src; |
| 4419 | res |= src; |
| 4420 | WRITE_BYTE_F(adr, res) |
| 4421 | POST_IO |
| 4422 | RET(16) |
| 4423 | } |
| 4424 | |
| 4425 | // BSETn |
| 4426 | OPCODE(0x08E7) |
| 4427 | { |
| 4428 | u32 adr, res; |
| 4429 | u32 src, dst; |
| 4430 | |
| 4431 | FETCH_BYTE(src); |
| 4432 | src = 1 << (src & 7); |
| 4433 | adr = AREG(7) - 2; |
| 4434 | AREG(7) = adr; |
| 4435 | PRE_IO |
| 4436 | READ_BYTE_F(adr, res) |
| 4437 | flag_NotZ = res & src; |
| 4438 | res |= src; |
| 4439 | WRITE_BYTE_F(adr, res) |
| 4440 | POST_IO |
| 4441 | RET(18) |
| 4442 | } |
| 4443 | |
| 4444 | // BTST |
| 4445 | OPCODE(0x0100) |
| 4446 | { |
| 4447 | u32 adr, res; |
| 4448 | u32 src, dst; |
| 4449 | |
| 4450 | src = DREGu32((Opcode >> 9) & 7); |
| 4451 | src = 1 << (src & 31); |
| 4452 | res = DREGu32((Opcode >> 0) & 7); |
| 4453 | flag_NotZ = res & src; |
| 4454 | RET(6) |
| 4455 | } |
| 4456 | |
| 4457 | // BTST |
| 4458 | OPCODE(0x0110) |
| 4459 | { |
| 4460 | u32 adr, res; |
| 4461 | u32 src, dst; |
| 4462 | |
| 4463 | src = DREGu8((Opcode >> 9) & 7); |
| 4464 | src = 1 << (src & 7); |
| 4465 | adr = AREG((Opcode >> 0) & 7); |
| 4466 | PRE_IO |
| 4467 | READ_BYTE_F(adr, res) |
| 4468 | flag_NotZ = res & src; |
| 4469 | POST_IO |
| 4470 | RET(8) |
| 4471 | } |
| 4472 | |
| 4473 | // BTST |
| 4474 | OPCODE(0x0118) |
| 4475 | { |
| 4476 | u32 adr, res; |
| 4477 | u32 src, dst; |
| 4478 | |
| 4479 | src = DREGu8((Opcode >> 9) & 7); |
| 4480 | src = 1 << (src & 7); |
| 4481 | adr = AREG((Opcode >> 0) & 7); |
| 4482 | AREG((Opcode >> 0) & 7) += 1; |
| 4483 | PRE_IO |
| 4484 | READ_BYTE_F(adr, res) |
| 4485 | flag_NotZ = res & src; |
| 4486 | POST_IO |
| 4487 | RET(8) |
| 4488 | } |
| 4489 | |
| 4490 | // BTST |
| 4491 | OPCODE(0x0120) |
| 4492 | { |
| 4493 | u32 adr, res; |
| 4494 | u32 src, dst; |
| 4495 | |
| 4496 | src = DREGu8((Opcode >> 9) & 7); |
| 4497 | src = 1 << (src & 7); |
| 4498 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 4499 | AREG((Opcode >> 0) & 7) = adr; |
| 4500 | PRE_IO |
| 4501 | READ_BYTE_F(adr, res) |
| 4502 | flag_NotZ = res & src; |
| 4503 | POST_IO |
| 4504 | RET(10) |
| 4505 | } |
| 4506 | |
| 4507 | // BTST |
| 4508 | OPCODE(0x0128) |
| 4509 | { |
| 4510 | u32 adr, res; |
| 4511 | u32 src, dst; |
| 4512 | |
| 4513 | src = DREGu8((Opcode >> 9) & 7); |
| 4514 | src = 1 << (src & 7); |
| 4515 | FETCH_SWORD(adr); |
| 4516 | adr += AREG((Opcode >> 0) & 7); |
| 4517 | PRE_IO |
| 4518 | READ_BYTE_F(adr, res) |
| 4519 | flag_NotZ = res & src; |
| 4520 | POST_IO |
| 4521 | RET(12) |
| 4522 | } |
| 4523 | |
| 4524 | // BTST |
| 4525 | OPCODE(0x0130) |
| 4526 | { |
| 4527 | u32 adr, res; |
| 4528 | u32 src, dst; |
| 4529 | |
| 4530 | src = DREGu8((Opcode >> 9) & 7); |
| 4531 | src = 1 << (src & 7); |
| 4532 | adr = AREG((Opcode >> 0) & 7); |
| 4533 | DECODE_EXT_WORD |
| 4534 | PRE_IO |
| 4535 | READ_BYTE_F(adr, res) |
| 4536 | flag_NotZ = res & src; |
| 4537 | POST_IO |
| 4538 | RET(14) |
| 4539 | } |
| 4540 | |
| 4541 | // BTST |
| 4542 | OPCODE(0x0138) |
| 4543 | { |
| 4544 | u32 adr, res; |
| 4545 | u32 src, dst; |
| 4546 | |
| 4547 | src = DREGu8((Opcode >> 9) & 7); |
| 4548 | src = 1 << (src & 7); |
| 4549 | FETCH_SWORD(adr); |
| 4550 | PRE_IO |
| 4551 | READ_BYTE_F(adr, res) |
| 4552 | flag_NotZ = res & src; |
| 4553 | POST_IO |
| 4554 | RET(12) |
| 4555 | } |
| 4556 | |
| 4557 | // BTST |
| 4558 | OPCODE(0x0139) |
| 4559 | { |
| 4560 | u32 adr, res; |
| 4561 | u32 src, dst; |
| 4562 | |
| 4563 | src = DREGu8((Opcode >> 9) & 7); |
| 4564 | src = 1 << (src & 7); |
| 4565 | FETCH_LONG(adr); |
| 4566 | PRE_IO |
| 4567 | READ_BYTE_F(adr, res) |
| 4568 | flag_NotZ = res & src; |
| 4569 | POST_IO |
| 4570 | RET(16) |
| 4571 | } |
| 4572 | |
| 4573 | // BTST |
| 4574 | OPCODE(0x013A) |
| 4575 | { |
| 4576 | u32 adr, res; |
| 4577 | u32 src, dst; |
| 4578 | |
| 4579 | src = DREGu8((Opcode >> 9) & 7); |
| 4580 | src = 1 << (src & 7); |
| 4581 | adr = GET_SWORD + GET_PC; |
| 4582 | PC++; |
| 4583 | PRE_IO |
| 4584 | READ_BYTE_F(adr, res) |
| 4585 | flag_NotZ = res & src; |
| 4586 | POST_IO |
| 4587 | RET(12) |
| 4588 | } |
| 4589 | |
| 4590 | // BTST |
| 4591 | OPCODE(0x013B) |
| 4592 | { |
| 4593 | u32 adr, res; |
| 4594 | u32 src, dst; |
| 4595 | |
| 4596 | src = DREGu8((Opcode >> 9) & 7); |
| 4597 | src = 1 << (src & 7); |
| 4598 | adr = (uptr)(PC) - BasePC; |
| 4599 | DECODE_EXT_WORD |
| 4600 | PRE_IO |
| 4601 | READ_BYTE_F(adr, res) |
| 4602 | flag_NotZ = res & src; |
| 4603 | POST_IO |
| 4604 | RET(14) |
| 4605 | } |
| 4606 | |
| 4607 | // BTST |
| 4608 | OPCODE(0x013C) |
| 4609 | { |
| 4610 | u32 adr, res; |
| 4611 | u32 src, dst; |
| 4612 | |
| 4613 | src = DREGu8((Opcode >> 9) & 7); |
| 4614 | src = 1 << (src & 7); |
| 4615 | FETCH_BYTE(res); |
| 4616 | flag_NotZ = res & src; |
| 4617 | RET(8) |
| 4618 | } |
| 4619 | |
| 4620 | // BTST |
| 4621 | OPCODE(0x011F) |
| 4622 | { |
| 4623 | u32 adr, res; |
| 4624 | u32 src, dst; |
| 4625 | |
| 4626 | src = DREGu8((Opcode >> 9) & 7); |
| 4627 | src = 1 << (src & 7); |
| 4628 | adr = AREG(7); |
| 4629 | AREG(7) += 2; |
| 4630 | PRE_IO |
| 4631 | READ_BYTE_F(adr, res) |
| 4632 | flag_NotZ = res & src; |
| 4633 | POST_IO |
| 4634 | RET(8) |
| 4635 | } |
| 4636 | |
| 4637 | // BTST |
| 4638 | OPCODE(0x0127) |
| 4639 | { |
| 4640 | u32 adr, res; |
| 4641 | u32 src, dst; |
| 4642 | |
| 4643 | src = DREGu8((Opcode >> 9) & 7); |
| 4644 | src = 1 << (src & 7); |
| 4645 | adr = AREG(7) - 2; |
| 4646 | AREG(7) = adr; |
| 4647 | PRE_IO |
| 4648 | READ_BYTE_F(adr, res) |
| 4649 | flag_NotZ = res & src; |
| 4650 | POST_IO |
| 4651 | RET(10) |
| 4652 | } |
| 4653 | |
| 4654 | // BCHG |
| 4655 | OPCODE(0x0140) |
| 4656 | { |
| 4657 | u32 adr, res; |
| 4658 | u32 src, dst; |
| 4659 | |
| 4660 | src = DREGu32((Opcode >> 9) & 7); |
| 4661 | src = 1 << (src & 31); |
| 4662 | res = DREGu32((Opcode >> 0) & 7); |
| 4663 | flag_NotZ = res & src; |
| 4664 | res ^= src; |
| 4665 | DREGu32((Opcode >> 0) & 7) = res; |
| 4666 | RET(8) |
| 4667 | } |
| 4668 | |
| 4669 | // BCHG |
| 4670 | OPCODE(0x0150) |
| 4671 | { |
| 4672 | u32 adr, res; |
| 4673 | u32 src, dst; |
| 4674 | |
| 4675 | src = DREGu8((Opcode >> 9) & 7); |
| 4676 | src = 1 << (src & 7); |
| 4677 | adr = AREG((Opcode >> 0) & 7); |
| 4678 | PRE_IO |
| 4679 | READ_BYTE_F(adr, res) |
| 4680 | flag_NotZ = res & src; |
| 4681 | res ^= src; |
| 4682 | WRITE_BYTE_F(adr, res) |
| 4683 | POST_IO |
| 4684 | RET(12) |
| 4685 | } |
| 4686 | |
| 4687 | // BCHG |
| 4688 | OPCODE(0x0158) |
| 4689 | { |
| 4690 | u32 adr, res; |
| 4691 | u32 src, dst; |
| 4692 | |
| 4693 | src = DREGu8((Opcode >> 9) & 7); |
| 4694 | src = 1 << (src & 7); |
| 4695 | adr = AREG((Opcode >> 0) & 7); |
| 4696 | AREG((Opcode >> 0) & 7) += 1; |
| 4697 | PRE_IO |
| 4698 | READ_BYTE_F(adr, res) |
| 4699 | flag_NotZ = res & src; |
| 4700 | res ^= src; |
| 4701 | WRITE_BYTE_F(adr, res) |
| 4702 | POST_IO |
| 4703 | RET(12) |
| 4704 | } |
| 4705 | |
| 4706 | // BCHG |
| 4707 | OPCODE(0x0160) |
| 4708 | { |
| 4709 | u32 adr, res; |
| 4710 | u32 src, dst; |
| 4711 | |
| 4712 | src = DREGu8((Opcode >> 9) & 7); |
| 4713 | src = 1 << (src & 7); |
| 4714 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 4715 | AREG((Opcode >> 0) & 7) = adr; |
| 4716 | PRE_IO |
| 4717 | READ_BYTE_F(adr, res) |
| 4718 | flag_NotZ = res & src; |
| 4719 | res ^= src; |
| 4720 | WRITE_BYTE_F(adr, res) |
| 4721 | POST_IO |
| 4722 | RET(14) |
| 4723 | } |
| 4724 | |
| 4725 | // BCHG |
| 4726 | OPCODE(0x0168) |
| 4727 | { |
| 4728 | u32 adr, res; |
| 4729 | u32 src, dst; |
| 4730 | |
| 4731 | src = DREGu8((Opcode >> 9) & 7); |
| 4732 | src = 1 << (src & 7); |
| 4733 | FETCH_SWORD(adr); |
| 4734 | adr += AREG((Opcode >> 0) & 7); |
| 4735 | PRE_IO |
| 4736 | READ_BYTE_F(adr, res) |
| 4737 | flag_NotZ = res & src; |
| 4738 | res ^= src; |
| 4739 | WRITE_BYTE_F(adr, res) |
| 4740 | POST_IO |
| 4741 | RET(16) |
| 4742 | } |
| 4743 | |
| 4744 | // BCHG |
| 4745 | OPCODE(0x0170) |
| 4746 | { |
| 4747 | u32 adr, res; |
| 4748 | u32 src, dst; |
| 4749 | |
| 4750 | src = DREGu8((Opcode >> 9) & 7); |
| 4751 | src = 1 << (src & 7); |
| 4752 | adr = AREG((Opcode >> 0) & 7); |
| 4753 | DECODE_EXT_WORD |
| 4754 | PRE_IO |
| 4755 | READ_BYTE_F(adr, res) |
| 4756 | flag_NotZ = res & src; |
| 4757 | res ^= src; |
| 4758 | WRITE_BYTE_F(adr, res) |
| 4759 | POST_IO |
| 4760 | RET(18) |
| 4761 | } |
| 4762 | |
| 4763 | // BCHG |
| 4764 | OPCODE(0x0178) |
| 4765 | { |
| 4766 | u32 adr, res; |
| 4767 | u32 src, dst; |
| 4768 | |
| 4769 | src = DREGu8((Opcode >> 9) & 7); |
| 4770 | src = 1 << (src & 7); |
| 4771 | FETCH_SWORD(adr); |
| 4772 | PRE_IO |
| 4773 | READ_BYTE_F(adr, res) |
| 4774 | flag_NotZ = res & src; |
| 4775 | res ^= src; |
| 4776 | WRITE_BYTE_F(adr, res) |
| 4777 | POST_IO |
| 4778 | RET(16) |
| 4779 | } |
| 4780 | |
| 4781 | // BCHG |
| 4782 | OPCODE(0x0179) |
| 4783 | { |
| 4784 | u32 adr, res; |
| 4785 | u32 src, dst; |
| 4786 | |
| 4787 | src = DREGu8((Opcode >> 9) & 7); |
| 4788 | src = 1 << (src & 7); |
| 4789 | FETCH_LONG(adr); |
| 4790 | PRE_IO |
| 4791 | READ_BYTE_F(adr, res) |
| 4792 | flag_NotZ = res & src; |
| 4793 | res ^= src; |
| 4794 | WRITE_BYTE_F(adr, res) |
| 4795 | POST_IO |
| 4796 | RET(20) |
| 4797 | } |
| 4798 | |
| 4799 | // BCHG |
| 4800 | OPCODE(0x015F) |
| 4801 | { |
| 4802 | u32 adr, res; |
| 4803 | u32 src, dst; |
| 4804 | |
| 4805 | src = DREGu8((Opcode >> 9) & 7); |
| 4806 | src = 1 << (src & 7); |
| 4807 | adr = AREG(7); |
| 4808 | AREG(7) += 2; |
| 4809 | PRE_IO |
| 4810 | READ_BYTE_F(adr, res) |
| 4811 | flag_NotZ = res & src; |
| 4812 | res ^= src; |
| 4813 | WRITE_BYTE_F(adr, res) |
| 4814 | POST_IO |
| 4815 | RET(12) |
| 4816 | } |
| 4817 | |
| 4818 | // BCHG |
| 4819 | OPCODE(0x0167) |
| 4820 | { |
| 4821 | u32 adr, res; |
| 4822 | u32 src, dst; |
| 4823 | |
| 4824 | src = DREGu8((Opcode >> 9) & 7); |
| 4825 | src = 1 << (src & 7); |
| 4826 | adr = AREG(7) - 2; |
| 4827 | AREG(7) = adr; |
| 4828 | PRE_IO |
| 4829 | READ_BYTE_F(adr, res) |
| 4830 | flag_NotZ = res & src; |
| 4831 | res ^= src; |
| 4832 | WRITE_BYTE_F(adr, res) |
| 4833 | POST_IO |
| 4834 | RET(14) |
| 4835 | } |
| 4836 | |
| 4837 | // BCLR |
| 4838 | OPCODE(0x0180) |
| 4839 | { |
| 4840 | u32 adr, res; |
| 4841 | u32 src, dst; |
| 4842 | |
| 4843 | src = DREGu32((Opcode >> 9) & 7); |
| 4844 | src = 1 << (src & 31); |
| 4845 | res = DREGu32((Opcode >> 0) & 7); |
| 4846 | flag_NotZ = res & src; |
| 4847 | res &= ~src; |
| 4848 | DREGu32((Opcode >> 0) & 7) = res; |
| 4849 | RET(10) |
| 4850 | } |
| 4851 | |
| 4852 | // BCLR |
| 4853 | OPCODE(0x0190) |
| 4854 | { |
| 4855 | u32 adr, res; |
| 4856 | u32 src, dst; |
| 4857 | |
| 4858 | src = DREGu8((Opcode >> 9) & 7); |
| 4859 | src = 1 << (src & 7); |
| 4860 | adr = AREG((Opcode >> 0) & 7); |
| 4861 | PRE_IO |
| 4862 | READ_BYTE_F(adr, res) |
| 4863 | flag_NotZ = res & src; |
| 4864 | res &= ~src; |
| 4865 | WRITE_BYTE_F(adr, res) |
| 4866 | POST_IO |
| 4867 | RET(12) |
| 4868 | } |
| 4869 | |
| 4870 | // BCLR |
| 4871 | OPCODE(0x0198) |
| 4872 | { |
| 4873 | u32 adr, res; |
| 4874 | u32 src, dst; |
| 4875 | |
| 4876 | src = DREGu8((Opcode >> 9) & 7); |
| 4877 | src = 1 << (src & 7); |
| 4878 | adr = AREG((Opcode >> 0) & 7); |
| 4879 | AREG((Opcode >> 0) & 7) += 1; |
| 4880 | PRE_IO |
| 4881 | READ_BYTE_F(adr, res) |
| 4882 | flag_NotZ = res & src; |
| 4883 | res &= ~src; |
| 4884 | WRITE_BYTE_F(adr, res) |
| 4885 | POST_IO |
| 4886 | RET(12) |
| 4887 | } |
| 4888 | |
| 4889 | // BCLR |
| 4890 | OPCODE(0x01A0) |
| 4891 | { |
| 4892 | u32 adr, res; |
| 4893 | u32 src, dst; |
| 4894 | |
| 4895 | src = DREGu8((Opcode >> 9) & 7); |
| 4896 | src = 1 << (src & 7); |
| 4897 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 4898 | AREG((Opcode >> 0) & 7) = adr; |
| 4899 | PRE_IO |
| 4900 | READ_BYTE_F(adr, res) |
| 4901 | flag_NotZ = res & src; |
| 4902 | res &= ~src; |
| 4903 | WRITE_BYTE_F(adr, res) |
| 4904 | POST_IO |
| 4905 | RET(14) |
| 4906 | } |
| 4907 | |
| 4908 | // BCLR |
| 4909 | OPCODE(0x01A8) |
| 4910 | { |
| 4911 | u32 adr, res; |
| 4912 | u32 src, dst; |
| 4913 | |
| 4914 | src = DREGu8((Opcode >> 9) & 7); |
| 4915 | src = 1 << (src & 7); |
| 4916 | FETCH_SWORD(adr); |
| 4917 | adr += AREG((Opcode >> 0) & 7); |
| 4918 | PRE_IO |
| 4919 | READ_BYTE_F(adr, res) |
| 4920 | flag_NotZ = res & src; |
| 4921 | res &= ~src; |
| 4922 | WRITE_BYTE_F(adr, res) |
| 4923 | POST_IO |
| 4924 | RET(16) |
| 4925 | } |
| 4926 | |
| 4927 | // BCLR |
| 4928 | OPCODE(0x01B0) |
| 4929 | { |
| 4930 | u32 adr, res; |
| 4931 | u32 src, dst; |
| 4932 | |
| 4933 | src = DREGu8((Opcode >> 9) & 7); |
| 4934 | src = 1 << (src & 7); |
| 4935 | adr = AREG((Opcode >> 0) & 7); |
| 4936 | DECODE_EXT_WORD |
| 4937 | PRE_IO |
| 4938 | READ_BYTE_F(adr, res) |
| 4939 | flag_NotZ = res & src; |
| 4940 | res &= ~src; |
| 4941 | WRITE_BYTE_F(adr, res) |
| 4942 | POST_IO |
| 4943 | RET(18) |
| 4944 | } |
| 4945 | |
| 4946 | // BCLR |
| 4947 | OPCODE(0x01B8) |
| 4948 | { |
| 4949 | u32 adr, res; |
| 4950 | u32 src, dst; |
| 4951 | |
| 4952 | src = DREGu8((Opcode >> 9) & 7); |
| 4953 | src = 1 << (src & 7); |
| 4954 | FETCH_SWORD(adr); |
| 4955 | PRE_IO |
| 4956 | READ_BYTE_F(adr, res) |
| 4957 | flag_NotZ = res & src; |
| 4958 | res &= ~src; |
| 4959 | WRITE_BYTE_F(adr, res) |
| 4960 | POST_IO |
| 4961 | RET(16) |
| 4962 | } |
| 4963 | |
| 4964 | // BCLR |
| 4965 | OPCODE(0x01B9) |
| 4966 | { |
| 4967 | u32 adr, res; |
| 4968 | u32 src, dst; |
| 4969 | |
| 4970 | src = DREGu8((Opcode >> 9) & 7); |
| 4971 | src = 1 << (src & 7); |
| 4972 | FETCH_LONG(adr); |
| 4973 | PRE_IO |
| 4974 | READ_BYTE_F(adr, res) |
| 4975 | flag_NotZ = res & src; |
| 4976 | res &= ~src; |
| 4977 | WRITE_BYTE_F(adr, res) |
| 4978 | POST_IO |
| 4979 | RET(20) |
| 4980 | } |
| 4981 | |
| 4982 | // BCLR |
| 4983 | OPCODE(0x019F) |
| 4984 | { |
| 4985 | u32 adr, res; |
| 4986 | u32 src, dst; |
| 4987 | |
| 4988 | src = DREGu8((Opcode >> 9) & 7); |
| 4989 | src = 1 << (src & 7); |
| 4990 | adr = AREG(7); |
| 4991 | AREG(7) += 2; |
| 4992 | PRE_IO |
| 4993 | READ_BYTE_F(adr, res) |
| 4994 | flag_NotZ = res & src; |
| 4995 | res &= ~src; |
| 4996 | WRITE_BYTE_F(adr, res) |
| 4997 | POST_IO |
| 4998 | RET(12) |
| 4999 | } |
| 5000 | |
| 5001 | // BCLR |
| 5002 | OPCODE(0x01A7) |
| 5003 | { |
| 5004 | u32 adr, res; |
| 5005 | u32 src, dst; |
| 5006 | |
| 5007 | src = DREGu8((Opcode >> 9) & 7); |
| 5008 | src = 1 << (src & 7); |
| 5009 | adr = AREG(7) - 2; |
| 5010 | AREG(7) = adr; |
| 5011 | PRE_IO |
| 5012 | READ_BYTE_F(adr, res) |
| 5013 | flag_NotZ = res & src; |
| 5014 | res &= ~src; |
| 5015 | WRITE_BYTE_F(adr, res) |
| 5016 | POST_IO |
| 5017 | RET(14) |
| 5018 | } |
| 5019 | |
| 5020 | // BSET |
| 5021 | OPCODE(0x01C0) |
| 5022 | { |
| 5023 | u32 adr, res; |
| 5024 | u32 src, dst; |
| 5025 | |
| 5026 | src = DREGu32((Opcode >> 9) & 7); |
| 5027 | src = 1 << (src & 31); |
| 5028 | res = DREGu32((Opcode >> 0) & 7); |
| 5029 | flag_NotZ = res & src; |
| 5030 | res |= src; |
| 5031 | DREGu32((Opcode >> 0) & 7) = res; |
| 5032 | RET(8) |
| 5033 | } |
| 5034 | |
| 5035 | // BSET |
| 5036 | OPCODE(0x01D0) |
| 5037 | { |
| 5038 | u32 adr, res; |
| 5039 | u32 src, dst; |
| 5040 | |
| 5041 | src = DREGu8((Opcode >> 9) & 7); |
| 5042 | src = 1 << (src & 7); |
| 5043 | adr = AREG((Opcode >> 0) & 7); |
| 5044 | PRE_IO |
| 5045 | READ_BYTE_F(adr, res) |
| 5046 | flag_NotZ = res & src; |
| 5047 | res |= src; |
| 5048 | WRITE_BYTE_F(adr, res) |
| 5049 | POST_IO |
| 5050 | RET(12) |
| 5051 | } |
| 5052 | |
| 5053 | // BSET |
| 5054 | OPCODE(0x01D8) |
| 5055 | { |
| 5056 | u32 adr, res; |
| 5057 | u32 src, dst; |
| 5058 | |
| 5059 | src = DREGu8((Opcode >> 9) & 7); |
| 5060 | src = 1 << (src & 7); |
| 5061 | adr = AREG((Opcode >> 0) & 7); |
| 5062 | AREG((Opcode >> 0) & 7) += 1; |
| 5063 | PRE_IO |
| 5064 | READ_BYTE_F(adr, res) |
| 5065 | flag_NotZ = res & src; |
| 5066 | res |= src; |
| 5067 | WRITE_BYTE_F(adr, res) |
| 5068 | POST_IO |
| 5069 | RET(12) |
| 5070 | } |
| 5071 | |
| 5072 | // BSET |
| 5073 | OPCODE(0x01E0) |
| 5074 | { |
| 5075 | u32 adr, res; |
| 5076 | u32 src, dst; |
| 5077 | |
| 5078 | src = DREGu8((Opcode >> 9) & 7); |
| 5079 | src = 1 << (src & 7); |
| 5080 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 5081 | AREG((Opcode >> 0) & 7) = adr; |
| 5082 | PRE_IO |
| 5083 | READ_BYTE_F(adr, res) |
| 5084 | flag_NotZ = res & src; |
| 5085 | res |= src; |
| 5086 | WRITE_BYTE_F(adr, res) |
| 5087 | POST_IO |
| 5088 | RET(14) |
| 5089 | } |
| 5090 | |
| 5091 | // BSET |
| 5092 | OPCODE(0x01E8) |
| 5093 | { |
| 5094 | u32 adr, res; |
| 5095 | u32 src, dst; |
| 5096 | |
| 5097 | src = DREGu8((Opcode >> 9) & 7); |
| 5098 | src = 1 << (src & 7); |
| 5099 | FETCH_SWORD(adr); |
| 5100 | adr += AREG((Opcode >> 0) & 7); |
| 5101 | PRE_IO |
| 5102 | READ_BYTE_F(adr, res) |
| 5103 | flag_NotZ = res & src; |
| 5104 | res |= src; |
| 5105 | WRITE_BYTE_F(adr, res) |
| 5106 | POST_IO |
| 5107 | RET(16) |
| 5108 | } |
| 5109 | |
| 5110 | // BSET |
| 5111 | OPCODE(0x01F0) |
| 5112 | { |
| 5113 | u32 adr, res; |
| 5114 | u32 src, dst; |
| 5115 | |
| 5116 | src = DREGu8((Opcode >> 9) & 7); |
| 5117 | src = 1 << (src & 7); |
| 5118 | adr = AREG((Opcode >> 0) & 7); |
| 5119 | DECODE_EXT_WORD |
| 5120 | PRE_IO |
| 5121 | READ_BYTE_F(adr, res) |
| 5122 | flag_NotZ = res & src; |
| 5123 | res |= src; |
| 5124 | WRITE_BYTE_F(adr, res) |
| 5125 | POST_IO |
| 5126 | RET(18) |
| 5127 | } |
| 5128 | |
| 5129 | // BSET |
| 5130 | OPCODE(0x01F8) |
| 5131 | { |
| 5132 | u32 adr, res; |
| 5133 | u32 src, dst; |
| 5134 | |
| 5135 | src = DREGu8((Opcode >> 9) & 7); |
| 5136 | src = 1 << (src & 7); |
| 5137 | FETCH_SWORD(adr); |
| 5138 | PRE_IO |
| 5139 | READ_BYTE_F(adr, res) |
| 5140 | flag_NotZ = res & src; |
| 5141 | res |= src; |
| 5142 | WRITE_BYTE_F(adr, res) |
| 5143 | POST_IO |
| 5144 | RET(16) |
| 5145 | } |
| 5146 | |
| 5147 | // BSET |
| 5148 | OPCODE(0x01F9) |
| 5149 | { |
| 5150 | u32 adr, res; |
| 5151 | u32 src, dst; |
| 5152 | |
| 5153 | src = DREGu8((Opcode >> 9) & 7); |
| 5154 | src = 1 << (src & 7); |
| 5155 | FETCH_LONG(adr); |
| 5156 | PRE_IO |
| 5157 | READ_BYTE_F(adr, res) |
| 5158 | flag_NotZ = res & src; |
| 5159 | res |= src; |
| 5160 | WRITE_BYTE_F(adr, res) |
| 5161 | POST_IO |
| 5162 | RET(20) |
| 5163 | } |
| 5164 | |
| 5165 | // BSET |
| 5166 | OPCODE(0x01DF) |
| 5167 | { |
| 5168 | u32 adr, res; |
| 5169 | u32 src, dst; |
| 5170 | |
| 5171 | src = DREGu8((Opcode >> 9) & 7); |
| 5172 | src = 1 << (src & 7); |
| 5173 | adr = AREG(7); |
| 5174 | AREG(7) += 2; |
| 5175 | PRE_IO |
| 5176 | READ_BYTE_F(adr, res) |
| 5177 | flag_NotZ = res & src; |
| 5178 | res |= src; |
| 5179 | WRITE_BYTE_F(adr, res) |
| 5180 | POST_IO |
| 5181 | RET(12) |
| 5182 | } |
| 5183 | |
| 5184 | // BSET |
| 5185 | OPCODE(0x01E7) |
| 5186 | { |
| 5187 | u32 adr, res; |
| 5188 | u32 src, dst; |
| 5189 | |
| 5190 | src = DREGu8((Opcode >> 9) & 7); |
| 5191 | src = 1 << (src & 7); |
| 5192 | adr = AREG(7) - 2; |
| 5193 | AREG(7) = adr; |
| 5194 | PRE_IO |
| 5195 | READ_BYTE_F(adr, res) |
| 5196 | flag_NotZ = res & src; |
| 5197 | res |= src; |
| 5198 | WRITE_BYTE_F(adr, res) |
| 5199 | POST_IO |
| 5200 | RET(14) |
| 5201 | } |
| 5202 | |
| 5203 | // MOVEPWaD |
| 5204 | OPCODE(0x0108) |
| 5205 | { |
| 5206 | u32 adr, res; |
| 5207 | u32 src, dst; |
| 5208 | |
| 5209 | FETCH_SWORD(adr); |
| 5210 | adr += AREG((Opcode >> 0) & 7); |
| 5211 | PRE_IO |
| 5212 | READ_BYTE_F(adr + 0, res) |
| 5213 | READ_BYTE_F(adr + 2, src) |
| 5214 | DREGu16((Opcode >> 9) & 7) = (res << 8) | src; |
| 5215 | POST_IO |
| 5216 | #ifdef USE_CYCLONE_TIMING |
| 5217 | RET(16) |
| 5218 | #else |
| 5219 | RET(24) |
| 5220 | #endif |
| 5221 | } |
| 5222 | |
| 5223 | // MOVEPLaD |
| 5224 | OPCODE(0x0148) |
| 5225 | { |
| 5226 | u32 adr, res; |
| 5227 | u32 src, dst; |
| 5228 | |
| 5229 | FETCH_SWORD(adr); |
| 5230 | adr += AREG((Opcode >> 0) & 7); |
| 5231 | PRE_IO |
| 5232 | READ_BYTE_F(adr, res) |
| 5233 | res <<= 24; |
| 5234 | adr += 2; |
| 5235 | READ_BYTE_F(adr, src) |
| 5236 | res |= src << 16; |
| 5237 | adr += 2; |
| 5238 | READ_BYTE_F(adr, src) |
| 5239 | res |= src << 8; |
| 5240 | adr += 2; |
| 5241 | READ_BYTE_F(adr, src) |
| 5242 | DREG((Opcode >> 9) & 7) = res | src; |
| 5243 | POST_IO |
| 5244 | #ifdef USE_CYCLONE_TIMING |
| 5245 | RET(24) |
| 5246 | #else |
| 5247 | RET(32) |
| 5248 | #endif |
| 5249 | } |
| 5250 | |
| 5251 | // MOVEPWDa |
| 5252 | OPCODE(0x0188) |
| 5253 | { |
| 5254 | u32 adr, res; |
| 5255 | u32 src, dst; |
| 5256 | |
| 5257 | res = DREGu32((Opcode >> 9) & 7); |
| 5258 | FETCH_SWORD(adr); |
| 5259 | adr += AREG((Opcode >> 0) & 7); |
| 5260 | PRE_IO |
| 5261 | WRITE_BYTE_F(adr + 0, res >> 8) |
| 5262 | WRITE_BYTE_F(adr + 2, res >> 0) |
| 5263 | POST_IO |
| 5264 | #ifdef USE_CYCLONE_TIMING |
| 5265 | RET(16) |
| 5266 | #else |
| 5267 | RET(24) |
| 5268 | #endif |
| 5269 | } |
| 5270 | |
| 5271 | // MOVEPLDa |
| 5272 | OPCODE(0x01C8) |
| 5273 | { |
| 5274 | u32 adr, res; |
| 5275 | u32 src, dst; |
| 5276 | |
| 5277 | res = DREGu32((Opcode >> 9) & 7); |
| 5278 | FETCH_SWORD(adr); |
| 5279 | adr += AREG((Opcode >> 0) & 7); |
| 5280 | PRE_IO |
| 5281 | WRITE_BYTE_F(adr, res >> 24) |
| 5282 | adr += 2; |
| 5283 | WRITE_BYTE_F(adr, res >> 16) |
| 5284 | adr += 2; |
| 5285 | WRITE_BYTE_F(adr, res >> 8) |
| 5286 | adr += 2; |
| 5287 | WRITE_BYTE_F(adr, res >> 0) |
| 5288 | POST_IO |
| 5289 | #ifdef USE_CYCLONE_TIMING |
| 5290 | RET(24) |
| 5291 | #else |
| 5292 | RET(32) |
| 5293 | #endif |
| 5294 | } |
| 5295 | |
| 5296 | // MOVEB |
| 5297 | OPCODE(0x1000) |
| 5298 | { |
| 5299 | u32 adr, res; |
| 5300 | u32 src, dst; |
| 5301 | |
| 5302 | res = DREGu8((Opcode >> 0) & 7); |
| 5303 | flag_C = 0; |
| 5304 | flag_V = 0; |
| 5305 | flag_NotZ = res; |
| 5306 | flag_N = res; |
| 5307 | DREGu8((Opcode >> 9) & 7) = res; |
| 5308 | RET(4) |
| 5309 | } |
| 5310 | |
| 5311 | // MOVEB |
| 5312 | OPCODE(0x1080) |
| 5313 | { |
| 5314 | u32 adr, res; |
| 5315 | u32 src, dst; |
| 5316 | |
| 5317 | res = DREGu8((Opcode >> 0) & 7); |
| 5318 | flag_C = 0; |
| 5319 | flag_V = 0; |
| 5320 | flag_NotZ = res; |
| 5321 | flag_N = res; |
| 5322 | adr = AREG((Opcode >> 9) & 7); |
| 5323 | PRE_IO |
| 5324 | WRITE_BYTE_F(adr, res) |
| 5325 | POST_IO |
| 5326 | RET(8) |
| 5327 | } |
| 5328 | |
| 5329 | // MOVEB |
| 5330 | OPCODE(0x10C0) |
| 5331 | { |
| 5332 | u32 adr, res; |
| 5333 | u32 src, dst; |
| 5334 | |
| 5335 | res = DREGu8((Opcode >> 0) & 7); |
| 5336 | flag_C = 0; |
| 5337 | flag_V = 0; |
| 5338 | flag_NotZ = res; |
| 5339 | flag_N = res; |
| 5340 | adr = AREG((Opcode >> 9) & 7); |
| 5341 | AREG((Opcode >> 9) & 7) += 1; |
| 5342 | PRE_IO |
| 5343 | WRITE_BYTE_F(adr, res) |
| 5344 | POST_IO |
| 5345 | RET(8) |
| 5346 | } |
| 5347 | |
| 5348 | // MOVEB |
| 5349 | OPCODE(0x1100) |
| 5350 | { |
| 5351 | u32 adr, res; |
| 5352 | u32 src, dst; |
| 5353 | |
| 5354 | res = DREGu8((Opcode >> 0) & 7); |
| 5355 | flag_C = 0; |
| 5356 | flag_V = 0; |
| 5357 | flag_NotZ = res; |
| 5358 | flag_N = res; |
| 5359 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 5360 | AREG((Opcode >> 9) & 7) = adr; |
| 5361 | PRE_IO |
| 5362 | WRITE_BYTE_F(adr, res) |
| 5363 | POST_IO |
| 5364 | RET(8) |
| 5365 | } |
| 5366 | |
| 5367 | // MOVEB |
| 5368 | OPCODE(0x1140) |
| 5369 | { |
| 5370 | u32 adr, res; |
| 5371 | u32 src, dst; |
| 5372 | |
| 5373 | res = DREGu8((Opcode >> 0) & 7); |
| 5374 | flag_C = 0; |
| 5375 | flag_V = 0; |
| 5376 | flag_NotZ = res; |
| 5377 | flag_N = res; |
| 5378 | FETCH_SWORD(adr); |
| 5379 | adr += AREG((Opcode >> 9) & 7); |
| 5380 | PRE_IO |
| 5381 | WRITE_BYTE_F(adr, res) |
| 5382 | POST_IO |
| 5383 | RET(12) |
| 5384 | } |
| 5385 | |
| 5386 | // MOVEB |
| 5387 | OPCODE(0x1180) |
| 5388 | { |
| 5389 | u32 adr, res; |
| 5390 | u32 src, dst; |
| 5391 | |
| 5392 | res = DREGu8((Opcode >> 0) & 7); |
| 5393 | flag_C = 0; |
| 5394 | flag_V = 0; |
| 5395 | flag_NotZ = res; |
| 5396 | flag_N = res; |
| 5397 | adr = AREG((Opcode >> 9) & 7); |
| 5398 | DECODE_EXT_WORD |
| 5399 | PRE_IO |
| 5400 | WRITE_BYTE_F(adr, res) |
| 5401 | POST_IO |
| 5402 | RET(14) |
| 5403 | } |
| 5404 | |
| 5405 | // MOVEB |
| 5406 | OPCODE(0x11C0) |
| 5407 | { |
| 5408 | u32 adr, res; |
| 5409 | u32 src, dst; |
| 5410 | |
| 5411 | res = DREGu8((Opcode >> 0) & 7); |
| 5412 | flag_C = 0; |
| 5413 | flag_V = 0; |
| 5414 | flag_NotZ = res; |
| 5415 | flag_N = res; |
| 5416 | FETCH_SWORD(adr); |
| 5417 | PRE_IO |
| 5418 | WRITE_BYTE_F(adr, res) |
| 5419 | POST_IO |
| 5420 | RET(12) |
| 5421 | } |
| 5422 | |
| 5423 | // MOVEB |
| 5424 | OPCODE(0x13C0) |
| 5425 | { |
| 5426 | u32 adr, res; |
| 5427 | u32 src, dst; |
| 5428 | |
| 5429 | res = DREGu8((Opcode >> 0) & 7); |
| 5430 | flag_C = 0; |
| 5431 | flag_V = 0; |
| 5432 | flag_NotZ = res; |
| 5433 | flag_N = res; |
| 5434 | FETCH_LONG(adr); |
| 5435 | PRE_IO |
| 5436 | WRITE_BYTE_F(adr, res) |
| 5437 | POST_IO |
| 5438 | RET(16) |
| 5439 | } |
| 5440 | |
| 5441 | // MOVEB |
| 5442 | OPCODE(0x1EC0) |
| 5443 | { |
| 5444 | u32 adr, res; |
| 5445 | u32 src, dst; |
| 5446 | |
| 5447 | res = DREGu8((Opcode >> 0) & 7); |
| 5448 | flag_C = 0; |
| 5449 | flag_V = 0; |
| 5450 | flag_NotZ = res; |
| 5451 | flag_N = res; |
| 5452 | adr = AREG(7); |
| 5453 | AREG(7) += 2; |
| 5454 | PRE_IO |
| 5455 | WRITE_BYTE_F(adr, res) |
| 5456 | POST_IO |
| 5457 | RET(8) |
| 5458 | } |
| 5459 | |
| 5460 | // MOVEB |
| 5461 | OPCODE(0x1F00) |
| 5462 | { |
| 5463 | u32 adr, res; |
| 5464 | u32 src, dst; |
| 5465 | |
| 5466 | res = DREGu8((Opcode >> 0) & 7); |
| 5467 | flag_C = 0; |
| 5468 | flag_V = 0; |
| 5469 | flag_NotZ = res; |
| 5470 | flag_N = res; |
| 5471 | adr = AREG(7) - 2; |
| 5472 | AREG(7) = adr; |
| 5473 | PRE_IO |
| 5474 | WRITE_BYTE_F(adr, res) |
| 5475 | POST_IO |
| 5476 | RET(8) |
| 5477 | } |
| 5478 | |
| 5479 | #if 0 |
| 5480 | // MOVEB |
| 5481 | OPCODE(0x1008) |
| 5482 | { |
| 5483 | u32 adr, res; |
| 5484 | u32 src, dst; |
| 5485 | |
| 5486 | // can't read byte from Ax registers ! |
| 5487 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5488 | m68kcontext.io_cycle_counter = 0; |
| 5489 | /* |
| 5490 | goto famec_Exec_End; |
| 5491 | flag_C = 0; |
| 5492 | flag_V = 0; |
| 5493 | flag_NotZ = res; |
| 5494 | flag_N = res; |
| 5495 | DREGu8((Opcode >> 9) & 7) = res; |
| 5496 | */ |
| 5497 | RET(4) |
| 5498 | } |
| 5499 | |
| 5500 | // MOVEB |
| 5501 | OPCODE(0x1088) |
| 5502 | { |
| 5503 | u32 adr, res; |
| 5504 | u32 src, dst; |
| 5505 | |
| 5506 | // can't read byte from Ax registers ! |
| 5507 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5508 | m68kcontext.io_cycle_counter = 0; |
| 5509 | /* |
| 5510 | goto famec_Exec_End; |
| 5511 | flag_C = 0; |
| 5512 | flag_V = 0; |
| 5513 | flag_NotZ = res; |
| 5514 | flag_N = res; |
| 5515 | adr = AREG((Opcode >> 9) & 7); |
| 5516 | PRE_IO |
| 5517 | WRITE_BYTE_F(adr, res) |
| 5518 | POST_IO |
| 5519 | */ |
| 5520 | RET(8) |
| 5521 | } |
| 5522 | |
| 5523 | // MOVEB |
| 5524 | OPCODE(0x10C8) |
| 5525 | { |
| 5526 | u32 adr, res; |
| 5527 | u32 src, dst; |
| 5528 | |
| 5529 | // can't read byte from Ax registers ! |
| 5530 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5531 | m68kcontext.io_cycle_counter = 0; |
| 5532 | /* |
| 5533 | goto famec_Exec_End; |
| 5534 | flag_C = 0; |
| 5535 | flag_V = 0; |
| 5536 | flag_NotZ = res; |
| 5537 | flag_N = res; |
| 5538 | adr = AREG((Opcode >> 9) & 7); |
| 5539 | AREG((Opcode >> 9) & 7) += 1; |
| 5540 | PRE_IO |
| 5541 | WRITE_BYTE_F(adr, res) |
| 5542 | POST_IO |
| 5543 | */ |
| 5544 | RET(8) |
| 5545 | } |
| 5546 | |
| 5547 | // MOVEB |
| 5548 | OPCODE(0x1108) |
| 5549 | { |
| 5550 | u32 adr, res; |
| 5551 | u32 src, dst; |
| 5552 | |
| 5553 | // can't read byte from Ax registers ! |
| 5554 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5555 | m68kcontext.io_cycle_counter = 0; |
| 5556 | /* |
| 5557 | goto famec_Exec_End; |
| 5558 | flag_C = 0; |
| 5559 | flag_V = 0; |
| 5560 | flag_NotZ = res; |
| 5561 | flag_N = res; |
| 5562 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 5563 | AREG((Opcode >> 9) & 7) = adr; |
| 5564 | PRE_IO |
| 5565 | WRITE_BYTE_F(adr, res) |
| 5566 | POST_IO |
| 5567 | */ |
| 5568 | RET(8) |
| 5569 | } |
| 5570 | |
| 5571 | // MOVEB |
| 5572 | OPCODE(0x1148) |
| 5573 | { |
| 5574 | u32 adr, res; |
| 5575 | u32 src, dst; |
| 5576 | |
| 5577 | // can't read byte from Ax registers ! |
| 5578 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5579 | m68kcontext.io_cycle_counter = 0; |
| 5580 | /* |
| 5581 | goto famec_Exec_End; |
| 5582 | flag_C = 0; |
| 5583 | flag_V = 0; |
| 5584 | flag_NotZ = res; |
| 5585 | flag_N = res; |
| 5586 | FETCH_SWORD(adr); |
| 5587 | adr += AREG((Opcode >> 9) & 7); |
| 5588 | PRE_IO |
| 5589 | WRITE_BYTE_F(adr, res) |
| 5590 | POST_IO |
| 5591 | */ |
| 5592 | RET(12) |
| 5593 | } |
| 5594 | |
| 5595 | // MOVEB |
| 5596 | OPCODE(0x1188) |
| 5597 | { |
| 5598 | u32 adr, res; |
| 5599 | u32 src, dst; |
| 5600 | |
| 5601 | // can't read byte from Ax registers ! |
| 5602 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5603 | m68kcontext.io_cycle_counter = 0; |
| 5604 | /* |
| 5605 | goto famec_Exec_End; |
| 5606 | flag_C = 0; |
| 5607 | flag_V = 0; |
| 5608 | flag_NotZ = res; |
| 5609 | flag_N = res; |
| 5610 | adr = AREG((Opcode >> 9) & 7); |
| 5611 | DECODE_EXT_WORD |
| 5612 | PRE_IO |
| 5613 | WRITE_BYTE_F(adr, res) |
| 5614 | POST_IO |
| 5615 | */ |
| 5616 | RET(14) |
| 5617 | } |
| 5618 | |
| 5619 | // MOVEB |
| 5620 | OPCODE(0x11C8) |
| 5621 | { |
| 5622 | u32 adr, res; |
| 5623 | u32 src, dst; |
| 5624 | |
| 5625 | // can't read byte from Ax registers ! |
| 5626 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5627 | m68kcontext.io_cycle_counter = 0; |
| 5628 | /* |
| 5629 | goto famec_Exec_End; |
| 5630 | flag_C = 0; |
| 5631 | flag_V = 0; |
| 5632 | flag_NotZ = res; |
| 5633 | flag_N = res; |
| 5634 | FETCH_SWORD(adr); |
| 5635 | PRE_IO |
| 5636 | WRITE_BYTE_F(adr, res) |
| 5637 | POST_IO |
| 5638 | */ |
| 5639 | RET(12) |
| 5640 | } |
| 5641 | |
| 5642 | // MOVEB |
| 5643 | OPCODE(0x13C8) |
| 5644 | { |
| 5645 | u32 adr, res; |
| 5646 | u32 src, dst; |
| 5647 | |
| 5648 | // can't read byte from Ax registers ! |
| 5649 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5650 | m68kcontext.io_cycle_counter = 0; |
| 5651 | /* |
| 5652 | goto famec_Exec_End; |
| 5653 | flag_C = 0; |
| 5654 | flag_V = 0; |
| 5655 | flag_NotZ = res; |
| 5656 | flag_N = res; |
| 5657 | FETCH_LONG(adr); |
| 5658 | PRE_IO |
| 5659 | WRITE_BYTE_F(adr, res) |
| 5660 | POST_IO |
| 5661 | */ |
| 5662 | RET(16) |
| 5663 | } |
| 5664 | |
| 5665 | // MOVEB |
| 5666 | OPCODE(0x1EC8) |
| 5667 | { |
| 5668 | u32 adr, res; |
| 5669 | u32 src, dst; |
| 5670 | |
| 5671 | // can't read byte from Ax registers ! |
| 5672 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5673 | m68kcontext.io_cycle_counter = 0; |
| 5674 | /* |
| 5675 | goto famec_Exec_End; |
| 5676 | flag_C = 0; |
| 5677 | flag_V = 0; |
| 5678 | flag_NotZ = res; |
| 5679 | flag_N = res; |
| 5680 | adr = AREG(7); |
| 5681 | AREG(7) += 2; |
| 5682 | PRE_IO |
| 5683 | WRITE_BYTE_F(adr, res) |
| 5684 | POST_IO |
| 5685 | */ |
| 5686 | RET(8) |
| 5687 | } |
| 5688 | |
| 5689 | // MOVEB |
| 5690 | OPCODE(0x1F08) |
| 5691 | { |
| 5692 | u32 adr, res; |
| 5693 | u32 src, dst; |
| 5694 | |
| 5695 | // can't read byte from Ax registers ! |
| 5696 | m68kcontext.execinfo |= M68K_FAULTED; |
| 5697 | m68kcontext.io_cycle_counter = 0; |
| 5698 | /* |
| 5699 | goto famec_Exec_End; |
| 5700 | flag_C = 0; |
| 5701 | flag_V = 0; |
| 5702 | flag_NotZ = res; |
| 5703 | flag_N = res; |
| 5704 | adr = AREG(7) - 2; |
| 5705 | AREG(7) = adr; |
| 5706 | PRE_IO |
| 5707 | WRITE_BYTE_F(adr, res) |
| 5708 | POST_IO |
| 5709 | */ |
| 5710 | RET(8) |
| 5711 | } |
| 5712 | #endif |
| 5713 | |
| 5714 | // MOVEB |
| 5715 | OPCODE(0x1010) |
| 5716 | { |
| 5717 | u32 adr, res; |
| 5718 | u32 src, dst; |
| 5719 | |
| 5720 | adr = AREG((Opcode >> 0) & 7); |
| 5721 | PRE_IO |
| 5722 | READ_BYTE_F(adr, res) |
| 5723 | flag_C = 0; |
| 5724 | flag_V = 0; |
| 5725 | flag_NotZ = res; |
| 5726 | flag_N = res; |
| 5727 | DREGu8((Opcode >> 9) & 7) = res; |
| 5728 | POST_IO |
| 5729 | RET(8) |
| 5730 | } |
| 5731 | |
| 5732 | // MOVEB |
| 5733 | OPCODE(0x1090) |
| 5734 | { |
| 5735 | u32 adr, res; |
| 5736 | u32 src, dst; |
| 5737 | |
| 5738 | adr = AREG((Opcode >> 0) & 7); |
| 5739 | PRE_IO |
| 5740 | READ_BYTE_F(adr, res) |
| 5741 | flag_C = 0; |
| 5742 | flag_V = 0; |
| 5743 | flag_NotZ = res; |
| 5744 | flag_N = res; |
| 5745 | adr = AREG((Opcode >> 9) & 7); |
| 5746 | WRITE_BYTE_F(adr, res) |
| 5747 | POST_IO |
| 5748 | RET(12) |
| 5749 | } |
| 5750 | |
| 5751 | // MOVEB |
| 5752 | OPCODE(0x10D0) |
| 5753 | { |
| 5754 | u32 adr, res; |
| 5755 | u32 src, dst; |
| 5756 | |
| 5757 | adr = AREG((Opcode >> 0) & 7); |
| 5758 | PRE_IO |
| 5759 | READ_BYTE_F(adr, res) |
| 5760 | flag_C = 0; |
| 5761 | flag_V = 0; |
| 5762 | flag_NotZ = res; |
| 5763 | flag_N = res; |
| 5764 | adr = AREG((Opcode >> 9) & 7); |
| 5765 | AREG((Opcode >> 9) & 7) += 1; |
| 5766 | WRITE_BYTE_F(adr, res) |
| 5767 | POST_IO |
| 5768 | RET(12) |
| 5769 | } |
| 5770 | |
| 5771 | // MOVEB |
| 5772 | OPCODE(0x1110) |
| 5773 | { |
| 5774 | u32 adr, res; |
| 5775 | u32 src, dst; |
| 5776 | |
| 5777 | adr = AREG((Opcode >> 0) & 7); |
| 5778 | PRE_IO |
| 5779 | READ_BYTE_F(adr, res) |
| 5780 | flag_C = 0; |
| 5781 | flag_V = 0; |
| 5782 | flag_NotZ = res; |
| 5783 | flag_N = res; |
| 5784 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 5785 | AREG((Opcode >> 9) & 7) = adr; |
| 5786 | WRITE_BYTE_F(adr, res) |
| 5787 | POST_IO |
| 5788 | RET(12) |
| 5789 | } |
| 5790 | |
| 5791 | // MOVEB |
| 5792 | OPCODE(0x1150) |
| 5793 | { |
| 5794 | u32 adr, res; |
| 5795 | u32 src, dst; |
| 5796 | |
| 5797 | adr = AREG((Opcode >> 0) & 7); |
| 5798 | PRE_IO |
| 5799 | READ_BYTE_F(adr, res) |
| 5800 | flag_C = 0; |
| 5801 | flag_V = 0; |
| 5802 | flag_NotZ = res; |
| 5803 | flag_N = res; |
| 5804 | FETCH_SWORD(adr); |
| 5805 | adr += AREG((Opcode >> 9) & 7); |
| 5806 | WRITE_BYTE_F(adr, res) |
| 5807 | POST_IO |
| 5808 | RET(16) |
| 5809 | } |
| 5810 | |
| 5811 | // MOVEB |
| 5812 | OPCODE(0x1190) |
| 5813 | { |
| 5814 | u32 adr, res; |
| 5815 | u32 src, dst; |
| 5816 | |
| 5817 | adr = AREG((Opcode >> 0) & 7); |
| 5818 | PRE_IO |
| 5819 | READ_BYTE_F(adr, res) |
| 5820 | flag_C = 0; |
| 5821 | flag_V = 0; |
| 5822 | flag_NotZ = res; |
| 5823 | flag_N = res; |
| 5824 | adr = AREG((Opcode >> 9) & 7); |
| 5825 | DECODE_EXT_WORD |
| 5826 | WRITE_BYTE_F(adr, res) |
| 5827 | POST_IO |
| 5828 | RET(18) |
| 5829 | } |
| 5830 | |
| 5831 | // MOVEB |
| 5832 | OPCODE(0x11D0) |
| 5833 | { |
| 5834 | u32 adr, res; |
| 5835 | u32 src, dst; |
| 5836 | |
| 5837 | adr = AREG((Opcode >> 0) & 7); |
| 5838 | PRE_IO |
| 5839 | READ_BYTE_F(adr, res) |
| 5840 | flag_C = 0; |
| 5841 | flag_V = 0; |
| 5842 | flag_NotZ = res; |
| 5843 | flag_N = res; |
| 5844 | FETCH_SWORD(adr); |
| 5845 | WRITE_BYTE_F(adr, res) |
| 5846 | POST_IO |
| 5847 | RET(16) |
| 5848 | } |
| 5849 | |
| 5850 | // MOVEB |
| 5851 | OPCODE(0x13D0) |
| 5852 | { |
| 5853 | u32 adr, res; |
| 5854 | u32 src, dst; |
| 5855 | |
| 5856 | adr = AREG((Opcode >> 0) & 7); |
| 5857 | PRE_IO |
| 5858 | READ_BYTE_F(adr, res) |
| 5859 | flag_C = 0; |
| 5860 | flag_V = 0; |
| 5861 | flag_NotZ = res; |
| 5862 | flag_N = res; |
| 5863 | FETCH_LONG(adr); |
| 5864 | WRITE_BYTE_F(adr, res) |
| 5865 | POST_IO |
| 5866 | RET(20) |
| 5867 | } |
| 5868 | |
| 5869 | // MOVEB |
| 5870 | OPCODE(0x1ED0) |
| 5871 | { |
| 5872 | u32 adr, res; |
| 5873 | u32 src, dst; |
| 5874 | |
| 5875 | adr = AREG((Opcode >> 0) & 7); |
| 5876 | PRE_IO |
| 5877 | READ_BYTE_F(adr, res) |
| 5878 | flag_C = 0; |
| 5879 | flag_V = 0; |
| 5880 | flag_NotZ = res; |
| 5881 | flag_N = res; |
| 5882 | adr = AREG(7); |
| 5883 | AREG(7) += 2; |
| 5884 | WRITE_BYTE_F(adr, res) |
| 5885 | POST_IO |
| 5886 | RET(12) |
| 5887 | } |
| 5888 | |
| 5889 | // MOVEB |
| 5890 | OPCODE(0x1F10) |
| 5891 | { |
| 5892 | u32 adr, res; |
| 5893 | u32 src, dst; |
| 5894 | |
| 5895 | adr = AREG((Opcode >> 0) & 7); |
| 5896 | PRE_IO |
| 5897 | READ_BYTE_F(adr, res) |
| 5898 | flag_C = 0; |
| 5899 | flag_V = 0; |
| 5900 | flag_NotZ = res; |
| 5901 | flag_N = res; |
| 5902 | adr = AREG(7) - 2; |
| 5903 | AREG(7) = adr; |
| 5904 | WRITE_BYTE_F(adr, res) |
| 5905 | POST_IO |
| 5906 | RET(12) |
| 5907 | } |
| 5908 | |
| 5909 | // MOVEB |
| 5910 | OPCODE(0x1018) |
| 5911 | { |
| 5912 | u32 adr, res; |
| 5913 | u32 src, dst; |
| 5914 | |
| 5915 | adr = AREG((Opcode >> 0) & 7); |
| 5916 | AREG((Opcode >> 0) & 7) += 1; |
| 5917 | PRE_IO |
| 5918 | READ_BYTE_F(adr, res) |
| 5919 | flag_C = 0; |
| 5920 | flag_V = 0; |
| 5921 | flag_NotZ = res; |
| 5922 | flag_N = res; |
| 5923 | DREGu8((Opcode >> 9) & 7) = res; |
| 5924 | POST_IO |
| 5925 | RET(8) |
| 5926 | } |
| 5927 | |
| 5928 | // MOVEB |
| 5929 | OPCODE(0x1098) |
| 5930 | { |
| 5931 | u32 adr, res; |
| 5932 | u32 src, dst; |
| 5933 | |
| 5934 | adr = AREG((Opcode >> 0) & 7); |
| 5935 | AREG((Opcode >> 0) & 7) += 1; |
| 5936 | PRE_IO |
| 5937 | READ_BYTE_F(adr, res) |
| 5938 | flag_C = 0; |
| 5939 | flag_V = 0; |
| 5940 | flag_NotZ = res; |
| 5941 | flag_N = res; |
| 5942 | adr = AREG((Opcode >> 9) & 7); |
| 5943 | WRITE_BYTE_F(adr, res) |
| 5944 | POST_IO |
| 5945 | RET(12) |
| 5946 | } |
| 5947 | |
| 5948 | // MOVEB |
| 5949 | OPCODE(0x10D8) |
| 5950 | { |
| 5951 | u32 adr, res; |
| 5952 | u32 src, dst; |
| 5953 | |
| 5954 | adr = AREG((Opcode >> 0) & 7); |
| 5955 | AREG((Opcode >> 0) & 7) += 1; |
| 5956 | PRE_IO |
| 5957 | READ_BYTE_F(adr, res) |
| 5958 | flag_C = 0; |
| 5959 | flag_V = 0; |
| 5960 | flag_NotZ = res; |
| 5961 | flag_N = res; |
| 5962 | adr = AREG((Opcode >> 9) & 7); |
| 5963 | AREG((Opcode >> 9) & 7) += 1; |
| 5964 | WRITE_BYTE_F(adr, res) |
| 5965 | POST_IO |
| 5966 | RET(12) |
| 5967 | } |
| 5968 | |
| 5969 | // MOVEB |
| 5970 | OPCODE(0x1118) |
| 5971 | { |
| 5972 | u32 adr, res; |
| 5973 | u32 src, dst; |
| 5974 | |
| 5975 | adr = AREG((Opcode >> 0) & 7); |
| 5976 | AREG((Opcode >> 0) & 7) += 1; |
| 5977 | PRE_IO |
| 5978 | READ_BYTE_F(adr, res) |
| 5979 | flag_C = 0; |
| 5980 | flag_V = 0; |
| 5981 | flag_NotZ = res; |
| 5982 | flag_N = res; |
| 5983 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 5984 | AREG((Opcode >> 9) & 7) = adr; |
| 5985 | WRITE_BYTE_F(adr, res) |
| 5986 | POST_IO |
| 5987 | RET(12) |
| 5988 | } |
| 5989 | |
| 5990 | // MOVEB |
| 5991 | OPCODE(0x1158) |
| 5992 | { |
| 5993 | u32 adr, res; |
| 5994 | u32 src, dst; |
| 5995 | |
| 5996 | adr = AREG((Opcode >> 0) & 7); |
| 5997 | AREG((Opcode >> 0) & 7) += 1; |
| 5998 | PRE_IO |
| 5999 | READ_BYTE_F(adr, res) |
| 6000 | flag_C = 0; |
| 6001 | flag_V = 0; |
| 6002 | flag_NotZ = res; |
| 6003 | flag_N = res; |
| 6004 | FETCH_SWORD(adr); |
| 6005 | adr += AREG((Opcode >> 9) & 7); |
| 6006 | WRITE_BYTE_F(adr, res) |
| 6007 | POST_IO |
| 6008 | RET(16) |
| 6009 | } |
| 6010 | |
| 6011 | // MOVEB |
| 6012 | OPCODE(0x1198) |
| 6013 | { |
| 6014 | u32 adr, res; |
| 6015 | u32 src, dst; |
| 6016 | |
| 6017 | adr = AREG((Opcode >> 0) & 7); |
| 6018 | AREG((Opcode >> 0) & 7) += 1; |
| 6019 | PRE_IO |
| 6020 | READ_BYTE_F(adr, res) |
| 6021 | flag_C = 0; |
| 6022 | flag_V = 0; |
| 6023 | flag_NotZ = res; |
| 6024 | flag_N = res; |
| 6025 | adr = AREG((Opcode >> 9) & 7); |
| 6026 | DECODE_EXT_WORD |
| 6027 | WRITE_BYTE_F(adr, res) |
| 6028 | POST_IO |
| 6029 | RET(18) |
| 6030 | } |
| 6031 | |
| 6032 | // MOVEB |
| 6033 | OPCODE(0x11D8) |
| 6034 | { |
| 6035 | u32 adr, res; |
| 6036 | u32 src, dst; |
| 6037 | |
| 6038 | adr = AREG((Opcode >> 0) & 7); |
| 6039 | AREG((Opcode >> 0) & 7) += 1; |
| 6040 | PRE_IO |
| 6041 | READ_BYTE_F(adr, res) |
| 6042 | flag_C = 0; |
| 6043 | flag_V = 0; |
| 6044 | flag_NotZ = res; |
| 6045 | flag_N = res; |
| 6046 | FETCH_SWORD(adr); |
| 6047 | WRITE_BYTE_F(adr, res) |
| 6048 | POST_IO |
| 6049 | RET(16) |
| 6050 | } |
| 6051 | |
| 6052 | // MOVEB |
| 6053 | OPCODE(0x13D8) |
| 6054 | { |
| 6055 | u32 adr, res; |
| 6056 | u32 src, dst; |
| 6057 | |
| 6058 | adr = AREG((Opcode >> 0) & 7); |
| 6059 | AREG((Opcode >> 0) & 7) += 1; |
| 6060 | PRE_IO |
| 6061 | READ_BYTE_F(adr, res) |
| 6062 | flag_C = 0; |
| 6063 | flag_V = 0; |
| 6064 | flag_NotZ = res; |
| 6065 | flag_N = res; |
| 6066 | FETCH_LONG(adr); |
| 6067 | WRITE_BYTE_F(adr, res) |
| 6068 | POST_IO |
| 6069 | RET(20) |
| 6070 | } |
| 6071 | |
| 6072 | // MOVEB |
| 6073 | OPCODE(0x1ED8) |
| 6074 | { |
| 6075 | u32 adr, res; |
| 6076 | u32 src, dst; |
| 6077 | |
| 6078 | adr = AREG((Opcode >> 0) & 7); |
| 6079 | AREG((Opcode >> 0) & 7) += 1; |
| 6080 | PRE_IO |
| 6081 | READ_BYTE_F(adr, res) |
| 6082 | flag_C = 0; |
| 6083 | flag_V = 0; |
| 6084 | flag_NotZ = res; |
| 6085 | flag_N = res; |
| 6086 | adr = AREG(7); |
| 6087 | AREG(7) += 2; |
| 6088 | WRITE_BYTE_F(adr, res) |
| 6089 | POST_IO |
| 6090 | RET(12) |
| 6091 | } |
| 6092 | |
| 6093 | // MOVEB |
| 6094 | OPCODE(0x1F18) |
| 6095 | { |
| 6096 | u32 adr, res; |
| 6097 | u32 src, dst; |
| 6098 | |
| 6099 | adr = AREG((Opcode >> 0) & 7); |
| 6100 | AREG((Opcode >> 0) & 7) += 1; |
| 6101 | PRE_IO |
| 6102 | READ_BYTE_F(adr, res) |
| 6103 | flag_C = 0; |
| 6104 | flag_V = 0; |
| 6105 | flag_NotZ = res; |
| 6106 | flag_N = res; |
| 6107 | adr = AREG(7) - 2; |
| 6108 | AREG(7) = adr; |
| 6109 | WRITE_BYTE_F(adr, res) |
| 6110 | POST_IO |
| 6111 | RET(12) |
| 6112 | } |
| 6113 | |
| 6114 | // MOVEB |
| 6115 | OPCODE(0x1020) |
| 6116 | { |
| 6117 | u32 adr, res; |
| 6118 | u32 src, dst; |
| 6119 | |
| 6120 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6121 | AREG((Opcode >> 0) & 7) = adr; |
| 6122 | PRE_IO |
| 6123 | READ_BYTE_F(adr, res) |
| 6124 | flag_C = 0; |
| 6125 | flag_V = 0; |
| 6126 | flag_NotZ = res; |
| 6127 | flag_N = res; |
| 6128 | DREGu8((Opcode >> 9) & 7) = res; |
| 6129 | POST_IO |
| 6130 | RET(10) |
| 6131 | } |
| 6132 | |
| 6133 | // MOVEB |
| 6134 | OPCODE(0x10A0) |
| 6135 | { |
| 6136 | u32 adr, res; |
| 6137 | u32 src, dst; |
| 6138 | |
| 6139 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6140 | AREG((Opcode >> 0) & 7) = adr; |
| 6141 | PRE_IO |
| 6142 | READ_BYTE_F(adr, res) |
| 6143 | flag_C = 0; |
| 6144 | flag_V = 0; |
| 6145 | flag_NotZ = res; |
| 6146 | flag_N = res; |
| 6147 | adr = AREG((Opcode >> 9) & 7); |
| 6148 | WRITE_BYTE_F(adr, res) |
| 6149 | POST_IO |
| 6150 | RET(14) |
| 6151 | } |
| 6152 | |
| 6153 | // MOVEB |
| 6154 | OPCODE(0x10E0) |
| 6155 | { |
| 6156 | u32 adr, res; |
| 6157 | u32 src, dst; |
| 6158 | |
| 6159 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6160 | AREG((Opcode >> 0) & 7) = adr; |
| 6161 | PRE_IO |
| 6162 | READ_BYTE_F(adr, res) |
| 6163 | flag_C = 0; |
| 6164 | flag_V = 0; |
| 6165 | flag_NotZ = res; |
| 6166 | flag_N = res; |
| 6167 | adr = AREG((Opcode >> 9) & 7); |
| 6168 | AREG((Opcode >> 9) & 7) += 1; |
| 6169 | WRITE_BYTE_F(adr, res) |
| 6170 | POST_IO |
| 6171 | RET(14) |
| 6172 | } |
| 6173 | |
| 6174 | // MOVEB |
| 6175 | OPCODE(0x1120) |
| 6176 | { |
| 6177 | u32 adr, res; |
| 6178 | u32 src, dst; |
| 6179 | |
| 6180 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6181 | AREG((Opcode >> 0) & 7) = adr; |
| 6182 | PRE_IO |
| 6183 | READ_BYTE_F(adr, res) |
| 6184 | flag_C = 0; |
| 6185 | flag_V = 0; |
| 6186 | flag_NotZ = res; |
| 6187 | flag_N = res; |
| 6188 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 6189 | AREG((Opcode >> 9) & 7) = adr; |
| 6190 | WRITE_BYTE_F(adr, res) |
| 6191 | POST_IO |
| 6192 | RET(14) |
| 6193 | } |
| 6194 | |
| 6195 | // MOVEB |
| 6196 | OPCODE(0x1160) |
| 6197 | { |
| 6198 | u32 adr, res; |
| 6199 | u32 src, dst; |
| 6200 | |
| 6201 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6202 | AREG((Opcode >> 0) & 7) = adr; |
| 6203 | PRE_IO |
| 6204 | READ_BYTE_F(adr, res) |
| 6205 | flag_C = 0; |
| 6206 | flag_V = 0; |
| 6207 | flag_NotZ = res; |
| 6208 | flag_N = res; |
| 6209 | FETCH_SWORD(adr); |
| 6210 | adr += AREG((Opcode >> 9) & 7); |
| 6211 | WRITE_BYTE_F(adr, res) |
| 6212 | POST_IO |
| 6213 | RET(18) |
| 6214 | } |
| 6215 | |
| 6216 | // MOVEB |
| 6217 | OPCODE(0x11A0) |
| 6218 | { |
| 6219 | u32 adr, res; |
| 6220 | u32 src, dst; |
| 6221 | |
| 6222 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6223 | AREG((Opcode >> 0) & 7) = adr; |
| 6224 | PRE_IO |
| 6225 | READ_BYTE_F(adr, res) |
| 6226 | flag_C = 0; |
| 6227 | flag_V = 0; |
| 6228 | flag_NotZ = res; |
| 6229 | flag_N = res; |
| 6230 | adr = AREG((Opcode >> 9) & 7); |
| 6231 | DECODE_EXT_WORD |
| 6232 | WRITE_BYTE_F(adr, res) |
| 6233 | POST_IO |
| 6234 | RET(20) |
| 6235 | } |
| 6236 | |
| 6237 | // MOVEB |
| 6238 | OPCODE(0x11E0) |
| 6239 | { |
| 6240 | u32 adr, res; |
| 6241 | u32 src, dst; |
| 6242 | |
| 6243 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6244 | AREG((Opcode >> 0) & 7) = adr; |
| 6245 | PRE_IO |
| 6246 | READ_BYTE_F(adr, res) |
| 6247 | flag_C = 0; |
| 6248 | flag_V = 0; |
| 6249 | flag_NotZ = res; |
| 6250 | flag_N = res; |
| 6251 | FETCH_SWORD(adr); |
| 6252 | WRITE_BYTE_F(adr, res) |
| 6253 | POST_IO |
| 6254 | RET(18) |
| 6255 | } |
| 6256 | |
| 6257 | // MOVEB |
| 6258 | OPCODE(0x13E0) |
| 6259 | { |
| 6260 | u32 adr, res; |
| 6261 | u32 src, dst; |
| 6262 | |
| 6263 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6264 | AREG((Opcode >> 0) & 7) = adr; |
| 6265 | PRE_IO |
| 6266 | READ_BYTE_F(adr, res) |
| 6267 | flag_C = 0; |
| 6268 | flag_V = 0; |
| 6269 | flag_NotZ = res; |
| 6270 | flag_N = res; |
| 6271 | FETCH_LONG(adr); |
| 6272 | WRITE_BYTE_F(adr, res) |
| 6273 | POST_IO |
| 6274 | RET(22) |
| 6275 | } |
| 6276 | |
| 6277 | // MOVEB |
| 6278 | OPCODE(0x1EE0) |
| 6279 | { |
| 6280 | u32 adr, res; |
| 6281 | u32 src, dst; |
| 6282 | |
| 6283 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6284 | AREG((Opcode >> 0) & 7) = adr; |
| 6285 | PRE_IO |
| 6286 | READ_BYTE_F(adr, res) |
| 6287 | flag_C = 0; |
| 6288 | flag_V = 0; |
| 6289 | flag_NotZ = res; |
| 6290 | flag_N = res; |
| 6291 | adr = AREG(7); |
| 6292 | AREG(7) += 2; |
| 6293 | WRITE_BYTE_F(adr, res) |
| 6294 | POST_IO |
| 6295 | RET(14) |
| 6296 | } |
| 6297 | |
| 6298 | // MOVEB |
| 6299 | OPCODE(0x1F20) |
| 6300 | { |
| 6301 | u32 adr, res; |
| 6302 | u32 src, dst; |
| 6303 | |
| 6304 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 6305 | AREG((Opcode >> 0) & 7) = adr; |
| 6306 | PRE_IO |
| 6307 | READ_BYTE_F(adr, res) |
| 6308 | flag_C = 0; |
| 6309 | flag_V = 0; |
| 6310 | flag_NotZ = res; |
| 6311 | flag_N = res; |
| 6312 | adr = AREG(7) - 2; |
| 6313 | AREG(7) = adr; |
| 6314 | WRITE_BYTE_F(adr, res) |
| 6315 | POST_IO |
| 6316 | RET(14) |
| 6317 | } |
| 6318 | |
| 6319 | // MOVEB |
| 6320 | OPCODE(0x1028) |
| 6321 | { |
| 6322 | u32 adr, res; |
| 6323 | u32 src, dst; |
| 6324 | |
| 6325 | FETCH_SWORD(adr); |
| 6326 | adr += AREG((Opcode >> 0) & 7); |
| 6327 | PRE_IO |
| 6328 | READ_BYTE_F(adr, res) |
| 6329 | flag_C = 0; |
| 6330 | flag_V = 0; |
| 6331 | flag_NotZ = res; |
| 6332 | flag_N = res; |
| 6333 | DREGu8((Opcode >> 9) & 7) = res; |
| 6334 | POST_IO |
| 6335 | RET(12) |
| 6336 | } |
| 6337 | |
| 6338 | // MOVEB |
| 6339 | OPCODE(0x10A8) |
| 6340 | { |
| 6341 | u32 adr, res; |
| 6342 | u32 src, dst; |
| 6343 | |
| 6344 | FETCH_SWORD(adr); |
| 6345 | adr += AREG((Opcode >> 0) & 7); |
| 6346 | PRE_IO |
| 6347 | READ_BYTE_F(adr, res) |
| 6348 | flag_C = 0; |
| 6349 | flag_V = 0; |
| 6350 | flag_NotZ = res; |
| 6351 | flag_N = res; |
| 6352 | adr = AREG((Opcode >> 9) & 7); |
| 6353 | WRITE_BYTE_F(adr, res) |
| 6354 | POST_IO |
| 6355 | RET(16) |
| 6356 | } |
| 6357 | |
| 6358 | // MOVEB |
| 6359 | OPCODE(0x10E8) |
| 6360 | { |
| 6361 | u32 adr, res; |
| 6362 | u32 src, dst; |
| 6363 | |
| 6364 | FETCH_SWORD(adr); |
| 6365 | adr += AREG((Opcode >> 0) & 7); |
| 6366 | PRE_IO |
| 6367 | READ_BYTE_F(adr, res) |
| 6368 | flag_C = 0; |
| 6369 | flag_V = 0; |
| 6370 | flag_NotZ = res; |
| 6371 | flag_N = res; |
| 6372 | adr = AREG((Opcode >> 9) & 7); |
| 6373 | AREG((Opcode >> 9) & 7) += 1; |
| 6374 | WRITE_BYTE_F(adr, res) |
| 6375 | POST_IO |
| 6376 | RET(16) |
| 6377 | } |
| 6378 | |
| 6379 | // MOVEB |
| 6380 | OPCODE(0x1128) |
| 6381 | { |
| 6382 | u32 adr, res; |
| 6383 | u32 src, dst; |
| 6384 | |
| 6385 | FETCH_SWORD(adr); |
| 6386 | adr += AREG((Opcode >> 0) & 7); |
| 6387 | PRE_IO |
| 6388 | READ_BYTE_F(adr, res) |
| 6389 | flag_C = 0; |
| 6390 | flag_V = 0; |
| 6391 | flag_NotZ = res; |
| 6392 | flag_N = res; |
| 6393 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 6394 | AREG((Opcode >> 9) & 7) = adr; |
| 6395 | WRITE_BYTE_F(adr, res) |
| 6396 | POST_IO |
| 6397 | RET(16) |
| 6398 | } |
| 6399 | |
| 6400 | // MOVEB |
| 6401 | OPCODE(0x1168) |
| 6402 | { |
| 6403 | u32 adr, res; |
| 6404 | u32 src, dst; |
| 6405 | |
| 6406 | FETCH_SWORD(adr); |
| 6407 | adr += AREG((Opcode >> 0) & 7); |
| 6408 | PRE_IO |
| 6409 | READ_BYTE_F(adr, res) |
| 6410 | flag_C = 0; |
| 6411 | flag_V = 0; |
| 6412 | flag_NotZ = res; |
| 6413 | flag_N = res; |
| 6414 | FETCH_SWORD(adr); |
| 6415 | adr += AREG((Opcode >> 9) & 7); |
| 6416 | WRITE_BYTE_F(adr, res) |
| 6417 | POST_IO |
| 6418 | RET(20) |
| 6419 | } |
| 6420 | |
| 6421 | // MOVEB |
| 6422 | OPCODE(0x11A8) |
| 6423 | { |
| 6424 | u32 adr, res; |
| 6425 | u32 src, dst; |
| 6426 | |
| 6427 | FETCH_SWORD(adr); |
| 6428 | adr += AREG((Opcode >> 0) & 7); |
| 6429 | PRE_IO |
| 6430 | READ_BYTE_F(adr, res) |
| 6431 | flag_C = 0; |
| 6432 | flag_V = 0; |
| 6433 | flag_NotZ = res; |
| 6434 | flag_N = res; |
| 6435 | adr = AREG((Opcode >> 9) & 7); |
| 6436 | DECODE_EXT_WORD |
| 6437 | WRITE_BYTE_F(adr, res) |
| 6438 | POST_IO |
| 6439 | RET(22) |
| 6440 | } |
| 6441 | |
| 6442 | // MOVEB |
| 6443 | OPCODE(0x11E8) |
| 6444 | { |
| 6445 | u32 adr, res; |
| 6446 | u32 src, dst; |
| 6447 | |
| 6448 | FETCH_SWORD(adr); |
| 6449 | adr += AREG((Opcode >> 0) & 7); |
| 6450 | PRE_IO |
| 6451 | READ_BYTE_F(adr, res) |
| 6452 | flag_C = 0; |
| 6453 | flag_V = 0; |
| 6454 | flag_NotZ = res; |
| 6455 | flag_N = res; |
| 6456 | FETCH_SWORD(adr); |
| 6457 | WRITE_BYTE_F(adr, res) |
| 6458 | POST_IO |
| 6459 | RET(20) |
| 6460 | } |
| 6461 | |
| 6462 | // MOVEB |
| 6463 | OPCODE(0x13E8) |
| 6464 | { |
| 6465 | u32 adr, res; |
| 6466 | u32 src, dst; |
| 6467 | |
| 6468 | FETCH_SWORD(adr); |
| 6469 | adr += AREG((Opcode >> 0) & 7); |
| 6470 | PRE_IO |
| 6471 | READ_BYTE_F(adr, res) |
| 6472 | flag_C = 0; |
| 6473 | flag_V = 0; |
| 6474 | flag_NotZ = res; |
| 6475 | flag_N = res; |
| 6476 | FETCH_LONG(adr); |
| 6477 | WRITE_BYTE_F(adr, res) |
| 6478 | POST_IO |
| 6479 | RET(24) |
| 6480 | } |
| 6481 | |
| 6482 | // MOVEB |
| 6483 | OPCODE(0x1EE8) |
| 6484 | { |
| 6485 | u32 adr, res; |
| 6486 | u32 src, dst; |
| 6487 | |
| 6488 | FETCH_SWORD(adr); |
| 6489 | adr += AREG((Opcode >> 0) & 7); |
| 6490 | PRE_IO |
| 6491 | READ_BYTE_F(adr, res) |
| 6492 | flag_C = 0; |
| 6493 | flag_V = 0; |
| 6494 | flag_NotZ = res; |
| 6495 | flag_N = res; |
| 6496 | adr = AREG(7); |
| 6497 | AREG(7) += 2; |
| 6498 | WRITE_BYTE_F(adr, res) |
| 6499 | POST_IO |
| 6500 | RET(16) |
| 6501 | } |
| 6502 | |
| 6503 | // MOVEB |
| 6504 | OPCODE(0x1F28) |
| 6505 | { |
| 6506 | u32 adr, res; |
| 6507 | u32 src, dst; |
| 6508 | |
| 6509 | FETCH_SWORD(adr); |
| 6510 | adr += AREG((Opcode >> 0) & 7); |
| 6511 | PRE_IO |
| 6512 | READ_BYTE_F(adr, res) |
| 6513 | flag_C = 0; |
| 6514 | flag_V = 0; |
| 6515 | flag_NotZ = res; |
| 6516 | flag_N = res; |
| 6517 | adr = AREG(7) - 2; |
| 6518 | AREG(7) = adr; |
| 6519 | WRITE_BYTE_F(adr, res) |
| 6520 | POST_IO |
| 6521 | RET(16) |
| 6522 | } |
| 6523 | |
| 6524 | // MOVEB |
| 6525 | OPCODE(0x1030) |
| 6526 | { |
| 6527 | u32 adr, res; |
| 6528 | u32 src, dst; |
| 6529 | |
| 6530 | adr = AREG((Opcode >> 0) & 7); |
| 6531 | DECODE_EXT_WORD |
| 6532 | PRE_IO |
| 6533 | READ_BYTE_F(adr, res) |
| 6534 | flag_C = 0; |
| 6535 | flag_V = 0; |
| 6536 | flag_NotZ = res; |
| 6537 | flag_N = res; |
| 6538 | DREGu8((Opcode >> 9) & 7) = res; |
| 6539 | POST_IO |
| 6540 | RET(14) |
| 6541 | } |
| 6542 | |
| 6543 | // MOVEB |
| 6544 | OPCODE(0x10B0) |
| 6545 | { |
| 6546 | u32 adr, res; |
| 6547 | u32 src, dst; |
| 6548 | |
| 6549 | adr = AREG((Opcode >> 0) & 7); |
| 6550 | DECODE_EXT_WORD |
| 6551 | PRE_IO |
| 6552 | READ_BYTE_F(adr, res) |
| 6553 | flag_C = 0; |
| 6554 | flag_V = 0; |
| 6555 | flag_NotZ = res; |
| 6556 | flag_N = res; |
| 6557 | adr = AREG((Opcode >> 9) & 7); |
| 6558 | WRITE_BYTE_F(adr, res) |
| 6559 | POST_IO |
| 6560 | RET(18) |
| 6561 | } |
| 6562 | |
| 6563 | // MOVEB |
| 6564 | OPCODE(0x10F0) |
| 6565 | { |
| 6566 | u32 adr, res; |
| 6567 | u32 src, dst; |
| 6568 | |
| 6569 | adr = AREG((Opcode >> 0) & 7); |
| 6570 | DECODE_EXT_WORD |
| 6571 | PRE_IO |
| 6572 | READ_BYTE_F(adr, res) |
| 6573 | flag_C = 0; |
| 6574 | flag_V = 0; |
| 6575 | flag_NotZ = res; |
| 6576 | flag_N = res; |
| 6577 | adr = AREG((Opcode >> 9) & 7); |
| 6578 | AREG((Opcode >> 9) & 7) += 1; |
| 6579 | WRITE_BYTE_F(adr, res) |
| 6580 | POST_IO |
| 6581 | RET(18) |
| 6582 | } |
| 6583 | |
| 6584 | // MOVEB |
| 6585 | OPCODE(0x1130) |
| 6586 | { |
| 6587 | u32 adr, res; |
| 6588 | u32 src, dst; |
| 6589 | |
| 6590 | adr = AREG((Opcode >> 0) & 7); |
| 6591 | DECODE_EXT_WORD |
| 6592 | PRE_IO |
| 6593 | READ_BYTE_F(adr, res) |
| 6594 | flag_C = 0; |
| 6595 | flag_V = 0; |
| 6596 | flag_NotZ = res; |
| 6597 | flag_N = res; |
| 6598 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 6599 | AREG((Opcode >> 9) & 7) = adr; |
| 6600 | WRITE_BYTE_F(adr, res) |
| 6601 | POST_IO |
| 6602 | RET(18) |
| 6603 | } |
| 6604 | |
| 6605 | // MOVEB |
| 6606 | OPCODE(0x1170) |
| 6607 | { |
| 6608 | u32 adr, res; |
| 6609 | u32 src, dst; |
| 6610 | |
| 6611 | adr = AREG((Opcode >> 0) & 7); |
| 6612 | DECODE_EXT_WORD |
| 6613 | PRE_IO |
| 6614 | READ_BYTE_F(adr, res) |
| 6615 | flag_C = 0; |
| 6616 | flag_V = 0; |
| 6617 | flag_NotZ = res; |
| 6618 | flag_N = res; |
| 6619 | FETCH_SWORD(adr); |
| 6620 | adr += AREG((Opcode >> 9) & 7); |
| 6621 | WRITE_BYTE_F(adr, res) |
| 6622 | POST_IO |
| 6623 | RET(22) |
| 6624 | } |
| 6625 | |
| 6626 | // MOVEB |
| 6627 | OPCODE(0x11B0) |
| 6628 | { |
| 6629 | u32 adr, res; |
| 6630 | u32 src, dst; |
| 6631 | |
| 6632 | adr = AREG((Opcode >> 0) & 7); |
| 6633 | DECODE_EXT_WORD |
| 6634 | PRE_IO |
| 6635 | READ_BYTE_F(adr, res) |
| 6636 | flag_C = 0; |
| 6637 | flag_V = 0; |
| 6638 | flag_NotZ = res; |
| 6639 | flag_N = res; |
| 6640 | adr = AREG((Opcode >> 9) & 7); |
| 6641 | DECODE_EXT_WORD |
| 6642 | WRITE_BYTE_F(adr, res) |
| 6643 | POST_IO |
| 6644 | RET(24) |
| 6645 | } |
| 6646 | |
| 6647 | // MOVEB |
| 6648 | OPCODE(0x11F0) |
| 6649 | { |
| 6650 | u32 adr, res; |
| 6651 | u32 src, dst; |
| 6652 | |
| 6653 | adr = AREG((Opcode >> 0) & 7); |
| 6654 | DECODE_EXT_WORD |
| 6655 | PRE_IO |
| 6656 | READ_BYTE_F(adr, res) |
| 6657 | flag_C = 0; |
| 6658 | flag_V = 0; |
| 6659 | flag_NotZ = res; |
| 6660 | flag_N = res; |
| 6661 | FETCH_SWORD(adr); |
| 6662 | WRITE_BYTE_F(adr, res) |
| 6663 | POST_IO |
| 6664 | RET(22) |
| 6665 | } |
| 6666 | |
| 6667 | // MOVEB |
| 6668 | OPCODE(0x13F0) |
| 6669 | { |
| 6670 | u32 adr, res; |
| 6671 | u32 src, dst; |
| 6672 | |
| 6673 | adr = AREG((Opcode >> 0) & 7); |
| 6674 | DECODE_EXT_WORD |
| 6675 | PRE_IO |
| 6676 | READ_BYTE_F(adr, res) |
| 6677 | flag_C = 0; |
| 6678 | flag_V = 0; |
| 6679 | flag_NotZ = res; |
| 6680 | flag_N = res; |
| 6681 | FETCH_LONG(adr); |
| 6682 | WRITE_BYTE_F(adr, res) |
| 6683 | POST_IO |
| 6684 | RET(26) |
| 6685 | } |
| 6686 | |
| 6687 | // MOVEB |
| 6688 | OPCODE(0x1EF0) |
| 6689 | { |
| 6690 | u32 adr, res; |
| 6691 | u32 src, dst; |
| 6692 | |
| 6693 | adr = AREG((Opcode >> 0) & 7); |
| 6694 | DECODE_EXT_WORD |
| 6695 | PRE_IO |
| 6696 | READ_BYTE_F(adr, res) |
| 6697 | flag_C = 0; |
| 6698 | flag_V = 0; |
| 6699 | flag_NotZ = res; |
| 6700 | flag_N = res; |
| 6701 | adr = AREG(7); |
| 6702 | AREG(7) += 2; |
| 6703 | WRITE_BYTE_F(adr, res) |
| 6704 | POST_IO |
| 6705 | RET(18) |
| 6706 | } |
| 6707 | |
| 6708 | // MOVEB |
| 6709 | OPCODE(0x1F30) |
| 6710 | { |
| 6711 | u32 adr, res; |
| 6712 | u32 src, dst; |
| 6713 | |
| 6714 | adr = AREG((Opcode >> 0) & 7); |
| 6715 | DECODE_EXT_WORD |
| 6716 | PRE_IO |
| 6717 | READ_BYTE_F(adr, res) |
| 6718 | flag_C = 0; |
| 6719 | flag_V = 0; |
| 6720 | flag_NotZ = res; |
| 6721 | flag_N = res; |
| 6722 | adr = AREG(7) - 2; |
| 6723 | AREG(7) = adr; |
| 6724 | WRITE_BYTE_F(adr, res) |
| 6725 | POST_IO |
| 6726 | RET(18) |
| 6727 | } |
| 6728 | |
| 6729 | // MOVEB |
| 6730 | OPCODE(0x1038) |
| 6731 | { |
| 6732 | u32 adr, res; |
| 6733 | u32 src, dst; |
| 6734 | |
| 6735 | FETCH_SWORD(adr); |
| 6736 | PRE_IO |
| 6737 | READ_BYTE_F(adr, res) |
| 6738 | flag_C = 0; |
| 6739 | flag_V = 0; |
| 6740 | flag_NotZ = res; |
| 6741 | flag_N = res; |
| 6742 | DREGu8((Opcode >> 9) & 7) = res; |
| 6743 | POST_IO |
| 6744 | RET(12) |
| 6745 | } |
| 6746 | |
| 6747 | // MOVEB |
| 6748 | OPCODE(0x10B8) |
| 6749 | { |
| 6750 | u32 adr, res; |
| 6751 | u32 src, dst; |
| 6752 | |
| 6753 | FETCH_SWORD(adr); |
| 6754 | PRE_IO |
| 6755 | READ_BYTE_F(adr, res) |
| 6756 | flag_C = 0; |
| 6757 | flag_V = 0; |
| 6758 | flag_NotZ = res; |
| 6759 | flag_N = res; |
| 6760 | adr = AREG((Opcode >> 9) & 7); |
| 6761 | WRITE_BYTE_F(adr, res) |
| 6762 | POST_IO |
| 6763 | RET(16) |
| 6764 | } |
| 6765 | |
| 6766 | // MOVEB |
| 6767 | OPCODE(0x10F8) |
| 6768 | { |
| 6769 | u32 adr, res; |
| 6770 | u32 src, dst; |
| 6771 | |
| 6772 | FETCH_SWORD(adr); |
| 6773 | PRE_IO |
| 6774 | READ_BYTE_F(adr, res) |
| 6775 | flag_C = 0; |
| 6776 | flag_V = 0; |
| 6777 | flag_NotZ = res; |
| 6778 | flag_N = res; |
| 6779 | adr = AREG((Opcode >> 9) & 7); |
| 6780 | AREG((Opcode >> 9) & 7) += 1; |
| 6781 | WRITE_BYTE_F(adr, res) |
| 6782 | POST_IO |
| 6783 | RET(16) |
| 6784 | } |
| 6785 | |
| 6786 | // MOVEB |
| 6787 | OPCODE(0x1138) |
| 6788 | { |
| 6789 | u32 adr, res; |
| 6790 | u32 src, dst; |
| 6791 | |
| 6792 | FETCH_SWORD(adr); |
| 6793 | PRE_IO |
| 6794 | READ_BYTE_F(adr, res) |
| 6795 | flag_C = 0; |
| 6796 | flag_V = 0; |
| 6797 | flag_NotZ = res; |
| 6798 | flag_N = res; |
| 6799 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 6800 | AREG((Opcode >> 9) & 7) = adr; |
| 6801 | WRITE_BYTE_F(adr, res) |
| 6802 | POST_IO |
| 6803 | RET(16) |
| 6804 | } |
| 6805 | |
| 6806 | // MOVEB |
| 6807 | OPCODE(0x1178) |
| 6808 | { |
| 6809 | u32 adr, res; |
| 6810 | u32 src, dst; |
| 6811 | |
| 6812 | FETCH_SWORD(adr); |
| 6813 | PRE_IO |
| 6814 | READ_BYTE_F(adr, res) |
| 6815 | flag_C = 0; |
| 6816 | flag_V = 0; |
| 6817 | flag_NotZ = res; |
| 6818 | flag_N = res; |
| 6819 | FETCH_SWORD(adr); |
| 6820 | adr += AREG((Opcode >> 9) & 7); |
| 6821 | WRITE_BYTE_F(adr, res) |
| 6822 | POST_IO |
| 6823 | RET(20) |
| 6824 | } |
| 6825 | |
| 6826 | // MOVEB |
| 6827 | OPCODE(0x11B8) |
| 6828 | { |
| 6829 | u32 adr, res; |
| 6830 | u32 src, dst; |
| 6831 | |
| 6832 | FETCH_SWORD(adr); |
| 6833 | PRE_IO |
| 6834 | READ_BYTE_F(adr, res) |
| 6835 | flag_C = 0; |
| 6836 | flag_V = 0; |
| 6837 | flag_NotZ = res; |
| 6838 | flag_N = res; |
| 6839 | adr = AREG((Opcode >> 9) & 7); |
| 6840 | DECODE_EXT_WORD |
| 6841 | WRITE_BYTE_F(adr, res) |
| 6842 | POST_IO |
| 6843 | RET(22) |
| 6844 | } |
| 6845 | |
| 6846 | // MOVEB |
| 6847 | OPCODE(0x11F8) |
| 6848 | { |
| 6849 | u32 adr, res; |
| 6850 | u32 src, dst; |
| 6851 | |
| 6852 | FETCH_SWORD(adr); |
| 6853 | PRE_IO |
| 6854 | READ_BYTE_F(adr, res) |
| 6855 | flag_C = 0; |
| 6856 | flag_V = 0; |
| 6857 | flag_NotZ = res; |
| 6858 | flag_N = res; |
| 6859 | FETCH_SWORD(adr); |
| 6860 | WRITE_BYTE_F(adr, res) |
| 6861 | POST_IO |
| 6862 | RET(20) |
| 6863 | } |
| 6864 | |
| 6865 | // MOVEB |
| 6866 | OPCODE(0x13F8) |
| 6867 | { |
| 6868 | u32 adr, res; |
| 6869 | u32 src, dst; |
| 6870 | |
| 6871 | FETCH_SWORD(adr); |
| 6872 | PRE_IO |
| 6873 | READ_BYTE_F(adr, res) |
| 6874 | flag_C = 0; |
| 6875 | flag_V = 0; |
| 6876 | flag_NotZ = res; |
| 6877 | flag_N = res; |
| 6878 | FETCH_LONG(adr); |
| 6879 | WRITE_BYTE_F(adr, res) |
| 6880 | POST_IO |
| 6881 | RET(24) |
| 6882 | } |
| 6883 | |
| 6884 | // MOVEB |
| 6885 | OPCODE(0x1EF8) |
| 6886 | { |
| 6887 | u32 adr, res; |
| 6888 | u32 src, dst; |
| 6889 | |
| 6890 | FETCH_SWORD(adr); |
| 6891 | PRE_IO |
| 6892 | READ_BYTE_F(adr, res) |
| 6893 | flag_C = 0; |
| 6894 | flag_V = 0; |
| 6895 | flag_NotZ = res; |
| 6896 | flag_N = res; |
| 6897 | adr = AREG(7); |
| 6898 | AREG(7) += 2; |
| 6899 | WRITE_BYTE_F(adr, res) |
| 6900 | POST_IO |
| 6901 | RET(16) |
| 6902 | } |
| 6903 | |
| 6904 | // MOVEB |
| 6905 | OPCODE(0x1F38) |
| 6906 | { |
| 6907 | u32 adr, res; |
| 6908 | u32 src, dst; |
| 6909 | |
| 6910 | FETCH_SWORD(adr); |
| 6911 | PRE_IO |
| 6912 | READ_BYTE_F(adr, res) |
| 6913 | flag_C = 0; |
| 6914 | flag_V = 0; |
| 6915 | flag_NotZ = res; |
| 6916 | flag_N = res; |
| 6917 | adr = AREG(7) - 2; |
| 6918 | AREG(7) = adr; |
| 6919 | WRITE_BYTE_F(adr, res) |
| 6920 | POST_IO |
| 6921 | RET(16) |
| 6922 | } |
| 6923 | |
| 6924 | // MOVEB |
| 6925 | OPCODE(0x1039) |
| 6926 | { |
| 6927 | u32 adr, res; |
| 6928 | u32 src, dst; |
| 6929 | |
| 6930 | FETCH_LONG(adr); |
| 6931 | PRE_IO |
| 6932 | READ_BYTE_F(adr, res) |
| 6933 | flag_C = 0; |
| 6934 | flag_V = 0; |
| 6935 | flag_NotZ = res; |
| 6936 | flag_N = res; |
| 6937 | DREGu8((Opcode >> 9) & 7) = res; |
| 6938 | POST_IO |
| 6939 | RET(16) |
| 6940 | } |
| 6941 | |
| 6942 | // MOVEB |
| 6943 | OPCODE(0x10B9) |
| 6944 | { |
| 6945 | u32 adr, res; |
| 6946 | u32 src, dst; |
| 6947 | |
| 6948 | FETCH_LONG(adr); |
| 6949 | PRE_IO |
| 6950 | READ_BYTE_F(adr, res) |
| 6951 | flag_C = 0; |
| 6952 | flag_V = 0; |
| 6953 | flag_NotZ = res; |
| 6954 | flag_N = res; |
| 6955 | adr = AREG((Opcode >> 9) & 7); |
| 6956 | WRITE_BYTE_F(adr, res) |
| 6957 | POST_IO |
| 6958 | RET(20) |
| 6959 | } |
| 6960 | |
| 6961 | // MOVEB |
| 6962 | OPCODE(0x10F9) |
| 6963 | { |
| 6964 | u32 adr, res; |
| 6965 | u32 src, dst; |
| 6966 | |
| 6967 | FETCH_LONG(adr); |
| 6968 | PRE_IO |
| 6969 | READ_BYTE_F(adr, res) |
| 6970 | flag_C = 0; |
| 6971 | flag_V = 0; |
| 6972 | flag_NotZ = res; |
| 6973 | flag_N = res; |
| 6974 | adr = AREG((Opcode >> 9) & 7); |
| 6975 | AREG((Opcode >> 9) & 7) += 1; |
| 6976 | WRITE_BYTE_F(adr, res) |
| 6977 | POST_IO |
| 6978 | RET(20) |
| 6979 | } |
| 6980 | |
| 6981 | // MOVEB |
| 6982 | OPCODE(0x1139) |
| 6983 | { |
| 6984 | u32 adr, res; |
| 6985 | u32 src, dst; |
| 6986 | |
| 6987 | FETCH_LONG(adr); |
| 6988 | PRE_IO |
| 6989 | READ_BYTE_F(adr, res) |
| 6990 | flag_C = 0; |
| 6991 | flag_V = 0; |
| 6992 | flag_NotZ = res; |
| 6993 | flag_N = res; |
| 6994 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 6995 | AREG((Opcode >> 9) & 7) = adr; |
| 6996 | WRITE_BYTE_F(adr, res) |
| 6997 | POST_IO |
| 6998 | RET(20) |
| 6999 | } |
| 7000 | |
| 7001 | // MOVEB |
| 7002 | OPCODE(0x1179) |
| 7003 | { |
| 7004 | u32 adr, res; |
| 7005 | u32 src, dst; |
| 7006 | |
| 7007 | FETCH_LONG(adr); |
| 7008 | PRE_IO |
| 7009 | READ_BYTE_F(adr, res) |
| 7010 | flag_C = 0; |
| 7011 | flag_V = 0; |
| 7012 | flag_NotZ = res; |
| 7013 | flag_N = res; |
| 7014 | FETCH_SWORD(adr); |
| 7015 | adr += AREG((Opcode >> 9) & 7); |
| 7016 | WRITE_BYTE_F(adr, res) |
| 7017 | POST_IO |
| 7018 | RET(24) |
| 7019 | } |
| 7020 | |
| 7021 | // MOVEB |
| 7022 | OPCODE(0x11B9) |
| 7023 | { |
| 7024 | u32 adr, res; |
| 7025 | u32 src, dst; |
| 7026 | |
| 7027 | FETCH_LONG(adr); |
| 7028 | PRE_IO |
| 7029 | READ_BYTE_F(adr, res) |
| 7030 | flag_C = 0; |
| 7031 | flag_V = 0; |
| 7032 | flag_NotZ = res; |
| 7033 | flag_N = res; |
| 7034 | adr = AREG((Opcode >> 9) & 7); |
| 7035 | DECODE_EXT_WORD |
| 7036 | WRITE_BYTE_F(adr, res) |
| 7037 | POST_IO |
| 7038 | RET(26) |
| 7039 | } |
| 7040 | |
| 7041 | // MOVEB |
| 7042 | OPCODE(0x11F9) |
| 7043 | { |
| 7044 | u32 adr, res; |
| 7045 | u32 src, dst; |
| 7046 | |
| 7047 | FETCH_LONG(adr); |
| 7048 | PRE_IO |
| 7049 | READ_BYTE_F(adr, res) |
| 7050 | flag_C = 0; |
| 7051 | flag_V = 0; |
| 7052 | flag_NotZ = res; |
| 7053 | flag_N = res; |
| 7054 | FETCH_SWORD(adr); |
| 7055 | WRITE_BYTE_F(adr, res) |
| 7056 | POST_IO |
| 7057 | RET(24) |
| 7058 | } |
| 7059 | |
| 7060 | // MOVEB |
| 7061 | OPCODE(0x13F9) |
| 7062 | { |
| 7063 | u32 adr, res; |
| 7064 | u32 src, dst; |
| 7065 | |
| 7066 | FETCH_LONG(adr); |
| 7067 | PRE_IO |
| 7068 | READ_BYTE_F(adr, res) |
| 7069 | flag_C = 0; |
| 7070 | flag_V = 0; |
| 7071 | flag_NotZ = res; |
| 7072 | flag_N = res; |
| 7073 | FETCH_LONG(adr); |
| 7074 | WRITE_BYTE_F(adr, res) |
| 7075 | POST_IO |
| 7076 | RET(28) |
| 7077 | } |
| 7078 | |
| 7079 | // MOVEB |
| 7080 | OPCODE(0x1EF9) |
| 7081 | { |
| 7082 | u32 adr, res; |
| 7083 | u32 src, dst; |
| 7084 | |
| 7085 | FETCH_LONG(adr); |
| 7086 | PRE_IO |
| 7087 | READ_BYTE_F(adr, res) |
| 7088 | flag_C = 0; |
| 7089 | flag_V = 0; |
| 7090 | flag_NotZ = res; |
| 7091 | flag_N = res; |
| 7092 | adr = AREG(7); |
| 7093 | AREG(7) += 2; |
| 7094 | WRITE_BYTE_F(adr, res) |
| 7095 | POST_IO |
| 7096 | RET(20) |
| 7097 | } |
| 7098 | |
| 7099 | // MOVEB |
| 7100 | OPCODE(0x1F39) |
| 7101 | { |
| 7102 | u32 adr, res; |
| 7103 | u32 src, dst; |
| 7104 | |
| 7105 | FETCH_LONG(adr); |
| 7106 | PRE_IO |
| 7107 | READ_BYTE_F(adr, res) |
| 7108 | flag_C = 0; |
| 7109 | flag_V = 0; |
| 7110 | flag_NotZ = res; |
| 7111 | flag_N = res; |
| 7112 | adr = AREG(7) - 2; |
| 7113 | AREG(7) = adr; |
| 7114 | WRITE_BYTE_F(adr, res) |
| 7115 | POST_IO |
| 7116 | RET(20) |
| 7117 | } |
| 7118 | |
| 7119 | // MOVEB |
| 7120 | OPCODE(0x103A) |
| 7121 | { |
| 7122 | u32 adr, res; |
| 7123 | u32 src, dst; |
| 7124 | |
| 7125 | adr = GET_SWORD + GET_PC; |
| 7126 | PC++; |
| 7127 | PRE_IO |
| 7128 | READ_BYTE_F(adr, res) |
| 7129 | flag_C = 0; |
| 7130 | flag_V = 0; |
| 7131 | flag_NotZ = res; |
| 7132 | flag_N = res; |
| 7133 | DREGu8((Opcode >> 9) & 7) = res; |
| 7134 | POST_IO |
| 7135 | RET(12) |
| 7136 | } |
| 7137 | |
| 7138 | // MOVEB |
| 7139 | OPCODE(0x10BA) |
| 7140 | { |
| 7141 | u32 adr, res; |
| 7142 | u32 src, dst; |
| 7143 | |
| 7144 | adr = GET_SWORD + GET_PC; |
| 7145 | PC++; |
| 7146 | PRE_IO |
| 7147 | READ_BYTE_F(adr, res) |
| 7148 | flag_C = 0; |
| 7149 | flag_V = 0; |
| 7150 | flag_NotZ = res; |
| 7151 | flag_N = res; |
| 7152 | adr = AREG((Opcode >> 9) & 7); |
| 7153 | WRITE_BYTE_F(adr, res) |
| 7154 | POST_IO |
| 7155 | RET(16) |
| 7156 | } |
| 7157 | |
| 7158 | // MOVEB |
| 7159 | OPCODE(0x10FA) |
| 7160 | { |
| 7161 | u32 adr, res; |
| 7162 | u32 src, dst; |
| 7163 | |
| 7164 | adr = GET_SWORD + GET_PC; |
| 7165 | PC++; |
| 7166 | PRE_IO |
| 7167 | READ_BYTE_F(adr, res) |
| 7168 | flag_C = 0; |
| 7169 | flag_V = 0; |
| 7170 | flag_NotZ = res; |
| 7171 | flag_N = res; |
| 7172 | adr = AREG((Opcode >> 9) & 7); |
| 7173 | AREG((Opcode >> 9) & 7) += 1; |
| 7174 | WRITE_BYTE_F(adr, res) |
| 7175 | POST_IO |
| 7176 | RET(16) |
| 7177 | } |
| 7178 | |
| 7179 | // MOVEB |
| 7180 | OPCODE(0x113A) |
| 7181 | { |
| 7182 | u32 adr, res; |
| 7183 | u32 src, dst; |
| 7184 | |
| 7185 | adr = GET_SWORD + GET_PC; |
| 7186 | PC++; |
| 7187 | PRE_IO |
| 7188 | READ_BYTE_F(adr, res) |
| 7189 | flag_C = 0; |
| 7190 | flag_V = 0; |
| 7191 | flag_NotZ = res; |
| 7192 | flag_N = res; |
| 7193 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 7194 | AREG((Opcode >> 9) & 7) = adr; |
| 7195 | WRITE_BYTE_F(adr, res) |
| 7196 | POST_IO |
| 7197 | RET(16) |
| 7198 | } |
| 7199 | |
| 7200 | // MOVEB |
| 7201 | OPCODE(0x117A) |
| 7202 | { |
| 7203 | u32 adr, res; |
| 7204 | u32 src, dst; |
| 7205 | |
| 7206 | adr = GET_SWORD + GET_PC; |
| 7207 | PC++; |
| 7208 | PRE_IO |
| 7209 | READ_BYTE_F(adr, res) |
| 7210 | flag_C = 0; |
| 7211 | flag_V = 0; |
| 7212 | flag_NotZ = res; |
| 7213 | flag_N = res; |
| 7214 | FETCH_SWORD(adr); |
| 7215 | adr += AREG((Opcode >> 9) & 7); |
| 7216 | WRITE_BYTE_F(adr, res) |
| 7217 | POST_IO |
| 7218 | RET(20) |
| 7219 | } |
| 7220 | |
| 7221 | // MOVEB |
| 7222 | OPCODE(0x11BA) |
| 7223 | { |
| 7224 | u32 adr, res; |
| 7225 | u32 src, dst; |
| 7226 | |
| 7227 | adr = GET_SWORD + GET_PC; |
| 7228 | PC++; |
| 7229 | PRE_IO |
| 7230 | READ_BYTE_F(adr, res) |
| 7231 | flag_C = 0; |
| 7232 | flag_V = 0; |
| 7233 | flag_NotZ = res; |
| 7234 | flag_N = res; |
| 7235 | adr = AREG((Opcode >> 9) & 7); |
| 7236 | DECODE_EXT_WORD |
| 7237 | WRITE_BYTE_F(adr, res) |
| 7238 | POST_IO |
| 7239 | RET(22) |
| 7240 | } |
| 7241 | |
| 7242 | // MOVEB |
| 7243 | OPCODE(0x11FA) |
| 7244 | { |
| 7245 | u32 adr, res; |
| 7246 | u32 src, dst; |
| 7247 | |
| 7248 | adr = GET_SWORD + GET_PC; |
| 7249 | PC++; |
| 7250 | PRE_IO |
| 7251 | READ_BYTE_F(adr, res) |
| 7252 | flag_C = 0; |
| 7253 | flag_V = 0; |
| 7254 | flag_NotZ = res; |
| 7255 | flag_N = res; |
| 7256 | FETCH_SWORD(adr); |
| 7257 | WRITE_BYTE_F(adr, res) |
| 7258 | POST_IO |
| 7259 | RET(20) |
| 7260 | } |
| 7261 | |
| 7262 | // MOVEB |
| 7263 | OPCODE(0x13FA) |
| 7264 | { |
| 7265 | u32 adr, res; |
| 7266 | u32 src, dst; |
| 7267 | |
| 7268 | adr = GET_SWORD + GET_PC; |
| 7269 | PC++; |
| 7270 | PRE_IO |
| 7271 | READ_BYTE_F(adr, res) |
| 7272 | flag_C = 0; |
| 7273 | flag_V = 0; |
| 7274 | flag_NotZ = res; |
| 7275 | flag_N = res; |
| 7276 | FETCH_LONG(adr); |
| 7277 | WRITE_BYTE_F(adr, res) |
| 7278 | POST_IO |
| 7279 | RET(24) |
| 7280 | } |
| 7281 | |
| 7282 | // MOVEB |
| 7283 | OPCODE(0x1EFA) |
| 7284 | { |
| 7285 | u32 adr, res; |
| 7286 | u32 src, dst; |
| 7287 | |
| 7288 | adr = GET_SWORD + GET_PC; |
| 7289 | PC++; |
| 7290 | PRE_IO |
| 7291 | READ_BYTE_F(adr, res) |
| 7292 | flag_C = 0; |
| 7293 | flag_V = 0; |
| 7294 | flag_NotZ = res; |
| 7295 | flag_N = res; |
| 7296 | adr = AREG(7); |
| 7297 | AREG(7) += 2; |
| 7298 | WRITE_BYTE_F(adr, res) |
| 7299 | POST_IO |
| 7300 | RET(16) |
| 7301 | } |
| 7302 | |
| 7303 | // MOVEB |
| 7304 | OPCODE(0x1F3A) |
| 7305 | { |
| 7306 | u32 adr, res; |
| 7307 | u32 src, dst; |
| 7308 | |
| 7309 | adr = GET_SWORD + GET_PC; |
| 7310 | PC++; |
| 7311 | PRE_IO |
| 7312 | READ_BYTE_F(adr, res) |
| 7313 | flag_C = 0; |
| 7314 | flag_V = 0; |
| 7315 | flag_NotZ = res; |
| 7316 | flag_N = res; |
| 7317 | adr = AREG(7) - 2; |
| 7318 | AREG(7) = adr; |
| 7319 | WRITE_BYTE_F(adr, res) |
| 7320 | POST_IO |
| 7321 | RET(16) |
| 7322 | } |
| 7323 | |
| 7324 | // MOVEB |
| 7325 | OPCODE(0x103B) |
| 7326 | { |
| 7327 | u32 adr, res; |
| 7328 | u32 src, dst; |
| 7329 | |
| 7330 | adr = (uptr)(PC) - BasePC; |
| 7331 | DECODE_EXT_WORD |
| 7332 | PRE_IO |
| 7333 | READ_BYTE_F(adr, res) |
| 7334 | flag_C = 0; |
| 7335 | flag_V = 0; |
| 7336 | flag_NotZ = res; |
| 7337 | flag_N = res; |
| 7338 | DREGu8((Opcode >> 9) & 7) = res; |
| 7339 | POST_IO |
| 7340 | RET(14) |
| 7341 | } |
| 7342 | |
| 7343 | // MOVEB |
| 7344 | OPCODE(0x10BB) |
| 7345 | { |
| 7346 | u32 adr, res; |
| 7347 | u32 src, dst; |
| 7348 | |
| 7349 | adr = (uptr)(PC) - BasePC; |
| 7350 | DECODE_EXT_WORD |
| 7351 | PRE_IO |
| 7352 | READ_BYTE_F(adr, res) |
| 7353 | flag_C = 0; |
| 7354 | flag_V = 0; |
| 7355 | flag_NotZ = res; |
| 7356 | flag_N = res; |
| 7357 | adr = AREG((Opcode >> 9) & 7); |
| 7358 | WRITE_BYTE_F(adr, res) |
| 7359 | POST_IO |
| 7360 | RET(18) |
| 7361 | } |
| 7362 | |
| 7363 | // MOVEB |
| 7364 | OPCODE(0x10FB) |
| 7365 | { |
| 7366 | u32 adr, res; |
| 7367 | u32 src, dst; |
| 7368 | |
| 7369 | adr = (uptr)(PC) - BasePC; |
| 7370 | DECODE_EXT_WORD |
| 7371 | PRE_IO |
| 7372 | READ_BYTE_F(adr, res) |
| 7373 | flag_C = 0; |
| 7374 | flag_V = 0; |
| 7375 | flag_NotZ = res; |
| 7376 | flag_N = res; |
| 7377 | adr = AREG((Opcode >> 9) & 7); |
| 7378 | AREG((Opcode >> 9) & 7) += 1; |
| 7379 | WRITE_BYTE_F(adr, res) |
| 7380 | POST_IO |
| 7381 | RET(18) |
| 7382 | } |
| 7383 | |
| 7384 | // MOVEB |
| 7385 | OPCODE(0x113B) |
| 7386 | { |
| 7387 | u32 adr, res; |
| 7388 | u32 src, dst; |
| 7389 | |
| 7390 | adr = (uptr)(PC) - BasePC; |
| 7391 | DECODE_EXT_WORD |
| 7392 | PRE_IO |
| 7393 | READ_BYTE_F(adr, res) |
| 7394 | flag_C = 0; |
| 7395 | flag_V = 0; |
| 7396 | flag_NotZ = res; |
| 7397 | flag_N = res; |
| 7398 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 7399 | AREG((Opcode >> 9) & 7) = adr; |
| 7400 | WRITE_BYTE_F(adr, res) |
| 7401 | POST_IO |
| 7402 | RET(18) |
| 7403 | } |
| 7404 | |
| 7405 | // MOVEB |
| 7406 | OPCODE(0x117B) |
| 7407 | { |
| 7408 | u32 adr, res; |
| 7409 | u32 src, dst; |
| 7410 | |
| 7411 | adr = (uptr)(PC) - BasePC; |
| 7412 | DECODE_EXT_WORD |
| 7413 | PRE_IO |
| 7414 | READ_BYTE_F(adr, res) |
| 7415 | flag_C = 0; |
| 7416 | flag_V = 0; |
| 7417 | flag_NotZ = res; |
| 7418 | flag_N = res; |
| 7419 | FETCH_SWORD(adr); |
| 7420 | adr += AREG((Opcode >> 9) & 7); |
| 7421 | WRITE_BYTE_F(adr, res) |
| 7422 | POST_IO |
| 7423 | RET(22) |
| 7424 | } |
| 7425 | |
| 7426 | // MOVEB |
| 7427 | OPCODE(0x11BB) |
| 7428 | { |
| 7429 | u32 adr, res; |
| 7430 | u32 src, dst; |
| 7431 | |
| 7432 | adr = (uptr)(PC) - BasePC; |
| 7433 | DECODE_EXT_WORD |
| 7434 | PRE_IO |
| 7435 | READ_BYTE_F(adr, res) |
| 7436 | flag_C = 0; |
| 7437 | flag_V = 0; |
| 7438 | flag_NotZ = res; |
| 7439 | flag_N = res; |
| 7440 | adr = AREG((Opcode >> 9) & 7); |
| 7441 | DECODE_EXT_WORD |
| 7442 | WRITE_BYTE_F(adr, res) |
| 7443 | POST_IO |
| 7444 | RET(24) |
| 7445 | } |
| 7446 | |
| 7447 | // MOVEB |
| 7448 | OPCODE(0x11FB) |
| 7449 | { |
| 7450 | u32 adr, res; |
| 7451 | u32 src, dst; |
| 7452 | |
| 7453 | adr = (uptr)(PC) - BasePC; |
| 7454 | DECODE_EXT_WORD |
| 7455 | PRE_IO |
| 7456 | READ_BYTE_F(adr, res) |
| 7457 | flag_C = 0; |
| 7458 | flag_V = 0; |
| 7459 | flag_NotZ = res; |
| 7460 | flag_N = res; |
| 7461 | FETCH_SWORD(adr); |
| 7462 | WRITE_BYTE_F(adr, res) |
| 7463 | POST_IO |
| 7464 | RET(22) |
| 7465 | } |
| 7466 | |
| 7467 | // MOVEB |
| 7468 | OPCODE(0x13FB) |
| 7469 | { |
| 7470 | u32 adr, res; |
| 7471 | u32 src, dst; |
| 7472 | |
| 7473 | adr = (uptr)(PC) - BasePC; |
| 7474 | DECODE_EXT_WORD |
| 7475 | PRE_IO |
| 7476 | READ_BYTE_F(adr, res) |
| 7477 | flag_C = 0; |
| 7478 | flag_V = 0; |
| 7479 | flag_NotZ = res; |
| 7480 | flag_N = res; |
| 7481 | FETCH_LONG(adr); |
| 7482 | WRITE_BYTE_F(adr, res) |
| 7483 | POST_IO |
| 7484 | RET(26) |
| 7485 | } |
| 7486 | |
| 7487 | // MOVEB |
| 7488 | OPCODE(0x1EFB) |
| 7489 | { |
| 7490 | u32 adr, res; |
| 7491 | u32 src, dst; |
| 7492 | |
| 7493 | adr = (uptr)(PC) - BasePC; |
| 7494 | DECODE_EXT_WORD |
| 7495 | PRE_IO |
| 7496 | READ_BYTE_F(adr, res) |
| 7497 | flag_C = 0; |
| 7498 | flag_V = 0; |
| 7499 | flag_NotZ = res; |
| 7500 | flag_N = res; |
| 7501 | adr = AREG(7); |
| 7502 | AREG(7) += 2; |
| 7503 | WRITE_BYTE_F(adr, res) |
| 7504 | POST_IO |
| 7505 | RET(18) |
| 7506 | } |
| 7507 | |
| 7508 | // MOVEB |
| 7509 | OPCODE(0x1F3B) |
| 7510 | { |
| 7511 | u32 adr, res; |
| 7512 | u32 src, dst; |
| 7513 | |
| 7514 | adr = (uptr)(PC) - BasePC; |
| 7515 | DECODE_EXT_WORD |
| 7516 | PRE_IO |
| 7517 | READ_BYTE_F(adr, res) |
| 7518 | flag_C = 0; |
| 7519 | flag_V = 0; |
| 7520 | flag_NotZ = res; |
| 7521 | flag_N = res; |
| 7522 | adr = AREG(7) - 2; |
| 7523 | AREG(7) = adr; |
| 7524 | WRITE_BYTE_F(adr, res) |
| 7525 | POST_IO |
| 7526 | RET(18) |
| 7527 | } |
| 7528 | |
| 7529 | // MOVEB |
| 7530 | OPCODE(0x103C) |
| 7531 | { |
| 7532 | u32 adr, res; |
| 7533 | u32 src, dst; |
| 7534 | |
| 7535 | FETCH_BYTE(res); |
| 7536 | flag_C = 0; |
| 7537 | flag_V = 0; |
| 7538 | flag_NotZ = res; |
| 7539 | flag_N = res; |
| 7540 | DREGu8((Opcode >> 9) & 7) = res; |
| 7541 | RET(8) |
| 7542 | } |
| 7543 | |
| 7544 | // MOVEB |
| 7545 | OPCODE(0x10BC) |
| 7546 | { |
| 7547 | u32 adr, res; |
| 7548 | u32 src, dst; |
| 7549 | |
| 7550 | FETCH_BYTE(res); |
| 7551 | flag_C = 0; |
| 7552 | flag_V = 0; |
| 7553 | flag_NotZ = res; |
| 7554 | flag_N = res; |
| 7555 | adr = AREG((Opcode >> 9) & 7); |
| 7556 | PRE_IO |
| 7557 | WRITE_BYTE_F(adr, res) |
| 7558 | POST_IO |
| 7559 | RET(12) |
| 7560 | } |
| 7561 | |
| 7562 | // MOVEB |
| 7563 | OPCODE(0x10FC) |
| 7564 | { |
| 7565 | u32 adr, res; |
| 7566 | u32 src, dst; |
| 7567 | |
| 7568 | FETCH_BYTE(res); |
| 7569 | flag_C = 0; |
| 7570 | flag_V = 0; |
| 7571 | flag_NotZ = res; |
| 7572 | flag_N = res; |
| 7573 | adr = AREG((Opcode >> 9) & 7); |
| 7574 | AREG((Opcode >> 9) & 7) += 1; |
| 7575 | PRE_IO |
| 7576 | WRITE_BYTE_F(adr, res) |
| 7577 | POST_IO |
| 7578 | RET(12) |
| 7579 | } |
| 7580 | |
| 7581 | // MOVEB |
| 7582 | OPCODE(0x113C) |
| 7583 | { |
| 7584 | u32 adr, res; |
| 7585 | u32 src, dst; |
| 7586 | |
| 7587 | FETCH_BYTE(res); |
| 7588 | flag_C = 0; |
| 7589 | flag_V = 0; |
| 7590 | flag_NotZ = res; |
| 7591 | flag_N = res; |
| 7592 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 7593 | AREG((Opcode >> 9) & 7) = adr; |
| 7594 | PRE_IO |
| 7595 | WRITE_BYTE_F(adr, res) |
| 7596 | POST_IO |
| 7597 | RET(12) |
| 7598 | } |
| 7599 | |
| 7600 | // MOVEB |
| 7601 | OPCODE(0x117C) |
| 7602 | { |
| 7603 | u32 adr, res; |
| 7604 | u32 src, dst; |
| 7605 | |
| 7606 | FETCH_BYTE(res); |
| 7607 | flag_C = 0; |
| 7608 | flag_V = 0; |
| 7609 | flag_NotZ = res; |
| 7610 | flag_N = res; |
| 7611 | FETCH_SWORD(adr); |
| 7612 | adr += AREG((Opcode >> 9) & 7); |
| 7613 | PRE_IO |
| 7614 | WRITE_BYTE_F(adr, res) |
| 7615 | POST_IO |
| 7616 | RET(16) |
| 7617 | } |
| 7618 | |
| 7619 | // MOVEB |
| 7620 | OPCODE(0x11BC) |
| 7621 | { |
| 7622 | u32 adr, res; |
| 7623 | u32 src, dst; |
| 7624 | |
| 7625 | FETCH_BYTE(res); |
| 7626 | flag_C = 0; |
| 7627 | flag_V = 0; |
| 7628 | flag_NotZ = res; |
| 7629 | flag_N = res; |
| 7630 | adr = AREG((Opcode >> 9) & 7); |
| 7631 | DECODE_EXT_WORD |
| 7632 | PRE_IO |
| 7633 | WRITE_BYTE_F(adr, res) |
| 7634 | POST_IO |
| 7635 | RET(18) |
| 7636 | } |
| 7637 | |
| 7638 | // MOVEB |
| 7639 | OPCODE(0x11FC) |
| 7640 | { |
| 7641 | u32 adr, res; |
| 7642 | u32 src, dst; |
| 7643 | |
| 7644 | FETCH_BYTE(res); |
| 7645 | flag_C = 0; |
| 7646 | flag_V = 0; |
| 7647 | flag_NotZ = res; |
| 7648 | flag_N = res; |
| 7649 | FETCH_SWORD(adr); |
| 7650 | PRE_IO |
| 7651 | WRITE_BYTE_F(adr, res) |
| 7652 | POST_IO |
| 7653 | RET(16) |
| 7654 | } |
| 7655 | |
| 7656 | // MOVEB |
| 7657 | OPCODE(0x13FC) |
| 7658 | { |
| 7659 | u32 adr, res; |
| 7660 | u32 src, dst; |
| 7661 | |
| 7662 | FETCH_BYTE(res); |
| 7663 | flag_C = 0; |
| 7664 | flag_V = 0; |
| 7665 | flag_NotZ = res; |
| 7666 | flag_N = res; |
| 7667 | FETCH_LONG(adr); |
| 7668 | PRE_IO |
| 7669 | WRITE_BYTE_F(adr, res) |
| 7670 | POST_IO |
| 7671 | RET(20) |
| 7672 | } |
| 7673 | |
| 7674 | // MOVEB |
| 7675 | OPCODE(0x1EFC) |
| 7676 | { |
| 7677 | u32 adr, res; |
| 7678 | u32 src, dst; |
| 7679 | |
| 7680 | FETCH_BYTE(res); |
| 7681 | flag_C = 0; |
| 7682 | flag_V = 0; |
| 7683 | flag_NotZ = res; |
| 7684 | flag_N = res; |
| 7685 | adr = AREG(7); |
| 7686 | AREG(7) += 2; |
| 7687 | PRE_IO |
| 7688 | WRITE_BYTE_F(adr, res) |
| 7689 | POST_IO |
| 7690 | RET(12) |
| 7691 | } |
| 7692 | |
| 7693 | // MOVEB |
| 7694 | OPCODE(0x1F3C) |
| 7695 | { |
| 7696 | u32 adr, res; |
| 7697 | u32 src, dst; |
| 7698 | |
| 7699 | FETCH_BYTE(res); |
| 7700 | flag_C = 0; |
| 7701 | flag_V = 0; |
| 7702 | flag_NotZ = res; |
| 7703 | flag_N = res; |
| 7704 | adr = AREG(7) - 2; |
| 7705 | AREG(7) = adr; |
| 7706 | PRE_IO |
| 7707 | WRITE_BYTE_F(adr, res) |
| 7708 | POST_IO |
| 7709 | RET(12) |
| 7710 | } |
| 7711 | |
| 7712 | // MOVEB |
| 7713 | OPCODE(0x101F) |
| 7714 | { |
| 7715 | u32 adr, res; |
| 7716 | u32 src, dst; |
| 7717 | |
| 7718 | adr = AREG(7); |
| 7719 | AREG(7) += 2; |
| 7720 | PRE_IO |
| 7721 | READ_BYTE_F(adr, res) |
| 7722 | flag_C = 0; |
| 7723 | flag_V = 0; |
| 7724 | flag_NotZ = res; |
| 7725 | flag_N = res; |
| 7726 | DREGu8((Opcode >> 9) & 7) = res; |
| 7727 | POST_IO |
| 7728 | RET(8) |
| 7729 | } |
| 7730 | |
| 7731 | // MOVEB |
| 7732 | OPCODE(0x109F) |
| 7733 | { |
| 7734 | u32 adr, res; |
| 7735 | u32 src, dst; |
| 7736 | |
| 7737 | adr = AREG(7); |
| 7738 | AREG(7) += 2; |
| 7739 | PRE_IO |
| 7740 | READ_BYTE_F(adr, res) |
| 7741 | flag_C = 0; |
| 7742 | flag_V = 0; |
| 7743 | flag_NotZ = res; |
| 7744 | flag_N = res; |
| 7745 | adr = AREG((Opcode >> 9) & 7); |
| 7746 | WRITE_BYTE_F(adr, res) |
| 7747 | POST_IO |
| 7748 | RET(12) |
| 7749 | } |
| 7750 | |
| 7751 | // MOVEB |
| 7752 | OPCODE(0x10DF) |
| 7753 | { |
| 7754 | u32 adr, res; |
| 7755 | u32 src, dst; |
| 7756 | |
| 7757 | adr = AREG(7); |
| 7758 | AREG(7) += 2; |
| 7759 | PRE_IO |
| 7760 | READ_BYTE_F(adr, res) |
| 7761 | flag_C = 0; |
| 7762 | flag_V = 0; |
| 7763 | flag_NotZ = res; |
| 7764 | flag_N = res; |
| 7765 | adr = AREG((Opcode >> 9) & 7); |
| 7766 | AREG((Opcode >> 9) & 7) += 1; |
| 7767 | WRITE_BYTE_F(adr, res) |
| 7768 | POST_IO |
| 7769 | RET(12) |
| 7770 | } |
| 7771 | |
| 7772 | // MOVEB |
| 7773 | OPCODE(0x111F) |
| 7774 | { |
| 7775 | u32 adr, res; |
| 7776 | u32 src, dst; |
| 7777 | |
| 7778 | adr = AREG(7); |
| 7779 | AREG(7) += 2; |
| 7780 | PRE_IO |
| 7781 | READ_BYTE_F(adr, res) |
| 7782 | flag_C = 0; |
| 7783 | flag_V = 0; |
| 7784 | flag_NotZ = res; |
| 7785 | flag_N = res; |
| 7786 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 7787 | AREG((Opcode >> 9) & 7) = adr; |
| 7788 | WRITE_BYTE_F(adr, res) |
| 7789 | POST_IO |
| 7790 | RET(12) |
| 7791 | } |
| 7792 | |
| 7793 | // MOVEB |
| 7794 | OPCODE(0x115F) |
| 7795 | { |
| 7796 | u32 adr, res; |
| 7797 | u32 src, dst; |
| 7798 | |
| 7799 | adr = AREG(7); |
| 7800 | AREG(7) += 2; |
| 7801 | PRE_IO |
| 7802 | READ_BYTE_F(adr, res) |
| 7803 | flag_C = 0; |
| 7804 | flag_V = 0; |
| 7805 | flag_NotZ = res; |
| 7806 | flag_N = res; |
| 7807 | FETCH_SWORD(adr); |
| 7808 | adr += AREG((Opcode >> 9) & 7); |
| 7809 | WRITE_BYTE_F(adr, res) |
| 7810 | POST_IO |
| 7811 | RET(16) |
| 7812 | } |
| 7813 | |
| 7814 | // MOVEB |
| 7815 | OPCODE(0x119F) |
| 7816 | { |
| 7817 | u32 adr, res; |
| 7818 | u32 src, dst; |
| 7819 | |
| 7820 | adr = AREG(7); |
| 7821 | AREG(7) += 2; |
| 7822 | PRE_IO |
| 7823 | READ_BYTE_F(adr, res) |
| 7824 | flag_C = 0; |
| 7825 | flag_V = 0; |
| 7826 | flag_NotZ = res; |
| 7827 | flag_N = res; |
| 7828 | adr = AREG((Opcode >> 9) & 7); |
| 7829 | DECODE_EXT_WORD |
| 7830 | WRITE_BYTE_F(adr, res) |
| 7831 | POST_IO |
| 7832 | RET(18) |
| 7833 | } |
| 7834 | |
| 7835 | // MOVEB |
| 7836 | OPCODE(0x11DF) |
| 7837 | { |
| 7838 | u32 adr, res; |
| 7839 | u32 src, dst; |
| 7840 | |
| 7841 | adr = AREG(7); |
| 7842 | AREG(7) += 2; |
| 7843 | PRE_IO |
| 7844 | READ_BYTE_F(adr, res) |
| 7845 | flag_C = 0; |
| 7846 | flag_V = 0; |
| 7847 | flag_NotZ = res; |
| 7848 | flag_N = res; |
| 7849 | FETCH_SWORD(adr); |
| 7850 | WRITE_BYTE_F(adr, res) |
| 7851 | POST_IO |
| 7852 | RET(16) |
| 7853 | } |
| 7854 | |
| 7855 | // MOVEB |
| 7856 | OPCODE(0x13DF) |
| 7857 | { |
| 7858 | u32 adr, res; |
| 7859 | u32 src, dst; |
| 7860 | |
| 7861 | adr = AREG(7); |
| 7862 | AREG(7) += 2; |
| 7863 | PRE_IO |
| 7864 | READ_BYTE_F(adr, res) |
| 7865 | flag_C = 0; |
| 7866 | flag_V = 0; |
| 7867 | flag_NotZ = res; |
| 7868 | flag_N = res; |
| 7869 | FETCH_LONG(adr); |
| 7870 | WRITE_BYTE_F(adr, res) |
| 7871 | POST_IO |
| 7872 | RET(20) |
| 7873 | } |
| 7874 | |
| 7875 | // MOVEB |
| 7876 | OPCODE(0x1EDF) |
| 7877 | { |
| 7878 | u32 adr, res; |
| 7879 | u32 src, dst; |
| 7880 | |
| 7881 | adr = AREG(7); |
| 7882 | AREG(7) += 2; |
| 7883 | PRE_IO |
| 7884 | READ_BYTE_F(adr, res) |
| 7885 | flag_C = 0; |
| 7886 | flag_V = 0; |
| 7887 | flag_NotZ = res; |
| 7888 | flag_N = res; |
| 7889 | adr = AREG(7); |
| 7890 | AREG(7) += 2; |
| 7891 | WRITE_BYTE_F(adr, res) |
| 7892 | POST_IO |
| 7893 | RET(12) |
| 7894 | } |
| 7895 | |
| 7896 | // MOVEB |
| 7897 | OPCODE(0x1F1F) |
| 7898 | { |
| 7899 | u32 adr, res; |
| 7900 | u32 src, dst; |
| 7901 | |
| 7902 | adr = AREG(7); |
| 7903 | AREG(7) += 2; |
| 7904 | PRE_IO |
| 7905 | READ_BYTE_F(adr, res) |
| 7906 | flag_C = 0; |
| 7907 | flag_V = 0; |
| 7908 | flag_NotZ = res; |
| 7909 | flag_N = res; |
| 7910 | adr = AREG(7) - 2; |
| 7911 | AREG(7) = adr; |
| 7912 | WRITE_BYTE_F(adr, res) |
| 7913 | POST_IO |
| 7914 | RET(12) |
| 7915 | } |
| 7916 | |
| 7917 | // MOVEB |
| 7918 | OPCODE(0x1027) |
| 7919 | { |
| 7920 | u32 adr, res; |
| 7921 | u32 src, dst; |
| 7922 | |
| 7923 | adr = AREG(7) - 2; |
| 7924 | AREG(7) = adr; |
| 7925 | PRE_IO |
| 7926 | READ_BYTE_F(adr, res) |
| 7927 | flag_C = 0; |
| 7928 | flag_V = 0; |
| 7929 | flag_NotZ = res; |
| 7930 | flag_N = res; |
| 7931 | DREGu8((Opcode >> 9) & 7) = res; |
| 7932 | POST_IO |
| 7933 | RET(10) |
| 7934 | } |
| 7935 | |
| 7936 | // MOVEB |
| 7937 | OPCODE(0x10A7) |
| 7938 | { |
| 7939 | u32 adr, res; |
| 7940 | u32 src, dst; |
| 7941 | |
| 7942 | adr = AREG(7) - 2; |
| 7943 | AREG(7) = adr; |
| 7944 | PRE_IO |
| 7945 | READ_BYTE_F(adr, res) |
| 7946 | flag_C = 0; |
| 7947 | flag_V = 0; |
| 7948 | flag_NotZ = res; |
| 7949 | flag_N = res; |
| 7950 | adr = AREG((Opcode >> 9) & 7); |
| 7951 | WRITE_BYTE_F(adr, res) |
| 7952 | POST_IO |
| 7953 | RET(14) |
| 7954 | } |
| 7955 | |
| 7956 | // MOVEB |
| 7957 | OPCODE(0x10E7) |
| 7958 | { |
| 7959 | u32 adr, res; |
| 7960 | u32 src, dst; |
| 7961 | |
| 7962 | adr = AREG(7) - 2; |
| 7963 | AREG(7) = adr; |
| 7964 | PRE_IO |
| 7965 | READ_BYTE_F(adr, res) |
| 7966 | flag_C = 0; |
| 7967 | flag_V = 0; |
| 7968 | flag_NotZ = res; |
| 7969 | flag_N = res; |
| 7970 | adr = AREG((Opcode >> 9) & 7); |
| 7971 | AREG((Opcode >> 9) & 7) += 1; |
| 7972 | WRITE_BYTE_F(adr, res) |
| 7973 | POST_IO |
| 7974 | RET(14) |
| 7975 | } |
| 7976 | |
| 7977 | // MOVEB |
| 7978 | OPCODE(0x1127) |
| 7979 | { |
| 7980 | u32 adr, res; |
| 7981 | u32 src, dst; |
| 7982 | |
| 7983 | adr = AREG(7) - 2; |
| 7984 | AREG(7) = adr; |
| 7985 | PRE_IO |
| 7986 | READ_BYTE_F(adr, res) |
| 7987 | flag_C = 0; |
| 7988 | flag_V = 0; |
| 7989 | flag_NotZ = res; |
| 7990 | flag_N = res; |
| 7991 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 7992 | AREG((Opcode >> 9) & 7) = adr; |
| 7993 | WRITE_BYTE_F(adr, res) |
| 7994 | POST_IO |
| 7995 | RET(14) |
| 7996 | } |
| 7997 | |
| 7998 | // MOVEB |
| 7999 | OPCODE(0x1167) |
| 8000 | { |
| 8001 | u32 adr, res; |
| 8002 | u32 src, dst; |
| 8003 | |
| 8004 | adr = AREG(7) - 2; |
| 8005 | AREG(7) = adr; |
| 8006 | PRE_IO |
| 8007 | READ_BYTE_F(adr, res) |
| 8008 | flag_C = 0; |
| 8009 | flag_V = 0; |
| 8010 | flag_NotZ = res; |
| 8011 | flag_N = res; |
| 8012 | FETCH_SWORD(adr); |
| 8013 | adr += AREG((Opcode >> 9) & 7); |
| 8014 | WRITE_BYTE_F(adr, res) |
| 8015 | POST_IO |
| 8016 | RET(18) |
| 8017 | } |
| 8018 | |
| 8019 | // MOVEB |
| 8020 | OPCODE(0x11A7) |
| 8021 | { |
| 8022 | u32 adr, res; |
| 8023 | u32 src, dst; |
| 8024 | |
| 8025 | adr = AREG(7) - 2; |
| 8026 | AREG(7) = adr; |
| 8027 | PRE_IO |
| 8028 | READ_BYTE_F(adr, res) |
| 8029 | flag_C = 0; |
| 8030 | flag_V = 0; |
| 8031 | flag_NotZ = res; |
| 8032 | flag_N = res; |
| 8033 | adr = AREG((Opcode >> 9) & 7); |
| 8034 | DECODE_EXT_WORD |
| 8035 | WRITE_BYTE_F(adr, res) |
| 8036 | POST_IO |
| 8037 | RET(20) |
| 8038 | } |
| 8039 | |
| 8040 | // MOVEB |
| 8041 | OPCODE(0x11E7) |
| 8042 | { |
| 8043 | u32 adr, res; |
| 8044 | u32 src, dst; |
| 8045 | |
| 8046 | adr = AREG(7) - 2; |
| 8047 | AREG(7) = adr; |
| 8048 | PRE_IO |
| 8049 | READ_BYTE_F(adr, res) |
| 8050 | flag_C = 0; |
| 8051 | flag_V = 0; |
| 8052 | flag_NotZ = res; |
| 8053 | flag_N = res; |
| 8054 | FETCH_SWORD(adr); |
| 8055 | WRITE_BYTE_F(adr, res) |
| 8056 | POST_IO |
| 8057 | RET(18) |
| 8058 | } |
| 8059 | |
| 8060 | // MOVEB |
| 8061 | OPCODE(0x13E7) |
| 8062 | { |
| 8063 | u32 adr, res; |
| 8064 | u32 src, dst; |
| 8065 | |
| 8066 | adr = AREG(7) - 2; |
| 8067 | AREG(7) = adr; |
| 8068 | PRE_IO |
| 8069 | READ_BYTE_F(adr, res) |
| 8070 | flag_C = 0; |
| 8071 | flag_V = 0; |
| 8072 | flag_NotZ = res; |
| 8073 | flag_N = res; |
| 8074 | FETCH_LONG(adr); |
| 8075 | WRITE_BYTE_F(adr, res) |
| 8076 | POST_IO |
| 8077 | RET(22) |
| 8078 | } |
| 8079 | |
| 8080 | // MOVEB |
| 8081 | OPCODE(0x1EE7) |
| 8082 | { |
| 8083 | u32 adr, res; |
| 8084 | u32 src, dst; |
| 8085 | |
| 8086 | adr = AREG(7) - 2; |
| 8087 | AREG(7) = adr; |
| 8088 | PRE_IO |
| 8089 | READ_BYTE_F(adr, res) |
| 8090 | flag_C = 0; |
| 8091 | flag_V = 0; |
| 8092 | flag_NotZ = res; |
| 8093 | flag_N = res; |
| 8094 | adr = AREG(7); |
| 8095 | AREG(7) += 2; |
| 8096 | WRITE_BYTE_F(adr, res) |
| 8097 | POST_IO |
| 8098 | RET(14) |
| 8099 | } |
| 8100 | |
| 8101 | // MOVEB |
| 8102 | OPCODE(0x1F27) |
| 8103 | { |
| 8104 | u32 adr, res; |
| 8105 | u32 src, dst; |
| 8106 | |
| 8107 | adr = AREG(7) - 2; |
| 8108 | AREG(7) = adr; |
| 8109 | PRE_IO |
| 8110 | READ_BYTE_F(adr, res) |
| 8111 | flag_C = 0; |
| 8112 | flag_V = 0; |
| 8113 | flag_NotZ = res; |
| 8114 | flag_N = res; |
| 8115 | adr = AREG(7) - 2; |
| 8116 | AREG(7) = adr; |
| 8117 | WRITE_BYTE_F(adr, res) |
| 8118 | POST_IO |
| 8119 | RET(14) |
| 8120 | } |
| 8121 | |
| 8122 | // MOVEL |
| 8123 | OPCODE(0x2000) |
| 8124 | { |
| 8125 | u32 adr, res; |
| 8126 | u32 src, dst; |
| 8127 | |
| 8128 | res = DREGu32((Opcode >> 0) & 7); |
| 8129 | flag_C = 0; |
| 8130 | flag_V = 0; |
| 8131 | flag_NotZ = res; |
| 8132 | flag_N = res >> 24; |
| 8133 | DREGu32((Opcode >> 9) & 7) = res; |
| 8134 | RET(4) |
| 8135 | } |
| 8136 | |
| 8137 | // MOVEL |
| 8138 | OPCODE(0x2080) |
| 8139 | { |
| 8140 | u32 adr, res; |
| 8141 | u32 src, dst; |
| 8142 | |
| 8143 | res = DREGu32((Opcode >> 0) & 7); |
| 8144 | flag_C = 0; |
| 8145 | flag_V = 0; |
| 8146 | flag_NotZ = res; |
| 8147 | flag_N = res >> 24; |
| 8148 | adr = AREG((Opcode >> 9) & 7); |
| 8149 | PRE_IO |
| 8150 | WRITE_LONG_F(adr, res) |
| 8151 | POST_IO |
| 8152 | RET(12) |
| 8153 | } |
| 8154 | |
| 8155 | // MOVEL |
| 8156 | OPCODE(0x20C0) |
| 8157 | { |
| 8158 | u32 adr, res; |
| 8159 | u32 src, dst; |
| 8160 | |
| 8161 | res = DREGu32((Opcode >> 0) & 7); |
| 8162 | flag_C = 0; |
| 8163 | flag_V = 0; |
| 8164 | flag_NotZ = res; |
| 8165 | flag_N = res >> 24; |
| 8166 | adr = AREG((Opcode >> 9) & 7); |
| 8167 | AREG((Opcode >> 9) & 7) += 4; |
| 8168 | PRE_IO |
| 8169 | WRITE_LONG_F(adr, res) |
| 8170 | POST_IO |
| 8171 | RET(12) |
| 8172 | } |
| 8173 | |
| 8174 | // MOVEL |
| 8175 | OPCODE(0x2100) |
| 8176 | { |
| 8177 | u32 adr, res; |
| 8178 | u32 src, dst; |
| 8179 | |
| 8180 | res = DREGu32((Opcode >> 0) & 7); |
| 8181 | flag_C = 0; |
| 8182 | flag_V = 0; |
| 8183 | flag_NotZ = res; |
| 8184 | flag_N = res >> 24; |
| 8185 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 8186 | AREG((Opcode >> 9) & 7) = adr; |
| 8187 | PRE_IO |
| 8188 | WRITE_LONG_DEC_F(adr, res) |
| 8189 | POST_IO |
| 8190 | RET(12) |
| 8191 | } |
| 8192 | |
| 8193 | // MOVEL |
| 8194 | OPCODE(0x2140) |
| 8195 | { |
| 8196 | u32 adr, res; |
| 8197 | u32 src, dst; |
| 8198 | |
| 8199 | res = DREGu32((Opcode >> 0) & 7); |
| 8200 | flag_C = 0; |
| 8201 | flag_V = 0; |
| 8202 | flag_NotZ = res; |
| 8203 | flag_N = res >> 24; |
| 8204 | FETCH_SWORD(adr); |
| 8205 | adr += AREG((Opcode >> 9) & 7); |
| 8206 | PRE_IO |
| 8207 | WRITE_LONG_F(adr, res) |
| 8208 | POST_IO |
| 8209 | RET(16) |
| 8210 | } |
| 8211 | |
| 8212 | // MOVEL |
| 8213 | OPCODE(0x2180) |
| 8214 | { |
| 8215 | u32 adr, res; |
| 8216 | u32 src, dst; |
| 8217 | |
| 8218 | res = DREGu32((Opcode >> 0) & 7); |
| 8219 | flag_C = 0; |
| 8220 | flag_V = 0; |
| 8221 | flag_NotZ = res; |
| 8222 | flag_N = res >> 24; |
| 8223 | adr = AREG((Opcode >> 9) & 7); |
| 8224 | DECODE_EXT_WORD |
| 8225 | PRE_IO |
| 8226 | WRITE_LONG_F(adr, res) |
| 8227 | POST_IO |
| 8228 | RET(18) |
| 8229 | } |
| 8230 | |
| 8231 | // MOVEL |
| 8232 | OPCODE(0x21C0) |
| 8233 | { |
| 8234 | u32 adr, res; |
| 8235 | u32 src, dst; |
| 8236 | |
| 8237 | res = DREGu32((Opcode >> 0) & 7); |
| 8238 | flag_C = 0; |
| 8239 | flag_V = 0; |
| 8240 | flag_NotZ = res; |
| 8241 | flag_N = res >> 24; |
| 8242 | FETCH_SWORD(adr); |
| 8243 | PRE_IO |
| 8244 | WRITE_LONG_F(adr, res) |
| 8245 | POST_IO |
| 8246 | RET(16) |
| 8247 | } |
| 8248 | |
| 8249 | // MOVEL |
| 8250 | OPCODE(0x23C0) |
| 8251 | { |
| 8252 | u32 adr, res; |
| 8253 | u32 src, dst; |
| 8254 | |
| 8255 | res = DREGu32((Opcode >> 0) & 7); |
| 8256 | flag_C = 0; |
| 8257 | flag_V = 0; |
| 8258 | flag_NotZ = res; |
| 8259 | flag_N = res >> 24; |
| 8260 | FETCH_LONG(adr); |
| 8261 | PRE_IO |
| 8262 | WRITE_LONG_F(adr, res) |
| 8263 | POST_IO |
| 8264 | RET(20) |
| 8265 | } |
| 8266 | |
| 8267 | // MOVEL |
| 8268 | OPCODE(0x2EC0) |
| 8269 | { |
| 8270 | u32 adr, res; |
| 8271 | u32 src, dst; |
| 8272 | |
| 8273 | res = DREGu32((Opcode >> 0) & 7); |
| 8274 | flag_C = 0; |
| 8275 | flag_V = 0; |
| 8276 | flag_NotZ = res; |
| 8277 | flag_N = res >> 24; |
| 8278 | adr = AREG(7); |
| 8279 | AREG(7) += 4; |
| 8280 | PRE_IO |
| 8281 | WRITE_LONG_F(adr, res) |
| 8282 | POST_IO |
| 8283 | RET(12) |
| 8284 | } |
| 8285 | |
| 8286 | // MOVEL |
| 8287 | OPCODE(0x2F00) |
| 8288 | { |
| 8289 | u32 adr, res; |
| 8290 | u32 src, dst; |
| 8291 | |
| 8292 | res = DREGu32((Opcode >> 0) & 7); |
| 8293 | flag_C = 0; |
| 8294 | flag_V = 0; |
| 8295 | flag_NotZ = res; |
| 8296 | flag_N = res >> 24; |
| 8297 | adr = AREG(7) - 4; |
| 8298 | AREG(7) = adr; |
| 8299 | PRE_IO |
| 8300 | WRITE_LONG_DEC_F(adr, res) |
| 8301 | POST_IO |
| 8302 | RET(12) |
| 8303 | } |
| 8304 | |
| 8305 | // MOVEL |
| 8306 | OPCODE(0x2008) |
| 8307 | { |
| 8308 | u32 adr, res; |
| 8309 | u32 src, dst; |
| 8310 | |
| 8311 | res = AREGu32((Opcode >> 0) & 7); |
| 8312 | flag_C = 0; |
| 8313 | flag_V = 0; |
| 8314 | flag_NotZ = res; |
| 8315 | flag_N = res >> 24; |
| 8316 | DREGu32((Opcode >> 9) & 7) = res; |
| 8317 | RET(4) |
| 8318 | } |
| 8319 | |
| 8320 | // MOVEL |
| 8321 | OPCODE(0x2088) |
| 8322 | { |
| 8323 | u32 adr, res; |
| 8324 | u32 src, dst; |
| 8325 | |
| 8326 | res = AREGu32((Opcode >> 0) & 7); |
| 8327 | flag_C = 0; |
| 8328 | flag_V = 0; |
| 8329 | flag_NotZ = res; |
| 8330 | flag_N = res >> 24; |
| 8331 | adr = AREG((Opcode >> 9) & 7); |
| 8332 | PRE_IO |
| 8333 | WRITE_LONG_F(adr, res) |
| 8334 | POST_IO |
| 8335 | RET(12) |
| 8336 | } |
| 8337 | |
| 8338 | // MOVEL |
| 8339 | OPCODE(0x20C8) |
| 8340 | { |
| 8341 | u32 adr, res; |
| 8342 | u32 src, dst; |
| 8343 | |
| 8344 | res = AREGu32((Opcode >> 0) & 7); |
| 8345 | flag_C = 0; |
| 8346 | flag_V = 0; |
| 8347 | flag_NotZ = res; |
| 8348 | flag_N = res >> 24; |
| 8349 | adr = AREG((Opcode >> 9) & 7); |
| 8350 | AREG((Opcode >> 9) & 7) += 4; |
| 8351 | PRE_IO |
| 8352 | WRITE_LONG_F(adr, res) |
| 8353 | POST_IO |
| 8354 | RET(12) |
| 8355 | } |
| 8356 | |
| 8357 | // MOVEL |
| 8358 | OPCODE(0x2108) |
| 8359 | { |
| 8360 | u32 adr, res; |
| 8361 | u32 src, dst; |
| 8362 | |
| 8363 | res = AREGu32((Opcode >> 0) & 7); |
| 8364 | flag_C = 0; |
| 8365 | flag_V = 0; |
| 8366 | flag_NotZ = res; |
| 8367 | flag_N = res >> 24; |
| 8368 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 8369 | AREG((Opcode >> 9) & 7) = adr; |
| 8370 | PRE_IO |
| 8371 | WRITE_LONG_DEC_F(adr, res) |
| 8372 | POST_IO |
| 8373 | RET(12) |
| 8374 | } |
| 8375 | |
| 8376 | // MOVEL |
| 8377 | OPCODE(0x2148) |
| 8378 | { |
| 8379 | u32 adr, res; |
| 8380 | u32 src, dst; |
| 8381 | |
| 8382 | res = AREGu32((Opcode >> 0) & 7); |
| 8383 | flag_C = 0; |
| 8384 | flag_V = 0; |
| 8385 | flag_NotZ = res; |
| 8386 | flag_N = res >> 24; |
| 8387 | FETCH_SWORD(adr); |
| 8388 | adr += AREG((Opcode >> 9) & 7); |
| 8389 | PRE_IO |
| 8390 | WRITE_LONG_F(adr, res) |
| 8391 | POST_IO |
| 8392 | RET(16) |
| 8393 | } |
| 8394 | |
| 8395 | // MOVEL |
| 8396 | OPCODE(0x2188) |
| 8397 | { |
| 8398 | u32 adr, res; |
| 8399 | u32 src, dst; |
| 8400 | |
| 8401 | res = AREGu32((Opcode >> 0) & 7); |
| 8402 | flag_C = 0; |
| 8403 | flag_V = 0; |
| 8404 | flag_NotZ = res; |
| 8405 | flag_N = res >> 24; |
| 8406 | adr = AREG((Opcode >> 9) & 7); |
| 8407 | DECODE_EXT_WORD |
| 8408 | PRE_IO |
| 8409 | WRITE_LONG_F(adr, res) |
| 8410 | POST_IO |
| 8411 | RET(18) |
| 8412 | } |
| 8413 | |
| 8414 | // MOVEL |
| 8415 | OPCODE(0x21C8) |
| 8416 | { |
| 8417 | u32 adr, res; |
| 8418 | u32 src, dst; |
| 8419 | |
| 8420 | res = AREGu32((Opcode >> 0) & 7); |
| 8421 | flag_C = 0; |
| 8422 | flag_V = 0; |
| 8423 | flag_NotZ = res; |
| 8424 | flag_N = res >> 24; |
| 8425 | FETCH_SWORD(adr); |
| 8426 | PRE_IO |
| 8427 | WRITE_LONG_F(adr, res) |
| 8428 | POST_IO |
| 8429 | RET(16) |
| 8430 | } |
| 8431 | |
| 8432 | // MOVEL |
| 8433 | OPCODE(0x23C8) |
| 8434 | { |
| 8435 | u32 adr, res; |
| 8436 | u32 src, dst; |
| 8437 | |
| 8438 | res = AREGu32((Opcode >> 0) & 7); |
| 8439 | flag_C = 0; |
| 8440 | flag_V = 0; |
| 8441 | flag_NotZ = res; |
| 8442 | flag_N = res >> 24; |
| 8443 | FETCH_LONG(adr); |
| 8444 | PRE_IO |
| 8445 | WRITE_LONG_F(adr, res) |
| 8446 | POST_IO |
| 8447 | RET(20) |
| 8448 | } |
| 8449 | |
| 8450 | // MOVEL |
| 8451 | OPCODE(0x2EC8) |
| 8452 | { |
| 8453 | u32 adr, res; |
| 8454 | u32 src, dst; |
| 8455 | |
| 8456 | res = AREGu32((Opcode >> 0) & 7); |
| 8457 | flag_C = 0; |
| 8458 | flag_V = 0; |
| 8459 | flag_NotZ = res; |
| 8460 | flag_N = res >> 24; |
| 8461 | adr = AREG(7); |
| 8462 | AREG(7) += 4; |
| 8463 | PRE_IO |
| 8464 | WRITE_LONG_F(adr, res) |
| 8465 | POST_IO |
| 8466 | RET(12) |
| 8467 | } |
| 8468 | |
| 8469 | // MOVEL |
| 8470 | OPCODE(0x2F08) |
| 8471 | { |
| 8472 | u32 adr, res; |
| 8473 | u32 src, dst; |
| 8474 | |
| 8475 | res = AREGu32((Opcode >> 0) & 7); |
| 8476 | flag_C = 0; |
| 8477 | flag_V = 0; |
| 8478 | flag_NotZ = res; |
| 8479 | flag_N = res >> 24; |
| 8480 | adr = AREG(7) - 4; |
| 8481 | AREG(7) = adr; |
| 8482 | PRE_IO |
| 8483 | WRITE_LONG_DEC_F(adr, res) |
| 8484 | POST_IO |
| 8485 | RET(12) |
| 8486 | } |
| 8487 | |
| 8488 | // MOVEL |
| 8489 | OPCODE(0x2010) |
| 8490 | { |
| 8491 | u32 adr, res; |
| 8492 | u32 src, dst; |
| 8493 | |
| 8494 | adr = AREG((Opcode >> 0) & 7); |
| 8495 | PRE_IO |
| 8496 | READ_LONG_F(adr, res) |
| 8497 | flag_C = 0; |
| 8498 | flag_V = 0; |
| 8499 | flag_NotZ = res; |
| 8500 | flag_N = res >> 24; |
| 8501 | DREGu32((Opcode >> 9) & 7) = res; |
| 8502 | POST_IO |
| 8503 | RET(12) |
| 8504 | } |
| 8505 | |
| 8506 | // MOVEL |
| 8507 | OPCODE(0x2090) |
| 8508 | { |
| 8509 | u32 adr, res; |
| 8510 | u32 src, dst; |
| 8511 | |
| 8512 | adr = AREG((Opcode >> 0) & 7); |
| 8513 | PRE_IO |
| 8514 | READ_LONG_F(adr, res) |
| 8515 | flag_C = 0; |
| 8516 | flag_V = 0; |
| 8517 | flag_NotZ = res; |
| 8518 | flag_N = res >> 24; |
| 8519 | adr = AREG((Opcode >> 9) & 7); |
| 8520 | WRITE_LONG_F(adr, res) |
| 8521 | POST_IO |
| 8522 | RET(20) |
| 8523 | } |
| 8524 | |
| 8525 | // MOVEL |
| 8526 | OPCODE(0x20D0) |
| 8527 | { |
| 8528 | u32 adr, res; |
| 8529 | u32 src, dst; |
| 8530 | |
| 8531 | adr = AREG((Opcode >> 0) & 7); |
| 8532 | PRE_IO |
| 8533 | READ_LONG_F(adr, res) |
| 8534 | flag_C = 0; |
| 8535 | flag_V = 0; |
| 8536 | flag_NotZ = res; |
| 8537 | flag_N = res >> 24; |
| 8538 | adr = AREG((Opcode >> 9) & 7); |
| 8539 | AREG((Opcode >> 9) & 7) += 4; |
| 8540 | WRITE_LONG_F(adr, res) |
| 8541 | POST_IO |
| 8542 | RET(20) |
| 8543 | } |
| 8544 | |
| 8545 | // MOVEL |
| 8546 | OPCODE(0x2110) |
| 8547 | { |
| 8548 | u32 adr, res; |
| 8549 | u32 src, dst; |
| 8550 | |
| 8551 | adr = AREG((Opcode >> 0) & 7); |
| 8552 | PRE_IO |
| 8553 | READ_LONG_F(adr, res) |
| 8554 | flag_C = 0; |
| 8555 | flag_V = 0; |
| 8556 | flag_NotZ = res; |
| 8557 | flag_N = res >> 24; |
| 8558 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 8559 | AREG((Opcode >> 9) & 7) = adr; |
| 8560 | WRITE_LONG_DEC_F(adr, res) |
| 8561 | POST_IO |
| 8562 | RET(20) |
| 8563 | } |
| 8564 | |
| 8565 | // MOVEL |
| 8566 | OPCODE(0x2150) |
| 8567 | { |
| 8568 | u32 adr, res; |
| 8569 | u32 src, dst; |
| 8570 | |
| 8571 | adr = AREG((Opcode >> 0) & 7); |
| 8572 | PRE_IO |
| 8573 | READ_LONG_F(adr, res) |
| 8574 | flag_C = 0; |
| 8575 | flag_V = 0; |
| 8576 | flag_NotZ = res; |
| 8577 | flag_N = res >> 24; |
| 8578 | FETCH_SWORD(adr); |
| 8579 | adr += AREG((Opcode >> 9) & 7); |
| 8580 | WRITE_LONG_F(adr, res) |
| 8581 | POST_IO |
| 8582 | RET(24) |
| 8583 | } |
| 8584 | |
| 8585 | // MOVEL |
| 8586 | OPCODE(0x2190) |
| 8587 | { |
| 8588 | u32 adr, res; |
| 8589 | u32 src, dst; |
| 8590 | |
| 8591 | adr = AREG((Opcode >> 0) & 7); |
| 8592 | PRE_IO |
| 8593 | READ_LONG_F(adr, res) |
| 8594 | flag_C = 0; |
| 8595 | flag_V = 0; |
| 8596 | flag_NotZ = res; |
| 8597 | flag_N = res >> 24; |
| 8598 | adr = AREG((Opcode >> 9) & 7); |
| 8599 | DECODE_EXT_WORD |
| 8600 | WRITE_LONG_F(adr, res) |
| 8601 | POST_IO |
| 8602 | RET(26) |
| 8603 | } |
| 8604 | |
| 8605 | // MOVEL |
| 8606 | OPCODE(0x21D0) |
| 8607 | { |
| 8608 | u32 adr, res; |
| 8609 | u32 src, dst; |
| 8610 | |
| 8611 | adr = AREG((Opcode >> 0) & 7); |
| 8612 | PRE_IO |
| 8613 | READ_LONG_F(adr, res) |
| 8614 | flag_C = 0; |
| 8615 | flag_V = 0; |
| 8616 | flag_NotZ = res; |
| 8617 | flag_N = res >> 24; |
| 8618 | FETCH_SWORD(adr); |
| 8619 | WRITE_LONG_F(adr, res) |
| 8620 | POST_IO |
| 8621 | RET(24) |
| 8622 | } |
| 8623 | |
| 8624 | // MOVEL |
| 8625 | OPCODE(0x23D0) |
| 8626 | { |
| 8627 | u32 adr, res; |
| 8628 | u32 src, dst; |
| 8629 | |
| 8630 | adr = AREG((Opcode >> 0) & 7); |
| 8631 | PRE_IO |
| 8632 | READ_LONG_F(adr, res) |
| 8633 | flag_C = 0; |
| 8634 | flag_V = 0; |
| 8635 | flag_NotZ = res; |
| 8636 | flag_N = res >> 24; |
| 8637 | FETCH_LONG(adr); |
| 8638 | WRITE_LONG_F(adr, res) |
| 8639 | POST_IO |
| 8640 | RET(28) |
| 8641 | } |
| 8642 | |
| 8643 | // MOVEL |
| 8644 | OPCODE(0x2ED0) |
| 8645 | { |
| 8646 | u32 adr, res; |
| 8647 | u32 src, dst; |
| 8648 | |
| 8649 | adr = AREG((Opcode >> 0) & 7); |
| 8650 | PRE_IO |
| 8651 | READ_LONG_F(adr, res) |
| 8652 | flag_C = 0; |
| 8653 | flag_V = 0; |
| 8654 | flag_NotZ = res; |
| 8655 | flag_N = res >> 24; |
| 8656 | adr = AREG(7); |
| 8657 | AREG(7) += 4; |
| 8658 | WRITE_LONG_F(adr, res) |
| 8659 | POST_IO |
| 8660 | RET(20) |
| 8661 | } |
| 8662 | |
| 8663 | // MOVEL |
| 8664 | OPCODE(0x2F10) |
| 8665 | { |
| 8666 | u32 adr, res; |
| 8667 | u32 src, dst; |
| 8668 | |
| 8669 | adr = AREG((Opcode >> 0) & 7); |
| 8670 | PRE_IO |
| 8671 | READ_LONG_F(adr, res) |
| 8672 | flag_C = 0; |
| 8673 | flag_V = 0; |
| 8674 | flag_NotZ = res; |
| 8675 | flag_N = res >> 24; |
| 8676 | adr = AREG(7) - 4; |
| 8677 | AREG(7) = adr; |
| 8678 | WRITE_LONG_DEC_F(adr, res) |
| 8679 | POST_IO |
| 8680 | RET(20) |
| 8681 | } |
| 8682 | |
| 8683 | // MOVEL |
| 8684 | OPCODE(0x2018) |
| 8685 | { |
| 8686 | u32 adr, res; |
| 8687 | u32 src, dst; |
| 8688 | |
| 8689 | adr = AREG((Opcode >> 0) & 7); |
| 8690 | AREG((Opcode >> 0) & 7) += 4; |
| 8691 | PRE_IO |
| 8692 | READ_LONG_F(adr, res) |
| 8693 | flag_C = 0; |
| 8694 | flag_V = 0; |
| 8695 | flag_NotZ = res; |
| 8696 | flag_N = res >> 24; |
| 8697 | DREGu32((Opcode >> 9) & 7) = res; |
| 8698 | POST_IO |
| 8699 | RET(12) |
| 8700 | } |
| 8701 | |
| 8702 | // MOVEL |
| 8703 | OPCODE(0x2098) |
| 8704 | { |
| 8705 | u32 adr, res; |
| 8706 | u32 src, dst; |
| 8707 | |
| 8708 | adr = AREG((Opcode >> 0) & 7); |
| 8709 | AREG((Opcode >> 0) & 7) += 4; |
| 8710 | PRE_IO |
| 8711 | READ_LONG_F(adr, res) |
| 8712 | flag_C = 0; |
| 8713 | flag_V = 0; |
| 8714 | flag_NotZ = res; |
| 8715 | flag_N = res >> 24; |
| 8716 | adr = AREG((Opcode >> 9) & 7); |
| 8717 | WRITE_LONG_F(adr, res) |
| 8718 | POST_IO |
| 8719 | RET(20) |
| 8720 | } |
| 8721 | |
| 8722 | // MOVEL |
| 8723 | OPCODE(0x20D8) |
| 8724 | { |
| 8725 | u32 adr, res; |
| 8726 | u32 src, dst; |
| 8727 | |
| 8728 | adr = AREG((Opcode >> 0) & 7); |
| 8729 | AREG((Opcode >> 0) & 7) += 4; |
| 8730 | PRE_IO |
| 8731 | READ_LONG_F(adr, res) |
| 8732 | flag_C = 0; |
| 8733 | flag_V = 0; |
| 8734 | flag_NotZ = res; |
| 8735 | flag_N = res >> 24; |
| 8736 | adr = AREG((Opcode >> 9) & 7); |
| 8737 | AREG((Opcode >> 9) & 7) += 4; |
| 8738 | WRITE_LONG_F(adr, res) |
| 8739 | POST_IO |
| 8740 | RET(20) |
| 8741 | } |
| 8742 | |
| 8743 | // MOVEL |
| 8744 | OPCODE(0x2118) |
| 8745 | { |
| 8746 | u32 adr, res; |
| 8747 | u32 src, dst; |
| 8748 | |
| 8749 | adr = AREG((Opcode >> 0) & 7); |
| 8750 | AREG((Opcode >> 0) & 7) += 4; |
| 8751 | PRE_IO |
| 8752 | READ_LONG_F(adr, res) |
| 8753 | flag_C = 0; |
| 8754 | flag_V = 0; |
| 8755 | flag_NotZ = res; |
| 8756 | flag_N = res >> 24; |
| 8757 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 8758 | AREG((Opcode >> 9) & 7) = adr; |
| 8759 | WRITE_LONG_DEC_F(adr, res) |
| 8760 | POST_IO |
| 8761 | RET(20) |
| 8762 | } |
| 8763 | |
| 8764 | // MOVEL |
| 8765 | OPCODE(0x2158) |
| 8766 | { |
| 8767 | u32 adr, res; |
| 8768 | u32 src, dst; |
| 8769 | |
| 8770 | adr = AREG((Opcode >> 0) & 7); |
| 8771 | AREG((Opcode >> 0) & 7) += 4; |
| 8772 | PRE_IO |
| 8773 | READ_LONG_F(adr, res) |
| 8774 | flag_C = 0; |
| 8775 | flag_V = 0; |
| 8776 | flag_NotZ = res; |
| 8777 | flag_N = res >> 24; |
| 8778 | FETCH_SWORD(adr); |
| 8779 | adr += AREG((Opcode >> 9) & 7); |
| 8780 | WRITE_LONG_F(adr, res) |
| 8781 | POST_IO |
| 8782 | RET(24) |
| 8783 | } |
| 8784 | |
| 8785 | // MOVEL |
| 8786 | OPCODE(0x2198) |
| 8787 | { |
| 8788 | u32 adr, res; |
| 8789 | u32 src, dst; |
| 8790 | |
| 8791 | adr = AREG((Opcode >> 0) & 7); |
| 8792 | AREG((Opcode >> 0) & 7) += 4; |
| 8793 | PRE_IO |
| 8794 | READ_LONG_F(adr, res) |
| 8795 | flag_C = 0; |
| 8796 | flag_V = 0; |
| 8797 | flag_NotZ = res; |
| 8798 | flag_N = res >> 24; |
| 8799 | adr = AREG((Opcode >> 9) & 7); |
| 8800 | DECODE_EXT_WORD |
| 8801 | WRITE_LONG_F(adr, res) |
| 8802 | POST_IO |
| 8803 | RET(26) |
| 8804 | } |
| 8805 | |
| 8806 | // MOVEL |
| 8807 | OPCODE(0x21D8) |
| 8808 | { |
| 8809 | u32 adr, res; |
| 8810 | u32 src, dst; |
| 8811 | |
| 8812 | adr = AREG((Opcode >> 0) & 7); |
| 8813 | AREG((Opcode >> 0) & 7) += 4; |
| 8814 | PRE_IO |
| 8815 | READ_LONG_F(adr, res) |
| 8816 | flag_C = 0; |
| 8817 | flag_V = 0; |
| 8818 | flag_NotZ = res; |
| 8819 | flag_N = res >> 24; |
| 8820 | FETCH_SWORD(adr); |
| 8821 | WRITE_LONG_F(adr, res) |
| 8822 | POST_IO |
| 8823 | RET(24) |
| 8824 | } |
| 8825 | |
| 8826 | // MOVEL |
| 8827 | OPCODE(0x23D8) |
| 8828 | { |
| 8829 | u32 adr, res; |
| 8830 | u32 src, dst; |
| 8831 | |
| 8832 | adr = AREG((Opcode >> 0) & 7); |
| 8833 | AREG((Opcode >> 0) & 7) += 4; |
| 8834 | PRE_IO |
| 8835 | READ_LONG_F(adr, res) |
| 8836 | flag_C = 0; |
| 8837 | flag_V = 0; |
| 8838 | flag_NotZ = res; |
| 8839 | flag_N = res >> 24; |
| 8840 | FETCH_LONG(adr); |
| 8841 | WRITE_LONG_F(adr, res) |
| 8842 | POST_IO |
| 8843 | RET(28) |
| 8844 | } |
| 8845 | |
| 8846 | // MOVEL |
| 8847 | OPCODE(0x2ED8) |
| 8848 | { |
| 8849 | u32 adr, res; |
| 8850 | u32 src, dst; |
| 8851 | |
| 8852 | adr = AREG((Opcode >> 0) & 7); |
| 8853 | AREG((Opcode >> 0) & 7) += 4; |
| 8854 | PRE_IO |
| 8855 | READ_LONG_F(adr, res) |
| 8856 | flag_C = 0; |
| 8857 | flag_V = 0; |
| 8858 | flag_NotZ = res; |
| 8859 | flag_N = res >> 24; |
| 8860 | adr = AREG(7); |
| 8861 | AREG(7) += 4; |
| 8862 | WRITE_LONG_F(adr, res) |
| 8863 | POST_IO |
| 8864 | RET(20) |
| 8865 | } |
| 8866 | |
| 8867 | // MOVEL |
| 8868 | OPCODE(0x2F18) |
| 8869 | { |
| 8870 | u32 adr, res; |
| 8871 | u32 src, dst; |
| 8872 | |
| 8873 | adr = AREG((Opcode >> 0) & 7); |
| 8874 | AREG((Opcode >> 0) & 7) += 4; |
| 8875 | PRE_IO |
| 8876 | READ_LONG_F(adr, res) |
| 8877 | flag_C = 0; |
| 8878 | flag_V = 0; |
| 8879 | flag_NotZ = res; |
| 8880 | flag_N = res >> 24; |
| 8881 | adr = AREG(7) - 4; |
| 8882 | AREG(7) = adr; |
| 8883 | WRITE_LONG_DEC_F(adr, res) |
| 8884 | POST_IO |
| 8885 | RET(20) |
| 8886 | } |
| 8887 | |
| 8888 | // MOVEL |
| 8889 | OPCODE(0x2020) |
| 8890 | { |
| 8891 | u32 adr, res; |
| 8892 | u32 src, dst; |
| 8893 | |
| 8894 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 8895 | AREG((Opcode >> 0) & 7) = adr; |
| 8896 | PRE_IO |
| 8897 | READ_LONG_F(adr, res) |
| 8898 | flag_C = 0; |
| 8899 | flag_V = 0; |
| 8900 | flag_NotZ = res; |
| 8901 | flag_N = res >> 24; |
| 8902 | DREGu32((Opcode >> 9) & 7) = res; |
| 8903 | POST_IO |
| 8904 | RET(14) |
| 8905 | } |
| 8906 | |
| 8907 | // MOVEL |
| 8908 | OPCODE(0x20A0) |
| 8909 | { |
| 8910 | u32 adr, res; |
| 8911 | u32 src, dst; |
| 8912 | |
| 8913 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 8914 | AREG((Opcode >> 0) & 7) = adr; |
| 8915 | PRE_IO |
| 8916 | READ_LONG_F(adr, res) |
| 8917 | flag_C = 0; |
| 8918 | flag_V = 0; |
| 8919 | flag_NotZ = res; |
| 8920 | flag_N = res >> 24; |
| 8921 | adr = AREG((Opcode >> 9) & 7); |
| 8922 | WRITE_LONG_F(adr, res) |
| 8923 | POST_IO |
| 8924 | RET(22) |
| 8925 | } |
| 8926 | |
| 8927 | // MOVEL |
| 8928 | OPCODE(0x20E0) |
| 8929 | { |
| 8930 | u32 adr, res; |
| 8931 | u32 src, dst; |
| 8932 | |
| 8933 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 8934 | AREG((Opcode >> 0) & 7) = adr; |
| 8935 | PRE_IO |
| 8936 | READ_LONG_F(adr, res) |
| 8937 | flag_C = 0; |
| 8938 | flag_V = 0; |
| 8939 | flag_NotZ = res; |
| 8940 | flag_N = res >> 24; |
| 8941 | adr = AREG((Opcode >> 9) & 7); |
| 8942 | AREG((Opcode >> 9) & 7) += 4; |
| 8943 | WRITE_LONG_F(adr, res) |
| 8944 | POST_IO |
| 8945 | RET(22) |
| 8946 | } |
| 8947 | |
| 8948 | // MOVEL |
| 8949 | OPCODE(0x2120) |
| 8950 | { |
| 8951 | u32 adr, res; |
| 8952 | u32 src, dst; |
| 8953 | |
| 8954 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 8955 | AREG((Opcode >> 0) & 7) = adr; |
| 8956 | PRE_IO |
| 8957 | READ_LONG_F(adr, res) |
| 8958 | flag_C = 0; |
| 8959 | flag_V = 0; |
| 8960 | flag_NotZ = res; |
| 8961 | flag_N = res >> 24; |
| 8962 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 8963 | AREG((Opcode >> 9) & 7) = adr; |
| 8964 | WRITE_LONG_DEC_F(adr, res) |
| 8965 | POST_IO |
| 8966 | RET(22) |
| 8967 | } |
| 8968 | |
| 8969 | // MOVEL |
| 8970 | OPCODE(0x2160) |
| 8971 | { |
| 8972 | u32 adr, res; |
| 8973 | u32 src, dst; |
| 8974 | |
| 8975 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 8976 | AREG((Opcode >> 0) & 7) = adr; |
| 8977 | PRE_IO |
| 8978 | READ_LONG_F(adr, res) |
| 8979 | flag_C = 0; |
| 8980 | flag_V = 0; |
| 8981 | flag_NotZ = res; |
| 8982 | flag_N = res >> 24; |
| 8983 | FETCH_SWORD(adr); |
| 8984 | adr += AREG((Opcode >> 9) & 7); |
| 8985 | WRITE_LONG_F(adr, res) |
| 8986 | POST_IO |
| 8987 | RET(26) |
| 8988 | } |
| 8989 | |
| 8990 | // MOVEL |
| 8991 | OPCODE(0x21A0) |
| 8992 | { |
| 8993 | u32 adr, res; |
| 8994 | u32 src, dst; |
| 8995 | |
| 8996 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 8997 | AREG((Opcode >> 0) & 7) = adr; |
| 8998 | PRE_IO |
| 8999 | READ_LONG_F(adr, res) |
| 9000 | flag_C = 0; |
| 9001 | flag_V = 0; |
| 9002 | flag_NotZ = res; |
| 9003 | flag_N = res >> 24; |
| 9004 | adr = AREG((Opcode >> 9) & 7); |
| 9005 | DECODE_EXT_WORD |
| 9006 | WRITE_LONG_F(adr, res) |
| 9007 | POST_IO |
| 9008 | RET(28) |
| 9009 | } |
| 9010 | |
| 9011 | // MOVEL |
| 9012 | OPCODE(0x21E0) |
| 9013 | { |
| 9014 | u32 adr, res; |
| 9015 | u32 src, dst; |
| 9016 | |
| 9017 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 9018 | AREG((Opcode >> 0) & 7) = adr; |
| 9019 | PRE_IO |
| 9020 | READ_LONG_F(adr, res) |
| 9021 | flag_C = 0; |
| 9022 | flag_V = 0; |
| 9023 | flag_NotZ = res; |
| 9024 | flag_N = res >> 24; |
| 9025 | FETCH_SWORD(adr); |
| 9026 | WRITE_LONG_F(adr, res) |
| 9027 | POST_IO |
| 9028 | RET(26) |
| 9029 | } |
| 9030 | |
| 9031 | // MOVEL |
| 9032 | OPCODE(0x23E0) |
| 9033 | { |
| 9034 | u32 adr, res; |
| 9035 | u32 src, dst; |
| 9036 | |
| 9037 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 9038 | AREG((Opcode >> 0) & 7) = adr; |
| 9039 | PRE_IO |
| 9040 | READ_LONG_F(adr, res) |
| 9041 | flag_C = 0; |
| 9042 | flag_V = 0; |
| 9043 | flag_NotZ = res; |
| 9044 | flag_N = res >> 24; |
| 9045 | FETCH_LONG(adr); |
| 9046 | WRITE_LONG_F(adr, res) |
| 9047 | POST_IO |
| 9048 | RET(30) |
| 9049 | } |
| 9050 | |
| 9051 | // MOVEL |
| 9052 | OPCODE(0x2EE0) |
| 9053 | { |
| 9054 | u32 adr, res; |
| 9055 | u32 src, dst; |
| 9056 | |
| 9057 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 9058 | AREG((Opcode >> 0) & 7) = adr; |
| 9059 | PRE_IO |
| 9060 | READ_LONG_F(adr, res) |
| 9061 | flag_C = 0; |
| 9062 | flag_V = 0; |
| 9063 | flag_NotZ = res; |
| 9064 | flag_N = res >> 24; |
| 9065 | adr = AREG(7); |
| 9066 | AREG(7) += 4; |
| 9067 | WRITE_LONG_F(adr, res) |
| 9068 | POST_IO |
| 9069 | RET(22) |
| 9070 | } |
| 9071 | |
| 9072 | // MOVEL |
| 9073 | OPCODE(0x2F20) |
| 9074 | { |
| 9075 | u32 adr, res; |
| 9076 | u32 src, dst; |
| 9077 | |
| 9078 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 9079 | AREG((Opcode >> 0) & 7) = adr; |
| 9080 | PRE_IO |
| 9081 | READ_LONG_F(adr, res) |
| 9082 | flag_C = 0; |
| 9083 | flag_V = 0; |
| 9084 | flag_NotZ = res; |
| 9085 | flag_N = res >> 24; |
| 9086 | adr = AREG(7) - 4; |
| 9087 | AREG(7) = adr; |
| 9088 | WRITE_LONG_DEC_F(adr, res) |
| 9089 | POST_IO |
| 9090 | RET(22) |
| 9091 | } |
| 9092 | |
| 9093 | // MOVEL |
| 9094 | OPCODE(0x2028) |
| 9095 | { |
| 9096 | u32 adr, res; |
| 9097 | u32 src, dst; |
| 9098 | |
| 9099 | FETCH_SWORD(adr); |
| 9100 | adr += AREG((Opcode >> 0) & 7); |
| 9101 | PRE_IO |
| 9102 | READ_LONG_F(adr, res) |
| 9103 | flag_C = 0; |
| 9104 | flag_V = 0; |
| 9105 | flag_NotZ = res; |
| 9106 | flag_N = res >> 24; |
| 9107 | DREGu32((Opcode >> 9) & 7) = res; |
| 9108 | POST_IO |
| 9109 | RET(16) |
| 9110 | } |
| 9111 | |
| 9112 | // MOVEL |
| 9113 | OPCODE(0x20A8) |
| 9114 | { |
| 9115 | u32 adr, res; |
| 9116 | u32 src, dst; |
| 9117 | |
| 9118 | FETCH_SWORD(adr); |
| 9119 | adr += AREG((Opcode >> 0) & 7); |
| 9120 | PRE_IO |
| 9121 | READ_LONG_F(adr, res) |
| 9122 | flag_C = 0; |
| 9123 | flag_V = 0; |
| 9124 | flag_NotZ = res; |
| 9125 | flag_N = res >> 24; |
| 9126 | adr = AREG((Opcode >> 9) & 7); |
| 9127 | WRITE_LONG_F(adr, res) |
| 9128 | POST_IO |
| 9129 | RET(24) |
| 9130 | } |
| 9131 | |
| 9132 | // MOVEL |
| 9133 | OPCODE(0x20E8) |
| 9134 | { |
| 9135 | u32 adr, res; |
| 9136 | u32 src, dst; |
| 9137 | |
| 9138 | FETCH_SWORD(adr); |
| 9139 | adr += AREG((Opcode >> 0) & 7); |
| 9140 | PRE_IO |
| 9141 | READ_LONG_F(adr, res) |
| 9142 | flag_C = 0; |
| 9143 | flag_V = 0; |
| 9144 | flag_NotZ = res; |
| 9145 | flag_N = res >> 24; |
| 9146 | adr = AREG((Opcode >> 9) & 7); |
| 9147 | AREG((Opcode >> 9) & 7) += 4; |
| 9148 | WRITE_LONG_F(adr, res) |
| 9149 | POST_IO |
| 9150 | RET(24) |
| 9151 | } |
| 9152 | |
| 9153 | // MOVEL |
| 9154 | OPCODE(0x2128) |
| 9155 | { |
| 9156 | u32 adr, res; |
| 9157 | u32 src, dst; |
| 9158 | |
| 9159 | FETCH_SWORD(adr); |
| 9160 | adr += AREG((Opcode >> 0) & 7); |
| 9161 | PRE_IO |
| 9162 | READ_LONG_F(adr, res) |
| 9163 | flag_C = 0; |
| 9164 | flag_V = 0; |
| 9165 | flag_NotZ = res; |
| 9166 | flag_N = res >> 24; |
| 9167 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 9168 | AREG((Opcode >> 9) & 7) = adr; |
| 9169 | WRITE_LONG_DEC_F(adr, res) |
| 9170 | POST_IO |
| 9171 | RET(24) |
| 9172 | } |
| 9173 | |
| 9174 | // MOVEL |
| 9175 | OPCODE(0x2168) |
| 9176 | { |
| 9177 | u32 adr, res; |
| 9178 | u32 src, dst; |
| 9179 | |
| 9180 | FETCH_SWORD(adr); |
| 9181 | adr += AREG((Opcode >> 0) & 7); |
| 9182 | PRE_IO |
| 9183 | READ_LONG_F(adr, res) |
| 9184 | flag_C = 0; |
| 9185 | flag_V = 0; |
| 9186 | flag_NotZ = res; |
| 9187 | flag_N = res >> 24; |
| 9188 | FETCH_SWORD(adr); |
| 9189 | adr += AREG((Opcode >> 9) & 7); |
| 9190 | WRITE_LONG_F(adr, res) |
| 9191 | POST_IO |
| 9192 | RET(28) |
| 9193 | } |
| 9194 | |
| 9195 | // MOVEL |
| 9196 | OPCODE(0x21A8) |
| 9197 | { |
| 9198 | u32 adr, res; |
| 9199 | u32 src, dst; |
| 9200 | |
| 9201 | FETCH_SWORD(adr); |
| 9202 | adr += AREG((Opcode >> 0) & 7); |
| 9203 | PRE_IO |
| 9204 | READ_LONG_F(adr, res) |
| 9205 | flag_C = 0; |
| 9206 | flag_V = 0; |
| 9207 | flag_NotZ = res; |
| 9208 | flag_N = res >> 24; |
| 9209 | adr = AREG((Opcode >> 9) & 7); |
| 9210 | DECODE_EXT_WORD |
| 9211 | WRITE_LONG_F(adr, res) |
| 9212 | POST_IO |
| 9213 | RET(30) |
| 9214 | } |
| 9215 | |
| 9216 | // MOVEL |
| 9217 | OPCODE(0x21E8) |
| 9218 | { |
| 9219 | u32 adr, res; |
| 9220 | u32 src, dst; |
| 9221 | |
| 9222 | FETCH_SWORD(adr); |
| 9223 | adr += AREG((Opcode >> 0) & 7); |
| 9224 | PRE_IO |
| 9225 | READ_LONG_F(adr, res) |
| 9226 | flag_C = 0; |
| 9227 | flag_V = 0; |
| 9228 | flag_NotZ = res; |
| 9229 | flag_N = res >> 24; |
| 9230 | FETCH_SWORD(adr); |
| 9231 | WRITE_LONG_F(adr, res) |
| 9232 | POST_IO |
| 9233 | RET(28) |
| 9234 | } |
| 9235 | |
| 9236 | // MOVEL |
| 9237 | OPCODE(0x23E8) |
| 9238 | { |
| 9239 | u32 adr, res; |
| 9240 | u32 src, dst; |
| 9241 | |
| 9242 | FETCH_SWORD(adr); |
| 9243 | adr += AREG((Opcode >> 0) & 7); |
| 9244 | PRE_IO |
| 9245 | READ_LONG_F(adr, res) |
| 9246 | flag_C = 0; |
| 9247 | flag_V = 0; |
| 9248 | flag_NotZ = res; |
| 9249 | flag_N = res >> 24; |
| 9250 | FETCH_LONG(adr); |
| 9251 | WRITE_LONG_F(adr, res) |
| 9252 | POST_IO |
| 9253 | RET(32) |
| 9254 | } |
| 9255 | |
| 9256 | // MOVEL |
| 9257 | OPCODE(0x2EE8) |
| 9258 | { |
| 9259 | u32 adr, res; |
| 9260 | u32 src, dst; |
| 9261 | |
| 9262 | FETCH_SWORD(adr); |
| 9263 | adr += AREG((Opcode >> 0) & 7); |
| 9264 | PRE_IO |
| 9265 | READ_LONG_F(adr, res) |
| 9266 | flag_C = 0; |
| 9267 | flag_V = 0; |
| 9268 | flag_NotZ = res; |
| 9269 | flag_N = res >> 24; |
| 9270 | adr = AREG(7); |
| 9271 | AREG(7) += 4; |
| 9272 | WRITE_LONG_F(adr, res) |
| 9273 | POST_IO |
| 9274 | RET(24) |
| 9275 | } |
| 9276 | |
| 9277 | // MOVEL |
| 9278 | OPCODE(0x2F28) |
| 9279 | { |
| 9280 | u32 adr, res; |
| 9281 | u32 src, dst; |
| 9282 | |
| 9283 | FETCH_SWORD(adr); |
| 9284 | adr += AREG((Opcode >> 0) & 7); |
| 9285 | PRE_IO |
| 9286 | READ_LONG_F(adr, res) |
| 9287 | flag_C = 0; |
| 9288 | flag_V = 0; |
| 9289 | flag_NotZ = res; |
| 9290 | flag_N = res >> 24; |
| 9291 | adr = AREG(7) - 4; |
| 9292 | AREG(7) = adr; |
| 9293 | WRITE_LONG_DEC_F(adr, res) |
| 9294 | POST_IO |
| 9295 | RET(24) |
| 9296 | } |
| 9297 | |
| 9298 | // MOVEL |
| 9299 | OPCODE(0x2030) |
| 9300 | { |
| 9301 | u32 adr, res; |
| 9302 | u32 src, dst; |
| 9303 | |
| 9304 | adr = AREG((Opcode >> 0) & 7); |
| 9305 | DECODE_EXT_WORD |
| 9306 | PRE_IO |
| 9307 | READ_LONG_F(adr, res) |
| 9308 | flag_C = 0; |
| 9309 | flag_V = 0; |
| 9310 | flag_NotZ = res; |
| 9311 | flag_N = res >> 24; |
| 9312 | DREGu32((Opcode >> 9) & 7) = res; |
| 9313 | POST_IO |
| 9314 | RET(18) |
| 9315 | } |
| 9316 | |
| 9317 | // MOVEL |
| 9318 | OPCODE(0x20B0) |
| 9319 | { |
| 9320 | u32 adr, res; |
| 9321 | u32 src, dst; |
| 9322 | |
| 9323 | adr = AREG((Opcode >> 0) & 7); |
| 9324 | DECODE_EXT_WORD |
| 9325 | PRE_IO |
| 9326 | READ_LONG_F(adr, res) |
| 9327 | flag_C = 0; |
| 9328 | flag_V = 0; |
| 9329 | flag_NotZ = res; |
| 9330 | flag_N = res >> 24; |
| 9331 | adr = AREG((Opcode >> 9) & 7); |
| 9332 | WRITE_LONG_F(adr, res) |
| 9333 | POST_IO |
| 9334 | RET(26) |
| 9335 | } |
| 9336 | |
| 9337 | // MOVEL |
| 9338 | OPCODE(0x20F0) |
| 9339 | { |
| 9340 | u32 adr, res; |
| 9341 | u32 src, dst; |
| 9342 | |
| 9343 | adr = AREG((Opcode >> 0) & 7); |
| 9344 | DECODE_EXT_WORD |
| 9345 | PRE_IO |
| 9346 | READ_LONG_F(adr, res) |
| 9347 | flag_C = 0; |
| 9348 | flag_V = 0; |
| 9349 | flag_NotZ = res; |
| 9350 | flag_N = res >> 24; |
| 9351 | adr = AREG((Opcode >> 9) & 7); |
| 9352 | AREG((Opcode >> 9) & 7) += 4; |
| 9353 | WRITE_LONG_F(adr, res) |
| 9354 | POST_IO |
| 9355 | RET(26) |
| 9356 | } |
| 9357 | |
| 9358 | // MOVEL |
| 9359 | OPCODE(0x2130) |
| 9360 | { |
| 9361 | u32 adr, res; |
| 9362 | u32 src, dst; |
| 9363 | |
| 9364 | adr = AREG((Opcode >> 0) & 7); |
| 9365 | DECODE_EXT_WORD |
| 9366 | PRE_IO |
| 9367 | READ_LONG_F(adr, res) |
| 9368 | flag_C = 0; |
| 9369 | flag_V = 0; |
| 9370 | flag_NotZ = res; |
| 9371 | flag_N = res >> 24; |
| 9372 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 9373 | AREG((Opcode >> 9) & 7) = adr; |
| 9374 | WRITE_LONG_DEC_F(adr, res) |
| 9375 | POST_IO |
| 9376 | RET(26) |
| 9377 | } |
| 9378 | |
| 9379 | // MOVEL |
| 9380 | OPCODE(0x2170) |
| 9381 | { |
| 9382 | u32 adr, res; |
| 9383 | u32 src, dst; |
| 9384 | |
| 9385 | adr = AREG((Opcode >> 0) & 7); |
| 9386 | DECODE_EXT_WORD |
| 9387 | PRE_IO |
| 9388 | READ_LONG_F(adr, res) |
| 9389 | flag_C = 0; |
| 9390 | flag_V = 0; |
| 9391 | flag_NotZ = res; |
| 9392 | flag_N = res >> 24; |
| 9393 | FETCH_SWORD(adr); |
| 9394 | adr += AREG((Opcode >> 9) & 7); |
| 9395 | WRITE_LONG_F(adr, res) |
| 9396 | POST_IO |
| 9397 | RET(30) |
| 9398 | } |
| 9399 | |
| 9400 | // MOVEL |
| 9401 | OPCODE(0x21B0) |
| 9402 | { |
| 9403 | u32 adr, res; |
| 9404 | u32 src, dst; |
| 9405 | |
| 9406 | adr = AREG((Opcode >> 0) & 7); |
| 9407 | DECODE_EXT_WORD |
| 9408 | PRE_IO |
| 9409 | READ_LONG_F(adr, res) |
| 9410 | flag_C = 0; |
| 9411 | flag_V = 0; |
| 9412 | flag_NotZ = res; |
| 9413 | flag_N = res >> 24; |
| 9414 | adr = AREG((Opcode >> 9) & 7); |
| 9415 | DECODE_EXT_WORD |
| 9416 | WRITE_LONG_F(adr, res) |
| 9417 | POST_IO |
| 9418 | RET(32) |
| 9419 | } |
| 9420 | |
| 9421 | // MOVEL |
| 9422 | OPCODE(0x21F0) |
| 9423 | { |
| 9424 | u32 adr, res; |
| 9425 | u32 src, dst; |
| 9426 | |
| 9427 | adr = AREG((Opcode >> 0) & 7); |
| 9428 | DECODE_EXT_WORD |
| 9429 | PRE_IO |
| 9430 | READ_LONG_F(adr, res) |
| 9431 | flag_C = 0; |
| 9432 | flag_V = 0; |
| 9433 | flag_NotZ = res; |
| 9434 | flag_N = res >> 24; |
| 9435 | FETCH_SWORD(adr); |
| 9436 | WRITE_LONG_F(adr, res) |
| 9437 | POST_IO |
| 9438 | RET(30) |
| 9439 | } |
| 9440 | |
| 9441 | // MOVEL |
| 9442 | OPCODE(0x23F0) |
| 9443 | { |
| 9444 | u32 adr, res; |
| 9445 | u32 src, dst; |
| 9446 | |
| 9447 | adr = AREG((Opcode >> 0) & 7); |
| 9448 | DECODE_EXT_WORD |
| 9449 | PRE_IO |
| 9450 | READ_LONG_F(adr, res) |
| 9451 | flag_C = 0; |
| 9452 | flag_V = 0; |
| 9453 | flag_NotZ = res; |
| 9454 | flag_N = res >> 24; |
| 9455 | FETCH_LONG(adr); |
| 9456 | WRITE_LONG_F(adr, res) |
| 9457 | POST_IO |
| 9458 | RET(34) |
| 9459 | } |
| 9460 | |
| 9461 | // MOVEL |
| 9462 | OPCODE(0x2EF0) |
| 9463 | { |
| 9464 | u32 adr, res; |
| 9465 | u32 src, dst; |
| 9466 | |
| 9467 | adr = AREG((Opcode >> 0) & 7); |
| 9468 | DECODE_EXT_WORD |
| 9469 | PRE_IO |
| 9470 | READ_LONG_F(adr, res) |
| 9471 | flag_C = 0; |
| 9472 | flag_V = 0; |
| 9473 | flag_NotZ = res; |
| 9474 | flag_N = res >> 24; |
| 9475 | adr = AREG(7); |
| 9476 | AREG(7) += 4; |
| 9477 | WRITE_LONG_F(adr, res) |
| 9478 | POST_IO |
| 9479 | RET(26) |
| 9480 | } |
| 9481 | |
| 9482 | // MOVEL |
| 9483 | OPCODE(0x2F30) |
| 9484 | { |
| 9485 | u32 adr, res; |
| 9486 | u32 src, dst; |
| 9487 | |
| 9488 | adr = AREG((Opcode >> 0) & 7); |
| 9489 | DECODE_EXT_WORD |
| 9490 | PRE_IO |
| 9491 | READ_LONG_F(adr, res) |
| 9492 | flag_C = 0; |
| 9493 | flag_V = 0; |
| 9494 | flag_NotZ = res; |
| 9495 | flag_N = res >> 24; |
| 9496 | adr = AREG(7) - 4; |
| 9497 | AREG(7) = adr; |
| 9498 | WRITE_LONG_DEC_F(adr, res) |
| 9499 | POST_IO |
| 9500 | RET(26) |
| 9501 | } |
| 9502 | |
| 9503 | // MOVEL |
| 9504 | OPCODE(0x2038) |
| 9505 | { |
| 9506 | u32 adr, res; |
| 9507 | u32 src, dst; |
| 9508 | |
| 9509 | FETCH_SWORD(adr); |
| 9510 | PRE_IO |
| 9511 | READ_LONG_F(adr, res) |
| 9512 | flag_C = 0; |
| 9513 | flag_V = 0; |
| 9514 | flag_NotZ = res; |
| 9515 | flag_N = res >> 24; |
| 9516 | DREGu32((Opcode >> 9) & 7) = res; |
| 9517 | POST_IO |
| 9518 | RET(16) |
| 9519 | } |
| 9520 | |
| 9521 | // MOVEL |
| 9522 | OPCODE(0x20B8) |
| 9523 | { |
| 9524 | u32 adr, res; |
| 9525 | u32 src, dst; |
| 9526 | |
| 9527 | FETCH_SWORD(adr); |
| 9528 | PRE_IO |
| 9529 | READ_LONG_F(adr, res) |
| 9530 | flag_C = 0; |
| 9531 | flag_V = 0; |
| 9532 | flag_NotZ = res; |
| 9533 | flag_N = res >> 24; |
| 9534 | adr = AREG((Opcode >> 9) & 7); |
| 9535 | WRITE_LONG_F(adr, res) |
| 9536 | POST_IO |
| 9537 | RET(24) |
| 9538 | } |
| 9539 | |
| 9540 | // MOVEL |
| 9541 | OPCODE(0x20F8) |
| 9542 | { |
| 9543 | u32 adr, res; |
| 9544 | u32 src, dst; |
| 9545 | |
| 9546 | FETCH_SWORD(adr); |
| 9547 | PRE_IO |
| 9548 | READ_LONG_F(adr, res) |
| 9549 | flag_C = 0; |
| 9550 | flag_V = 0; |
| 9551 | flag_NotZ = res; |
| 9552 | flag_N = res >> 24; |
| 9553 | adr = AREG((Opcode >> 9) & 7); |
| 9554 | AREG((Opcode >> 9) & 7) += 4; |
| 9555 | WRITE_LONG_F(adr, res) |
| 9556 | POST_IO |
| 9557 | RET(24) |
| 9558 | } |
| 9559 | |
| 9560 | // MOVEL |
| 9561 | OPCODE(0x2138) |
| 9562 | { |
| 9563 | u32 adr, res; |
| 9564 | u32 src, dst; |
| 9565 | |
| 9566 | FETCH_SWORD(adr); |
| 9567 | PRE_IO |
| 9568 | READ_LONG_F(adr, res) |
| 9569 | flag_C = 0; |
| 9570 | flag_V = 0; |
| 9571 | flag_NotZ = res; |
| 9572 | flag_N = res >> 24; |
| 9573 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 9574 | AREG((Opcode >> 9) & 7) = adr; |
| 9575 | WRITE_LONG_DEC_F(adr, res) |
| 9576 | POST_IO |
| 9577 | RET(24) |
| 9578 | } |
| 9579 | |
| 9580 | // MOVEL |
| 9581 | OPCODE(0x2178) |
| 9582 | { |
| 9583 | u32 adr, res; |
| 9584 | u32 src, dst; |
| 9585 | |
| 9586 | FETCH_SWORD(adr); |
| 9587 | PRE_IO |
| 9588 | READ_LONG_F(adr, res) |
| 9589 | flag_C = 0; |
| 9590 | flag_V = 0; |
| 9591 | flag_NotZ = res; |
| 9592 | flag_N = res >> 24; |
| 9593 | FETCH_SWORD(adr); |
| 9594 | adr += AREG((Opcode >> 9) & 7); |
| 9595 | WRITE_LONG_F(adr, res) |
| 9596 | POST_IO |
| 9597 | RET(28) |
| 9598 | } |
| 9599 | |
| 9600 | // MOVEL |
| 9601 | OPCODE(0x21B8) |
| 9602 | { |
| 9603 | u32 adr, res; |
| 9604 | u32 src, dst; |
| 9605 | |
| 9606 | FETCH_SWORD(adr); |
| 9607 | PRE_IO |
| 9608 | READ_LONG_F(adr, res) |
| 9609 | flag_C = 0; |
| 9610 | flag_V = 0; |
| 9611 | flag_NotZ = res; |
| 9612 | flag_N = res >> 24; |
| 9613 | adr = AREG((Opcode >> 9) & 7); |
| 9614 | DECODE_EXT_WORD |
| 9615 | WRITE_LONG_F(adr, res) |
| 9616 | POST_IO |
| 9617 | RET(30) |
| 9618 | } |
| 9619 | |
| 9620 | // MOVEL |
| 9621 | OPCODE(0x21F8) |
| 9622 | { |
| 9623 | u32 adr, res; |
| 9624 | u32 src, dst; |
| 9625 | |
| 9626 | FETCH_SWORD(adr); |
| 9627 | PRE_IO |
| 9628 | READ_LONG_F(adr, res) |
| 9629 | flag_C = 0; |
| 9630 | flag_V = 0; |
| 9631 | flag_NotZ = res; |
| 9632 | flag_N = res >> 24; |
| 9633 | FETCH_SWORD(adr); |
| 9634 | WRITE_LONG_F(adr, res) |
| 9635 | POST_IO |
| 9636 | RET(28) |
| 9637 | } |
| 9638 | |
| 9639 | // MOVEL |
| 9640 | OPCODE(0x23F8) |
| 9641 | { |
| 9642 | u32 adr, res; |
| 9643 | u32 src, dst; |
| 9644 | |
| 9645 | FETCH_SWORD(adr); |
| 9646 | PRE_IO |
| 9647 | READ_LONG_F(adr, res) |
| 9648 | flag_C = 0; |
| 9649 | flag_V = 0; |
| 9650 | flag_NotZ = res; |
| 9651 | flag_N = res >> 24; |
| 9652 | FETCH_LONG(adr); |
| 9653 | WRITE_LONG_F(adr, res) |
| 9654 | POST_IO |
| 9655 | RET(32) |
| 9656 | } |
| 9657 | |
| 9658 | // MOVEL |
| 9659 | OPCODE(0x2EF8) |
| 9660 | { |
| 9661 | u32 adr, res; |
| 9662 | u32 src, dst; |
| 9663 | |
| 9664 | FETCH_SWORD(adr); |
| 9665 | PRE_IO |
| 9666 | READ_LONG_F(adr, res) |
| 9667 | flag_C = 0; |
| 9668 | flag_V = 0; |
| 9669 | flag_NotZ = res; |
| 9670 | flag_N = res >> 24; |
| 9671 | adr = AREG(7); |
| 9672 | AREG(7) += 4; |
| 9673 | WRITE_LONG_F(adr, res) |
| 9674 | POST_IO |
| 9675 | RET(24) |
| 9676 | } |
| 9677 | |
| 9678 | // MOVEL |
| 9679 | OPCODE(0x2F38) |
| 9680 | { |
| 9681 | u32 adr, res; |
| 9682 | u32 src, dst; |
| 9683 | |
| 9684 | FETCH_SWORD(adr); |
| 9685 | PRE_IO |
| 9686 | READ_LONG_F(adr, res) |
| 9687 | flag_C = 0; |
| 9688 | flag_V = 0; |
| 9689 | flag_NotZ = res; |
| 9690 | flag_N = res >> 24; |
| 9691 | adr = AREG(7) - 4; |
| 9692 | AREG(7) = adr; |
| 9693 | WRITE_LONG_DEC_F(adr, res) |
| 9694 | POST_IO |
| 9695 | RET(24) |
| 9696 | } |
| 9697 | |
| 9698 | // MOVEL |
| 9699 | OPCODE(0x2039) |
| 9700 | { |
| 9701 | u32 adr, res; |
| 9702 | u32 src, dst; |
| 9703 | |
| 9704 | FETCH_LONG(adr); |
| 9705 | PRE_IO |
| 9706 | READ_LONG_F(adr, res) |
| 9707 | flag_C = 0; |
| 9708 | flag_V = 0; |
| 9709 | flag_NotZ = res; |
| 9710 | flag_N = res >> 24; |
| 9711 | DREGu32((Opcode >> 9) & 7) = res; |
| 9712 | POST_IO |
| 9713 | RET(20) |
| 9714 | } |
| 9715 | |
| 9716 | // MOVEL |
| 9717 | OPCODE(0x20B9) |
| 9718 | { |
| 9719 | u32 adr, res; |
| 9720 | u32 src, dst; |
| 9721 | |
| 9722 | FETCH_LONG(adr); |
| 9723 | PRE_IO |
| 9724 | READ_LONG_F(adr, res) |
| 9725 | flag_C = 0; |
| 9726 | flag_V = 0; |
| 9727 | flag_NotZ = res; |
| 9728 | flag_N = res >> 24; |
| 9729 | adr = AREG((Opcode >> 9) & 7); |
| 9730 | WRITE_LONG_F(adr, res) |
| 9731 | POST_IO |
| 9732 | RET(28) |
| 9733 | } |
| 9734 | |
| 9735 | // MOVEL |
| 9736 | OPCODE(0x20F9) |
| 9737 | { |
| 9738 | u32 adr, res; |
| 9739 | u32 src, dst; |
| 9740 | |
| 9741 | FETCH_LONG(adr); |
| 9742 | PRE_IO |
| 9743 | READ_LONG_F(adr, res) |
| 9744 | flag_C = 0; |
| 9745 | flag_V = 0; |
| 9746 | flag_NotZ = res; |
| 9747 | flag_N = res >> 24; |
| 9748 | adr = AREG((Opcode >> 9) & 7); |
| 9749 | AREG((Opcode >> 9) & 7) += 4; |
| 9750 | WRITE_LONG_F(adr, res) |
| 9751 | POST_IO |
| 9752 | RET(28) |
| 9753 | } |
| 9754 | |
| 9755 | // MOVEL |
| 9756 | OPCODE(0x2139) |
| 9757 | { |
| 9758 | u32 adr, res; |
| 9759 | u32 src, dst; |
| 9760 | |
| 9761 | FETCH_LONG(adr); |
| 9762 | PRE_IO |
| 9763 | READ_LONG_F(adr, res) |
| 9764 | flag_C = 0; |
| 9765 | flag_V = 0; |
| 9766 | flag_NotZ = res; |
| 9767 | flag_N = res >> 24; |
| 9768 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 9769 | AREG((Opcode >> 9) & 7) = adr; |
| 9770 | WRITE_LONG_DEC_F(adr, res) |
| 9771 | POST_IO |
| 9772 | RET(28) |
| 9773 | } |
| 9774 | |
| 9775 | // MOVEL |
| 9776 | OPCODE(0x2179) |
| 9777 | { |
| 9778 | u32 adr, res; |
| 9779 | u32 src, dst; |
| 9780 | |
| 9781 | FETCH_LONG(adr); |
| 9782 | PRE_IO |
| 9783 | READ_LONG_F(adr, res) |
| 9784 | flag_C = 0; |
| 9785 | flag_V = 0; |
| 9786 | flag_NotZ = res; |
| 9787 | flag_N = res >> 24; |
| 9788 | FETCH_SWORD(adr); |
| 9789 | adr += AREG((Opcode >> 9) & 7); |
| 9790 | WRITE_LONG_F(adr, res) |
| 9791 | POST_IO |
| 9792 | RET(32) |
| 9793 | } |
| 9794 | |
| 9795 | // MOVEL |
| 9796 | OPCODE(0x21B9) |
| 9797 | { |
| 9798 | u32 adr, res; |
| 9799 | u32 src, dst; |
| 9800 | |
| 9801 | FETCH_LONG(adr); |
| 9802 | PRE_IO |
| 9803 | READ_LONG_F(adr, res) |
| 9804 | flag_C = 0; |
| 9805 | flag_V = 0; |
| 9806 | flag_NotZ = res; |
| 9807 | flag_N = res >> 24; |
| 9808 | adr = AREG((Opcode >> 9) & 7); |
| 9809 | DECODE_EXT_WORD |
| 9810 | WRITE_LONG_F(adr, res) |
| 9811 | POST_IO |
| 9812 | RET(34) |
| 9813 | } |
| 9814 | |
| 9815 | // MOVEL |
| 9816 | OPCODE(0x21F9) |
| 9817 | { |
| 9818 | u32 adr, res; |
| 9819 | u32 src, dst; |
| 9820 | |
| 9821 | FETCH_LONG(adr); |
| 9822 | PRE_IO |
| 9823 | READ_LONG_F(adr, res) |
| 9824 | flag_C = 0; |
| 9825 | flag_V = 0; |
| 9826 | flag_NotZ = res; |
| 9827 | flag_N = res >> 24; |
| 9828 | FETCH_SWORD(adr); |
| 9829 | WRITE_LONG_F(adr, res) |
| 9830 | POST_IO |
| 9831 | RET(32) |
| 9832 | } |
| 9833 | |
| 9834 | // MOVEL |
| 9835 | OPCODE(0x23F9) |
| 9836 | { |
| 9837 | u32 adr, res; |
| 9838 | u32 src, dst; |
| 9839 | |
| 9840 | FETCH_LONG(adr); |
| 9841 | PRE_IO |
| 9842 | READ_LONG_F(adr, res) |
| 9843 | flag_C = 0; |
| 9844 | flag_V = 0; |
| 9845 | flag_NotZ = res; |
| 9846 | flag_N = res >> 24; |
| 9847 | FETCH_LONG(adr); |
| 9848 | WRITE_LONG_F(adr, res) |
| 9849 | POST_IO |
| 9850 | RET(36) |
| 9851 | } |
| 9852 | |
| 9853 | // MOVEL |
| 9854 | OPCODE(0x2EF9) |
| 9855 | { |
| 9856 | u32 adr, res; |
| 9857 | u32 src, dst; |
| 9858 | |
| 9859 | FETCH_LONG(adr); |
| 9860 | PRE_IO |
| 9861 | READ_LONG_F(adr, res) |
| 9862 | flag_C = 0; |
| 9863 | flag_V = 0; |
| 9864 | flag_NotZ = res; |
| 9865 | flag_N = res >> 24; |
| 9866 | adr = AREG(7); |
| 9867 | AREG(7) += 4; |
| 9868 | WRITE_LONG_F(adr, res) |
| 9869 | POST_IO |
| 9870 | RET(28) |
| 9871 | } |
| 9872 | |
| 9873 | // MOVEL |
| 9874 | OPCODE(0x2F39) |
| 9875 | { |
| 9876 | u32 adr, res; |
| 9877 | u32 src, dst; |
| 9878 | |
| 9879 | FETCH_LONG(adr); |
| 9880 | PRE_IO |
| 9881 | READ_LONG_F(adr, res) |
| 9882 | flag_C = 0; |
| 9883 | flag_V = 0; |
| 9884 | flag_NotZ = res; |
| 9885 | flag_N = res >> 24; |
| 9886 | adr = AREG(7) - 4; |
| 9887 | AREG(7) = adr; |
| 9888 | WRITE_LONG_DEC_F(adr, res) |
| 9889 | POST_IO |
| 9890 | RET(28) |
| 9891 | } |
| 9892 | |
| 9893 | // MOVEL |
| 9894 | OPCODE(0x203A) |
| 9895 | { |
| 9896 | u32 adr, res; |
| 9897 | u32 src, dst; |
| 9898 | |
| 9899 | adr = GET_SWORD + GET_PC; |
| 9900 | PC++; |
| 9901 | PRE_IO |
| 9902 | READ_LONG_F(adr, res) |
| 9903 | flag_C = 0; |
| 9904 | flag_V = 0; |
| 9905 | flag_NotZ = res; |
| 9906 | flag_N = res >> 24; |
| 9907 | DREGu32((Opcode >> 9) & 7) = res; |
| 9908 | POST_IO |
| 9909 | RET(16) |
| 9910 | } |
| 9911 | |
| 9912 | // MOVEL |
| 9913 | OPCODE(0x20BA) |
| 9914 | { |
| 9915 | u32 adr, res; |
| 9916 | u32 src, dst; |
| 9917 | |
| 9918 | adr = GET_SWORD + GET_PC; |
| 9919 | PC++; |
| 9920 | PRE_IO |
| 9921 | READ_LONG_F(adr, res) |
| 9922 | flag_C = 0; |
| 9923 | flag_V = 0; |
| 9924 | flag_NotZ = res; |
| 9925 | flag_N = res >> 24; |
| 9926 | adr = AREG((Opcode >> 9) & 7); |
| 9927 | WRITE_LONG_F(adr, res) |
| 9928 | POST_IO |
| 9929 | RET(24) |
| 9930 | } |
| 9931 | |
| 9932 | // MOVEL |
| 9933 | OPCODE(0x20FA) |
| 9934 | { |
| 9935 | u32 adr, res; |
| 9936 | u32 src, dst; |
| 9937 | |
| 9938 | adr = GET_SWORD + GET_PC; |
| 9939 | PC++; |
| 9940 | PRE_IO |
| 9941 | READ_LONG_F(adr, res) |
| 9942 | flag_C = 0; |
| 9943 | flag_V = 0; |
| 9944 | flag_NotZ = res; |
| 9945 | flag_N = res >> 24; |
| 9946 | adr = AREG((Opcode >> 9) & 7); |
| 9947 | AREG((Opcode >> 9) & 7) += 4; |
| 9948 | WRITE_LONG_F(adr, res) |
| 9949 | POST_IO |
| 9950 | RET(24) |
| 9951 | } |
| 9952 | |
| 9953 | // MOVEL |
| 9954 | OPCODE(0x213A) |
| 9955 | { |
| 9956 | u32 adr, res; |
| 9957 | u32 src, dst; |
| 9958 | |
| 9959 | adr = GET_SWORD + GET_PC; |
| 9960 | PC++; |
| 9961 | PRE_IO |
| 9962 | READ_LONG_F(adr, res) |
| 9963 | flag_C = 0; |
| 9964 | flag_V = 0; |
| 9965 | flag_NotZ = res; |
| 9966 | flag_N = res >> 24; |
| 9967 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 9968 | AREG((Opcode >> 9) & 7) = adr; |
| 9969 | WRITE_LONG_DEC_F(adr, res) |
| 9970 | POST_IO |
| 9971 | RET(24) |
| 9972 | } |
| 9973 | |
| 9974 | // MOVEL |
| 9975 | OPCODE(0x217A) |
| 9976 | { |
| 9977 | u32 adr, res; |
| 9978 | u32 src, dst; |
| 9979 | |
| 9980 | adr = GET_SWORD + GET_PC; |
| 9981 | PC++; |
| 9982 | PRE_IO |
| 9983 | READ_LONG_F(adr, res) |
| 9984 | flag_C = 0; |
| 9985 | flag_V = 0; |
| 9986 | flag_NotZ = res; |
| 9987 | flag_N = res >> 24; |
| 9988 | FETCH_SWORD(adr); |
| 9989 | adr += AREG((Opcode >> 9) & 7); |
| 9990 | WRITE_LONG_F(adr, res) |
| 9991 | POST_IO |
| 9992 | RET(28) |
| 9993 | } |
| 9994 | |
| 9995 | // MOVEL |
| 9996 | OPCODE(0x21BA) |
| 9997 | { |
| 9998 | u32 adr, res; |
| 9999 | u32 src, dst; |
| 10000 | |
| 10001 | adr = GET_SWORD + GET_PC; |
| 10002 | PC++; |
| 10003 | PRE_IO |
| 10004 | READ_LONG_F(adr, res) |
| 10005 | flag_C = 0; |
| 10006 | flag_V = 0; |
| 10007 | flag_NotZ = res; |
| 10008 | flag_N = res >> 24; |
| 10009 | adr = AREG((Opcode >> 9) & 7); |
| 10010 | DECODE_EXT_WORD |
| 10011 | WRITE_LONG_F(adr, res) |
| 10012 | POST_IO |
| 10013 | RET(30) |
| 10014 | } |
| 10015 | |
| 10016 | // MOVEL |
| 10017 | OPCODE(0x21FA) |
| 10018 | { |
| 10019 | u32 adr, res; |
| 10020 | u32 src, dst; |
| 10021 | |
| 10022 | adr = GET_SWORD + GET_PC; |
| 10023 | PC++; |
| 10024 | PRE_IO |
| 10025 | READ_LONG_F(adr, res) |
| 10026 | flag_C = 0; |
| 10027 | flag_V = 0; |
| 10028 | flag_NotZ = res; |
| 10029 | flag_N = res >> 24; |
| 10030 | FETCH_SWORD(adr); |
| 10031 | WRITE_LONG_F(adr, res) |
| 10032 | POST_IO |
| 10033 | RET(28) |
| 10034 | } |
| 10035 | |
| 10036 | // MOVEL |
| 10037 | OPCODE(0x23FA) |
| 10038 | { |
| 10039 | u32 adr, res; |
| 10040 | u32 src, dst; |
| 10041 | |
| 10042 | adr = GET_SWORD + GET_PC; |
| 10043 | PC++; |
| 10044 | PRE_IO |
| 10045 | READ_LONG_F(adr, res) |
| 10046 | flag_C = 0; |
| 10047 | flag_V = 0; |
| 10048 | flag_NotZ = res; |
| 10049 | flag_N = res >> 24; |
| 10050 | FETCH_LONG(adr); |
| 10051 | WRITE_LONG_F(adr, res) |
| 10052 | POST_IO |
| 10053 | RET(32) |
| 10054 | } |
| 10055 | |
| 10056 | // MOVEL |
| 10057 | OPCODE(0x2EFA) |
| 10058 | { |
| 10059 | u32 adr, res; |
| 10060 | u32 src, dst; |
| 10061 | |
| 10062 | adr = GET_SWORD + GET_PC; |
| 10063 | PC++; |
| 10064 | PRE_IO |
| 10065 | READ_LONG_F(adr, res) |
| 10066 | flag_C = 0; |
| 10067 | flag_V = 0; |
| 10068 | flag_NotZ = res; |
| 10069 | flag_N = res >> 24; |
| 10070 | adr = AREG(7); |
| 10071 | AREG(7) += 4; |
| 10072 | WRITE_LONG_F(adr, res) |
| 10073 | POST_IO |
| 10074 | RET(24) |
| 10075 | } |
| 10076 | |
| 10077 | // MOVEL |
| 10078 | OPCODE(0x2F3A) |
| 10079 | { |
| 10080 | u32 adr, res; |
| 10081 | u32 src, dst; |
| 10082 | |
| 10083 | adr = GET_SWORD + GET_PC; |
| 10084 | PC++; |
| 10085 | PRE_IO |
| 10086 | READ_LONG_F(adr, res) |
| 10087 | flag_C = 0; |
| 10088 | flag_V = 0; |
| 10089 | flag_NotZ = res; |
| 10090 | flag_N = res >> 24; |
| 10091 | adr = AREG(7) - 4; |
| 10092 | AREG(7) = adr; |
| 10093 | WRITE_LONG_DEC_F(adr, res) |
| 10094 | POST_IO |
| 10095 | RET(24) |
| 10096 | } |
| 10097 | |
| 10098 | // MOVEL |
| 10099 | OPCODE(0x203B) |
| 10100 | { |
| 10101 | u32 adr, res; |
| 10102 | u32 src, dst; |
| 10103 | |
| 10104 | adr = GET_PC; |
| 10105 | DECODE_EXT_WORD |
| 10106 | PRE_IO |
| 10107 | READ_LONG_F(adr, res) |
| 10108 | flag_C = 0; |
| 10109 | flag_V = 0; |
| 10110 | flag_NotZ = res; |
| 10111 | flag_N = res >> 24; |
| 10112 | DREGu32((Opcode >> 9) & 7) = res; |
| 10113 | POST_IO |
| 10114 | RET(18) |
| 10115 | } |
| 10116 | |
| 10117 | // MOVEL |
| 10118 | OPCODE(0x20BB) |
| 10119 | { |
| 10120 | u32 adr, res; |
| 10121 | u32 src, dst; |
| 10122 | |
| 10123 | adr = GET_PC; |
| 10124 | DECODE_EXT_WORD |
| 10125 | PRE_IO |
| 10126 | READ_LONG_F(adr, res) |
| 10127 | flag_C = 0; |
| 10128 | flag_V = 0; |
| 10129 | flag_NotZ = res; |
| 10130 | flag_N = res >> 24; |
| 10131 | adr = AREG((Opcode >> 9) & 7); |
| 10132 | WRITE_LONG_F(adr, res) |
| 10133 | POST_IO |
| 10134 | RET(26) |
| 10135 | } |
| 10136 | |
| 10137 | // MOVEL |
| 10138 | OPCODE(0x20FB) |
| 10139 | { |
| 10140 | u32 adr, res; |
| 10141 | u32 src, dst; |
| 10142 | |
| 10143 | adr = GET_PC; |
| 10144 | DECODE_EXT_WORD |
| 10145 | PRE_IO |
| 10146 | READ_LONG_F(adr, res) |
| 10147 | flag_C = 0; |
| 10148 | flag_V = 0; |
| 10149 | flag_NotZ = res; |
| 10150 | flag_N = res >> 24; |
| 10151 | adr = AREG((Opcode >> 9) & 7); |
| 10152 | AREG((Opcode >> 9) & 7) += 4; |
| 10153 | WRITE_LONG_F(adr, res) |
| 10154 | POST_IO |
| 10155 | RET(26) |
| 10156 | } |
| 10157 | |
| 10158 | // MOVEL |
| 10159 | OPCODE(0x213B) |
| 10160 | { |
| 10161 | u32 adr, res; |
| 10162 | u32 src, dst; |
| 10163 | |
| 10164 | adr = GET_PC; |
| 10165 | DECODE_EXT_WORD |
| 10166 | PRE_IO |
| 10167 | READ_LONG_F(adr, res) |
| 10168 | flag_C = 0; |
| 10169 | flag_V = 0; |
| 10170 | flag_NotZ = res; |
| 10171 | flag_N = res >> 24; |
| 10172 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 10173 | AREG((Opcode >> 9) & 7) = adr; |
| 10174 | WRITE_LONG_DEC_F(adr, res) |
| 10175 | POST_IO |
| 10176 | RET(26) |
| 10177 | } |
| 10178 | |
| 10179 | // MOVEL |
| 10180 | OPCODE(0x217B) |
| 10181 | { |
| 10182 | u32 adr, res; |
| 10183 | u32 src, dst; |
| 10184 | |
| 10185 | adr = GET_PC; |
| 10186 | DECODE_EXT_WORD |
| 10187 | PRE_IO |
| 10188 | READ_LONG_F(adr, res) |
| 10189 | flag_C = 0; |
| 10190 | flag_V = 0; |
| 10191 | flag_NotZ = res; |
| 10192 | flag_N = res >> 24; |
| 10193 | FETCH_SWORD(adr); |
| 10194 | adr += AREG((Opcode >> 9) & 7); |
| 10195 | WRITE_LONG_F(adr, res) |
| 10196 | POST_IO |
| 10197 | RET(30) |
| 10198 | } |
| 10199 | |
| 10200 | // MOVEL |
| 10201 | OPCODE(0x21BB) |
| 10202 | { |
| 10203 | u32 adr, res; |
| 10204 | u32 src, dst; |
| 10205 | |
| 10206 | adr = GET_PC; |
| 10207 | DECODE_EXT_WORD |
| 10208 | PRE_IO |
| 10209 | READ_LONG_F(adr, res) |
| 10210 | flag_C = 0; |
| 10211 | flag_V = 0; |
| 10212 | flag_NotZ = res; |
| 10213 | flag_N = res >> 24; |
| 10214 | adr = AREG((Opcode >> 9) & 7); |
| 10215 | DECODE_EXT_WORD |
| 10216 | WRITE_LONG_F(adr, res) |
| 10217 | POST_IO |
| 10218 | RET(32) |
| 10219 | } |
| 10220 | |
| 10221 | // MOVEL |
| 10222 | OPCODE(0x21FB) |
| 10223 | { |
| 10224 | u32 adr, res; |
| 10225 | u32 src, dst; |
| 10226 | |
| 10227 | adr = GET_PC; |
| 10228 | DECODE_EXT_WORD |
| 10229 | PRE_IO |
| 10230 | READ_LONG_F(adr, res) |
| 10231 | flag_C = 0; |
| 10232 | flag_V = 0; |
| 10233 | flag_NotZ = res; |
| 10234 | flag_N = res >> 24; |
| 10235 | FETCH_SWORD(adr); |
| 10236 | WRITE_LONG_F(adr, res) |
| 10237 | POST_IO |
| 10238 | RET(30) |
| 10239 | } |
| 10240 | |
| 10241 | // MOVEL |
| 10242 | OPCODE(0x23FB) |
| 10243 | { |
| 10244 | u32 adr, res; |
| 10245 | u32 src, dst; |
| 10246 | |
| 10247 | adr = GET_PC; |
| 10248 | DECODE_EXT_WORD |
| 10249 | PRE_IO |
| 10250 | READ_LONG_F(adr, res) |
| 10251 | flag_C = 0; |
| 10252 | flag_V = 0; |
| 10253 | flag_NotZ = res; |
| 10254 | flag_N = res >> 24; |
| 10255 | FETCH_LONG(adr); |
| 10256 | WRITE_LONG_F(adr, res) |
| 10257 | POST_IO |
| 10258 | RET(34) |
| 10259 | } |
| 10260 | |
| 10261 | // MOVEL |
| 10262 | OPCODE(0x2EFB) |
| 10263 | { |
| 10264 | u32 adr, res; |
| 10265 | u32 src, dst; |
| 10266 | |
| 10267 | adr = GET_PC; |
| 10268 | DECODE_EXT_WORD |
| 10269 | PRE_IO |
| 10270 | READ_LONG_F(adr, res) |
| 10271 | flag_C = 0; |
| 10272 | flag_V = 0; |
| 10273 | flag_NotZ = res; |
| 10274 | flag_N = res >> 24; |
| 10275 | adr = AREG(7); |
| 10276 | AREG(7) += 4; |
| 10277 | WRITE_LONG_F(adr, res) |
| 10278 | POST_IO |
| 10279 | RET(26) |
| 10280 | } |
| 10281 | |
| 10282 | // MOVEL |
| 10283 | OPCODE(0x2F3B) |
| 10284 | { |
| 10285 | u32 adr, res; |
| 10286 | u32 src, dst; |
| 10287 | |
| 10288 | adr = GET_PC; |
| 10289 | DECODE_EXT_WORD |
| 10290 | PRE_IO |
| 10291 | READ_LONG_F(adr, res) |
| 10292 | flag_C = 0; |
| 10293 | flag_V = 0; |
| 10294 | flag_NotZ = res; |
| 10295 | flag_N = res >> 24; |
| 10296 | adr = AREG(7) - 4; |
| 10297 | AREG(7) = adr; |
| 10298 | WRITE_LONG_DEC_F(adr, res) |
| 10299 | POST_IO |
| 10300 | RET(26) |
| 10301 | } |
| 10302 | |
| 10303 | // MOVEL |
| 10304 | OPCODE(0x203C) |
| 10305 | { |
| 10306 | u32 adr, res; |
| 10307 | u32 src, dst; |
| 10308 | |
| 10309 | FETCH_LONG(res); |
| 10310 | flag_C = 0; |
| 10311 | flag_V = 0; |
| 10312 | flag_NotZ = res; |
| 10313 | flag_N = res >> 24; |
| 10314 | DREGu32((Opcode >> 9) & 7) = res; |
| 10315 | RET(12) |
| 10316 | } |
| 10317 | |
| 10318 | // MOVEL |
| 10319 | OPCODE(0x20BC) |
| 10320 | { |
| 10321 | u32 adr, res; |
| 10322 | u32 src, dst; |
| 10323 | |
| 10324 | FETCH_LONG(res); |
| 10325 | flag_C = 0; |
| 10326 | flag_V = 0; |
| 10327 | flag_NotZ = res; |
| 10328 | flag_N = res >> 24; |
| 10329 | adr = AREG((Opcode >> 9) & 7); |
| 10330 | PRE_IO |
| 10331 | WRITE_LONG_F(adr, res) |
| 10332 | POST_IO |
| 10333 | RET(20) |
| 10334 | } |
| 10335 | |
| 10336 | // MOVEL |
| 10337 | OPCODE(0x20FC) |
| 10338 | { |
| 10339 | u32 adr, res; |
| 10340 | u32 src, dst; |
| 10341 | |
| 10342 | FETCH_LONG(res); |
| 10343 | flag_C = 0; |
| 10344 | flag_V = 0; |
| 10345 | flag_NotZ = res; |
| 10346 | flag_N = res >> 24; |
| 10347 | adr = AREG((Opcode >> 9) & 7); |
| 10348 | AREG((Opcode >> 9) & 7) += 4; |
| 10349 | PRE_IO |
| 10350 | WRITE_LONG_F(adr, res) |
| 10351 | POST_IO |
| 10352 | RET(20) |
| 10353 | } |
| 10354 | |
| 10355 | // MOVEL |
| 10356 | OPCODE(0x213C) |
| 10357 | { |
| 10358 | u32 adr, res; |
| 10359 | u32 src, dst; |
| 10360 | |
| 10361 | FETCH_LONG(res); |
| 10362 | flag_C = 0; |
| 10363 | flag_V = 0; |
| 10364 | flag_NotZ = res; |
| 10365 | flag_N = res >> 24; |
| 10366 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 10367 | AREG((Opcode >> 9) & 7) = adr; |
| 10368 | PRE_IO |
| 10369 | WRITE_LONG_DEC_F(adr, res) |
| 10370 | POST_IO |
| 10371 | RET(20) |
| 10372 | } |
| 10373 | |
| 10374 | // MOVEL |
| 10375 | OPCODE(0x217C) |
| 10376 | { |
| 10377 | u32 adr, res; |
| 10378 | u32 src, dst; |
| 10379 | |
| 10380 | FETCH_LONG(res); |
| 10381 | flag_C = 0; |
| 10382 | flag_V = 0; |
| 10383 | flag_NotZ = res; |
| 10384 | flag_N = res >> 24; |
| 10385 | FETCH_SWORD(adr); |
| 10386 | adr += AREG((Opcode >> 9) & 7); |
| 10387 | PRE_IO |
| 10388 | WRITE_LONG_F(adr, res) |
| 10389 | POST_IO |
| 10390 | RET(24) |
| 10391 | } |
| 10392 | |
| 10393 | // MOVEL |
| 10394 | OPCODE(0x21BC) |
| 10395 | { |
| 10396 | u32 adr, res; |
| 10397 | u32 src, dst; |
| 10398 | |
| 10399 | FETCH_LONG(res); |
| 10400 | flag_C = 0; |
| 10401 | flag_V = 0; |
| 10402 | flag_NotZ = res; |
| 10403 | flag_N = res >> 24; |
| 10404 | adr = AREG((Opcode >> 9) & 7); |
| 10405 | DECODE_EXT_WORD |
| 10406 | PRE_IO |
| 10407 | WRITE_LONG_F(adr, res) |
| 10408 | POST_IO |
| 10409 | RET(26) |
| 10410 | } |
| 10411 | |
| 10412 | // MOVEL |
| 10413 | OPCODE(0x21FC) |
| 10414 | { |
| 10415 | u32 adr, res; |
| 10416 | u32 src, dst; |
| 10417 | |
| 10418 | FETCH_LONG(res); |
| 10419 | flag_C = 0; |
| 10420 | flag_V = 0; |
| 10421 | flag_NotZ = res; |
| 10422 | flag_N = res >> 24; |
| 10423 | FETCH_SWORD(adr); |
| 10424 | PRE_IO |
| 10425 | WRITE_LONG_F(adr, res) |
| 10426 | POST_IO |
| 10427 | RET(24) |
| 10428 | } |
| 10429 | |
| 10430 | // MOVEL |
| 10431 | OPCODE(0x23FC) |
| 10432 | { |
| 10433 | u32 adr, res; |
| 10434 | u32 src, dst; |
| 10435 | |
| 10436 | FETCH_LONG(res); |
| 10437 | flag_C = 0; |
| 10438 | flag_V = 0; |
| 10439 | flag_NotZ = res; |
| 10440 | flag_N = res >> 24; |
| 10441 | FETCH_LONG(adr); |
| 10442 | PRE_IO |
| 10443 | WRITE_LONG_F(adr, res) |
| 10444 | POST_IO |
| 10445 | RET(28) |
| 10446 | } |
| 10447 | |
| 10448 | // MOVEL |
| 10449 | OPCODE(0x2EFC) |
| 10450 | { |
| 10451 | u32 adr, res; |
| 10452 | u32 src, dst; |
| 10453 | |
| 10454 | FETCH_LONG(res); |
| 10455 | flag_C = 0; |
| 10456 | flag_V = 0; |
| 10457 | flag_NotZ = res; |
| 10458 | flag_N = res >> 24; |
| 10459 | adr = AREG(7); |
| 10460 | AREG(7) += 4; |
| 10461 | PRE_IO |
| 10462 | WRITE_LONG_F(adr, res) |
| 10463 | POST_IO |
| 10464 | RET(20) |
| 10465 | } |
| 10466 | |
| 10467 | // MOVEL |
| 10468 | OPCODE(0x2F3C) |
| 10469 | { |
| 10470 | u32 adr, res; |
| 10471 | u32 src, dst; |
| 10472 | |
| 10473 | FETCH_LONG(res); |
| 10474 | flag_C = 0; |
| 10475 | flag_V = 0; |
| 10476 | flag_NotZ = res; |
| 10477 | flag_N = res >> 24; |
| 10478 | adr = AREG(7) - 4; |
| 10479 | AREG(7) = adr; |
| 10480 | PRE_IO |
| 10481 | WRITE_LONG_DEC_F(adr, res) |
| 10482 | POST_IO |
| 10483 | RET(20) |
| 10484 | } |
| 10485 | |
| 10486 | // MOVEL |
| 10487 | OPCODE(0x201F) |
| 10488 | { |
| 10489 | u32 adr, res; |
| 10490 | u32 src, dst; |
| 10491 | |
| 10492 | adr = AREG(7); |
| 10493 | AREG(7) += 4; |
| 10494 | PRE_IO |
| 10495 | READ_LONG_F(adr, res) |
| 10496 | flag_C = 0; |
| 10497 | flag_V = 0; |
| 10498 | flag_NotZ = res; |
| 10499 | flag_N = res >> 24; |
| 10500 | DREGu32((Opcode >> 9) & 7) = res; |
| 10501 | POST_IO |
| 10502 | RET(12) |
| 10503 | } |
| 10504 | |
| 10505 | // MOVEL |
| 10506 | OPCODE(0x209F) |
| 10507 | { |
| 10508 | u32 adr, res; |
| 10509 | u32 src, dst; |
| 10510 | |
| 10511 | adr = AREG(7); |
| 10512 | AREG(7) += 4; |
| 10513 | PRE_IO |
| 10514 | READ_LONG_F(adr, res) |
| 10515 | flag_C = 0; |
| 10516 | flag_V = 0; |
| 10517 | flag_NotZ = res; |
| 10518 | flag_N = res >> 24; |
| 10519 | adr = AREG((Opcode >> 9) & 7); |
| 10520 | WRITE_LONG_F(adr, res) |
| 10521 | POST_IO |
| 10522 | RET(20) |
| 10523 | } |
| 10524 | |
| 10525 | // MOVEL |
| 10526 | OPCODE(0x20DF) |
| 10527 | { |
| 10528 | u32 adr, res; |
| 10529 | u32 src, dst; |
| 10530 | |
| 10531 | adr = AREG(7); |
| 10532 | AREG(7) += 4; |
| 10533 | PRE_IO |
| 10534 | READ_LONG_F(adr, res) |
| 10535 | flag_C = 0; |
| 10536 | flag_V = 0; |
| 10537 | flag_NotZ = res; |
| 10538 | flag_N = res >> 24; |
| 10539 | adr = AREG((Opcode >> 9) & 7); |
| 10540 | AREG((Opcode >> 9) & 7) += 4; |
| 10541 | WRITE_LONG_F(adr, res) |
| 10542 | POST_IO |
| 10543 | RET(20) |
| 10544 | } |
| 10545 | |
| 10546 | // MOVEL |
| 10547 | OPCODE(0x211F) |
| 10548 | { |
| 10549 | u32 adr, res; |
| 10550 | u32 src, dst; |
| 10551 | |
| 10552 | adr = AREG(7); |
| 10553 | AREG(7) += 4; |
| 10554 | PRE_IO |
| 10555 | READ_LONG_F(adr, res) |
| 10556 | flag_C = 0; |
| 10557 | flag_V = 0; |
| 10558 | flag_NotZ = res; |
| 10559 | flag_N = res >> 24; |
| 10560 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 10561 | AREG((Opcode >> 9) & 7) = adr; |
| 10562 | WRITE_LONG_DEC_F(adr, res) |
| 10563 | POST_IO |
| 10564 | RET(20) |
| 10565 | } |
| 10566 | |
| 10567 | // MOVEL |
| 10568 | OPCODE(0x215F) |
| 10569 | { |
| 10570 | u32 adr, res; |
| 10571 | u32 src, dst; |
| 10572 | |
| 10573 | adr = AREG(7); |
| 10574 | AREG(7) += 4; |
| 10575 | PRE_IO |
| 10576 | READ_LONG_F(adr, res) |
| 10577 | flag_C = 0; |
| 10578 | flag_V = 0; |
| 10579 | flag_NotZ = res; |
| 10580 | flag_N = res >> 24; |
| 10581 | FETCH_SWORD(adr); |
| 10582 | adr += AREG((Opcode >> 9) & 7); |
| 10583 | WRITE_LONG_F(adr, res) |
| 10584 | POST_IO |
| 10585 | RET(24) |
| 10586 | } |
| 10587 | |
| 10588 | // MOVEL |
| 10589 | OPCODE(0x219F) |
| 10590 | { |
| 10591 | u32 adr, res; |
| 10592 | u32 src, dst; |
| 10593 | |
| 10594 | adr = AREG(7); |
| 10595 | AREG(7) += 4; |
| 10596 | PRE_IO |
| 10597 | READ_LONG_F(adr, res) |
| 10598 | flag_C = 0; |
| 10599 | flag_V = 0; |
| 10600 | flag_NotZ = res; |
| 10601 | flag_N = res >> 24; |
| 10602 | adr = AREG((Opcode >> 9) & 7); |
| 10603 | DECODE_EXT_WORD |
| 10604 | WRITE_LONG_F(adr, res) |
| 10605 | POST_IO |
| 10606 | RET(26) |
| 10607 | } |
| 10608 | |
| 10609 | // MOVEL |
| 10610 | OPCODE(0x21DF) |
| 10611 | { |
| 10612 | u32 adr, res; |
| 10613 | u32 src, dst; |
| 10614 | |
| 10615 | adr = AREG(7); |
| 10616 | AREG(7) += 4; |
| 10617 | PRE_IO |
| 10618 | READ_LONG_F(adr, res) |
| 10619 | flag_C = 0; |
| 10620 | flag_V = 0; |
| 10621 | flag_NotZ = res; |
| 10622 | flag_N = res >> 24; |
| 10623 | FETCH_SWORD(adr); |
| 10624 | WRITE_LONG_F(adr, res) |
| 10625 | POST_IO |
| 10626 | RET(24) |
| 10627 | } |
| 10628 | |
| 10629 | // MOVEL |
| 10630 | OPCODE(0x23DF) |
| 10631 | { |
| 10632 | u32 adr, res; |
| 10633 | u32 src, dst; |
| 10634 | |
| 10635 | adr = AREG(7); |
| 10636 | AREG(7) += 4; |
| 10637 | PRE_IO |
| 10638 | READ_LONG_F(adr, res) |
| 10639 | flag_C = 0; |
| 10640 | flag_V = 0; |
| 10641 | flag_NotZ = res; |
| 10642 | flag_N = res >> 24; |
| 10643 | FETCH_LONG(adr); |
| 10644 | WRITE_LONG_F(adr, res) |
| 10645 | POST_IO |
| 10646 | RET(28) |
| 10647 | } |
| 10648 | |
| 10649 | // MOVEL |
| 10650 | OPCODE(0x2EDF) |
| 10651 | { |
| 10652 | u32 adr, res; |
| 10653 | u32 src, dst; |
| 10654 | |
| 10655 | adr = AREG(7); |
| 10656 | AREG(7) += 4; |
| 10657 | PRE_IO |
| 10658 | READ_LONG_F(adr, res) |
| 10659 | flag_C = 0; |
| 10660 | flag_V = 0; |
| 10661 | flag_NotZ = res; |
| 10662 | flag_N = res >> 24; |
| 10663 | adr = AREG(7); |
| 10664 | AREG(7) += 4; |
| 10665 | WRITE_LONG_F(adr, res) |
| 10666 | POST_IO |
| 10667 | RET(20) |
| 10668 | } |
| 10669 | |
| 10670 | // MOVEL |
| 10671 | OPCODE(0x2F1F) |
| 10672 | { |
| 10673 | u32 adr, res; |
| 10674 | u32 src, dst; |
| 10675 | |
| 10676 | adr = AREG(7); |
| 10677 | AREG(7) += 4; |
| 10678 | PRE_IO |
| 10679 | READ_LONG_F(adr, res) |
| 10680 | flag_C = 0; |
| 10681 | flag_V = 0; |
| 10682 | flag_NotZ = res; |
| 10683 | flag_N = res >> 24; |
| 10684 | adr = AREG(7) - 4; |
| 10685 | AREG(7) = adr; |
| 10686 | WRITE_LONG_DEC_F(adr, res) |
| 10687 | POST_IO |
| 10688 | RET(20) |
| 10689 | } |
| 10690 | |
| 10691 | // MOVEL |
| 10692 | OPCODE(0x2027) |
| 10693 | { |
| 10694 | u32 adr, res; |
| 10695 | u32 src, dst; |
| 10696 | |
| 10697 | adr = AREG(7) - 4; |
| 10698 | AREG(7) = adr; |
| 10699 | PRE_IO |
| 10700 | READ_LONG_F(adr, res) |
| 10701 | flag_C = 0; |
| 10702 | flag_V = 0; |
| 10703 | flag_NotZ = res; |
| 10704 | flag_N = res >> 24; |
| 10705 | DREGu32((Opcode >> 9) & 7) = res; |
| 10706 | POST_IO |
| 10707 | RET(14) |
| 10708 | } |
| 10709 | |
| 10710 | // MOVEL |
| 10711 | OPCODE(0x20A7) |
| 10712 | { |
| 10713 | u32 adr, res; |
| 10714 | u32 src, dst; |
| 10715 | |
| 10716 | adr = AREG(7) - 4; |
| 10717 | AREG(7) = adr; |
| 10718 | PRE_IO |
| 10719 | READ_LONG_F(adr, res) |
| 10720 | flag_C = 0; |
| 10721 | flag_V = 0; |
| 10722 | flag_NotZ = res; |
| 10723 | flag_N = res >> 24; |
| 10724 | adr = AREG((Opcode >> 9) & 7); |
| 10725 | WRITE_LONG_F(adr, res) |
| 10726 | POST_IO |
| 10727 | RET(22) |
| 10728 | } |
| 10729 | |
| 10730 | // MOVEL |
| 10731 | OPCODE(0x20E7) |
| 10732 | { |
| 10733 | u32 adr, res; |
| 10734 | u32 src, dst; |
| 10735 | |
| 10736 | adr = AREG(7) - 4; |
| 10737 | AREG(7) = adr; |
| 10738 | PRE_IO |
| 10739 | READ_LONG_F(adr, res) |
| 10740 | flag_C = 0; |
| 10741 | flag_V = 0; |
| 10742 | flag_NotZ = res; |
| 10743 | flag_N = res >> 24; |
| 10744 | adr = AREG((Opcode >> 9) & 7); |
| 10745 | AREG((Opcode >> 9) & 7) += 4; |
| 10746 | WRITE_LONG_F(adr, res) |
| 10747 | POST_IO |
| 10748 | RET(22) |
| 10749 | } |
| 10750 | |
| 10751 | // MOVEL |
| 10752 | OPCODE(0x2127) |
| 10753 | { |
| 10754 | u32 adr, res; |
| 10755 | u32 src, dst; |
| 10756 | |
| 10757 | adr = AREG(7) - 4; |
| 10758 | AREG(7) = adr; |
| 10759 | PRE_IO |
| 10760 | READ_LONG_F(adr, res) |
| 10761 | flag_C = 0; |
| 10762 | flag_V = 0; |
| 10763 | flag_NotZ = res; |
| 10764 | flag_N = res >> 24; |
| 10765 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 10766 | AREG((Opcode >> 9) & 7) = adr; |
| 10767 | WRITE_LONG_DEC_F(adr, res) |
| 10768 | POST_IO |
| 10769 | RET(22) |
| 10770 | } |
| 10771 | |
| 10772 | // MOVEL |
| 10773 | OPCODE(0x2167) |
| 10774 | { |
| 10775 | u32 adr, res; |
| 10776 | u32 src, dst; |
| 10777 | |
| 10778 | adr = AREG(7) - 4; |
| 10779 | AREG(7) = adr; |
| 10780 | PRE_IO |
| 10781 | READ_LONG_F(adr, res) |
| 10782 | flag_C = 0; |
| 10783 | flag_V = 0; |
| 10784 | flag_NotZ = res; |
| 10785 | flag_N = res >> 24; |
| 10786 | FETCH_SWORD(adr); |
| 10787 | adr += AREG((Opcode >> 9) & 7); |
| 10788 | WRITE_LONG_F(adr, res) |
| 10789 | POST_IO |
| 10790 | RET(26) |
| 10791 | } |
| 10792 | |
| 10793 | // MOVEL |
| 10794 | OPCODE(0x21A7) |
| 10795 | { |
| 10796 | u32 adr, res; |
| 10797 | u32 src, dst; |
| 10798 | |
| 10799 | adr = AREG(7) - 4; |
| 10800 | AREG(7) = adr; |
| 10801 | PRE_IO |
| 10802 | READ_LONG_F(adr, res) |
| 10803 | flag_C = 0; |
| 10804 | flag_V = 0; |
| 10805 | flag_NotZ = res; |
| 10806 | flag_N = res >> 24; |
| 10807 | adr = AREG((Opcode >> 9) & 7); |
| 10808 | DECODE_EXT_WORD |
| 10809 | WRITE_LONG_F(adr, res) |
| 10810 | POST_IO |
| 10811 | RET(28) |
| 10812 | } |
| 10813 | |
| 10814 | // MOVEL |
| 10815 | OPCODE(0x21E7) |
| 10816 | { |
| 10817 | u32 adr, res; |
| 10818 | u32 src, dst; |
| 10819 | |
| 10820 | adr = AREG(7) - 4; |
| 10821 | AREG(7) = adr; |
| 10822 | PRE_IO |
| 10823 | READ_LONG_F(adr, res) |
| 10824 | flag_C = 0; |
| 10825 | flag_V = 0; |
| 10826 | flag_NotZ = res; |
| 10827 | flag_N = res >> 24; |
| 10828 | FETCH_SWORD(adr); |
| 10829 | WRITE_LONG_F(adr, res) |
| 10830 | POST_IO |
| 10831 | RET(26) |
| 10832 | } |
| 10833 | |
| 10834 | // MOVEL |
| 10835 | OPCODE(0x23E7) |
| 10836 | { |
| 10837 | u32 adr, res; |
| 10838 | u32 src, dst; |
| 10839 | |
| 10840 | adr = AREG(7) - 4; |
| 10841 | AREG(7) = adr; |
| 10842 | PRE_IO |
| 10843 | READ_LONG_F(adr, res) |
| 10844 | flag_C = 0; |
| 10845 | flag_V = 0; |
| 10846 | flag_NotZ = res; |
| 10847 | flag_N = res >> 24; |
| 10848 | FETCH_LONG(adr); |
| 10849 | WRITE_LONG_F(adr, res) |
| 10850 | POST_IO |
| 10851 | RET(30) |
| 10852 | } |
| 10853 | |
| 10854 | // MOVEL |
| 10855 | OPCODE(0x2EE7) |
| 10856 | { |
| 10857 | u32 adr, res; |
| 10858 | u32 src, dst; |
| 10859 | |
| 10860 | adr = AREG(7) - 4; |
| 10861 | AREG(7) = adr; |
| 10862 | PRE_IO |
| 10863 | READ_LONG_F(adr, res) |
| 10864 | flag_C = 0; |
| 10865 | flag_V = 0; |
| 10866 | flag_NotZ = res; |
| 10867 | flag_N = res >> 24; |
| 10868 | adr = AREG(7); |
| 10869 | AREG(7) += 4; |
| 10870 | WRITE_LONG_F(adr, res) |
| 10871 | POST_IO |
| 10872 | RET(22) |
| 10873 | } |
| 10874 | |
| 10875 | // MOVEL |
| 10876 | OPCODE(0x2F27) |
| 10877 | { |
| 10878 | u32 adr, res; |
| 10879 | u32 src, dst; |
| 10880 | |
| 10881 | adr = AREG(7) - 4; |
| 10882 | AREG(7) = adr; |
| 10883 | PRE_IO |
| 10884 | READ_LONG_F(adr, res) |
| 10885 | flag_C = 0; |
| 10886 | flag_V = 0; |
| 10887 | flag_NotZ = res; |
| 10888 | flag_N = res >> 24; |
| 10889 | adr = AREG(7) - 4; |
| 10890 | AREG(7) = adr; |
| 10891 | WRITE_LONG_DEC_F(adr, res) |
| 10892 | POST_IO |
| 10893 | RET(22) |
| 10894 | } |
| 10895 | |
| 10896 | // MOVEAL |
| 10897 | OPCODE(0x2040) |
| 10898 | { |
| 10899 | u32 adr, res; |
| 10900 | u32 src, dst; |
| 10901 | |
| 10902 | res = (s32)DREGs32((Opcode >> 0) & 7); |
| 10903 | AREG((Opcode >> 9) & 7) = res; |
| 10904 | RET(4) |
| 10905 | } |
| 10906 | |
| 10907 | // MOVEAL |
| 10908 | OPCODE(0x2048) |
| 10909 | { |
| 10910 | u32 adr, res; |
| 10911 | u32 src, dst; |
| 10912 | |
| 10913 | res = (s32)AREGs32((Opcode >> 0) & 7); |
| 10914 | AREG((Opcode >> 9) & 7) = res; |
| 10915 | RET(4) |
| 10916 | } |
| 10917 | |
| 10918 | // MOVEAL |
| 10919 | OPCODE(0x2050) |
| 10920 | { |
| 10921 | u32 adr, res; |
| 10922 | u32 src, dst; |
| 10923 | |
| 10924 | adr = AREG((Opcode >> 0) & 7); |
| 10925 | PRE_IO |
| 10926 | READSX_LONG_F(adr, res) |
| 10927 | AREG((Opcode >> 9) & 7) = res; |
| 10928 | POST_IO |
| 10929 | RET(12) |
| 10930 | } |
| 10931 | |
| 10932 | // MOVEAL |
| 10933 | OPCODE(0x2058) |
| 10934 | { |
| 10935 | u32 adr, res; |
| 10936 | u32 src, dst; |
| 10937 | |
| 10938 | adr = AREG((Opcode >> 0) & 7); |
| 10939 | AREG((Opcode >> 0) & 7) += 4; |
| 10940 | PRE_IO |
| 10941 | READSX_LONG_F(adr, res) |
| 10942 | AREG((Opcode >> 9) & 7) = res; |
| 10943 | POST_IO |
| 10944 | RET(12) |
| 10945 | } |
| 10946 | |
| 10947 | // MOVEAL |
| 10948 | OPCODE(0x2060) |
| 10949 | { |
| 10950 | u32 adr, res; |
| 10951 | u32 src, dst; |
| 10952 | |
| 10953 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 10954 | AREG((Opcode >> 0) & 7) = adr; |
| 10955 | PRE_IO |
| 10956 | READSX_LONG_F(adr, res) |
| 10957 | AREG((Opcode >> 9) & 7) = res; |
| 10958 | POST_IO |
| 10959 | RET(14) |
| 10960 | } |
| 10961 | |
| 10962 | // MOVEAL |
| 10963 | OPCODE(0x2068) |
| 10964 | { |
| 10965 | u32 adr, res; |
| 10966 | u32 src, dst; |
| 10967 | |
| 10968 | FETCH_SWORD(adr); |
| 10969 | adr += AREG((Opcode >> 0) & 7); |
| 10970 | PRE_IO |
| 10971 | READSX_LONG_F(adr, res) |
| 10972 | AREG((Opcode >> 9) & 7) = res; |
| 10973 | POST_IO |
| 10974 | RET(16) |
| 10975 | } |
| 10976 | |
| 10977 | // MOVEAL |
| 10978 | OPCODE(0x2070) |
| 10979 | { |
| 10980 | u32 adr, res; |
| 10981 | u32 src, dst; |
| 10982 | |
| 10983 | adr = AREG((Opcode >> 0) & 7); |
| 10984 | DECODE_EXT_WORD |
| 10985 | PRE_IO |
| 10986 | READSX_LONG_F(adr, res) |
| 10987 | AREG((Opcode >> 9) & 7) = res; |
| 10988 | POST_IO |
| 10989 | RET(18) |
| 10990 | } |
| 10991 | |
| 10992 | // MOVEAL |
| 10993 | OPCODE(0x2078) |
| 10994 | { |
| 10995 | u32 adr, res; |
| 10996 | u32 src, dst; |
| 10997 | |
| 10998 | FETCH_SWORD(adr); |
| 10999 | PRE_IO |
| 11000 | READSX_LONG_F(adr, res) |
| 11001 | AREG((Opcode >> 9) & 7) = res; |
| 11002 | POST_IO |
| 11003 | RET(16) |
| 11004 | } |
| 11005 | |
| 11006 | // MOVEAL |
| 11007 | OPCODE(0x2079) |
| 11008 | { |
| 11009 | u32 adr, res; |
| 11010 | u32 src, dst; |
| 11011 | |
| 11012 | FETCH_LONG(adr); |
| 11013 | PRE_IO |
| 11014 | READSX_LONG_F(adr, res) |
| 11015 | AREG((Opcode >> 9) & 7) = res; |
| 11016 | POST_IO |
| 11017 | RET(20) |
| 11018 | } |
| 11019 | |
| 11020 | // MOVEAL |
| 11021 | OPCODE(0x207A) |
| 11022 | { |
| 11023 | u32 adr, res; |
| 11024 | u32 src, dst; |
| 11025 | |
| 11026 | adr = GET_SWORD + GET_PC; |
| 11027 | PC++; |
| 11028 | PRE_IO |
| 11029 | READSX_LONG_F(adr, res) |
| 11030 | AREG((Opcode >> 9) & 7) = res; |
| 11031 | POST_IO |
| 11032 | RET(16) |
| 11033 | } |
| 11034 | |
| 11035 | // MOVEAL |
| 11036 | OPCODE(0x207B) |
| 11037 | { |
| 11038 | u32 adr, res; |
| 11039 | u32 src, dst; |
| 11040 | |
| 11041 | adr = GET_PC; |
| 11042 | DECODE_EXT_WORD |
| 11043 | PRE_IO |
| 11044 | READSX_LONG_F(adr, res) |
| 11045 | AREG((Opcode >> 9) & 7) = res; |
| 11046 | POST_IO |
| 11047 | RET(18) |
| 11048 | } |
| 11049 | |
| 11050 | // MOVEAL |
| 11051 | OPCODE(0x207C) |
| 11052 | { |
| 11053 | u32 adr, res; |
| 11054 | u32 src, dst; |
| 11055 | |
| 11056 | FETCH_LONG(res); |
| 11057 | AREG((Opcode >> 9) & 7) = res; |
| 11058 | RET(12) |
| 11059 | } |
| 11060 | |
| 11061 | // MOVEAL |
| 11062 | OPCODE(0x205F) |
| 11063 | { |
| 11064 | u32 adr, res; |
| 11065 | u32 src, dst; |
| 11066 | |
| 11067 | adr = AREG(7); |
| 11068 | AREG(7) += 4; |
| 11069 | PRE_IO |
| 11070 | READSX_LONG_F(adr, res) |
| 11071 | AREG((Opcode >> 9) & 7) = res; |
| 11072 | POST_IO |
| 11073 | RET(12) |
| 11074 | } |
| 11075 | |
| 11076 | // MOVEAL |
| 11077 | OPCODE(0x2067) |
| 11078 | { |
| 11079 | u32 adr, res; |
| 11080 | u32 src, dst; |
| 11081 | |
| 11082 | adr = AREG(7) - 4; |
| 11083 | AREG(7) = adr; |
| 11084 | PRE_IO |
| 11085 | READSX_LONG_F(adr, res) |
| 11086 | AREG((Opcode >> 9) & 7) = res; |
| 11087 | POST_IO |
| 11088 | RET(14) |
| 11089 | } |
| 11090 | |
| 11091 | // MOVEW |
| 11092 | OPCODE(0x3000) |
| 11093 | { |
| 11094 | u32 adr, res; |
| 11095 | u32 src, dst; |
| 11096 | |
| 11097 | res = DREGu16((Opcode >> 0) & 7); |
| 11098 | flag_C = 0; |
| 11099 | flag_V = 0; |
| 11100 | flag_NotZ = res; |
| 11101 | flag_N = res >> 8; |
| 11102 | DREGu16((Opcode >> 9) & 7) = res; |
| 11103 | RET(4) |
| 11104 | } |
| 11105 | |
| 11106 | // MOVEW |
| 11107 | OPCODE(0x3080) |
| 11108 | { |
| 11109 | u32 adr, res; |
| 11110 | u32 src, dst; |
| 11111 | |
| 11112 | res = DREGu16((Opcode >> 0) & 7); |
| 11113 | flag_C = 0; |
| 11114 | flag_V = 0; |
| 11115 | flag_NotZ = res; |
| 11116 | flag_N = res >> 8; |
| 11117 | adr = AREG((Opcode >> 9) & 7); |
| 11118 | PRE_IO |
| 11119 | WRITE_WORD_F(adr, res) |
| 11120 | POST_IO |
| 11121 | RET(8) |
| 11122 | } |
| 11123 | |
| 11124 | // MOVEW |
| 11125 | OPCODE(0x30C0) |
| 11126 | { |
| 11127 | u32 adr, res; |
| 11128 | u32 src, dst; |
| 11129 | |
| 11130 | res = DREGu16((Opcode >> 0) & 7); |
| 11131 | flag_C = 0; |
| 11132 | flag_V = 0; |
| 11133 | flag_NotZ = res; |
| 11134 | flag_N = res >> 8; |
| 11135 | adr = AREG((Opcode >> 9) & 7); |
| 11136 | AREG((Opcode >> 9) & 7) += 2; |
| 11137 | PRE_IO |
| 11138 | WRITE_WORD_F(adr, res) |
| 11139 | POST_IO |
| 11140 | RET(8) |
| 11141 | } |
| 11142 | |
| 11143 | // MOVEW |
| 11144 | OPCODE(0x3100) |
| 11145 | { |
| 11146 | u32 adr, res; |
| 11147 | u32 src, dst; |
| 11148 | |
| 11149 | res = DREGu16((Opcode >> 0) & 7); |
| 11150 | flag_C = 0; |
| 11151 | flag_V = 0; |
| 11152 | flag_NotZ = res; |
| 11153 | flag_N = res >> 8; |
| 11154 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 11155 | AREG((Opcode >> 9) & 7) = adr; |
| 11156 | PRE_IO |
| 11157 | WRITE_WORD_F(adr, res) |
| 11158 | POST_IO |
| 11159 | RET(8) |
| 11160 | } |
| 11161 | |
| 11162 | // MOVEW |
| 11163 | OPCODE(0x3140) |
| 11164 | { |
| 11165 | u32 adr, res; |
| 11166 | u32 src, dst; |
| 11167 | |
| 11168 | res = DREGu16((Opcode >> 0) & 7); |
| 11169 | flag_C = 0; |
| 11170 | flag_V = 0; |
| 11171 | flag_NotZ = res; |
| 11172 | flag_N = res >> 8; |
| 11173 | FETCH_SWORD(adr); |
| 11174 | adr += AREG((Opcode >> 9) & 7); |
| 11175 | PRE_IO |
| 11176 | WRITE_WORD_F(adr, res) |
| 11177 | POST_IO |
| 11178 | RET(12) |
| 11179 | } |
| 11180 | |
| 11181 | // MOVEW |
| 11182 | OPCODE(0x3180) |
| 11183 | { |
| 11184 | u32 adr, res; |
| 11185 | u32 src, dst; |
| 11186 | |
| 11187 | res = DREGu16((Opcode >> 0) & 7); |
| 11188 | flag_C = 0; |
| 11189 | flag_V = 0; |
| 11190 | flag_NotZ = res; |
| 11191 | flag_N = res >> 8; |
| 11192 | adr = AREG((Opcode >> 9) & 7); |
| 11193 | DECODE_EXT_WORD |
| 11194 | PRE_IO |
| 11195 | WRITE_WORD_F(adr, res) |
| 11196 | POST_IO |
| 11197 | RET(14) |
| 11198 | } |
| 11199 | |
| 11200 | // MOVEW |
| 11201 | OPCODE(0x31C0) |
| 11202 | { |
| 11203 | u32 adr, res; |
| 11204 | u32 src, dst; |
| 11205 | |
| 11206 | res = DREGu16((Opcode >> 0) & 7); |
| 11207 | flag_C = 0; |
| 11208 | flag_V = 0; |
| 11209 | flag_NotZ = res; |
| 11210 | flag_N = res >> 8; |
| 11211 | FETCH_SWORD(adr); |
| 11212 | PRE_IO |
| 11213 | WRITE_WORD_F(adr, res) |
| 11214 | POST_IO |
| 11215 | RET(12) |
| 11216 | } |
| 11217 | |
| 11218 | // MOVEW |
| 11219 | OPCODE(0x33C0) |
| 11220 | { |
| 11221 | u32 adr, res; |
| 11222 | u32 src, dst; |
| 11223 | |
| 11224 | res = DREGu16((Opcode >> 0) & 7); |
| 11225 | flag_C = 0; |
| 11226 | flag_V = 0; |
| 11227 | flag_NotZ = res; |
| 11228 | flag_N = res >> 8; |
| 11229 | FETCH_LONG(adr); |
| 11230 | PRE_IO |
| 11231 | WRITE_WORD_F(adr, res) |
| 11232 | POST_IO |
| 11233 | RET(16) |
| 11234 | } |
| 11235 | |
| 11236 | // MOVEW |
| 11237 | OPCODE(0x3EC0) |
| 11238 | { |
| 11239 | u32 adr, res; |
| 11240 | u32 src, dst; |
| 11241 | |
| 11242 | res = DREGu16((Opcode >> 0) & 7); |
| 11243 | flag_C = 0; |
| 11244 | flag_V = 0; |
| 11245 | flag_NotZ = res; |
| 11246 | flag_N = res >> 8; |
| 11247 | adr = AREG(7); |
| 11248 | AREG(7) += 2; |
| 11249 | PRE_IO |
| 11250 | WRITE_WORD_F(adr, res) |
| 11251 | POST_IO |
| 11252 | RET(8) |
| 11253 | } |
| 11254 | |
| 11255 | // MOVEW |
| 11256 | OPCODE(0x3F00) |
| 11257 | { |
| 11258 | u32 adr, res; |
| 11259 | u32 src, dst; |
| 11260 | |
| 11261 | res = DREGu16((Opcode >> 0) & 7); |
| 11262 | flag_C = 0; |
| 11263 | flag_V = 0; |
| 11264 | flag_NotZ = res; |
| 11265 | flag_N = res >> 8; |
| 11266 | adr = AREG(7) - 2; |
| 11267 | AREG(7) = adr; |
| 11268 | PRE_IO |
| 11269 | WRITE_WORD_F(adr, res) |
| 11270 | POST_IO |
| 11271 | RET(8) |
| 11272 | } |
| 11273 | |
| 11274 | // MOVEW |
| 11275 | OPCODE(0x3008) |
| 11276 | { |
| 11277 | u32 adr, res; |
| 11278 | u32 src, dst; |
| 11279 | |
| 11280 | res = AREGu16((Opcode >> 0) & 7); |
| 11281 | flag_C = 0; |
| 11282 | flag_V = 0; |
| 11283 | flag_NotZ = res; |
| 11284 | flag_N = res >> 8; |
| 11285 | DREGu16((Opcode >> 9) & 7) = res; |
| 11286 | RET(4) |
| 11287 | } |
| 11288 | |
| 11289 | // MOVEW |
| 11290 | OPCODE(0x3088) |
| 11291 | { |
| 11292 | u32 adr, res; |
| 11293 | u32 src, dst; |
| 11294 | |
| 11295 | res = AREGu16((Opcode >> 0) & 7); |
| 11296 | flag_C = 0; |
| 11297 | flag_V = 0; |
| 11298 | flag_NotZ = res; |
| 11299 | flag_N = res >> 8; |
| 11300 | adr = AREG((Opcode >> 9) & 7); |
| 11301 | PRE_IO |
| 11302 | WRITE_WORD_F(adr, res) |
| 11303 | POST_IO |
| 11304 | RET(8) |
| 11305 | } |
| 11306 | |
| 11307 | // MOVEW |
| 11308 | OPCODE(0x30C8) |
| 11309 | { |
| 11310 | u32 adr, res; |
| 11311 | u32 src, dst; |
| 11312 | |
| 11313 | res = AREGu16((Opcode >> 0) & 7); |
| 11314 | flag_C = 0; |
| 11315 | flag_V = 0; |
| 11316 | flag_NotZ = res; |
| 11317 | flag_N = res >> 8; |
| 11318 | adr = AREG((Opcode >> 9) & 7); |
| 11319 | AREG((Opcode >> 9) & 7) += 2; |
| 11320 | PRE_IO |
| 11321 | WRITE_WORD_F(adr, res) |
| 11322 | POST_IO |
| 11323 | RET(8) |
| 11324 | } |
| 11325 | |
| 11326 | // MOVEW |
| 11327 | OPCODE(0x3108) |
| 11328 | { |
| 11329 | u32 adr, res; |
| 11330 | u32 src, dst; |
| 11331 | |
| 11332 | res = AREGu16((Opcode >> 0) & 7); |
| 11333 | flag_C = 0; |
| 11334 | flag_V = 0; |
| 11335 | flag_NotZ = res; |
| 11336 | flag_N = res >> 8; |
| 11337 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 11338 | AREG((Opcode >> 9) & 7) = adr; |
| 11339 | PRE_IO |
| 11340 | WRITE_WORD_F(adr, res) |
| 11341 | POST_IO |
| 11342 | RET(8) |
| 11343 | } |
| 11344 | |
| 11345 | // MOVEW |
| 11346 | OPCODE(0x3148) |
| 11347 | { |
| 11348 | u32 adr, res; |
| 11349 | u32 src, dst; |
| 11350 | |
| 11351 | res = AREGu16((Opcode >> 0) & 7); |
| 11352 | flag_C = 0; |
| 11353 | flag_V = 0; |
| 11354 | flag_NotZ = res; |
| 11355 | flag_N = res >> 8; |
| 11356 | FETCH_SWORD(adr); |
| 11357 | adr += AREG((Opcode >> 9) & 7); |
| 11358 | PRE_IO |
| 11359 | WRITE_WORD_F(adr, res) |
| 11360 | POST_IO |
| 11361 | RET(12) |
| 11362 | } |
| 11363 | |
| 11364 | // MOVEW |
| 11365 | OPCODE(0x3188) |
| 11366 | { |
| 11367 | u32 adr, res; |
| 11368 | u32 src, dst; |
| 11369 | |
| 11370 | res = AREGu16((Opcode >> 0) & 7); |
| 11371 | flag_C = 0; |
| 11372 | flag_V = 0; |
| 11373 | flag_NotZ = res; |
| 11374 | flag_N = res >> 8; |
| 11375 | adr = AREG((Opcode >> 9) & 7); |
| 11376 | DECODE_EXT_WORD |
| 11377 | PRE_IO |
| 11378 | WRITE_WORD_F(adr, res) |
| 11379 | POST_IO |
| 11380 | RET(14) |
| 11381 | } |
| 11382 | |
| 11383 | // MOVEW |
| 11384 | OPCODE(0x31C8) |
| 11385 | { |
| 11386 | u32 adr, res; |
| 11387 | u32 src, dst; |
| 11388 | |
| 11389 | res = AREGu16((Opcode >> 0) & 7); |
| 11390 | flag_C = 0; |
| 11391 | flag_V = 0; |
| 11392 | flag_NotZ = res; |
| 11393 | flag_N = res >> 8; |
| 11394 | FETCH_SWORD(adr); |
| 11395 | PRE_IO |
| 11396 | WRITE_WORD_F(adr, res) |
| 11397 | POST_IO |
| 11398 | RET(12) |
| 11399 | } |
| 11400 | |
| 11401 | // MOVEW |
| 11402 | OPCODE(0x33C8) |
| 11403 | { |
| 11404 | u32 adr, res; |
| 11405 | u32 src, dst; |
| 11406 | |
| 11407 | res = AREGu16((Opcode >> 0) & 7); |
| 11408 | flag_C = 0; |
| 11409 | flag_V = 0; |
| 11410 | flag_NotZ = res; |
| 11411 | flag_N = res >> 8; |
| 11412 | FETCH_LONG(adr); |
| 11413 | PRE_IO |
| 11414 | WRITE_WORD_F(adr, res) |
| 11415 | POST_IO |
| 11416 | RET(16) |
| 11417 | } |
| 11418 | |
| 11419 | // MOVEW |
| 11420 | OPCODE(0x3EC8) |
| 11421 | { |
| 11422 | u32 adr, res; |
| 11423 | u32 src, dst; |
| 11424 | |
| 11425 | res = AREGu16((Opcode >> 0) & 7); |
| 11426 | flag_C = 0; |
| 11427 | flag_V = 0; |
| 11428 | flag_NotZ = res; |
| 11429 | flag_N = res >> 8; |
| 11430 | adr = AREG(7); |
| 11431 | AREG(7) += 2; |
| 11432 | PRE_IO |
| 11433 | WRITE_WORD_F(adr, res) |
| 11434 | POST_IO |
| 11435 | RET(8) |
| 11436 | } |
| 11437 | |
| 11438 | // MOVEW |
| 11439 | OPCODE(0x3F08) |
| 11440 | { |
| 11441 | u32 adr, res; |
| 11442 | u32 src, dst; |
| 11443 | |
| 11444 | res = AREGu16((Opcode >> 0) & 7); |
| 11445 | flag_C = 0; |
| 11446 | flag_V = 0; |
| 11447 | flag_NotZ = res; |
| 11448 | flag_N = res >> 8; |
| 11449 | adr = AREG(7) - 2; |
| 11450 | AREG(7) = adr; |
| 11451 | PRE_IO |
| 11452 | WRITE_WORD_F(adr, res) |
| 11453 | POST_IO |
| 11454 | RET(8) |
| 11455 | } |
| 11456 | |
| 11457 | // MOVEW |
| 11458 | OPCODE(0x3010) |
| 11459 | { |
| 11460 | u32 adr, res; |
| 11461 | u32 src, dst; |
| 11462 | |
| 11463 | adr = AREG((Opcode >> 0) & 7); |
| 11464 | PRE_IO |
| 11465 | READ_WORD_F(adr, res) |
| 11466 | flag_C = 0; |
| 11467 | flag_V = 0; |
| 11468 | flag_NotZ = res; |
| 11469 | flag_N = res >> 8; |
| 11470 | DREGu16((Opcode >> 9) & 7) = res; |
| 11471 | POST_IO |
| 11472 | RET(8) |
| 11473 | } |
| 11474 | |
| 11475 | // MOVEW |
| 11476 | OPCODE(0x3090) |
| 11477 | { |
| 11478 | u32 adr, res; |
| 11479 | u32 src, dst; |
| 11480 | |
| 11481 | adr = AREG((Opcode >> 0) & 7); |
| 11482 | PRE_IO |
| 11483 | READ_WORD_F(adr, res) |
| 11484 | flag_C = 0; |
| 11485 | flag_V = 0; |
| 11486 | flag_NotZ = res; |
| 11487 | flag_N = res >> 8; |
| 11488 | adr = AREG((Opcode >> 9) & 7); |
| 11489 | WRITE_WORD_F(adr, res) |
| 11490 | POST_IO |
| 11491 | RET(12) |
| 11492 | } |
| 11493 | |
| 11494 | // MOVEW |
| 11495 | OPCODE(0x30D0) |
| 11496 | { |
| 11497 | u32 adr, res; |
| 11498 | u32 src, dst; |
| 11499 | |
| 11500 | adr = AREG((Opcode >> 0) & 7); |
| 11501 | PRE_IO |
| 11502 | READ_WORD_F(adr, res) |
| 11503 | flag_C = 0; |
| 11504 | flag_V = 0; |
| 11505 | flag_NotZ = res; |
| 11506 | flag_N = res >> 8; |
| 11507 | adr = AREG((Opcode >> 9) & 7); |
| 11508 | AREG((Opcode >> 9) & 7) += 2; |
| 11509 | WRITE_WORD_F(adr, res) |
| 11510 | POST_IO |
| 11511 | RET(12) |
| 11512 | } |
| 11513 | |
| 11514 | // MOVEW |
| 11515 | OPCODE(0x3110) |
| 11516 | { |
| 11517 | u32 adr, res; |
| 11518 | u32 src, dst; |
| 11519 | |
| 11520 | adr = AREG((Opcode >> 0) & 7); |
| 11521 | PRE_IO |
| 11522 | READ_WORD_F(adr, res) |
| 11523 | flag_C = 0; |
| 11524 | flag_V = 0; |
| 11525 | flag_NotZ = res; |
| 11526 | flag_N = res >> 8; |
| 11527 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 11528 | AREG((Opcode >> 9) & 7) = adr; |
| 11529 | WRITE_WORD_F(adr, res) |
| 11530 | POST_IO |
| 11531 | RET(12) |
| 11532 | } |
| 11533 | |
| 11534 | // MOVEW |
| 11535 | OPCODE(0x3150) |
| 11536 | { |
| 11537 | u32 adr, res; |
| 11538 | u32 src, dst; |
| 11539 | |
| 11540 | adr = AREG((Opcode >> 0) & 7); |
| 11541 | PRE_IO |
| 11542 | READ_WORD_F(adr, res) |
| 11543 | flag_C = 0; |
| 11544 | flag_V = 0; |
| 11545 | flag_NotZ = res; |
| 11546 | flag_N = res >> 8; |
| 11547 | FETCH_SWORD(adr); |
| 11548 | adr += AREG((Opcode >> 9) & 7); |
| 11549 | WRITE_WORD_F(adr, res) |
| 11550 | POST_IO |
| 11551 | RET(16) |
| 11552 | } |
| 11553 | |
| 11554 | // MOVEW |
| 11555 | OPCODE(0x3190) |
| 11556 | { |
| 11557 | u32 adr, res; |
| 11558 | u32 src, dst; |
| 11559 | |
| 11560 | adr = AREG((Opcode >> 0) & 7); |
| 11561 | PRE_IO |
| 11562 | READ_WORD_F(adr, res) |
| 11563 | flag_C = 0; |
| 11564 | flag_V = 0; |
| 11565 | flag_NotZ = res; |
| 11566 | flag_N = res >> 8; |
| 11567 | adr = AREG((Opcode >> 9) & 7); |
| 11568 | DECODE_EXT_WORD |
| 11569 | WRITE_WORD_F(adr, res) |
| 11570 | POST_IO |
| 11571 | RET(18) |
| 11572 | } |
| 11573 | |
| 11574 | // MOVEW |
| 11575 | OPCODE(0x31D0) |
| 11576 | { |
| 11577 | u32 adr, res; |
| 11578 | u32 src, dst; |
| 11579 | |
| 11580 | adr = AREG((Opcode >> 0) & 7); |
| 11581 | PRE_IO |
| 11582 | READ_WORD_F(adr, res) |
| 11583 | flag_C = 0; |
| 11584 | flag_V = 0; |
| 11585 | flag_NotZ = res; |
| 11586 | flag_N = res >> 8; |
| 11587 | FETCH_SWORD(adr); |
| 11588 | WRITE_WORD_F(adr, res) |
| 11589 | POST_IO |
| 11590 | RET(16) |
| 11591 | } |
| 11592 | |
| 11593 | // MOVEW |
| 11594 | OPCODE(0x33D0) |
| 11595 | { |
| 11596 | u32 adr, res; |
| 11597 | u32 src, dst; |
| 11598 | |
| 11599 | adr = AREG((Opcode >> 0) & 7); |
| 11600 | PRE_IO |
| 11601 | READ_WORD_F(adr, res) |
| 11602 | flag_C = 0; |
| 11603 | flag_V = 0; |
| 11604 | flag_NotZ = res; |
| 11605 | flag_N = res >> 8; |
| 11606 | FETCH_LONG(adr); |
| 11607 | WRITE_WORD_F(adr, res) |
| 11608 | POST_IO |
| 11609 | RET(20) |
| 11610 | } |
| 11611 | |
| 11612 | // MOVEW |
| 11613 | OPCODE(0x3ED0) |
| 11614 | { |
| 11615 | u32 adr, res; |
| 11616 | u32 src, dst; |
| 11617 | |
| 11618 | adr = AREG((Opcode >> 0) & 7); |
| 11619 | PRE_IO |
| 11620 | READ_WORD_F(adr, res) |
| 11621 | flag_C = 0; |
| 11622 | flag_V = 0; |
| 11623 | flag_NotZ = res; |
| 11624 | flag_N = res >> 8; |
| 11625 | adr = AREG(7); |
| 11626 | AREG(7) += 2; |
| 11627 | WRITE_WORD_F(adr, res) |
| 11628 | POST_IO |
| 11629 | RET(12) |
| 11630 | } |
| 11631 | |
| 11632 | // MOVEW |
| 11633 | OPCODE(0x3F10) |
| 11634 | { |
| 11635 | u32 adr, res; |
| 11636 | u32 src, dst; |
| 11637 | |
| 11638 | adr = AREG((Opcode >> 0) & 7); |
| 11639 | PRE_IO |
| 11640 | READ_WORD_F(adr, res) |
| 11641 | flag_C = 0; |
| 11642 | flag_V = 0; |
| 11643 | flag_NotZ = res; |
| 11644 | flag_N = res >> 8; |
| 11645 | adr = AREG(7) - 2; |
| 11646 | AREG(7) = adr; |
| 11647 | WRITE_WORD_F(adr, res) |
| 11648 | POST_IO |
| 11649 | RET(12) |
| 11650 | } |
| 11651 | |
| 11652 | // MOVEW |
| 11653 | OPCODE(0x3018) |
| 11654 | { |
| 11655 | u32 adr, res; |
| 11656 | u32 src, dst; |
| 11657 | |
| 11658 | adr = AREG((Opcode >> 0) & 7); |
| 11659 | AREG((Opcode >> 0) & 7) += 2; |
| 11660 | PRE_IO |
| 11661 | READ_WORD_F(adr, res) |
| 11662 | flag_C = 0; |
| 11663 | flag_V = 0; |
| 11664 | flag_NotZ = res; |
| 11665 | flag_N = res >> 8; |
| 11666 | DREGu16((Opcode >> 9) & 7) = res; |
| 11667 | POST_IO |
| 11668 | RET(8) |
| 11669 | } |
| 11670 | |
| 11671 | // MOVEW |
| 11672 | OPCODE(0x3098) |
| 11673 | { |
| 11674 | u32 adr, res; |
| 11675 | u32 src, dst; |
| 11676 | |
| 11677 | adr = AREG((Opcode >> 0) & 7); |
| 11678 | AREG((Opcode >> 0) & 7) += 2; |
| 11679 | PRE_IO |
| 11680 | READ_WORD_F(adr, res) |
| 11681 | flag_C = 0; |
| 11682 | flag_V = 0; |
| 11683 | flag_NotZ = res; |
| 11684 | flag_N = res >> 8; |
| 11685 | adr = AREG((Opcode >> 9) & 7); |
| 11686 | WRITE_WORD_F(adr, res) |
| 11687 | POST_IO |
| 11688 | RET(12) |
| 11689 | } |
| 11690 | |
| 11691 | // MOVEW |
| 11692 | OPCODE(0x30D8) |
| 11693 | { |
| 11694 | u32 adr, res; |
| 11695 | u32 src, dst; |
| 11696 | |
| 11697 | adr = AREG((Opcode >> 0) & 7); |
| 11698 | AREG((Opcode >> 0) & 7) += 2; |
| 11699 | PRE_IO |
| 11700 | READ_WORD_F(adr, res) |
| 11701 | flag_C = 0; |
| 11702 | flag_V = 0; |
| 11703 | flag_NotZ = res; |
| 11704 | flag_N = res >> 8; |
| 11705 | adr = AREG((Opcode >> 9) & 7); |
| 11706 | AREG((Opcode >> 9) & 7) += 2; |
| 11707 | WRITE_WORD_F(adr, res) |
| 11708 | POST_IO |
| 11709 | RET(12) |
| 11710 | } |
| 11711 | |
| 11712 | // MOVEW |
| 11713 | OPCODE(0x3118) |
| 11714 | { |
| 11715 | u32 adr, res; |
| 11716 | u32 src, dst; |
| 11717 | |
| 11718 | adr = AREG((Opcode >> 0) & 7); |
| 11719 | AREG((Opcode >> 0) & 7) += 2; |
| 11720 | PRE_IO |
| 11721 | READ_WORD_F(adr, res) |
| 11722 | flag_C = 0; |
| 11723 | flag_V = 0; |
| 11724 | flag_NotZ = res; |
| 11725 | flag_N = res >> 8; |
| 11726 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 11727 | AREG((Opcode >> 9) & 7) = adr; |
| 11728 | WRITE_WORD_F(adr, res) |
| 11729 | POST_IO |
| 11730 | RET(12) |
| 11731 | } |
| 11732 | |
| 11733 | // MOVEW |
| 11734 | OPCODE(0x3158) |
| 11735 | { |
| 11736 | u32 adr, res; |
| 11737 | u32 src, dst; |
| 11738 | |
| 11739 | adr = AREG((Opcode >> 0) & 7); |
| 11740 | AREG((Opcode >> 0) & 7) += 2; |
| 11741 | PRE_IO |
| 11742 | READ_WORD_F(adr, res) |
| 11743 | flag_C = 0; |
| 11744 | flag_V = 0; |
| 11745 | flag_NotZ = res; |
| 11746 | flag_N = res >> 8; |
| 11747 | FETCH_SWORD(adr); |
| 11748 | adr += AREG((Opcode >> 9) & 7); |
| 11749 | WRITE_WORD_F(adr, res) |
| 11750 | POST_IO |
| 11751 | RET(16) |
| 11752 | } |
| 11753 | |
| 11754 | // MOVEW |
| 11755 | OPCODE(0x3198) |
| 11756 | { |
| 11757 | u32 adr, res; |
| 11758 | u32 src, dst; |
| 11759 | |
| 11760 | adr = AREG((Opcode >> 0) & 7); |
| 11761 | AREG((Opcode >> 0) & 7) += 2; |
| 11762 | PRE_IO |
| 11763 | READ_WORD_F(adr, res) |
| 11764 | flag_C = 0; |
| 11765 | flag_V = 0; |
| 11766 | flag_NotZ = res; |
| 11767 | flag_N = res >> 8; |
| 11768 | adr = AREG((Opcode >> 9) & 7); |
| 11769 | DECODE_EXT_WORD |
| 11770 | WRITE_WORD_F(adr, res) |
| 11771 | POST_IO |
| 11772 | RET(18) |
| 11773 | } |
| 11774 | |
| 11775 | // MOVEW |
| 11776 | OPCODE(0x31D8) |
| 11777 | { |
| 11778 | u32 adr, res; |
| 11779 | u32 src, dst; |
| 11780 | |
| 11781 | adr = AREG((Opcode >> 0) & 7); |
| 11782 | AREG((Opcode >> 0) & 7) += 2; |
| 11783 | PRE_IO |
| 11784 | READ_WORD_F(adr, res) |
| 11785 | flag_C = 0; |
| 11786 | flag_V = 0; |
| 11787 | flag_NotZ = res; |
| 11788 | flag_N = res >> 8; |
| 11789 | FETCH_SWORD(adr); |
| 11790 | WRITE_WORD_F(adr, res) |
| 11791 | POST_IO |
| 11792 | RET(16) |
| 11793 | } |
| 11794 | |
| 11795 | // MOVEW |
| 11796 | OPCODE(0x33D8) |
| 11797 | { |
| 11798 | u32 adr, res; |
| 11799 | u32 src, dst; |
| 11800 | |
| 11801 | adr = AREG((Opcode >> 0) & 7); |
| 11802 | AREG((Opcode >> 0) & 7) += 2; |
| 11803 | PRE_IO |
| 11804 | READ_WORD_F(adr, res) |
| 11805 | flag_C = 0; |
| 11806 | flag_V = 0; |
| 11807 | flag_NotZ = res; |
| 11808 | flag_N = res >> 8; |
| 11809 | FETCH_LONG(adr); |
| 11810 | WRITE_WORD_F(adr, res) |
| 11811 | POST_IO |
| 11812 | RET(20) |
| 11813 | } |
| 11814 | |
| 11815 | // MOVEW |
| 11816 | OPCODE(0x3ED8) |
| 11817 | { |
| 11818 | u32 adr, res; |
| 11819 | u32 src, dst; |
| 11820 | |
| 11821 | adr = AREG((Opcode >> 0) & 7); |
| 11822 | AREG((Opcode >> 0) & 7) += 2; |
| 11823 | PRE_IO |
| 11824 | READ_WORD_F(adr, res) |
| 11825 | flag_C = 0; |
| 11826 | flag_V = 0; |
| 11827 | flag_NotZ = res; |
| 11828 | flag_N = res >> 8; |
| 11829 | adr = AREG(7); |
| 11830 | AREG(7) += 2; |
| 11831 | WRITE_WORD_F(adr, res) |
| 11832 | POST_IO |
| 11833 | RET(12) |
| 11834 | } |
| 11835 | |
| 11836 | // MOVEW |
| 11837 | OPCODE(0x3F18) |
| 11838 | { |
| 11839 | u32 adr, res; |
| 11840 | u32 src, dst; |
| 11841 | |
| 11842 | adr = AREG((Opcode >> 0) & 7); |
| 11843 | AREG((Opcode >> 0) & 7) += 2; |
| 11844 | PRE_IO |
| 11845 | READ_WORD_F(adr, res) |
| 11846 | flag_C = 0; |
| 11847 | flag_V = 0; |
| 11848 | flag_NotZ = res; |
| 11849 | flag_N = res >> 8; |
| 11850 | adr = AREG(7) - 2; |
| 11851 | AREG(7) = adr; |
| 11852 | WRITE_WORD_F(adr, res) |
| 11853 | POST_IO |
| 11854 | RET(12) |
| 11855 | } |
| 11856 | |
| 11857 | // MOVEW |
| 11858 | OPCODE(0x3020) |
| 11859 | { |
| 11860 | u32 adr, res; |
| 11861 | u32 src, dst; |
| 11862 | |
| 11863 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 11864 | AREG((Opcode >> 0) & 7) = adr; |
| 11865 | PRE_IO |
| 11866 | READ_WORD_F(adr, res) |
| 11867 | flag_C = 0; |
| 11868 | flag_V = 0; |
| 11869 | flag_NotZ = res; |
| 11870 | flag_N = res >> 8; |
| 11871 | DREGu16((Opcode >> 9) & 7) = res; |
| 11872 | POST_IO |
| 11873 | RET(10) |
| 11874 | } |
| 11875 | |
| 11876 | // MOVEW |
| 11877 | OPCODE(0x30A0) |
| 11878 | { |
| 11879 | u32 adr, res; |
| 11880 | u32 src, dst; |
| 11881 | |
| 11882 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 11883 | AREG((Opcode >> 0) & 7) = adr; |
| 11884 | PRE_IO |
| 11885 | READ_WORD_F(adr, res) |
| 11886 | flag_C = 0; |
| 11887 | flag_V = 0; |
| 11888 | flag_NotZ = res; |
| 11889 | flag_N = res >> 8; |
| 11890 | adr = AREG((Opcode >> 9) & 7); |
| 11891 | WRITE_WORD_F(adr, res) |
| 11892 | POST_IO |
| 11893 | RET(14) |
| 11894 | } |
| 11895 | |
| 11896 | // MOVEW |
| 11897 | OPCODE(0x30E0) |
| 11898 | { |
| 11899 | u32 adr, res; |
| 11900 | u32 src, dst; |
| 11901 | |
| 11902 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 11903 | AREG((Opcode >> 0) & 7) = adr; |
| 11904 | PRE_IO |
| 11905 | READ_WORD_F(adr, res) |
| 11906 | flag_C = 0; |
| 11907 | flag_V = 0; |
| 11908 | flag_NotZ = res; |
| 11909 | flag_N = res >> 8; |
| 11910 | adr = AREG((Opcode >> 9) & 7); |
| 11911 | AREG((Opcode >> 9) & 7) += 2; |
| 11912 | WRITE_WORD_F(adr, res) |
| 11913 | POST_IO |
| 11914 | RET(14) |
| 11915 | } |
| 11916 | |
| 11917 | // MOVEW |
| 11918 | OPCODE(0x3120) |
| 11919 | { |
| 11920 | u32 adr, res; |
| 11921 | u32 src, dst; |
| 11922 | |
| 11923 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 11924 | AREG((Opcode >> 0) & 7) = adr; |
| 11925 | PRE_IO |
| 11926 | READ_WORD_F(adr, res) |
| 11927 | flag_C = 0; |
| 11928 | flag_V = 0; |
| 11929 | flag_NotZ = res; |
| 11930 | flag_N = res >> 8; |
| 11931 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 11932 | AREG((Opcode >> 9) & 7) = adr; |
| 11933 | WRITE_WORD_F(adr, res) |
| 11934 | POST_IO |
| 11935 | RET(14) |
| 11936 | } |
| 11937 | |
| 11938 | // MOVEW |
| 11939 | OPCODE(0x3160) |
| 11940 | { |
| 11941 | u32 adr, res; |
| 11942 | u32 src, dst; |
| 11943 | |
| 11944 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 11945 | AREG((Opcode >> 0) & 7) = adr; |
| 11946 | PRE_IO |
| 11947 | READ_WORD_F(adr, res) |
| 11948 | flag_C = 0; |
| 11949 | flag_V = 0; |
| 11950 | flag_NotZ = res; |
| 11951 | flag_N = res >> 8; |
| 11952 | FETCH_SWORD(adr); |
| 11953 | adr += AREG((Opcode >> 9) & 7); |
| 11954 | WRITE_WORD_F(adr, res) |
| 11955 | POST_IO |
| 11956 | RET(18) |
| 11957 | } |
| 11958 | |
| 11959 | // MOVEW |
| 11960 | OPCODE(0x31A0) |
| 11961 | { |
| 11962 | u32 adr, res; |
| 11963 | u32 src, dst; |
| 11964 | |
| 11965 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 11966 | AREG((Opcode >> 0) & 7) = adr; |
| 11967 | PRE_IO |
| 11968 | READ_WORD_F(adr, res) |
| 11969 | flag_C = 0; |
| 11970 | flag_V = 0; |
| 11971 | flag_NotZ = res; |
| 11972 | flag_N = res >> 8; |
| 11973 | adr = AREG((Opcode >> 9) & 7); |
| 11974 | DECODE_EXT_WORD |
| 11975 | WRITE_WORD_F(adr, res) |
| 11976 | POST_IO |
| 11977 | RET(20) |
| 11978 | } |
| 11979 | |
| 11980 | // MOVEW |
| 11981 | OPCODE(0x31E0) |
| 11982 | { |
| 11983 | u32 adr, res; |
| 11984 | u32 src, dst; |
| 11985 | |
| 11986 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 11987 | AREG((Opcode >> 0) & 7) = adr; |
| 11988 | PRE_IO |
| 11989 | READ_WORD_F(adr, res) |
| 11990 | flag_C = 0; |
| 11991 | flag_V = 0; |
| 11992 | flag_NotZ = res; |
| 11993 | flag_N = res >> 8; |
| 11994 | FETCH_SWORD(adr); |
| 11995 | WRITE_WORD_F(adr, res) |
| 11996 | POST_IO |
| 11997 | RET(18) |
| 11998 | } |
| 11999 | |
| 12000 | // MOVEW |
| 12001 | OPCODE(0x33E0) |
| 12002 | { |
| 12003 | u32 adr, res; |
| 12004 | u32 src, dst; |
| 12005 | |
| 12006 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 12007 | AREG((Opcode >> 0) & 7) = adr; |
| 12008 | PRE_IO |
| 12009 | READ_WORD_F(adr, res) |
| 12010 | flag_C = 0; |
| 12011 | flag_V = 0; |
| 12012 | flag_NotZ = res; |
| 12013 | flag_N = res >> 8; |
| 12014 | FETCH_LONG(adr); |
| 12015 | WRITE_WORD_F(adr, res) |
| 12016 | POST_IO |
| 12017 | RET(22) |
| 12018 | } |
| 12019 | |
| 12020 | // MOVEW |
| 12021 | OPCODE(0x3EE0) |
| 12022 | { |
| 12023 | u32 adr, res; |
| 12024 | u32 src, dst; |
| 12025 | |
| 12026 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 12027 | AREG((Opcode >> 0) & 7) = adr; |
| 12028 | PRE_IO |
| 12029 | READ_WORD_F(adr, res) |
| 12030 | flag_C = 0; |
| 12031 | flag_V = 0; |
| 12032 | flag_NotZ = res; |
| 12033 | flag_N = res >> 8; |
| 12034 | adr = AREG(7); |
| 12035 | AREG(7) += 2; |
| 12036 | WRITE_WORD_F(adr, res) |
| 12037 | POST_IO |
| 12038 | RET(14) |
| 12039 | } |
| 12040 | |
| 12041 | // MOVEW |
| 12042 | OPCODE(0x3F20) |
| 12043 | { |
| 12044 | u32 adr, res; |
| 12045 | u32 src, dst; |
| 12046 | |
| 12047 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 12048 | AREG((Opcode >> 0) & 7) = adr; |
| 12049 | PRE_IO |
| 12050 | READ_WORD_F(adr, res) |
| 12051 | flag_C = 0; |
| 12052 | flag_V = 0; |
| 12053 | flag_NotZ = res; |
| 12054 | flag_N = res >> 8; |
| 12055 | adr = AREG(7) - 2; |
| 12056 | AREG(7) = adr; |
| 12057 | WRITE_WORD_F(adr, res) |
| 12058 | POST_IO |
| 12059 | RET(14) |
| 12060 | } |
| 12061 | |
| 12062 | // MOVEW |
| 12063 | OPCODE(0x3028) |
| 12064 | { |
| 12065 | u32 adr, res; |
| 12066 | u32 src, dst; |
| 12067 | |
| 12068 | FETCH_SWORD(adr); |
| 12069 | adr += AREG((Opcode >> 0) & 7); |
| 12070 | PRE_IO |
| 12071 | READ_WORD_F(adr, res) |
| 12072 | flag_C = 0; |
| 12073 | flag_V = 0; |
| 12074 | flag_NotZ = res; |
| 12075 | flag_N = res >> 8; |
| 12076 | DREGu16((Opcode >> 9) & 7) = res; |
| 12077 | POST_IO |
| 12078 | RET(12) |
| 12079 | } |
| 12080 | |
| 12081 | // MOVEW |
| 12082 | OPCODE(0x30A8) |
| 12083 | { |
| 12084 | u32 adr, res; |
| 12085 | u32 src, dst; |
| 12086 | |
| 12087 | FETCH_SWORD(adr); |
| 12088 | adr += AREG((Opcode >> 0) & 7); |
| 12089 | PRE_IO |
| 12090 | READ_WORD_F(adr, res) |
| 12091 | flag_C = 0; |
| 12092 | flag_V = 0; |
| 12093 | flag_NotZ = res; |
| 12094 | flag_N = res >> 8; |
| 12095 | adr = AREG((Opcode >> 9) & 7); |
| 12096 | WRITE_WORD_F(adr, res) |
| 12097 | POST_IO |
| 12098 | RET(16) |
| 12099 | } |
| 12100 | |
| 12101 | // MOVEW |
| 12102 | OPCODE(0x30E8) |
| 12103 | { |
| 12104 | u32 adr, res; |
| 12105 | u32 src, dst; |
| 12106 | |
| 12107 | FETCH_SWORD(adr); |
| 12108 | adr += AREG((Opcode >> 0) & 7); |
| 12109 | PRE_IO |
| 12110 | READ_WORD_F(adr, res) |
| 12111 | flag_C = 0; |
| 12112 | flag_V = 0; |
| 12113 | flag_NotZ = res; |
| 12114 | flag_N = res >> 8; |
| 12115 | adr = AREG((Opcode >> 9) & 7); |
| 12116 | AREG((Opcode >> 9) & 7) += 2; |
| 12117 | WRITE_WORD_F(adr, res) |
| 12118 | POST_IO |
| 12119 | RET(16) |
| 12120 | } |
| 12121 | |
| 12122 | // MOVEW |
| 12123 | OPCODE(0x3128) |
| 12124 | { |
| 12125 | u32 adr, res; |
| 12126 | u32 src, dst; |
| 12127 | |
| 12128 | FETCH_SWORD(adr); |
| 12129 | adr += AREG((Opcode >> 0) & 7); |
| 12130 | PRE_IO |
| 12131 | READ_WORD_F(adr, res) |
| 12132 | flag_C = 0; |
| 12133 | flag_V = 0; |
| 12134 | flag_NotZ = res; |
| 12135 | flag_N = res >> 8; |
| 12136 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 12137 | AREG((Opcode >> 9) & 7) = adr; |
| 12138 | WRITE_WORD_F(adr, res) |
| 12139 | POST_IO |
| 12140 | RET(16) |
| 12141 | } |
| 12142 | |
| 12143 | // MOVEW |
| 12144 | OPCODE(0x3168) |
| 12145 | { |
| 12146 | u32 adr, res; |
| 12147 | u32 src, dst; |
| 12148 | |
| 12149 | FETCH_SWORD(adr); |
| 12150 | adr += AREG((Opcode >> 0) & 7); |
| 12151 | PRE_IO |
| 12152 | READ_WORD_F(adr, res) |
| 12153 | flag_C = 0; |
| 12154 | flag_V = 0; |
| 12155 | flag_NotZ = res; |
| 12156 | flag_N = res >> 8; |
| 12157 | FETCH_SWORD(adr); |
| 12158 | adr += AREG((Opcode >> 9) & 7); |
| 12159 | WRITE_WORD_F(adr, res) |
| 12160 | POST_IO |
| 12161 | RET(20) |
| 12162 | } |
| 12163 | |
| 12164 | // MOVEW |
| 12165 | OPCODE(0x31A8) |
| 12166 | { |
| 12167 | u32 adr, res; |
| 12168 | u32 src, dst; |
| 12169 | |
| 12170 | FETCH_SWORD(adr); |
| 12171 | adr += AREG((Opcode >> 0) & 7); |
| 12172 | PRE_IO |
| 12173 | READ_WORD_F(adr, res) |
| 12174 | flag_C = 0; |
| 12175 | flag_V = 0; |
| 12176 | flag_NotZ = res; |
| 12177 | flag_N = res >> 8; |
| 12178 | adr = AREG((Opcode >> 9) & 7); |
| 12179 | DECODE_EXT_WORD |
| 12180 | WRITE_WORD_F(adr, res) |
| 12181 | POST_IO |
| 12182 | RET(22) |
| 12183 | } |
| 12184 | |
| 12185 | // MOVEW |
| 12186 | OPCODE(0x31E8) |
| 12187 | { |
| 12188 | u32 adr, res; |
| 12189 | u32 src, dst; |
| 12190 | |
| 12191 | FETCH_SWORD(adr); |
| 12192 | adr += AREG((Opcode >> 0) & 7); |
| 12193 | PRE_IO |
| 12194 | READ_WORD_F(adr, res) |
| 12195 | flag_C = 0; |
| 12196 | flag_V = 0; |
| 12197 | flag_NotZ = res; |
| 12198 | flag_N = res >> 8; |
| 12199 | FETCH_SWORD(adr); |
| 12200 | WRITE_WORD_F(adr, res) |
| 12201 | POST_IO |
| 12202 | RET(20) |
| 12203 | } |
| 12204 | |
| 12205 | // MOVEW |
| 12206 | OPCODE(0x33E8) |
| 12207 | { |
| 12208 | u32 adr, res; |
| 12209 | u32 src, dst; |
| 12210 | |
| 12211 | FETCH_SWORD(adr); |
| 12212 | adr += AREG((Opcode >> 0) & 7); |
| 12213 | PRE_IO |
| 12214 | READ_WORD_F(adr, res) |
| 12215 | flag_C = 0; |
| 12216 | flag_V = 0; |
| 12217 | flag_NotZ = res; |
| 12218 | flag_N = res >> 8; |
| 12219 | FETCH_LONG(adr); |
| 12220 | WRITE_WORD_F(adr, res) |
| 12221 | POST_IO |
| 12222 | RET(24) |
| 12223 | } |
| 12224 | |
| 12225 | // MOVEW |
| 12226 | OPCODE(0x3EE8) |
| 12227 | { |
| 12228 | u32 adr, res; |
| 12229 | u32 src, dst; |
| 12230 | |
| 12231 | FETCH_SWORD(adr); |
| 12232 | adr += AREG((Opcode >> 0) & 7); |
| 12233 | PRE_IO |
| 12234 | READ_WORD_F(adr, res) |
| 12235 | flag_C = 0; |
| 12236 | flag_V = 0; |
| 12237 | flag_NotZ = res; |
| 12238 | flag_N = res >> 8; |
| 12239 | adr = AREG(7); |
| 12240 | AREG(7) += 2; |
| 12241 | WRITE_WORD_F(adr, res) |
| 12242 | POST_IO |
| 12243 | RET(16) |
| 12244 | } |
| 12245 | |
| 12246 | // MOVEW |
| 12247 | OPCODE(0x3F28) |
| 12248 | { |
| 12249 | u32 adr, res; |
| 12250 | u32 src, dst; |
| 12251 | |
| 12252 | FETCH_SWORD(adr); |
| 12253 | adr += AREG((Opcode >> 0) & 7); |
| 12254 | PRE_IO |
| 12255 | READ_WORD_F(adr, res) |
| 12256 | flag_C = 0; |
| 12257 | flag_V = 0; |
| 12258 | flag_NotZ = res; |
| 12259 | flag_N = res >> 8; |
| 12260 | adr = AREG(7) - 2; |
| 12261 | AREG(7) = adr; |
| 12262 | WRITE_WORD_F(adr, res) |
| 12263 | POST_IO |
| 12264 | RET(16) |
| 12265 | } |
| 12266 | |
| 12267 | // MOVEW |
| 12268 | OPCODE(0x3030) |
| 12269 | { |
| 12270 | u32 adr, res; |
| 12271 | u32 src, dst; |
| 12272 | |
| 12273 | adr = AREG((Opcode >> 0) & 7); |
| 12274 | DECODE_EXT_WORD |
| 12275 | PRE_IO |
| 12276 | READ_WORD_F(adr, res) |
| 12277 | flag_C = 0; |
| 12278 | flag_V = 0; |
| 12279 | flag_NotZ = res; |
| 12280 | flag_N = res >> 8; |
| 12281 | DREGu16((Opcode >> 9) & 7) = res; |
| 12282 | POST_IO |
| 12283 | RET(14) |
| 12284 | } |
| 12285 | |
| 12286 | // MOVEW |
| 12287 | OPCODE(0x30B0) |
| 12288 | { |
| 12289 | u32 adr, res; |
| 12290 | u32 src, dst; |
| 12291 | |
| 12292 | adr = AREG((Opcode >> 0) & 7); |
| 12293 | DECODE_EXT_WORD |
| 12294 | PRE_IO |
| 12295 | READ_WORD_F(adr, res) |
| 12296 | flag_C = 0; |
| 12297 | flag_V = 0; |
| 12298 | flag_NotZ = res; |
| 12299 | flag_N = res >> 8; |
| 12300 | adr = AREG((Opcode >> 9) & 7); |
| 12301 | WRITE_WORD_F(adr, res) |
| 12302 | POST_IO |
| 12303 | RET(18) |
| 12304 | } |
| 12305 | |
| 12306 | // MOVEW |
| 12307 | OPCODE(0x30F0) |
| 12308 | { |
| 12309 | u32 adr, res; |
| 12310 | u32 src, dst; |
| 12311 | |
| 12312 | adr = AREG((Opcode >> 0) & 7); |
| 12313 | DECODE_EXT_WORD |
| 12314 | PRE_IO |
| 12315 | READ_WORD_F(adr, res) |
| 12316 | flag_C = 0; |
| 12317 | flag_V = 0; |
| 12318 | flag_NotZ = res; |
| 12319 | flag_N = res >> 8; |
| 12320 | adr = AREG((Opcode >> 9) & 7); |
| 12321 | AREG((Opcode >> 9) & 7) += 2; |
| 12322 | WRITE_WORD_F(adr, res) |
| 12323 | POST_IO |
| 12324 | RET(18) |
| 12325 | } |
| 12326 | |
| 12327 | // MOVEW |
| 12328 | OPCODE(0x3130) |
| 12329 | { |
| 12330 | u32 adr, res; |
| 12331 | u32 src, dst; |
| 12332 | |
| 12333 | adr = AREG((Opcode >> 0) & 7); |
| 12334 | DECODE_EXT_WORD |
| 12335 | PRE_IO |
| 12336 | READ_WORD_F(adr, res) |
| 12337 | flag_C = 0; |
| 12338 | flag_V = 0; |
| 12339 | flag_NotZ = res; |
| 12340 | flag_N = res >> 8; |
| 12341 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 12342 | AREG((Opcode >> 9) & 7) = adr; |
| 12343 | WRITE_WORD_F(adr, res) |
| 12344 | POST_IO |
| 12345 | RET(18) |
| 12346 | } |
| 12347 | |
| 12348 | // MOVEW |
| 12349 | OPCODE(0x3170) |
| 12350 | { |
| 12351 | u32 adr, res; |
| 12352 | u32 src, dst; |
| 12353 | |
| 12354 | adr = AREG((Opcode >> 0) & 7); |
| 12355 | DECODE_EXT_WORD |
| 12356 | PRE_IO |
| 12357 | READ_WORD_F(adr, res) |
| 12358 | flag_C = 0; |
| 12359 | flag_V = 0; |
| 12360 | flag_NotZ = res; |
| 12361 | flag_N = res >> 8; |
| 12362 | FETCH_SWORD(adr); |
| 12363 | adr += AREG((Opcode >> 9) & 7); |
| 12364 | WRITE_WORD_F(adr, res) |
| 12365 | POST_IO |
| 12366 | RET(22) |
| 12367 | } |
| 12368 | |
| 12369 | // MOVEW |
| 12370 | OPCODE(0x31B0) |
| 12371 | { |
| 12372 | u32 adr, res; |
| 12373 | u32 src, dst; |
| 12374 | |
| 12375 | adr = AREG((Opcode >> 0) & 7); |
| 12376 | DECODE_EXT_WORD |
| 12377 | PRE_IO |
| 12378 | READ_WORD_F(adr, res) |
| 12379 | flag_C = 0; |
| 12380 | flag_V = 0; |
| 12381 | flag_NotZ = res; |
| 12382 | flag_N = res >> 8; |
| 12383 | adr = AREG((Opcode >> 9) & 7); |
| 12384 | DECODE_EXT_WORD |
| 12385 | WRITE_WORD_F(adr, res) |
| 12386 | POST_IO |
| 12387 | RET(24) |
| 12388 | } |
| 12389 | |
| 12390 | // MOVEW |
| 12391 | OPCODE(0x31F0) |
| 12392 | { |
| 12393 | u32 adr, res; |
| 12394 | u32 src, dst; |
| 12395 | |
| 12396 | adr = AREG((Opcode >> 0) & 7); |
| 12397 | DECODE_EXT_WORD |
| 12398 | PRE_IO |
| 12399 | READ_WORD_F(adr, res) |
| 12400 | flag_C = 0; |
| 12401 | flag_V = 0; |
| 12402 | flag_NotZ = res; |
| 12403 | flag_N = res >> 8; |
| 12404 | FETCH_SWORD(adr); |
| 12405 | WRITE_WORD_F(adr, res) |
| 12406 | POST_IO |
| 12407 | RET(22) |
| 12408 | } |
| 12409 | |
| 12410 | // MOVEW |
| 12411 | OPCODE(0x33F0) |
| 12412 | { |
| 12413 | u32 adr, res; |
| 12414 | u32 src, dst; |
| 12415 | |
| 12416 | adr = AREG((Opcode >> 0) & 7); |
| 12417 | DECODE_EXT_WORD |
| 12418 | PRE_IO |
| 12419 | READ_WORD_F(adr, res) |
| 12420 | flag_C = 0; |
| 12421 | flag_V = 0; |
| 12422 | flag_NotZ = res; |
| 12423 | flag_N = res >> 8; |
| 12424 | FETCH_LONG(adr); |
| 12425 | WRITE_WORD_F(adr, res) |
| 12426 | POST_IO |
| 12427 | RET(26) |
| 12428 | } |
| 12429 | |
| 12430 | // MOVEW |
| 12431 | OPCODE(0x3EF0) |
| 12432 | { |
| 12433 | u32 adr, res; |
| 12434 | u32 src, dst; |
| 12435 | |
| 12436 | adr = AREG((Opcode >> 0) & 7); |
| 12437 | DECODE_EXT_WORD |
| 12438 | PRE_IO |
| 12439 | READ_WORD_F(adr, res) |
| 12440 | flag_C = 0; |
| 12441 | flag_V = 0; |
| 12442 | flag_NotZ = res; |
| 12443 | flag_N = res >> 8; |
| 12444 | adr = AREG(7); |
| 12445 | AREG(7) += 2; |
| 12446 | WRITE_WORD_F(adr, res) |
| 12447 | POST_IO |
| 12448 | RET(18) |
| 12449 | } |
| 12450 | |
| 12451 | // MOVEW |
| 12452 | OPCODE(0x3F30) |
| 12453 | { |
| 12454 | u32 adr, res; |
| 12455 | u32 src, dst; |
| 12456 | |
| 12457 | adr = AREG((Opcode >> 0) & 7); |
| 12458 | DECODE_EXT_WORD |
| 12459 | PRE_IO |
| 12460 | READ_WORD_F(adr, res) |
| 12461 | flag_C = 0; |
| 12462 | flag_V = 0; |
| 12463 | flag_NotZ = res; |
| 12464 | flag_N = res >> 8; |
| 12465 | adr = AREG(7) - 2; |
| 12466 | AREG(7) = adr; |
| 12467 | WRITE_WORD_F(adr, res) |
| 12468 | POST_IO |
| 12469 | RET(18) |
| 12470 | } |
| 12471 | |
| 12472 | // MOVEW |
| 12473 | OPCODE(0x3038) |
| 12474 | { |
| 12475 | u32 adr, res; |
| 12476 | u32 src, dst; |
| 12477 | |
| 12478 | FETCH_SWORD(adr); |
| 12479 | PRE_IO |
| 12480 | READ_WORD_F(adr, res) |
| 12481 | flag_C = 0; |
| 12482 | flag_V = 0; |
| 12483 | flag_NotZ = res; |
| 12484 | flag_N = res >> 8; |
| 12485 | DREGu16((Opcode >> 9) & 7) = res; |
| 12486 | POST_IO |
| 12487 | RET(12) |
| 12488 | } |
| 12489 | |
| 12490 | // MOVEW |
| 12491 | OPCODE(0x30B8) |
| 12492 | { |
| 12493 | u32 adr, res; |
| 12494 | u32 src, dst; |
| 12495 | |
| 12496 | FETCH_SWORD(adr); |
| 12497 | PRE_IO |
| 12498 | READ_WORD_F(adr, res) |
| 12499 | flag_C = 0; |
| 12500 | flag_V = 0; |
| 12501 | flag_NotZ = res; |
| 12502 | flag_N = res >> 8; |
| 12503 | adr = AREG((Opcode >> 9) & 7); |
| 12504 | WRITE_WORD_F(adr, res) |
| 12505 | POST_IO |
| 12506 | RET(16) |
| 12507 | } |
| 12508 | |
| 12509 | // MOVEW |
| 12510 | OPCODE(0x30F8) |
| 12511 | { |
| 12512 | u32 adr, res; |
| 12513 | u32 src, dst; |
| 12514 | |
| 12515 | FETCH_SWORD(adr); |
| 12516 | PRE_IO |
| 12517 | READ_WORD_F(adr, res) |
| 12518 | flag_C = 0; |
| 12519 | flag_V = 0; |
| 12520 | flag_NotZ = res; |
| 12521 | flag_N = res >> 8; |
| 12522 | adr = AREG((Opcode >> 9) & 7); |
| 12523 | AREG((Opcode >> 9) & 7) += 2; |
| 12524 | WRITE_WORD_F(adr, res) |
| 12525 | POST_IO |
| 12526 | RET(16) |
| 12527 | } |
| 12528 | |
| 12529 | // MOVEW |
| 12530 | OPCODE(0x3138) |
| 12531 | { |
| 12532 | u32 adr, res; |
| 12533 | u32 src, dst; |
| 12534 | |
| 12535 | FETCH_SWORD(adr); |
| 12536 | PRE_IO |
| 12537 | READ_WORD_F(adr, res) |
| 12538 | flag_C = 0; |
| 12539 | flag_V = 0; |
| 12540 | flag_NotZ = res; |
| 12541 | flag_N = res >> 8; |
| 12542 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 12543 | AREG((Opcode >> 9) & 7) = adr; |
| 12544 | WRITE_WORD_F(adr, res) |
| 12545 | POST_IO |
| 12546 | RET(16) |
| 12547 | } |
| 12548 | |
| 12549 | // MOVEW |
| 12550 | OPCODE(0x3178) |
| 12551 | { |
| 12552 | u32 adr, res; |
| 12553 | u32 src, dst; |
| 12554 | |
| 12555 | FETCH_SWORD(adr); |
| 12556 | PRE_IO |
| 12557 | READ_WORD_F(adr, res) |
| 12558 | flag_C = 0; |
| 12559 | flag_V = 0; |
| 12560 | flag_NotZ = res; |
| 12561 | flag_N = res >> 8; |
| 12562 | FETCH_SWORD(adr); |
| 12563 | adr += AREG((Opcode >> 9) & 7); |
| 12564 | WRITE_WORD_F(adr, res) |
| 12565 | POST_IO |
| 12566 | RET(20) |
| 12567 | } |
| 12568 | |
| 12569 | // MOVEW |
| 12570 | OPCODE(0x31B8) |
| 12571 | { |
| 12572 | u32 adr, res; |
| 12573 | u32 src, dst; |
| 12574 | |
| 12575 | FETCH_SWORD(adr); |
| 12576 | PRE_IO |
| 12577 | READ_WORD_F(adr, res) |
| 12578 | flag_C = 0; |
| 12579 | flag_V = 0; |
| 12580 | flag_NotZ = res; |
| 12581 | flag_N = res >> 8; |
| 12582 | adr = AREG((Opcode >> 9) & 7); |
| 12583 | DECODE_EXT_WORD |
| 12584 | WRITE_WORD_F(adr, res) |
| 12585 | POST_IO |
| 12586 | RET(22) |
| 12587 | } |
| 12588 | |
| 12589 | // MOVEW |
| 12590 | OPCODE(0x31F8) |
| 12591 | { |
| 12592 | u32 adr, res; |
| 12593 | u32 src, dst; |
| 12594 | |
| 12595 | FETCH_SWORD(adr); |
| 12596 | PRE_IO |
| 12597 | READ_WORD_F(adr, res) |
| 12598 | flag_C = 0; |
| 12599 | flag_V = 0; |
| 12600 | flag_NotZ = res; |
| 12601 | flag_N = res >> 8; |
| 12602 | FETCH_SWORD(adr); |
| 12603 | WRITE_WORD_F(adr, res) |
| 12604 | POST_IO |
| 12605 | RET(20) |
| 12606 | } |
| 12607 | |
| 12608 | // MOVEW |
| 12609 | OPCODE(0x33F8) |
| 12610 | { |
| 12611 | u32 adr, res; |
| 12612 | u32 src, dst; |
| 12613 | |
| 12614 | FETCH_SWORD(adr); |
| 12615 | PRE_IO |
| 12616 | READ_WORD_F(adr, res) |
| 12617 | flag_C = 0; |
| 12618 | flag_V = 0; |
| 12619 | flag_NotZ = res; |
| 12620 | flag_N = res >> 8; |
| 12621 | FETCH_LONG(adr); |
| 12622 | WRITE_WORD_F(adr, res) |
| 12623 | POST_IO |
| 12624 | RET(24) |
| 12625 | } |
| 12626 | |
| 12627 | // MOVEW |
| 12628 | OPCODE(0x3EF8) |
| 12629 | { |
| 12630 | u32 adr, res; |
| 12631 | u32 src, dst; |
| 12632 | |
| 12633 | FETCH_SWORD(adr); |
| 12634 | PRE_IO |
| 12635 | READ_WORD_F(adr, res) |
| 12636 | flag_C = 0; |
| 12637 | flag_V = 0; |
| 12638 | flag_NotZ = res; |
| 12639 | flag_N = res >> 8; |
| 12640 | adr = AREG(7); |
| 12641 | AREG(7) += 2; |
| 12642 | WRITE_WORD_F(adr, res) |
| 12643 | POST_IO |
| 12644 | RET(16) |
| 12645 | } |
| 12646 | |
| 12647 | // MOVEW |
| 12648 | OPCODE(0x3F38) |
| 12649 | { |
| 12650 | u32 adr, res; |
| 12651 | u32 src, dst; |
| 12652 | |
| 12653 | FETCH_SWORD(adr); |
| 12654 | PRE_IO |
| 12655 | READ_WORD_F(adr, res) |
| 12656 | flag_C = 0; |
| 12657 | flag_V = 0; |
| 12658 | flag_NotZ = res; |
| 12659 | flag_N = res >> 8; |
| 12660 | adr = AREG(7) - 2; |
| 12661 | AREG(7) = adr; |
| 12662 | WRITE_WORD_F(adr, res) |
| 12663 | POST_IO |
| 12664 | RET(16) |
| 12665 | } |
| 12666 | |
| 12667 | // MOVEW |
| 12668 | OPCODE(0x3039) |
| 12669 | { |
| 12670 | u32 adr, res; |
| 12671 | u32 src, dst; |
| 12672 | |
| 12673 | FETCH_LONG(adr); |
| 12674 | PRE_IO |
| 12675 | READ_WORD_F(adr, res) |
| 12676 | flag_C = 0; |
| 12677 | flag_V = 0; |
| 12678 | flag_NotZ = res; |
| 12679 | flag_N = res >> 8; |
| 12680 | DREGu16((Opcode >> 9) & 7) = res; |
| 12681 | POST_IO |
| 12682 | RET(16) |
| 12683 | } |
| 12684 | |
| 12685 | // MOVEW |
| 12686 | OPCODE(0x30B9) |
| 12687 | { |
| 12688 | u32 adr, res; |
| 12689 | u32 src, dst; |
| 12690 | |
| 12691 | FETCH_LONG(adr); |
| 12692 | PRE_IO |
| 12693 | READ_WORD_F(adr, res) |
| 12694 | flag_C = 0; |
| 12695 | flag_V = 0; |
| 12696 | flag_NotZ = res; |
| 12697 | flag_N = res >> 8; |
| 12698 | adr = AREG((Opcode >> 9) & 7); |
| 12699 | WRITE_WORD_F(adr, res) |
| 12700 | POST_IO |
| 12701 | RET(20) |
| 12702 | } |
| 12703 | |
| 12704 | // MOVEW |
| 12705 | OPCODE(0x30F9) |
| 12706 | { |
| 12707 | u32 adr, res; |
| 12708 | u32 src, dst; |
| 12709 | |
| 12710 | FETCH_LONG(adr); |
| 12711 | PRE_IO |
| 12712 | READ_WORD_F(adr, res) |
| 12713 | flag_C = 0; |
| 12714 | flag_V = 0; |
| 12715 | flag_NotZ = res; |
| 12716 | flag_N = res >> 8; |
| 12717 | adr = AREG((Opcode >> 9) & 7); |
| 12718 | AREG((Opcode >> 9) & 7) += 2; |
| 12719 | WRITE_WORD_F(adr, res) |
| 12720 | POST_IO |
| 12721 | RET(20) |
| 12722 | } |
| 12723 | |
| 12724 | // MOVEW |
| 12725 | OPCODE(0x3139) |
| 12726 | { |
| 12727 | u32 adr, res; |
| 12728 | u32 src, dst; |
| 12729 | |
| 12730 | FETCH_LONG(adr); |
| 12731 | PRE_IO |
| 12732 | READ_WORD_F(adr, res) |
| 12733 | flag_C = 0; |
| 12734 | flag_V = 0; |
| 12735 | flag_NotZ = res; |
| 12736 | flag_N = res >> 8; |
| 12737 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 12738 | AREG((Opcode >> 9) & 7) = adr; |
| 12739 | WRITE_WORD_F(adr, res) |
| 12740 | POST_IO |
| 12741 | RET(20) |
| 12742 | } |
| 12743 | |
| 12744 | // MOVEW |
| 12745 | OPCODE(0x3179) |
| 12746 | { |
| 12747 | u32 adr, res; |
| 12748 | u32 src, dst; |
| 12749 | |
| 12750 | FETCH_LONG(adr); |
| 12751 | PRE_IO |
| 12752 | READ_WORD_F(adr, res) |
| 12753 | flag_C = 0; |
| 12754 | flag_V = 0; |
| 12755 | flag_NotZ = res; |
| 12756 | flag_N = res >> 8; |
| 12757 | FETCH_SWORD(adr); |
| 12758 | adr += AREG((Opcode >> 9) & 7); |
| 12759 | WRITE_WORD_F(adr, res) |
| 12760 | POST_IO |
| 12761 | RET(24) |
| 12762 | } |
| 12763 | |
| 12764 | // MOVEW |
| 12765 | OPCODE(0x31B9) |
| 12766 | { |
| 12767 | u32 adr, res; |
| 12768 | u32 src, dst; |
| 12769 | |
| 12770 | FETCH_LONG(adr); |
| 12771 | PRE_IO |
| 12772 | READ_WORD_F(adr, res) |
| 12773 | flag_C = 0; |
| 12774 | flag_V = 0; |
| 12775 | flag_NotZ = res; |
| 12776 | flag_N = res >> 8; |
| 12777 | adr = AREG((Opcode >> 9) & 7); |
| 12778 | DECODE_EXT_WORD |
| 12779 | WRITE_WORD_F(adr, res) |
| 12780 | POST_IO |
| 12781 | RET(26) |
| 12782 | } |
| 12783 | |
| 12784 | // MOVEW |
| 12785 | OPCODE(0x31F9) |
| 12786 | { |
| 12787 | u32 adr, res; |
| 12788 | u32 src, dst; |
| 12789 | |
| 12790 | FETCH_LONG(adr); |
| 12791 | PRE_IO |
| 12792 | READ_WORD_F(adr, res) |
| 12793 | flag_C = 0; |
| 12794 | flag_V = 0; |
| 12795 | flag_NotZ = res; |
| 12796 | flag_N = res >> 8; |
| 12797 | FETCH_SWORD(adr); |
| 12798 | WRITE_WORD_F(adr, res) |
| 12799 | POST_IO |
| 12800 | RET(24) |
| 12801 | } |
| 12802 | |
| 12803 | // MOVEW |
| 12804 | OPCODE(0x33F9) |
| 12805 | { |
| 12806 | u32 adr, res; |
| 12807 | u32 src, dst; |
| 12808 | |
| 12809 | FETCH_LONG(adr); |
| 12810 | PRE_IO |
| 12811 | READ_WORD_F(adr, res) |
| 12812 | flag_C = 0; |
| 12813 | flag_V = 0; |
| 12814 | flag_NotZ = res; |
| 12815 | flag_N = res >> 8; |
| 12816 | FETCH_LONG(adr); |
| 12817 | WRITE_WORD_F(adr, res) |
| 12818 | POST_IO |
| 12819 | RET(28) |
| 12820 | } |
| 12821 | |
| 12822 | // MOVEW |
| 12823 | OPCODE(0x3EF9) |
| 12824 | { |
| 12825 | u32 adr, res; |
| 12826 | u32 src, dst; |
| 12827 | |
| 12828 | FETCH_LONG(adr); |
| 12829 | PRE_IO |
| 12830 | READ_WORD_F(adr, res) |
| 12831 | flag_C = 0; |
| 12832 | flag_V = 0; |
| 12833 | flag_NotZ = res; |
| 12834 | flag_N = res >> 8; |
| 12835 | adr = AREG(7); |
| 12836 | AREG(7) += 2; |
| 12837 | WRITE_WORD_F(adr, res) |
| 12838 | POST_IO |
| 12839 | RET(20) |
| 12840 | } |
| 12841 | |
| 12842 | // MOVEW |
| 12843 | OPCODE(0x3F39) |
| 12844 | { |
| 12845 | u32 adr, res; |
| 12846 | u32 src, dst; |
| 12847 | |
| 12848 | FETCH_LONG(adr); |
| 12849 | PRE_IO |
| 12850 | READ_WORD_F(adr, res) |
| 12851 | flag_C = 0; |
| 12852 | flag_V = 0; |
| 12853 | flag_NotZ = res; |
| 12854 | flag_N = res >> 8; |
| 12855 | adr = AREG(7) - 2; |
| 12856 | AREG(7) = adr; |
| 12857 | WRITE_WORD_F(adr, res) |
| 12858 | POST_IO |
| 12859 | RET(20) |
| 12860 | } |
| 12861 | |
| 12862 | // MOVEW |
| 12863 | OPCODE(0x303A) |
| 12864 | { |
| 12865 | u32 adr, res; |
| 12866 | u32 src, dst; |
| 12867 | |
| 12868 | adr = GET_SWORD + GET_PC; |
| 12869 | PC++; |
| 12870 | PRE_IO |
| 12871 | READ_WORD_F(adr, res) |
| 12872 | flag_C = 0; |
| 12873 | flag_V = 0; |
| 12874 | flag_NotZ = res; |
| 12875 | flag_N = res >> 8; |
| 12876 | DREGu16((Opcode >> 9) & 7) = res; |
| 12877 | POST_IO |
| 12878 | RET(12) |
| 12879 | } |
| 12880 | |
| 12881 | // MOVEW |
| 12882 | OPCODE(0x30BA) |
| 12883 | { |
| 12884 | u32 adr, res; |
| 12885 | u32 src, dst; |
| 12886 | |
| 12887 | adr = GET_SWORD + GET_PC; |
| 12888 | PC++; |
| 12889 | PRE_IO |
| 12890 | READ_WORD_F(adr, res) |
| 12891 | flag_C = 0; |
| 12892 | flag_V = 0; |
| 12893 | flag_NotZ = res; |
| 12894 | flag_N = res >> 8; |
| 12895 | adr = AREG((Opcode >> 9) & 7); |
| 12896 | WRITE_WORD_F(adr, res) |
| 12897 | POST_IO |
| 12898 | RET(16) |
| 12899 | } |
| 12900 | |
| 12901 | // MOVEW |
| 12902 | OPCODE(0x30FA) |
| 12903 | { |
| 12904 | u32 adr, res; |
| 12905 | u32 src, dst; |
| 12906 | |
| 12907 | adr = GET_SWORD + GET_PC; |
| 12908 | PC++; |
| 12909 | PRE_IO |
| 12910 | READ_WORD_F(adr, res) |
| 12911 | flag_C = 0; |
| 12912 | flag_V = 0; |
| 12913 | flag_NotZ = res; |
| 12914 | flag_N = res >> 8; |
| 12915 | adr = AREG((Opcode >> 9) & 7); |
| 12916 | AREG((Opcode >> 9) & 7) += 2; |
| 12917 | WRITE_WORD_F(adr, res) |
| 12918 | POST_IO |
| 12919 | RET(16) |
| 12920 | } |
| 12921 | |
| 12922 | // MOVEW |
| 12923 | OPCODE(0x313A) |
| 12924 | { |
| 12925 | u32 adr, res; |
| 12926 | u32 src, dst; |
| 12927 | |
| 12928 | adr = GET_SWORD + GET_PC; |
| 12929 | PC++; |
| 12930 | PRE_IO |
| 12931 | READ_WORD_F(adr, res) |
| 12932 | flag_C = 0; |
| 12933 | flag_V = 0; |
| 12934 | flag_NotZ = res; |
| 12935 | flag_N = res >> 8; |
| 12936 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 12937 | AREG((Opcode >> 9) & 7) = adr; |
| 12938 | WRITE_WORD_F(adr, res) |
| 12939 | POST_IO |
| 12940 | RET(16) |
| 12941 | } |
| 12942 | |
| 12943 | // MOVEW |
| 12944 | OPCODE(0x317A) |
| 12945 | { |
| 12946 | u32 adr, res; |
| 12947 | u32 src, dst; |
| 12948 | |
| 12949 | adr = GET_SWORD + GET_PC; |
| 12950 | PC++; |
| 12951 | PRE_IO |
| 12952 | READ_WORD_F(adr, res) |
| 12953 | flag_C = 0; |
| 12954 | flag_V = 0; |
| 12955 | flag_NotZ = res; |
| 12956 | flag_N = res >> 8; |
| 12957 | FETCH_SWORD(adr); |
| 12958 | adr += AREG((Opcode >> 9) & 7); |
| 12959 | WRITE_WORD_F(adr, res) |
| 12960 | POST_IO |
| 12961 | RET(20) |
| 12962 | } |
| 12963 | |
| 12964 | // MOVEW |
| 12965 | OPCODE(0x31BA) |
| 12966 | { |
| 12967 | u32 adr, res; |
| 12968 | u32 src, dst; |
| 12969 | |
| 12970 | adr = GET_SWORD + GET_PC; |
| 12971 | PC++; |
| 12972 | PRE_IO |
| 12973 | READ_WORD_F(adr, res) |
| 12974 | flag_C = 0; |
| 12975 | flag_V = 0; |
| 12976 | flag_NotZ = res; |
| 12977 | flag_N = res >> 8; |
| 12978 | adr = AREG((Opcode >> 9) & 7); |
| 12979 | DECODE_EXT_WORD |
| 12980 | WRITE_WORD_F(adr, res) |
| 12981 | POST_IO |
| 12982 | RET(22) |
| 12983 | } |
| 12984 | |
| 12985 | // MOVEW |
| 12986 | OPCODE(0x31FA) |
| 12987 | { |
| 12988 | u32 adr, res; |
| 12989 | u32 src, dst; |
| 12990 | |
| 12991 | adr = GET_SWORD + GET_PC; |
| 12992 | PC++; |
| 12993 | PRE_IO |
| 12994 | READ_WORD_F(adr, res) |
| 12995 | flag_C = 0; |
| 12996 | flag_V = 0; |
| 12997 | flag_NotZ = res; |
| 12998 | flag_N = res >> 8; |
| 12999 | FETCH_SWORD(adr); |
| 13000 | WRITE_WORD_F(adr, res) |
| 13001 | POST_IO |
| 13002 | RET(20) |
| 13003 | } |
| 13004 | |
| 13005 | // MOVEW |
| 13006 | OPCODE(0x33FA) |
| 13007 | { |
| 13008 | u32 adr, res; |
| 13009 | u32 src, dst; |
| 13010 | |
| 13011 | adr = GET_SWORD + GET_PC; |
| 13012 | PC++; |
| 13013 | PRE_IO |
| 13014 | READ_WORD_F(adr, res) |
| 13015 | flag_C = 0; |
| 13016 | flag_V = 0; |
| 13017 | flag_NotZ = res; |
| 13018 | flag_N = res >> 8; |
| 13019 | FETCH_LONG(adr); |
| 13020 | WRITE_WORD_F(adr, res) |
| 13021 | POST_IO |
| 13022 | RET(24) |
| 13023 | } |
| 13024 | |
| 13025 | // MOVEW |
| 13026 | OPCODE(0x3EFA) |
| 13027 | { |
| 13028 | u32 adr, res; |
| 13029 | u32 src, dst; |
| 13030 | |
| 13031 | adr = GET_SWORD + GET_PC; |
| 13032 | PC++; |
| 13033 | PRE_IO |
| 13034 | READ_WORD_F(adr, res) |
| 13035 | flag_C = 0; |
| 13036 | flag_V = 0; |
| 13037 | flag_NotZ = res; |
| 13038 | flag_N = res >> 8; |
| 13039 | adr = AREG(7); |
| 13040 | AREG(7) += 2; |
| 13041 | WRITE_WORD_F(adr, res) |
| 13042 | POST_IO |
| 13043 | RET(16) |
| 13044 | } |
| 13045 | |
| 13046 | // MOVEW |
| 13047 | OPCODE(0x3F3A) |
| 13048 | { |
| 13049 | u32 adr, res; |
| 13050 | u32 src, dst; |
| 13051 | |
| 13052 | adr = GET_SWORD + GET_PC; |
| 13053 | PC++; |
| 13054 | PRE_IO |
| 13055 | READ_WORD_F(adr, res) |
| 13056 | flag_C = 0; |
| 13057 | flag_V = 0; |
| 13058 | flag_NotZ = res; |
| 13059 | flag_N = res >> 8; |
| 13060 | adr = AREG(7) - 2; |
| 13061 | AREG(7) = adr; |
| 13062 | WRITE_WORD_F(adr, res) |
| 13063 | POST_IO |
| 13064 | RET(16) |
| 13065 | } |
| 13066 | |
| 13067 | // MOVEW |
| 13068 | OPCODE(0x303B) |
| 13069 | { |
| 13070 | u32 adr, res; |
| 13071 | u32 src, dst; |
| 13072 | |
| 13073 | adr = GET_PC; |
| 13074 | DECODE_EXT_WORD |
| 13075 | PRE_IO |
| 13076 | READ_WORD_F(adr, res) |
| 13077 | flag_C = 0; |
| 13078 | flag_V = 0; |
| 13079 | flag_NotZ = res; |
| 13080 | flag_N = res >> 8; |
| 13081 | DREGu16((Opcode >> 9) & 7) = res; |
| 13082 | POST_IO |
| 13083 | RET(14) |
| 13084 | } |
| 13085 | |
| 13086 | // MOVEW |
| 13087 | OPCODE(0x30BB) |
| 13088 | { |
| 13089 | u32 adr, res; |
| 13090 | u32 src, dst; |
| 13091 | |
| 13092 | adr = GET_PC; |
| 13093 | DECODE_EXT_WORD |
| 13094 | PRE_IO |
| 13095 | READ_WORD_F(adr, res) |
| 13096 | flag_C = 0; |
| 13097 | flag_V = 0; |
| 13098 | flag_NotZ = res; |
| 13099 | flag_N = res >> 8; |
| 13100 | adr = AREG((Opcode >> 9) & 7); |
| 13101 | WRITE_WORD_F(adr, res) |
| 13102 | POST_IO |
| 13103 | RET(18) |
| 13104 | } |
| 13105 | |
| 13106 | // MOVEW |
| 13107 | OPCODE(0x30FB) |
| 13108 | { |
| 13109 | u32 adr, res; |
| 13110 | u32 src, dst; |
| 13111 | |
| 13112 | adr = GET_PC; |
| 13113 | DECODE_EXT_WORD |
| 13114 | PRE_IO |
| 13115 | READ_WORD_F(adr, res) |
| 13116 | flag_C = 0; |
| 13117 | flag_V = 0; |
| 13118 | flag_NotZ = res; |
| 13119 | flag_N = res >> 8; |
| 13120 | adr = AREG((Opcode >> 9) & 7); |
| 13121 | AREG((Opcode >> 9) & 7) += 2; |
| 13122 | WRITE_WORD_F(adr, res) |
| 13123 | POST_IO |
| 13124 | RET(18) |
| 13125 | } |
| 13126 | |
| 13127 | // MOVEW |
| 13128 | OPCODE(0x313B) |
| 13129 | { |
| 13130 | u32 adr, res; |
| 13131 | u32 src, dst; |
| 13132 | |
| 13133 | adr = GET_PC; |
| 13134 | DECODE_EXT_WORD |
| 13135 | PRE_IO |
| 13136 | READ_WORD_F(adr, res) |
| 13137 | flag_C = 0; |
| 13138 | flag_V = 0; |
| 13139 | flag_NotZ = res; |
| 13140 | flag_N = res >> 8; |
| 13141 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 13142 | AREG((Opcode >> 9) & 7) = adr; |
| 13143 | WRITE_WORD_F(adr, res) |
| 13144 | POST_IO |
| 13145 | RET(18) |
| 13146 | } |
| 13147 | |
| 13148 | // MOVEW |
| 13149 | OPCODE(0x317B) |
| 13150 | { |
| 13151 | u32 adr, res; |
| 13152 | u32 src, dst; |
| 13153 | |
| 13154 | adr = GET_PC; |
| 13155 | DECODE_EXT_WORD |
| 13156 | PRE_IO |
| 13157 | READ_WORD_F(adr, res) |
| 13158 | flag_C = 0; |
| 13159 | flag_V = 0; |
| 13160 | flag_NotZ = res; |
| 13161 | flag_N = res >> 8; |
| 13162 | FETCH_SWORD(adr); |
| 13163 | adr += AREG((Opcode >> 9) & 7); |
| 13164 | WRITE_WORD_F(adr, res) |
| 13165 | POST_IO |
| 13166 | RET(22) |
| 13167 | } |
| 13168 | |
| 13169 | // MOVEW |
| 13170 | OPCODE(0x31BB) |
| 13171 | { |
| 13172 | u32 adr, res; |
| 13173 | u32 src, dst; |
| 13174 | |
| 13175 | adr = GET_PC; |
| 13176 | DECODE_EXT_WORD |
| 13177 | PRE_IO |
| 13178 | READ_WORD_F(adr, res) |
| 13179 | flag_C = 0; |
| 13180 | flag_V = 0; |
| 13181 | flag_NotZ = res; |
| 13182 | flag_N = res >> 8; |
| 13183 | adr = AREG((Opcode >> 9) & 7); |
| 13184 | DECODE_EXT_WORD |
| 13185 | WRITE_WORD_F(adr, res) |
| 13186 | POST_IO |
| 13187 | RET(24) |
| 13188 | } |
| 13189 | |
| 13190 | // MOVEW |
| 13191 | OPCODE(0x31FB) |
| 13192 | { |
| 13193 | u32 adr, res; |
| 13194 | u32 src, dst; |
| 13195 | |
| 13196 | adr = GET_PC; |
| 13197 | DECODE_EXT_WORD |
| 13198 | PRE_IO |
| 13199 | READ_WORD_F(adr, res) |
| 13200 | flag_C = 0; |
| 13201 | flag_V = 0; |
| 13202 | flag_NotZ = res; |
| 13203 | flag_N = res >> 8; |
| 13204 | FETCH_SWORD(adr); |
| 13205 | WRITE_WORD_F(adr, res) |
| 13206 | POST_IO |
| 13207 | RET(22) |
| 13208 | } |
| 13209 | |
| 13210 | // MOVEW |
| 13211 | OPCODE(0x33FB) |
| 13212 | { |
| 13213 | u32 adr, res; |
| 13214 | u32 src, dst; |
| 13215 | |
| 13216 | adr = GET_PC; |
| 13217 | DECODE_EXT_WORD |
| 13218 | PRE_IO |
| 13219 | READ_WORD_F(adr, res) |
| 13220 | flag_C = 0; |
| 13221 | flag_V = 0; |
| 13222 | flag_NotZ = res; |
| 13223 | flag_N = res >> 8; |
| 13224 | FETCH_LONG(adr); |
| 13225 | WRITE_WORD_F(adr, res) |
| 13226 | POST_IO |
| 13227 | RET(26) |
| 13228 | } |
| 13229 | |
| 13230 | // MOVEW |
| 13231 | OPCODE(0x3EFB) |
| 13232 | { |
| 13233 | u32 adr, res; |
| 13234 | u32 src, dst; |
| 13235 | |
| 13236 | adr = GET_PC; |
| 13237 | DECODE_EXT_WORD |
| 13238 | PRE_IO |
| 13239 | READ_WORD_F(adr, res) |
| 13240 | flag_C = 0; |
| 13241 | flag_V = 0; |
| 13242 | flag_NotZ = res; |
| 13243 | flag_N = res >> 8; |
| 13244 | adr = AREG(7); |
| 13245 | AREG(7) += 2; |
| 13246 | WRITE_WORD_F(adr, res) |
| 13247 | POST_IO |
| 13248 | RET(18) |
| 13249 | } |
| 13250 | |
| 13251 | // MOVEW |
| 13252 | OPCODE(0x3F3B) |
| 13253 | { |
| 13254 | u32 adr, res; |
| 13255 | u32 src, dst; |
| 13256 | |
| 13257 | adr = GET_PC; |
| 13258 | DECODE_EXT_WORD |
| 13259 | PRE_IO |
| 13260 | READ_WORD_F(adr, res) |
| 13261 | flag_C = 0; |
| 13262 | flag_V = 0; |
| 13263 | flag_NotZ = res; |
| 13264 | flag_N = res >> 8; |
| 13265 | adr = AREG(7) - 2; |
| 13266 | AREG(7) = adr; |
| 13267 | WRITE_WORD_F(adr, res) |
| 13268 | POST_IO |
| 13269 | RET(18) |
| 13270 | } |
| 13271 | |
| 13272 | // MOVEW |
| 13273 | OPCODE(0x303C) |
| 13274 | { |
| 13275 | u32 adr, res; |
| 13276 | u32 src, dst; |
| 13277 | |
| 13278 | FETCH_WORD(res); |
| 13279 | flag_C = 0; |
| 13280 | flag_V = 0; |
| 13281 | flag_NotZ = res; |
| 13282 | flag_N = res >> 8; |
| 13283 | DREGu16((Opcode >> 9) & 7) = res; |
| 13284 | RET(8) |
| 13285 | } |
| 13286 | |
| 13287 | // MOVEW |
| 13288 | OPCODE(0x30BC) |
| 13289 | { |
| 13290 | u32 adr, res; |
| 13291 | u32 src, dst; |
| 13292 | |
| 13293 | FETCH_WORD(res); |
| 13294 | flag_C = 0; |
| 13295 | flag_V = 0; |
| 13296 | flag_NotZ = res; |
| 13297 | flag_N = res >> 8; |
| 13298 | adr = AREG((Opcode >> 9) & 7); |
| 13299 | PRE_IO |
| 13300 | WRITE_WORD_F(adr, res) |
| 13301 | POST_IO |
| 13302 | RET(12) |
| 13303 | } |
| 13304 | |
| 13305 | // MOVEW |
| 13306 | OPCODE(0x30FC) |
| 13307 | { |
| 13308 | u32 adr, res; |
| 13309 | u32 src, dst; |
| 13310 | |
| 13311 | FETCH_WORD(res); |
| 13312 | flag_C = 0; |
| 13313 | flag_V = 0; |
| 13314 | flag_NotZ = res; |
| 13315 | flag_N = res >> 8; |
| 13316 | adr = AREG((Opcode >> 9) & 7); |
| 13317 | AREG((Opcode >> 9) & 7) += 2; |
| 13318 | PRE_IO |
| 13319 | WRITE_WORD_F(adr, res) |
| 13320 | POST_IO |
| 13321 | RET(12) |
| 13322 | } |
| 13323 | |
| 13324 | // MOVEW |
| 13325 | OPCODE(0x313C) |
| 13326 | { |
| 13327 | u32 adr, res; |
| 13328 | u32 src, dst; |
| 13329 | |
| 13330 | FETCH_WORD(res); |
| 13331 | flag_C = 0; |
| 13332 | flag_V = 0; |
| 13333 | flag_NotZ = res; |
| 13334 | flag_N = res >> 8; |
| 13335 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 13336 | AREG((Opcode >> 9) & 7) = adr; |
| 13337 | PRE_IO |
| 13338 | WRITE_WORD_F(adr, res) |
| 13339 | POST_IO |
| 13340 | RET(12) |
| 13341 | } |
| 13342 | |
| 13343 | // MOVEW |
| 13344 | OPCODE(0x317C) |
| 13345 | { |
| 13346 | u32 adr, res; |
| 13347 | u32 src, dst; |
| 13348 | |
| 13349 | FETCH_WORD(res); |
| 13350 | flag_C = 0; |
| 13351 | flag_V = 0; |
| 13352 | flag_NotZ = res; |
| 13353 | flag_N = res >> 8; |
| 13354 | FETCH_SWORD(adr); |
| 13355 | adr += AREG((Opcode >> 9) & 7); |
| 13356 | PRE_IO |
| 13357 | WRITE_WORD_F(adr, res) |
| 13358 | POST_IO |
| 13359 | RET(16) |
| 13360 | } |
| 13361 | |
| 13362 | // MOVEW |
| 13363 | OPCODE(0x31BC) |
| 13364 | { |
| 13365 | u32 adr, res; |
| 13366 | u32 src, dst; |
| 13367 | |
| 13368 | FETCH_WORD(res); |
| 13369 | flag_C = 0; |
| 13370 | flag_V = 0; |
| 13371 | flag_NotZ = res; |
| 13372 | flag_N = res >> 8; |
| 13373 | adr = AREG((Opcode >> 9) & 7); |
| 13374 | DECODE_EXT_WORD |
| 13375 | PRE_IO |
| 13376 | WRITE_WORD_F(adr, res) |
| 13377 | POST_IO |
| 13378 | RET(18) |
| 13379 | } |
| 13380 | |
| 13381 | // MOVEW |
| 13382 | OPCODE(0x31FC) |
| 13383 | { |
| 13384 | u32 adr, res; |
| 13385 | u32 src, dst; |
| 13386 | |
| 13387 | FETCH_WORD(res); |
| 13388 | flag_C = 0; |
| 13389 | flag_V = 0; |
| 13390 | flag_NotZ = res; |
| 13391 | flag_N = res >> 8; |
| 13392 | FETCH_SWORD(adr); |
| 13393 | PRE_IO |
| 13394 | WRITE_WORD_F(adr, res) |
| 13395 | POST_IO |
| 13396 | RET(16) |
| 13397 | } |
| 13398 | |
| 13399 | // MOVEW |
| 13400 | OPCODE(0x33FC) |
| 13401 | { |
| 13402 | u32 adr, res; |
| 13403 | u32 src, dst; |
| 13404 | |
| 13405 | FETCH_WORD(res); |
| 13406 | flag_C = 0; |
| 13407 | flag_V = 0; |
| 13408 | flag_NotZ = res; |
| 13409 | flag_N = res >> 8; |
| 13410 | FETCH_LONG(adr); |
| 13411 | PRE_IO |
| 13412 | WRITE_WORD_F(adr, res) |
| 13413 | POST_IO |
| 13414 | RET(20) |
| 13415 | } |
| 13416 | |
| 13417 | // MOVEW |
| 13418 | OPCODE(0x3EFC) |
| 13419 | { |
| 13420 | u32 adr, res; |
| 13421 | u32 src, dst; |
| 13422 | |
| 13423 | FETCH_WORD(res); |
| 13424 | flag_C = 0; |
| 13425 | flag_V = 0; |
| 13426 | flag_NotZ = res; |
| 13427 | flag_N = res >> 8; |
| 13428 | adr = AREG(7); |
| 13429 | AREG(7) += 2; |
| 13430 | PRE_IO |
| 13431 | WRITE_WORD_F(adr, res) |
| 13432 | POST_IO |
| 13433 | RET(12) |
| 13434 | } |
| 13435 | |
| 13436 | // MOVEW |
| 13437 | OPCODE(0x3F3C) |
| 13438 | { |
| 13439 | u32 adr, res; |
| 13440 | u32 src, dst; |
| 13441 | |
| 13442 | FETCH_WORD(res); |
| 13443 | flag_C = 0; |
| 13444 | flag_V = 0; |
| 13445 | flag_NotZ = res; |
| 13446 | flag_N = res >> 8; |
| 13447 | adr = AREG(7) - 2; |
| 13448 | AREG(7) = adr; |
| 13449 | PRE_IO |
| 13450 | WRITE_WORD_F(adr, res) |
| 13451 | POST_IO |
| 13452 | RET(12) |
| 13453 | } |
| 13454 | |
| 13455 | // MOVEW |
| 13456 | OPCODE(0x301F) |
| 13457 | { |
| 13458 | u32 adr, res; |
| 13459 | u32 src, dst; |
| 13460 | |
| 13461 | adr = AREG(7); |
| 13462 | AREG(7) += 2; |
| 13463 | PRE_IO |
| 13464 | READ_WORD_F(adr, res) |
| 13465 | flag_C = 0; |
| 13466 | flag_V = 0; |
| 13467 | flag_NotZ = res; |
| 13468 | flag_N = res >> 8; |
| 13469 | DREGu16((Opcode >> 9) & 7) = res; |
| 13470 | POST_IO |
| 13471 | RET(8) |
| 13472 | } |
| 13473 | |
| 13474 | // MOVEW |
| 13475 | OPCODE(0x309F) |
| 13476 | { |
| 13477 | u32 adr, res; |
| 13478 | u32 src, dst; |
| 13479 | |
| 13480 | adr = AREG(7); |
| 13481 | AREG(7) += 2; |
| 13482 | PRE_IO |
| 13483 | READ_WORD_F(adr, res) |
| 13484 | flag_C = 0; |
| 13485 | flag_V = 0; |
| 13486 | flag_NotZ = res; |
| 13487 | flag_N = res >> 8; |
| 13488 | adr = AREG((Opcode >> 9) & 7); |
| 13489 | WRITE_WORD_F(adr, res) |
| 13490 | POST_IO |
| 13491 | RET(12) |
| 13492 | } |
| 13493 | |
| 13494 | // MOVEW |
| 13495 | OPCODE(0x30DF) |
| 13496 | { |
| 13497 | u32 adr, res; |
| 13498 | u32 src, dst; |
| 13499 | |
| 13500 | adr = AREG(7); |
| 13501 | AREG(7) += 2; |
| 13502 | PRE_IO |
| 13503 | READ_WORD_F(adr, res) |
| 13504 | flag_C = 0; |
| 13505 | flag_V = 0; |
| 13506 | flag_NotZ = res; |
| 13507 | flag_N = res >> 8; |
| 13508 | adr = AREG((Opcode >> 9) & 7); |
| 13509 | AREG((Opcode >> 9) & 7) += 2; |
| 13510 | WRITE_WORD_F(adr, res) |
| 13511 | POST_IO |
| 13512 | RET(12) |
| 13513 | } |
| 13514 | |
| 13515 | // MOVEW |
| 13516 | OPCODE(0x311F) |
| 13517 | { |
| 13518 | u32 adr, res; |
| 13519 | u32 src, dst; |
| 13520 | |
| 13521 | adr = AREG(7); |
| 13522 | AREG(7) += 2; |
| 13523 | PRE_IO |
| 13524 | READ_WORD_F(adr, res) |
| 13525 | flag_C = 0; |
| 13526 | flag_V = 0; |
| 13527 | flag_NotZ = res; |
| 13528 | flag_N = res >> 8; |
| 13529 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 13530 | AREG((Opcode >> 9) & 7) = adr; |
| 13531 | WRITE_WORD_F(adr, res) |
| 13532 | POST_IO |
| 13533 | RET(12) |
| 13534 | } |
| 13535 | |
| 13536 | // MOVEW |
| 13537 | OPCODE(0x315F) |
| 13538 | { |
| 13539 | u32 adr, res; |
| 13540 | u32 src, dst; |
| 13541 | |
| 13542 | adr = AREG(7); |
| 13543 | AREG(7) += 2; |
| 13544 | PRE_IO |
| 13545 | READ_WORD_F(adr, res) |
| 13546 | flag_C = 0; |
| 13547 | flag_V = 0; |
| 13548 | flag_NotZ = res; |
| 13549 | flag_N = res >> 8; |
| 13550 | FETCH_SWORD(adr); |
| 13551 | adr += AREG((Opcode >> 9) & 7); |
| 13552 | WRITE_WORD_F(adr, res) |
| 13553 | POST_IO |
| 13554 | RET(16) |
| 13555 | } |
| 13556 | |
| 13557 | // MOVEW |
| 13558 | OPCODE(0x319F) |
| 13559 | { |
| 13560 | u32 adr, res; |
| 13561 | u32 src, dst; |
| 13562 | |
| 13563 | adr = AREG(7); |
| 13564 | AREG(7) += 2; |
| 13565 | PRE_IO |
| 13566 | READ_WORD_F(adr, res) |
| 13567 | flag_C = 0; |
| 13568 | flag_V = 0; |
| 13569 | flag_NotZ = res; |
| 13570 | flag_N = res >> 8; |
| 13571 | adr = AREG((Opcode >> 9) & 7); |
| 13572 | DECODE_EXT_WORD |
| 13573 | WRITE_WORD_F(adr, res) |
| 13574 | POST_IO |
| 13575 | RET(18) |
| 13576 | } |
| 13577 | |
| 13578 | // MOVEW |
| 13579 | OPCODE(0x31DF) |
| 13580 | { |
| 13581 | u32 adr, res; |
| 13582 | u32 src, dst; |
| 13583 | |
| 13584 | adr = AREG(7); |
| 13585 | AREG(7) += 2; |
| 13586 | PRE_IO |
| 13587 | READ_WORD_F(adr, res) |
| 13588 | flag_C = 0; |
| 13589 | flag_V = 0; |
| 13590 | flag_NotZ = res; |
| 13591 | flag_N = res >> 8; |
| 13592 | FETCH_SWORD(adr); |
| 13593 | WRITE_WORD_F(adr, res) |
| 13594 | POST_IO |
| 13595 | RET(16) |
| 13596 | } |
| 13597 | |
| 13598 | // MOVEW |
| 13599 | OPCODE(0x33DF) |
| 13600 | { |
| 13601 | u32 adr, res; |
| 13602 | u32 src, dst; |
| 13603 | |
| 13604 | adr = AREG(7); |
| 13605 | AREG(7) += 2; |
| 13606 | PRE_IO |
| 13607 | READ_WORD_F(adr, res) |
| 13608 | flag_C = 0; |
| 13609 | flag_V = 0; |
| 13610 | flag_NotZ = res; |
| 13611 | flag_N = res >> 8; |
| 13612 | FETCH_LONG(adr); |
| 13613 | WRITE_WORD_F(adr, res) |
| 13614 | POST_IO |
| 13615 | RET(20) |
| 13616 | } |
| 13617 | |
| 13618 | // MOVEW |
| 13619 | OPCODE(0x3EDF) |
| 13620 | { |
| 13621 | u32 adr, res; |
| 13622 | u32 src, dst; |
| 13623 | |
| 13624 | adr = AREG(7); |
| 13625 | AREG(7) += 2; |
| 13626 | PRE_IO |
| 13627 | READ_WORD_F(adr, res) |
| 13628 | flag_C = 0; |
| 13629 | flag_V = 0; |
| 13630 | flag_NotZ = res; |
| 13631 | flag_N = res >> 8; |
| 13632 | adr = AREG(7); |
| 13633 | AREG(7) += 2; |
| 13634 | WRITE_WORD_F(adr, res) |
| 13635 | POST_IO |
| 13636 | RET(12) |
| 13637 | } |
| 13638 | |
| 13639 | // MOVEW |
| 13640 | OPCODE(0x3F1F) |
| 13641 | { |
| 13642 | u32 adr, res; |
| 13643 | u32 src, dst; |
| 13644 | |
| 13645 | adr = AREG(7); |
| 13646 | AREG(7) += 2; |
| 13647 | PRE_IO |
| 13648 | READ_WORD_F(adr, res) |
| 13649 | flag_C = 0; |
| 13650 | flag_V = 0; |
| 13651 | flag_NotZ = res; |
| 13652 | flag_N = res >> 8; |
| 13653 | adr = AREG(7) - 2; |
| 13654 | AREG(7) = adr; |
| 13655 | WRITE_WORD_F(adr, res) |
| 13656 | POST_IO |
| 13657 | RET(12) |
| 13658 | } |
| 13659 | |
| 13660 | // MOVEW |
| 13661 | OPCODE(0x3027) |
| 13662 | { |
| 13663 | u32 adr, res; |
| 13664 | u32 src, dst; |
| 13665 | |
| 13666 | adr = AREG(7) - 2; |
| 13667 | AREG(7) = adr; |
| 13668 | PRE_IO |
| 13669 | READ_WORD_F(adr, res) |
| 13670 | flag_C = 0; |
| 13671 | flag_V = 0; |
| 13672 | flag_NotZ = res; |
| 13673 | flag_N = res >> 8; |
| 13674 | DREGu16((Opcode >> 9) & 7) = res; |
| 13675 | POST_IO |
| 13676 | RET(10) |
| 13677 | } |
| 13678 | |
| 13679 | // MOVEW |
| 13680 | OPCODE(0x30A7) |
| 13681 | { |
| 13682 | u32 adr, res; |
| 13683 | u32 src, dst; |
| 13684 | |
| 13685 | adr = AREG(7) - 2; |
| 13686 | AREG(7) = adr; |
| 13687 | PRE_IO |
| 13688 | READ_WORD_F(adr, res) |
| 13689 | flag_C = 0; |
| 13690 | flag_V = 0; |
| 13691 | flag_NotZ = res; |
| 13692 | flag_N = res >> 8; |
| 13693 | adr = AREG((Opcode >> 9) & 7); |
| 13694 | WRITE_WORD_F(adr, res) |
| 13695 | POST_IO |
| 13696 | RET(14) |
| 13697 | } |
| 13698 | |
| 13699 | // MOVEW |
| 13700 | OPCODE(0x30E7) |
| 13701 | { |
| 13702 | u32 adr, res; |
| 13703 | u32 src, dst; |
| 13704 | |
| 13705 | adr = AREG(7) - 2; |
| 13706 | AREG(7) = adr; |
| 13707 | PRE_IO |
| 13708 | READ_WORD_F(adr, res) |
| 13709 | flag_C = 0; |
| 13710 | flag_V = 0; |
| 13711 | flag_NotZ = res; |
| 13712 | flag_N = res >> 8; |
| 13713 | adr = AREG((Opcode >> 9) & 7); |
| 13714 | AREG((Opcode >> 9) & 7) += 2; |
| 13715 | WRITE_WORD_F(adr, res) |
| 13716 | POST_IO |
| 13717 | RET(14) |
| 13718 | } |
| 13719 | |
| 13720 | // MOVEW |
| 13721 | OPCODE(0x3127) |
| 13722 | { |
| 13723 | u32 adr, res; |
| 13724 | u32 src, dst; |
| 13725 | |
| 13726 | adr = AREG(7) - 2; |
| 13727 | AREG(7) = adr; |
| 13728 | PRE_IO |
| 13729 | READ_WORD_F(adr, res) |
| 13730 | flag_C = 0; |
| 13731 | flag_V = 0; |
| 13732 | flag_NotZ = res; |
| 13733 | flag_N = res >> 8; |
| 13734 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 13735 | AREG((Opcode >> 9) & 7) = adr; |
| 13736 | WRITE_WORD_F(adr, res) |
| 13737 | POST_IO |
| 13738 | RET(14) |
| 13739 | } |
| 13740 | |
| 13741 | // MOVEW |
| 13742 | OPCODE(0x3167) |
| 13743 | { |
| 13744 | u32 adr, res; |
| 13745 | u32 src, dst; |
| 13746 | |
| 13747 | adr = AREG(7) - 2; |
| 13748 | AREG(7) = adr; |
| 13749 | PRE_IO |
| 13750 | READ_WORD_F(adr, res) |
| 13751 | flag_C = 0; |
| 13752 | flag_V = 0; |
| 13753 | flag_NotZ = res; |
| 13754 | flag_N = res >> 8; |
| 13755 | FETCH_SWORD(adr); |
| 13756 | adr += AREG((Opcode >> 9) & 7); |
| 13757 | WRITE_WORD_F(adr, res) |
| 13758 | POST_IO |
| 13759 | RET(18) |
| 13760 | } |
| 13761 | |
| 13762 | // MOVEW |
| 13763 | OPCODE(0x31A7) |
| 13764 | { |
| 13765 | u32 adr, res; |
| 13766 | u32 src, dst; |
| 13767 | |
| 13768 | adr = AREG(7) - 2; |
| 13769 | AREG(7) = adr; |
| 13770 | PRE_IO |
| 13771 | READ_WORD_F(adr, res) |
| 13772 | flag_C = 0; |
| 13773 | flag_V = 0; |
| 13774 | flag_NotZ = res; |
| 13775 | flag_N = res >> 8; |
| 13776 | adr = AREG((Opcode >> 9) & 7); |
| 13777 | DECODE_EXT_WORD |
| 13778 | WRITE_WORD_F(adr, res) |
| 13779 | POST_IO |
| 13780 | RET(20) |
| 13781 | } |
| 13782 | |
| 13783 | // MOVEW |
| 13784 | OPCODE(0x31E7) |
| 13785 | { |
| 13786 | u32 adr, res; |
| 13787 | u32 src, dst; |
| 13788 | |
| 13789 | adr = AREG(7) - 2; |
| 13790 | AREG(7) = adr; |
| 13791 | PRE_IO |
| 13792 | READ_WORD_F(adr, res) |
| 13793 | flag_C = 0; |
| 13794 | flag_V = 0; |
| 13795 | flag_NotZ = res; |
| 13796 | flag_N = res >> 8; |
| 13797 | FETCH_SWORD(adr); |
| 13798 | WRITE_WORD_F(adr, res) |
| 13799 | POST_IO |
| 13800 | RET(18) |
| 13801 | } |
| 13802 | |
| 13803 | // MOVEW |
| 13804 | OPCODE(0x33E7) |
| 13805 | { |
| 13806 | u32 adr, res; |
| 13807 | u32 src, dst; |
| 13808 | |
| 13809 | adr = AREG(7) - 2; |
| 13810 | AREG(7) = adr; |
| 13811 | PRE_IO |
| 13812 | READ_WORD_F(adr, res) |
| 13813 | flag_C = 0; |
| 13814 | flag_V = 0; |
| 13815 | flag_NotZ = res; |
| 13816 | flag_N = res >> 8; |
| 13817 | FETCH_LONG(adr); |
| 13818 | WRITE_WORD_F(adr, res) |
| 13819 | POST_IO |
| 13820 | RET(22) |
| 13821 | } |
| 13822 | |
| 13823 | // MOVEW |
| 13824 | OPCODE(0x3EE7) |
| 13825 | { |
| 13826 | u32 adr, res; |
| 13827 | u32 src, dst; |
| 13828 | |
| 13829 | adr = AREG(7) - 2; |
| 13830 | AREG(7) = adr; |
| 13831 | PRE_IO |
| 13832 | READ_WORD_F(adr, res) |
| 13833 | flag_C = 0; |
| 13834 | flag_V = 0; |
| 13835 | flag_NotZ = res; |
| 13836 | flag_N = res >> 8; |
| 13837 | adr = AREG(7); |
| 13838 | AREG(7) += 2; |
| 13839 | WRITE_WORD_F(adr, res) |
| 13840 | POST_IO |
| 13841 | RET(14) |
| 13842 | } |
| 13843 | |
| 13844 | // MOVEW |
| 13845 | OPCODE(0x3F27) |
| 13846 | { |
| 13847 | u32 adr, res; |
| 13848 | u32 src, dst; |
| 13849 | |
| 13850 | adr = AREG(7) - 2; |
| 13851 | AREG(7) = adr; |
| 13852 | PRE_IO |
| 13853 | READ_WORD_F(adr, res) |
| 13854 | flag_C = 0; |
| 13855 | flag_V = 0; |
| 13856 | flag_NotZ = res; |
| 13857 | flag_N = res >> 8; |
| 13858 | adr = AREG(7) - 2; |
| 13859 | AREG(7) = adr; |
| 13860 | WRITE_WORD_F(adr, res) |
| 13861 | POST_IO |
| 13862 | RET(14) |
| 13863 | } |
| 13864 | |
| 13865 | // MOVEAW |
| 13866 | OPCODE(0x3040) |
| 13867 | { |
| 13868 | u32 adr, res; |
| 13869 | u32 src, dst; |
| 13870 | |
| 13871 | res = (s32)DREGs16((Opcode >> 0) & 7); |
| 13872 | AREG((Opcode >> 9) & 7) = res; |
| 13873 | RET(4) |
| 13874 | } |
| 13875 | |
| 13876 | // MOVEAW |
| 13877 | OPCODE(0x3048) |
| 13878 | { |
| 13879 | u32 adr, res; |
| 13880 | u32 src, dst; |
| 13881 | |
| 13882 | res = (s32)AREGs16((Opcode >> 0) & 7); |
| 13883 | AREG((Opcode >> 9) & 7) = res; |
| 13884 | RET(4) |
| 13885 | } |
| 13886 | |
| 13887 | // MOVEAW |
| 13888 | OPCODE(0x3050) |
| 13889 | { |
| 13890 | u32 adr, res; |
| 13891 | u32 src, dst; |
| 13892 | |
| 13893 | adr = AREG((Opcode >> 0) & 7); |
| 13894 | PRE_IO |
| 13895 | READSX_WORD_F(adr, res) |
| 13896 | AREG((Opcode >> 9) & 7) = res; |
| 13897 | POST_IO |
| 13898 | RET(8) |
| 13899 | } |
| 13900 | |
| 13901 | // MOVEAW |
| 13902 | OPCODE(0x3058) |
| 13903 | { |
| 13904 | u32 adr, res; |
| 13905 | u32 src, dst; |
| 13906 | |
| 13907 | adr = AREG((Opcode >> 0) & 7); |
| 13908 | AREG((Opcode >> 0) & 7) += 2; |
| 13909 | PRE_IO |
| 13910 | READSX_WORD_F(adr, res) |
| 13911 | AREG((Opcode >> 9) & 7) = res; |
| 13912 | POST_IO |
| 13913 | RET(8) |
| 13914 | } |
| 13915 | |
| 13916 | // MOVEAW |
| 13917 | OPCODE(0x3060) |
| 13918 | { |
| 13919 | u32 adr, res; |
| 13920 | u32 src, dst; |
| 13921 | |
| 13922 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 13923 | AREG((Opcode >> 0) & 7) = adr; |
| 13924 | PRE_IO |
| 13925 | READSX_WORD_F(adr, res) |
| 13926 | AREG((Opcode >> 9) & 7) = res; |
| 13927 | POST_IO |
| 13928 | RET(10) |
| 13929 | } |
| 13930 | |
| 13931 | // MOVEAW |
| 13932 | OPCODE(0x3068) |
| 13933 | { |
| 13934 | u32 adr, res; |
| 13935 | u32 src, dst; |
| 13936 | |
| 13937 | FETCH_SWORD(adr); |
| 13938 | adr += AREG((Opcode >> 0) & 7); |
| 13939 | PRE_IO |
| 13940 | READSX_WORD_F(adr, res) |
| 13941 | AREG((Opcode >> 9) & 7) = res; |
| 13942 | POST_IO |
| 13943 | RET(12) |
| 13944 | } |
| 13945 | |
| 13946 | // MOVEAW |
| 13947 | OPCODE(0x3070) |
| 13948 | { |
| 13949 | u32 adr, res; |
| 13950 | u32 src, dst; |
| 13951 | |
| 13952 | adr = AREG((Opcode >> 0) & 7); |
| 13953 | DECODE_EXT_WORD |
| 13954 | PRE_IO |
| 13955 | READSX_WORD_F(adr, res) |
| 13956 | AREG((Opcode >> 9) & 7) = res; |
| 13957 | POST_IO |
| 13958 | RET(14) |
| 13959 | } |
| 13960 | |
| 13961 | // MOVEAW |
| 13962 | OPCODE(0x3078) |
| 13963 | { |
| 13964 | u32 adr, res; |
| 13965 | u32 src, dst; |
| 13966 | |
| 13967 | FETCH_SWORD(adr); |
| 13968 | PRE_IO |
| 13969 | READSX_WORD_F(adr, res) |
| 13970 | AREG((Opcode >> 9) & 7) = res; |
| 13971 | POST_IO |
| 13972 | RET(12) |
| 13973 | } |
| 13974 | |
| 13975 | // MOVEAW |
| 13976 | OPCODE(0x3079) |
| 13977 | { |
| 13978 | u32 adr, res; |
| 13979 | u32 src, dst; |
| 13980 | |
| 13981 | FETCH_LONG(adr); |
| 13982 | PRE_IO |
| 13983 | READSX_WORD_F(adr, res) |
| 13984 | AREG((Opcode >> 9) & 7) = res; |
| 13985 | POST_IO |
| 13986 | RET(16) |
| 13987 | } |
| 13988 | |
| 13989 | // MOVEAW |
| 13990 | OPCODE(0x307A) |
| 13991 | { |
| 13992 | u32 adr, res; |
| 13993 | u32 src, dst; |
| 13994 | |
| 13995 | adr = GET_SWORD + GET_PC; |
| 13996 | PC++; |
| 13997 | PRE_IO |
| 13998 | READSX_WORD_F(adr, res) |
| 13999 | AREG((Opcode >> 9) & 7) = res; |
| 14000 | POST_IO |
| 14001 | RET(12) |
| 14002 | } |
| 14003 | |
| 14004 | // MOVEAW |
| 14005 | OPCODE(0x307B) |
| 14006 | { |
| 14007 | u32 adr, res; |
| 14008 | u32 src, dst; |
| 14009 | |
| 14010 | adr = GET_PC; |
| 14011 | DECODE_EXT_WORD |
| 14012 | PRE_IO |
| 14013 | READSX_WORD_F(adr, res) |
| 14014 | AREG((Opcode >> 9) & 7) = res; |
| 14015 | POST_IO |
| 14016 | RET(14) |
| 14017 | } |
| 14018 | |
| 14019 | // MOVEAW |
| 14020 | OPCODE(0x307C) |
| 14021 | { |
| 14022 | u32 adr, res; |
| 14023 | u32 src, dst; |
| 14024 | |
| 14025 | FETCH_SWORD(res); |
| 14026 | AREG((Opcode >> 9) & 7) = res; |
| 14027 | RET(8) |
| 14028 | } |
| 14029 | |
| 14030 | // MOVEAW |
| 14031 | OPCODE(0x305F) |
| 14032 | { |
| 14033 | u32 adr, res; |
| 14034 | u32 src, dst; |
| 14035 | |
| 14036 | adr = AREG(7); |
| 14037 | AREG(7) += 2; |
| 14038 | PRE_IO |
| 14039 | READSX_WORD_F(adr, res) |
| 14040 | AREG((Opcode >> 9) & 7) = res; |
| 14041 | POST_IO |
| 14042 | RET(8) |
| 14043 | } |
| 14044 | |
| 14045 | // MOVEAW |
| 14046 | OPCODE(0x3067) |
| 14047 | { |
| 14048 | u32 adr, res; |
| 14049 | u32 src, dst; |
| 14050 | |
| 14051 | adr = AREG(7) - 2; |
| 14052 | AREG(7) = adr; |
| 14053 | PRE_IO |
| 14054 | READSX_WORD_F(adr, res) |
| 14055 | AREG((Opcode >> 9) & 7) = res; |
| 14056 | POST_IO |
| 14057 | RET(10) |
| 14058 | } |
| 14059 | |
| 14060 | // NEGX |
| 14061 | OPCODE(0x4000) |
| 14062 | { |
| 14063 | u32 adr, res; |
| 14064 | u32 src, dst; |
| 14065 | |
| 14066 | src = DREGu8((Opcode >> 0) & 7); |
| 14067 | res = -src - ((flag_X >> 8) & 1); |
| 14068 | flag_V = res & src; |
| 14069 | flag_N = flag_X = flag_C = res; |
| 14070 | flag_NotZ |= res & 0xFF; |
| 14071 | DREGu8((Opcode >> 0) & 7) = res; |
| 14072 | RET(4) |
| 14073 | } |
| 14074 | |
| 14075 | // NEGX |
| 14076 | OPCODE(0x4010) |
| 14077 | { |
| 14078 | u32 adr, res; |
| 14079 | u32 src, dst; |
| 14080 | |
| 14081 | adr = AREG((Opcode >> 0) & 7); |
| 14082 | PRE_IO |
| 14083 | READ_BYTE_F(adr, src) |
| 14084 | res = -src - ((flag_X >> 8) & 1); |
| 14085 | flag_V = res & src; |
| 14086 | flag_N = flag_X = flag_C = res; |
| 14087 | flag_NotZ |= res & 0xFF; |
| 14088 | WRITE_BYTE_F(adr, res) |
| 14089 | POST_IO |
| 14090 | RET(12) |
| 14091 | } |
| 14092 | |
| 14093 | // NEGX |
| 14094 | OPCODE(0x4018) |
| 14095 | { |
| 14096 | u32 adr, res; |
| 14097 | u32 src, dst; |
| 14098 | |
| 14099 | adr = AREG((Opcode >> 0) & 7); |
| 14100 | AREG((Opcode >> 0) & 7) += 1; |
| 14101 | PRE_IO |
| 14102 | READ_BYTE_F(adr, src) |
| 14103 | res = -src - ((flag_X >> 8) & 1); |
| 14104 | flag_V = res & src; |
| 14105 | flag_N = flag_X = flag_C = res; |
| 14106 | flag_NotZ |= res & 0xFF; |
| 14107 | WRITE_BYTE_F(adr, res) |
| 14108 | POST_IO |
| 14109 | RET(12) |
| 14110 | } |
| 14111 | |
| 14112 | // NEGX |
| 14113 | OPCODE(0x4020) |
| 14114 | { |
| 14115 | u32 adr, res; |
| 14116 | u32 src, dst; |
| 14117 | |
| 14118 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 14119 | AREG((Opcode >> 0) & 7) = adr; |
| 14120 | PRE_IO |
| 14121 | READ_BYTE_F(adr, src) |
| 14122 | res = -src - ((flag_X >> 8) & 1); |
| 14123 | flag_V = res & src; |
| 14124 | flag_N = flag_X = flag_C = res; |
| 14125 | flag_NotZ |= res & 0xFF; |
| 14126 | WRITE_BYTE_F(adr, res) |
| 14127 | POST_IO |
| 14128 | RET(14) |
| 14129 | } |
| 14130 | |
| 14131 | // NEGX |
| 14132 | OPCODE(0x4028) |
| 14133 | { |
| 14134 | u32 adr, res; |
| 14135 | u32 src, dst; |
| 14136 | |
| 14137 | FETCH_SWORD(adr); |
| 14138 | adr += AREG((Opcode >> 0) & 7); |
| 14139 | PRE_IO |
| 14140 | READ_BYTE_F(adr, src) |
| 14141 | res = -src - ((flag_X >> 8) & 1); |
| 14142 | flag_V = res & src; |
| 14143 | flag_N = flag_X = flag_C = res; |
| 14144 | flag_NotZ |= res & 0xFF; |
| 14145 | WRITE_BYTE_F(adr, res) |
| 14146 | POST_IO |
| 14147 | RET(16) |
| 14148 | } |
| 14149 | |
| 14150 | // NEGX |
| 14151 | OPCODE(0x4030) |
| 14152 | { |
| 14153 | u32 adr, res; |
| 14154 | u32 src, dst; |
| 14155 | |
| 14156 | adr = AREG((Opcode >> 0) & 7); |
| 14157 | DECODE_EXT_WORD |
| 14158 | PRE_IO |
| 14159 | READ_BYTE_F(adr, src) |
| 14160 | res = -src - ((flag_X >> 8) & 1); |
| 14161 | flag_V = res & src; |
| 14162 | flag_N = flag_X = flag_C = res; |
| 14163 | flag_NotZ |= res & 0xFF; |
| 14164 | WRITE_BYTE_F(adr, res) |
| 14165 | POST_IO |
| 14166 | RET(18) |
| 14167 | } |
| 14168 | |
| 14169 | // NEGX |
| 14170 | OPCODE(0x4038) |
| 14171 | { |
| 14172 | u32 adr, res; |
| 14173 | u32 src, dst; |
| 14174 | |
| 14175 | FETCH_SWORD(adr); |
| 14176 | PRE_IO |
| 14177 | READ_BYTE_F(adr, src) |
| 14178 | res = -src - ((flag_X >> 8) & 1); |
| 14179 | flag_V = res & src; |
| 14180 | flag_N = flag_X = flag_C = res; |
| 14181 | flag_NotZ |= res & 0xFF; |
| 14182 | WRITE_BYTE_F(adr, res) |
| 14183 | POST_IO |
| 14184 | RET(16) |
| 14185 | } |
| 14186 | |
| 14187 | // NEGX |
| 14188 | OPCODE(0x4039) |
| 14189 | { |
| 14190 | u32 adr, res; |
| 14191 | u32 src, dst; |
| 14192 | |
| 14193 | FETCH_LONG(adr); |
| 14194 | PRE_IO |
| 14195 | READ_BYTE_F(adr, src) |
| 14196 | res = -src - ((flag_X >> 8) & 1); |
| 14197 | flag_V = res & src; |
| 14198 | flag_N = flag_X = flag_C = res; |
| 14199 | flag_NotZ |= res & 0xFF; |
| 14200 | WRITE_BYTE_F(adr, res) |
| 14201 | POST_IO |
| 14202 | RET(20) |
| 14203 | } |
| 14204 | |
| 14205 | // NEGX |
| 14206 | OPCODE(0x401F) |
| 14207 | { |
| 14208 | u32 adr, res; |
| 14209 | u32 src, dst; |
| 14210 | |
| 14211 | adr = AREG(7); |
| 14212 | AREG(7) += 2; |
| 14213 | PRE_IO |
| 14214 | READ_BYTE_F(adr, src) |
| 14215 | res = -src - ((flag_X >> 8) & 1); |
| 14216 | flag_V = res & src; |
| 14217 | flag_N = flag_X = flag_C = res; |
| 14218 | flag_NotZ |= res & 0xFF; |
| 14219 | WRITE_BYTE_F(adr, res) |
| 14220 | POST_IO |
| 14221 | RET(12) |
| 14222 | } |
| 14223 | |
| 14224 | // NEGX |
| 14225 | OPCODE(0x4027) |
| 14226 | { |
| 14227 | u32 adr, res; |
| 14228 | u32 src, dst; |
| 14229 | |
| 14230 | adr = AREG(7) - 2; |
| 14231 | AREG(7) = adr; |
| 14232 | PRE_IO |
| 14233 | READ_BYTE_F(adr, src) |
| 14234 | res = -src - ((flag_X >> 8) & 1); |
| 14235 | flag_V = res & src; |
| 14236 | flag_N = flag_X = flag_C = res; |
| 14237 | flag_NotZ |= res & 0xFF; |
| 14238 | WRITE_BYTE_F(adr, res) |
| 14239 | POST_IO |
| 14240 | RET(14) |
| 14241 | } |
| 14242 | |
| 14243 | // NEGX |
| 14244 | OPCODE(0x4040) |
| 14245 | { |
| 14246 | u32 adr, res; |
| 14247 | u32 src, dst; |
| 14248 | |
| 14249 | src = DREGu16((Opcode >> 0) & 7); |
| 14250 | res = -src - ((flag_X >> 8) & 1); |
| 14251 | flag_V = (res & src) >> 8; |
| 14252 | flag_N = flag_X = flag_C = res >> 8; |
| 14253 | flag_NotZ |= res & 0xFFFF; |
| 14254 | DREGu16((Opcode >> 0) & 7) = res; |
| 14255 | RET(4) |
| 14256 | } |
| 14257 | |
| 14258 | // NEGX |
| 14259 | OPCODE(0x4050) |
| 14260 | { |
| 14261 | u32 adr, res; |
| 14262 | u32 src, dst; |
| 14263 | |
| 14264 | adr = AREG((Opcode >> 0) & 7); |
| 14265 | PRE_IO |
| 14266 | READ_WORD_F(adr, src) |
| 14267 | res = -src - ((flag_X >> 8) & 1); |
| 14268 | flag_V = (res & src) >> 8; |
| 14269 | flag_N = flag_X = flag_C = res >> 8; |
| 14270 | flag_NotZ |= res & 0xFFFF; |
| 14271 | WRITE_WORD_F(adr, res) |
| 14272 | POST_IO |
| 14273 | RET(12) |
| 14274 | } |
| 14275 | |
| 14276 | // NEGX |
| 14277 | OPCODE(0x4058) |
| 14278 | { |
| 14279 | u32 adr, res; |
| 14280 | u32 src, dst; |
| 14281 | |
| 14282 | adr = AREG((Opcode >> 0) & 7); |
| 14283 | AREG((Opcode >> 0) & 7) += 2; |
| 14284 | PRE_IO |
| 14285 | READ_WORD_F(adr, src) |
| 14286 | res = -src - ((flag_X >> 8) & 1); |
| 14287 | flag_V = (res & src) >> 8; |
| 14288 | flag_N = flag_X = flag_C = res >> 8; |
| 14289 | flag_NotZ |= res & 0xFFFF; |
| 14290 | WRITE_WORD_F(adr, res) |
| 14291 | POST_IO |
| 14292 | RET(12) |
| 14293 | } |
| 14294 | |
| 14295 | // NEGX |
| 14296 | OPCODE(0x4060) |
| 14297 | { |
| 14298 | u32 adr, res; |
| 14299 | u32 src, dst; |
| 14300 | |
| 14301 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 14302 | AREG((Opcode >> 0) & 7) = adr; |
| 14303 | PRE_IO |
| 14304 | READ_WORD_F(adr, src) |
| 14305 | res = -src - ((flag_X >> 8) & 1); |
| 14306 | flag_V = (res & src) >> 8; |
| 14307 | flag_N = flag_X = flag_C = res >> 8; |
| 14308 | flag_NotZ |= res & 0xFFFF; |
| 14309 | WRITE_WORD_F(adr, res) |
| 14310 | POST_IO |
| 14311 | RET(14) |
| 14312 | } |
| 14313 | |
| 14314 | // NEGX |
| 14315 | OPCODE(0x4068) |
| 14316 | { |
| 14317 | u32 adr, res; |
| 14318 | u32 src, dst; |
| 14319 | |
| 14320 | FETCH_SWORD(adr); |
| 14321 | adr += AREG((Opcode >> 0) & 7); |
| 14322 | PRE_IO |
| 14323 | READ_WORD_F(adr, src) |
| 14324 | res = -src - ((flag_X >> 8) & 1); |
| 14325 | flag_V = (res & src) >> 8; |
| 14326 | flag_N = flag_X = flag_C = res >> 8; |
| 14327 | flag_NotZ |= res & 0xFFFF; |
| 14328 | WRITE_WORD_F(adr, res) |
| 14329 | POST_IO |
| 14330 | RET(16) |
| 14331 | } |
| 14332 | |
| 14333 | // NEGX |
| 14334 | OPCODE(0x4070) |
| 14335 | { |
| 14336 | u32 adr, res; |
| 14337 | u32 src, dst; |
| 14338 | |
| 14339 | adr = AREG((Opcode >> 0) & 7); |
| 14340 | DECODE_EXT_WORD |
| 14341 | PRE_IO |
| 14342 | READ_WORD_F(adr, src) |
| 14343 | res = -src - ((flag_X >> 8) & 1); |
| 14344 | flag_V = (res & src) >> 8; |
| 14345 | flag_N = flag_X = flag_C = res >> 8; |
| 14346 | flag_NotZ |= res & 0xFFFF; |
| 14347 | WRITE_WORD_F(adr, res) |
| 14348 | POST_IO |
| 14349 | RET(18) |
| 14350 | } |
| 14351 | |
| 14352 | // NEGX |
| 14353 | OPCODE(0x4078) |
| 14354 | { |
| 14355 | u32 adr, res; |
| 14356 | u32 src, dst; |
| 14357 | |
| 14358 | FETCH_SWORD(adr); |
| 14359 | PRE_IO |
| 14360 | READ_WORD_F(adr, src) |
| 14361 | res = -src - ((flag_X >> 8) & 1); |
| 14362 | flag_V = (res & src) >> 8; |
| 14363 | flag_N = flag_X = flag_C = res >> 8; |
| 14364 | flag_NotZ |= res & 0xFFFF; |
| 14365 | WRITE_WORD_F(adr, res) |
| 14366 | POST_IO |
| 14367 | RET(16) |
| 14368 | } |
| 14369 | |
| 14370 | // NEGX |
| 14371 | OPCODE(0x4079) |
| 14372 | { |
| 14373 | u32 adr, res; |
| 14374 | u32 src, dst; |
| 14375 | |
| 14376 | FETCH_LONG(adr); |
| 14377 | PRE_IO |
| 14378 | READ_WORD_F(adr, src) |
| 14379 | res = -src - ((flag_X >> 8) & 1); |
| 14380 | flag_V = (res & src) >> 8; |
| 14381 | flag_N = flag_X = flag_C = res >> 8; |
| 14382 | flag_NotZ |= res & 0xFFFF; |
| 14383 | WRITE_WORD_F(adr, res) |
| 14384 | POST_IO |
| 14385 | RET(20) |
| 14386 | } |
| 14387 | |
| 14388 | // NEGX |
| 14389 | OPCODE(0x405F) |
| 14390 | { |
| 14391 | u32 adr, res; |
| 14392 | u32 src, dst; |
| 14393 | |
| 14394 | adr = AREG(7); |
| 14395 | AREG(7) += 2; |
| 14396 | PRE_IO |
| 14397 | READ_WORD_F(adr, src) |
| 14398 | res = -src - ((flag_X >> 8) & 1); |
| 14399 | flag_V = (res & src) >> 8; |
| 14400 | flag_N = flag_X = flag_C = res >> 8; |
| 14401 | flag_NotZ |= res & 0xFFFF; |
| 14402 | WRITE_WORD_F(adr, res) |
| 14403 | POST_IO |
| 14404 | RET(12) |
| 14405 | } |
| 14406 | |
| 14407 | // NEGX |
| 14408 | OPCODE(0x4067) |
| 14409 | { |
| 14410 | u32 adr, res; |
| 14411 | u32 src, dst; |
| 14412 | |
| 14413 | adr = AREG(7) - 2; |
| 14414 | AREG(7) = adr; |
| 14415 | PRE_IO |
| 14416 | READ_WORD_F(adr, src) |
| 14417 | res = -src - ((flag_X >> 8) & 1); |
| 14418 | flag_V = (res & src) >> 8; |
| 14419 | flag_N = flag_X = flag_C = res >> 8; |
| 14420 | flag_NotZ |= res & 0xFFFF; |
| 14421 | WRITE_WORD_F(adr, res) |
| 14422 | POST_IO |
| 14423 | RET(14) |
| 14424 | } |
| 14425 | |
| 14426 | // NEGX |
| 14427 | OPCODE(0x4080) |
| 14428 | { |
| 14429 | u32 adr, res; |
| 14430 | u32 src, dst; |
| 14431 | |
| 14432 | src = DREGu32((Opcode >> 0) & 7); |
| 14433 | res = -src - ((flag_X >> 8) & 1); |
| 14434 | flag_NotZ |= res; |
| 14435 | flag_V = (res & src) >> 24; |
| 14436 | flag_X = flag_C = (res?1:0)<<8; |
| 14437 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14438 | flag_N = res >> 24; |
| 14439 | DREGu32((Opcode >> 0) & 7) = res; |
| 14440 | RET(6) |
| 14441 | } |
| 14442 | |
| 14443 | // NEGX |
| 14444 | OPCODE(0x4090) |
| 14445 | { |
| 14446 | u32 adr, res; |
| 14447 | u32 src, dst; |
| 14448 | |
| 14449 | adr = AREG((Opcode >> 0) & 7); |
| 14450 | PRE_IO |
| 14451 | READ_LONG_F(adr, src) |
| 14452 | res = -src - ((flag_X >> 8) & 1); |
| 14453 | flag_NotZ |= res; |
| 14454 | flag_V = (res & src) >> 24; |
| 14455 | flag_X = flag_C = (res?1:0)<<8; |
| 14456 | // flag_X = flag_C = ((src & res & 1) | (src >> 1) | (res >> 1)) >> 23; |
| 14457 | flag_N = res >> 24; |
| 14458 | WRITE_LONG_F(adr, res) |
| 14459 | POST_IO |
| 14460 | RET(20) |
| 14461 | } |
| 14462 | |
| 14463 | // NEGX |
| 14464 | OPCODE(0x4098) |
| 14465 | { |
| 14466 | u32 adr, res; |
| 14467 | u32 src, dst; |
| 14468 | |
| 14469 | adr = AREG((Opcode >> 0) & 7); |
| 14470 | AREG((Opcode >> 0) & 7) += 4; |
| 14471 | PRE_IO |
| 14472 | READ_LONG_F(adr, src) |
| 14473 | res = -src - ((flag_X >> 8) & 1); |
| 14474 | flag_NotZ |= res; |
| 14475 | flag_V = (res & src) >> 24; |
| 14476 | flag_X = flag_C = (res?1:0)<<8; |
| 14477 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14478 | flag_N = res >> 24; |
| 14479 | WRITE_LONG_F(adr, res) |
| 14480 | POST_IO |
| 14481 | RET(20) |
| 14482 | } |
| 14483 | |
| 14484 | // NEGX |
| 14485 | OPCODE(0x40A0) |
| 14486 | { |
| 14487 | u32 adr, res; |
| 14488 | u32 src, dst; |
| 14489 | |
| 14490 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 14491 | AREG((Opcode >> 0) & 7) = adr; |
| 14492 | PRE_IO |
| 14493 | READ_LONG_F(adr, src) |
| 14494 | res = -src - ((flag_X >> 8) & 1); |
| 14495 | flag_NotZ |= res; |
| 14496 | flag_V = (res & src) >> 24; |
| 14497 | flag_X = flag_C = (res?1:0)<<8; |
| 14498 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14499 | flag_N = res >> 24; |
| 14500 | WRITE_LONG_F(adr, res) |
| 14501 | POST_IO |
| 14502 | RET(22) |
| 14503 | } |
| 14504 | |
| 14505 | // NEGX |
| 14506 | OPCODE(0x40A8) |
| 14507 | { |
| 14508 | u32 adr, res; |
| 14509 | u32 src, dst; |
| 14510 | |
| 14511 | FETCH_SWORD(adr); |
| 14512 | adr += AREG((Opcode >> 0) & 7); |
| 14513 | PRE_IO |
| 14514 | READ_LONG_F(adr, src) |
| 14515 | res = -src - ((flag_X >> 8) & 1); |
| 14516 | flag_NotZ |= res; |
| 14517 | flag_V = (res & src) >> 24; |
| 14518 | flag_X = flag_C = (res?1:0)<<8; |
| 14519 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14520 | flag_N = res >> 24; |
| 14521 | WRITE_LONG_F(adr, res) |
| 14522 | POST_IO |
| 14523 | RET(24) |
| 14524 | } |
| 14525 | |
| 14526 | // NEGX |
| 14527 | OPCODE(0x40B0) |
| 14528 | { |
| 14529 | u32 adr, res; |
| 14530 | u32 src, dst; |
| 14531 | |
| 14532 | adr = AREG((Opcode >> 0) & 7); |
| 14533 | DECODE_EXT_WORD |
| 14534 | PRE_IO |
| 14535 | READ_LONG_F(adr, src) |
| 14536 | res = -src - ((flag_X >> 8) & 1); |
| 14537 | flag_NotZ |= res; |
| 14538 | flag_V = (res & src) >> 24; |
| 14539 | flag_X = flag_C = (res?1:0)<<8; |
| 14540 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14541 | flag_N = res >> 24; |
| 14542 | WRITE_LONG_F(adr, res) |
| 14543 | POST_IO |
| 14544 | RET(26) |
| 14545 | } |
| 14546 | |
| 14547 | // NEGX |
| 14548 | OPCODE(0x40B8) |
| 14549 | { |
| 14550 | u32 adr, res; |
| 14551 | u32 src, dst; |
| 14552 | |
| 14553 | FETCH_SWORD(adr); |
| 14554 | PRE_IO |
| 14555 | READ_LONG_F(adr, src) |
| 14556 | res = -src - ((flag_X >> 8) & 1); |
| 14557 | flag_NotZ |= res; |
| 14558 | flag_V = (res & src) >> 24; |
| 14559 | flag_X = flag_C = (res?1:0)<<8; |
| 14560 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14561 | flag_N = res >> 24; |
| 14562 | WRITE_LONG_F(adr, res) |
| 14563 | POST_IO |
| 14564 | RET(24) |
| 14565 | } |
| 14566 | |
| 14567 | // NEGX |
| 14568 | OPCODE(0x40B9) |
| 14569 | { |
| 14570 | u32 adr, res; |
| 14571 | u32 src, dst; |
| 14572 | |
| 14573 | FETCH_LONG(adr); |
| 14574 | PRE_IO |
| 14575 | READ_LONG_F(adr, src) |
| 14576 | res = -src - ((flag_X >> 8) & 1); |
| 14577 | flag_NotZ |= res; |
| 14578 | flag_V = (res & src) >> 24; |
| 14579 | flag_X = flag_C = (res?1:0)<<8; |
| 14580 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14581 | flag_N = res >> 24; |
| 14582 | WRITE_LONG_F(adr, res) |
| 14583 | POST_IO |
| 14584 | RET(28) |
| 14585 | } |
| 14586 | |
| 14587 | // NEGX |
| 14588 | OPCODE(0x409F) |
| 14589 | { |
| 14590 | u32 adr, res; |
| 14591 | u32 src, dst; |
| 14592 | |
| 14593 | adr = AREG(7); |
| 14594 | AREG(7) += 4; |
| 14595 | PRE_IO |
| 14596 | READ_LONG_F(adr, src) |
| 14597 | res = -src - ((flag_X >> 8) & 1); |
| 14598 | flag_NotZ |= res; |
| 14599 | flag_V = (res & src) >> 24; |
| 14600 | flag_X = flag_C = (res?1:0)<<8; |
| 14601 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14602 | flag_N = res >> 24; |
| 14603 | WRITE_LONG_F(adr, res) |
| 14604 | POST_IO |
| 14605 | RET(20) |
| 14606 | } |
| 14607 | |
| 14608 | // NEGX |
| 14609 | OPCODE(0x40A7) |
| 14610 | { |
| 14611 | u32 adr, res; |
| 14612 | u32 src, dst; |
| 14613 | |
| 14614 | adr = AREG(7) - 4; |
| 14615 | AREG(7) = adr; |
| 14616 | PRE_IO |
| 14617 | READ_LONG_F(adr, src) |
| 14618 | res = -src - ((flag_X >> 8) & 1); |
| 14619 | flag_NotZ |= res; |
| 14620 | flag_V = (res & src) >> 24; |
| 14621 | flag_X = flag_C = (res?1:0)<<8; |
| 14622 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 14623 | flag_N = res >> 24; |
| 14624 | WRITE_LONG_F(adr, res) |
| 14625 | POST_IO |
| 14626 | RET(22) |
| 14627 | } |
| 14628 | |
| 14629 | // CLR |
| 14630 | OPCODE(0x4200) |
| 14631 | { |
| 14632 | u32 adr, res; |
| 14633 | u32 src, dst; |
| 14634 | |
| 14635 | res = 0; |
| 14636 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14637 | DREGu8((Opcode >> 0) & 7) = res; |
| 14638 | RET(4) |
| 14639 | } |
| 14640 | |
| 14641 | // CLR |
| 14642 | OPCODE(0x4210) |
| 14643 | { |
| 14644 | u32 adr, res; |
| 14645 | u32 src, dst; |
| 14646 | |
| 14647 | adr = AREG((Opcode >> 0) & 7); |
| 14648 | res = 0; |
| 14649 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14650 | PRE_IO |
| 14651 | WRITE_BYTE_F(adr, res) |
| 14652 | POST_IO |
| 14653 | RET(12) |
| 14654 | } |
| 14655 | |
| 14656 | // CLR |
| 14657 | OPCODE(0x4218) |
| 14658 | { |
| 14659 | u32 adr, res; |
| 14660 | u32 src, dst; |
| 14661 | |
| 14662 | adr = AREG((Opcode >> 0) & 7); |
| 14663 | AREG((Opcode >> 0) & 7) += 1; |
| 14664 | res = 0; |
| 14665 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14666 | PRE_IO |
| 14667 | WRITE_BYTE_F(adr, res) |
| 14668 | POST_IO |
| 14669 | RET(12) |
| 14670 | } |
| 14671 | |
| 14672 | // CLR |
| 14673 | OPCODE(0x4220) |
| 14674 | { |
| 14675 | u32 adr, res; |
| 14676 | u32 src, dst; |
| 14677 | |
| 14678 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 14679 | AREG((Opcode >> 0) & 7) = adr; |
| 14680 | res = 0; |
| 14681 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14682 | PRE_IO |
| 14683 | WRITE_BYTE_F(adr, res) |
| 14684 | POST_IO |
| 14685 | RET(14) |
| 14686 | } |
| 14687 | |
| 14688 | // CLR |
| 14689 | OPCODE(0x4228) |
| 14690 | { |
| 14691 | u32 adr, res; |
| 14692 | u32 src, dst; |
| 14693 | |
| 14694 | FETCH_SWORD(adr); |
| 14695 | adr += AREG((Opcode >> 0) & 7); |
| 14696 | res = 0; |
| 14697 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14698 | PRE_IO |
| 14699 | WRITE_BYTE_F(adr, res) |
| 14700 | POST_IO |
| 14701 | RET(16) |
| 14702 | } |
| 14703 | |
| 14704 | // CLR |
| 14705 | OPCODE(0x4230) |
| 14706 | { |
| 14707 | u32 adr, res; |
| 14708 | u32 src, dst; |
| 14709 | |
| 14710 | adr = AREG((Opcode >> 0) & 7); |
| 14711 | DECODE_EXT_WORD |
| 14712 | res = 0; |
| 14713 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14714 | PRE_IO |
| 14715 | WRITE_BYTE_F(adr, res) |
| 14716 | POST_IO |
| 14717 | RET(18) |
| 14718 | } |
| 14719 | |
| 14720 | // CLR |
| 14721 | OPCODE(0x4238) |
| 14722 | { |
| 14723 | u32 adr, res; |
| 14724 | u32 src, dst; |
| 14725 | |
| 14726 | FETCH_SWORD(adr); |
| 14727 | res = 0; |
| 14728 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14729 | PRE_IO |
| 14730 | WRITE_BYTE_F(adr, res) |
| 14731 | POST_IO |
| 14732 | RET(16) |
| 14733 | } |
| 14734 | |
| 14735 | // CLR |
| 14736 | OPCODE(0x4239) |
| 14737 | { |
| 14738 | u32 adr, res; |
| 14739 | u32 src, dst; |
| 14740 | |
| 14741 | FETCH_LONG(adr); |
| 14742 | res = 0; |
| 14743 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14744 | PRE_IO |
| 14745 | WRITE_BYTE_F(adr, res) |
| 14746 | POST_IO |
| 14747 | RET(20) |
| 14748 | } |
| 14749 | |
| 14750 | // CLR |
| 14751 | OPCODE(0x421F) |
| 14752 | { |
| 14753 | u32 adr, res; |
| 14754 | u32 src, dst; |
| 14755 | |
| 14756 | adr = AREG(7); |
| 14757 | AREG(7) += 2; |
| 14758 | res = 0; |
| 14759 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14760 | PRE_IO |
| 14761 | WRITE_BYTE_F(adr, res) |
| 14762 | POST_IO |
| 14763 | RET(12) |
| 14764 | } |
| 14765 | |
| 14766 | // CLR |
| 14767 | OPCODE(0x4227) |
| 14768 | { |
| 14769 | u32 adr, res; |
| 14770 | u32 src, dst; |
| 14771 | |
| 14772 | adr = AREG(7) - 2; |
| 14773 | AREG(7) = adr; |
| 14774 | res = 0; |
| 14775 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14776 | PRE_IO |
| 14777 | WRITE_BYTE_F(adr, res) |
| 14778 | POST_IO |
| 14779 | RET(14) |
| 14780 | } |
| 14781 | |
| 14782 | // CLR |
| 14783 | OPCODE(0x4240) |
| 14784 | { |
| 14785 | u32 adr, res; |
| 14786 | u32 src, dst; |
| 14787 | |
| 14788 | res = 0; |
| 14789 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14790 | DREGu16((Opcode >> 0) & 7) = res; |
| 14791 | RET(4) |
| 14792 | } |
| 14793 | |
| 14794 | // CLR |
| 14795 | OPCODE(0x4250) |
| 14796 | { |
| 14797 | u32 adr, res; |
| 14798 | u32 src, dst; |
| 14799 | |
| 14800 | adr = AREG((Opcode >> 0) & 7); |
| 14801 | res = 0; |
| 14802 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14803 | PRE_IO |
| 14804 | WRITE_WORD_F(adr, res) |
| 14805 | POST_IO |
| 14806 | RET(12) |
| 14807 | } |
| 14808 | |
| 14809 | // CLR |
| 14810 | OPCODE(0x4258) |
| 14811 | { |
| 14812 | u32 adr, res; |
| 14813 | u32 src, dst; |
| 14814 | |
| 14815 | adr = AREG((Opcode >> 0) & 7); |
| 14816 | AREG((Opcode >> 0) & 7) += 2; |
| 14817 | res = 0; |
| 14818 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14819 | PRE_IO |
| 14820 | WRITE_WORD_F(adr, res) |
| 14821 | POST_IO |
| 14822 | RET(12) |
| 14823 | } |
| 14824 | |
| 14825 | // CLR |
| 14826 | OPCODE(0x4260) |
| 14827 | { |
| 14828 | u32 adr, res; |
| 14829 | u32 src, dst; |
| 14830 | |
| 14831 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 14832 | AREG((Opcode >> 0) & 7) = adr; |
| 14833 | res = 0; |
| 14834 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14835 | PRE_IO |
| 14836 | WRITE_WORD_F(adr, res) |
| 14837 | POST_IO |
| 14838 | RET(14) |
| 14839 | } |
| 14840 | |
| 14841 | // CLR |
| 14842 | OPCODE(0x4268) |
| 14843 | { |
| 14844 | u32 adr, res; |
| 14845 | u32 src, dst; |
| 14846 | |
| 14847 | FETCH_SWORD(adr); |
| 14848 | adr += AREG((Opcode >> 0) & 7); |
| 14849 | res = 0; |
| 14850 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14851 | PRE_IO |
| 14852 | WRITE_WORD_F(adr, res) |
| 14853 | POST_IO |
| 14854 | RET(16) |
| 14855 | } |
| 14856 | |
| 14857 | // CLR |
| 14858 | OPCODE(0x4270) |
| 14859 | { |
| 14860 | u32 adr, res; |
| 14861 | u32 src, dst; |
| 14862 | |
| 14863 | adr = AREG((Opcode >> 0) & 7); |
| 14864 | DECODE_EXT_WORD |
| 14865 | res = 0; |
| 14866 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14867 | PRE_IO |
| 14868 | WRITE_WORD_F(adr, res) |
| 14869 | POST_IO |
| 14870 | RET(18) |
| 14871 | } |
| 14872 | |
| 14873 | // CLR |
| 14874 | OPCODE(0x4278) |
| 14875 | { |
| 14876 | u32 adr, res; |
| 14877 | u32 src, dst; |
| 14878 | |
| 14879 | FETCH_SWORD(adr); |
| 14880 | res = 0; |
| 14881 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14882 | PRE_IO |
| 14883 | WRITE_WORD_F(adr, res) |
| 14884 | POST_IO |
| 14885 | RET(16) |
| 14886 | } |
| 14887 | |
| 14888 | // CLR |
| 14889 | OPCODE(0x4279) |
| 14890 | { |
| 14891 | u32 adr, res; |
| 14892 | u32 src, dst; |
| 14893 | |
| 14894 | FETCH_LONG(adr); |
| 14895 | res = 0; |
| 14896 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14897 | PRE_IO |
| 14898 | WRITE_WORD_F(adr, res) |
| 14899 | POST_IO |
| 14900 | RET(20) |
| 14901 | } |
| 14902 | |
| 14903 | // CLR |
| 14904 | OPCODE(0x425F) |
| 14905 | { |
| 14906 | u32 adr, res; |
| 14907 | u32 src, dst; |
| 14908 | |
| 14909 | adr = AREG(7); |
| 14910 | AREG(7) += 2; |
| 14911 | res = 0; |
| 14912 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14913 | PRE_IO |
| 14914 | WRITE_WORD_F(adr, res) |
| 14915 | POST_IO |
| 14916 | RET(12) |
| 14917 | } |
| 14918 | |
| 14919 | // CLR |
| 14920 | OPCODE(0x4267) |
| 14921 | { |
| 14922 | u32 adr, res; |
| 14923 | u32 src, dst; |
| 14924 | |
| 14925 | adr = AREG(7) - 2; |
| 14926 | AREG(7) = adr; |
| 14927 | res = 0; |
| 14928 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14929 | PRE_IO |
| 14930 | WRITE_WORD_F(adr, res) |
| 14931 | POST_IO |
| 14932 | RET(14) |
| 14933 | } |
| 14934 | |
| 14935 | // CLR |
| 14936 | OPCODE(0x4280) |
| 14937 | { |
| 14938 | u32 adr, res; |
| 14939 | u32 src, dst; |
| 14940 | |
| 14941 | res = 0; |
| 14942 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14943 | DREGu32((Opcode >> 0) & 7) = res; |
| 14944 | RET(6) |
| 14945 | } |
| 14946 | |
| 14947 | // CLR |
| 14948 | OPCODE(0x4290) |
| 14949 | { |
| 14950 | u32 adr, res; |
| 14951 | u32 src, dst; |
| 14952 | |
| 14953 | adr = AREG((Opcode >> 0) & 7); |
| 14954 | res = 0; |
| 14955 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14956 | PRE_IO |
| 14957 | WRITE_LONG_F(adr, res) |
| 14958 | POST_IO |
| 14959 | RET(20) |
| 14960 | } |
| 14961 | |
| 14962 | // CLR |
| 14963 | OPCODE(0x4298) |
| 14964 | { |
| 14965 | u32 adr, res; |
| 14966 | u32 src, dst; |
| 14967 | |
| 14968 | adr = AREG((Opcode >> 0) & 7); |
| 14969 | AREG((Opcode >> 0) & 7) += 4; |
| 14970 | res = 0; |
| 14971 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14972 | PRE_IO |
| 14973 | WRITE_LONG_F(adr, res) |
| 14974 | POST_IO |
| 14975 | RET(20) |
| 14976 | } |
| 14977 | |
| 14978 | // CLR |
| 14979 | OPCODE(0x42A0) |
| 14980 | { |
| 14981 | u32 adr, res; |
| 14982 | u32 src, dst; |
| 14983 | |
| 14984 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 14985 | AREG((Opcode >> 0) & 7) = adr; |
| 14986 | res = 0; |
| 14987 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 14988 | PRE_IO |
| 14989 | WRITE_LONG_F(adr, res) |
| 14990 | POST_IO |
| 14991 | RET(22) |
| 14992 | } |
| 14993 | |
| 14994 | // CLR |
| 14995 | OPCODE(0x42A8) |
| 14996 | { |
| 14997 | u32 adr, res; |
| 14998 | u32 src, dst; |
| 14999 | |
| 15000 | FETCH_SWORD(adr); |
| 15001 | adr += AREG((Opcode >> 0) & 7); |
| 15002 | res = 0; |
| 15003 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 15004 | PRE_IO |
| 15005 | WRITE_LONG_F(adr, res) |
| 15006 | POST_IO |
| 15007 | RET(24) |
| 15008 | } |
| 15009 | |
| 15010 | // CLR |
| 15011 | OPCODE(0x42B0) |
| 15012 | { |
| 15013 | u32 adr, res; |
| 15014 | u32 src, dst; |
| 15015 | |
| 15016 | adr = AREG((Opcode >> 0) & 7); |
| 15017 | DECODE_EXT_WORD |
| 15018 | res = 0; |
| 15019 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 15020 | PRE_IO |
| 15021 | WRITE_LONG_F(adr, res) |
| 15022 | POST_IO |
| 15023 | RET(26) |
| 15024 | } |
| 15025 | |
| 15026 | // CLR |
| 15027 | OPCODE(0x42B8) |
| 15028 | { |
| 15029 | u32 adr, res; |
| 15030 | u32 src, dst; |
| 15031 | |
| 15032 | FETCH_SWORD(adr); |
| 15033 | res = 0; |
| 15034 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 15035 | PRE_IO |
| 15036 | WRITE_LONG_F(adr, res) |
| 15037 | POST_IO |
| 15038 | RET(24) |
| 15039 | } |
| 15040 | |
| 15041 | // CLR |
| 15042 | OPCODE(0x42B9) |
| 15043 | { |
| 15044 | u32 adr, res; |
| 15045 | u32 src, dst; |
| 15046 | |
| 15047 | FETCH_LONG(adr); |
| 15048 | res = 0; |
| 15049 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 15050 | PRE_IO |
| 15051 | WRITE_LONG_F(adr, res) |
| 15052 | POST_IO |
| 15053 | RET(28) |
| 15054 | } |
| 15055 | |
| 15056 | // CLR |
| 15057 | OPCODE(0x429F) |
| 15058 | { |
| 15059 | u32 adr, res; |
| 15060 | u32 src, dst; |
| 15061 | |
| 15062 | adr = AREG(7); |
| 15063 | AREG(7) += 4; |
| 15064 | res = 0; |
| 15065 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 15066 | PRE_IO |
| 15067 | WRITE_LONG_F(adr, res) |
| 15068 | POST_IO |
| 15069 | RET(20) |
| 15070 | } |
| 15071 | |
| 15072 | // CLR |
| 15073 | OPCODE(0x42A7) |
| 15074 | { |
| 15075 | u32 adr, res; |
| 15076 | u32 src, dst; |
| 15077 | |
| 15078 | adr = AREG(7) - 4; |
| 15079 | AREG(7) = adr; |
| 15080 | res = 0; |
| 15081 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
| 15082 | PRE_IO |
| 15083 | WRITE_LONG_F(adr, res) |
| 15084 | POST_IO |
| 15085 | RET(22) |
| 15086 | } |
| 15087 | |
| 15088 | // NEG |
| 15089 | OPCODE(0x4400) |
| 15090 | { |
| 15091 | u32 adr, res; |
| 15092 | u32 src, dst; |
| 15093 | |
| 15094 | src = DREGu8((Opcode >> 0) & 7); |
| 15095 | res = -src; |
| 15096 | flag_V = res & src; |
| 15097 | flag_N = flag_X = flag_C = res; |
| 15098 | flag_NotZ = res & 0xFF; |
| 15099 | DREGu8((Opcode >> 0) & 7) = res; |
| 15100 | RET(4) |
| 15101 | } |
| 15102 | |
| 15103 | // NEG |
| 15104 | OPCODE(0x4410) |
| 15105 | { |
| 15106 | u32 adr, res; |
| 15107 | u32 src, dst; |
| 15108 | |
| 15109 | adr = AREG((Opcode >> 0) & 7); |
| 15110 | PRE_IO |
| 15111 | READ_BYTE_F(adr, src) |
| 15112 | res = -src; |
| 15113 | flag_V = res & src; |
| 15114 | flag_N = flag_X = flag_C = res; |
| 15115 | flag_NotZ = res & 0xFF; |
| 15116 | WRITE_BYTE_F(adr, res) |
| 15117 | POST_IO |
| 15118 | RET(12) |
| 15119 | } |
| 15120 | |
| 15121 | // NEG |
| 15122 | OPCODE(0x4418) |
| 15123 | { |
| 15124 | u32 adr, res; |
| 15125 | u32 src, dst; |
| 15126 | |
| 15127 | adr = AREG((Opcode >> 0) & 7); |
| 15128 | AREG((Opcode >> 0) & 7) += 1; |
| 15129 | PRE_IO |
| 15130 | READ_BYTE_F(adr, src) |
| 15131 | res = -src; |
| 15132 | flag_V = res & src; |
| 15133 | flag_N = flag_X = flag_C = res; |
| 15134 | flag_NotZ = res & 0xFF; |
| 15135 | WRITE_BYTE_F(adr, res) |
| 15136 | POST_IO |
| 15137 | RET(12) |
| 15138 | } |
| 15139 | |
| 15140 | // NEG |
| 15141 | OPCODE(0x4420) |
| 15142 | { |
| 15143 | u32 adr, res; |
| 15144 | u32 src, dst; |
| 15145 | |
| 15146 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 15147 | AREG((Opcode >> 0) & 7) = adr; |
| 15148 | PRE_IO |
| 15149 | READ_BYTE_F(adr, src) |
| 15150 | res = -src; |
| 15151 | flag_V = res & src; |
| 15152 | flag_N = flag_X = flag_C = res; |
| 15153 | flag_NotZ = res & 0xFF; |
| 15154 | WRITE_BYTE_F(adr, res) |
| 15155 | POST_IO |
| 15156 | RET(14) |
| 15157 | } |
| 15158 | |
| 15159 | // NEG |
| 15160 | OPCODE(0x4428) |
| 15161 | { |
| 15162 | u32 adr, res; |
| 15163 | u32 src, dst; |
| 15164 | |
| 15165 | FETCH_SWORD(adr); |
| 15166 | adr += AREG((Opcode >> 0) & 7); |
| 15167 | PRE_IO |
| 15168 | READ_BYTE_F(adr, src) |
| 15169 | res = -src; |
| 15170 | flag_V = res & src; |
| 15171 | flag_N = flag_X = flag_C = res; |
| 15172 | flag_NotZ = res & 0xFF; |
| 15173 | WRITE_BYTE_F(adr, res) |
| 15174 | POST_IO |
| 15175 | RET(16) |
| 15176 | } |
| 15177 | |
| 15178 | // NEG |
| 15179 | OPCODE(0x4430) |
| 15180 | { |
| 15181 | u32 adr, res; |
| 15182 | u32 src, dst; |
| 15183 | |
| 15184 | adr = AREG((Opcode >> 0) & 7); |
| 15185 | DECODE_EXT_WORD |
| 15186 | PRE_IO |
| 15187 | READ_BYTE_F(adr, src) |
| 15188 | res = -src; |
| 15189 | flag_V = res & src; |
| 15190 | flag_N = flag_X = flag_C = res; |
| 15191 | flag_NotZ = res & 0xFF; |
| 15192 | WRITE_BYTE_F(adr, res) |
| 15193 | POST_IO |
| 15194 | RET(18) |
| 15195 | } |
| 15196 | |
| 15197 | // NEG |
| 15198 | OPCODE(0x4438) |
| 15199 | { |
| 15200 | u32 adr, res; |
| 15201 | u32 src, dst; |
| 15202 | |
| 15203 | FETCH_SWORD(adr); |
| 15204 | PRE_IO |
| 15205 | READ_BYTE_F(adr, src) |
| 15206 | res = -src; |
| 15207 | flag_V = res & src; |
| 15208 | flag_N = flag_X = flag_C = res; |
| 15209 | flag_NotZ = res & 0xFF; |
| 15210 | WRITE_BYTE_F(adr, res) |
| 15211 | POST_IO |
| 15212 | RET(16) |
| 15213 | } |
| 15214 | |
| 15215 | // NEG |
| 15216 | OPCODE(0x4439) |
| 15217 | { |
| 15218 | u32 adr, res; |
| 15219 | u32 src, dst; |
| 15220 | |
| 15221 | FETCH_LONG(adr); |
| 15222 | PRE_IO |
| 15223 | READ_BYTE_F(adr, src) |
| 15224 | res = -src; |
| 15225 | flag_V = res & src; |
| 15226 | flag_N = flag_X = flag_C = res; |
| 15227 | flag_NotZ = res & 0xFF; |
| 15228 | WRITE_BYTE_F(adr, res) |
| 15229 | POST_IO |
| 15230 | RET(20) |
| 15231 | } |
| 15232 | |
| 15233 | // NEG |
| 15234 | OPCODE(0x441F) |
| 15235 | { |
| 15236 | u32 adr, res; |
| 15237 | u32 src, dst; |
| 15238 | |
| 15239 | adr = AREG(7); |
| 15240 | AREG(7) += 2; |
| 15241 | PRE_IO |
| 15242 | READ_BYTE_F(adr, src) |
| 15243 | res = -src; |
| 15244 | flag_V = res & src; |
| 15245 | flag_N = flag_X = flag_C = res; |
| 15246 | flag_NotZ = res & 0xFF; |
| 15247 | WRITE_BYTE_F(adr, res) |
| 15248 | POST_IO |
| 15249 | RET(12) |
| 15250 | } |
| 15251 | |
| 15252 | // NEG |
| 15253 | OPCODE(0x4427) |
| 15254 | { |
| 15255 | u32 adr, res; |
| 15256 | u32 src, dst; |
| 15257 | |
| 15258 | adr = AREG(7) - 2; |
| 15259 | AREG(7) = adr; |
| 15260 | PRE_IO |
| 15261 | READ_BYTE_F(adr, src) |
| 15262 | res = -src; |
| 15263 | flag_V = res & src; |
| 15264 | flag_N = flag_X = flag_C = res; |
| 15265 | flag_NotZ = res & 0xFF; |
| 15266 | WRITE_BYTE_F(adr, res) |
| 15267 | POST_IO |
| 15268 | RET(14) |
| 15269 | } |
| 15270 | |
| 15271 | // NEG |
| 15272 | OPCODE(0x4440) |
| 15273 | { |
| 15274 | u32 adr, res; |
| 15275 | u32 src, dst; |
| 15276 | |
| 15277 | src = DREGu16((Opcode >> 0) & 7); |
| 15278 | res = -src; |
| 15279 | flag_V = (res & src) >> 8; |
| 15280 | flag_N = flag_X = flag_C = res >> 8; |
| 15281 | flag_NotZ = res & 0xFFFF; |
| 15282 | DREGu16((Opcode >> 0) & 7) = res; |
| 15283 | RET(4) |
| 15284 | } |
| 15285 | |
| 15286 | // NEG |
| 15287 | OPCODE(0x4450) |
| 15288 | { |
| 15289 | u32 adr, res; |
| 15290 | u32 src, dst; |
| 15291 | |
| 15292 | adr = AREG((Opcode >> 0) & 7); |
| 15293 | PRE_IO |
| 15294 | READ_WORD_F(adr, src) |
| 15295 | res = -src; |
| 15296 | flag_V = (res & src) >> 8; |
| 15297 | flag_N = flag_X = flag_C = res >> 8; |
| 15298 | flag_NotZ = res & 0xFFFF; |
| 15299 | WRITE_WORD_F(adr, res) |
| 15300 | POST_IO |
| 15301 | RET(12) |
| 15302 | } |
| 15303 | |
| 15304 | // NEG |
| 15305 | OPCODE(0x4458) |
| 15306 | { |
| 15307 | u32 adr, res; |
| 15308 | u32 src, dst; |
| 15309 | |
| 15310 | adr = AREG((Opcode >> 0) & 7); |
| 15311 | AREG((Opcode >> 0) & 7) += 2; |
| 15312 | PRE_IO |
| 15313 | READ_WORD_F(adr, src) |
| 15314 | res = -src; |
| 15315 | flag_V = (res & src) >> 8; |
| 15316 | flag_N = flag_X = flag_C = res >> 8; |
| 15317 | flag_NotZ = res & 0xFFFF; |
| 15318 | WRITE_WORD_F(adr, res) |
| 15319 | POST_IO |
| 15320 | RET(12) |
| 15321 | } |
| 15322 | |
| 15323 | // NEG |
| 15324 | OPCODE(0x4460) |
| 15325 | { |
| 15326 | u32 adr, res; |
| 15327 | u32 src, dst; |
| 15328 | |
| 15329 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 15330 | AREG((Opcode >> 0) & 7) = adr; |
| 15331 | PRE_IO |
| 15332 | READ_WORD_F(adr, src) |
| 15333 | res = -src; |
| 15334 | flag_V = (res & src) >> 8; |
| 15335 | flag_N = flag_X = flag_C = res >> 8; |
| 15336 | flag_NotZ = res & 0xFFFF; |
| 15337 | WRITE_WORD_F(adr, res) |
| 15338 | POST_IO |
| 15339 | RET(14) |
| 15340 | } |
| 15341 | |
| 15342 | // NEG |
| 15343 | OPCODE(0x4468) |
| 15344 | { |
| 15345 | u32 adr, res; |
| 15346 | u32 src, dst; |
| 15347 | |
| 15348 | FETCH_SWORD(adr); |
| 15349 | adr += AREG((Opcode >> 0) & 7); |
| 15350 | PRE_IO |
| 15351 | READ_WORD_F(adr, src) |
| 15352 | res = -src; |
| 15353 | flag_V = (res & src) >> 8; |
| 15354 | flag_N = flag_X = flag_C = res >> 8; |
| 15355 | flag_NotZ = res & 0xFFFF; |
| 15356 | WRITE_WORD_F(adr, res) |
| 15357 | POST_IO |
| 15358 | RET(16) |
| 15359 | } |
| 15360 | |
| 15361 | // NEG |
| 15362 | OPCODE(0x4470) |
| 15363 | { |
| 15364 | u32 adr, res; |
| 15365 | u32 src, dst; |
| 15366 | |
| 15367 | adr = AREG((Opcode >> 0) & 7); |
| 15368 | DECODE_EXT_WORD |
| 15369 | PRE_IO |
| 15370 | READ_WORD_F(adr, src) |
| 15371 | res = -src; |
| 15372 | flag_V = (res & src) >> 8; |
| 15373 | flag_N = flag_X = flag_C = res >> 8; |
| 15374 | flag_NotZ = res & 0xFFFF; |
| 15375 | WRITE_WORD_F(adr, res) |
| 15376 | POST_IO |
| 15377 | RET(18) |
| 15378 | } |
| 15379 | |
| 15380 | // NEG |
| 15381 | OPCODE(0x4478) |
| 15382 | { |
| 15383 | u32 adr, res; |
| 15384 | u32 src, dst; |
| 15385 | |
| 15386 | FETCH_SWORD(adr); |
| 15387 | PRE_IO |
| 15388 | READ_WORD_F(adr, src) |
| 15389 | res = -src; |
| 15390 | flag_V = (res & src) >> 8; |
| 15391 | flag_N = flag_X = flag_C = res >> 8; |
| 15392 | flag_NotZ = res & 0xFFFF; |
| 15393 | WRITE_WORD_F(adr, res) |
| 15394 | POST_IO |
| 15395 | RET(16) |
| 15396 | } |
| 15397 | |
| 15398 | // NEG |
| 15399 | OPCODE(0x4479) |
| 15400 | { |
| 15401 | u32 adr, res; |
| 15402 | u32 src, dst; |
| 15403 | |
| 15404 | FETCH_LONG(adr); |
| 15405 | PRE_IO |
| 15406 | READ_WORD_F(adr, src) |
| 15407 | res = -src; |
| 15408 | flag_V = (res & src) >> 8; |
| 15409 | flag_N = flag_X = flag_C = res >> 8; |
| 15410 | flag_NotZ = res & 0xFFFF; |
| 15411 | WRITE_WORD_F(adr, res) |
| 15412 | POST_IO |
| 15413 | RET(20) |
| 15414 | } |
| 15415 | |
| 15416 | // NEG |
| 15417 | OPCODE(0x445F) |
| 15418 | { |
| 15419 | u32 adr, res; |
| 15420 | u32 src, dst; |
| 15421 | |
| 15422 | adr = AREG(7); |
| 15423 | AREG(7) += 2; |
| 15424 | PRE_IO |
| 15425 | READ_WORD_F(adr, src) |
| 15426 | res = -src; |
| 15427 | flag_V = (res & src) >> 8; |
| 15428 | flag_N = flag_X = flag_C = res >> 8; |
| 15429 | flag_NotZ = res & 0xFFFF; |
| 15430 | WRITE_WORD_F(adr, res) |
| 15431 | POST_IO |
| 15432 | RET(12) |
| 15433 | } |
| 15434 | |
| 15435 | // NEG |
| 15436 | OPCODE(0x4467) |
| 15437 | { |
| 15438 | u32 adr, res; |
| 15439 | u32 src, dst; |
| 15440 | |
| 15441 | adr = AREG(7) - 2; |
| 15442 | AREG(7) = adr; |
| 15443 | PRE_IO |
| 15444 | READ_WORD_F(adr, src) |
| 15445 | res = -src; |
| 15446 | flag_V = (res & src) >> 8; |
| 15447 | flag_N = flag_X = flag_C = res >> 8; |
| 15448 | flag_NotZ = res & 0xFFFF; |
| 15449 | WRITE_WORD_F(adr, res) |
| 15450 | POST_IO |
| 15451 | RET(14) |
| 15452 | } |
| 15453 | |
| 15454 | // NEG |
| 15455 | OPCODE(0x4480) |
| 15456 | { |
| 15457 | u32 adr, res; |
| 15458 | u32 src, dst; |
| 15459 | |
| 15460 | src = DREGu32((Opcode >> 0) & 7); |
| 15461 | res = -src; |
| 15462 | flag_NotZ = res; |
| 15463 | flag_V = (res & src) >> 24; |
| 15464 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15465 | flag_N = res >> 24; |
| 15466 | DREGu32((Opcode >> 0) & 7) = res; |
| 15467 | RET(6) |
| 15468 | } |
| 15469 | |
| 15470 | // NEG |
| 15471 | OPCODE(0x4490) |
| 15472 | { |
| 15473 | u32 adr, res; |
| 15474 | u32 src, dst; |
| 15475 | |
| 15476 | adr = AREG((Opcode >> 0) & 7); |
| 15477 | PRE_IO |
| 15478 | READ_LONG_F(adr, src) |
| 15479 | res = -src; |
| 15480 | flag_NotZ = res; |
| 15481 | flag_V = (res & src) >> 24; |
| 15482 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15483 | flag_N = res >> 24; |
| 15484 | WRITE_LONG_F(adr, res) |
| 15485 | POST_IO |
| 15486 | RET(20) |
| 15487 | } |
| 15488 | |
| 15489 | // NEG |
| 15490 | OPCODE(0x4498) |
| 15491 | { |
| 15492 | u32 adr, res; |
| 15493 | u32 src, dst; |
| 15494 | |
| 15495 | adr = AREG((Opcode >> 0) & 7); |
| 15496 | AREG((Opcode >> 0) & 7) += 4; |
| 15497 | PRE_IO |
| 15498 | READ_LONG_F(adr, src) |
| 15499 | res = -src; |
| 15500 | flag_NotZ = res; |
| 15501 | flag_V = (res & src) >> 24; |
| 15502 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15503 | flag_N = res >> 24; |
| 15504 | WRITE_LONG_F(adr, res) |
| 15505 | POST_IO |
| 15506 | RET(20) |
| 15507 | } |
| 15508 | |
| 15509 | // NEG |
| 15510 | OPCODE(0x44A0) |
| 15511 | { |
| 15512 | u32 adr, res; |
| 15513 | u32 src, dst; |
| 15514 | |
| 15515 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 15516 | AREG((Opcode >> 0) & 7) = adr; |
| 15517 | PRE_IO |
| 15518 | READ_LONG_F(adr, src) |
| 15519 | res = -src; |
| 15520 | flag_NotZ = res; |
| 15521 | flag_V = (res & src) >> 24; |
| 15522 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15523 | flag_N = res >> 24; |
| 15524 | WRITE_LONG_F(adr, res) |
| 15525 | POST_IO |
| 15526 | RET(22) |
| 15527 | } |
| 15528 | |
| 15529 | // NEG |
| 15530 | OPCODE(0x44A8) |
| 15531 | { |
| 15532 | u32 adr, res; |
| 15533 | u32 src, dst; |
| 15534 | |
| 15535 | FETCH_SWORD(adr); |
| 15536 | adr += AREG((Opcode >> 0) & 7); |
| 15537 | PRE_IO |
| 15538 | READ_LONG_F(adr, src) |
| 15539 | res = -src; |
| 15540 | flag_NotZ = res; |
| 15541 | flag_V = (res & src) >> 24; |
| 15542 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15543 | flag_N = res >> 24; |
| 15544 | WRITE_LONG_F(adr, res) |
| 15545 | POST_IO |
| 15546 | RET(24) |
| 15547 | } |
| 15548 | |
| 15549 | // NEG |
| 15550 | OPCODE(0x44B0) |
| 15551 | { |
| 15552 | u32 adr, res; |
| 15553 | u32 src, dst; |
| 15554 | |
| 15555 | adr = AREG((Opcode >> 0) & 7); |
| 15556 | DECODE_EXT_WORD |
| 15557 | PRE_IO |
| 15558 | READ_LONG_F(adr, src) |
| 15559 | res = -src; |
| 15560 | flag_NotZ = res; |
| 15561 | flag_V = (res & src) >> 24; |
| 15562 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15563 | flag_N = res >> 24; |
| 15564 | WRITE_LONG_F(adr, res) |
| 15565 | POST_IO |
| 15566 | RET(26) |
| 15567 | } |
| 15568 | |
| 15569 | // NEG |
| 15570 | OPCODE(0x44B8) |
| 15571 | { |
| 15572 | u32 adr, res; |
| 15573 | u32 src, dst; |
| 15574 | |
| 15575 | FETCH_SWORD(adr); |
| 15576 | PRE_IO |
| 15577 | READ_LONG_F(adr, src) |
| 15578 | res = -src; |
| 15579 | flag_NotZ = res; |
| 15580 | flag_V = (res & src) >> 24; |
| 15581 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15582 | flag_N = res >> 24; |
| 15583 | WRITE_LONG_F(adr, res) |
| 15584 | POST_IO |
| 15585 | RET(24) |
| 15586 | } |
| 15587 | |
| 15588 | // NEG |
| 15589 | OPCODE(0x44B9) |
| 15590 | { |
| 15591 | u32 adr, res; |
| 15592 | u32 src, dst; |
| 15593 | |
| 15594 | FETCH_LONG(adr); |
| 15595 | PRE_IO |
| 15596 | READ_LONG_F(adr, src) |
| 15597 | res = -src; |
| 15598 | flag_NotZ = res; |
| 15599 | flag_V = (res & src) >> 24; |
| 15600 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15601 | flag_N = res >> 24; |
| 15602 | WRITE_LONG_F(adr, res) |
| 15603 | POST_IO |
| 15604 | RET(28) |
| 15605 | } |
| 15606 | |
| 15607 | // NEG |
| 15608 | OPCODE(0x449F) |
| 15609 | { |
| 15610 | u32 adr, res; |
| 15611 | u32 src, dst; |
| 15612 | |
| 15613 | adr = AREG(7); |
| 15614 | AREG(7) += 4; |
| 15615 | PRE_IO |
| 15616 | READ_LONG_F(adr, src) |
| 15617 | res = -src; |
| 15618 | flag_NotZ = res; |
| 15619 | flag_V = (res & src) >> 24; |
| 15620 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15621 | flag_N = res >> 24; |
| 15622 | WRITE_LONG_F(adr, res) |
| 15623 | POST_IO |
| 15624 | RET(20) |
| 15625 | } |
| 15626 | |
| 15627 | // NEG |
| 15628 | OPCODE(0x44A7) |
| 15629 | { |
| 15630 | u32 adr, res; |
| 15631 | u32 src, dst; |
| 15632 | |
| 15633 | adr = AREG(7) - 4; |
| 15634 | AREG(7) = adr; |
| 15635 | PRE_IO |
| 15636 | READ_LONG_F(adr, src) |
| 15637 | res = -src; |
| 15638 | flag_NotZ = res; |
| 15639 | flag_V = (res & src) >> 24; |
| 15640 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 15641 | flag_N = res >> 24; |
| 15642 | WRITE_LONG_F(adr, res) |
| 15643 | POST_IO |
| 15644 | RET(22) |
| 15645 | } |
| 15646 | |
| 15647 | // NOT |
| 15648 | OPCODE(0x4600) |
| 15649 | { |
| 15650 | u32 adr, res; |
| 15651 | u32 src, dst; |
| 15652 | |
| 15653 | src = DREGu8((Opcode >> 0) & 7); |
| 15654 | res = ~src; |
| 15655 | flag_C = 0; |
| 15656 | flag_V = 0; |
| 15657 | flag_N = res; |
| 15658 | flag_NotZ = res & 0xFF; |
| 15659 | DREGu8((Opcode >> 0) & 7) = res; |
| 15660 | RET(4) |
| 15661 | } |
| 15662 | |
| 15663 | // NOT |
| 15664 | OPCODE(0x4610) |
| 15665 | { |
| 15666 | u32 adr, res; |
| 15667 | u32 src, dst; |
| 15668 | |
| 15669 | adr = AREG((Opcode >> 0) & 7); |
| 15670 | PRE_IO |
| 15671 | READ_BYTE_F(adr, src) |
| 15672 | res = ~src; |
| 15673 | flag_C = 0; |
| 15674 | flag_V = 0; |
| 15675 | flag_N = res; |
| 15676 | flag_NotZ = res & 0xFF; |
| 15677 | WRITE_BYTE_F(adr, res) |
| 15678 | POST_IO |
| 15679 | RET(12) |
| 15680 | } |
| 15681 | |
| 15682 | // NOT |
| 15683 | OPCODE(0x4618) |
| 15684 | { |
| 15685 | u32 adr, res; |
| 15686 | u32 src, dst; |
| 15687 | |
| 15688 | adr = AREG((Opcode >> 0) & 7); |
| 15689 | AREG((Opcode >> 0) & 7) += 1; |
| 15690 | PRE_IO |
| 15691 | READ_BYTE_F(adr, src) |
| 15692 | res = ~src; |
| 15693 | flag_C = 0; |
| 15694 | flag_V = 0; |
| 15695 | flag_N = res; |
| 15696 | flag_NotZ = res & 0xFF; |
| 15697 | WRITE_BYTE_F(adr, res) |
| 15698 | POST_IO |
| 15699 | RET(12) |
| 15700 | } |
| 15701 | |
| 15702 | // NOT |
| 15703 | OPCODE(0x4620) |
| 15704 | { |
| 15705 | u32 adr, res; |
| 15706 | u32 src, dst; |
| 15707 | |
| 15708 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 15709 | AREG((Opcode >> 0) & 7) = adr; |
| 15710 | PRE_IO |
| 15711 | READ_BYTE_F(adr, src) |
| 15712 | res = ~src; |
| 15713 | flag_C = 0; |
| 15714 | flag_V = 0; |
| 15715 | flag_N = res; |
| 15716 | flag_NotZ = res & 0xFF; |
| 15717 | WRITE_BYTE_F(adr, res) |
| 15718 | POST_IO |
| 15719 | RET(14) |
| 15720 | } |
| 15721 | |
| 15722 | // NOT |
| 15723 | OPCODE(0x4628) |
| 15724 | { |
| 15725 | u32 adr, res; |
| 15726 | u32 src, dst; |
| 15727 | |
| 15728 | FETCH_SWORD(adr); |
| 15729 | adr += AREG((Opcode >> 0) & 7); |
| 15730 | PRE_IO |
| 15731 | READ_BYTE_F(adr, src) |
| 15732 | res = ~src; |
| 15733 | flag_C = 0; |
| 15734 | flag_V = 0; |
| 15735 | flag_N = res; |
| 15736 | flag_NotZ = res & 0xFF; |
| 15737 | WRITE_BYTE_F(adr, res) |
| 15738 | POST_IO |
| 15739 | RET(16) |
| 15740 | } |
| 15741 | |
| 15742 | // NOT |
| 15743 | OPCODE(0x4630) |
| 15744 | { |
| 15745 | u32 adr, res; |
| 15746 | u32 src, dst; |
| 15747 | |
| 15748 | adr = AREG((Opcode >> 0) & 7); |
| 15749 | DECODE_EXT_WORD |
| 15750 | PRE_IO |
| 15751 | READ_BYTE_F(adr, src) |
| 15752 | res = ~src; |
| 15753 | flag_C = 0; |
| 15754 | flag_V = 0; |
| 15755 | flag_N = res; |
| 15756 | flag_NotZ = res & 0xFF; |
| 15757 | WRITE_BYTE_F(adr, res) |
| 15758 | POST_IO |
| 15759 | RET(18) |
| 15760 | } |
| 15761 | |
| 15762 | // NOT |
| 15763 | OPCODE(0x4638) |
| 15764 | { |
| 15765 | u32 adr, res; |
| 15766 | u32 src, dst; |
| 15767 | |
| 15768 | FETCH_SWORD(adr); |
| 15769 | PRE_IO |
| 15770 | READ_BYTE_F(adr, src) |
| 15771 | res = ~src; |
| 15772 | flag_C = 0; |
| 15773 | flag_V = 0; |
| 15774 | flag_N = res; |
| 15775 | flag_NotZ = res & 0xFF; |
| 15776 | WRITE_BYTE_F(adr, res) |
| 15777 | POST_IO |
| 15778 | RET(16) |
| 15779 | } |
| 15780 | |
| 15781 | // NOT |
| 15782 | OPCODE(0x4639) |
| 15783 | { |
| 15784 | u32 adr, res; |
| 15785 | u32 src, dst; |
| 15786 | |
| 15787 | FETCH_LONG(adr); |
| 15788 | PRE_IO |
| 15789 | READ_BYTE_F(adr, src) |
| 15790 | res = ~src; |
| 15791 | flag_C = 0; |
| 15792 | flag_V = 0; |
| 15793 | flag_N = res; |
| 15794 | flag_NotZ = res & 0xFF; |
| 15795 | WRITE_BYTE_F(adr, res) |
| 15796 | POST_IO |
| 15797 | RET(20) |
| 15798 | } |
| 15799 | |
| 15800 | // NOT |
| 15801 | OPCODE(0x461F) |
| 15802 | { |
| 15803 | u32 adr, res; |
| 15804 | u32 src, dst; |
| 15805 | |
| 15806 | adr = AREG(7); |
| 15807 | AREG(7) += 2; |
| 15808 | PRE_IO |
| 15809 | READ_BYTE_F(adr, src) |
| 15810 | res = ~src; |
| 15811 | flag_C = 0; |
| 15812 | flag_V = 0; |
| 15813 | flag_N = res; |
| 15814 | flag_NotZ = res & 0xFF; |
| 15815 | WRITE_BYTE_F(adr, res) |
| 15816 | POST_IO |
| 15817 | RET(12) |
| 15818 | } |
| 15819 | |
| 15820 | // NOT |
| 15821 | OPCODE(0x4627) |
| 15822 | { |
| 15823 | u32 adr, res; |
| 15824 | u32 src, dst; |
| 15825 | |
| 15826 | adr = AREG(7) - 2; |
| 15827 | AREG(7) = adr; |
| 15828 | PRE_IO |
| 15829 | READ_BYTE_F(adr, src) |
| 15830 | res = ~src; |
| 15831 | flag_C = 0; |
| 15832 | flag_V = 0; |
| 15833 | flag_N = res; |
| 15834 | flag_NotZ = res & 0xFF; |
| 15835 | WRITE_BYTE_F(adr, res) |
| 15836 | POST_IO |
| 15837 | RET(14) |
| 15838 | } |
| 15839 | |
| 15840 | // NOT |
| 15841 | OPCODE(0x4640) |
| 15842 | { |
| 15843 | u32 adr, res; |
| 15844 | u32 src, dst; |
| 15845 | |
| 15846 | src = DREGu16((Opcode >> 0) & 7); |
| 15847 | res = ~src; |
| 15848 | flag_C = 0; |
| 15849 | flag_V = 0; |
| 15850 | flag_NotZ = res & 0xFFFF; |
| 15851 | flag_N = res >> 8; |
| 15852 | DREGu16((Opcode >> 0) & 7) = res; |
| 15853 | RET(4) |
| 15854 | } |
| 15855 | |
| 15856 | // NOT |
| 15857 | OPCODE(0x4650) |
| 15858 | { |
| 15859 | u32 adr, res; |
| 15860 | u32 src, dst; |
| 15861 | |
| 15862 | adr = AREG((Opcode >> 0) & 7); |
| 15863 | PRE_IO |
| 15864 | READ_WORD_F(adr, src) |
| 15865 | res = ~src; |
| 15866 | flag_C = 0; |
| 15867 | flag_V = 0; |
| 15868 | flag_NotZ = res & 0xFFFF; |
| 15869 | flag_N = res >> 8; |
| 15870 | WRITE_WORD_F(adr, res) |
| 15871 | POST_IO |
| 15872 | RET(12) |
| 15873 | } |
| 15874 | |
| 15875 | // NOT |
| 15876 | OPCODE(0x4658) |
| 15877 | { |
| 15878 | u32 adr, res; |
| 15879 | u32 src, dst; |
| 15880 | |
| 15881 | adr = AREG((Opcode >> 0) & 7); |
| 15882 | AREG((Opcode >> 0) & 7) += 2; |
| 15883 | PRE_IO |
| 15884 | READ_WORD_F(adr, src) |
| 15885 | res = ~src; |
| 15886 | flag_C = 0; |
| 15887 | flag_V = 0; |
| 15888 | flag_NotZ = res & 0xFFFF; |
| 15889 | flag_N = res >> 8; |
| 15890 | WRITE_WORD_F(adr, res) |
| 15891 | POST_IO |
| 15892 | RET(12) |
| 15893 | } |
| 15894 | |
| 15895 | // NOT |
| 15896 | OPCODE(0x4660) |
| 15897 | { |
| 15898 | u32 adr, res; |
| 15899 | u32 src, dst; |
| 15900 | |
| 15901 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 15902 | AREG((Opcode >> 0) & 7) = adr; |
| 15903 | PRE_IO |
| 15904 | READ_WORD_F(adr, src) |
| 15905 | res = ~src; |
| 15906 | flag_C = 0; |
| 15907 | flag_V = 0; |
| 15908 | flag_NotZ = res & 0xFFFF; |
| 15909 | flag_N = res >> 8; |
| 15910 | WRITE_WORD_F(adr, res) |
| 15911 | POST_IO |
| 15912 | RET(14) |
| 15913 | } |
| 15914 | |
| 15915 | // NOT |
| 15916 | OPCODE(0x4668) |
| 15917 | { |
| 15918 | u32 adr, res; |
| 15919 | u32 src, dst; |
| 15920 | |
| 15921 | FETCH_SWORD(adr); |
| 15922 | adr += AREG((Opcode >> 0) & 7); |
| 15923 | PRE_IO |
| 15924 | READ_WORD_F(adr, src) |
| 15925 | res = ~src; |
| 15926 | flag_C = 0; |
| 15927 | flag_V = 0; |
| 15928 | flag_NotZ = res & 0xFFFF; |
| 15929 | flag_N = res >> 8; |
| 15930 | WRITE_WORD_F(adr, res) |
| 15931 | POST_IO |
| 15932 | RET(16) |
| 15933 | } |
| 15934 | |
| 15935 | // NOT |
| 15936 | OPCODE(0x4670) |
| 15937 | { |
| 15938 | u32 adr, res; |
| 15939 | u32 src, dst; |
| 15940 | |
| 15941 | adr = AREG((Opcode >> 0) & 7); |
| 15942 | DECODE_EXT_WORD |
| 15943 | PRE_IO |
| 15944 | READ_WORD_F(adr, src) |
| 15945 | res = ~src; |
| 15946 | flag_C = 0; |
| 15947 | flag_V = 0; |
| 15948 | flag_NotZ = res & 0xFFFF; |
| 15949 | flag_N = res >> 8; |
| 15950 | WRITE_WORD_F(adr, res) |
| 15951 | POST_IO |
| 15952 | RET(18) |
| 15953 | } |
| 15954 | |
| 15955 | // NOT |
| 15956 | OPCODE(0x4678) |
| 15957 | { |
| 15958 | u32 adr, res; |
| 15959 | u32 src, dst; |
| 15960 | |
| 15961 | FETCH_SWORD(adr); |
| 15962 | PRE_IO |
| 15963 | READ_WORD_F(adr, src) |
| 15964 | res = ~src; |
| 15965 | flag_C = 0; |
| 15966 | flag_V = 0; |
| 15967 | flag_NotZ = res & 0xFFFF; |
| 15968 | flag_N = res >> 8; |
| 15969 | WRITE_WORD_F(adr, res) |
| 15970 | POST_IO |
| 15971 | RET(16) |
| 15972 | } |
| 15973 | |
| 15974 | // NOT |
| 15975 | OPCODE(0x4679) |
| 15976 | { |
| 15977 | u32 adr, res; |
| 15978 | u32 src, dst; |
| 15979 | |
| 15980 | FETCH_LONG(adr); |
| 15981 | PRE_IO |
| 15982 | READ_WORD_F(adr, src) |
| 15983 | res = ~src; |
| 15984 | flag_C = 0; |
| 15985 | flag_V = 0; |
| 15986 | flag_NotZ = res & 0xFFFF; |
| 15987 | flag_N = res >> 8; |
| 15988 | WRITE_WORD_F(adr, res) |
| 15989 | POST_IO |
| 15990 | RET(20) |
| 15991 | } |
| 15992 | |
| 15993 | // NOT |
| 15994 | OPCODE(0x465F) |
| 15995 | { |
| 15996 | u32 adr, res; |
| 15997 | u32 src, dst; |
| 15998 | |
| 15999 | adr = AREG(7); |
| 16000 | AREG(7) += 2; |
| 16001 | PRE_IO |
| 16002 | READ_WORD_F(adr, src) |
| 16003 | res = ~src; |
| 16004 | flag_C = 0; |
| 16005 | flag_V = 0; |
| 16006 | flag_NotZ = res & 0xFFFF; |
| 16007 | flag_N = res >> 8; |
| 16008 | WRITE_WORD_F(adr, res) |
| 16009 | POST_IO |
| 16010 | RET(12) |
| 16011 | } |
| 16012 | |
| 16013 | // NOT |
| 16014 | OPCODE(0x4667) |
| 16015 | { |
| 16016 | u32 adr, res; |
| 16017 | u32 src, dst; |
| 16018 | |
| 16019 | adr = AREG(7) - 2; |
| 16020 | AREG(7) = adr; |
| 16021 | PRE_IO |
| 16022 | READ_WORD_F(adr, src) |
| 16023 | res = ~src; |
| 16024 | flag_C = 0; |
| 16025 | flag_V = 0; |
| 16026 | flag_NotZ = res & 0xFFFF; |
| 16027 | flag_N = res >> 8; |
| 16028 | WRITE_WORD_F(adr, res) |
| 16029 | POST_IO |
| 16030 | RET(14) |
| 16031 | } |
| 16032 | |
| 16033 | // NOT |
| 16034 | OPCODE(0x4680) |
| 16035 | { |
| 16036 | u32 adr, res; |
| 16037 | u32 src, dst; |
| 16038 | |
| 16039 | src = DREGu32((Opcode >> 0) & 7); |
| 16040 | res = ~src; |
| 16041 | flag_C = 0; |
| 16042 | flag_V = 0; |
| 16043 | flag_NotZ = res; |
| 16044 | flag_N = res >> 24; |
| 16045 | DREGu32((Opcode >> 0) & 7) = res; |
| 16046 | RET(6) |
| 16047 | } |
| 16048 | |
| 16049 | // NOT |
| 16050 | OPCODE(0x4690) |
| 16051 | { |
| 16052 | u32 adr, res; |
| 16053 | u32 src, dst; |
| 16054 | |
| 16055 | adr = AREG((Opcode >> 0) & 7); |
| 16056 | PRE_IO |
| 16057 | READ_LONG_F(adr, src) |
| 16058 | res = ~src; |
| 16059 | flag_C = 0; |
| 16060 | flag_V = 0; |
| 16061 | flag_NotZ = res; |
| 16062 | flag_N = res >> 24; |
| 16063 | WRITE_LONG_F(adr, res) |
| 16064 | POST_IO |
| 16065 | RET(20) |
| 16066 | } |
| 16067 | |
| 16068 | // NOT |
| 16069 | OPCODE(0x4698) |
| 16070 | { |
| 16071 | u32 adr, res; |
| 16072 | u32 src, dst; |
| 16073 | |
| 16074 | adr = AREG((Opcode >> 0) & 7); |
| 16075 | AREG((Opcode >> 0) & 7) += 4; |
| 16076 | PRE_IO |
| 16077 | READ_LONG_F(adr, src) |
| 16078 | res = ~src; |
| 16079 | flag_C = 0; |
| 16080 | flag_V = 0; |
| 16081 | flag_NotZ = res; |
| 16082 | flag_N = res >> 24; |
| 16083 | WRITE_LONG_F(adr, res) |
| 16084 | POST_IO |
| 16085 | RET(20) |
| 16086 | } |
| 16087 | |
| 16088 | // NOT |
| 16089 | OPCODE(0x46A0) |
| 16090 | { |
| 16091 | u32 adr, res; |
| 16092 | u32 src, dst; |
| 16093 | |
| 16094 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 16095 | AREG((Opcode >> 0) & 7) = adr; |
| 16096 | PRE_IO |
| 16097 | READ_LONG_F(adr, src) |
| 16098 | res = ~src; |
| 16099 | flag_C = 0; |
| 16100 | flag_V = 0; |
| 16101 | flag_NotZ = res; |
| 16102 | flag_N = res >> 24; |
| 16103 | WRITE_LONG_F(adr, res) |
| 16104 | POST_IO |
| 16105 | RET(22) |
| 16106 | } |
| 16107 | |
| 16108 | // NOT |
| 16109 | OPCODE(0x46A8) |
| 16110 | { |
| 16111 | u32 adr, res; |
| 16112 | u32 src, dst; |
| 16113 | |
| 16114 | FETCH_SWORD(adr); |
| 16115 | adr += AREG((Opcode >> 0) & 7); |
| 16116 | PRE_IO |
| 16117 | READ_LONG_F(adr, src) |
| 16118 | res = ~src; |
| 16119 | flag_C = 0; |
| 16120 | flag_V = 0; |
| 16121 | flag_NotZ = res; |
| 16122 | flag_N = res >> 24; |
| 16123 | WRITE_LONG_F(adr, res) |
| 16124 | POST_IO |
| 16125 | RET(24) |
| 16126 | } |
| 16127 | |
| 16128 | // NOT |
| 16129 | OPCODE(0x46B0) |
| 16130 | { |
| 16131 | u32 adr, res; |
| 16132 | u32 src, dst; |
| 16133 | |
| 16134 | adr = AREG((Opcode >> 0) & 7); |
| 16135 | DECODE_EXT_WORD |
| 16136 | PRE_IO |
| 16137 | READ_LONG_F(adr, src) |
| 16138 | res = ~src; |
| 16139 | flag_C = 0; |
| 16140 | flag_V = 0; |
| 16141 | flag_NotZ = res; |
| 16142 | flag_N = res >> 24; |
| 16143 | WRITE_LONG_F(adr, res) |
| 16144 | POST_IO |
| 16145 | RET(26) |
| 16146 | } |
| 16147 | |
| 16148 | // NOT |
| 16149 | OPCODE(0x46B8) |
| 16150 | { |
| 16151 | u32 adr, res; |
| 16152 | u32 src, dst; |
| 16153 | |
| 16154 | FETCH_SWORD(adr); |
| 16155 | PRE_IO |
| 16156 | READ_LONG_F(adr, src) |
| 16157 | res = ~src; |
| 16158 | flag_C = 0; |
| 16159 | flag_V = 0; |
| 16160 | flag_NotZ = res; |
| 16161 | flag_N = res >> 24; |
| 16162 | WRITE_LONG_F(adr, res) |
| 16163 | POST_IO |
| 16164 | RET(24) |
| 16165 | } |
| 16166 | |
| 16167 | // NOT |
| 16168 | OPCODE(0x46B9) |
| 16169 | { |
| 16170 | u32 adr, res; |
| 16171 | u32 src, dst; |
| 16172 | |
| 16173 | FETCH_LONG(adr); |
| 16174 | PRE_IO |
| 16175 | READ_LONG_F(adr, src) |
| 16176 | res = ~src; |
| 16177 | flag_C = 0; |
| 16178 | flag_V = 0; |
| 16179 | flag_NotZ = res; |
| 16180 | flag_N = res >> 24; |
| 16181 | WRITE_LONG_F(adr, res) |
| 16182 | POST_IO |
| 16183 | RET(28) |
| 16184 | } |
| 16185 | |
| 16186 | // NOT |
| 16187 | OPCODE(0x469F) |
| 16188 | { |
| 16189 | u32 adr, res; |
| 16190 | u32 src, dst; |
| 16191 | |
| 16192 | adr = AREG(7); |
| 16193 | AREG(7) += 4; |
| 16194 | PRE_IO |
| 16195 | READ_LONG_F(adr, src) |
| 16196 | res = ~src; |
| 16197 | flag_C = 0; |
| 16198 | flag_V = 0; |
| 16199 | flag_NotZ = res; |
| 16200 | flag_N = res >> 24; |
| 16201 | WRITE_LONG_F(adr, res) |
| 16202 | POST_IO |
| 16203 | RET(20) |
| 16204 | } |
| 16205 | |
| 16206 | // NOT |
| 16207 | OPCODE(0x46A7) |
| 16208 | { |
| 16209 | u32 adr, res; |
| 16210 | u32 src, dst; |
| 16211 | |
| 16212 | adr = AREG(7) - 4; |
| 16213 | AREG(7) = adr; |
| 16214 | PRE_IO |
| 16215 | READ_LONG_F(adr, src) |
| 16216 | res = ~src; |
| 16217 | flag_C = 0; |
| 16218 | flag_V = 0; |
| 16219 | flag_NotZ = res; |
| 16220 | flag_N = res >> 24; |
| 16221 | WRITE_LONG_F(adr, res) |
| 16222 | POST_IO |
| 16223 | RET(22) |
| 16224 | } |
| 16225 | |
| 16226 | // MOVESRa |
| 16227 | OPCODE(0x40C0) |
| 16228 | { |
| 16229 | u32 adr, res; |
| 16230 | u32 src, dst; |
| 16231 | |
| 16232 | res = GET_SR; |
| 16233 | DREGu16((Opcode >> 0) & 7) = res; |
| 16234 | RET(6) |
| 16235 | } |
| 16236 | |
| 16237 | // MOVESRa |
| 16238 | OPCODE(0x40D0) |
| 16239 | { |
| 16240 | u32 adr, res; |
| 16241 | u32 src, dst; |
| 16242 | |
| 16243 | res = GET_SR; |
| 16244 | adr = AREG((Opcode >> 0) & 7); |
| 16245 | PRE_IO |
| 16246 | WRITE_WORD_F(adr, res) |
| 16247 | POST_IO |
| 16248 | RET(12) |
| 16249 | } |
| 16250 | |
| 16251 | // MOVESRa |
| 16252 | OPCODE(0x40D8) |
| 16253 | { |
| 16254 | u32 adr, res; |
| 16255 | u32 src, dst; |
| 16256 | |
| 16257 | res = GET_SR; |
| 16258 | adr = AREG((Opcode >> 0) & 7); |
| 16259 | AREG((Opcode >> 0) & 7) += 2; |
| 16260 | PRE_IO |
| 16261 | WRITE_WORD_F(adr, res) |
| 16262 | POST_IO |
| 16263 | RET(12) |
| 16264 | } |
| 16265 | |
| 16266 | // MOVESRa |
| 16267 | OPCODE(0x40E0) |
| 16268 | { |
| 16269 | u32 adr, res; |
| 16270 | u32 src, dst; |
| 16271 | |
| 16272 | res = GET_SR; |
| 16273 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 16274 | AREG((Opcode >> 0) & 7) = adr; |
| 16275 | PRE_IO |
| 16276 | WRITE_WORD_F(adr, res) |
| 16277 | POST_IO |
| 16278 | RET(14) |
| 16279 | } |
| 16280 | |
| 16281 | // MOVESRa |
| 16282 | OPCODE(0x40E8) |
| 16283 | { |
| 16284 | u32 adr, res; |
| 16285 | u32 src, dst; |
| 16286 | |
| 16287 | res = GET_SR; |
| 16288 | FETCH_SWORD(adr); |
| 16289 | adr += AREG((Opcode >> 0) & 7); |
| 16290 | PRE_IO |
| 16291 | WRITE_WORD_F(adr, res) |
| 16292 | POST_IO |
| 16293 | RET(16) |
| 16294 | } |
| 16295 | |
| 16296 | // MOVESRa |
| 16297 | OPCODE(0x40F0) |
| 16298 | { |
| 16299 | u32 adr, res; |
| 16300 | u32 src, dst; |
| 16301 | |
| 16302 | res = GET_SR; |
| 16303 | adr = AREG((Opcode >> 0) & 7); |
| 16304 | DECODE_EXT_WORD |
| 16305 | PRE_IO |
| 16306 | WRITE_WORD_F(adr, res) |
| 16307 | POST_IO |
| 16308 | RET(18) |
| 16309 | } |
| 16310 | |
| 16311 | // MOVESRa |
| 16312 | OPCODE(0x40F8) |
| 16313 | { |
| 16314 | u32 adr, res; |
| 16315 | u32 src, dst; |
| 16316 | |
| 16317 | res = GET_SR; |
| 16318 | FETCH_SWORD(adr); |
| 16319 | PRE_IO |
| 16320 | WRITE_WORD_F(adr, res) |
| 16321 | POST_IO |
| 16322 | RET(16) |
| 16323 | } |
| 16324 | |
| 16325 | // MOVESRa |
| 16326 | OPCODE(0x40F9) |
| 16327 | { |
| 16328 | u32 adr, res; |
| 16329 | u32 src, dst; |
| 16330 | |
| 16331 | res = GET_SR; |
| 16332 | FETCH_LONG(adr); |
| 16333 | PRE_IO |
| 16334 | WRITE_WORD_F(adr, res) |
| 16335 | POST_IO |
| 16336 | RET(20) |
| 16337 | } |
| 16338 | |
| 16339 | // MOVESRa |
| 16340 | OPCODE(0x40DF) |
| 16341 | { |
| 16342 | u32 adr, res; |
| 16343 | u32 src, dst; |
| 16344 | |
| 16345 | res = GET_SR; |
| 16346 | adr = AREG(7); |
| 16347 | AREG(7) += 2; |
| 16348 | PRE_IO |
| 16349 | WRITE_WORD_F(adr, res) |
| 16350 | POST_IO |
| 16351 | RET(12) |
| 16352 | } |
| 16353 | |
| 16354 | // MOVESRa |
| 16355 | OPCODE(0x40E7) |
| 16356 | { |
| 16357 | u32 adr, res; |
| 16358 | u32 src, dst; |
| 16359 | |
| 16360 | res = GET_SR; |
| 16361 | adr = AREG(7) - 2; |
| 16362 | AREG(7) = adr; |
| 16363 | PRE_IO |
| 16364 | WRITE_WORD_F(adr, res) |
| 16365 | POST_IO |
| 16366 | RET(14) |
| 16367 | } |
| 16368 | |
| 16369 | // MOVEaCCR |
| 16370 | OPCODE(0x44C0) |
| 16371 | { |
| 16372 | u32 adr, res; |
| 16373 | u32 src, dst; |
| 16374 | |
| 16375 | res = DREGu16((Opcode >> 0) & 7); |
| 16376 | SET_CCR(res) |
| 16377 | RET(12) |
| 16378 | } |
| 16379 | |
| 16380 | // MOVEaCCR |
| 16381 | OPCODE(0x44D0) |
| 16382 | { |
| 16383 | u32 adr, res; |
| 16384 | u32 src, dst; |
| 16385 | |
| 16386 | adr = AREG((Opcode >> 0) & 7); |
| 16387 | PRE_IO |
| 16388 | READ_WORD_F(adr, res) |
| 16389 | SET_CCR(res) |
| 16390 | POST_IO |
| 16391 | RET(16) |
| 16392 | } |
| 16393 | |
| 16394 | // MOVEaCCR |
| 16395 | OPCODE(0x44D8) |
| 16396 | { |
| 16397 | u32 adr, res; |
| 16398 | u32 src, dst; |
| 16399 | |
| 16400 | adr = AREG((Opcode >> 0) & 7); |
| 16401 | AREG((Opcode >> 0) & 7) += 2; |
| 16402 | PRE_IO |
| 16403 | READ_WORD_F(adr, res) |
| 16404 | SET_CCR(res) |
| 16405 | POST_IO |
| 16406 | RET(16) |
| 16407 | } |
| 16408 | |
| 16409 | // MOVEaCCR |
| 16410 | OPCODE(0x44E0) |
| 16411 | { |
| 16412 | u32 adr, res; |
| 16413 | u32 src, dst; |
| 16414 | |
| 16415 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 16416 | AREG((Opcode >> 0) & 7) = adr; |
| 16417 | PRE_IO |
| 16418 | READ_WORD_F(adr, res) |
| 16419 | SET_CCR(res) |
| 16420 | POST_IO |
| 16421 | RET(18) |
| 16422 | } |
| 16423 | |
| 16424 | // MOVEaCCR |
| 16425 | OPCODE(0x44E8) |
| 16426 | { |
| 16427 | u32 adr, res; |
| 16428 | u32 src, dst; |
| 16429 | |
| 16430 | FETCH_SWORD(adr); |
| 16431 | adr += AREG((Opcode >> 0) & 7); |
| 16432 | PRE_IO |
| 16433 | READ_WORD_F(adr, res) |
| 16434 | SET_CCR(res) |
| 16435 | POST_IO |
| 16436 | RET(20) |
| 16437 | } |
| 16438 | |
| 16439 | // MOVEaCCR |
| 16440 | OPCODE(0x44F0) |
| 16441 | { |
| 16442 | u32 adr, res; |
| 16443 | u32 src, dst; |
| 16444 | |
| 16445 | adr = AREG((Opcode >> 0) & 7); |
| 16446 | DECODE_EXT_WORD |
| 16447 | PRE_IO |
| 16448 | READ_WORD_F(adr, res) |
| 16449 | SET_CCR(res) |
| 16450 | POST_IO |
| 16451 | RET(22) |
| 16452 | } |
| 16453 | |
| 16454 | // MOVEaCCR |
| 16455 | OPCODE(0x44F8) |
| 16456 | { |
| 16457 | u32 adr, res; |
| 16458 | u32 src, dst; |
| 16459 | |
| 16460 | FETCH_SWORD(adr); |
| 16461 | PRE_IO |
| 16462 | READ_WORD_F(adr, res) |
| 16463 | SET_CCR(res) |
| 16464 | POST_IO |
| 16465 | RET(20) |
| 16466 | } |
| 16467 | |
| 16468 | // MOVEaCCR |
| 16469 | OPCODE(0x44F9) |
| 16470 | { |
| 16471 | u32 adr, res; |
| 16472 | u32 src, dst; |
| 16473 | |
| 16474 | FETCH_LONG(adr); |
| 16475 | PRE_IO |
| 16476 | READ_WORD_F(adr, res) |
| 16477 | SET_CCR(res) |
| 16478 | POST_IO |
| 16479 | RET(24) |
| 16480 | } |
| 16481 | |
| 16482 | // MOVEaCCR |
| 16483 | OPCODE(0x44FA) |
| 16484 | { |
| 16485 | u32 adr, res; |
| 16486 | u32 src, dst; |
| 16487 | |
| 16488 | adr = GET_SWORD + GET_PC; |
| 16489 | PC++; |
| 16490 | PRE_IO |
| 16491 | READ_WORD_F(adr, res) |
| 16492 | SET_CCR(res) |
| 16493 | POST_IO |
| 16494 | RET(20) |
| 16495 | } |
| 16496 | |
| 16497 | // MOVEaCCR |
| 16498 | OPCODE(0x44FB) |
| 16499 | { |
| 16500 | u32 adr, res; |
| 16501 | u32 src, dst; |
| 16502 | |
| 16503 | adr = GET_PC; |
| 16504 | DECODE_EXT_WORD |
| 16505 | PRE_IO |
| 16506 | READ_WORD_F(adr, res) |
| 16507 | SET_CCR(res) |
| 16508 | POST_IO |
| 16509 | RET(22) |
| 16510 | } |
| 16511 | |
| 16512 | // MOVEaCCR |
| 16513 | OPCODE(0x44FC) |
| 16514 | { |
| 16515 | u32 adr, res; |
| 16516 | u32 src, dst; |
| 16517 | |
| 16518 | FETCH_WORD(res); |
| 16519 | SET_CCR(res) |
| 16520 | RET(16) |
| 16521 | } |
| 16522 | |
| 16523 | // MOVEaCCR |
| 16524 | OPCODE(0x44DF) |
| 16525 | { |
| 16526 | u32 adr, res; |
| 16527 | u32 src, dst; |
| 16528 | |
| 16529 | adr = AREG(7); |
| 16530 | AREG(7) += 2; |
| 16531 | PRE_IO |
| 16532 | READ_WORD_F(adr, res) |
| 16533 | SET_CCR(res) |
| 16534 | POST_IO |
| 16535 | RET(16) |
| 16536 | } |
| 16537 | |
| 16538 | // MOVEaCCR |
| 16539 | OPCODE(0x44E7) |
| 16540 | { |
| 16541 | u32 adr, res; |
| 16542 | u32 src, dst; |
| 16543 | |
| 16544 | adr = AREG(7) - 2; |
| 16545 | AREG(7) = adr; |
| 16546 | PRE_IO |
| 16547 | READ_WORD_F(adr, res) |
| 16548 | SET_CCR(res) |
| 16549 | POST_IO |
| 16550 | RET(18) |
| 16551 | } |
| 16552 | |
| 16553 | // MOVEaSR |
| 16554 | OPCODE(0x46C0) |
| 16555 | { |
| 16556 | u32 adr, res; |
| 16557 | u32 src, dst; |
| 16558 | |
| 16559 | if (flag_S) |
| 16560 | { |
| 16561 | res = DREGu16((Opcode >> 0) & 7); |
| 16562 | SET_SR(res) |
| 16563 | if (!flag_S) |
| 16564 | { |
| 16565 | res = AREG(7); |
| 16566 | AREG(7) = ASP; |
| 16567 | ASP = res; |
| 16568 | } |
| 16569 | CHECK_INT_TO_JUMP(12) |
| 16570 | } |
| 16571 | else |
| 16572 | { |
| 16573 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16574 | RET(4) |
| 16575 | } |
| 16576 | RET(12) |
| 16577 | } |
| 16578 | |
| 16579 | // MOVEaSR |
| 16580 | OPCODE(0x46D0) |
| 16581 | { |
| 16582 | u32 adr, res; |
| 16583 | u32 src, dst; |
| 16584 | |
| 16585 | if (flag_S) |
| 16586 | { |
| 16587 | adr = AREG((Opcode >> 0) & 7); |
| 16588 | PRE_IO |
| 16589 | READ_WORD_F(adr, res) |
| 16590 | SET_SR(res) |
| 16591 | if (!flag_S) |
| 16592 | { |
| 16593 | res = AREG(7); |
| 16594 | AREG(7) = ASP; |
| 16595 | ASP = res; |
| 16596 | } |
| 16597 | POST_IO |
| 16598 | CHECK_INT_TO_JUMP(16) |
| 16599 | } |
| 16600 | else |
| 16601 | { |
| 16602 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16603 | RET(4) |
| 16604 | } |
| 16605 | RET(16) |
| 16606 | } |
| 16607 | |
| 16608 | // MOVEaSR |
| 16609 | OPCODE(0x46D8) |
| 16610 | { |
| 16611 | u32 adr, res; |
| 16612 | u32 src, dst; |
| 16613 | |
| 16614 | if (flag_S) |
| 16615 | { |
| 16616 | adr = AREG((Opcode >> 0) & 7); |
| 16617 | AREG((Opcode >> 0) & 7) += 2; |
| 16618 | PRE_IO |
| 16619 | READ_WORD_F(adr, res) |
| 16620 | SET_SR(res) |
| 16621 | if (!flag_S) |
| 16622 | { |
| 16623 | res = AREG(7); |
| 16624 | AREG(7) = ASP; |
| 16625 | ASP = res; |
| 16626 | } |
| 16627 | POST_IO |
| 16628 | CHECK_INT_TO_JUMP(16) |
| 16629 | } |
| 16630 | else |
| 16631 | { |
| 16632 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16633 | RET(4) |
| 16634 | } |
| 16635 | RET(16) |
| 16636 | } |
| 16637 | |
| 16638 | // MOVEaSR |
| 16639 | OPCODE(0x46E0) |
| 16640 | { |
| 16641 | u32 adr, res; |
| 16642 | u32 src, dst; |
| 16643 | |
| 16644 | if (flag_S) |
| 16645 | { |
| 16646 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 16647 | AREG((Opcode >> 0) & 7) = adr; |
| 16648 | PRE_IO |
| 16649 | READ_WORD_F(adr, res) |
| 16650 | SET_SR(res) |
| 16651 | if (!flag_S) |
| 16652 | { |
| 16653 | res = AREG(7); |
| 16654 | AREG(7) = ASP; |
| 16655 | ASP = res; |
| 16656 | } |
| 16657 | POST_IO |
| 16658 | CHECK_INT_TO_JUMP(18) |
| 16659 | } |
| 16660 | else |
| 16661 | { |
| 16662 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16663 | RET(4) |
| 16664 | } |
| 16665 | RET(18) |
| 16666 | } |
| 16667 | |
| 16668 | // MOVEaSR |
| 16669 | OPCODE(0x46E8) |
| 16670 | { |
| 16671 | u32 adr, res; |
| 16672 | u32 src, dst; |
| 16673 | |
| 16674 | if (flag_S) |
| 16675 | { |
| 16676 | FETCH_SWORD(adr); |
| 16677 | adr += AREG((Opcode >> 0) & 7); |
| 16678 | PRE_IO |
| 16679 | READ_WORD_F(adr, res) |
| 16680 | SET_SR(res) |
| 16681 | if (!flag_S) |
| 16682 | { |
| 16683 | res = AREG(7); |
| 16684 | AREG(7) = ASP; |
| 16685 | ASP = res; |
| 16686 | } |
| 16687 | POST_IO |
| 16688 | CHECK_INT_TO_JUMP(20) |
| 16689 | } |
| 16690 | else |
| 16691 | { |
| 16692 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16693 | RET(4) |
| 16694 | } |
| 16695 | RET(20) |
| 16696 | } |
| 16697 | |
| 16698 | // MOVEaSR |
| 16699 | OPCODE(0x46F0) |
| 16700 | { |
| 16701 | u32 adr, res; |
| 16702 | u32 src, dst; |
| 16703 | |
| 16704 | if (flag_S) |
| 16705 | { |
| 16706 | adr = AREG((Opcode >> 0) & 7); |
| 16707 | DECODE_EXT_WORD |
| 16708 | PRE_IO |
| 16709 | READ_WORD_F(adr, res) |
| 16710 | SET_SR(res) |
| 16711 | if (!flag_S) |
| 16712 | { |
| 16713 | res = AREG(7); |
| 16714 | AREG(7) = ASP; |
| 16715 | ASP = res; |
| 16716 | } |
| 16717 | POST_IO |
| 16718 | CHECK_INT_TO_JUMP(22) |
| 16719 | } |
| 16720 | else |
| 16721 | { |
| 16722 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16723 | RET(4) |
| 16724 | } |
| 16725 | RET(22) |
| 16726 | } |
| 16727 | |
| 16728 | |
| 16729 | // MOVEaSR |
| 16730 | OPCODE(0x46F8) |
| 16731 | { |
| 16732 | u32 adr, res; |
| 16733 | u32 src, dst; |
| 16734 | |
| 16735 | if (flag_S) |
| 16736 | { |
| 16737 | FETCH_SWORD(adr); |
| 16738 | PRE_IO |
| 16739 | READ_WORD_F(adr, res) |
| 16740 | SET_SR(res) |
| 16741 | if (!flag_S) |
| 16742 | { |
| 16743 | res = AREG(7); |
| 16744 | AREG(7) = ASP; |
| 16745 | ASP = res; |
| 16746 | } |
| 16747 | POST_IO |
| 16748 | CHECK_INT_TO_JUMP(20) |
| 16749 | } |
| 16750 | else |
| 16751 | { |
| 16752 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16753 | RET(4) |
| 16754 | } |
| 16755 | RET(20) |
| 16756 | } |
| 16757 | |
| 16758 | // MOVEaSR |
| 16759 | OPCODE(0x46F9) |
| 16760 | { |
| 16761 | u32 adr, res; |
| 16762 | u32 src, dst; |
| 16763 | |
| 16764 | if (flag_S) |
| 16765 | { |
| 16766 | FETCH_LONG(adr); |
| 16767 | PRE_IO |
| 16768 | READ_WORD_F(adr, res) |
| 16769 | SET_SR(res) |
| 16770 | if (!flag_S) |
| 16771 | { |
| 16772 | res = AREG(7); |
| 16773 | AREG(7) = ASP; |
| 16774 | ASP = res; |
| 16775 | } |
| 16776 | POST_IO |
| 16777 | CHECK_INT_TO_JUMP(24) |
| 16778 | } |
| 16779 | else |
| 16780 | { |
| 16781 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16782 | RET(4) |
| 16783 | } |
| 16784 | RET(24) |
| 16785 | } |
| 16786 | |
| 16787 | // MOVEaSR |
| 16788 | OPCODE(0x46FA) |
| 16789 | { |
| 16790 | u32 adr, res; |
| 16791 | u32 src, dst; |
| 16792 | |
| 16793 | if (flag_S) |
| 16794 | { |
| 16795 | adr = GET_SWORD + GET_PC; |
| 16796 | PC++; |
| 16797 | PRE_IO |
| 16798 | READ_WORD_F(adr, res) |
| 16799 | SET_SR(res) |
| 16800 | if (!flag_S) |
| 16801 | { |
| 16802 | res = AREG(7); |
| 16803 | AREG(7) = ASP; |
| 16804 | ASP = res; |
| 16805 | } |
| 16806 | POST_IO |
| 16807 | CHECK_INT_TO_JUMP(20) |
| 16808 | } |
| 16809 | else |
| 16810 | { |
| 16811 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16812 | RET(4) |
| 16813 | } |
| 16814 | RET(20) |
| 16815 | } |
| 16816 | |
| 16817 | // MOVEaSR |
| 16818 | OPCODE(0x46FB) |
| 16819 | { |
| 16820 | u32 adr, res; |
| 16821 | u32 src, dst; |
| 16822 | |
| 16823 | if (flag_S) |
| 16824 | { |
| 16825 | adr = GET_PC; |
| 16826 | DECODE_EXT_WORD |
| 16827 | PRE_IO |
| 16828 | READ_WORD_F(adr, res) |
| 16829 | SET_SR(res) |
| 16830 | if (!flag_S) |
| 16831 | { |
| 16832 | res = AREG(7); |
| 16833 | AREG(7) = ASP; |
| 16834 | ASP = res; |
| 16835 | } |
| 16836 | POST_IO |
| 16837 | CHECK_INT_TO_JUMP(22) |
| 16838 | } |
| 16839 | else |
| 16840 | { |
| 16841 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16842 | RET(4) |
| 16843 | } |
| 16844 | RET(22) |
| 16845 | } |
| 16846 | |
| 16847 | // MOVEaSR |
| 16848 | OPCODE(0x46FC) |
| 16849 | { |
| 16850 | u32 adr, res; |
| 16851 | u32 src, dst; |
| 16852 | |
| 16853 | if (flag_S) |
| 16854 | { |
| 16855 | FETCH_WORD(res); |
| 16856 | SET_SR(res) |
| 16857 | if (!flag_S) |
| 16858 | { |
| 16859 | res = AREG(7); |
| 16860 | AREG(7) = ASP; |
| 16861 | ASP = res; |
| 16862 | } |
| 16863 | CHECK_INT_TO_JUMP(16) |
| 16864 | } |
| 16865 | else |
| 16866 | { |
| 16867 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16868 | RET(4) |
| 16869 | } |
| 16870 | RET(16) |
| 16871 | } |
| 16872 | |
| 16873 | // MOVEaSR |
| 16874 | OPCODE(0x46DF) |
| 16875 | { |
| 16876 | u32 adr, res; |
| 16877 | u32 src, dst; |
| 16878 | |
| 16879 | if (flag_S) |
| 16880 | { |
| 16881 | adr = AREG(7); |
| 16882 | AREG(7) += 2; |
| 16883 | PRE_IO |
| 16884 | READ_WORD_F(adr, res) |
| 16885 | SET_SR(res) |
| 16886 | if (!flag_S) |
| 16887 | { |
| 16888 | res = AREG(7); |
| 16889 | AREG(7) = ASP; |
| 16890 | ASP = res; |
| 16891 | } |
| 16892 | POST_IO |
| 16893 | CHECK_INT_TO_JUMP(16) |
| 16894 | } |
| 16895 | else |
| 16896 | { |
| 16897 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16898 | RET(4) |
| 16899 | } |
| 16900 | RET(16) |
| 16901 | } |
| 16902 | |
| 16903 | // MOVEaSR |
| 16904 | OPCODE(0x46E7) |
| 16905 | { |
| 16906 | u32 adr, res; |
| 16907 | u32 src, dst; |
| 16908 | |
| 16909 | if (flag_S) |
| 16910 | { |
| 16911 | adr = AREG(7) - 2; |
| 16912 | AREG(7) = adr; |
| 16913 | PRE_IO |
| 16914 | READ_WORD_F(adr, res) |
| 16915 | SET_SR(res) |
| 16916 | if (!flag_S) |
| 16917 | { |
| 16918 | res = AREG(7); |
| 16919 | AREG(7) = ASP; |
| 16920 | ASP = res; |
| 16921 | } |
| 16922 | POST_IO |
| 16923 | CHECK_INT_TO_JUMP(18) |
| 16924 | } |
| 16925 | else |
| 16926 | { |
| 16927 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 16928 | RET(4) |
| 16929 | } |
| 16930 | RET(18) |
| 16931 | } |
| 16932 | |
| 16933 | // NBCD |
| 16934 | OPCODE(0x4800) |
| 16935 | { |
| 16936 | u32 adr, res; |
| 16937 | u32 src, dst; |
| 16938 | |
| 16939 | dst = DREGu8((Opcode >> 0) & 7); |
| 16940 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 16941 | |
| 16942 | if (res != 0) |
| 16943 | { |
| 16944 | flag_V = res; |
| 16945 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 16946 | res = (res + 0x9a) & 0xFF; |
| 16947 | DREGu8((Opcode >> 0) & 7) = res; |
| 16948 | flag_V &= ~res; |
| 16949 | flag_NotZ |= res; |
| 16950 | flag_X = flag_C = M68K_SR_C; |
| 16951 | } |
| 16952 | else flag_V = flag_X = flag_C = 0; |
| 16953 | flag_N = res; |
| 16954 | RET(6) |
| 16955 | } |
| 16956 | |
| 16957 | // NBCD |
| 16958 | OPCODE(0x4810) |
| 16959 | { |
| 16960 | u32 adr, res; |
| 16961 | u32 src, dst; |
| 16962 | |
| 16963 | adr = AREG((Opcode >> 0) & 7); |
| 16964 | PRE_IO |
| 16965 | READ_BYTE_F(adr, dst) |
| 16966 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 16967 | |
| 16968 | if (res != 0) |
| 16969 | { |
| 16970 | flag_V = res; |
| 16971 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 16972 | res = (res + 0x9a) & 0xFF; |
| 16973 | WRITE_BYTE_F(adr, res) |
| 16974 | flag_V &= ~res; |
| 16975 | flag_NotZ |= res; |
| 16976 | flag_X = flag_C = M68K_SR_C; |
| 16977 | } |
| 16978 | else flag_V = flag_X = flag_C = 0; |
| 16979 | flag_N = res; |
| 16980 | POST_IO |
| 16981 | RET(12) |
| 16982 | } |
| 16983 | |
| 16984 | // NBCD |
| 16985 | OPCODE(0x4818) |
| 16986 | { |
| 16987 | u32 adr, res; |
| 16988 | u32 src, dst; |
| 16989 | |
| 16990 | adr = AREG((Opcode >> 0) & 7); |
| 16991 | AREG((Opcode >> 0) & 7) += 1; |
| 16992 | PRE_IO |
| 16993 | READ_BYTE_F(adr, dst) |
| 16994 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 16995 | |
| 16996 | if (res != 0) |
| 16997 | { |
| 16998 | flag_V = res; |
| 16999 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 17000 | res = (res + 0x9a) & 0xFF; |
| 17001 | WRITE_BYTE_F(adr, res) |
| 17002 | flag_V &= ~res; |
| 17003 | flag_NotZ |= res; |
| 17004 | flag_X = flag_C = M68K_SR_C; |
| 17005 | } |
| 17006 | else flag_V = flag_X = flag_C = 0; |
| 17007 | flag_N = res; |
| 17008 | POST_IO |
| 17009 | RET(12) |
| 17010 | } |
| 17011 | |
| 17012 | // NBCD |
| 17013 | OPCODE(0x4820) |
| 17014 | { |
| 17015 | u32 adr, res; |
| 17016 | u32 src, dst; |
| 17017 | |
| 17018 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 17019 | AREG((Opcode >> 0) & 7) = adr; |
| 17020 | PRE_IO |
| 17021 | READ_BYTE_F(adr, dst) |
| 17022 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 17023 | |
| 17024 | if (res != 0) |
| 17025 | { |
| 17026 | flag_V = res; |
| 17027 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 17028 | res = (res + 0x9a) & 0xFF; |
| 17029 | WRITE_BYTE_F(adr, res) |
| 17030 | flag_V &= ~res; |
| 17031 | flag_NotZ |= res; |
| 17032 | flag_X = flag_C = M68K_SR_C; |
| 17033 | } |
| 17034 | else flag_V = flag_X = flag_C = 0; |
| 17035 | flag_N = res; |
| 17036 | POST_IO |
| 17037 | RET(14) |
| 17038 | } |
| 17039 | |
| 17040 | // NBCD |
| 17041 | OPCODE(0x4828) |
| 17042 | { |
| 17043 | u32 adr, res; |
| 17044 | u32 src, dst; |
| 17045 | |
| 17046 | FETCH_SWORD(adr); |
| 17047 | adr += AREG((Opcode >> 0) & 7); |
| 17048 | PRE_IO |
| 17049 | READ_BYTE_F(adr, dst) |
| 17050 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 17051 | |
| 17052 | if (res != 0) |
| 17053 | { |
| 17054 | flag_V = res; |
| 17055 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 17056 | res = (res + 0x9a) & 0xFF; |
| 17057 | WRITE_BYTE_F(adr, res) |
| 17058 | flag_V &= ~res; |
| 17059 | flag_NotZ |= res; |
| 17060 | flag_X = flag_C = M68K_SR_C; |
| 17061 | } |
| 17062 | else flag_V = flag_X = flag_C = 0; |
| 17063 | flag_N = res; |
| 17064 | POST_IO |
| 17065 | RET(16) |
| 17066 | } |
| 17067 | |
| 17068 | // NBCD |
| 17069 | OPCODE(0x4830) |
| 17070 | { |
| 17071 | u32 adr, res; |
| 17072 | u32 src, dst; |
| 17073 | |
| 17074 | adr = AREG((Opcode >> 0) & 7); |
| 17075 | DECODE_EXT_WORD |
| 17076 | PRE_IO |
| 17077 | READ_BYTE_F(adr, dst) |
| 17078 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 17079 | |
| 17080 | if (res != 0) |
| 17081 | { |
| 17082 | flag_V = res; |
| 17083 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 17084 | res = (res + 0x9a) & 0xFF; |
| 17085 | WRITE_BYTE_F(adr, res) |
| 17086 | flag_V &= ~res; |
| 17087 | flag_NotZ |= res; |
| 17088 | flag_X = flag_C = M68K_SR_C; |
| 17089 | } |
| 17090 | else flag_V = flag_X = flag_C = 0; |
| 17091 | flag_N = res; |
| 17092 | POST_IO |
| 17093 | RET(18) |
| 17094 | } |
| 17095 | |
| 17096 | // NBCD |
| 17097 | OPCODE(0x4838) |
| 17098 | { |
| 17099 | u32 adr, res; |
| 17100 | u32 src, dst; |
| 17101 | |
| 17102 | FETCH_SWORD(adr); |
| 17103 | PRE_IO |
| 17104 | READ_BYTE_F(adr, dst) |
| 17105 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 17106 | |
| 17107 | if (res != 0) |
| 17108 | { |
| 17109 | flag_V = res; |
| 17110 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 17111 | res = (res + 0x9a) & 0xFF; |
| 17112 | WRITE_BYTE_F(adr, res) |
| 17113 | flag_V &= ~res; |
| 17114 | flag_NotZ |= res; |
| 17115 | flag_X = flag_C = M68K_SR_C; |
| 17116 | } |
| 17117 | else flag_V = flag_X = flag_C = 0; |
| 17118 | flag_N = res; |
| 17119 | POST_IO |
| 17120 | RET(16) |
| 17121 | } |
| 17122 | |
| 17123 | // NBCD |
| 17124 | OPCODE(0x4839) |
| 17125 | { |
| 17126 | u32 adr, res; |
| 17127 | u32 src, dst; |
| 17128 | |
| 17129 | FETCH_LONG(adr); |
| 17130 | PRE_IO |
| 17131 | READ_BYTE_F(adr, dst) |
| 17132 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 17133 | |
| 17134 | if (res != 0) |
| 17135 | { |
| 17136 | flag_V = res; |
| 17137 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 17138 | res = (res + 0x9a) & 0xFF; |
| 17139 | WRITE_BYTE_F(adr, res) |
| 17140 | flag_V &= ~res; |
| 17141 | flag_NotZ |= res; |
| 17142 | flag_X = flag_C = M68K_SR_C; |
| 17143 | } |
| 17144 | else flag_V = flag_X = flag_C = 0; |
| 17145 | flag_N = res; |
| 17146 | POST_IO |
| 17147 | RET(20) |
| 17148 | } |
| 17149 | |
| 17150 | // NBCD |
| 17151 | OPCODE(0x481F) |
| 17152 | { |
| 17153 | u32 adr, res; |
| 17154 | u32 src, dst; |
| 17155 | |
| 17156 | adr = AREG(7); |
| 17157 | AREG(7) += 2; |
| 17158 | PRE_IO |
| 17159 | READ_BYTE_F(adr, dst) |
| 17160 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 17161 | |
| 17162 | if (res != 0) |
| 17163 | { |
| 17164 | flag_V = res; |
| 17165 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 17166 | res = (res + 0x9a) & 0xFF; |
| 17167 | WRITE_BYTE_F(adr, res) |
| 17168 | flag_V &= ~res; |
| 17169 | flag_NotZ |= res; |
| 17170 | flag_X = flag_C = M68K_SR_C; |
| 17171 | } |
| 17172 | else flag_V = flag_X = flag_C = 0; |
| 17173 | flag_N = res; |
| 17174 | POST_IO |
| 17175 | RET(12) |
| 17176 | } |
| 17177 | |
| 17178 | // NBCD |
| 17179 | OPCODE(0x4827) |
| 17180 | { |
| 17181 | u32 adr, res; |
| 17182 | u32 src, dst; |
| 17183 | |
| 17184 | adr = AREG(7) - 2; |
| 17185 | AREG(7) = adr; |
| 17186 | PRE_IO |
| 17187 | READ_BYTE_F(adr, dst) |
| 17188 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 17189 | |
| 17190 | if (res != 0) |
| 17191 | { |
| 17192 | flag_V = res; |
| 17193 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
| 17194 | res = (res + 0x9a) & 0xFF; |
| 17195 | WRITE_BYTE_F(adr, res) |
| 17196 | flag_V &= ~res; |
| 17197 | flag_NotZ |= res; |
| 17198 | flag_X = flag_C = M68K_SR_C; |
| 17199 | } |
| 17200 | else flag_V = flag_X = flag_C = 0; |
| 17201 | flag_N = res; |
| 17202 | POST_IO |
| 17203 | RET(14) |
| 17204 | } |
| 17205 | |
| 17206 | // PEA |
| 17207 | OPCODE(0x4850) |
| 17208 | { |
| 17209 | u32 adr, res; |
| 17210 | u32 src, dst; |
| 17211 | |
| 17212 | adr = AREG((Opcode >> 0) & 7); |
| 17213 | PRE_IO |
| 17214 | PUSH_32_F(adr) |
| 17215 | POST_IO |
| 17216 | RET(12) |
| 17217 | } |
| 17218 | |
| 17219 | // PEA |
| 17220 | OPCODE(0x4868) |
| 17221 | { |
| 17222 | u32 adr, res; |
| 17223 | u32 src, dst; |
| 17224 | |
| 17225 | FETCH_SWORD(adr); |
| 17226 | adr += AREG((Opcode >> 0) & 7); |
| 17227 | PRE_IO |
| 17228 | PUSH_32_F(adr) |
| 17229 | POST_IO |
| 17230 | RET(16) |
| 17231 | } |
| 17232 | |
| 17233 | // PEA |
| 17234 | OPCODE(0x4870) |
| 17235 | { |
| 17236 | u32 adr, res; |
| 17237 | u32 src, dst; |
| 17238 | |
| 17239 | adr = AREG((Opcode >> 0) & 7); |
| 17240 | DECODE_EXT_WORD |
| 17241 | PRE_IO |
| 17242 | PUSH_32_F(adr) |
| 17243 | POST_IO |
| 17244 | RET(20) |
| 17245 | } |
| 17246 | |
| 17247 | // PEA |
| 17248 | OPCODE(0x4878) |
| 17249 | { |
| 17250 | u32 adr, res; |
| 17251 | u32 src, dst; |
| 17252 | |
| 17253 | FETCH_SWORD(adr); |
| 17254 | PRE_IO |
| 17255 | PUSH_32_F(adr) |
| 17256 | POST_IO |
| 17257 | RET(16) |
| 17258 | } |
| 17259 | |
| 17260 | // PEA |
| 17261 | OPCODE(0x4879) |
| 17262 | { |
| 17263 | u32 adr, res; |
| 17264 | u32 src, dst; |
| 17265 | |
| 17266 | FETCH_LONG(adr); |
| 17267 | PRE_IO |
| 17268 | PUSH_32_F(adr) |
| 17269 | POST_IO |
| 17270 | RET(20) |
| 17271 | } |
| 17272 | |
| 17273 | // PEA |
| 17274 | OPCODE(0x487A) |
| 17275 | { |
| 17276 | u32 adr, res; |
| 17277 | u32 src, dst; |
| 17278 | |
| 17279 | adr = GET_SWORD + GET_PC; |
| 17280 | PC++; |
| 17281 | PRE_IO |
| 17282 | PUSH_32_F(adr) |
| 17283 | POST_IO |
| 17284 | RET(16) |
| 17285 | } |
| 17286 | |
| 17287 | // PEA |
| 17288 | OPCODE(0x487B) |
| 17289 | { |
| 17290 | u32 adr, res; |
| 17291 | u32 src, dst; |
| 17292 | |
| 17293 | adr = GET_PC; |
| 17294 | DECODE_EXT_WORD |
| 17295 | PRE_IO |
| 17296 | PUSH_32_F(adr) |
| 17297 | POST_IO |
| 17298 | RET(20) |
| 17299 | } |
| 17300 | |
| 17301 | // SWAP |
| 17302 | OPCODE(0x4840) |
| 17303 | { |
| 17304 | u32 adr, res; |
| 17305 | u32 src, dst; |
| 17306 | |
| 17307 | res = DREGu32((Opcode >> 0) & 7); |
| 17308 | res = (res >> 16) | (res << 16); |
| 17309 | flag_C = 0; |
| 17310 | flag_V = 0; |
| 17311 | flag_NotZ = res; |
| 17312 | flag_N = res >> 24; |
| 17313 | DREGu32((Opcode >> 0) & 7) = res; |
| 17314 | RET(4) |
| 17315 | } |
| 17316 | |
| 17317 | // MOVEMRa |
| 17318 | OPCODE(0x4890) |
| 17319 | { |
| 17320 | u32 adr, res; |
| 17321 | u32 src, dst; |
| 17322 | |
| 17323 | u32 *psrc; |
| 17324 | |
| 17325 | FETCH_WORD(res); |
| 17326 | adr = AREG((Opcode >> 0) & 7); |
| 17327 | psrc = &DREGu32(0); |
| 17328 | dst = adr; |
| 17329 | PRE_IO |
| 17330 | do |
| 17331 | { |
| 17332 | if (res & 1) |
| 17333 | { |
| 17334 | WRITE_WORD_F(adr, *psrc) |
| 17335 | adr += 2; |
| 17336 | } |
| 17337 | psrc++; |
| 17338 | } while (res >>= 1); |
| 17339 | POST_IO |
| 17340 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17341 | #ifdef USE_CYCLONE_TIMING |
| 17342 | RET(8) |
| 17343 | #else |
| 17344 | RET(12) |
| 17345 | #endif |
| 17346 | } |
| 17347 | |
| 17348 | // MOVEMRa |
| 17349 | OPCODE(0x48A0) |
| 17350 | { |
| 17351 | u32 adr, res; |
| 17352 | u32 src, dst; |
| 17353 | |
| 17354 | u32 *psrc; |
| 17355 | |
| 17356 | FETCH_WORD(res); |
| 17357 | adr = AREG((Opcode >> 0) & 7); |
| 17358 | psrc = &AREGu32(7); |
| 17359 | dst = adr; |
| 17360 | PRE_IO |
| 17361 | do |
| 17362 | { |
| 17363 | if (res & 1) |
| 17364 | { |
| 17365 | adr -= 2; |
| 17366 | WRITE_WORD_F(adr, *psrc) |
| 17367 | } |
| 17368 | psrc--; |
| 17369 | } while (res >>= 1); |
| 17370 | AREG((Opcode >> 0) & 7) = adr; |
| 17371 | POST_IO |
| 17372 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
| 17373 | RET(8) |
| 17374 | } |
| 17375 | |
| 17376 | // MOVEMRa |
| 17377 | OPCODE(0x48A8) |
| 17378 | { |
| 17379 | u32 adr, res; |
| 17380 | u32 src, dst; |
| 17381 | |
| 17382 | u32 *psrc; |
| 17383 | |
| 17384 | FETCH_WORD(res); |
| 17385 | FETCH_SWORD(adr); |
| 17386 | adr += AREG((Opcode >> 0) & 7); |
| 17387 | psrc = &DREGu32(0); |
| 17388 | dst = adr; |
| 17389 | PRE_IO |
| 17390 | do |
| 17391 | { |
| 17392 | if (res & 1) |
| 17393 | { |
| 17394 | WRITE_WORD_F(adr, *psrc) |
| 17395 | adr += 2; |
| 17396 | } |
| 17397 | psrc++; |
| 17398 | } while (res >>= 1); |
| 17399 | POST_IO |
| 17400 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17401 | #ifdef USE_CYCLONE_TIMING |
| 17402 | RET(12) |
| 17403 | #else |
| 17404 | RET(20) |
| 17405 | #endif |
| 17406 | } |
| 17407 | |
| 17408 | // MOVEMRa |
| 17409 | OPCODE(0x48B0) |
| 17410 | { |
| 17411 | u32 adr, res; |
| 17412 | u32 src, dst; |
| 17413 | |
| 17414 | u32 *psrc; |
| 17415 | |
| 17416 | FETCH_WORD(res); |
| 17417 | adr = AREG((Opcode >> 0) & 7); |
| 17418 | DECODE_EXT_WORD |
| 17419 | psrc = &DREGu32(0); |
| 17420 | dst = adr; |
| 17421 | PRE_IO |
| 17422 | do |
| 17423 | { |
| 17424 | if (res & 1) |
| 17425 | { |
| 17426 | WRITE_WORD_F(adr, *psrc) |
| 17427 | adr += 2; |
| 17428 | } |
| 17429 | psrc++; |
| 17430 | } while (res >>= 1); |
| 17431 | POST_IO |
| 17432 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17433 | #ifdef USE_CYCLONE_TIMING |
| 17434 | RET(14) |
| 17435 | #else |
| 17436 | RET(24) |
| 17437 | #endif |
| 17438 | } |
| 17439 | |
| 17440 | // MOVEMRa |
| 17441 | OPCODE(0x48B8) |
| 17442 | { |
| 17443 | u32 adr, res; |
| 17444 | u32 src, dst; |
| 17445 | |
| 17446 | u32 *psrc; |
| 17447 | |
| 17448 | FETCH_WORD(res); |
| 17449 | FETCH_SWORD(adr); |
| 17450 | psrc = &DREGu32(0); |
| 17451 | dst = adr; |
| 17452 | PRE_IO |
| 17453 | do |
| 17454 | { |
| 17455 | if (res & 1) |
| 17456 | { |
| 17457 | WRITE_WORD_F(adr, *psrc) |
| 17458 | adr += 2; |
| 17459 | } |
| 17460 | psrc++; |
| 17461 | } while (res >>= 1); |
| 17462 | POST_IO |
| 17463 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17464 | #ifdef USE_CYCLONE_TIMING |
| 17465 | RET(12) |
| 17466 | #else |
| 17467 | RET(20) |
| 17468 | #endif |
| 17469 | } |
| 17470 | |
| 17471 | // MOVEMRa |
| 17472 | OPCODE(0x48B9) |
| 17473 | { |
| 17474 | u32 adr, res; |
| 17475 | u32 src, dst; |
| 17476 | |
| 17477 | u32 *psrc; |
| 17478 | |
| 17479 | FETCH_WORD(res); |
| 17480 | FETCH_LONG(adr); |
| 17481 | psrc = &DREGu32(0); |
| 17482 | dst = adr; |
| 17483 | PRE_IO |
| 17484 | do |
| 17485 | { |
| 17486 | if (res & 1) |
| 17487 | { |
| 17488 | WRITE_WORD_F(adr, *psrc) |
| 17489 | adr += 2; |
| 17490 | } |
| 17491 | psrc++; |
| 17492 | } while (res >>= 1); |
| 17493 | POST_IO |
| 17494 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17495 | #ifdef USE_CYCLONE_TIMING |
| 17496 | RET(16) |
| 17497 | #else |
| 17498 | RET(28) |
| 17499 | #endif |
| 17500 | } |
| 17501 | |
| 17502 | // MOVEMRa |
| 17503 | OPCODE(0x48A7) |
| 17504 | { |
| 17505 | u32 adr, res; |
| 17506 | u32 src, dst; |
| 17507 | |
| 17508 | u32 *psrc; |
| 17509 | |
| 17510 | FETCH_WORD(res); |
| 17511 | adr = AREG(7); |
| 17512 | psrc = &AREGu32(7); |
| 17513 | dst = adr; |
| 17514 | PRE_IO |
| 17515 | do |
| 17516 | { |
| 17517 | if (res & 1) |
| 17518 | { |
| 17519 | adr -= 2; |
| 17520 | WRITE_WORD_F(adr, *psrc) |
| 17521 | } |
| 17522 | psrc--; |
| 17523 | } while (res >>= 1); |
| 17524 | AREG(7) = adr; |
| 17525 | POST_IO |
| 17526 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
| 17527 | RET(8) |
| 17528 | } |
| 17529 | |
| 17530 | // MOVEMRa |
| 17531 | OPCODE(0x48D0) |
| 17532 | { |
| 17533 | u32 adr, res; |
| 17534 | u32 src, dst; |
| 17535 | |
| 17536 | u32 *psrc; |
| 17537 | |
| 17538 | FETCH_WORD(res); |
| 17539 | adr = AREG((Opcode >> 0) & 7); |
| 17540 | psrc = &DREGu32(0); |
| 17541 | dst = adr; |
| 17542 | PRE_IO |
| 17543 | do |
| 17544 | { |
| 17545 | if (res & 1) |
| 17546 | { |
| 17547 | WRITE_LONG_F(adr, *psrc) |
| 17548 | adr += 4; |
| 17549 | } |
| 17550 | psrc++; |
| 17551 | } while (res >>= 1); |
| 17552 | POST_IO |
| 17553 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17554 | #ifdef USE_CYCLONE_TIMING |
| 17555 | RET(8) |
| 17556 | #else |
| 17557 | RET(16) |
| 17558 | #endif |
| 17559 | } |
| 17560 | |
| 17561 | // MOVEMRa |
| 17562 | OPCODE(0x48E0) |
| 17563 | { |
| 17564 | u32 adr, res; |
| 17565 | u32 src, dst; |
| 17566 | |
| 17567 | u32 *psrc; |
| 17568 | |
| 17569 | FETCH_WORD(res); |
| 17570 | adr = AREG((Opcode >> 0) & 7); |
| 17571 | psrc = &AREGu32(7); |
| 17572 | dst = adr; |
| 17573 | PRE_IO |
| 17574 | do |
| 17575 | { |
| 17576 | if (res & 1) |
| 17577 | { |
| 17578 | adr -= 4; |
| 17579 | WRITE_LONG_DEC_F(adr, *psrc) |
| 17580 | } |
| 17581 | psrc--; |
| 17582 | } while (res >>= 1); |
| 17583 | AREG((Opcode >> 0) & 7) = adr; |
| 17584 | POST_IO |
| 17585 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
| 17586 | RET(8) |
| 17587 | } |
| 17588 | |
| 17589 | // MOVEMRa |
| 17590 | OPCODE(0x48E8) |
| 17591 | { |
| 17592 | u32 adr, res; |
| 17593 | u32 src, dst; |
| 17594 | |
| 17595 | u32 *psrc; |
| 17596 | |
| 17597 | FETCH_WORD(res); |
| 17598 | FETCH_SWORD(adr); |
| 17599 | adr += AREG((Opcode >> 0) & 7); |
| 17600 | psrc = &DREGu32(0); |
| 17601 | dst = adr; |
| 17602 | PRE_IO |
| 17603 | do |
| 17604 | { |
| 17605 | if (res & 1) |
| 17606 | { |
| 17607 | WRITE_LONG_F(adr, *psrc) |
| 17608 | adr += 4; |
| 17609 | } |
| 17610 | psrc++; |
| 17611 | } while (res >>= 1); |
| 17612 | POST_IO |
| 17613 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17614 | #ifdef USE_CYCLONE_TIMING |
| 17615 | RET(12) |
| 17616 | #else |
| 17617 | RET(24) |
| 17618 | #endif |
| 17619 | } |
| 17620 | |
| 17621 | // MOVEMRa |
| 17622 | OPCODE(0x48F0) |
| 17623 | { |
| 17624 | u32 adr, res; |
| 17625 | u32 src, dst; |
| 17626 | |
| 17627 | u32 *psrc; |
| 17628 | |
| 17629 | FETCH_WORD(res); |
| 17630 | adr = AREG((Opcode >> 0) & 7); |
| 17631 | DECODE_EXT_WORD |
| 17632 | psrc = &DREGu32(0); |
| 17633 | dst = adr; |
| 17634 | PRE_IO |
| 17635 | do |
| 17636 | { |
| 17637 | if (res & 1) |
| 17638 | { |
| 17639 | WRITE_LONG_F(adr, *psrc) |
| 17640 | adr += 4; |
| 17641 | } |
| 17642 | psrc++; |
| 17643 | } while (res >>= 1); |
| 17644 | POST_IO |
| 17645 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17646 | #ifdef USE_CYCLONE_TIMING |
| 17647 | RET(14) |
| 17648 | #else |
| 17649 | RET(28) |
| 17650 | #endif |
| 17651 | } |
| 17652 | |
| 17653 | // MOVEMRa |
| 17654 | OPCODE(0x48F8) |
| 17655 | { |
| 17656 | u32 adr, res; |
| 17657 | u32 src, dst; |
| 17658 | |
| 17659 | u32 *psrc; |
| 17660 | |
| 17661 | FETCH_WORD(res); |
| 17662 | FETCH_SWORD(adr); |
| 17663 | psrc = &DREGu32(0); |
| 17664 | dst = adr; |
| 17665 | PRE_IO |
| 17666 | do |
| 17667 | { |
| 17668 | if (res & 1) |
| 17669 | { |
| 17670 | WRITE_LONG_F(adr, *psrc) |
| 17671 | adr += 4; |
| 17672 | } |
| 17673 | psrc++; |
| 17674 | } while (res >>= 1); |
| 17675 | POST_IO |
| 17676 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17677 | #ifdef USE_CYCLONE_TIMING |
| 17678 | RET(12) |
| 17679 | #else |
| 17680 | RET(24) |
| 17681 | #endif |
| 17682 | } |
| 17683 | |
| 17684 | // MOVEMRa |
| 17685 | OPCODE(0x48F9) |
| 17686 | { |
| 17687 | u32 adr, res; |
| 17688 | u32 src, dst; |
| 17689 | |
| 17690 | u32 *psrc; |
| 17691 | |
| 17692 | FETCH_WORD(res); |
| 17693 | FETCH_LONG(adr); |
| 17694 | psrc = &DREGu32(0); |
| 17695 | dst = adr; |
| 17696 | PRE_IO |
| 17697 | do |
| 17698 | { |
| 17699 | if (res & 1) |
| 17700 | { |
| 17701 | WRITE_LONG_F(adr, *psrc) |
| 17702 | adr += 4; |
| 17703 | } |
| 17704 | psrc++; |
| 17705 | } while (res >>= 1); |
| 17706 | POST_IO |
| 17707 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 17708 | #ifdef USE_CYCLONE_TIMING |
| 17709 | RET(16) |
| 17710 | #else |
| 17711 | RET(32) |
| 17712 | #endif |
| 17713 | } |
| 17714 | |
| 17715 | // MOVEMRa |
| 17716 | OPCODE(0x48E7) |
| 17717 | { |
| 17718 | u32 adr, res; |
| 17719 | u32 src, dst; |
| 17720 | |
| 17721 | u32 *psrc; |
| 17722 | |
| 17723 | FETCH_WORD(res); |
| 17724 | adr = AREG(7); |
| 17725 | psrc = &AREGu32(7); |
| 17726 | dst = adr; |
| 17727 | PRE_IO |
| 17728 | do |
| 17729 | { |
| 17730 | if (res & 1) |
| 17731 | { |
| 17732 | adr -= 4; |
| 17733 | WRITE_LONG_DEC_F(adr, *psrc) |
| 17734 | } |
| 17735 | psrc--; |
| 17736 | } while (res >>= 1); |
| 17737 | AREG(7) = adr; |
| 17738 | POST_IO |
| 17739 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
| 17740 | RET(8) |
| 17741 | } |
| 17742 | |
| 17743 | // EXT |
| 17744 | OPCODE(0x4880) |
| 17745 | { |
| 17746 | u32 adr, res; |
| 17747 | u32 src, dst; |
| 17748 | |
| 17749 | res = (s32)DREGs8((Opcode >> 0) & 7); |
| 17750 | flag_C = 0; |
| 17751 | flag_V = 0; |
| 17752 | flag_NotZ = res; |
| 17753 | flag_N = res; |
| 17754 | DREGu16((Opcode >> 0) & 7) = res; |
| 17755 | RET(4) |
| 17756 | } |
| 17757 | |
| 17758 | // EXT |
| 17759 | OPCODE(0x48C0) |
| 17760 | { |
| 17761 | u32 adr, res; |
| 17762 | u32 src, dst; |
| 17763 | |
| 17764 | res = (s32)DREGs16((Opcode >> 0) & 7); |
| 17765 | flag_C = 0; |
| 17766 | flag_V = 0; |
| 17767 | flag_NotZ = res; |
| 17768 | flag_N = res >> 8; |
| 17769 | DREGu32((Opcode >> 0) & 7) = res; |
| 17770 | RET(4) |
| 17771 | } |
| 17772 | |
| 17773 | // TST |
| 17774 | OPCODE(0x4A00) |
| 17775 | { |
| 17776 | u32 adr, res; |
| 17777 | u32 src, dst; |
| 17778 | |
| 17779 | res = DREGu8((Opcode >> 0) & 7); |
| 17780 | flag_C = 0; |
| 17781 | flag_V = 0; |
| 17782 | flag_NotZ = res; |
| 17783 | flag_N = res; |
| 17784 | RET(4) |
| 17785 | } |
| 17786 | |
| 17787 | // TST |
| 17788 | OPCODE(0x4A10) |
| 17789 | { |
| 17790 | u32 adr, res; |
| 17791 | u32 src, dst; |
| 17792 | |
| 17793 | adr = AREG((Opcode >> 0) & 7); |
| 17794 | PRE_IO |
| 17795 | READ_BYTE_F(adr, res) |
| 17796 | flag_C = 0; |
| 17797 | flag_V = 0; |
| 17798 | flag_NotZ = res; |
| 17799 | flag_N = res; |
| 17800 | POST_IO |
| 17801 | RET(8) |
| 17802 | } |
| 17803 | |
| 17804 | // TST |
| 17805 | OPCODE(0x4A18) |
| 17806 | { |
| 17807 | u32 adr, res; |
| 17808 | u32 src, dst; |
| 17809 | |
| 17810 | adr = AREG((Opcode >> 0) & 7); |
| 17811 | AREG((Opcode >> 0) & 7) += 1; |
| 17812 | PRE_IO |
| 17813 | READ_BYTE_F(adr, res) |
| 17814 | flag_C = 0; |
| 17815 | flag_V = 0; |
| 17816 | flag_NotZ = res; |
| 17817 | flag_N = res; |
| 17818 | POST_IO |
| 17819 | RET(8) |
| 17820 | } |
| 17821 | |
| 17822 | // TST |
| 17823 | OPCODE(0x4A20) |
| 17824 | { |
| 17825 | u32 adr, res; |
| 17826 | u32 src, dst; |
| 17827 | |
| 17828 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 17829 | AREG((Opcode >> 0) & 7) = adr; |
| 17830 | PRE_IO |
| 17831 | READ_BYTE_F(adr, res) |
| 17832 | flag_C = 0; |
| 17833 | flag_V = 0; |
| 17834 | flag_NotZ = res; |
| 17835 | flag_N = res; |
| 17836 | POST_IO |
| 17837 | RET(10) |
| 17838 | } |
| 17839 | |
| 17840 | // TST |
| 17841 | OPCODE(0x4A28) |
| 17842 | { |
| 17843 | u32 adr, res; |
| 17844 | u32 src, dst; |
| 17845 | |
| 17846 | FETCH_SWORD(adr); |
| 17847 | adr += AREG((Opcode >> 0) & 7); |
| 17848 | PRE_IO |
| 17849 | READ_BYTE_F(adr, res) |
| 17850 | flag_C = 0; |
| 17851 | flag_V = 0; |
| 17852 | flag_NotZ = res; |
| 17853 | flag_N = res; |
| 17854 | POST_IO |
| 17855 | RET(12) |
| 17856 | } |
| 17857 | |
| 17858 | // TST |
| 17859 | OPCODE(0x4A30) |
| 17860 | { |
| 17861 | u32 adr, res; |
| 17862 | u32 src, dst; |
| 17863 | |
| 17864 | adr = AREG((Opcode >> 0) & 7); |
| 17865 | DECODE_EXT_WORD |
| 17866 | PRE_IO |
| 17867 | READ_BYTE_F(adr, res) |
| 17868 | flag_C = 0; |
| 17869 | flag_V = 0; |
| 17870 | flag_NotZ = res; |
| 17871 | flag_N = res; |
| 17872 | POST_IO |
| 17873 | RET(14) |
| 17874 | } |
| 17875 | |
| 17876 | // TST |
| 17877 | OPCODE(0x4A38) |
| 17878 | { |
| 17879 | u32 adr, res; |
| 17880 | u32 src, dst; |
| 17881 | |
| 17882 | FETCH_SWORD(adr); |
| 17883 | PRE_IO |
| 17884 | READ_BYTE_F(adr, res) |
| 17885 | flag_C = 0; |
| 17886 | flag_V = 0; |
| 17887 | flag_NotZ = res; |
| 17888 | flag_N = res; |
| 17889 | POST_IO |
| 17890 | RET(12) |
| 17891 | } |
| 17892 | |
| 17893 | // TST |
| 17894 | OPCODE(0x4A39) |
| 17895 | { |
| 17896 | u32 adr, res; |
| 17897 | u32 src, dst; |
| 17898 | |
| 17899 | FETCH_LONG(adr); |
| 17900 | PRE_IO |
| 17901 | READ_BYTE_F(adr, res) |
| 17902 | flag_C = 0; |
| 17903 | flag_V = 0; |
| 17904 | flag_NotZ = res; |
| 17905 | flag_N = res; |
| 17906 | POST_IO |
| 17907 | RET(16) |
| 17908 | } |
| 17909 | |
| 17910 | // TST |
| 17911 | OPCODE(0x4A1F) |
| 17912 | { |
| 17913 | u32 adr, res; |
| 17914 | u32 src, dst; |
| 17915 | |
| 17916 | adr = AREG(7); |
| 17917 | AREG(7) += 2; |
| 17918 | PRE_IO |
| 17919 | READ_BYTE_F(adr, res) |
| 17920 | flag_C = 0; |
| 17921 | flag_V = 0; |
| 17922 | flag_NotZ = res; |
| 17923 | flag_N = res; |
| 17924 | POST_IO |
| 17925 | RET(8) |
| 17926 | } |
| 17927 | |
| 17928 | // TST |
| 17929 | OPCODE(0x4A27) |
| 17930 | { |
| 17931 | u32 adr, res; |
| 17932 | u32 src, dst; |
| 17933 | |
| 17934 | adr = AREG(7) - 2; |
| 17935 | AREG(7) = adr; |
| 17936 | PRE_IO |
| 17937 | READ_BYTE_F(adr, res) |
| 17938 | flag_C = 0; |
| 17939 | flag_V = 0; |
| 17940 | flag_NotZ = res; |
| 17941 | flag_N = res; |
| 17942 | POST_IO |
| 17943 | RET(10) |
| 17944 | } |
| 17945 | |
| 17946 | // TST |
| 17947 | OPCODE(0x4A40) |
| 17948 | { |
| 17949 | u32 adr, res; |
| 17950 | u32 src, dst; |
| 17951 | |
| 17952 | res = DREGu16((Opcode >> 0) & 7); |
| 17953 | flag_C = 0; |
| 17954 | flag_V = 0; |
| 17955 | flag_NotZ = res; |
| 17956 | flag_N = res >> 8; |
| 17957 | RET(4) |
| 17958 | } |
| 17959 | |
| 17960 | // TST |
| 17961 | OPCODE(0x4A50) |
| 17962 | { |
| 17963 | u32 adr, res; |
| 17964 | u32 src, dst; |
| 17965 | |
| 17966 | adr = AREG((Opcode >> 0) & 7); |
| 17967 | PRE_IO |
| 17968 | READ_WORD_F(adr, res) |
| 17969 | flag_C = 0; |
| 17970 | flag_V = 0; |
| 17971 | flag_NotZ = res; |
| 17972 | flag_N = res >> 8; |
| 17973 | POST_IO |
| 17974 | RET(8) |
| 17975 | } |
| 17976 | |
| 17977 | // TST |
| 17978 | OPCODE(0x4A58) |
| 17979 | { |
| 17980 | u32 adr, res; |
| 17981 | u32 src, dst; |
| 17982 | |
| 17983 | adr = AREG((Opcode >> 0) & 7); |
| 17984 | AREG((Opcode >> 0) & 7) += 2; |
| 17985 | PRE_IO |
| 17986 | READ_WORD_F(adr, res) |
| 17987 | flag_C = 0; |
| 17988 | flag_V = 0; |
| 17989 | flag_NotZ = res; |
| 17990 | flag_N = res >> 8; |
| 17991 | POST_IO |
| 17992 | RET(8) |
| 17993 | } |
| 17994 | |
| 17995 | // TST |
| 17996 | OPCODE(0x4A60) |
| 17997 | { |
| 17998 | u32 adr, res; |
| 17999 | u32 src, dst; |
| 18000 | |
| 18001 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 18002 | AREG((Opcode >> 0) & 7) = adr; |
| 18003 | PRE_IO |
| 18004 | READ_WORD_F(adr, res) |
| 18005 | flag_C = 0; |
| 18006 | flag_V = 0; |
| 18007 | flag_NotZ = res; |
| 18008 | flag_N = res >> 8; |
| 18009 | POST_IO |
| 18010 | RET(10) |
| 18011 | } |
| 18012 | |
| 18013 | // TST |
| 18014 | OPCODE(0x4A68) |
| 18015 | { |
| 18016 | u32 adr, res; |
| 18017 | u32 src, dst; |
| 18018 | |
| 18019 | FETCH_SWORD(adr); |
| 18020 | adr += AREG((Opcode >> 0) & 7); |
| 18021 | PRE_IO |
| 18022 | READ_WORD_F(adr, res) |
| 18023 | flag_C = 0; |
| 18024 | flag_V = 0; |
| 18025 | flag_NotZ = res; |
| 18026 | flag_N = res >> 8; |
| 18027 | POST_IO |
| 18028 | RET(12) |
| 18029 | } |
| 18030 | |
| 18031 | // TST |
| 18032 | OPCODE(0x4A70) |
| 18033 | { |
| 18034 | u32 adr, res; |
| 18035 | u32 src, dst; |
| 18036 | |
| 18037 | adr = AREG((Opcode >> 0) & 7); |
| 18038 | DECODE_EXT_WORD |
| 18039 | PRE_IO |
| 18040 | READ_WORD_F(adr, res) |
| 18041 | flag_C = 0; |
| 18042 | flag_V = 0; |
| 18043 | flag_NotZ = res; |
| 18044 | flag_N = res >> 8; |
| 18045 | POST_IO |
| 18046 | RET(14) |
| 18047 | } |
| 18048 | |
| 18049 | // TST |
| 18050 | OPCODE(0x4A78) |
| 18051 | { |
| 18052 | u32 adr, res; |
| 18053 | u32 src, dst; |
| 18054 | |
| 18055 | FETCH_SWORD(adr); |
| 18056 | PRE_IO |
| 18057 | READ_WORD_F(adr, res) |
| 18058 | flag_C = 0; |
| 18059 | flag_V = 0; |
| 18060 | flag_NotZ = res; |
| 18061 | flag_N = res >> 8; |
| 18062 | POST_IO |
| 18063 | RET(12) |
| 18064 | } |
| 18065 | |
| 18066 | // TST |
| 18067 | OPCODE(0x4A79) |
| 18068 | { |
| 18069 | u32 adr, res; |
| 18070 | u32 src, dst; |
| 18071 | |
| 18072 | FETCH_LONG(adr); |
| 18073 | PRE_IO |
| 18074 | READ_WORD_F(adr, res) |
| 18075 | flag_C = 0; |
| 18076 | flag_V = 0; |
| 18077 | flag_NotZ = res; |
| 18078 | flag_N = res >> 8; |
| 18079 | POST_IO |
| 18080 | RET(16) |
| 18081 | } |
| 18082 | |
| 18083 | // TST |
| 18084 | OPCODE(0x4A5F) |
| 18085 | { |
| 18086 | u32 adr, res; |
| 18087 | u32 src, dst; |
| 18088 | |
| 18089 | adr = AREG(7); |
| 18090 | AREG(7) += 2; |
| 18091 | PRE_IO |
| 18092 | READ_WORD_F(adr, res) |
| 18093 | flag_C = 0; |
| 18094 | flag_V = 0; |
| 18095 | flag_NotZ = res; |
| 18096 | flag_N = res >> 8; |
| 18097 | POST_IO |
| 18098 | RET(8) |
| 18099 | } |
| 18100 | |
| 18101 | // TST |
| 18102 | OPCODE(0x4A67) |
| 18103 | { |
| 18104 | u32 adr, res; |
| 18105 | u32 src, dst; |
| 18106 | |
| 18107 | adr = AREG(7) - 2; |
| 18108 | AREG(7) = adr; |
| 18109 | PRE_IO |
| 18110 | READ_WORD_F(adr, res) |
| 18111 | flag_C = 0; |
| 18112 | flag_V = 0; |
| 18113 | flag_NotZ = res; |
| 18114 | flag_N = res >> 8; |
| 18115 | POST_IO |
| 18116 | RET(10) |
| 18117 | } |
| 18118 | |
| 18119 | // TST |
| 18120 | OPCODE(0x4A80) |
| 18121 | { |
| 18122 | u32 adr, res; |
| 18123 | u32 src, dst; |
| 18124 | |
| 18125 | res = DREGu32((Opcode >> 0) & 7); |
| 18126 | flag_C = 0; |
| 18127 | flag_V = 0; |
| 18128 | flag_NotZ = res; |
| 18129 | flag_N = res >> 24; |
| 18130 | RET(4) |
| 18131 | } |
| 18132 | |
| 18133 | // TST |
| 18134 | OPCODE(0x4A90) |
| 18135 | { |
| 18136 | u32 adr, res; |
| 18137 | u32 src, dst; |
| 18138 | |
| 18139 | adr = AREG((Opcode >> 0) & 7); |
| 18140 | PRE_IO |
| 18141 | READ_LONG_F(adr, res) |
| 18142 | flag_C = 0; |
| 18143 | flag_V = 0; |
| 18144 | flag_NotZ = res; |
| 18145 | flag_N = res >> 24; |
| 18146 | POST_IO |
| 18147 | RET(12) |
| 18148 | } |
| 18149 | |
| 18150 | // TST |
| 18151 | OPCODE(0x4A98) |
| 18152 | { |
| 18153 | u32 adr, res; |
| 18154 | u32 src, dst; |
| 18155 | |
| 18156 | adr = AREG((Opcode >> 0) & 7); |
| 18157 | AREG((Opcode >> 0) & 7) += 4; |
| 18158 | PRE_IO |
| 18159 | READ_LONG_F(adr, res) |
| 18160 | flag_C = 0; |
| 18161 | flag_V = 0; |
| 18162 | flag_NotZ = res; |
| 18163 | flag_N = res >> 24; |
| 18164 | POST_IO |
| 18165 | RET(12) |
| 18166 | } |
| 18167 | |
| 18168 | // TST |
| 18169 | OPCODE(0x4AA0) |
| 18170 | { |
| 18171 | u32 adr, res; |
| 18172 | u32 src, dst; |
| 18173 | |
| 18174 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 18175 | AREG((Opcode >> 0) & 7) = adr; |
| 18176 | PRE_IO |
| 18177 | READ_LONG_F(adr, res) |
| 18178 | flag_C = 0; |
| 18179 | flag_V = 0; |
| 18180 | flag_NotZ = res; |
| 18181 | flag_N = res >> 24; |
| 18182 | POST_IO |
| 18183 | RET(14) |
| 18184 | } |
| 18185 | |
| 18186 | // TST |
| 18187 | OPCODE(0x4AA8) |
| 18188 | { |
| 18189 | u32 adr, res; |
| 18190 | u32 src, dst; |
| 18191 | |
| 18192 | FETCH_SWORD(adr); |
| 18193 | adr += AREG((Opcode >> 0) & 7); |
| 18194 | PRE_IO |
| 18195 | READ_LONG_F(adr, res) |
| 18196 | flag_C = 0; |
| 18197 | flag_V = 0; |
| 18198 | flag_NotZ = res; |
| 18199 | flag_N = res >> 24; |
| 18200 | POST_IO |
| 18201 | RET(16) |
| 18202 | } |
| 18203 | |
| 18204 | // TST |
| 18205 | OPCODE(0x4AB0) |
| 18206 | { |
| 18207 | u32 adr, res; |
| 18208 | u32 src, dst; |
| 18209 | |
| 18210 | adr = AREG((Opcode >> 0) & 7); |
| 18211 | DECODE_EXT_WORD |
| 18212 | PRE_IO |
| 18213 | READ_LONG_F(adr, res) |
| 18214 | flag_C = 0; |
| 18215 | flag_V = 0; |
| 18216 | flag_NotZ = res; |
| 18217 | flag_N = res >> 24; |
| 18218 | POST_IO |
| 18219 | RET(18) |
| 18220 | } |
| 18221 | |
| 18222 | // TST |
| 18223 | OPCODE(0x4AB8) |
| 18224 | { |
| 18225 | u32 adr, res; |
| 18226 | u32 src, dst; |
| 18227 | |
| 18228 | FETCH_SWORD(adr); |
| 18229 | PRE_IO |
| 18230 | READ_LONG_F(adr, res) |
| 18231 | flag_C = 0; |
| 18232 | flag_V = 0; |
| 18233 | flag_NotZ = res; |
| 18234 | flag_N = res >> 24; |
| 18235 | POST_IO |
| 18236 | RET(16) |
| 18237 | } |
| 18238 | |
| 18239 | // TST |
| 18240 | OPCODE(0x4AB9) |
| 18241 | { |
| 18242 | u32 adr, res; |
| 18243 | u32 src, dst; |
| 18244 | |
| 18245 | FETCH_LONG(adr); |
| 18246 | PRE_IO |
| 18247 | READ_LONG_F(adr, res) |
| 18248 | flag_C = 0; |
| 18249 | flag_V = 0; |
| 18250 | flag_NotZ = res; |
| 18251 | flag_N = res >> 24; |
| 18252 | POST_IO |
| 18253 | RET(20) |
| 18254 | } |
| 18255 | |
| 18256 | // TST |
| 18257 | OPCODE(0x4A9F) |
| 18258 | { |
| 18259 | u32 adr, res; |
| 18260 | u32 src, dst; |
| 18261 | |
| 18262 | adr = AREG(7); |
| 18263 | AREG(7) += 4; |
| 18264 | PRE_IO |
| 18265 | READ_LONG_F(adr, res) |
| 18266 | flag_C = 0; |
| 18267 | flag_V = 0; |
| 18268 | flag_NotZ = res; |
| 18269 | flag_N = res >> 24; |
| 18270 | POST_IO |
| 18271 | RET(12) |
| 18272 | } |
| 18273 | |
| 18274 | // TST |
| 18275 | OPCODE(0x4AA7) |
| 18276 | { |
| 18277 | u32 adr, res; |
| 18278 | u32 src, dst; |
| 18279 | |
| 18280 | adr = AREG(7) - 4; |
| 18281 | AREG(7) = adr; |
| 18282 | PRE_IO |
| 18283 | READ_LONG_F(adr, res) |
| 18284 | flag_C = 0; |
| 18285 | flag_V = 0; |
| 18286 | flag_NotZ = res; |
| 18287 | flag_N = res >> 24; |
| 18288 | POST_IO |
| 18289 | RET(14) |
| 18290 | } |
| 18291 | |
| 18292 | // TAS |
| 18293 | OPCODE(0x4AC0) |
| 18294 | { |
| 18295 | u32 adr, res; |
| 18296 | u32 src, dst; |
| 18297 | |
| 18298 | res = DREGu8((Opcode >> 0) & 7); |
| 18299 | flag_C = 0; |
| 18300 | flag_V = 0; |
| 18301 | flag_NotZ = res; |
| 18302 | flag_N = res; |
| 18303 | res |= 0x80; |
| 18304 | DREGu8((Opcode >> 0) & 7) = res; |
| 18305 | RET(4) |
| 18306 | } |
| 18307 | |
| 18308 | // TAS |
| 18309 | OPCODE(0x4AD0) |
| 18310 | { |
| 18311 | u32 adr, res; |
| 18312 | u32 src, dst; |
| 18313 | |
| 18314 | adr = AREG((Opcode >> 0) & 7); |
| 18315 | PRE_IO |
| 18316 | READ_BYTE_F(adr, res) |
| 18317 | flag_C = 0; |
| 18318 | flag_V = 0; |
| 18319 | flag_NotZ = res; |
| 18320 | flag_N = res; |
| 18321 | #ifdef PICODRIVE_HACK |
| 18322 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18323 | res |= 0x80; |
| 18324 | WRITE_BYTE_F(adr, res); |
| 18325 | } |
| 18326 | #endif |
| 18327 | |
| 18328 | POST_IO |
| 18329 | #ifdef USE_CYCLONE_TIMING |
| 18330 | RET(18) |
| 18331 | #else |
| 18332 | RET(8) |
| 18333 | #endif |
| 18334 | } |
| 18335 | |
| 18336 | // TAS |
| 18337 | OPCODE(0x4AD8) |
| 18338 | { |
| 18339 | u32 adr, res; |
| 18340 | u32 src, dst; |
| 18341 | |
| 18342 | adr = AREG((Opcode >> 0) & 7); |
| 18343 | AREG((Opcode >> 0) & 7) += 1; |
| 18344 | PRE_IO |
| 18345 | READ_BYTE_F(adr, res) |
| 18346 | flag_C = 0; |
| 18347 | flag_V = 0; |
| 18348 | flag_NotZ = res; |
| 18349 | flag_N = res; |
| 18350 | |
| 18351 | #ifdef PICODRIVE_HACK |
| 18352 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18353 | res |= 0x80; |
| 18354 | WRITE_BYTE_F(adr, res); |
| 18355 | } |
| 18356 | #endif |
| 18357 | |
| 18358 | POST_IO |
| 18359 | #ifdef USE_CYCLONE_TIMING |
| 18360 | RET(18) |
| 18361 | #else |
| 18362 | RET(8) |
| 18363 | #endif |
| 18364 | } |
| 18365 | |
| 18366 | // TAS |
| 18367 | OPCODE(0x4AE0) |
| 18368 | { |
| 18369 | u32 adr, res; |
| 18370 | u32 src, dst; |
| 18371 | |
| 18372 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 18373 | AREG((Opcode >> 0) & 7) = adr; |
| 18374 | PRE_IO |
| 18375 | READ_BYTE_F(adr, res) |
| 18376 | flag_C = 0; |
| 18377 | flag_V = 0; |
| 18378 | flag_NotZ = res; |
| 18379 | flag_N = res; |
| 18380 | |
| 18381 | #ifdef PICODRIVE_HACK |
| 18382 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18383 | res |= 0x80; |
| 18384 | WRITE_BYTE_F(adr, res); |
| 18385 | } |
| 18386 | #endif |
| 18387 | |
| 18388 | POST_IO |
| 18389 | #ifdef USE_CYCLONE_TIMING |
| 18390 | RET(20) |
| 18391 | #else |
| 18392 | RET(10) |
| 18393 | #endif |
| 18394 | } |
| 18395 | |
| 18396 | // TAS |
| 18397 | OPCODE(0x4AE8) |
| 18398 | { |
| 18399 | u32 adr, res; |
| 18400 | u32 src, dst; |
| 18401 | |
| 18402 | FETCH_SWORD(adr); |
| 18403 | adr += AREG((Opcode >> 0) & 7); |
| 18404 | PRE_IO |
| 18405 | READ_BYTE_F(adr, res) |
| 18406 | flag_C = 0; |
| 18407 | flag_V = 0; |
| 18408 | flag_NotZ = res; |
| 18409 | flag_N = res; |
| 18410 | |
| 18411 | #ifdef PICODRIVE_HACK |
| 18412 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18413 | res |= 0x80; |
| 18414 | WRITE_BYTE_F(adr, res); |
| 18415 | } |
| 18416 | #endif |
| 18417 | |
| 18418 | POST_IO |
| 18419 | #ifdef USE_CYCLONE_TIMING |
| 18420 | RET(22) |
| 18421 | #else |
| 18422 | RET(12) |
| 18423 | #endif |
| 18424 | } |
| 18425 | |
| 18426 | // TAS |
| 18427 | OPCODE(0x4AF0) |
| 18428 | { |
| 18429 | u32 adr, res; |
| 18430 | u32 src, dst; |
| 18431 | |
| 18432 | adr = AREG((Opcode >> 0) & 7); |
| 18433 | DECODE_EXT_WORD |
| 18434 | PRE_IO |
| 18435 | READ_BYTE_F(adr, res) |
| 18436 | flag_C = 0; |
| 18437 | flag_V = 0; |
| 18438 | flag_NotZ = res; |
| 18439 | flag_N = res; |
| 18440 | |
| 18441 | #ifdef PICODRIVE_HACK |
| 18442 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18443 | res |= 0x80; |
| 18444 | WRITE_BYTE_F(adr, res); |
| 18445 | } |
| 18446 | #endif |
| 18447 | |
| 18448 | POST_IO |
| 18449 | #ifdef USE_CYCLONE_TIMING |
| 18450 | RET(24) |
| 18451 | #else |
| 18452 | RET(14) |
| 18453 | #endif |
| 18454 | } |
| 18455 | |
| 18456 | // TAS |
| 18457 | OPCODE(0x4AF8) |
| 18458 | { |
| 18459 | u32 adr, res; |
| 18460 | u32 src, dst; |
| 18461 | |
| 18462 | FETCH_SWORD(adr); |
| 18463 | PRE_IO |
| 18464 | READ_BYTE_F(adr, res) |
| 18465 | flag_C = 0; |
| 18466 | flag_V = 0; |
| 18467 | flag_NotZ = res; |
| 18468 | flag_N = res; |
| 18469 | |
| 18470 | #ifdef PICODRIVE_HACK |
| 18471 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18472 | res |= 0x80; |
| 18473 | WRITE_BYTE_F(adr, res); |
| 18474 | } |
| 18475 | #endif |
| 18476 | |
| 18477 | POST_IO |
| 18478 | #ifdef USE_CYCLONE_TIMING |
| 18479 | RET(22) |
| 18480 | #else |
| 18481 | RET(12) |
| 18482 | #endif |
| 18483 | } |
| 18484 | |
| 18485 | // TAS |
| 18486 | OPCODE(0x4AF9) |
| 18487 | { |
| 18488 | u32 adr, res; |
| 18489 | u32 src, dst; |
| 18490 | |
| 18491 | FETCH_LONG(adr); |
| 18492 | PRE_IO |
| 18493 | READ_BYTE_F(adr, res) |
| 18494 | flag_C = 0; |
| 18495 | flag_V = 0; |
| 18496 | flag_NotZ = res; |
| 18497 | flag_N = res; |
| 18498 | |
| 18499 | #ifdef PICODRIVE_HACK |
| 18500 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18501 | res |= 0x80; |
| 18502 | WRITE_BYTE_F(adr, res); |
| 18503 | } |
| 18504 | #endif |
| 18505 | |
| 18506 | POST_IO |
| 18507 | #ifdef USE_CYCLONE_TIMING |
| 18508 | RET(26) |
| 18509 | #else |
| 18510 | RET(16) |
| 18511 | #endif |
| 18512 | } |
| 18513 | |
| 18514 | // TAS |
| 18515 | OPCODE(0x4ADF) |
| 18516 | { |
| 18517 | u32 adr, res; |
| 18518 | u32 src, dst; |
| 18519 | |
| 18520 | adr = AREG(7); |
| 18521 | AREG(7) += 2; |
| 18522 | PRE_IO |
| 18523 | READ_BYTE_F(adr, res) |
| 18524 | flag_C = 0; |
| 18525 | flag_V = 0; |
| 18526 | flag_NotZ = res; |
| 18527 | flag_N = res; |
| 18528 | |
| 18529 | #ifdef PICODRIVE_HACK |
| 18530 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18531 | res |= 0x80; |
| 18532 | WRITE_BYTE_F(adr, res); |
| 18533 | } |
| 18534 | #endif |
| 18535 | |
| 18536 | POST_IO |
| 18537 | #ifdef USE_CYCLONE_TIMING |
| 18538 | RET(18) |
| 18539 | #else |
| 18540 | RET(8) |
| 18541 | #endif |
| 18542 | } |
| 18543 | |
| 18544 | // TAS |
| 18545 | OPCODE(0x4AE7) |
| 18546 | { |
| 18547 | u32 adr, res; |
| 18548 | u32 src, dst; |
| 18549 | |
| 18550 | adr = AREG(7) - 2; |
| 18551 | AREG(7) = adr; |
| 18552 | PRE_IO |
| 18553 | READ_BYTE_F(adr, res) |
| 18554 | flag_C = 0; |
| 18555 | flag_V = 0; |
| 18556 | flag_NotZ = res; |
| 18557 | flag_N = res; |
| 18558 | |
| 18559 | #ifdef PICODRIVE_HACK |
| 18560 | if (g_m68kcontext == &PicoCpuFS68k) { |
| 18561 | res |= 0x80; |
| 18562 | WRITE_BYTE_F(adr, res); |
| 18563 | } |
| 18564 | #endif |
| 18565 | |
| 18566 | POST_IO |
| 18567 | #ifdef USE_CYCLONE_TIMING |
| 18568 | RET(20) |
| 18569 | #else |
| 18570 | RET(8) |
| 18571 | #endif |
| 18572 | } |
| 18573 | |
| 18574 | // ILLEGAL |
| 18575 | OPCODE(0x4AFC) |
| 18576 | { |
| 18577 | #ifdef PICODRIVE_HACK |
| 18578 | extern void SekFinishIdleDet(void); |
| 18579 | SekFinishIdleDet(); |
| 18580 | #endif |
| 18581 | SET_PC(execute_exception(M68K_ILLEGAL_INSTRUCTION_EX, GET_PC-2, GET_SR)); |
| 18582 | RET(0) |
| 18583 | } |
| 18584 | |
| 18585 | // ILLEGAL A000-AFFF |
| 18586 | OPCODE(0xA000) |
| 18587 | { |
| 18588 | SET_PC(execute_exception(M68K_1010_EX, GET_PC-2, GET_SR)); |
| 18589 | RET(0) |
| 18590 | } |
| 18591 | |
| 18592 | // ILLEGAL F000-FFFF |
| 18593 | OPCODE(0xF000) |
| 18594 | { |
| 18595 | SET_PC(execute_exception(M68K_1111_EX, GET_PC-2, GET_SR)); |
| 18596 | RET(0) // 4 already taken by exc. handler |
| 18597 | } |
| 18598 | |
| 18599 | // MOVEMaR |
| 18600 | OPCODE(0x4C90) |
| 18601 | { |
| 18602 | u32 adr, res; |
| 18603 | u32 src, dst; |
| 18604 | |
| 18605 | s32 *psrc; |
| 18606 | |
| 18607 | FETCH_WORD(res); |
| 18608 | adr = AREG((Opcode >> 0) & 7); |
| 18609 | psrc = &DREGs32(0); |
| 18610 | dst = adr; |
| 18611 | PRE_IO |
| 18612 | do |
| 18613 | { |
| 18614 | if (res & 1) |
| 18615 | { |
| 18616 | READSX_WORD_F(adr, *psrc) |
| 18617 | adr += 2; |
| 18618 | } |
| 18619 | psrc++; |
| 18620 | } while (res >>= 1); |
| 18621 | POST_IO |
| 18622 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18623 | #ifdef USE_CYCLONE_TIMING |
| 18624 | RET(12) |
| 18625 | #else |
| 18626 | RET(16) |
| 18627 | #endif |
| 18628 | } |
| 18629 | |
| 18630 | // MOVEMaR |
| 18631 | OPCODE(0x4C98) |
| 18632 | { |
| 18633 | u32 adr, res; |
| 18634 | u32 src, dst; |
| 18635 | |
| 18636 | s32 *psrc; |
| 18637 | |
| 18638 | FETCH_WORD(res); |
| 18639 | adr = AREG((Opcode >> 0) & 7); |
| 18640 | psrc = &DREGs32(0); |
| 18641 | dst = adr; |
| 18642 | PRE_IO |
| 18643 | do |
| 18644 | { |
| 18645 | if (res & 1) |
| 18646 | { |
| 18647 | READSX_WORD_F(adr, *psrc) |
| 18648 | adr += 2; |
| 18649 | } |
| 18650 | psrc++; |
| 18651 | } while (res >>= 1); |
| 18652 | AREG((Opcode >> 0) & 7) = adr; |
| 18653 | POST_IO |
| 18654 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18655 | RET(12) |
| 18656 | } |
| 18657 | |
| 18658 | // MOVEMaR |
| 18659 | OPCODE(0x4CA8) |
| 18660 | { |
| 18661 | u32 adr, res; |
| 18662 | u32 src, dst; |
| 18663 | |
| 18664 | s32 *psrc; |
| 18665 | |
| 18666 | FETCH_WORD(res); |
| 18667 | FETCH_SWORD(adr); |
| 18668 | adr += AREG((Opcode >> 0) & 7); |
| 18669 | psrc = &DREGs32(0); |
| 18670 | dst = adr; |
| 18671 | PRE_IO |
| 18672 | do |
| 18673 | { |
| 18674 | if (res & 1) |
| 18675 | { |
| 18676 | READSX_WORD_F(adr, *psrc) |
| 18677 | adr += 2; |
| 18678 | } |
| 18679 | psrc++; |
| 18680 | } while (res >>= 1); |
| 18681 | POST_IO |
| 18682 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18683 | #ifdef USE_CYCLONE_TIMING |
| 18684 | RET(16) |
| 18685 | #else |
| 18686 | RET(24) |
| 18687 | #endif |
| 18688 | } |
| 18689 | |
| 18690 | // MOVEMaR |
| 18691 | OPCODE(0x4CB0) |
| 18692 | { |
| 18693 | u32 adr, res; |
| 18694 | u32 src, dst; |
| 18695 | |
| 18696 | s32 *psrc; |
| 18697 | |
| 18698 | FETCH_WORD(res); |
| 18699 | adr = AREG((Opcode >> 0) & 7); |
| 18700 | DECODE_EXT_WORD |
| 18701 | psrc = &DREGs32(0); |
| 18702 | dst = adr; |
| 18703 | PRE_IO |
| 18704 | do |
| 18705 | { |
| 18706 | if (res & 1) |
| 18707 | { |
| 18708 | READSX_WORD_F(adr, *psrc) |
| 18709 | adr += 2; |
| 18710 | } |
| 18711 | psrc++; |
| 18712 | } while (res >>= 1); |
| 18713 | POST_IO |
| 18714 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18715 | #ifdef USE_CYCLONE_TIMING |
| 18716 | RET(18) |
| 18717 | #else |
| 18718 | RET(28) |
| 18719 | #endif |
| 18720 | } |
| 18721 | |
| 18722 | // MOVEMaR |
| 18723 | OPCODE(0x4CB8) |
| 18724 | { |
| 18725 | u32 adr, res; |
| 18726 | u32 src, dst; |
| 18727 | |
| 18728 | s32 *psrc; |
| 18729 | |
| 18730 | FETCH_WORD(res); |
| 18731 | FETCH_SWORD(adr); |
| 18732 | psrc = &DREGs32(0); |
| 18733 | dst = adr; |
| 18734 | PRE_IO |
| 18735 | do |
| 18736 | { |
| 18737 | if (res & 1) |
| 18738 | { |
| 18739 | READSX_WORD_F(adr, *psrc) |
| 18740 | adr += 2; |
| 18741 | } |
| 18742 | psrc++; |
| 18743 | } while (res >>= 1); |
| 18744 | POST_IO |
| 18745 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18746 | #ifdef USE_CYCLONE_TIMING |
| 18747 | RET(16) |
| 18748 | #else |
| 18749 | RET(24) |
| 18750 | #endif |
| 18751 | } |
| 18752 | |
| 18753 | // MOVEMaR |
| 18754 | OPCODE(0x4CB9) |
| 18755 | { |
| 18756 | u32 adr, res; |
| 18757 | u32 src, dst; |
| 18758 | |
| 18759 | s32 *psrc; |
| 18760 | |
| 18761 | FETCH_WORD(res); |
| 18762 | FETCH_LONG(adr); |
| 18763 | psrc = &DREGs32(0); |
| 18764 | dst = adr; |
| 18765 | PRE_IO |
| 18766 | do |
| 18767 | { |
| 18768 | if (res & 1) |
| 18769 | { |
| 18770 | READSX_WORD_F(adr, *psrc) |
| 18771 | adr += 2; |
| 18772 | } |
| 18773 | psrc++; |
| 18774 | } while (res >>= 1); |
| 18775 | POST_IO |
| 18776 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18777 | #ifdef USE_CYCLONE_TIMING |
| 18778 | RET(20) |
| 18779 | #else |
| 18780 | RET(32) |
| 18781 | #endif |
| 18782 | } |
| 18783 | |
| 18784 | // MOVEMaR |
| 18785 | OPCODE(0x4CBA) |
| 18786 | { |
| 18787 | u32 adr, res; |
| 18788 | u32 src, dst; |
| 18789 | |
| 18790 | s32 *psrc; |
| 18791 | |
| 18792 | FETCH_WORD(res); |
| 18793 | adr = GET_SWORD + GET_PC; |
| 18794 | PC++; |
| 18795 | psrc = &DREGs32(0); |
| 18796 | dst = adr; |
| 18797 | PRE_IO |
| 18798 | do |
| 18799 | { |
| 18800 | if (res & 1) |
| 18801 | { |
| 18802 | READSX_WORD_F(adr, *psrc) |
| 18803 | adr += 2; |
| 18804 | } |
| 18805 | psrc++; |
| 18806 | } while (res >>= 1); |
| 18807 | POST_IO |
| 18808 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18809 | #ifdef USE_CYCLONE_TIMING |
| 18810 | RET(16) |
| 18811 | #else |
| 18812 | RET(24) |
| 18813 | #endif |
| 18814 | } |
| 18815 | |
| 18816 | // MOVEMaR |
| 18817 | OPCODE(0x4CBB) |
| 18818 | { |
| 18819 | u32 adr, res; |
| 18820 | u32 src, dst; |
| 18821 | |
| 18822 | s32 *psrc; |
| 18823 | |
| 18824 | FETCH_WORD(res); |
| 18825 | adr = GET_PC; |
| 18826 | DECODE_EXT_WORD |
| 18827 | psrc = &DREGs32(0); |
| 18828 | dst = adr; |
| 18829 | PRE_IO |
| 18830 | do |
| 18831 | { |
| 18832 | if (res & 1) |
| 18833 | { |
| 18834 | READSX_WORD_F(adr, *psrc) |
| 18835 | adr += 2; |
| 18836 | } |
| 18837 | psrc++; |
| 18838 | } while (res >>= 1); |
| 18839 | POST_IO |
| 18840 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18841 | #ifdef USE_CYCLONE_TIMING |
| 18842 | RET(18) |
| 18843 | #else |
| 18844 | RET(28) |
| 18845 | #endif |
| 18846 | } |
| 18847 | |
| 18848 | // MOVEMaR |
| 18849 | OPCODE(0x4C9F) |
| 18850 | { |
| 18851 | u32 adr, res; |
| 18852 | u32 src, dst; |
| 18853 | |
| 18854 | s32 *psrc; |
| 18855 | |
| 18856 | FETCH_WORD(res); |
| 18857 | adr = AREG(7); |
| 18858 | psrc = &DREGs32(0); |
| 18859 | dst = adr; |
| 18860 | PRE_IO |
| 18861 | do |
| 18862 | { |
| 18863 | if (res & 1) |
| 18864 | { |
| 18865 | READSX_WORD_F(adr, *psrc) |
| 18866 | adr += 2; |
| 18867 | } |
| 18868 | psrc++; |
| 18869 | } while (res >>= 1); |
| 18870 | AREG(7) = adr; |
| 18871 | POST_IO |
| 18872 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18873 | RET(12) |
| 18874 | } |
| 18875 | |
| 18876 | // MOVEMaR |
| 18877 | OPCODE(0x4CD0) |
| 18878 | { |
| 18879 | u32 adr, res; |
| 18880 | u32 src, dst; |
| 18881 | |
| 18882 | u32 *psrc; |
| 18883 | |
| 18884 | FETCH_WORD(res); |
| 18885 | adr = AREG((Opcode >> 0) & 7); |
| 18886 | psrc = &DREGu32(0); |
| 18887 | dst = adr; |
| 18888 | PRE_IO |
| 18889 | do |
| 18890 | { |
| 18891 | if (res & 1) |
| 18892 | { |
| 18893 | READ_LONG_F(adr, *psrc) |
| 18894 | adr += 4; |
| 18895 | } |
| 18896 | psrc++; |
| 18897 | } while (res >>= 1); |
| 18898 | POST_IO |
| 18899 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18900 | #ifdef USE_CYCLONE_TIMING |
| 18901 | RET(12) |
| 18902 | #else |
| 18903 | RET(20) |
| 18904 | #endif |
| 18905 | } |
| 18906 | |
| 18907 | // MOVEMaR |
| 18908 | OPCODE(0x4CD8) |
| 18909 | { |
| 18910 | u32 adr, res; |
| 18911 | u32 src, dst; |
| 18912 | |
| 18913 | u32 *psrc; |
| 18914 | |
| 18915 | FETCH_WORD(res); |
| 18916 | adr = AREG((Opcode >> 0) & 7); |
| 18917 | psrc = &DREGu32(0); |
| 18918 | dst = adr; |
| 18919 | PRE_IO |
| 18920 | do |
| 18921 | { |
| 18922 | if (res & 1) |
| 18923 | { |
| 18924 | READ_LONG_F(adr, *psrc) |
| 18925 | adr += 4; |
| 18926 | } |
| 18927 | psrc++; |
| 18928 | } while (res >>= 1); |
| 18929 | AREG((Opcode >> 0) & 7) = adr; |
| 18930 | POST_IO |
| 18931 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18932 | RET(12) |
| 18933 | } |
| 18934 | |
| 18935 | // MOVEMaR |
| 18936 | OPCODE(0x4CE8) |
| 18937 | { |
| 18938 | u32 adr, res; |
| 18939 | u32 src, dst; |
| 18940 | |
| 18941 | u32 *psrc; |
| 18942 | |
| 18943 | FETCH_WORD(res); |
| 18944 | FETCH_SWORD(adr); |
| 18945 | adr += AREG((Opcode >> 0) & 7); |
| 18946 | psrc = &DREGu32(0); |
| 18947 | dst = adr; |
| 18948 | PRE_IO |
| 18949 | do |
| 18950 | { |
| 18951 | if (res & 1) |
| 18952 | { |
| 18953 | READ_LONG_F(adr, *psrc) |
| 18954 | adr += 4; |
| 18955 | } |
| 18956 | psrc++; |
| 18957 | } while (res >>= 1); |
| 18958 | POST_IO |
| 18959 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18960 | #ifdef USE_CYCLONE_TIMING |
| 18961 | RET(16) |
| 18962 | #else |
| 18963 | RET(28) |
| 18964 | #endif |
| 18965 | } |
| 18966 | |
| 18967 | // MOVEMaR |
| 18968 | OPCODE(0x4CF0) |
| 18969 | { |
| 18970 | u32 adr, res; |
| 18971 | u32 src, dst; |
| 18972 | |
| 18973 | u32 *psrc; |
| 18974 | |
| 18975 | FETCH_WORD(res); |
| 18976 | adr = AREG((Opcode >> 0) & 7); |
| 18977 | DECODE_EXT_WORD |
| 18978 | psrc = &DREGu32(0); |
| 18979 | dst = adr; |
| 18980 | PRE_IO |
| 18981 | do |
| 18982 | { |
| 18983 | if (res & 1) |
| 18984 | { |
| 18985 | READ_LONG_F(adr, *psrc) |
| 18986 | adr += 4; |
| 18987 | } |
| 18988 | psrc++; |
| 18989 | } while (res >>= 1); |
| 18990 | POST_IO |
| 18991 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 18992 | #ifdef USE_CYCLONE_TIMING |
| 18993 | RET(18) |
| 18994 | #else |
| 18995 | RET(32) |
| 18996 | #endif |
| 18997 | } |
| 18998 | |
| 18999 | // MOVEMaR |
| 19000 | OPCODE(0x4CF8) |
| 19001 | { |
| 19002 | u32 adr, res; |
| 19003 | u32 src, dst; |
| 19004 | |
| 19005 | u32 *psrc; |
| 19006 | |
| 19007 | FETCH_WORD(res); |
| 19008 | FETCH_SWORD(adr); |
| 19009 | psrc = &DREGu32(0); |
| 19010 | dst = adr; |
| 19011 | PRE_IO |
| 19012 | do |
| 19013 | { |
| 19014 | if (res & 1) |
| 19015 | { |
| 19016 | READ_LONG_F(adr, *psrc) |
| 19017 | adr += 4; |
| 19018 | } |
| 19019 | psrc++; |
| 19020 | } while (res >>= 1); |
| 19021 | POST_IO |
| 19022 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 19023 | #ifdef USE_CYCLONE_TIMING |
| 19024 | RET(16) |
| 19025 | #else |
| 19026 | RET(28) |
| 19027 | #endif |
| 19028 | } |
| 19029 | |
| 19030 | // MOVEMaR |
| 19031 | OPCODE(0x4CF9) |
| 19032 | { |
| 19033 | u32 adr, res; |
| 19034 | u32 src, dst; |
| 19035 | |
| 19036 | u32 *psrc; |
| 19037 | |
| 19038 | FETCH_WORD(res); |
| 19039 | FETCH_LONG(adr); |
| 19040 | psrc = &DREGu32(0); |
| 19041 | dst = adr; |
| 19042 | PRE_IO |
| 19043 | do |
| 19044 | { |
| 19045 | if (res & 1) |
| 19046 | { |
| 19047 | READ_LONG_F(adr, *psrc) |
| 19048 | adr += 4; |
| 19049 | } |
| 19050 | psrc++; |
| 19051 | } while (res >>= 1); |
| 19052 | POST_IO |
| 19053 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 19054 | #ifdef USE_CYCLONE_TIMING |
| 19055 | RET(20) |
| 19056 | #else |
| 19057 | RET(36) |
| 19058 | #endif |
| 19059 | } |
| 19060 | |
| 19061 | // MOVEMaR |
| 19062 | OPCODE(0x4CFA) |
| 19063 | { |
| 19064 | u32 adr, res; |
| 19065 | u32 src, dst; |
| 19066 | |
| 19067 | u32 *psrc; |
| 19068 | |
| 19069 | FETCH_WORD(res); |
| 19070 | adr = GET_SWORD + GET_PC; |
| 19071 | PC++; |
| 19072 | psrc = &DREGu32(0); |
| 19073 | dst = adr; |
| 19074 | PRE_IO |
| 19075 | do |
| 19076 | { |
| 19077 | if (res & 1) |
| 19078 | { |
| 19079 | READ_LONG_F(adr, *psrc) |
| 19080 | adr += 4; |
| 19081 | } |
| 19082 | psrc++; |
| 19083 | } while (res >>= 1); |
| 19084 | POST_IO |
| 19085 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 19086 | #ifdef USE_CYCLONE_TIMING |
| 19087 | RET(16) |
| 19088 | #else |
| 19089 | RET(28) |
| 19090 | #endif |
| 19091 | } |
| 19092 | |
| 19093 | // MOVEMaR |
| 19094 | OPCODE(0x4CFB) |
| 19095 | { |
| 19096 | u32 adr, res; |
| 19097 | u32 src, dst; |
| 19098 | |
| 19099 | u32 *psrc; |
| 19100 | |
| 19101 | FETCH_WORD(res); |
| 19102 | adr = GET_PC; |
| 19103 | DECODE_EXT_WORD |
| 19104 | psrc = &DREGu32(0); |
| 19105 | dst = adr; |
| 19106 | PRE_IO |
| 19107 | do |
| 19108 | { |
| 19109 | if (res & 1) |
| 19110 | { |
| 19111 | READ_LONG_F(adr, *psrc) |
| 19112 | adr += 4; |
| 19113 | } |
| 19114 | psrc++; |
| 19115 | } while (res >>= 1); |
| 19116 | POST_IO |
| 19117 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 19118 | #ifdef USE_CYCLONE_TIMING |
| 19119 | RET(18) |
| 19120 | #else |
| 19121 | RET(32) |
| 19122 | #endif |
| 19123 | } |
| 19124 | |
| 19125 | // MOVEMaR |
| 19126 | OPCODE(0x4CDF) |
| 19127 | { |
| 19128 | u32 adr, res; |
| 19129 | u32 src, dst; |
| 19130 | |
| 19131 | u32 *psrc; |
| 19132 | |
| 19133 | FETCH_WORD(res); |
| 19134 | adr = AREG(7); |
| 19135 | psrc = &DREGu32(0); |
| 19136 | dst = adr; |
| 19137 | PRE_IO |
| 19138 | do |
| 19139 | { |
| 19140 | if (res & 1) |
| 19141 | { |
| 19142 | READ_LONG_F(adr, *psrc) |
| 19143 | adr += 4; |
| 19144 | } |
| 19145 | psrc++; |
| 19146 | } while (res >>= 1); |
| 19147 | AREG(7) = adr; |
| 19148 | POST_IO |
| 19149 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
| 19150 | RET(12) |
| 19151 | } |
| 19152 | |
| 19153 | // TRAP |
| 19154 | OPCODE(0x4E40) |
| 19155 | { |
| 19156 | SET_PC(execute_exception(M68K_TRAP_BASE_EX + (Opcode & 0xF), GET_PC, GET_SR)); |
| 19157 | RET(4) |
| 19158 | } |
| 19159 | |
| 19160 | // LINK |
| 19161 | OPCODE(0x4E50) |
| 19162 | { |
| 19163 | u32 adr, res; |
| 19164 | u32 src, dst; |
| 19165 | |
| 19166 | res = AREGu32((Opcode >> 0) & 7); |
| 19167 | PRE_IO |
| 19168 | PUSH_32_F(res) |
| 19169 | res = AREG(7); |
| 19170 | AREG((Opcode >> 0) & 7) = res; |
| 19171 | FETCH_SWORD(res); |
| 19172 | AREG(7) += res; |
| 19173 | POST_IO |
| 19174 | RET(16) |
| 19175 | } |
| 19176 | |
| 19177 | // LINKA7 |
| 19178 | OPCODE(0x4E57) |
| 19179 | { |
| 19180 | u32 adr, res; |
| 19181 | u32 src, dst; |
| 19182 | |
| 19183 | AREG(7) -= 4; |
| 19184 | PRE_IO |
| 19185 | WRITE_LONG_DEC_F(AREG(7), AREG(7)) |
| 19186 | FETCH_SWORD(res); |
| 19187 | AREG(7) += res; |
| 19188 | POST_IO |
| 19189 | RET(16) |
| 19190 | } |
| 19191 | |
| 19192 | // ULNK |
| 19193 | OPCODE(0x4E58) |
| 19194 | { |
| 19195 | u32 adr, res; |
| 19196 | u32 src, dst; |
| 19197 | |
| 19198 | src = AREGu32((Opcode >> 0) & 7); |
| 19199 | AREG(7) = src + 4; |
| 19200 | PRE_IO |
| 19201 | READ_LONG_F(src, res) |
| 19202 | AREG((Opcode >> 0) & 7) = res; |
| 19203 | POST_IO |
| 19204 | RET(12) |
| 19205 | } |
| 19206 | |
| 19207 | // ULNKA7 |
| 19208 | OPCODE(0x4E5F) |
| 19209 | { |
| 19210 | u32 adr, res; |
| 19211 | u32 src, dst; |
| 19212 | |
| 19213 | PRE_IO |
| 19214 | READ_LONG_F(AREG(7), AREG(7)) |
| 19215 | POST_IO |
| 19216 | RET(12) |
| 19217 | } |
| 19218 | |
| 19219 | // MOVEAUSP |
| 19220 | OPCODE(0x4E60) |
| 19221 | { |
| 19222 | u32 adr, res; |
| 19223 | u32 src, dst; |
| 19224 | |
| 19225 | if (!flag_S) |
| 19226 | { |
| 19227 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 19228 | RET(4) |
| 19229 | } |
| 19230 | res = AREGu32((Opcode >> 0) & 7); |
| 19231 | ASP = res; |
| 19232 | RET(4) |
| 19233 | } |
| 19234 | |
| 19235 | // MOVEUSPA |
| 19236 | OPCODE(0x4E68) |
| 19237 | { |
| 19238 | u32 adr, res; |
| 19239 | u32 src, dst; |
| 19240 | |
| 19241 | if (!flag_S) |
| 19242 | { |
| 19243 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 19244 | RET(4) |
| 19245 | } |
| 19246 | res = ASP; |
| 19247 | AREG((Opcode >> 0) & 7) = res; |
| 19248 | RET(4) |
| 19249 | } |
| 19250 | |
| 19251 | // RESET |
| 19252 | OPCODE(0x4E70) |
| 19253 | { |
| 19254 | u32 adr, res; |
| 19255 | u32 src, dst; |
| 19256 | |
| 19257 | if (!flag_S) |
| 19258 | { |
| 19259 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 19260 | RET(4) |
| 19261 | } |
| 19262 | PRE_IO |
| 19263 | if (m68kcontext.reset_handler) m68kcontext.reset_handler(); |
| 19264 | // CPU->Reset_CallBack(); |
| 19265 | POST_IO |
| 19266 | RET(132) |
| 19267 | } |
| 19268 | |
| 19269 | // NOP |
| 19270 | OPCODE(0x4E71) |
| 19271 | { |
| 19272 | RET(4) |
| 19273 | } |
| 19274 | |
| 19275 | // STOP |
| 19276 | OPCODE(0x4E72) |
| 19277 | { |
| 19278 | u32 adr, res; |
| 19279 | u32 src, dst; |
| 19280 | |
| 19281 | if (!flag_S) |
| 19282 | { |
| 19283 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 19284 | RET(4) |
| 19285 | } |
| 19286 | FETCH_WORD(res); |
| 19287 | res &= M68K_SR_MASK; |
| 19288 | SET_SR(res) |
| 19289 | if (!flag_S) |
| 19290 | { |
| 19291 | res = AREG(7); |
| 19292 | AREG(7) = ASP; |
| 19293 | ASP = res; |
| 19294 | } |
| 19295 | m68kcontext.execinfo |= FM68K_HALTED; |
| 19296 | RET0() |
| 19297 | } |
| 19298 | |
| 19299 | // RTE |
| 19300 | OPCODE(0x4E73) |
| 19301 | { |
| 19302 | u32 adr, res; |
| 19303 | u32 src, dst; |
| 19304 | |
| 19305 | if (!flag_S) |
| 19306 | { |
| 19307 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
| 19308 | RET(4) |
| 19309 | } |
| 19310 | PRE_IO |
| 19311 | POP_16_F(res) |
| 19312 | SET_SR(res) |
| 19313 | POP_32_F(res) |
| 19314 | SET_PC(res) |
| 19315 | if (!flag_S) |
| 19316 | { |
| 19317 | res = AREG(7); |
| 19318 | AREG(7) = ASP; |
| 19319 | ASP = res; |
| 19320 | } |
| 19321 | POST_IO |
| 19322 | m68kcontext.execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE); |
| 19323 | CHECK_INT_TO_JUMP(20) |
| 19324 | RET(20) |
| 19325 | } |
| 19326 | |
| 19327 | // RTS |
| 19328 | OPCODE(0x4E75) |
| 19329 | { |
| 19330 | u32 adr, res; |
| 19331 | u32 src, dst; |
| 19332 | |
| 19333 | PRE_IO |
| 19334 | POP_32_F(res) |
| 19335 | SET_PC(res) |
| 19336 | CHECK_BRANCH_EXCEPTION(res) |
| 19337 | POST_IO |
| 19338 | RET(16) |
| 19339 | } |
| 19340 | |
| 19341 | // TRAPV |
| 19342 | OPCODE(0x4E76) |
| 19343 | { |
| 19344 | if (flag_V & 0x80) |
| 19345 | SET_PC(execute_exception(M68K_TRAPV_EX, GET_PC, GET_SR)); |
| 19346 | RET(4) |
| 19347 | } |
| 19348 | |
| 19349 | // RTR |
| 19350 | OPCODE(0x4E77) |
| 19351 | { |
| 19352 | u32 adr, res; |
| 19353 | u32 src, dst; |
| 19354 | |
| 19355 | PRE_IO |
| 19356 | POP_16_F(res) |
| 19357 | SET_CCR(res) |
| 19358 | POP_32_F(res) |
| 19359 | SET_PC(res) |
| 19360 | CHECK_BRANCH_EXCEPTION(res) |
| 19361 | POST_IO |
| 19362 | RET(20) |
| 19363 | } |
| 19364 | |
| 19365 | // JSR |
| 19366 | OPCODE(0x4E90) |
| 19367 | { |
| 19368 | u32 adr, res; |
| 19369 | u32 src, dst; |
| 19370 | |
| 19371 | adr = AREG((Opcode >> 0) & 7); |
| 19372 | { |
| 19373 | u32 oldPC; |
| 19374 | |
| 19375 | oldPC = GET_PC; |
| 19376 | PRE_IO |
| 19377 | PUSH_32_F(oldPC) |
| 19378 | } |
| 19379 | SET_PC(adr) |
| 19380 | CHECK_BRANCH_EXCEPTION(adr) |
| 19381 | POST_IO |
| 19382 | RET(16) |
| 19383 | } |
| 19384 | |
| 19385 | // JSR |
| 19386 | OPCODE(0x4EA8) |
| 19387 | { |
| 19388 | u32 adr, res; |
| 19389 | u32 src, dst; |
| 19390 | |
| 19391 | FETCH_SWORD(adr); |
| 19392 | adr += AREG((Opcode >> 0) & 7); |
| 19393 | { |
| 19394 | u32 oldPC; |
| 19395 | |
| 19396 | oldPC = GET_PC; |
| 19397 | PRE_IO |
| 19398 | PUSH_32_F(oldPC) |
| 19399 | } |
| 19400 | SET_PC(adr) |
| 19401 | CHECK_BRANCH_EXCEPTION(adr) |
| 19402 | POST_IO |
| 19403 | RET(18) |
| 19404 | } |
| 19405 | |
| 19406 | // JSR |
| 19407 | OPCODE(0x4EB0) |
| 19408 | { |
| 19409 | u32 adr, res; |
| 19410 | u32 src, dst; |
| 19411 | |
| 19412 | adr = AREG((Opcode >> 0) & 7); |
| 19413 | DECODE_EXT_WORD |
| 19414 | { |
| 19415 | u32 oldPC; |
| 19416 | |
| 19417 | oldPC = GET_PC; |
| 19418 | PRE_IO |
| 19419 | PUSH_32_F(oldPC) |
| 19420 | } |
| 19421 | SET_PC(adr) |
| 19422 | CHECK_BRANCH_EXCEPTION(adr) |
| 19423 | POST_IO |
| 19424 | RET(22) |
| 19425 | } |
| 19426 | |
| 19427 | // JSR |
| 19428 | OPCODE(0x4EB8) |
| 19429 | { |
| 19430 | u32 adr, res; |
| 19431 | u32 src, dst; |
| 19432 | |
| 19433 | FETCH_SWORD(adr); |
| 19434 | { |
| 19435 | u32 oldPC; |
| 19436 | |
| 19437 | oldPC = GET_PC; |
| 19438 | PRE_IO |
| 19439 | PUSH_32_F(oldPC) |
| 19440 | } |
| 19441 | SET_PC(adr) |
| 19442 | CHECK_BRANCH_EXCEPTION(adr) |
| 19443 | POST_IO |
| 19444 | RET(18) |
| 19445 | } |
| 19446 | |
| 19447 | // JSR |
| 19448 | OPCODE(0x4EB9) |
| 19449 | { |
| 19450 | u32 adr, res; |
| 19451 | u32 src, dst; |
| 19452 | |
| 19453 | FETCH_LONG(adr); |
| 19454 | { |
| 19455 | u32 oldPC; |
| 19456 | |
| 19457 | oldPC = GET_PC; |
| 19458 | PRE_IO |
| 19459 | PUSH_32_F(oldPC) |
| 19460 | } |
| 19461 | SET_PC(adr) |
| 19462 | CHECK_BRANCH_EXCEPTION(adr) |
| 19463 | POST_IO |
| 19464 | RET(20) |
| 19465 | } |
| 19466 | |
| 19467 | // JSR |
| 19468 | OPCODE(0x4EBA) |
| 19469 | { |
| 19470 | u32 adr, res; |
| 19471 | u32 src, dst; |
| 19472 | |
| 19473 | adr = GET_SWORD + GET_PC; |
| 19474 | PC++; |
| 19475 | { |
| 19476 | u32 oldPC; |
| 19477 | |
| 19478 | oldPC = GET_PC; |
| 19479 | PRE_IO |
| 19480 | PUSH_32_F(oldPC) |
| 19481 | } |
| 19482 | SET_PC(adr) |
| 19483 | CHECK_BRANCH_EXCEPTION(adr) |
| 19484 | POST_IO |
| 19485 | RET(18) |
| 19486 | } |
| 19487 | |
| 19488 | // JSR |
| 19489 | OPCODE(0x4EBB) |
| 19490 | { |
| 19491 | u32 adr, res; |
| 19492 | u32 src, dst; |
| 19493 | |
| 19494 | adr = GET_PC; |
| 19495 | DECODE_EXT_WORD |
| 19496 | { |
| 19497 | u32 oldPC; |
| 19498 | |
| 19499 | oldPC = GET_PC; |
| 19500 | PRE_IO |
| 19501 | PUSH_32_F(oldPC) |
| 19502 | } |
| 19503 | SET_PC(adr) |
| 19504 | CHECK_BRANCH_EXCEPTION(adr) |
| 19505 | POST_IO |
| 19506 | RET(22) |
| 19507 | } |
| 19508 | |
| 19509 | // JMP |
| 19510 | OPCODE(0x4ED0) |
| 19511 | { |
| 19512 | u32 adr, res; |
| 19513 | u32 src, dst; |
| 19514 | |
| 19515 | adr = AREG((Opcode >> 0) & 7); |
| 19516 | SET_PC(adr) |
| 19517 | CHECK_BRANCH_EXCEPTION(adr) |
| 19518 | RET(8) |
| 19519 | } |
| 19520 | |
| 19521 | // JMP |
| 19522 | OPCODE(0x4EE8) |
| 19523 | { |
| 19524 | u32 adr, res; |
| 19525 | u32 src, dst; |
| 19526 | |
| 19527 | FETCH_SWORD(adr); |
| 19528 | adr += AREG((Opcode >> 0) & 7); |
| 19529 | SET_PC(adr) |
| 19530 | CHECK_BRANCH_EXCEPTION(adr) |
| 19531 | RET(10) |
| 19532 | } |
| 19533 | |
| 19534 | // JMP |
| 19535 | OPCODE(0x4EF0) |
| 19536 | { |
| 19537 | u32 adr, res; |
| 19538 | u32 src, dst; |
| 19539 | |
| 19540 | adr = AREG((Opcode >> 0) & 7); |
| 19541 | DECODE_EXT_WORD |
| 19542 | SET_PC(adr) |
| 19543 | CHECK_BRANCH_EXCEPTION(adr) |
| 19544 | RET(14) |
| 19545 | } |
| 19546 | |
| 19547 | // JMP |
| 19548 | OPCODE(0x4EF8) |
| 19549 | { |
| 19550 | u32 adr, res; |
| 19551 | u32 src, dst; |
| 19552 | |
| 19553 | FETCH_SWORD(adr); |
| 19554 | SET_PC(adr) |
| 19555 | CHECK_BRANCH_EXCEPTION(adr) |
| 19556 | RET(10) |
| 19557 | } |
| 19558 | |
| 19559 | // JMP |
| 19560 | OPCODE(0x4EF9) |
| 19561 | { |
| 19562 | u32 adr, res; |
| 19563 | u32 src, dst; |
| 19564 | |
| 19565 | FETCH_LONG(adr); |
| 19566 | SET_PC(adr) |
| 19567 | CHECK_BRANCH_EXCEPTION(adr) |
| 19568 | RET(12) |
| 19569 | } |
| 19570 | |
| 19571 | // JMP |
| 19572 | OPCODE(0x4EFA) |
| 19573 | { |
| 19574 | u32 adr, res; |
| 19575 | u32 src, dst; |
| 19576 | |
| 19577 | adr = GET_SWORD + GET_PC; |
| 19578 | PC++; |
| 19579 | SET_PC(adr) |
| 19580 | CHECK_BRANCH_EXCEPTION(adr) |
| 19581 | RET(10) |
| 19582 | } |
| 19583 | |
| 19584 | // JMP |
| 19585 | OPCODE(0x4EFB) |
| 19586 | { |
| 19587 | u32 adr, res; |
| 19588 | u32 src, dst; |
| 19589 | |
| 19590 | adr = GET_PC; |
| 19591 | DECODE_EXT_WORD |
| 19592 | SET_PC(adr) |
| 19593 | CHECK_BRANCH_EXCEPTION(adr) |
| 19594 | RET(14) |
| 19595 | } |
| 19596 | |
| 19597 | // CHK |
| 19598 | OPCODE(0x4180) |
| 19599 | { |
| 19600 | s32 src, res; |
| 19601 | |
| 19602 | src = DREGs16((Opcode >> 0) & 7); |
| 19603 | res = DREGs16((Opcode >> 9) & 7); |
| 19604 | if ((res < 0) || (res > src)) |
| 19605 | { |
| 19606 | flag_N = res >> 8; |
| 19607 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19608 | } |
| 19609 | RET(10) |
| 19610 | } |
| 19611 | |
| 19612 | // CHK |
| 19613 | OPCODE(0x4190) |
| 19614 | { |
| 19615 | s32 src, res; |
| 19616 | u32 adr; |
| 19617 | |
| 19618 | adr = AREG((Opcode >> 0) & 7); |
| 19619 | PRE_IO |
| 19620 | READSX_WORD_F(adr, src) |
| 19621 | res = DREGs16((Opcode >> 9) & 7); |
| 19622 | if ((res < 0) || (res > src)) |
| 19623 | { |
| 19624 | flag_N = res >> 8; |
| 19625 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19626 | } |
| 19627 | POST_IO |
| 19628 | RET(14) |
| 19629 | } |
| 19630 | |
| 19631 | // CHK |
| 19632 | OPCODE(0x4198) |
| 19633 | { |
| 19634 | s32 src, res; |
| 19635 | u32 adr; |
| 19636 | |
| 19637 | adr = AREG((Opcode >> 0) & 7); |
| 19638 | AREG((Opcode >> 0) & 7) += 2; |
| 19639 | PRE_IO |
| 19640 | READSX_WORD_F(adr, src) |
| 19641 | res = DREGs16((Opcode >> 9) & 7); |
| 19642 | if ((res < 0) || (res > src)) |
| 19643 | { |
| 19644 | flag_N = res >> 8; |
| 19645 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19646 | } |
| 19647 | POST_IO |
| 19648 | RET(14) |
| 19649 | } |
| 19650 | |
| 19651 | // CHK |
| 19652 | OPCODE(0x41A0) |
| 19653 | { |
| 19654 | s32 src, res; |
| 19655 | u32 adr; |
| 19656 | |
| 19657 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 19658 | AREG((Opcode >> 0) & 7) = adr; |
| 19659 | PRE_IO |
| 19660 | READSX_WORD_F(adr, src) |
| 19661 | res = DREGs16((Opcode >> 9) & 7); |
| 19662 | if ((res < 0) || (res > src)) |
| 19663 | { |
| 19664 | flag_N = res >> 8; |
| 19665 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19666 | } |
| 19667 | POST_IO |
| 19668 | RET(16) |
| 19669 | } |
| 19670 | |
| 19671 | // CHK |
| 19672 | OPCODE(0x41A8) |
| 19673 | { |
| 19674 | s32 src, res; |
| 19675 | u32 adr; |
| 19676 | |
| 19677 | FETCH_SWORD(adr); |
| 19678 | adr += AREG((Opcode >> 0) & 7); |
| 19679 | PRE_IO |
| 19680 | READSX_WORD_F(adr, src) |
| 19681 | res = DREGs16((Opcode >> 9) & 7); |
| 19682 | if ((res < 0) || (res > src)) |
| 19683 | { |
| 19684 | flag_N = res >> 8; |
| 19685 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19686 | } |
| 19687 | POST_IO |
| 19688 | RET(18) |
| 19689 | } |
| 19690 | |
| 19691 | // CHK |
| 19692 | OPCODE(0x41B0) |
| 19693 | { |
| 19694 | s32 src, res; |
| 19695 | u32 adr; |
| 19696 | |
| 19697 | adr = AREG((Opcode >> 0) & 7); |
| 19698 | DECODE_EXT_WORD |
| 19699 | PRE_IO |
| 19700 | READSX_WORD_F(adr, src) |
| 19701 | res = DREGs16((Opcode >> 9) & 7); |
| 19702 | if ((res < 0) || (res > src)) |
| 19703 | { |
| 19704 | flag_N = res >> 8; |
| 19705 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19706 | } |
| 19707 | POST_IO |
| 19708 | RET(20) |
| 19709 | } |
| 19710 | |
| 19711 | // CHK |
| 19712 | OPCODE(0x41B8) |
| 19713 | { |
| 19714 | s32 src, res; |
| 19715 | u32 adr; |
| 19716 | |
| 19717 | FETCH_SWORD(adr); |
| 19718 | PRE_IO |
| 19719 | READSX_WORD_F(adr, src) |
| 19720 | res = DREGs16((Opcode >> 9) & 7); |
| 19721 | if ((res < 0) || (res > src)) |
| 19722 | { |
| 19723 | flag_N = res >> 8; |
| 19724 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19725 | } |
| 19726 | POST_IO |
| 19727 | RET(18) |
| 19728 | } |
| 19729 | |
| 19730 | // CHK |
| 19731 | OPCODE(0x41B9) |
| 19732 | { |
| 19733 | s32 src, res; |
| 19734 | u32 adr; |
| 19735 | |
| 19736 | FETCH_LONG(adr); |
| 19737 | PRE_IO |
| 19738 | READSX_WORD_F(adr, src) |
| 19739 | res = DREGs16((Opcode >> 9) & 7); |
| 19740 | if ((res < 0) || (res > src)) |
| 19741 | { |
| 19742 | flag_N = res >> 8; |
| 19743 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19744 | } |
| 19745 | POST_IO |
| 19746 | RET(22) |
| 19747 | } |
| 19748 | |
| 19749 | // CHK |
| 19750 | OPCODE(0x41BA) |
| 19751 | { |
| 19752 | s32 src, res; |
| 19753 | u32 adr; |
| 19754 | |
| 19755 | adr = GET_SWORD + GET_PC; |
| 19756 | PC++; |
| 19757 | PRE_IO |
| 19758 | READSX_WORD_F(adr, src) |
| 19759 | res = DREGs16((Opcode >> 9) & 7); |
| 19760 | if ((res < 0) || (res > src)) |
| 19761 | { |
| 19762 | flag_N = res >> 8; |
| 19763 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19764 | } |
| 19765 | POST_IO |
| 19766 | RET(18) |
| 19767 | } |
| 19768 | |
| 19769 | // CHK |
| 19770 | OPCODE(0x41BB) |
| 19771 | { |
| 19772 | s32 src, res; |
| 19773 | u32 adr; |
| 19774 | |
| 19775 | adr = GET_PC; |
| 19776 | DECODE_EXT_WORD |
| 19777 | PRE_IO |
| 19778 | READSX_WORD_F(adr, src) |
| 19779 | res = DREGs16((Opcode >> 9) & 7); |
| 19780 | if ((res < 0) || (res > src)) |
| 19781 | { |
| 19782 | flag_N = res >> 8; |
| 19783 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19784 | } |
| 19785 | POST_IO |
| 19786 | RET(20) |
| 19787 | } |
| 19788 | |
| 19789 | // CHK |
| 19790 | OPCODE(0x41BC) |
| 19791 | { |
| 19792 | s32 src, res; |
| 19793 | u32 adr; |
| 19794 | |
| 19795 | FETCH_SWORD(src); |
| 19796 | res = DREGs16((Opcode >> 9) & 7); |
| 19797 | if ((res < 0) || (res > src)) |
| 19798 | { |
| 19799 | flag_N = res >> 8; |
| 19800 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19801 | } |
| 19802 | POST_IO |
| 19803 | RET(14) |
| 19804 | } |
| 19805 | |
| 19806 | // CHK |
| 19807 | OPCODE(0x419F) |
| 19808 | { |
| 19809 | s32 src, res; |
| 19810 | u32 adr; |
| 19811 | |
| 19812 | adr = AREG(7); |
| 19813 | AREG(7) += 2; |
| 19814 | PRE_IO |
| 19815 | READSX_WORD_F(adr, src) |
| 19816 | res = DREGs16((Opcode >> 9) & 7); |
| 19817 | if ((res < 0) || (res > src)) |
| 19818 | { |
| 19819 | flag_N = res >> 8; |
| 19820 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19821 | } |
| 19822 | POST_IO |
| 19823 | RET(14) |
| 19824 | } |
| 19825 | |
| 19826 | // CHK |
| 19827 | OPCODE(0x41A7) |
| 19828 | { |
| 19829 | s32 src, res; |
| 19830 | u32 adr; |
| 19831 | |
| 19832 | adr = AREG(7) - 2; |
| 19833 | AREG(7) = adr; |
| 19834 | PRE_IO |
| 19835 | READSX_WORD_F(adr, src) |
| 19836 | res = DREGs16((Opcode >> 9) & 7); |
| 19837 | if ((res < 0) || (res > src)) |
| 19838 | { |
| 19839 | flag_N = res >> 8; |
| 19840 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
| 19841 | } |
| 19842 | POST_IO |
| 19843 | RET(16) |
| 19844 | } |
| 19845 | |
| 19846 | // LEA |
| 19847 | OPCODE(0x41D0) |
| 19848 | { |
| 19849 | u32 adr, res; |
| 19850 | u32 src, dst; |
| 19851 | |
| 19852 | adr = AREG((Opcode >> 0) & 7); |
| 19853 | res = adr; |
| 19854 | AREG((Opcode >> 9) & 7) = res; |
| 19855 | RET(4) |
| 19856 | } |
| 19857 | |
| 19858 | // LEA |
| 19859 | OPCODE(0x41E8) |
| 19860 | { |
| 19861 | u32 adr, res; |
| 19862 | u32 src, dst; |
| 19863 | |
| 19864 | FETCH_SWORD(adr); |
| 19865 | adr += AREG((Opcode >> 0) & 7); |
| 19866 | res = adr; |
| 19867 | AREG((Opcode >> 9) & 7) = res; |
| 19868 | RET(8) |
| 19869 | } |
| 19870 | |
| 19871 | // LEA |
| 19872 | OPCODE(0x41F0) |
| 19873 | { |
| 19874 | u32 adr, res; |
| 19875 | u32 src, dst; |
| 19876 | |
| 19877 | adr = AREG((Opcode >> 0) & 7); |
| 19878 | DECODE_EXT_WORD |
| 19879 | res = adr; |
| 19880 | AREG((Opcode >> 9) & 7) = res; |
| 19881 | RET(12) |
| 19882 | } |
| 19883 | |
| 19884 | // LEA |
| 19885 | OPCODE(0x41F8) |
| 19886 | { |
| 19887 | u32 adr, res; |
| 19888 | u32 src, dst; |
| 19889 | |
| 19890 | FETCH_SWORD(adr); |
| 19891 | res = adr; |
| 19892 | AREG((Opcode >> 9) & 7) = res; |
| 19893 | RET(8) |
| 19894 | } |
| 19895 | |
| 19896 | // LEA |
| 19897 | OPCODE(0x41F9) |
| 19898 | { |
| 19899 | u32 adr, res; |
| 19900 | u32 src, dst; |
| 19901 | |
| 19902 | FETCH_LONG(adr); |
| 19903 | res = adr; |
| 19904 | AREG((Opcode >> 9) & 7) = res; |
| 19905 | RET(12) |
| 19906 | } |
| 19907 | |
| 19908 | // LEA |
| 19909 | OPCODE(0x41FA) |
| 19910 | { |
| 19911 | u32 adr, res; |
| 19912 | u32 src, dst; |
| 19913 | |
| 19914 | adr = GET_SWORD + GET_PC; |
| 19915 | PC++; |
| 19916 | res = adr; |
| 19917 | AREG((Opcode >> 9) & 7) = res; |
| 19918 | RET(8) |
| 19919 | } |
| 19920 | |
| 19921 | // LEA |
| 19922 | OPCODE(0x41FB) |
| 19923 | { |
| 19924 | u32 adr, res; |
| 19925 | u32 src, dst; |
| 19926 | |
| 19927 | adr = GET_PC; |
| 19928 | DECODE_EXT_WORD |
| 19929 | res = adr; |
| 19930 | AREG((Opcode >> 9) & 7) = res; |
| 19931 | RET(12) |
| 19932 | } |
| 19933 | |
| 19934 | // STCC |
| 19935 | OPCODE(0x50C0) |
| 19936 | { |
| 19937 | u32 adr, res; |
| 19938 | u32 src, dst; |
| 19939 | |
| 19940 | res = 0xFF; |
| 19941 | DREGu8((Opcode >> 0) & 7) = res; |
| 19942 | RET(6) |
| 19943 | } |
| 19944 | |
| 19945 | // STCC |
| 19946 | OPCODE(0x51C0) |
| 19947 | { |
| 19948 | u32 adr, res; |
| 19949 | u32 src, dst; |
| 19950 | |
| 19951 | res = 0; |
| 19952 | DREGu8((Opcode >> 0) & 7) = res; |
| 19953 | RET(4) |
| 19954 | } |
| 19955 | |
| 19956 | // STCC |
| 19957 | OPCODE(0x52C0) |
| 19958 | { |
| 19959 | u32 adr, res; |
| 19960 | u32 src, dst; |
| 19961 | |
| 19962 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 19963 | { |
| 19964 | res = 0xFF; |
| 19965 | DREGu8((Opcode >> 0) & 7) = res; |
| 19966 | RET(6) |
| 19967 | } |
| 19968 | res = 0; |
| 19969 | DREGu8((Opcode >> 0) & 7) = res; |
| 19970 | RET(4) |
| 19971 | } |
| 19972 | |
| 19973 | // STCC |
| 19974 | OPCODE(0x53C0) |
| 19975 | { |
| 19976 | u32 adr, res; |
| 19977 | u32 src, dst; |
| 19978 | |
| 19979 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 19980 | { |
| 19981 | res = 0xFF; |
| 19982 | DREGu8((Opcode >> 0) & 7) = res; |
| 19983 | RET(6) |
| 19984 | } |
| 19985 | res = 0; |
| 19986 | DREGu8((Opcode >> 0) & 7) = res; |
| 19987 | RET(4) |
| 19988 | } |
| 19989 | |
| 19990 | // STCC |
| 19991 | OPCODE(0x54C0) |
| 19992 | { |
| 19993 | u32 adr, res; |
| 19994 | u32 src, dst; |
| 19995 | |
| 19996 | if (!(flag_C & 0x100)) |
| 19997 | { |
| 19998 | res = 0xFF; |
| 19999 | DREGu8((Opcode >> 0) & 7) = res; |
| 20000 | RET(6) |
| 20001 | } |
| 20002 | res = 0; |
| 20003 | DREGu8((Opcode >> 0) & 7) = res; |
| 20004 | RET(4) |
| 20005 | } |
| 20006 | |
| 20007 | // STCC |
| 20008 | OPCODE(0x55C0) |
| 20009 | { |
| 20010 | u32 adr, res; |
| 20011 | u32 src, dst; |
| 20012 | |
| 20013 | if (flag_C & 0x100) |
| 20014 | { |
| 20015 | res = 0xFF; |
| 20016 | DREGu8((Opcode >> 0) & 7) = res; |
| 20017 | RET(6) |
| 20018 | } |
| 20019 | res = 0; |
| 20020 | DREGu8((Opcode >> 0) & 7) = res; |
| 20021 | RET(4) |
| 20022 | } |
| 20023 | |
| 20024 | // STCC |
| 20025 | OPCODE(0x56C0) |
| 20026 | { |
| 20027 | u32 adr, res; |
| 20028 | u32 src, dst; |
| 20029 | |
| 20030 | if (flag_NotZ) |
| 20031 | { |
| 20032 | res = 0xFF; |
| 20033 | DREGu8((Opcode >> 0) & 7) = res; |
| 20034 | RET(6) |
| 20035 | } |
| 20036 | res = 0; |
| 20037 | DREGu8((Opcode >> 0) & 7) = res; |
| 20038 | RET(4) |
| 20039 | } |
| 20040 | |
| 20041 | // STCC |
| 20042 | OPCODE(0x57C0) |
| 20043 | { |
| 20044 | u32 adr, res; |
| 20045 | u32 src, dst; |
| 20046 | |
| 20047 | if (!flag_NotZ) |
| 20048 | { |
| 20049 | res = 0xFF; |
| 20050 | DREGu8((Opcode >> 0) & 7) = res; |
| 20051 | RET(6) |
| 20052 | } |
| 20053 | res = 0; |
| 20054 | DREGu8((Opcode >> 0) & 7) = res; |
| 20055 | RET(4) |
| 20056 | } |
| 20057 | |
| 20058 | // STCC |
| 20059 | OPCODE(0x58C0) |
| 20060 | { |
| 20061 | u32 adr, res; |
| 20062 | u32 src, dst; |
| 20063 | |
| 20064 | if (!(flag_V & 0x80)) |
| 20065 | { |
| 20066 | res = 0xFF; |
| 20067 | DREGu8((Opcode >> 0) & 7) = res; |
| 20068 | RET(6) |
| 20069 | } |
| 20070 | res = 0; |
| 20071 | DREGu8((Opcode >> 0) & 7) = res; |
| 20072 | RET(4) |
| 20073 | } |
| 20074 | |
| 20075 | // STCC |
| 20076 | OPCODE(0x59C0) |
| 20077 | { |
| 20078 | u32 adr, res; |
| 20079 | u32 src, dst; |
| 20080 | |
| 20081 | if (flag_V & 0x80) |
| 20082 | { |
| 20083 | res = 0xFF; |
| 20084 | DREGu8((Opcode >> 0) & 7) = res; |
| 20085 | RET(6) |
| 20086 | } |
| 20087 | res = 0; |
| 20088 | DREGu8((Opcode >> 0) & 7) = res; |
| 20089 | RET(4) |
| 20090 | } |
| 20091 | |
| 20092 | // STCC |
| 20093 | OPCODE(0x5AC0) |
| 20094 | { |
| 20095 | u32 adr, res; |
| 20096 | u32 src, dst; |
| 20097 | |
| 20098 | if (!(flag_N & 0x80)) |
| 20099 | { |
| 20100 | res = 0xFF; |
| 20101 | DREGu8((Opcode >> 0) & 7) = res; |
| 20102 | RET(6) |
| 20103 | } |
| 20104 | res = 0; |
| 20105 | DREGu8((Opcode >> 0) & 7) = res; |
| 20106 | RET(4) |
| 20107 | } |
| 20108 | |
| 20109 | // STCC |
| 20110 | OPCODE(0x5BC0) |
| 20111 | { |
| 20112 | u32 adr, res; |
| 20113 | u32 src, dst; |
| 20114 | |
| 20115 | if (flag_N & 0x80) |
| 20116 | { |
| 20117 | res = 0xFF; |
| 20118 | DREGu8((Opcode >> 0) & 7) = res; |
| 20119 | RET(6) |
| 20120 | } |
| 20121 | res = 0; |
| 20122 | DREGu8((Opcode >> 0) & 7) = res; |
| 20123 | RET(4) |
| 20124 | } |
| 20125 | |
| 20126 | // STCC |
| 20127 | OPCODE(0x5CC0) |
| 20128 | { |
| 20129 | u32 adr, res; |
| 20130 | u32 src, dst; |
| 20131 | |
| 20132 | if (!((flag_N ^ flag_V) & 0x80)) |
| 20133 | { |
| 20134 | res = 0xFF; |
| 20135 | DREGu8((Opcode >> 0) & 7) = res; |
| 20136 | RET(6) |
| 20137 | } |
| 20138 | res = 0; |
| 20139 | DREGu8((Opcode >> 0) & 7) = res; |
| 20140 | RET(4) |
| 20141 | } |
| 20142 | |
| 20143 | // STCC |
| 20144 | OPCODE(0x5DC0) |
| 20145 | { |
| 20146 | u32 adr, res; |
| 20147 | u32 src, dst; |
| 20148 | |
| 20149 | if ((flag_N ^ flag_V) & 0x80) |
| 20150 | { |
| 20151 | res = 0xFF; |
| 20152 | DREGu8((Opcode >> 0) & 7) = res; |
| 20153 | RET(6) |
| 20154 | } |
| 20155 | res = 0; |
| 20156 | DREGu8((Opcode >> 0) & 7) = res; |
| 20157 | RET(4) |
| 20158 | } |
| 20159 | |
| 20160 | // STCC |
| 20161 | OPCODE(0x5EC0) |
| 20162 | { |
| 20163 | u32 adr, res; |
| 20164 | u32 src, dst; |
| 20165 | |
| 20166 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 20167 | { |
| 20168 | res = 0xFF; |
| 20169 | DREGu8((Opcode >> 0) & 7) = res; |
| 20170 | RET(6) |
| 20171 | } |
| 20172 | res = 0; |
| 20173 | DREGu8((Opcode >> 0) & 7) = res; |
| 20174 | RET(4) |
| 20175 | } |
| 20176 | |
| 20177 | // STCC |
| 20178 | OPCODE(0x5FC0) |
| 20179 | { |
| 20180 | u32 adr, res; |
| 20181 | u32 src, dst; |
| 20182 | |
| 20183 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 20184 | { |
| 20185 | res = 0xFF; |
| 20186 | DREGu8((Opcode >> 0) & 7) = res; |
| 20187 | RET(6) |
| 20188 | } |
| 20189 | res = 0; |
| 20190 | DREGu8((Opcode >> 0) & 7) = res; |
| 20191 | RET(4) |
| 20192 | } |
| 20193 | |
| 20194 | // STCC |
| 20195 | OPCODE(0x50D0) |
| 20196 | { |
| 20197 | u32 adr, res; |
| 20198 | u32 src, dst; |
| 20199 | |
| 20200 | adr = AREG((Opcode >> 0) & 7); |
| 20201 | res = 0xFF; |
| 20202 | PRE_IO |
| 20203 | WRITE_BYTE_F(adr, res) |
| 20204 | POST_IO |
| 20205 | RET(12) |
| 20206 | } |
| 20207 | |
| 20208 | // STCC |
| 20209 | OPCODE(0x51D0) |
| 20210 | { |
| 20211 | u32 adr, res; |
| 20212 | u32 src, dst; |
| 20213 | |
| 20214 | adr = AREG((Opcode >> 0) & 7); |
| 20215 | res = 0; |
| 20216 | PRE_IO |
| 20217 | WRITE_BYTE_F(adr, res) |
| 20218 | POST_IO |
| 20219 | RET(12) |
| 20220 | } |
| 20221 | |
| 20222 | // STCC |
| 20223 | OPCODE(0x52D0) |
| 20224 | { |
| 20225 | u32 adr, res; |
| 20226 | u32 src, dst; |
| 20227 | |
| 20228 | adr = AREG((Opcode >> 0) & 7); |
| 20229 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 20230 | { |
| 20231 | res = 0xFF; |
| 20232 | PRE_IO |
| 20233 | WRITE_BYTE_F(adr, res) |
| 20234 | POST_IO |
| 20235 | RET(12) |
| 20236 | } |
| 20237 | res = 0; |
| 20238 | PRE_IO |
| 20239 | WRITE_BYTE_F(adr, res) |
| 20240 | POST_IO |
| 20241 | RET(12) |
| 20242 | } |
| 20243 | |
| 20244 | // STCC |
| 20245 | OPCODE(0x53D0) |
| 20246 | { |
| 20247 | u32 adr, res; |
| 20248 | u32 src, dst; |
| 20249 | |
| 20250 | adr = AREG((Opcode >> 0) & 7); |
| 20251 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 20252 | { |
| 20253 | res = 0xFF; |
| 20254 | PRE_IO |
| 20255 | WRITE_BYTE_F(adr, res) |
| 20256 | POST_IO |
| 20257 | RET(12) |
| 20258 | } |
| 20259 | res = 0; |
| 20260 | PRE_IO |
| 20261 | WRITE_BYTE_F(adr, res) |
| 20262 | POST_IO |
| 20263 | RET(12) |
| 20264 | } |
| 20265 | |
| 20266 | // STCC |
| 20267 | OPCODE(0x54D0) |
| 20268 | { |
| 20269 | u32 adr, res; |
| 20270 | u32 src, dst; |
| 20271 | |
| 20272 | adr = AREG((Opcode >> 0) & 7); |
| 20273 | if (!(flag_C & 0x100)) |
| 20274 | { |
| 20275 | res = 0xFF; |
| 20276 | PRE_IO |
| 20277 | WRITE_BYTE_F(adr, res) |
| 20278 | POST_IO |
| 20279 | RET(12) |
| 20280 | } |
| 20281 | res = 0; |
| 20282 | PRE_IO |
| 20283 | WRITE_BYTE_F(adr, res) |
| 20284 | POST_IO |
| 20285 | RET(12) |
| 20286 | } |
| 20287 | |
| 20288 | // STCC |
| 20289 | OPCODE(0x55D0) |
| 20290 | { |
| 20291 | u32 adr, res; |
| 20292 | u32 src, dst; |
| 20293 | |
| 20294 | adr = AREG((Opcode >> 0) & 7); |
| 20295 | if (flag_C & 0x100) |
| 20296 | { |
| 20297 | res = 0xFF; |
| 20298 | PRE_IO |
| 20299 | WRITE_BYTE_F(adr, res) |
| 20300 | POST_IO |
| 20301 | RET(12) |
| 20302 | } |
| 20303 | res = 0; |
| 20304 | PRE_IO |
| 20305 | WRITE_BYTE_F(adr, res) |
| 20306 | POST_IO |
| 20307 | RET(12) |
| 20308 | } |
| 20309 | |
| 20310 | // STCC |
| 20311 | OPCODE(0x56D0) |
| 20312 | { |
| 20313 | u32 adr, res; |
| 20314 | u32 src, dst; |
| 20315 | |
| 20316 | adr = AREG((Opcode >> 0) & 7); |
| 20317 | if (flag_NotZ) |
| 20318 | { |
| 20319 | res = 0xFF; |
| 20320 | PRE_IO |
| 20321 | WRITE_BYTE_F(adr, res) |
| 20322 | POST_IO |
| 20323 | RET(12) |
| 20324 | } |
| 20325 | res = 0; |
| 20326 | PRE_IO |
| 20327 | WRITE_BYTE_F(adr, res) |
| 20328 | POST_IO |
| 20329 | RET(12) |
| 20330 | } |
| 20331 | |
| 20332 | // STCC |
| 20333 | OPCODE(0x57D0) |
| 20334 | { |
| 20335 | u32 adr, res; |
| 20336 | u32 src, dst; |
| 20337 | |
| 20338 | adr = AREG((Opcode >> 0) & 7); |
| 20339 | if (!flag_NotZ) |
| 20340 | { |
| 20341 | res = 0xFF; |
| 20342 | PRE_IO |
| 20343 | WRITE_BYTE_F(adr, res) |
| 20344 | POST_IO |
| 20345 | RET(12) |
| 20346 | } |
| 20347 | res = 0; |
| 20348 | PRE_IO |
| 20349 | WRITE_BYTE_F(adr, res) |
| 20350 | POST_IO |
| 20351 | RET(12) |
| 20352 | } |
| 20353 | |
| 20354 | // STCC |
| 20355 | OPCODE(0x58D0) |
| 20356 | { |
| 20357 | u32 adr, res; |
| 20358 | u32 src, dst; |
| 20359 | |
| 20360 | adr = AREG((Opcode >> 0) & 7); |
| 20361 | if (!(flag_V & 0x80)) |
| 20362 | { |
| 20363 | res = 0xFF; |
| 20364 | PRE_IO |
| 20365 | WRITE_BYTE_F(adr, res) |
| 20366 | POST_IO |
| 20367 | RET(12) |
| 20368 | } |
| 20369 | res = 0; |
| 20370 | PRE_IO |
| 20371 | WRITE_BYTE_F(adr, res) |
| 20372 | POST_IO |
| 20373 | RET(12) |
| 20374 | } |
| 20375 | |
| 20376 | // STCC |
| 20377 | OPCODE(0x59D0) |
| 20378 | { |
| 20379 | u32 adr, res; |
| 20380 | u32 src, dst; |
| 20381 | |
| 20382 | adr = AREG((Opcode >> 0) & 7); |
| 20383 | if (flag_V & 0x80) |
| 20384 | { |
| 20385 | res = 0xFF; |
| 20386 | PRE_IO |
| 20387 | WRITE_BYTE_F(adr, res) |
| 20388 | POST_IO |
| 20389 | RET(12) |
| 20390 | } |
| 20391 | res = 0; |
| 20392 | PRE_IO |
| 20393 | WRITE_BYTE_F(adr, res) |
| 20394 | POST_IO |
| 20395 | RET(12) |
| 20396 | } |
| 20397 | |
| 20398 | // STCC |
| 20399 | OPCODE(0x5AD0) |
| 20400 | { |
| 20401 | u32 adr, res; |
| 20402 | u32 src, dst; |
| 20403 | |
| 20404 | adr = AREG((Opcode >> 0) & 7); |
| 20405 | if (!(flag_N & 0x80)) |
| 20406 | { |
| 20407 | res = 0xFF; |
| 20408 | PRE_IO |
| 20409 | WRITE_BYTE_F(adr, res) |
| 20410 | POST_IO |
| 20411 | RET(12) |
| 20412 | } |
| 20413 | res = 0; |
| 20414 | PRE_IO |
| 20415 | WRITE_BYTE_F(adr, res) |
| 20416 | POST_IO |
| 20417 | RET(12) |
| 20418 | } |
| 20419 | |
| 20420 | // STCC |
| 20421 | OPCODE(0x5BD0) |
| 20422 | { |
| 20423 | u32 adr, res; |
| 20424 | u32 src, dst; |
| 20425 | |
| 20426 | adr = AREG((Opcode >> 0) & 7); |
| 20427 | if (flag_N & 0x80) |
| 20428 | { |
| 20429 | res = 0xFF; |
| 20430 | PRE_IO |
| 20431 | WRITE_BYTE_F(adr, res) |
| 20432 | POST_IO |
| 20433 | RET(12) |
| 20434 | } |
| 20435 | res = 0; |
| 20436 | PRE_IO |
| 20437 | WRITE_BYTE_F(adr, res) |
| 20438 | POST_IO |
| 20439 | RET(12) |
| 20440 | } |
| 20441 | |
| 20442 | // STCC |
| 20443 | OPCODE(0x5CD0) |
| 20444 | { |
| 20445 | u32 adr, res; |
| 20446 | u32 src, dst; |
| 20447 | |
| 20448 | adr = AREG((Opcode >> 0) & 7); |
| 20449 | if (!((flag_N ^ flag_V) & 0x80)) |
| 20450 | { |
| 20451 | res = 0xFF; |
| 20452 | PRE_IO |
| 20453 | WRITE_BYTE_F(adr, res) |
| 20454 | POST_IO |
| 20455 | RET(12) |
| 20456 | } |
| 20457 | res = 0; |
| 20458 | PRE_IO |
| 20459 | WRITE_BYTE_F(adr, res) |
| 20460 | POST_IO |
| 20461 | RET(12) |
| 20462 | } |
| 20463 | |
| 20464 | // STCC |
| 20465 | OPCODE(0x5DD0) |
| 20466 | { |
| 20467 | u32 adr, res; |
| 20468 | u32 src, dst; |
| 20469 | |
| 20470 | adr = AREG((Opcode >> 0) & 7); |
| 20471 | if ((flag_N ^ flag_V) & 0x80) |
| 20472 | { |
| 20473 | res = 0xFF; |
| 20474 | PRE_IO |
| 20475 | WRITE_BYTE_F(adr, res) |
| 20476 | POST_IO |
| 20477 | RET(12) |
| 20478 | } |
| 20479 | res = 0; |
| 20480 | PRE_IO |
| 20481 | WRITE_BYTE_F(adr, res) |
| 20482 | POST_IO |
| 20483 | RET(12) |
| 20484 | } |
| 20485 | |
| 20486 | // STCC |
| 20487 | OPCODE(0x5ED0) |
| 20488 | { |
| 20489 | u32 adr, res; |
| 20490 | u32 src, dst; |
| 20491 | |
| 20492 | adr = AREG((Opcode >> 0) & 7); |
| 20493 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 20494 | { |
| 20495 | res = 0xFF; |
| 20496 | PRE_IO |
| 20497 | WRITE_BYTE_F(adr, res) |
| 20498 | POST_IO |
| 20499 | RET(12) |
| 20500 | } |
| 20501 | res = 0; |
| 20502 | PRE_IO |
| 20503 | WRITE_BYTE_F(adr, res) |
| 20504 | POST_IO |
| 20505 | RET(12) |
| 20506 | } |
| 20507 | |
| 20508 | // STCC |
| 20509 | OPCODE(0x5FD0) |
| 20510 | { |
| 20511 | u32 adr, res; |
| 20512 | u32 src, dst; |
| 20513 | |
| 20514 | adr = AREG((Opcode >> 0) & 7); |
| 20515 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 20516 | { |
| 20517 | res = 0xFF; |
| 20518 | PRE_IO |
| 20519 | WRITE_BYTE_F(adr, res) |
| 20520 | POST_IO |
| 20521 | RET(12) |
| 20522 | } |
| 20523 | res = 0; |
| 20524 | PRE_IO |
| 20525 | WRITE_BYTE_F(adr, res) |
| 20526 | POST_IO |
| 20527 | RET(12) |
| 20528 | } |
| 20529 | |
| 20530 | // STCC |
| 20531 | OPCODE(0x50D8) |
| 20532 | { |
| 20533 | u32 adr, res; |
| 20534 | u32 src, dst; |
| 20535 | |
| 20536 | adr = AREG((Opcode >> 0) & 7); |
| 20537 | AREG((Opcode >> 0) & 7) += 1; |
| 20538 | res = 0xFF; |
| 20539 | PRE_IO |
| 20540 | WRITE_BYTE_F(adr, res) |
| 20541 | POST_IO |
| 20542 | RET(12) |
| 20543 | } |
| 20544 | |
| 20545 | // STCC |
| 20546 | OPCODE(0x51D8) |
| 20547 | { |
| 20548 | u32 adr, res; |
| 20549 | u32 src, dst; |
| 20550 | |
| 20551 | adr = AREG((Opcode >> 0) & 7); |
| 20552 | AREG((Opcode >> 0) & 7) += 1; |
| 20553 | res = 0; |
| 20554 | PRE_IO |
| 20555 | WRITE_BYTE_F(adr, res) |
| 20556 | POST_IO |
| 20557 | RET(12) |
| 20558 | } |
| 20559 | |
| 20560 | // STCC |
| 20561 | OPCODE(0x52D8) |
| 20562 | { |
| 20563 | u32 adr, res; |
| 20564 | u32 src, dst; |
| 20565 | |
| 20566 | adr = AREG((Opcode >> 0) & 7); |
| 20567 | AREG((Opcode >> 0) & 7) += 1; |
| 20568 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 20569 | { |
| 20570 | res = 0xFF; |
| 20571 | PRE_IO |
| 20572 | WRITE_BYTE_F(adr, res) |
| 20573 | POST_IO |
| 20574 | RET(12) |
| 20575 | } |
| 20576 | res = 0; |
| 20577 | PRE_IO |
| 20578 | WRITE_BYTE_F(adr, res) |
| 20579 | POST_IO |
| 20580 | RET(12) |
| 20581 | } |
| 20582 | |
| 20583 | // STCC |
| 20584 | OPCODE(0x53D8) |
| 20585 | { |
| 20586 | u32 adr, res; |
| 20587 | u32 src, dst; |
| 20588 | |
| 20589 | adr = AREG((Opcode >> 0) & 7); |
| 20590 | AREG((Opcode >> 0) & 7) += 1; |
| 20591 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 20592 | { |
| 20593 | res = 0xFF; |
| 20594 | PRE_IO |
| 20595 | WRITE_BYTE_F(adr, res) |
| 20596 | POST_IO |
| 20597 | RET(12) |
| 20598 | } |
| 20599 | res = 0; |
| 20600 | PRE_IO |
| 20601 | WRITE_BYTE_F(adr, res) |
| 20602 | POST_IO |
| 20603 | RET(12) |
| 20604 | } |
| 20605 | |
| 20606 | // STCC |
| 20607 | OPCODE(0x54D8) |
| 20608 | { |
| 20609 | u32 adr, res; |
| 20610 | u32 src, dst; |
| 20611 | |
| 20612 | adr = AREG((Opcode >> 0) & 7); |
| 20613 | AREG((Opcode >> 0) & 7) += 1; |
| 20614 | if (!(flag_C & 0x100)) |
| 20615 | { |
| 20616 | res = 0xFF; |
| 20617 | PRE_IO |
| 20618 | WRITE_BYTE_F(adr, res) |
| 20619 | POST_IO |
| 20620 | RET(12) |
| 20621 | } |
| 20622 | res = 0; |
| 20623 | PRE_IO |
| 20624 | WRITE_BYTE_F(adr, res) |
| 20625 | POST_IO |
| 20626 | RET(12) |
| 20627 | } |
| 20628 | |
| 20629 | // STCC |
| 20630 | OPCODE(0x55D8) |
| 20631 | { |
| 20632 | u32 adr, res; |
| 20633 | u32 src, dst; |
| 20634 | |
| 20635 | adr = AREG((Opcode >> 0) & 7); |
| 20636 | AREG((Opcode >> 0) & 7) += 1; |
| 20637 | if (flag_C & 0x100) |
| 20638 | { |
| 20639 | res = 0xFF; |
| 20640 | PRE_IO |
| 20641 | WRITE_BYTE_F(adr, res) |
| 20642 | POST_IO |
| 20643 | RET(12) |
| 20644 | } |
| 20645 | res = 0; |
| 20646 | PRE_IO |
| 20647 | WRITE_BYTE_F(adr, res) |
| 20648 | POST_IO |
| 20649 | RET(12) |
| 20650 | } |
| 20651 | |
| 20652 | // STCC |
| 20653 | OPCODE(0x56D8) |
| 20654 | { |
| 20655 | u32 adr, res; |
| 20656 | u32 src, dst; |
| 20657 | |
| 20658 | adr = AREG((Opcode >> 0) & 7); |
| 20659 | AREG((Opcode >> 0) & 7) += 1; |
| 20660 | if (flag_NotZ) |
| 20661 | { |
| 20662 | res = 0xFF; |
| 20663 | PRE_IO |
| 20664 | WRITE_BYTE_F(adr, res) |
| 20665 | POST_IO |
| 20666 | RET(12) |
| 20667 | } |
| 20668 | res = 0; |
| 20669 | PRE_IO |
| 20670 | WRITE_BYTE_F(adr, res) |
| 20671 | POST_IO |
| 20672 | RET(12) |
| 20673 | } |
| 20674 | |
| 20675 | // STCC |
| 20676 | OPCODE(0x57D8) |
| 20677 | { |
| 20678 | u32 adr, res; |
| 20679 | u32 src, dst; |
| 20680 | |
| 20681 | adr = AREG((Opcode >> 0) & 7); |
| 20682 | AREG((Opcode >> 0) & 7) += 1; |
| 20683 | if (!flag_NotZ) |
| 20684 | { |
| 20685 | res = 0xFF; |
| 20686 | PRE_IO |
| 20687 | WRITE_BYTE_F(adr, res) |
| 20688 | POST_IO |
| 20689 | RET(12) |
| 20690 | } |
| 20691 | res = 0; |
| 20692 | PRE_IO |
| 20693 | WRITE_BYTE_F(adr, res) |
| 20694 | POST_IO |
| 20695 | RET(12) |
| 20696 | } |
| 20697 | |
| 20698 | // STCC |
| 20699 | OPCODE(0x58D8) |
| 20700 | { |
| 20701 | u32 adr, res; |
| 20702 | u32 src, dst; |
| 20703 | |
| 20704 | adr = AREG((Opcode >> 0) & 7); |
| 20705 | AREG((Opcode >> 0) & 7) += 1; |
| 20706 | if (!(flag_V & 0x80)) |
| 20707 | { |
| 20708 | res = 0xFF; |
| 20709 | PRE_IO |
| 20710 | WRITE_BYTE_F(adr, res) |
| 20711 | POST_IO |
| 20712 | RET(12) |
| 20713 | } |
| 20714 | res = 0; |
| 20715 | PRE_IO |
| 20716 | WRITE_BYTE_F(adr, res) |
| 20717 | POST_IO |
| 20718 | RET(12) |
| 20719 | } |
| 20720 | |
| 20721 | // STCC |
| 20722 | OPCODE(0x59D8) |
| 20723 | { |
| 20724 | u32 adr, res; |
| 20725 | u32 src, dst; |
| 20726 | |
| 20727 | adr = AREG((Opcode >> 0) & 7); |
| 20728 | AREG((Opcode >> 0) & 7) += 1; |
| 20729 | if (flag_V & 0x80) |
| 20730 | { |
| 20731 | res = 0xFF; |
| 20732 | PRE_IO |
| 20733 | WRITE_BYTE_F(adr, res) |
| 20734 | POST_IO |
| 20735 | RET(12) |
| 20736 | } |
| 20737 | res = 0; |
| 20738 | PRE_IO |
| 20739 | WRITE_BYTE_F(adr, res) |
| 20740 | POST_IO |
| 20741 | RET(12) |
| 20742 | } |
| 20743 | |
| 20744 | // STCC |
| 20745 | OPCODE(0x5AD8) |
| 20746 | { |
| 20747 | u32 adr, res; |
| 20748 | u32 src, dst; |
| 20749 | |
| 20750 | adr = AREG((Opcode >> 0) & 7); |
| 20751 | AREG((Opcode >> 0) & 7) += 1; |
| 20752 | if (!(flag_N & 0x80)) |
| 20753 | { |
| 20754 | res = 0xFF; |
| 20755 | PRE_IO |
| 20756 | WRITE_BYTE_F(adr, res) |
| 20757 | POST_IO |
| 20758 | RET(12) |
| 20759 | } |
| 20760 | res = 0; |
| 20761 | PRE_IO |
| 20762 | WRITE_BYTE_F(adr, res) |
| 20763 | POST_IO |
| 20764 | RET(12) |
| 20765 | } |
| 20766 | |
| 20767 | // STCC |
| 20768 | OPCODE(0x5BD8) |
| 20769 | { |
| 20770 | u32 adr, res; |
| 20771 | u32 src, dst; |
| 20772 | |
| 20773 | adr = AREG((Opcode >> 0) & 7); |
| 20774 | AREG((Opcode >> 0) & 7) += 1; |
| 20775 | if (flag_N & 0x80) |
| 20776 | { |
| 20777 | res = 0xFF; |
| 20778 | PRE_IO |
| 20779 | WRITE_BYTE_F(adr, res) |
| 20780 | POST_IO |
| 20781 | RET(12) |
| 20782 | } |
| 20783 | res = 0; |
| 20784 | PRE_IO |
| 20785 | WRITE_BYTE_F(adr, res) |
| 20786 | POST_IO |
| 20787 | RET(12) |
| 20788 | } |
| 20789 | |
| 20790 | // STCC |
| 20791 | OPCODE(0x5CD8) |
| 20792 | { |
| 20793 | u32 adr, res; |
| 20794 | u32 src, dst; |
| 20795 | |
| 20796 | adr = AREG((Opcode >> 0) & 7); |
| 20797 | AREG((Opcode >> 0) & 7) += 1; |
| 20798 | if (!((flag_N ^ flag_V) & 0x80)) |
| 20799 | { |
| 20800 | res = 0xFF; |
| 20801 | PRE_IO |
| 20802 | WRITE_BYTE_F(adr, res) |
| 20803 | POST_IO |
| 20804 | RET(12) |
| 20805 | } |
| 20806 | res = 0; |
| 20807 | PRE_IO |
| 20808 | WRITE_BYTE_F(adr, res) |
| 20809 | POST_IO |
| 20810 | RET(12) |
| 20811 | } |
| 20812 | |
| 20813 | // STCC |
| 20814 | OPCODE(0x5DD8) |
| 20815 | { |
| 20816 | u32 adr, res; |
| 20817 | u32 src, dst; |
| 20818 | |
| 20819 | adr = AREG((Opcode >> 0) & 7); |
| 20820 | AREG((Opcode >> 0) & 7) += 1; |
| 20821 | if ((flag_N ^ flag_V) & 0x80) |
| 20822 | { |
| 20823 | res = 0xFF; |
| 20824 | PRE_IO |
| 20825 | WRITE_BYTE_F(adr, res) |
| 20826 | POST_IO |
| 20827 | RET(12) |
| 20828 | } |
| 20829 | res = 0; |
| 20830 | PRE_IO |
| 20831 | WRITE_BYTE_F(adr, res) |
| 20832 | POST_IO |
| 20833 | RET(12) |
| 20834 | } |
| 20835 | |
| 20836 | // STCC |
| 20837 | OPCODE(0x5ED8) |
| 20838 | { |
| 20839 | u32 adr, res; |
| 20840 | u32 src, dst; |
| 20841 | |
| 20842 | adr = AREG((Opcode >> 0) & 7); |
| 20843 | AREG((Opcode >> 0) & 7) += 1; |
| 20844 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 20845 | { |
| 20846 | res = 0xFF; |
| 20847 | PRE_IO |
| 20848 | WRITE_BYTE_F(adr, res) |
| 20849 | POST_IO |
| 20850 | RET(12) |
| 20851 | } |
| 20852 | res = 0; |
| 20853 | PRE_IO |
| 20854 | WRITE_BYTE_F(adr, res) |
| 20855 | POST_IO |
| 20856 | RET(12) |
| 20857 | } |
| 20858 | |
| 20859 | // STCC |
| 20860 | OPCODE(0x5FD8) |
| 20861 | { |
| 20862 | u32 adr, res; |
| 20863 | u32 src, dst; |
| 20864 | |
| 20865 | adr = AREG((Opcode >> 0) & 7); |
| 20866 | AREG((Opcode >> 0) & 7) += 1; |
| 20867 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 20868 | { |
| 20869 | res = 0xFF; |
| 20870 | PRE_IO |
| 20871 | WRITE_BYTE_F(adr, res) |
| 20872 | POST_IO |
| 20873 | RET(12) |
| 20874 | } |
| 20875 | res = 0; |
| 20876 | PRE_IO |
| 20877 | WRITE_BYTE_F(adr, res) |
| 20878 | POST_IO |
| 20879 | RET(12) |
| 20880 | } |
| 20881 | |
| 20882 | // STCC |
| 20883 | OPCODE(0x50E0) |
| 20884 | { |
| 20885 | u32 adr, res; |
| 20886 | u32 src, dst; |
| 20887 | |
| 20888 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 20889 | AREG((Opcode >> 0) & 7) = adr; |
| 20890 | res = 0xFF; |
| 20891 | PRE_IO |
| 20892 | WRITE_BYTE_F(adr, res) |
| 20893 | POST_IO |
| 20894 | RET(14) |
| 20895 | } |
| 20896 | |
| 20897 | // STCC |
| 20898 | OPCODE(0x51E0) |
| 20899 | { |
| 20900 | u32 adr, res; |
| 20901 | u32 src, dst; |
| 20902 | |
| 20903 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 20904 | AREG((Opcode >> 0) & 7) = adr; |
| 20905 | res = 0; |
| 20906 | PRE_IO |
| 20907 | WRITE_BYTE_F(adr, res) |
| 20908 | POST_IO |
| 20909 | RET(14) |
| 20910 | } |
| 20911 | |
| 20912 | // STCC |
| 20913 | OPCODE(0x52E0) |
| 20914 | { |
| 20915 | u32 adr, res; |
| 20916 | u32 src, dst; |
| 20917 | |
| 20918 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 20919 | AREG((Opcode >> 0) & 7) = adr; |
| 20920 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 20921 | { |
| 20922 | res = 0xFF; |
| 20923 | PRE_IO |
| 20924 | WRITE_BYTE_F(adr, res) |
| 20925 | POST_IO |
| 20926 | RET(14) |
| 20927 | } |
| 20928 | res = 0; |
| 20929 | PRE_IO |
| 20930 | WRITE_BYTE_F(adr, res) |
| 20931 | POST_IO |
| 20932 | RET(14) |
| 20933 | } |
| 20934 | |
| 20935 | // STCC |
| 20936 | OPCODE(0x53E0) |
| 20937 | { |
| 20938 | u32 adr, res; |
| 20939 | u32 src, dst; |
| 20940 | |
| 20941 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 20942 | AREG((Opcode >> 0) & 7) = adr; |
| 20943 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 20944 | { |
| 20945 | res = 0xFF; |
| 20946 | PRE_IO |
| 20947 | WRITE_BYTE_F(adr, res) |
| 20948 | POST_IO |
| 20949 | RET(14) |
| 20950 | } |
| 20951 | res = 0; |
| 20952 | PRE_IO |
| 20953 | WRITE_BYTE_F(adr, res) |
| 20954 | POST_IO |
| 20955 | RET(14) |
| 20956 | } |
| 20957 | |
| 20958 | // STCC |
| 20959 | OPCODE(0x54E0) |
| 20960 | { |
| 20961 | u32 adr, res; |
| 20962 | u32 src, dst; |
| 20963 | |
| 20964 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 20965 | AREG((Opcode >> 0) & 7) = adr; |
| 20966 | if (!(flag_C & 0x100)) |
| 20967 | { |
| 20968 | res = 0xFF; |
| 20969 | PRE_IO |
| 20970 | WRITE_BYTE_F(adr, res) |
| 20971 | POST_IO |
| 20972 | RET(14) |
| 20973 | } |
| 20974 | res = 0; |
| 20975 | PRE_IO |
| 20976 | WRITE_BYTE_F(adr, res) |
| 20977 | POST_IO |
| 20978 | RET(14) |
| 20979 | } |
| 20980 | |
| 20981 | // STCC |
| 20982 | OPCODE(0x55E0) |
| 20983 | { |
| 20984 | u32 adr, res; |
| 20985 | u32 src, dst; |
| 20986 | |
| 20987 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 20988 | AREG((Opcode >> 0) & 7) = adr; |
| 20989 | if (flag_C & 0x100) |
| 20990 | { |
| 20991 | res = 0xFF; |
| 20992 | PRE_IO |
| 20993 | WRITE_BYTE_F(adr, res) |
| 20994 | POST_IO |
| 20995 | RET(14) |
| 20996 | } |
| 20997 | res = 0; |
| 20998 | PRE_IO |
| 20999 | WRITE_BYTE_F(adr, res) |
| 21000 | POST_IO |
| 21001 | RET(14) |
| 21002 | } |
| 21003 | |
| 21004 | // STCC |
| 21005 | OPCODE(0x56E0) |
| 21006 | { |
| 21007 | u32 adr, res; |
| 21008 | u32 src, dst; |
| 21009 | |
| 21010 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21011 | AREG((Opcode >> 0) & 7) = adr; |
| 21012 | if (flag_NotZ) |
| 21013 | { |
| 21014 | res = 0xFF; |
| 21015 | PRE_IO |
| 21016 | WRITE_BYTE_F(adr, res) |
| 21017 | POST_IO |
| 21018 | RET(14) |
| 21019 | } |
| 21020 | res = 0; |
| 21021 | PRE_IO |
| 21022 | WRITE_BYTE_F(adr, res) |
| 21023 | POST_IO |
| 21024 | RET(14) |
| 21025 | } |
| 21026 | |
| 21027 | // STCC |
| 21028 | OPCODE(0x57E0) |
| 21029 | { |
| 21030 | u32 adr, res; |
| 21031 | u32 src, dst; |
| 21032 | |
| 21033 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21034 | AREG((Opcode >> 0) & 7) = adr; |
| 21035 | if (!flag_NotZ) |
| 21036 | { |
| 21037 | res = 0xFF; |
| 21038 | PRE_IO |
| 21039 | WRITE_BYTE_F(adr, res) |
| 21040 | POST_IO |
| 21041 | RET(14) |
| 21042 | } |
| 21043 | res = 0; |
| 21044 | PRE_IO |
| 21045 | WRITE_BYTE_F(adr, res) |
| 21046 | POST_IO |
| 21047 | RET(14) |
| 21048 | } |
| 21049 | |
| 21050 | // STCC |
| 21051 | OPCODE(0x58E0) |
| 21052 | { |
| 21053 | u32 adr, res; |
| 21054 | u32 src, dst; |
| 21055 | |
| 21056 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21057 | AREG((Opcode >> 0) & 7) = adr; |
| 21058 | if (!(flag_V & 0x80)) |
| 21059 | { |
| 21060 | res = 0xFF; |
| 21061 | PRE_IO |
| 21062 | WRITE_BYTE_F(adr, res) |
| 21063 | POST_IO |
| 21064 | RET(14) |
| 21065 | } |
| 21066 | res = 0; |
| 21067 | PRE_IO |
| 21068 | WRITE_BYTE_F(adr, res) |
| 21069 | POST_IO |
| 21070 | RET(14) |
| 21071 | } |
| 21072 | |
| 21073 | // STCC |
| 21074 | OPCODE(0x59E0) |
| 21075 | { |
| 21076 | u32 adr, res; |
| 21077 | u32 src, dst; |
| 21078 | |
| 21079 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21080 | AREG((Opcode >> 0) & 7) = adr; |
| 21081 | if (flag_V & 0x80) |
| 21082 | { |
| 21083 | res = 0xFF; |
| 21084 | PRE_IO |
| 21085 | WRITE_BYTE_F(adr, res) |
| 21086 | POST_IO |
| 21087 | RET(14) |
| 21088 | } |
| 21089 | res = 0; |
| 21090 | PRE_IO |
| 21091 | WRITE_BYTE_F(adr, res) |
| 21092 | POST_IO |
| 21093 | RET(14) |
| 21094 | } |
| 21095 | |
| 21096 | // STCC |
| 21097 | OPCODE(0x5AE0) |
| 21098 | { |
| 21099 | u32 adr, res; |
| 21100 | u32 src, dst; |
| 21101 | |
| 21102 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21103 | AREG((Opcode >> 0) & 7) = adr; |
| 21104 | if (!(flag_N & 0x80)) |
| 21105 | { |
| 21106 | res = 0xFF; |
| 21107 | PRE_IO |
| 21108 | WRITE_BYTE_F(adr, res) |
| 21109 | POST_IO |
| 21110 | RET(14) |
| 21111 | } |
| 21112 | res = 0; |
| 21113 | PRE_IO |
| 21114 | WRITE_BYTE_F(adr, res) |
| 21115 | POST_IO |
| 21116 | RET(14) |
| 21117 | } |
| 21118 | |
| 21119 | // STCC |
| 21120 | OPCODE(0x5BE0) |
| 21121 | { |
| 21122 | u32 adr, res; |
| 21123 | u32 src, dst; |
| 21124 | |
| 21125 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21126 | AREG((Opcode >> 0) & 7) = adr; |
| 21127 | if (flag_N & 0x80) |
| 21128 | { |
| 21129 | res = 0xFF; |
| 21130 | PRE_IO |
| 21131 | WRITE_BYTE_F(adr, res) |
| 21132 | POST_IO |
| 21133 | RET(14) |
| 21134 | } |
| 21135 | res = 0; |
| 21136 | PRE_IO |
| 21137 | WRITE_BYTE_F(adr, res) |
| 21138 | POST_IO |
| 21139 | RET(14) |
| 21140 | } |
| 21141 | |
| 21142 | // STCC |
| 21143 | OPCODE(0x5CE0) |
| 21144 | { |
| 21145 | u32 adr, res; |
| 21146 | u32 src, dst; |
| 21147 | |
| 21148 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21149 | AREG((Opcode >> 0) & 7) = adr; |
| 21150 | if (!((flag_N ^ flag_V) & 0x80)) |
| 21151 | { |
| 21152 | res = 0xFF; |
| 21153 | PRE_IO |
| 21154 | WRITE_BYTE_F(adr, res) |
| 21155 | POST_IO |
| 21156 | RET(14) |
| 21157 | } |
| 21158 | res = 0; |
| 21159 | PRE_IO |
| 21160 | WRITE_BYTE_F(adr, res) |
| 21161 | POST_IO |
| 21162 | RET(14) |
| 21163 | } |
| 21164 | |
| 21165 | // STCC |
| 21166 | OPCODE(0x5DE0) |
| 21167 | { |
| 21168 | u32 adr, res; |
| 21169 | u32 src, dst; |
| 21170 | |
| 21171 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21172 | AREG((Opcode >> 0) & 7) = adr; |
| 21173 | if ((flag_N ^ flag_V) & 0x80) |
| 21174 | { |
| 21175 | res = 0xFF; |
| 21176 | PRE_IO |
| 21177 | WRITE_BYTE_F(adr, res) |
| 21178 | POST_IO |
| 21179 | RET(14) |
| 21180 | } |
| 21181 | res = 0; |
| 21182 | PRE_IO |
| 21183 | WRITE_BYTE_F(adr, res) |
| 21184 | POST_IO |
| 21185 | RET(14) |
| 21186 | } |
| 21187 | |
| 21188 | // STCC |
| 21189 | OPCODE(0x5EE0) |
| 21190 | { |
| 21191 | u32 adr, res; |
| 21192 | u32 src, dst; |
| 21193 | |
| 21194 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21195 | AREG((Opcode >> 0) & 7) = adr; |
| 21196 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 21197 | { |
| 21198 | res = 0xFF; |
| 21199 | PRE_IO |
| 21200 | WRITE_BYTE_F(adr, res) |
| 21201 | POST_IO |
| 21202 | RET(14) |
| 21203 | } |
| 21204 | res = 0; |
| 21205 | PRE_IO |
| 21206 | WRITE_BYTE_F(adr, res) |
| 21207 | POST_IO |
| 21208 | RET(14) |
| 21209 | } |
| 21210 | |
| 21211 | // STCC |
| 21212 | OPCODE(0x5FE0) |
| 21213 | { |
| 21214 | u32 adr, res; |
| 21215 | u32 src, dst; |
| 21216 | |
| 21217 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 21218 | AREG((Opcode >> 0) & 7) = adr; |
| 21219 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 21220 | { |
| 21221 | res = 0xFF; |
| 21222 | PRE_IO |
| 21223 | WRITE_BYTE_F(adr, res) |
| 21224 | POST_IO |
| 21225 | RET(14) |
| 21226 | } |
| 21227 | res = 0; |
| 21228 | PRE_IO |
| 21229 | WRITE_BYTE_F(adr, res) |
| 21230 | POST_IO |
| 21231 | RET(14) |
| 21232 | } |
| 21233 | |
| 21234 | // STCC |
| 21235 | OPCODE(0x50E8) |
| 21236 | { |
| 21237 | u32 adr, res; |
| 21238 | u32 src, dst; |
| 21239 | |
| 21240 | FETCH_SWORD(adr); |
| 21241 | adr += AREG((Opcode >> 0) & 7); |
| 21242 | res = 0xFF; |
| 21243 | PRE_IO |
| 21244 | WRITE_BYTE_F(adr, res) |
| 21245 | POST_IO |
| 21246 | RET(16) |
| 21247 | } |
| 21248 | |
| 21249 | // STCC |
| 21250 | OPCODE(0x51E8) |
| 21251 | { |
| 21252 | u32 adr, res; |
| 21253 | u32 src, dst; |
| 21254 | |
| 21255 | FETCH_SWORD(adr); |
| 21256 | adr += AREG((Opcode >> 0) & 7); |
| 21257 | res = 0; |
| 21258 | PRE_IO |
| 21259 | WRITE_BYTE_F(adr, res) |
| 21260 | POST_IO |
| 21261 | RET(16) |
| 21262 | } |
| 21263 | |
| 21264 | // STCC |
| 21265 | OPCODE(0x52E8) |
| 21266 | { |
| 21267 | u32 adr, res; |
| 21268 | u32 src, dst; |
| 21269 | |
| 21270 | FETCH_SWORD(adr); |
| 21271 | adr += AREG((Opcode >> 0) & 7); |
| 21272 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 21273 | { |
| 21274 | res = 0xFF; |
| 21275 | PRE_IO |
| 21276 | WRITE_BYTE_F(adr, res) |
| 21277 | POST_IO |
| 21278 | RET(16) |
| 21279 | } |
| 21280 | res = 0; |
| 21281 | PRE_IO |
| 21282 | WRITE_BYTE_F(adr, res) |
| 21283 | POST_IO |
| 21284 | RET(16) |
| 21285 | } |
| 21286 | |
| 21287 | // STCC |
| 21288 | OPCODE(0x53E8) |
| 21289 | { |
| 21290 | u32 adr, res; |
| 21291 | u32 src, dst; |
| 21292 | |
| 21293 | FETCH_SWORD(adr); |
| 21294 | adr += AREG((Opcode >> 0) & 7); |
| 21295 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 21296 | { |
| 21297 | res = 0xFF; |
| 21298 | PRE_IO |
| 21299 | WRITE_BYTE_F(adr, res) |
| 21300 | POST_IO |
| 21301 | RET(16) |
| 21302 | } |
| 21303 | res = 0; |
| 21304 | PRE_IO |
| 21305 | WRITE_BYTE_F(adr, res) |
| 21306 | POST_IO |
| 21307 | RET(16) |
| 21308 | } |
| 21309 | |
| 21310 | // STCC |
| 21311 | OPCODE(0x54E8) |
| 21312 | { |
| 21313 | u32 adr, res; |
| 21314 | u32 src, dst; |
| 21315 | |
| 21316 | FETCH_SWORD(adr); |
| 21317 | adr += AREG((Opcode >> 0) & 7); |
| 21318 | if (!(flag_C & 0x100)) |
| 21319 | { |
| 21320 | res = 0xFF; |
| 21321 | PRE_IO |
| 21322 | WRITE_BYTE_F(adr, res) |
| 21323 | POST_IO |
| 21324 | RET(16) |
| 21325 | } |
| 21326 | res = 0; |
| 21327 | PRE_IO |
| 21328 | WRITE_BYTE_F(adr, res) |
| 21329 | POST_IO |
| 21330 | RET(16) |
| 21331 | } |
| 21332 | |
| 21333 | // STCC |
| 21334 | OPCODE(0x55E8) |
| 21335 | { |
| 21336 | u32 adr, res; |
| 21337 | u32 src, dst; |
| 21338 | |
| 21339 | FETCH_SWORD(adr); |
| 21340 | adr += AREG((Opcode >> 0) & 7); |
| 21341 | if (flag_C & 0x100) |
| 21342 | { |
| 21343 | res = 0xFF; |
| 21344 | PRE_IO |
| 21345 | WRITE_BYTE_F(adr, res) |
| 21346 | POST_IO |
| 21347 | RET(16) |
| 21348 | } |
| 21349 | res = 0; |
| 21350 | PRE_IO |
| 21351 | WRITE_BYTE_F(adr, res) |
| 21352 | POST_IO |
| 21353 | RET(16) |
| 21354 | } |
| 21355 | |
| 21356 | // STCC |
| 21357 | OPCODE(0x56E8) |
| 21358 | { |
| 21359 | u32 adr, res; |
| 21360 | u32 src, dst; |
| 21361 | |
| 21362 | FETCH_SWORD(adr); |
| 21363 | adr += AREG((Opcode >> 0) & 7); |
| 21364 | if (flag_NotZ) |
| 21365 | { |
| 21366 | res = 0xFF; |
| 21367 | PRE_IO |
| 21368 | WRITE_BYTE_F(adr, res) |
| 21369 | POST_IO |
| 21370 | RET(16) |
| 21371 | } |
| 21372 | res = 0; |
| 21373 | PRE_IO |
| 21374 | WRITE_BYTE_F(adr, res) |
| 21375 | POST_IO |
| 21376 | RET(16) |
| 21377 | } |
| 21378 | |
| 21379 | // STCC |
| 21380 | OPCODE(0x57E8) |
| 21381 | { |
| 21382 | u32 adr, res; |
| 21383 | u32 src, dst; |
| 21384 | |
| 21385 | FETCH_SWORD(adr); |
| 21386 | adr += AREG((Opcode >> 0) & 7); |
| 21387 | if (!flag_NotZ) |
| 21388 | { |
| 21389 | res = 0xFF; |
| 21390 | PRE_IO |
| 21391 | WRITE_BYTE_F(adr, res) |
| 21392 | POST_IO |
| 21393 | RET(16) |
| 21394 | } |
| 21395 | res = 0; |
| 21396 | PRE_IO |
| 21397 | WRITE_BYTE_F(adr, res) |
| 21398 | POST_IO |
| 21399 | RET(16) |
| 21400 | } |
| 21401 | |
| 21402 | // STCC |
| 21403 | OPCODE(0x58E8) |
| 21404 | { |
| 21405 | u32 adr, res; |
| 21406 | u32 src, dst; |
| 21407 | |
| 21408 | FETCH_SWORD(adr); |
| 21409 | adr += AREG((Opcode >> 0) & 7); |
| 21410 | if (!(flag_V & 0x80)) |
| 21411 | { |
| 21412 | res = 0xFF; |
| 21413 | PRE_IO |
| 21414 | WRITE_BYTE_F(adr, res) |
| 21415 | POST_IO |
| 21416 | RET(16) |
| 21417 | } |
| 21418 | res = 0; |
| 21419 | PRE_IO |
| 21420 | WRITE_BYTE_F(adr, res) |
| 21421 | POST_IO |
| 21422 | RET(16) |
| 21423 | } |
| 21424 | |
| 21425 | // STCC |
| 21426 | OPCODE(0x59E8) |
| 21427 | { |
| 21428 | u32 adr, res; |
| 21429 | u32 src, dst; |
| 21430 | |
| 21431 | FETCH_SWORD(adr); |
| 21432 | adr += AREG((Opcode >> 0) & 7); |
| 21433 | if (flag_V & 0x80) |
| 21434 | { |
| 21435 | res = 0xFF; |
| 21436 | PRE_IO |
| 21437 | WRITE_BYTE_F(adr, res) |
| 21438 | POST_IO |
| 21439 | RET(16) |
| 21440 | } |
| 21441 | res = 0; |
| 21442 | PRE_IO |
| 21443 | WRITE_BYTE_F(adr, res) |
| 21444 | POST_IO |
| 21445 | RET(16) |
| 21446 | } |
| 21447 | |
| 21448 | // STCC |
| 21449 | OPCODE(0x5AE8) |
| 21450 | { |
| 21451 | u32 adr, res; |
| 21452 | u32 src, dst; |
| 21453 | |
| 21454 | FETCH_SWORD(adr); |
| 21455 | adr += AREG((Opcode >> 0) & 7); |
| 21456 | if (!(flag_N & 0x80)) |
| 21457 | { |
| 21458 | res = 0xFF; |
| 21459 | PRE_IO |
| 21460 | WRITE_BYTE_F(adr, res) |
| 21461 | POST_IO |
| 21462 | RET(16) |
| 21463 | } |
| 21464 | res = 0; |
| 21465 | PRE_IO |
| 21466 | WRITE_BYTE_F(adr, res) |
| 21467 | POST_IO |
| 21468 | RET(16) |
| 21469 | } |
| 21470 | |
| 21471 | // STCC |
| 21472 | OPCODE(0x5BE8) |
| 21473 | { |
| 21474 | u32 adr, res; |
| 21475 | u32 src, dst; |
| 21476 | |
| 21477 | FETCH_SWORD(adr); |
| 21478 | adr += AREG((Opcode >> 0) & 7); |
| 21479 | if (flag_N & 0x80) |
| 21480 | { |
| 21481 | res = 0xFF; |
| 21482 | PRE_IO |
| 21483 | WRITE_BYTE_F(adr, res) |
| 21484 | POST_IO |
| 21485 | RET(16) |
| 21486 | } |
| 21487 | res = 0; |
| 21488 | PRE_IO |
| 21489 | WRITE_BYTE_F(adr, res) |
| 21490 | POST_IO |
| 21491 | RET(16) |
| 21492 | } |
| 21493 | |
| 21494 | // STCC |
| 21495 | OPCODE(0x5CE8) |
| 21496 | { |
| 21497 | u32 adr, res; |
| 21498 | u32 src, dst; |
| 21499 | |
| 21500 | FETCH_SWORD(adr); |
| 21501 | adr += AREG((Opcode >> 0) & 7); |
| 21502 | if (!((flag_N ^ flag_V) & 0x80)) |
| 21503 | { |
| 21504 | res = 0xFF; |
| 21505 | PRE_IO |
| 21506 | WRITE_BYTE_F(adr, res) |
| 21507 | POST_IO |
| 21508 | RET(16) |
| 21509 | } |
| 21510 | res = 0; |
| 21511 | PRE_IO |
| 21512 | WRITE_BYTE_F(adr, res) |
| 21513 | POST_IO |
| 21514 | RET(16) |
| 21515 | } |
| 21516 | |
| 21517 | // STCC |
| 21518 | OPCODE(0x5DE8) |
| 21519 | { |
| 21520 | u32 adr, res; |
| 21521 | u32 src, dst; |
| 21522 | |
| 21523 | FETCH_SWORD(adr); |
| 21524 | adr += AREG((Opcode >> 0) & 7); |
| 21525 | if ((flag_N ^ flag_V) & 0x80) |
| 21526 | { |
| 21527 | res = 0xFF; |
| 21528 | PRE_IO |
| 21529 | WRITE_BYTE_F(adr, res) |
| 21530 | POST_IO |
| 21531 | RET(16) |
| 21532 | } |
| 21533 | res = 0; |
| 21534 | PRE_IO |
| 21535 | WRITE_BYTE_F(adr, res) |
| 21536 | POST_IO |
| 21537 | RET(16) |
| 21538 | } |
| 21539 | |
| 21540 | // STCC |
| 21541 | OPCODE(0x5EE8) |
| 21542 | { |
| 21543 | u32 adr, res; |
| 21544 | u32 src, dst; |
| 21545 | |
| 21546 | FETCH_SWORD(adr); |
| 21547 | adr += AREG((Opcode >> 0) & 7); |
| 21548 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 21549 | { |
| 21550 | res = 0xFF; |
| 21551 | PRE_IO |
| 21552 | WRITE_BYTE_F(adr, res) |
| 21553 | POST_IO |
| 21554 | RET(16) |
| 21555 | } |
| 21556 | res = 0; |
| 21557 | PRE_IO |
| 21558 | WRITE_BYTE_F(adr, res) |
| 21559 | POST_IO |
| 21560 | RET(16) |
| 21561 | } |
| 21562 | |
| 21563 | // STCC |
| 21564 | OPCODE(0x5FE8) |
| 21565 | { |
| 21566 | u32 adr, res; |
| 21567 | u32 src, dst; |
| 21568 | |
| 21569 | FETCH_SWORD(adr); |
| 21570 | adr += AREG((Opcode >> 0) & 7); |
| 21571 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 21572 | { |
| 21573 | res = 0xFF; |
| 21574 | PRE_IO |
| 21575 | WRITE_BYTE_F(adr, res) |
| 21576 | POST_IO |
| 21577 | RET(16) |
| 21578 | } |
| 21579 | res = 0; |
| 21580 | PRE_IO |
| 21581 | WRITE_BYTE_F(adr, res) |
| 21582 | POST_IO |
| 21583 | RET(16) |
| 21584 | } |
| 21585 | |
| 21586 | // STCC |
| 21587 | OPCODE(0x50F0) |
| 21588 | { |
| 21589 | u32 adr, res; |
| 21590 | u32 src, dst; |
| 21591 | |
| 21592 | adr = AREG((Opcode >> 0) & 7); |
| 21593 | DECODE_EXT_WORD |
| 21594 | res = 0xFF; |
| 21595 | PRE_IO |
| 21596 | WRITE_BYTE_F(adr, res) |
| 21597 | POST_IO |
| 21598 | RET(18) |
| 21599 | } |
| 21600 | |
| 21601 | // STCC |
| 21602 | OPCODE(0x51F0) |
| 21603 | { |
| 21604 | u32 adr, res; |
| 21605 | u32 src, dst; |
| 21606 | |
| 21607 | adr = AREG((Opcode >> 0) & 7); |
| 21608 | DECODE_EXT_WORD |
| 21609 | res = 0; |
| 21610 | PRE_IO |
| 21611 | WRITE_BYTE_F(adr, res) |
| 21612 | POST_IO |
| 21613 | RET(18) |
| 21614 | } |
| 21615 | |
| 21616 | // STCC |
| 21617 | OPCODE(0x52F0) |
| 21618 | { |
| 21619 | u32 adr, res; |
| 21620 | u32 src, dst; |
| 21621 | |
| 21622 | adr = AREG((Opcode >> 0) & 7); |
| 21623 | DECODE_EXT_WORD |
| 21624 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 21625 | { |
| 21626 | res = 0xFF; |
| 21627 | PRE_IO |
| 21628 | WRITE_BYTE_F(adr, res) |
| 21629 | POST_IO |
| 21630 | RET(18) |
| 21631 | } |
| 21632 | res = 0; |
| 21633 | PRE_IO |
| 21634 | WRITE_BYTE_F(adr, res) |
| 21635 | POST_IO |
| 21636 | RET(18) |
| 21637 | } |
| 21638 | |
| 21639 | // STCC |
| 21640 | OPCODE(0x53F0) |
| 21641 | { |
| 21642 | u32 adr, res; |
| 21643 | u32 src, dst; |
| 21644 | |
| 21645 | adr = AREG((Opcode >> 0) & 7); |
| 21646 | DECODE_EXT_WORD |
| 21647 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 21648 | { |
| 21649 | res = 0xFF; |
| 21650 | PRE_IO |
| 21651 | WRITE_BYTE_F(adr, res) |
| 21652 | POST_IO |
| 21653 | RET(18) |
| 21654 | } |
| 21655 | res = 0; |
| 21656 | PRE_IO |
| 21657 | WRITE_BYTE_F(adr, res) |
| 21658 | POST_IO |
| 21659 | RET(18) |
| 21660 | } |
| 21661 | |
| 21662 | // STCC |
| 21663 | OPCODE(0x54F0) |
| 21664 | { |
| 21665 | u32 adr, res; |
| 21666 | u32 src, dst; |
| 21667 | |
| 21668 | adr = AREG((Opcode >> 0) & 7); |
| 21669 | DECODE_EXT_WORD |
| 21670 | if (!(flag_C & 0x100)) |
| 21671 | { |
| 21672 | res = 0xFF; |
| 21673 | PRE_IO |
| 21674 | WRITE_BYTE_F(adr, res) |
| 21675 | POST_IO |
| 21676 | RET(18) |
| 21677 | } |
| 21678 | res = 0; |
| 21679 | PRE_IO |
| 21680 | WRITE_BYTE_F(adr, res) |
| 21681 | POST_IO |
| 21682 | RET(18) |
| 21683 | } |
| 21684 | |
| 21685 | // STCC |
| 21686 | OPCODE(0x55F0) |
| 21687 | { |
| 21688 | u32 adr, res; |
| 21689 | u32 src, dst; |
| 21690 | |
| 21691 | adr = AREG((Opcode >> 0) & 7); |
| 21692 | DECODE_EXT_WORD |
| 21693 | if (flag_C & 0x100) |
| 21694 | { |
| 21695 | res = 0xFF; |
| 21696 | PRE_IO |
| 21697 | WRITE_BYTE_F(adr, res) |
| 21698 | POST_IO |
| 21699 | RET(18) |
| 21700 | } |
| 21701 | res = 0; |
| 21702 | PRE_IO |
| 21703 | WRITE_BYTE_F(adr, res) |
| 21704 | POST_IO |
| 21705 | RET(18) |
| 21706 | } |
| 21707 | |
| 21708 | // STCC |
| 21709 | OPCODE(0x56F0) |
| 21710 | { |
| 21711 | u32 adr, res; |
| 21712 | u32 src, dst; |
| 21713 | |
| 21714 | adr = AREG((Opcode >> 0) & 7); |
| 21715 | DECODE_EXT_WORD |
| 21716 | if (flag_NotZ) |
| 21717 | { |
| 21718 | res = 0xFF; |
| 21719 | PRE_IO |
| 21720 | WRITE_BYTE_F(adr, res) |
| 21721 | POST_IO |
| 21722 | RET(18) |
| 21723 | } |
| 21724 | res = 0; |
| 21725 | PRE_IO |
| 21726 | WRITE_BYTE_F(adr, res) |
| 21727 | POST_IO |
| 21728 | RET(18) |
| 21729 | } |
| 21730 | |
| 21731 | // STCC |
| 21732 | OPCODE(0x57F0) |
| 21733 | { |
| 21734 | u32 adr, res; |
| 21735 | u32 src, dst; |
| 21736 | |
| 21737 | adr = AREG((Opcode >> 0) & 7); |
| 21738 | DECODE_EXT_WORD |
| 21739 | if (!flag_NotZ) |
| 21740 | { |
| 21741 | res = 0xFF; |
| 21742 | PRE_IO |
| 21743 | WRITE_BYTE_F(adr, res) |
| 21744 | POST_IO |
| 21745 | RET(18) |
| 21746 | } |
| 21747 | res = 0; |
| 21748 | PRE_IO |
| 21749 | WRITE_BYTE_F(adr, res) |
| 21750 | POST_IO |
| 21751 | RET(18) |
| 21752 | } |
| 21753 | |
| 21754 | // STCC |
| 21755 | OPCODE(0x58F0) |
| 21756 | { |
| 21757 | u32 adr, res; |
| 21758 | u32 src, dst; |
| 21759 | |
| 21760 | adr = AREG((Opcode >> 0) & 7); |
| 21761 | DECODE_EXT_WORD |
| 21762 | if (!(flag_V & 0x80)) |
| 21763 | { |
| 21764 | res = 0xFF; |
| 21765 | PRE_IO |
| 21766 | WRITE_BYTE_F(adr, res) |
| 21767 | POST_IO |
| 21768 | RET(18) |
| 21769 | } |
| 21770 | res = 0; |
| 21771 | PRE_IO |
| 21772 | WRITE_BYTE_F(adr, res) |
| 21773 | POST_IO |
| 21774 | RET(18) |
| 21775 | } |
| 21776 | |
| 21777 | // STCC |
| 21778 | OPCODE(0x59F0) |
| 21779 | { |
| 21780 | u32 adr, res; |
| 21781 | u32 src, dst; |
| 21782 | |
| 21783 | adr = AREG((Opcode >> 0) & 7); |
| 21784 | DECODE_EXT_WORD |
| 21785 | if (flag_V & 0x80) |
| 21786 | { |
| 21787 | res = 0xFF; |
| 21788 | PRE_IO |
| 21789 | WRITE_BYTE_F(adr, res) |
| 21790 | POST_IO |
| 21791 | RET(18) |
| 21792 | } |
| 21793 | res = 0; |
| 21794 | PRE_IO |
| 21795 | WRITE_BYTE_F(adr, res) |
| 21796 | POST_IO |
| 21797 | RET(18) |
| 21798 | } |
| 21799 | |
| 21800 | // STCC |
| 21801 | OPCODE(0x5AF0) |
| 21802 | { |
| 21803 | u32 adr, res; |
| 21804 | u32 src, dst; |
| 21805 | |
| 21806 | adr = AREG((Opcode >> 0) & 7); |
| 21807 | DECODE_EXT_WORD |
| 21808 | if (!(flag_N & 0x80)) |
| 21809 | { |
| 21810 | res = 0xFF; |
| 21811 | PRE_IO |
| 21812 | WRITE_BYTE_F(adr, res) |
| 21813 | POST_IO |
| 21814 | RET(18) |
| 21815 | } |
| 21816 | res = 0; |
| 21817 | PRE_IO |
| 21818 | WRITE_BYTE_F(adr, res) |
| 21819 | POST_IO |
| 21820 | RET(18) |
| 21821 | } |
| 21822 | |
| 21823 | // STCC |
| 21824 | OPCODE(0x5BF0) |
| 21825 | { |
| 21826 | u32 adr, res; |
| 21827 | u32 src, dst; |
| 21828 | |
| 21829 | adr = AREG((Opcode >> 0) & 7); |
| 21830 | DECODE_EXT_WORD |
| 21831 | if (flag_N & 0x80) |
| 21832 | { |
| 21833 | res = 0xFF; |
| 21834 | PRE_IO |
| 21835 | WRITE_BYTE_F(adr, res) |
| 21836 | POST_IO |
| 21837 | RET(18) |
| 21838 | } |
| 21839 | res = 0; |
| 21840 | PRE_IO |
| 21841 | WRITE_BYTE_F(adr, res) |
| 21842 | POST_IO |
| 21843 | RET(18) |
| 21844 | } |
| 21845 | |
| 21846 | // STCC |
| 21847 | OPCODE(0x5CF0) |
| 21848 | { |
| 21849 | u32 adr, res; |
| 21850 | u32 src, dst; |
| 21851 | |
| 21852 | adr = AREG((Opcode >> 0) & 7); |
| 21853 | DECODE_EXT_WORD |
| 21854 | if (!((flag_N ^ flag_V) & 0x80)) |
| 21855 | { |
| 21856 | res = 0xFF; |
| 21857 | PRE_IO |
| 21858 | WRITE_BYTE_F(adr, res) |
| 21859 | POST_IO |
| 21860 | RET(18) |
| 21861 | } |
| 21862 | res = 0; |
| 21863 | PRE_IO |
| 21864 | WRITE_BYTE_F(adr, res) |
| 21865 | POST_IO |
| 21866 | RET(18) |
| 21867 | } |
| 21868 | |
| 21869 | // STCC |
| 21870 | OPCODE(0x5DF0) |
| 21871 | { |
| 21872 | u32 adr, res; |
| 21873 | u32 src, dst; |
| 21874 | |
| 21875 | adr = AREG((Opcode >> 0) & 7); |
| 21876 | DECODE_EXT_WORD |
| 21877 | if ((flag_N ^ flag_V) & 0x80) |
| 21878 | { |
| 21879 | res = 0xFF; |
| 21880 | PRE_IO |
| 21881 | WRITE_BYTE_F(adr, res) |
| 21882 | POST_IO |
| 21883 | RET(18) |
| 21884 | } |
| 21885 | res = 0; |
| 21886 | PRE_IO |
| 21887 | WRITE_BYTE_F(adr, res) |
| 21888 | POST_IO |
| 21889 | RET(18) |
| 21890 | } |
| 21891 | |
| 21892 | // STCC |
| 21893 | OPCODE(0x5EF0) |
| 21894 | { |
| 21895 | u32 adr, res; |
| 21896 | u32 src, dst; |
| 21897 | |
| 21898 | adr = AREG((Opcode >> 0) & 7); |
| 21899 | DECODE_EXT_WORD |
| 21900 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 21901 | { |
| 21902 | res = 0xFF; |
| 21903 | PRE_IO |
| 21904 | WRITE_BYTE_F(adr, res) |
| 21905 | POST_IO |
| 21906 | RET(18) |
| 21907 | } |
| 21908 | res = 0; |
| 21909 | PRE_IO |
| 21910 | WRITE_BYTE_F(adr, res) |
| 21911 | POST_IO |
| 21912 | RET(18) |
| 21913 | } |
| 21914 | |
| 21915 | // STCC |
| 21916 | OPCODE(0x5FF0) |
| 21917 | { |
| 21918 | u32 adr, res; |
| 21919 | u32 src, dst; |
| 21920 | |
| 21921 | adr = AREG((Opcode >> 0) & 7); |
| 21922 | DECODE_EXT_WORD |
| 21923 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 21924 | { |
| 21925 | res = 0xFF; |
| 21926 | PRE_IO |
| 21927 | WRITE_BYTE_F(adr, res) |
| 21928 | POST_IO |
| 21929 | RET(18) |
| 21930 | } |
| 21931 | res = 0; |
| 21932 | PRE_IO |
| 21933 | WRITE_BYTE_F(adr, res) |
| 21934 | POST_IO |
| 21935 | RET(18) |
| 21936 | } |
| 21937 | |
| 21938 | // STCC |
| 21939 | OPCODE(0x50F8) |
| 21940 | { |
| 21941 | u32 adr, res; |
| 21942 | u32 src, dst; |
| 21943 | |
| 21944 | FETCH_SWORD(adr); |
| 21945 | res = 0xFF; |
| 21946 | PRE_IO |
| 21947 | WRITE_BYTE_F(adr, res) |
| 21948 | POST_IO |
| 21949 | RET(16) |
| 21950 | } |
| 21951 | |
| 21952 | // STCC |
| 21953 | OPCODE(0x51F8) |
| 21954 | { |
| 21955 | u32 adr, res; |
| 21956 | u32 src, dst; |
| 21957 | |
| 21958 | FETCH_SWORD(adr); |
| 21959 | res = 0; |
| 21960 | PRE_IO |
| 21961 | WRITE_BYTE_F(adr, res) |
| 21962 | POST_IO |
| 21963 | RET(16) |
| 21964 | } |
| 21965 | |
| 21966 | // STCC |
| 21967 | OPCODE(0x52F8) |
| 21968 | { |
| 21969 | u32 adr, res; |
| 21970 | u32 src, dst; |
| 21971 | |
| 21972 | FETCH_SWORD(adr); |
| 21973 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 21974 | { |
| 21975 | res = 0xFF; |
| 21976 | PRE_IO |
| 21977 | WRITE_BYTE_F(adr, res) |
| 21978 | POST_IO |
| 21979 | RET(16) |
| 21980 | } |
| 21981 | res = 0; |
| 21982 | PRE_IO |
| 21983 | WRITE_BYTE_F(adr, res) |
| 21984 | POST_IO |
| 21985 | RET(16) |
| 21986 | } |
| 21987 | |
| 21988 | // STCC |
| 21989 | OPCODE(0x53F8) |
| 21990 | { |
| 21991 | u32 adr, res; |
| 21992 | u32 src, dst; |
| 21993 | |
| 21994 | FETCH_SWORD(adr); |
| 21995 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 21996 | { |
| 21997 | res = 0xFF; |
| 21998 | PRE_IO |
| 21999 | WRITE_BYTE_F(adr, res) |
| 22000 | POST_IO |
| 22001 | RET(16) |
| 22002 | } |
| 22003 | res = 0; |
| 22004 | PRE_IO |
| 22005 | WRITE_BYTE_F(adr, res) |
| 22006 | POST_IO |
| 22007 | RET(16) |
| 22008 | } |
| 22009 | |
| 22010 | // STCC |
| 22011 | OPCODE(0x54F8) |
| 22012 | { |
| 22013 | u32 adr, res; |
| 22014 | u32 src, dst; |
| 22015 | |
| 22016 | FETCH_SWORD(adr); |
| 22017 | if (!(flag_C & 0x100)) |
| 22018 | { |
| 22019 | res = 0xFF; |
| 22020 | PRE_IO |
| 22021 | WRITE_BYTE_F(adr, res) |
| 22022 | POST_IO |
| 22023 | RET(16) |
| 22024 | } |
| 22025 | res = 0; |
| 22026 | PRE_IO |
| 22027 | WRITE_BYTE_F(adr, res) |
| 22028 | POST_IO |
| 22029 | RET(16) |
| 22030 | } |
| 22031 | |
| 22032 | // STCC |
| 22033 | OPCODE(0x55F8) |
| 22034 | { |
| 22035 | u32 adr, res; |
| 22036 | u32 src, dst; |
| 22037 | |
| 22038 | FETCH_SWORD(adr); |
| 22039 | if (flag_C & 0x100) |
| 22040 | { |
| 22041 | res = 0xFF; |
| 22042 | PRE_IO |
| 22043 | WRITE_BYTE_F(adr, res) |
| 22044 | POST_IO |
| 22045 | RET(16) |
| 22046 | } |
| 22047 | res = 0; |
| 22048 | PRE_IO |
| 22049 | WRITE_BYTE_F(adr, res) |
| 22050 | POST_IO |
| 22051 | RET(16) |
| 22052 | } |
| 22053 | |
| 22054 | // STCC |
| 22055 | OPCODE(0x56F8) |
| 22056 | { |
| 22057 | u32 adr, res; |
| 22058 | u32 src, dst; |
| 22059 | |
| 22060 | FETCH_SWORD(adr); |
| 22061 | if (flag_NotZ) |
| 22062 | { |
| 22063 | res = 0xFF; |
| 22064 | PRE_IO |
| 22065 | WRITE_BYTE_F(adr, res) |
| 22066 | POST_IO |
| 22067 | RET(16) |
| 22068 | } |
| 22069 | res = 0; |
| 22070 | PRE_IO |
| 22071 | WRITE_BYTE_F(adr, res) |
| 22072 | POST_IO |
| 22073 | RET(16) |
| 22074 | } |
| 22075 | |
| 22076 | // STCC |
| 22077 | OPCODE(0x57F8) |
| 22078 | { |
| 22079 | u32 adr, res; |
| 22080 | u32 src, dst; |
| 22081 | |
| 22082 | FETCH_SWORD(adr); |
| 22083 | if (!flag_NotZ) |
| 22084 | { |
| 22085 | res = 0xFF; |
| 22086 | PRE_IO |
| 22087 | WRITE_BYTE_F(adr, res) |
| 22088 | POST_IO |
| 22089 | RET(16) |
| 22090 | } |
| 22091 | res = 0; |
| 22092 | PRE_IO |
| 22093 | WRITE_BYTE_F(adr, res) |
| 22094 | POST_IO |
| 22095 | RET(16) |
| 22096 | } |
| 22097 | |
| 22098 | // STCC |
| 22099 | OPCODE(0x58F8) |
| 22100 | { |
| 22101 | u32 adr, res; |
| 22102 | u32 src, dst; |
| 22103 | |
| 22104 | FETCH_SWORD(adr); |
| 22105 | if (!(flag_V & 0x80)) |
| 22106 | { |
| 22107 | res = 0xFF; |
| 22108 | PRE_IO |
| 22109 | WRITE_BYTE_F(adr, res) |
| 22110 | POST_IO |
| 22111 | RET(16) |
| 22112 | } |
| 22113 | res = 0; |
| 22114 | PRE_IO |
| 22115 | WRITE_BYTE_F(adr, res) |
| 22116 | POST_IO |
| 22117 | RET(16) |
| 22118 | } |
| 22119 | |
| 22120 | // STCC |
| 22121 | OPCODE(0x59F8) |
| 22122 | { |
| 22123 | u32 adr, res; |
| 22124 | u32 src, dst; |
| 22125 | |
| 22126 | FETCH_SWORD(adr); |
| 22127 | if (flag_V & 0x80) |
| 22128 | { |
| 22129 | res = 0xFF; |
| 22130 | PRE_IO |
| 22131 | WRITE_BYTE_F(adr, res) |
| 22132 | POST_IO |
| 22133 | RET(16) |
| 22134 | } |
| 22135 | res = 0; |
| 22136 | PRE_IO |
| 22137 | WRITE_BYTE_F(adr, res) |
| 22138 | POST_IO |
| 22139 | RET(16) |
| 22140 | } |
| 22141 | |
| 22142 | // STCC |
| 22143 | OPCODE(0x5AF8) |
| 22144 | { |
| 22145 | u32 adr, res; |
| 22146 | u32 src, dst; |
| 22147 | |
| 22148 | FETCH_SWORD(adr); |
| 22149 | if (!(flag_N & 0x80)) |
| 22150 | { |
| 22151 | res = 0xFF; |
| 22152 | PRE_IO |
| 22153 | WRITE_BYTE_F(adr, res) |
| 22154 | POST_IO |
| 22155 | RET(16) |
| 22156 | } |
| 22157 | res = 0; |
| 22158 | PRE_IO |
| 22159 | WRITE_BYTE_F(adr, res) |
| 22160 | POST_IO |
| 22161 | RET(16) |
| 22162 | } |
| 22163 | |
| 22164 | // STCC |
| 22165 | OPCODE(0x5BF8) |
| 22166 | { |
| 22167 | u32 adr, res; |
| 22168 | u32 src, dst; |
| 22169 | |
| 22170 | FETCH_SWORD(adr); |
| 22171 | if (flag_N & 0x80) |
| 22172 | { |
| 22173 | res = 0xFF; |
| 22174 | PRE_IO |
| 22175 | WRITE_BYTE_F(adr, res) |
| 22176 | POST_IO |
| 22177 | RET(16) |
| 22178 | } |
| 22179 | res = 0; |
| 22180 | PRE_IO |
| 22181 | WRITE_BYTE_F(adr, res) |
| 22182 | POST_IO |
| 22183 | RET(16) |
| 22184 | } |
| 22185 | |
| 22186 | // STCC |
| 22187 | OPCODE(0x5CF8) |
| 22188 | { |
| 22189 | u32 adr, res; |
| 22190 | u32 src, dst; |
| 22191 | |
| 22192 | FETCH_SWORD(adr); |
| 22193 | if (!((flag_N ^ flag_V) & 0x80)) |
| 22194 | { |
| 22195 | res = 0xFF; |
| 22196 | PRE_IO |
| 22197 | WRITE_BYTE_F(adr, res) |
| 22198 | POST_IO |
| 22199 | RET(16) |
| 22200 | } |
| 22201 | res = 0; |
| 22202 | PRE_IO |
| 22203 | WRITE_BYTE_F(adr, res) |
| 22204 | POST_IO |
| 22205 | RET(16) |
| 22206 | } |
| 22207 | |
| 22208 | // STCC |
| 22209 | OPCODE(0x5DF8) |
| 22210 | { |
| 22211 | u32 adr, res; |
| 22212 | u32 src, dst; |
| 22213 | |
| 22214 | FETCH_SWORD(adr); |
| 22215 | if ((flag_N ^ flag_V) & 0x80) |
| 22216 | { |
| 22217 | res = 0xFF; |
| 22218 | PRE_IO |
| 22219 | WRITE_BYTE_F(adr, res) |
| 22220 | POST_IO |
| 22221 | RET(16) |
| 22222 | } |
| 22223 | res = 0; |
| 22224 | PRE_IO |
| 22225 | WRITE_BYTE_F(adr, res) |
| 22226 | POST_IO |
| 22227 | RET(16) |
| 22228 | } |
| 22229 | |
| 22230 | // STCC |
| 22231 | OPCODE(0x5EF8) |
| 22232 | { |
| 22233 | u32 adr, res; |
| 22234 | u32 src, dst; |
| 22235 | |
| 22236 | FETCH_SWORD(adr); |
| 22237 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 22238 | { |
| 22239 | res = 0xFF; |
| 22240 | PRE_IO |
| 22241 | WRITE_BYTE_F(adr, res) |
| 22242 | POST_IO |
| 22243 | RET(16) |
| 22244 | } |
| 22245 | res = 0; |
| 22246 | PRE_IO |
| 22247 | WRITE_BYTE_F(adr, res) |
| 22248 | POST_IO |
| 22249 | RET(16) |
| 22250 | } |
| 22251 | |
| 22252 | // STCC |
| 22253 | OPCODE(0x5FF8) |
| 22254 | { |
| 22255 | u32 adr, res; |
| 22256 | u32 src, dst; |
| 22257 | |
| 22258 | FETCH_SWORD(adr); |
| 22259 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 22260 | { |
| 22261 | res = 0xFF; |
| 22262 | PRE_IO |
| 22263 | WRITE_BYTE_F(adr, res) |
| 22264 | POST_IO |
| 22265 | RET(16) |
| 22266 | } |
| 22267 | res = 0; |
| 22268 | PRE_IO |
| 22269 | WRITE_BYTE_F(adr, res) |
| 22270 | POST_IO |
| 22271 | RET(16) |
| 22272 | } |
| 22273 | |
| 22274 | // STCC |
| 22275 | OPCODE(0x50F9) |
| 22276 | { |
| 22277 | u32 adr, res; |
| 22278 | u32 src, dst; |
| 22279 | |
| 22280 | FETCH_LONG(adr); |
| 22281 | res = 0xFF; |
| 22282 | PRE_IO |
| 22283 | WRITE_BYTE_F(adr, res) |
| 22284 | POST_IO |
| 22285 | RET(20) |
| 22286 | } |
| 22287 | |
| 22288 | // STCC |
| 22289 | OPCODE(0x51F9) |
| 22290 | { |
| 22291 | u32 adr, res; |
| 22292 | u32 src, dst; |
| 22293 | |
| 22294 | FETCH_LONG(adr); |
| 22295 | res = 0; |
| 22296 | PRE_IO |
| 22297 | WRITE_BYTE_F(adr, res) |
| 22298 | POST_IO |
| 22299 | RET(20) |
| 22300 | } |
| 22301 | |
| 22302 | // STCC |
| 22303 | OPCODE(0x52F9) |
| 22304 | { |
| 22305 | u32 adr, res; |
| 22306 | u32 src, dst; |
| 22307 | |
| 22308 | FETCH_LONG(adr); |
| 22309 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 22310 | { |
| 22311 | res = 0xFF; |
| 22312 | PRE_IO |
| 22313 | WRITE_BYTE_F(adr, res) |
| 22314 | POST_IO |
| 22315 | RET(20) |
| 22316 | } |
| 22317 | res = 0; |
| 22318 | PRE_IO |
| 22319 | WRITE_BYTE_F(adr, res) |
| 22320 | POST_IO |
| 22321 | RET(20) |
| 22322 | } |
| 22323 | |
| 22324 | // STCC |
| 22325 | OPCODE(0x53F9) |
| 22326 | { |
| 22327 | u32 adr, res; |
| 22328 | u32 src, dst; |
| 22329 | |
| 22330 | FETCH_LONG(adr); |
| 22331 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 22332 | { |
| 22333 | res = 0xFF; |
| 22334 | PRE_IO |
| 22335 | WRITE_BYTE_F(adr, res) |
| 22336 | POST_IO |
| 22337 | RET(20) |
| 22338 | } |
| 22339 | res = 0; |
| 22340 | PRE_IO |
| 22341 | WRITE_BYTE_F(adr, res) |
| 22342 | POST_IO |
| 22343 | RET(20) |
| 22344 | } |
| 22345 | |
| 22346 | // STCC |
| 22347 | OPCODE(0x54F9) |
| 22348 | { |
| 22349 | u32 adr, res; |
| 22350 | u32 src, dst; |
| 22351 | |
| 22352 | FETCH_LONG(adr); |
| 22353 | if (!(flag_C & 0x100)) |
| 22354 | { |
| 22355 | res = 0xFF; |
| 22356 | PRE_IO |
| 22357 | WRITE_BYTE_F(adr, res) |
| 22358 | POST_IO |
| 22359 | RET(20) |
| 22360 | } |
| 22361 | res = 0; |
| 22362 | PRE_IO |
| 22363 | WRITE_BYTE_F(adr, res) |
| 22364 | POST_IO |
| 22365 | RET(20) |
| 22366 | } |
| 22367 | |
| 22368 | // STCC |
| 22369 | OPCODE(0x55F9) |
| 22370 | { |
| 22371 | u32 adr, res; |
| 22372 | u32 src, dst; |
| 22373 | |
| 22374 | FETCH_LONG(adr); |
| 22375 | if (flag_C & 0x100) |
| 22376 | { |
| 22377 | res = 0xFF; |
| 22378 | PRE_IO |
| 22379 | WRITE_BYTE_F(adr, res) |
| 22380 | POST_IO |
| 22381 | RET(20) |
| 22382 | } |
| 22383 | res = 0; |
| 22384 | PRE_IO |
| 22385 | WRITE_BYTE_F(adr, res) |
| 22386 | POST_IO |
| 22387 | RET(20) |
| 22388 | } |
| 22389 | |
| 22390 | // STCC |
| 22391 | OPCODE(0x56F9) |
| 22392 | { |
| 22393 | u32 adr, res; |
| 22394 | u32 src, dst; |
| 22395 | |
| 22396 | FETCH_LONG(adr); |
| 22397 | if (flag_NotZ) |
| 22398 | { |
| 22399 | res = 0xFF; |
| 22400 | PRE_IO |
| 22401 | WRITE_BYTE_F(adr, res) |
| 22402 | POST_IO |
| 22403 | RET(20) |
| 22404 | } |
| 22405 | res = 0; |
| 22406 | PRE_IO |
| 22407 | WRITE_BYTE_F(adr, res) |
| 22408 | POST_IO |
| 22409 | RET(20) |
| 22410 | } |
| 22411 | |
| 22412 | // STCC |
| 22413 | OPCODE(0x57F9) |
| 22414 | { |
| 22415 | u32 adr, res; |
| 22416 | u32 src, dst; |
| 22417 | |
| 22418 | FETCH_LONG(adr); |
| 22419 | if (!flag_NotZ) |
| 22420 | { |
| 22421 | res = 0xFF; |
| 22422 | PRE_IO |
| 22423 | WRITE_BYTE_F(adr, res) |
| 22424 | POST_IO |
| 22425 | RET(20) |
| 22426 | } |
| 22427 | res = 0; |
| 22428 | PRE_IO |
| 22429 | WRITE_BYTE_F(adr, res) |
| 22430 | POST_IO |
| 22431 | RET(20) |
| 22432 | } |
| 22433 | |
| 22434 | // STCC |
| 22435 | OPCODE(0x58F9) |
| 22436 | { |
| 22437 | u32 adr, res; |
| 22438 | u32 src, dst; |
| 22439 | |
| 22440 | FETCH_LONG(adr); |
| 22441 | if (!(flag_V & 0x80)) |
| 22442 | { |
| 22443 | res = 0xFF; |
| 22444 | PRE_IO |
| 22445 | WRITE_BYTE_F(adr, res) |
| 22446 | POST_IO |
| 22447 | RET(20) |
| 22448 | } |
| 22449 | res = 0; |
| 22450 | PRE_IO |
| 22451 | WRITE_BYTE_F(adr, res) |
| 22452 | POST_IO |
| 22453 | RET(20) |
| 22454 | } |
| 22455 | |
| 22456 | // STCC |
| 22457 | OPCODE(0x59F9) |
| 22458 | { |
| 22459 | u32 adr, res; |
| 22460 | u32 src, dst; |
| 22461 | |
| 22462 | FETCH_LONG(adr); |
| 22463 | if (flag_V & 0x80) |
| 22464 | { |
| 22465 | res = 0xFF; |
| 22466 | PRE_IO |
| 22467 | WRITE_BYTE_F(adr, res) |
| 22468 | POST_IO |
| 22469 | RET(20) |
| 22470 | } |
| 22471 | res = 0; |
| 22472 | PRE_IO |
| 22473 | WRITE_BYTE_F(adr, res) |
| 22474 | POST_IO |
| 22475 | RET(20) |
| 22476 | } |
| 22477 | |
| 22478 | // STCC |
| 22479 | OPCODE(0x5AF9) |
| 22480 | { |
| 22481 | u32 adr, res; |
| 22482 | u32 src, dst; |
| 22483 | |
| 22484 | FETCH_LONG(adr); |
| 22485 | if (!(flag_N & 0x80)) |
| 22486 | { |
| 22487 | res = 0xFF; |
| 22488 | PRE_IO |
| 22489 | WRITE_BYTE_F(adr, res) |
| 22490 | POST_IO |
| 22491 | RET(20) |
| 22492 | } |
| 22493 | res = 0; |
| 22494 | PRE_IO |
| 22495 | WRITE_BYTE_F(adr, res) |
| 22496 | POST_IO |
| 22497 | RET(20) |
| 22498 | } |
| 22499 | |
| 22500 | // STCC |
| 22501 | OPCODE(0x5BF9) |
| 22502 | { |
| 22503 | u32 adr, res; |
| 22504 | u32 src, dst; |
| 22505 | |
| 22506 | FETCH_LONG(adr); |
| 22507 | if (flag_N & 0x80) |
| 22508 | { |
| 22509 | res = 0xFF; |
| 22510 | PRE_IO |
| 22511 | WRITE_BYTE_F(adr, res) |
| 22512 | POST_IO |
| 22513 | RET(20) |
| 22514 | } |
| 22515 | res = 0; |
| 22516 | PRE_IO |
| 22517 | WRITE_BYTE_F(adr, res) |
| 22518 | POST_IO |
| 22519 | RET(20) |
| 22520 | } |
| 22521 | |
| 22522 | // STCC |
| 22523 | OPCODE(0x5CF9) |
| 22524 | { |
| 22525 | u32 adr, res; |
| 22526 | u32 src, dst; |
| 22527 | |
| 22528 | FETCH_LONG(adr); |
| 22529 | if (!((flag_N ^ flag_V) & 0x80)) |
| 22530 | { |
| 22531 | res = 0xFF; |
| 22532 | PRE_IO |
| 22533 | WRITE_BYTE_F(adr, res) |
| 22534 | POST_IO |
| 22535 | RET(20) |
| 22536 | } |
| 22537 | res = 0; |
| 22538 | PRE_IO |
| 22539 | WRITE_BYTE_F(adr, res) |
| 22540 | POST_IO |
| 22541 | RET(20) |
| 22542 | } |
| 22543 | |
| 22544 | // STCC |
| 22545 | OPCODE(0x5DF9) |
| 22546 | { |
| 22547 | u32 adr, res; |
| 22548 | u32 src, dst; |
| 22549 | |
| 22550 | FETCH_LONG(adr); |
| 22551 | if ((flag_N ^ flag_V) & 0x80) |
| 22552 | { |
| 22553 | res = 0xFF; |
| 22554 | PRE_IO |
| 22555 | WRITE_BYTE_F(adr, res) |
| 22556 | POST_IO |
| 22557 | RET(20) |
| 22558 | } |
| 22559 | res = 0; |
| 22560 | PRE_IO |
| 22561 | WRITE_BYTE_F(adr, res) |
| 22562 | POST_IO |
| 22563 | RET(20) |
| 22564 | } |
| 22565 | |
| 22566 | // STCC |
| 22567 | OPCODE(0x5EF9) |
| 22568 | { |
| 22569 | u32 adr, res; |
| 22570 | u32 src, dst; |
| 22571 | |
| 22572 | FETCH_LONG(adr); |
| 22573 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 22574 | { |
| 22575 | res = 0xFF; |
| 22576 | PRE_IO |
| 22577 | WRITE_BYTE_F(adr, res) |
| 22578 | POST_IO |
| 22579 | RET(20) |
| 22580 | } |
| 22581 | res = 0; |
| 22582 | PRE_IO |
| 22583 | WRITE_BYTE_F(adr, res) |
| 22584 | POST_IO |
| 22585 | RET(20) |
| 22586 | } |
| 22587 | |
| 22588 | // STCC |
| 22589 | OPCODE(0x5FF9) |
| 22590 | { |
| 22591 | u32 adr, res; |
| 22592 | u32 src, dst; |
| 22593 | |
| 22594 | FETCH_LONG(adr); |
| 22595 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 22596 | { |
| 22597 | res = 0xFF; |
| 22598 | PRE_IO |
| 22599 | WRITE_BYTE_F(adr, res) |
| 22600 | POST_IO |
| 22601 | RET(20) |
| 22602 | } |
| 22603 | res = 0; |
| 22604 | PRE_IO |
| 22605 | WRITE_BYTE_F(adr, res) |
| 22606 | POST_IO |
| 22607 | RET(20) |
| 22608 | } |
| 22609 | |
| 22610 | // STCC |
| 22611 | OPCODE(0x50DF) |
| 22612 | { |
| 22613 | u32 adr, res; |
| 22614 | u32 src, dst; |
| 22615 | |
| 22616 | adr = AREG(7); |
| 22617 | AREG(7) += 2; |
| 22618 | res = 0xFF; |
| 22619 | PRE_IO |
| 22620 | WRITE_BYTE_F(adr, res) |
| 22621 | POST_IO |
| 22622 | RET(12) |
| 22623 | } |
| 22624 | |
| 22625 | // STCC |
| 22626 | OPCODE(0x51DF) |
| 22627 | { |
| 22628 | u32 adr, res; |
| 22629 | u32 src, dst; |
| 22630 | |
| 22631 | adr = AREG(7); |
| 22632 | AREG(7) += 2; |
| 22633 | res = 0; |
| 22634 | PRE_IO |
| 22635 | WRITE_BYTE_F(adr, res) |
| 22636 | POST_IO |
| 22637 | RET(12) |
| 22638 | } |
| 22639 | |
| 22640 | // STCC |
| 22641 | OPCODE(0x52DF) |
| 22642 | { |
| 22643 | u32 adr, res; |
| 22644 | u32 src, dst; |
| 22645 | |
| 22646 | adr = AREG(7); |
| 22647 | AREG(7) += 2; |
| 22648 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 22649 | { |
| 22650 | res = 0xFF; |
| 22651 | PRE_IO |
| 22652 | WRITE_BYTE_F(adr, res) |
| 22653 | POST_IO |
| 22654 | RET(12) |
| 22655 | } |
| 22656 | res = 0; |
| 22657 | PRE_IO |
| 22658 | WRITE_BYTE_F(adr, res) |
| 22659 | POST_IO |
| 22660 | RET(12) |
| 22661 | } |
| 22662 | |
| 22663 | // STCC |
| 22664 | OPCODE(0x53DF) |
| 22665 | { |
| 22666 | u32 adr, res; |
| 22667 | u32 src, dst; |
| 22668 | |
| 22669 | adr = AREG(7); |
| 22670 | AREG(7) += 2; |
| 22671 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 22672 | { |
| 22673 | res = 0xFF; |
| 22674 | PRE_IO |
| 22675 | WRITE_BYTE_F(adr, res) |
| 22676 | POST_IO |
| 22677 | RET(12) |
| 22678 | } |
| 22679 | res = 0; |
| 22680 | PRE_IO |
| 22681 | WRITE_BYTE_F(adr, res) |
| 22682 | POST_IO |
| 22683 | RET(12) |
| 22684 | } |
| 22685 | |
| 22686 | // STCC |
| 22687 | OPCODE(0x54DF) |
| 22688 | { |
| 22689 | u32 adr, res; |
| 22690 | u32 src, dst; |
| 22691 | |
| 22692 | adr = AREG(7); |
| 22693 | AREG(7) += 2; |
| 22694 | if (!(flag_C & 0x100)) |
| 22695 | { |
| 22696 | res = 0xFF; |
| 22697 | PRE_IO |
| 22698 | WRITE_BYTE_F(adr, res) |
| 22699 | POST_IO |
| 22700 | RET(12) |
| 22701 | } |
| 22702 | res = 0; |
| 22703 | PRE_IO |
| 22704 | WRITE_BYTE_F(adr, res) |
| 22705 | POST_IO |
| 22706 | RET(12) |
| 22707 | } |
| 22708 | |
| 22709 | // STCC |
| 22710 | OPCODE(0x55DF) |
| 22711 | { |
| 22712 | u32 adr, res; |
| 22713 | u32 src, dst; |
| 22714 | |
| 22715 | adr = AREG(7); |
| 22716 | AREG(7) += 2; |
| 22717 | if (flag_C & 0x100) |
| 22718 | { |
| 22719 | res = 0xFF; |
| 22720 | PRE_IO |
| 22721 | WRITE_BYTE_F(adr, res) |
| 22722 | POST_IO |
| 22723 | RET(12) |
| 22724 | } |
| 22725 | res = 0; |
| 22726 | PRE_IO |
| 22727 | WRITE_BYTE_F(adr, res) |
| 22728 | POST_IO |
| 22729 | RET(12) |
| 22730 | } |
| 22731 | |
| 22732 | // STCC |
| 22733 | OPCODE(0x56DF) |
| 22734 | { |
| 22735 | u32 adr, res; |
| 22736 | u32 src, dst; |
| 22737 | |
| 22738 | adr = AREG(7); |
| 22739 | AREG(7) += 2; |
| 22740 | if (flag_NotZ) |
| 22741 | { |
| 22742 | res = 0xFF; |
| 22743 | PRE_IO |
| 22744 | WRITE_BYTE_F(adr, res) |
| 22745 | POST_IO |
| 22746 | RET(12) |
| 22747 | } |
| 22748 | res = 0; |
| 22749 | PRE_IO |
| 22750 | WRITE_BYTE_F(adr, res) |
| 22751 | POST_IO |
| 22752 | RET(12) |
| 22753 | } |
| 22754 | |
| 22755 | // STCC |
| 22756 | OPCODE(0x57DF) |
| 22757 | { |
| 22758 | u32 adr, res; |
| 22759 | u32 src, dst; |
| 22760 | |
| 22761 | adr = AREG(7); |
| 22762 | AREG(7) += 2; |
| 22763 | if (!flag_NotZ) |
| 22764 | { |
| 22765 | res = 0xFF; |
| 22766 | PRE_IO |
| 22767 | WRITE_BYTE_F(adr, res) |
| 22768 | POST_IO |
| 22769 | RET(12) |
| 22770 | } |
| 22771 | res = 0; |
| 22772 | PRE_IO |
| 22773 | WRITE_BYTE_F(adr, res) |
| 22774 | POST_IO |
| 22775 | RET(12) |
| 22776 | } |
| 22777 | |
| 22778 | // STCC |
| 22779 | OPCODE(0x58DF) |
| 22780 | { |
| 22781 | u32 adr, res; |
| 22782 | u32 src, dst; |
| 22783 | |
| 22784 | adr = AREG(7); |
| 22785 | AREG(7) += 2; |
| 22786 | if (!(flag_V & 0x80)) |
| 22787 | { |
| 22788 | res = 0xFF; |
| 22789 | PRE_IO |
| 22790 | WRITE_BYTE_F(adr, res) |
| 22791 | POST_IO |
| 22792 | RET(12) |
| 22793 | } |
| 22794 | res = 0; |
| 22795 | PRE_IO |
| 22796 | WRITE_BYTE_F(adr, res) |
| 22797 | POST_IO |
| 22798 | RET(12) |
| 22799 | } |
| 22800 | |
| 22801 | // STCC |
| 22802 | OPCODE(0x59DF) |
| 22803 | { |
| 22804 | u32 adr, res; |
| 22805 | u32 src, dst; |
| 22806 | |
| 22807 | adr = AREG(7); |
| 22808 | AREG(7) += 2; |
| 22809 | if (flag_V & 0x80) |
| 22810 | { |
| 22811 | res = 0xFF; |
| 22812 | PRE_IO |
| 22813 | WRITE_BYTE_F(adr, res) |
| 22814 | POST_IO |
| 22815 | RET(12) |
| 22816 | } |
| 22817 | res = 0; |
| 22818 | PRE_IO |
| 22819 | WRITE_BYTE_F(adr, res) |
| 22820 | POST_IO |
| 22821 | RET(12) |
| 22822 | } |
| 22823 | |
| 22824 | // STCC |
| 22825 | OPCODE(0x5ADF) |
| 22826 | { |
| 22827 | u32 adr, res; |
| 22828 | u32 src, dst; |
| 22829 | |
| 22830 | adr = AREG(7); |
| 22831 | AREG(7) += 2; |
| 22832 | if (!(flag_N & 0x80)) |
| 22833 | { |
| 22834 | res = 0xFF; |
| 22835 | PRE_IO |
| 22836 | WRITE_BYTE_F(adr, res) |
| 22837 | POST_IO |
| 22838 | RET(12) |
| 22839 | } |
| 22840 | res = 0; |
| 22841 | PRE_IO |
| 22842 | WRITE_BYTE_F(adr, res) |
| 22843 | POST_IO |
| 22844 | RET(12) |
| 22845 | } |
| 22846 | |
| 22847 | // STCC |
| 22848 | OPCODE(0x5BDF) |
| 22849 | { |
| 22850 | u32 adr, res; |
| 22851 | u32 src, dst; |
| 22852 | |
| 22853 | adr = AREG(7); |
| 22854 | AREG(7) += 2; |
| 22855 | if (flag_N & 0x80) |
| 22856 | { |
| 22857 | res = 0xFF; |
| 22858 | PRE_IO |
| 22859 | WRITE_BYTE_F(adr, res) |
| 22860 | POST_IO |
| 22861 | RET(12) |
| 22862 | } |
| 22863 | res = 0; |
| 22864 | PRE_IO |
| 22865 | WRITE_BYTE_F(adr, res) |
| 22866 | POST_IO |
| 22867 | RET(12) |
| 22868 | } |
| 22869 | |
| 22870 | // STCC |
| 22871 | OPCODE(0x5CDF) |
| 22872 | { |
| 22873 | u32 adr, res; |
| 22874 | u32 src, dst; |
| 22875 | |
| 22876 | adr = AREG(7); |
| 22877 | AREG(7) += 2; |
| 22878 | if (!((flag_N ^ flag_V) & 0x80)) |
| 22879 | { |
| 22880 | res = 0xFF; |
| 22881 | PRE_IO |
| 22882 | WRITE_BYTE_F(adr, res) |
| 22883 | POST_IO |
| 22884 | RET(12) |
| 22885 | } |
| 22886 | res = 0; |
| 22887 | PRE_IO |
| 22888 | WRITE_BYTE_F(adr, res) |
| 22889 | POST_IO |
| 22890 | RET(12) |
| 22891 | } |
| 22892 | |
| 22893 | // STCC |
| 22894 | OPCODE(0x5DDF) |
| 22895 | { |
| 22896 | u32 adr, res; |
| 22897 | u32 src, dst; |
| 22898 | |
| 22899 | adr = AREG(7); |
| 22900 | AREG(7) += 2; |
| 22901 | if ((flag_N ^ flag_V) & 0x80) |
| 22902 | { |
| 22903 | res = 0xFF; |
| 22904 | PRE_IO |
| 22905 | WRITE_BYTE_F(adr, res) |
| 22906 | POST_IO |
| 22907 | RET(12) |
| 22908 | } |
| 22909 | res = 0; |
| 22910 | PRE_IO |
| 22911 | WRITE_BYTE_F(adr, res) |
| 22912 | POST_IO |
| 22913 | RET(12) |
| 22914 | } |
| 22915 | |
| 22916 | // STCC |
| 22917 | OPCODE(0x5EDF) |
| 22918 | { |
| 22919 | u32 adr, res; |
| 22920 | u32 src, dst; |
| 22921 | |
| 22922 | adr = AREG(7); |
| 22923 | AREG(7) += 2; |
| 22924 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 22925 | { |
| 22926 | res = 0xFF; |
| 22927 | PRE_IO |
| 22928 | WRITE_BYTE_F(adr, res) |
| 22929 | POST_IO |
| 22930 | RET(12) |
| 22931 | } |
| 22932 | res = 0; |
| 22933 | PRE_IO |
| 22934 | WRITE_BYTE_F(adr, res) |
| 22935 | POST_IO |
| 22936 | RET(12) |
| 22937 | } |
| 22938 | |
| 22939 | // STCC |
| 22940 | OPCODE(0x5FDF) |
| 22941 | { |
| 22942 | u32 adr, res; |
| 22943 | u32 src, dst; |
| 22944 | |
| 22945 | adr = AREG(7); |
| 22946 | AREG(7) += 2; |
| 22947 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 22948 | { |
| 22949 | res = 0xFF; |
| 22950 | PRE_IO |
| 22951 | WRITE_BYTE_F(adr, res) |
| 22952 | POST_IO |
| 22953 | RET(12) |
| 22954 | } |
| 22955 | res = 0; |
| 22956 | PRE_IO |
| 22957 | WRITE_BYTE_F(adr, res) |
| 22958 | POST_IO |
| 22959 | RET(12) |
| 22960 | } |
| 22961 | |
| 22962 | // STCC |
| 22963 | OPCODE(0x50E7) |
| 22964 | { |
| 22965 | u32 adr, res; |
| 22966 | u32 src, dst; |
| 22967 | |
| 22968 | adr = AREG(7) - 2; |
| 22969 | AREG(7) = adr; |
| 22970 | res = 0xFF; |
| 22971 | PRE_IO |
| 22972 | WRITE_BYTE_F(adr, res) |
| 22973 | POST_IO |
| 22974 | RET(14) |
| 22975 | } |
| 22976 | |
| 22977 | // STCC |
| 22978 | OPCODE(0x51E7) |
| 22979 | { |
| 22980 | u32 adr, res; |
| 22981 | u32 src, dst; |
| 22982 | |
| 22983 | adr = AREG(7) - 2; |
| 22984 | AREG(7) = adr; |
| 22985 | res = 0; |
| 22986 | PRE_IO |
| 22987 | WRITE_BYTE_F(adr, res) |
| 22988 | POST_IO |
| 22989 | RET(14) |
| 22990 | } |
| 22991 | |
| 22992 | // STCC |
| 22993 | OPCODE(0x52E7) |
| 22994 | { |
| 22995 | u32 adr, res; |
| 22996 | u32 src, dst; |
| 22997 | |
| 22998 | adr = AREG(7) - 2; |
| 22999 | AREG(7) = adr; |
| 23000 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 23001 | { |
| 23002 | res = 0xFF; |
| 23003 | PRE_IO |
| 23004 | WRITE_BYTE_F(adr, res) |
| 23005 | POST_IO |
| 23006 | RET(14) |
| 23007 | } |
| 23008 | res = 0; |
| 23009 | PRE_IO |
| 23010 | WRITE_BYTE_F(adr, res) |
| 23011 | POST_IO |
| 23012 | RET(14) |
| 23013 | } |
| 23014 | |
| 23015 | // STCC |
| 23016 | OPCODE(0x53E7) |
| 23017 | { |
| 23018 | u32 adr, res; |
| 23019 | u32 src, dst; |
| 23020 | |
| 23021 | adr = AREG(7) - 2; |
| 23022 | AREG(7) = adr; |
| 23023 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 23024 | { |
| 23025 | res = 0xFF; |
| 23026 | PRE_IO |
| 23027 | WRITE_BYTE_F(adr, res) |
| 23028 | POST_IO |
| 23029 | RET(14) |
| 23030 | } |
| 23031 | res = 0; |
| 23032 | PRE_IO |
| 23033 | WRITE_BYTE_F(adr, res) |
| 23034 | POST_IO |
| 23035 | RET(14) |
| 23036 | } |
| 23037 | |
| 23038 | // STCC |
| 23039 | OPCODE(0x54E7) |
| 23040 | { |
| 23041 | u32 adr, res; |
| 23042 | u32 src, dst; |
| 23043 | |
| 23044 | adr = AREG(7) - 2; |
| 23045 | AREG(7) = adr; |
| 23046 | if (!(flag_C & 0x100)) |
| 23047 | { |
| 23048 | res = 0xFF; |
| 23049 | PRE_IO |
| 23050 | WRITE_BYTE_F(adr, res) |
| 23051 | POST_IO |
| 23052 | RET(14) |
| 23053 | } |
| 23054 | res = 0; |
| 23055 | PRE_IO |
| 23056 | WRITE_BYTE_F(adr, res) |
| 23057 | POST_IO |
| 23058 | RET(14) |
| 23059 | } |
| 23060 | |
| 23061 | // STCC |
| 23062 | OPCODE(0x55E7) |
| 23063 | { |
| 23064 | u32 adr, res; |
| 23065 | u32 src, dst; |
| 23066 | |
| 23067 | adr = AREG(7) - 2; |
| 23068 | AREG(7) = adr; |
| 23069 | if (flag_C & 0x100) |
| 23070 | { |
| 23071 | res = 0xFF; |
| 23072 | PRE_IO |
| 23073 | WRITE_BYTE_F(adr, res) |
| 23074 | POST_IO |
| 23075 | RET(14) |
| 23076 | } |
| 23077 | res = 0; |
| 23078 | PRE_IO |
| 23079 | WRITE_BYTE_F(adr, res) |
| 23080 | POST_IO |
| 23081 | RET(14) |
| 23082 | } |
| 23083 | |
| 23084 | // STCC |
| 23085 | OPCODE(0x56E7) |
| 23086 | { |
| 23087 | u32 adr, res; |
| 23088 | u32 src, dst; |
| 23089 | |
| 23090 | adr = AREG(7) - 2; |
| 23091 | AREG(7) = adr; |
| 23092 | if (flag_NotZ) |
| 23093 | { |
| 23094 | res = 0xFF; |
| 23095 | PRE_IO |
| 23096 | WRITE_BYTE_F(adr, res) |
| 23097 | POST_IO |
| 23098 | RET(14) |
| 23099 | } |
| 23100 | res = 0; |
| 23101 | PRE_IO |
| 23102 | WRITE_BYTE_F(adr, res) |
| 23103 | POST_IO |
| 23104 | RET(14) |
| 23105 | } |
| 23106 | |
| 23107 | // STCC |
| 23108 | OPCODE(0x57E7) |
| 23109 | { |
| 23110 | u32 adr, res; |
| 23111 | u32 src, dst; |
| 23112 | |
| 23113 | adr = AREG(7) - 2; |
| 23114 | AREG(7) = adr; |
| 23115 | if (!flag_NotZ) |
| 23116 | { |
| 23117 | res = 0xFF; |
| 23118 | PRE_IO |
| 23119 | WRITE_BYTE_F(adr, res) |
| 23120 | POST_IO |
| 23121 | RET(14) |
| 23122 | } |
| 23123 | res = 0; |
| 23124 | PRE_IO |
| 23125 | WRITE_BYTE_F(adr, res) |
| 23126 | POST_IO |
| 23127 | RET(14) |
| 23128 | } |
| 23129 | |
| 23130 | // STCC |
| 23131 | OPCODE(0x58E7) |
| 23132 | { |
| 23133 | u32 adr, res; |
| 23134 | u32 src, dst; |
| 23135 | |
| 23136 | adr = AREG(7) - 2; |
| 23137 | AREG(7) = adr; |
| 23138 | if (!(flag_V & 0x80)) |
| 23139 | { |
| 23140 | res = 0xFF; |
| 23141 | PRE_IO |
| 23142 | WRITE_BYTE_F(adr, res) |
| 23143 | POST_IO |
| 23144 | RET(14) |
| 23145 | } |
| 23146 | res = 0; |
| 23147 | PRE_IO |
| 23148 | WRITE_BYTE_F(adr, res) |
| 23149 | POST_IO |
| 23150 | RET(14) |
| 23151 | } |
| 23152 | |
| 23153 | // STCC |
| 23154 | OPCODE(0x59E7) |
| 23155 | { |
| 23156 | u32 adr, res; |
| 23157 | u32 src, dst; |
| 23158 | |
| 23159 | adr = AREG(7) - 2; |
| 23160 | AREG(7) = adr; |
| 23161 | if (flag_V & 0x80) |
| 23162 | { |
| 23163 | res = 0xFF; |
| 23164 | PRE_IO |
| 23165 | WRITE_BYTE_F(adr, res) |
| 23166 | POST_IO |
| 23167 | RET(14) |
| 23168 | } |
| 23169 | res = 0; |
| 23170 | PRE_IO |
| 23171 | WRITE_BYTE_F(adr, res) |
| 23172 | POST_IO |
| 23173 | RET(14) |
| 23174 | } |
| 23175 | |
| 23176 | // STCC |
| 23177 | OPCODE(0x5AE7) |
| 23178 | { |
| 23179 | u32 adr, res; |
| 23180 | u32 src, dst; |
| 23181 | |
| 23182 | adr = AREG(7) - 2; |
| 23183 | AREG(7) = adr; |
| 23184 | if (!(flag_N & 0x80)) |
| 23185 | { |
| 23186 | res = 0xFF; |
| 23187 | PRE_IO |
| 23188 | WRITE_BYTE_F(adr, res) |
| 23189 | POST_IO |
| 23190 | RET(14) |
| 23191 | } |
| 23192 | res = 0; |
| 23193 | PRE_IO |
| 23194 | WRITE_BYTE_F(adr, res) |
| 23195 | POST_IO |
| 23196 | RET(14) |
| 23197 | } |
| 23198 | |
| 23199 | // STCC |
| 23200 | OPCODE(0x5BE7) |
| 23201 | { |
| 23202 | u32 adr, res; |
| 23203 | u32 src, dst; |
| 23204 | |
| 23205 | adr = AREG(7) - 2; |
| 23206 | AREG(7) = adr; |
| 23207 | if (flag_N & 0x80) |
| 23208 | { |
| 23209 | res = 0xFF; |
| 23210 | PRE_IO |
| 23211 | WRITE_BYTE_F(adr, res) |
| 23212 | POST_IO |
| 23213 | RET(14) |
| 23214 | } |
| 23215 | res = 0; |
| 23216 | PRE_IO |
| 23217 | WRITE_BYTE_F(adr, res) |
| 23218 | POST_IO |
| 23219 | RET(14) |
| 23220 | } |
| 23221 | |
| 23222 | // STCC |
| 23223 | OPCODE(0x5CE7) |
| 23224 | { |
| 23225 | u32 adr, res; |
| 23226 | u32 src, dst; |
| 23227 | |
| 23228 | adr = AREG(7) - 2; |
| 23229 | AREG(7) = adr; |
| 23230 | if (!((flag_N ^ flag_V) & 0x80)) |
| 23231 | { |
| 23232 | res = 0xFF; |
| 23233 | PRE_IO |
| 23234 | WRITE_BYTE_F(adr, res) |
| 23235 | POST_IO |
| 23236 | RET(14) |
| 23237 | } |
| 23238 | res = 0; |
| 23239 | PRE_IO |
| 23240 | WRITE_BYTE_F(adr, res) |
| 23241 | POST_IO |
| 23242 | RET(14) |
| 23243 | } |
| 23244 | |
| 23245 | // STCC |
| 23246 | OPCODE(0x5DE7) |
| 23247 | { |
| 23248 | u32 adr, res; |
| 23249 | u32 src, dst; |
| 23250 | |
| 23251 | adr = AREG(7) - 2; |
| 23252 | AREG(7) = adr; |
| 23253 | if ((flag_N ^ flag_V) & 0x80) |
| 23254 | { |
| 23255 | res = 0xFF; |
| 23256 | PRE_IO |
| 23257 | WRITE_BYTE_F(adr, res) |
| 23258 | POST_IO |
| 23259 | RET(14) |
| 23260 | } |
| 23261 | res = 0; |
| 23262 | PRE_IO |
| 23263 | WRITE_BYTE_F(adr, res) |
| 23264 | POST_IO |
| 23265 | RET(14) |
| 23266 | } |
| 23267 | |
| 23268 | // STCC |
| 23269 | OPCODE(0x5EE7) |
| 23270 | { |
| 23271 | u32 adr, res; |
| 23272 | u32 src, dst; |
| 23273 | |
| 23274 | adr = AREG(7) - 2; |
| 23275 | AREG(7) = adr; |
| 23276 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 23277 | { |
| 23278 | res = 0xFF; |
| 23279 | PRE_IO |
| 23280 | WRITE_BYTE_F(adr, res) |
| 23281 | POST_IO |
| 23282 | RET(14) |
| 23283 | } |
| 23284 | res = 0; |
| 23285 | PRE_IO |
| 23286 | WRITE_BYTE_F(adr, res) |
| 23287 | POST_IO |
| 23288 | RET(14) |
| 23289 | } |
| 23290 | |
| 23291 | // STCC |
| 23292 | OPCODE(0x5FE7) |
| 23293 | { |
| 23294 | u32 adr, res; |
| 23295 | u32 src, dst; |
| 23296 | |
| 23297 | adr = AREG(7) - 2; |
| 23298 | AREG(7) = adr; |
| 23299 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 23300 | { |
| 23301 | res = 0xFF; |
| 23302 | PRE_IO |
| 23303 | WRITE_BYTE_F(adr, res) |
| 23304 | POST_IO |
| 23305 | RET(14) |
| 23306 | } |
| 23307 | res = 0; |
| 23308 | PRE_IO |
| 23309 | WRITE_BYTE_F(adr, res) |
| 23310 | POST_IO |
| 23311 | RET(14) |
| 23312 | } |
| 23313 | |
| 23314 | // DBCC |
| 23315 | OPCODE(0x50C8) |
| 23316 | { |
| 23317 | u32 adr, res; |
| 23318 | u32 src, dst; |
| 23319 | |
| 23320 | PC++; |
| 23321 | RET(12) |
| 23322 | } |
| 23323 | |
| 23324 | // DBCC |
| 23325 | OPCODE(0x51C8) |
| 23326 | { |
| 23327 | u32 adr, res; |
| 23328 | u32 src, dst; |
| 23329 | |
| 23330 | NOT_POLLING |
| 23331 | |
| 23332 | res = DREGu16((Opcode >> 0) & 7); |
| 23333 | res--; |
| 23334 | DREGu16((Opcode >> 0) & 7) = res; |
| 23335 | if ((s32)res != -1) |
| 23336 | { |
| 23337 | u32 newPC; |
| 23338 | |
| 23339 | newPC = GET_PC; |
| 23340 | newPC += GET_SWORD; |
| 23341 | SET_PC(newPC); |
| 23342 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23343 | RET(10) |
| 23344 | } |
| 23345 | PC++; |
| 23346 | RET(14) |
| 23347 | } |
| 23348 | |
| 23349 | // DBCC |
| 23350 | OPCODE(0x52C8) |
| 23351 | { |
| 23352 | u32 adr, res; |
| 23353 | u32 src, dst; |
| 23354 | |
| 23355 | NOT_POLLING |
| 23356 | |
| 23357 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 23358 | { |
| 23359 | res = DREGu16((Opcode >> 0) & 7); |
| 23360 | res--; |
| 23361 | DREGu16((Opcode >> 0) & 7) = res; |
| 23362 | if ((s32)res != -1) |
| 23363 | { |
| 23364 | u32 newPC; |
| 23365 | |
| 23366 | newPC = GET_PC; |
| 23367 | newPC += GET_SWORD; |
| 23368 | SET_PC(newPC); |
| 23369 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23370 | RET(10) |
| 23371 | } |
| 23372 | } |
| 23373 | else |
| 23374 | { |
| 23375 | PC++; |
| 23376 | RET(12) |
| 23377 | } |
| 23378 | PC++; |
| 23379 | RET(14) |
| 23380 | } |
| 23381 | |
| 23382 | // DBCC |
| 23383 | OPCODE(0x53C8) |
| 23384 | { |
| 23385 | u32 adr, res; |
| 23386 | u32 src, dst; |
| 23387 | |
| 23388 | NOT_POLLING |
| 23389 | |
| 23390 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 23391 | { |
| 23392 | res = DREGu16((Opcode >> 0) & 7); |
| 23393 | res--; |
| 23394 | DREGu16((Opcode >> 0) & 7) = res; |
| 23395 | if ((s32)res != -1) |
| 23396 | { |
| 23397 | u32 newPC; |
| 23398 | |
| 23399 | newPC = GET_PC; |
| 23400 | newPC += GET_SWORD; |
| 23401 | SET_PC(newPC); |
| 23402 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23403 | RET(10) |
| 23404 | } |
| 23405 | } |
| 23406 | else |
| 23407 | { |
| 23408 | PC++; |
| 23409 | RET(12) |
| 23410 | } |
| 23411 | PC++; |
| 23412 | RET(14) |
| 23413 | } |
| 23414 | |
| 23415 | // DBCC |
| 23416 | OPCODE(0x54C8) |
| 23417 | { |
| 23418 | u32 adr, res; |
| 23419 | u32 src, dst; |
| 23420 | |
| 23421 | NOT_POLLING |
| 23422 | |
| 23423 | if (flag_C & 0x100) |
| 23424 | { |
| 23425 | res = DREGu16((Opcode >> 0) & 7); |
| 23426 | res--; |
| 23427 | DREGu16((Opcode >> 0) & 7) = res; |
| 23428 | if ((s32)res != -1) |
| 23429 | { |
| 23430 | u32 newPC; |
| 23431 | |
| 23432 | newPC = GET_PC; |
| 23433 | newPC += GET_SWORD; |
| 23434 | SET_PC(newPC); |
| 23435 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23436 | RET(10) |
| 23437 | } |
| 23438 | } |
| 23439 | else |
| 23440 | { |
| 23441 | PC++; |
| 23442 | RET(12) |
| 23443 | } |
| 23444 | PC++; |
| 23445 | RET(14) |
| 23446 | } |
| 23447 | |
| 23448 | // DBCC |
| 23449 | OPCODE(0x55C8) |
| 23450 | { |
| 23451 | u32 adr, res; |
| 23452 | u32 src, dst; |
| 23453 | |
| 23454 | NOT_POLLING |
| 23455 | |
| 23456 | if (!(flag_C & 0x100)) |
| 23457 | { |
| 23458 | res = DREGu16((Opcode >> 0) & 7); |
| 23459 | res--; |
| 23460 | DREGu16((Opcode >> 0) & 7) = res; |
| 23461 | if ((s32)res != -1) |
| 23462 | { |
| 23463 | u32 newPC; |
| 23464 | |
| 23465 | newPC = GET_PC; |
| 23466 | newPC += GET_SWORD; |
| 23467 | SET_PC(newPC); |
| 23468 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23469 | RET(10) |
| 23470 | } |
| 23471 | } |
| 23472 | else |
| 23473 | { |
| 23474 | PC++; |
| 23475 | RET(12) |
| 23476 | } |
| 23477 | PC++; |
| 23478 | RET(14) |
| 23479 | } |
| 23480 | |
| 23481 | // DBCC |
| 23482 | OPCODE(0x56C8) |
| 23483 | { |
| 23484 | u32 adr, res; |
| 23485 | u32 src, dst; |
| 23486 | |
| 23487 | NOT_POLLING |
| 23488 | |
| 23489 | if (!flag_NotZ) |
| 23490 | { |
| 23491 | res = DREGu16((Opcode >> 0) & 7); |
| 23492 | res--; |
| 23493 | DREGu16((Opcode >> 0) & 7) = res; |
| 23494 | if ((s32)res != -1) |
| 23495 | { |
| 23496 | u32 newPC; |
| 23497 | |
| 23498 | newPC = GET_PC; |
| 23499 | newPC += GET_SWORD; |
| 23500 | SET_PC(newPC); |
| 23501 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23502 | RET(10) |
| 23503 | } |
| 23504 | } |
| 23505 | else |
| 23506 | { |
| 23507 | PC++; |
| 23508 | RET(12) |
| 23509 | } |
| 23510 | PC++; |
| 23511 | RET(14) |
| 23512 | } |
| 23513 | |
| 23514 | // DBCC |
| 23515 | OPCODE(0x57C8) |
| 23516 | { |
| 23517 | u32 adr, res; |
| 23518 | u32 src, dst; |
| 23519 | |
| 23520 | NOT_POLLING |
| 23521 | |
| 23522 | if (flag_NotZ) |
| 23523 | { |
| 23524 | res = DREGu16((Opcode >> 0) & 7); |
| 23525 | res--; |
| 23526 | DREGu16((Opcode >> 0) & 7) = res; |
| 23527 | if ((s32)res != -1) |
| 23528 | { |
| 23529 | u32 newPC; |
| 23530 | |
| 23531 | newPC = GET_PC; |
| 23532 | newPC += GET_SWORD; |
| 23533 | SET_PC(newPC); |
| 23534 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23535 | RET(10) |
| 23536 | } |
| 23537 | } |
| 23538 | else |
| 23539 | { |
| 23540 | PC++; |
| 23541 | RET(12) |
| 23542 | } |
| 23543 | PC++; |
| 23544 | RET(14) |
| 23545 | } |
| 23546 | |
| 23547 | // DBCC |
| 23548 | OPCODE(0x58C8) |
| 23549 | { |
| 23550 | u32 adr, res; |
| 23551 | u32 src, dst; |
| 23552 | |
| 23553 | NOT_POLLING |
| 23554 | |
| 23555 | if (flag_V & 0x80) |
| 23556 | { |
| 23557 | res = DREGu16((Opcode >> 0) & 7); |
| 23558 | res--; |
| 23559 | DREGu16((Opcode >> 0) & 7) = res; |
| 23560 | if ((s32)res != -1) |
| 23561 | { |
| 23562 | u32 newPC; |
| 23563 | |
| 23564 | newPC = GET_PC; |
| 23565 | newPC += GET_SWORD; |
| 23566 | SET_PC(newPC); |
| 23567 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23568 | RET(10) |
| 23569 | } |
| 23570 | } |
| 23571 | else |
| 23572 | { |
| 23573 | PC++; |
| 23574 | RET(12) |
| 23575 | } |
| 23576 | PC++; |
| 23577 | RET(14) |
| 23578 | } |
| 23579 | |
| 23580 | // DBCC |
| 23581 | OPCODE(0x59C8) |
| 23582 | { |
| 23583 | u32 adr, res; |
| 23584 | u32 src, dst; |
| 23585 | |
| 23586 | NOT_POLLING |
| 23587 | |
| 23588 | if (!(flag_V & 0x80)) |
| 23589 | { |
| 23590 | res = DREGu16((Opcode >> 0) & 7); |
| 23591 | res--; |
| 23592 | DREGu16((Opcode >> 0) & 7) = res; |
| 23593 | if ((s32)res != -1) |
| 23594 | { |
| 23595 | u32 newPC; |
| 23596 | |
| 23597 | newPC = GET_PC; |
| 23598 | newPC += GET_SWORD; |
| 23599 | SET_PC(newPC); |
| 23600 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23601 | RET(10) |
| 23602 | } |
| 23603 | } |
| 23604 | else |
| 23605 | { |
| 23606 | PC++; |
| 23607 | RET(12) |
| 23608 | } |
| 23609 | PC++; |
| 23610 | RET(14) |
| 23611 | } |
| 23612 | |
| 23613 | // DBCC |
| 23614 | OPCODE(0x5AC8) |
| 23615 | { |
| 23616 | u32 adr, res; |
| 23617 | u32 src, dst; |
| 23618 | |
| 23619 | NOT_POLLING |
| 23620 | |
| 23621 | if (flag_N & 0x80) |
| 23622 | { |
| 23623 | res = DREGu16((Opcode >> 0) & 7); |
| 23624 | res--; |
| 23625 | DREGu16((Opcode >> 0) & 7) = res; |
| 23626 | if ((s32)res != -1) |
| 23627 | { |
| 23628 | u32 newPC; |
| 23629 | |
| 23630 | newPC = GET_PC; |
| 23631 | newPC += GET_SWORD; |
| 23632 | SET_PC(newPC); |
| 23633 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23634 | RET(10) |
| 23635 | } |
| 23636 | } |
| 23637 | else |
| 23638 | { |
| 23639 | PC++; |
| 23640 | RET(12) |
| 23641 | } |
| 23642 | PC++; |
| 23643 | RET(14) |
| 23644 | } |
| 23645 | |
| 23646 | // DBCC |
| 23647 | OPCODE(0x5BC8) |
| 23648 | { |
| 23649 | u32 adr, res; |
| 23650 | u32 src, dst; |
| 23651 | |
| 23652 | NOT_POLLING |
| 23653 | |
| 23654 | if (!(flag_N & 0x80)) |
| 23655 | { |
| 23656 | res = DREGu16((Opcode >> 0) & 7); |
| 23657 | res--; |
| 23658 | DREGu16((Opcode >> 0) & 7) = res; |
| 23659 | if ((s32)res != -1) |
| 23660 | { |
| 23661 | u32 newPC; |
| 23662 | |
| 23663 | newPC = GET_PC; |
| 23664 | newPC += GET_SWORD; |
| 23665 | SET_PC(newPC); |
| 23666 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23667 | RET(10) |
| 23668 | } |
| 23669 | } |
| 23670 | else |
| 23671 | { |
| 23672 | PC++; |
| 23673 | RET(12) |
| 23674 | } |
| 23675 | PC++; |
| 23676 | RET(14) |
| 23677 | } |
| 23678 | |
| 23679 | // DBCC |
| 23680 | OPCODE(0x5CC8) |
| 23681 | { |
| 23682 | u32 adr, res; |
| 23683 | u32 src, dst; |
| 23684 | |
| 23685 | NOT_POLLING |
| 23686 | |
| 23687 | if ((flag_N ^ flag_V) & 0x80) |
| 23688 | { |
| 23689 | res = DREGu16((Opcode >> 0) & 7); |
| 23690 | res--; |
| 23691 | DREGu16((Opcode >> 0) & 7) = res; |
| 23692 | if ((s32)res != -1) |
| 23693 | { |
| 23694 | u32 newPC; |
| 23695 | |
| 23696 | newPC = GET_PC; |
| 23697 | newPC += GET_SWORD; |
| 23698 | SET_PC(newPC); |
| 23699 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23700 | RET(10) |
| 23701 | } |
| 23702 | } |
| 23703 | else |
| 23704 | { |
| 23705 | PC++; |
| 23706 | RET(12) |
| 23707 | } |
| 23708 | PC++; |
| 23709 | RET(14) |
| 23710 | } |
| 23711 | |
| 23712 | // DBCC |
| 23713 | OPCODE(0x5DC8) |
| 23714 | { |
| 23715 | u32 adr, res; |
| 23716 | u32 src, dst; |
| 23717 | |
| 23718 | NOT_POLLING |
| 23719 | |
| 23720 | if (!((flag_N ^ flag_V) & 0x80)) |
| 23721 | { |
| 23722 | res = DREGu16((Opcode >> 0) & 7); |
| 23723 | res--; |
| 23724 | DREGu16((Opcode >> 0) & 7) = res; |
| 23725 | if ((s32)res != -1) |
| 23726 | { |
| 23727 | u32 newPC; |
| 23728 | |
| 23729 | newPC = GET_PC; |
| 23730 | newPC += GET_SWORD; |
| 23731 | SET_PC(newPC); |
| 23732 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23733 | RET(10) |
| 23734 | } |
| 23735 | } |
| 23736 | else |
| 23737 | { |
| 23738 | PC++; |
| 23739 | RET(12) |
| 23740 | } |
| 23741 | PC++; |
| 23742 | RET(14) |
| 23743 | } |
| 23744 | |
| 23745 | // DBCC |
| 23746 | OPCODE(0x5EC8) |
| 23747 | { |
| 23748 | u32 adr, res; |
| 23749 | u32 src, dst; |
| 23750 | |
| 23751 | NOT_POLLING |
| 23752 | |
| 23753 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 23754 | { |
| 23755 | res = DREGu16((Opcode >> 0) & 7); |
| 23756 | res--; |
| 23757 | DREGu16((Opcode >> 0) & 7) = res; |
| 23758 | if ((s32)res != -1) |
| 23759 | { |
| 23760 | u32 newPC; |
| 23761 | |
| 23762 | newPC = GET_PC; |
| 23763 | newPC += GET_SWORD; |
| 23764 | SET_PC(newPC); |
| 23765 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23766 | RET(10) |
| 23767 | } |
| 23768 | } |
| 23769 | else |
| 23770 | { |
| 23771 | PC++; |
| 23772 | RET(12) |
| 23773 | } |
| 23774 | PC++; |
| 23775 | RET(14) |
| 23776 | } |
| 23777 | |
| 23778 | // DBCC |
| 23779 | OPCODE(0x5FC8) |
| 23780 | { |
| 23781 | u32 adr, res; |
| 23782 | u32 src, dst; |
| 23783 | |
| 23784 | NOT_POLLING |
| 23785 | |
| 23786 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 23787 | { |
| 23788 | res = DREGu16((Opcode >> 0) & 7); |
| 23789 | res--; |
| 23790 | DREGu16((Opcode >> 0) & 7) = res; |
| 23791 | if ((s32)res != -1) |
| 23792 | { |
| 23793 | u32 newPC; |
| 23794 | |
| 23795 | newPC = GET_PC; |
| 23796 | newPC += GET_SWORD; |
| 23797 | SET_PC(newPC); |
| 23798 | CHECK_BRANCH_EXCEPTION(newPC) |
| 23799 | RET(10) |
| 23800 | } |
| 23801 | } |
| 23802 | else |
| 23803 | { |
| 23804 | PC++; |
| 23805 | RET(12) |
| 23806 | } |
| 23807 | PC++; |
| 23808 | RET(14) |
| 23809 | } |
| 23810 | |
| 23811 | // ADDQ |
| 23812 | OPCODE(0x5000) |
| 23813 | { |
| 23814 | u32 adr, res; |
| 23815 | u32 src, dst; |
| 23816 | |
| 23817 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23818 | dst = DREGu8((Opcode >> 0) & 7); |
| 23819 | res = dst + src; |
| 23820 | flag_N = flag_X = flag_C = res; |
| 23821 | flag_V = (src ^ res) & (dst ^ res); |
| 23822 | flag_NotZ = res & 0xFF; |
| 23823 | DREGu8((Opcode >> 0) & 7) = res; |
| 23824 | RET(4) |
| 23825 | } |
| 23826 | |
| 23827 | // ADDQ |
| 23828 | OPCODE(0x5010) |
| 23829 | { |
| 23830 | u32 adr, res; |
| 23831 | u32 src, dst; |
| 23832 | |
| 23833 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23834 | adr = AREG((Opcode >> 0) & 7); |
| 23835 | PRE_IO |
| 23836 | READ_BYTE_F(adr, dst) |
| 23837 | res = dst + src; |
| 23838 | flag_N = flag_X = flag_C = res; |
| 23839 | flag_V = (src ^ res) & (dst ^ res); |
| 23840 | flag_NotZ = res & 0xFF; |
| 23841 | WRITE_BYTE_F(adr, res) |
| 23842 | POST_IO |
| 23843 | RET(12) |
| 23844 | } |
| 23845 | |
| 23846 | // ADDQ |
| 23847 | OPCODE(0x5018) |
| 23848 | { |
| 23849 | u32 adr, res; |
| 23850 | u32 src, dst; |
| 23851 | |
| 23852 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23853 | adr = AREG((Opcode >> 0) & 7); |
| 23854 | AREG((Opcode >> 0) & 7) += 1; |
| 23855 | PRE_IO |
| 23856 | READ_BYTE_F(adr, dst) |
| 23857 | res = dst + src; |
| 23858 | flag_N = flag_X = flag_C = res; |
| 23859 | flag_V = (src ^ res) & (dst ^ res); |
| 23860 | flag_NotZ = res & 0xFF; |
| 23861 | WRITE_BYTE_F(adr, res) |
| 23862 | POST_IO |
| 23863 | RET(12) |
| 23864 | } |
| 23865 | |
| 23866 | // ADDQ |
| 23867 | OPCODE(0x5020) |
| 23868 | { |
| 23869 | u32 adr, res; |
| 23870 | u32 src, dst; |
| 23871 | |
| 23872 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23873 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 23874 | AREG((Opcode >> 0) & 7) = adr; |
| 23875 | PRE_IO |
| 23876 | READ_BYTE_F(adr, dst) |
| 23877 | res = dst + src; |
| 23878 | flag_N = flag_X = flag_C = res; |
| 23879 | flag_V = (src ^ res) & (dst ^ res); |
| 23880 | flag_NotZ = res & 0xFF; |
| 23881 | WRITE_BYTE_F(adr, res) |
| 23882 | POST_IO |
| 23883 | RET(14) |
| 23884 | } |
| 23885 | |
| 23886 | // ADDQ |
| 23887 | OPCODE(0x5028) |
| 23888 | { |
| 23889 | u32 adr, res; |
| 23890 | u32 src, dst; |
| 23891 | |
| 23892 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23893 | FETCH_SWORD(adr); |
| 23894 | adr += AREG((Opcode >> 0) & 7); |
| 23895 | PRE_IO |
| 23896 | READ_BYTE_F(adr, dst) |
| 23897 | res = dst + src; |
| 23898 | flag_N = flag_X = flag_C = res; |
| 23899 | flag_V = (src ^ res) & (dst ^ res); |
| 23900 | flag_NotZ = res & 0xFF; |
| 23901 | WRITE_BYTE_F(adr, res) |
| 23902 | POST_IO |
| 23903 | RET(16) |
| 23904 | } |
| 23905 | |
| 23906 | // ADDQ |
| 23907 | OPCODE(0x5030) |
| 23908 | { |
| 23909 | u32 adr, res; |
| 23910 | u32 src, dst; |
| 23911 | |
| 23912 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23913 | adr = AREG((Opcode >> 0) & 7); |
| 23914 | DECODE_EXT_WORD |
| 23915 | PRE_IO |
| 23916 | READ_BYTE_F(adr, dst) |
| 23917 | res = dst + src; |
| 23918 | flag_N = flag_X = flag_C = res; |
| 23919 | flag_V = (src ^ res) & (dst ^ res); |
| 23920 | flag_NotZ = res & 0xFF; |
| 23921 | WRITE_BYTE_F(adr, res) |
| 23922 | POST_IO |
| 23923 | RET(18) |
| 23924 | } |
| 23925 | |
| 23926 | // ADDQ |
| 23927 | OPCODE(0x5038) |
| 23928 | { |
| 23929 | u32 adr, res; |
| 23930 | u32 src, dst; |
| 23931 | |
| 23932 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23933 | FETCH_SWORD(adr); |
| 23934 | PRE_IO |
| 23935 | READ_BYTE_F(adr, dst) |
| 23936 | res = dst + src; |
| 23937 | flag_N = flag_X = flag_C = res; |
| 23938 | flag_V = (src ^ res) & (dst ^ res); |
| 23939 | flag_NotZ = res & 0xFF; |
| 23940 | WRITE_BYTE_F(adr, res) |
| 23941 | POST_IO |
| 23942 | RET(16) |
| 23943 | } |
| 23944 | |
| 23945 | // ADDQ |
| 23946 | OPCODE(0x5039) |
| 23947 | { |
| 23948 | u32 adr, res; |
| 23949 | u32 src, dst; |
| 23950 | |
| 23951 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23952 | FETCH_LONG(adr); |
| 23953 | PRE_IO |
| 23954 | READ_BYTE_F(adr, dst) |
| 23955 | res = dst + src; |
| 23956 | flag_N = flag_X = flag_C = res; |
| 23957 | flag_V = (src ^ res) & (dst ^ res); |
| 23958 | flag_NotZ = res & 0xFF; |
| 23959 | WRITE_BYTE_F(adr, res) |
| 23960 | POST_IO |
| 23961 | RET(20) |
| 23962 | } |
| 23963 | |
| 23964 | // ADDQ |
| 23965 | OPCODE(0x501F) |
| 23966 | { |
| 23967 | u32 adr, res; |
| 23968 | u32 src, dst; |
| 23969 | |
| 23970 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23971 | adr = AREG(7); |
| 23972 | AREG(7) += 2; |
| 23973 | PRE_IO |
| 23974 | READ_BYTE_F(adr, dst) |
| 23975 | res = dst + src; |
| 23976 | flag_N = flag_X = flag_C = res; |
| 23977 | flag_V = (src ^ res) & (dst ^ res); |
| 23978 | flag_NotZ = res & 0xFF; |
| 23979 | WRITE_BYTE_F(adr, res) |
| 23980 | POST_IO |
| 23981 | RET(12) |
| 23982 | } |
| 23983 | |
| 23984 | // ADDQ |
| 23985 | OPCODE(0x5027) |
| 23986 | { |
| 23987 | u32 adr, res; |
| 23988 | u32 src, dst; |
| 23989 | |
| 23990 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 23991 | adr = AREG(7) - 2; |
| 23992 | AREG(7) = adr; |
| 23993 | PRE_IO |
| 23994 | READ_BYTE_F(adr, dst) |
| 23995 | res = dst + src; |
| 23996 | flag_N = flag_X = flag_C = res; |
| 23997 | flag_V = (src ^ res) & (dst ^ res); |
| 23998 | flag_NotZ = res & 0xFF; |
| 23999 | WRITE_BYTE_F(adr, res) |
| 24000 | POST_IO |
| 24001 | RET(14) |
| 24002 | } |
| 24003 | |
| 24004 | // ADDQ |
| 24005 | OPCODE(0x5040) |
| 24006 | { |
| 24007 | u32 adr, res; |
| 24008 | u32 src, dst; |
| 24009 | |
| 24010 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24011 | dst = DREGu16((Opcode >> 0) & 7); |
| 24012 | res = dst + src; |
| 24013 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24014 | flag_N = flag_X = flag_C = res >> 8; |
| 24015 | flag_NotZ = res & 0xFFFF; |
| 24016 | DREGu16((Opcode >> 0) & 7) = res; |
| 24017 | RET(4) |
| 24018 | } |
| 24019 | |
| 24020 | // ADDQ |
| 24021 | OPCODE(0x5048) |
| 24022 | { |
| 24023 | u32 adr, res; |
| 24024 | u32 src, dst; |
| 24025 | |
| 24026 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24027 | dst = AREGu32((Opcode >> 0) & 7); |
| 24028 | res = dst + src; |
| 24029 | AREG((Opcode >> 0) & 7) = res; |
| 24030 | #ifdef USE_CYCLONE_TIMING |
| 24031 | RET(4) |
| 24032 | #else |
| 24033 | RET(8) |
| 24034 | #endif |
| 24035 | } |
| 24036 | |
| 24037 | // ADDQ |
| 24038 | OPCODE(0x5050) |
| 24039 | { |
| 24040 | u32 adr, res; |
| 24041 | u32 src, dst; |
| 24042 | |
| 24043 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24044 | adr = AREG((Opcode >> 0) & 7); |
| 24045 | PRE_IO |
| 24046 | READ_WORD_F(adr, dst) |
| 24047 | res = dst + src; |
| 24048 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24049 | flag_N = flag_X = flag_C = res >> 8; |
| 24050 | flag_NotZ = res & 0xFFFF; |
| 24051 | WRITE_WORD_F(adr, res) |
| 24052 | POST_IO |
| 24053 | RET(12) |
| 24054 | } |
| 24055 | |
| 24056 | // ADDQ |
| 24057 | OPCODE(0x5058) |
| 24058 | { |
| 24059 | u32 adr, res; |
| 24060 | u32 src, dst; |
| 24061 | |
| 24062 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24063 | adr = AREG((Opcode >> 0) & 7); |
| 24064 | AREG((Opcode >> 0) & 7) += 2; |
| 24065 | PRE_IO |
| 24066 | READ_WORD_F(adr, dst) |
| 24067 | res = dst + src; |
| 24068 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24069 | flag_N = flag_X = flag_C = res >> 8; |
| 24070 | flag_NotZ = res & 0xFFFF; |
| 24071 | WRITE_WORD_F(adr, res) |
| 24072 | POST_IO |
| 24073 | RET(12) |
| 24074 | } |
| 24075 | |
| 24076 | // ADDQ |
| 24077 | OPCODE(0x5060) |
| 24078 | { |
| 24079 | u32 adr, res; |
| 24080 | u32 src, dst; |
| 24081 | |
| 24082 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24083 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 24084 | AREG((Opcode >> 0) & 7) = adr; |
| 24085 | PRE_IO |
| 24086 | READ_WORD_F(adr, dst) |
| 24087 | res = dst + src; |
| 24088 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24089 | flag_N = flag_X = flag_C = res >> 8; |
| 24090 | flag_NotZ = res & 0xFFFF; |
| 24091 | WRITE_WORD_F(adr, res) |
| 24092 | POST_IO |
| 24093 | RET(14) |
| 24094 | } |
| 24095 | |
| 24096 | // ADDQ |
| 24097 | OPCODE(0x5068) |
| 24098 | { |
| 24099 | u32 adr, res; |
| 24100 | u32 src, dst; |
| 24101 | |
| 24102 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24103 | FETCH_SWORD(adr); |
| 24104 | adr += AREG((Opcode >> 0) & 7); |
| 24105 | PRE_IO |
| 24106 | READ_WORD_F(adr, dst) |
| 24107 | res = dst + src; |
| 24108 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24109 | flag_N = flag_X = flag_C = res >> 8; |
| 24110 | flag_NotZ = res & 0xFFFF; |
| 24111 | WRITE_WORD_F(adr, res) |
| 24112 | POST_IO |
| 24113 | RET(16) |
| 24114 | } |
| 24115 | |
| 24116 | // ADDQ |
| 24117 | OPCODE(0x5070) |
| 24118 | { |
| 24119 | u32 adr, res; |
| 24120 | u32 src, dst; |
| 24121 | |
| 24122 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24123 | adr = AREG((Opcode >> 0) & 7); |
| 24124 | DECODE_EXT_WORD |
| 24125 | PRE_IO |
| 24126 | READ_WORD_F(adr, dst) |
| 24127 | res = dst + src; |
| 24128 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24129 | flag_N = flag_X = flag_C = res >> 8; |
| 24130 | flag_NotZ = res & 0xFFFF; |
| 24131 | WRITE_WORD_F(adr, res) |
| 24132 | POST_IO |
| 24133 | RET(18) |
| 24134 | } |
| 24135 | |
| 24136 | // ADDQ |
| 24137 | OPCODE(0x5078) |
| 24138 | { |
| 24139 | u32 adr, res; |
| 24140 | u32 src, dst; |
| 24141 | |
| 24142 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24143 | FETCH_SWORD(adr); |
| 24144 | PRE_IO |
| 24145 | READ_WORD_F(adr, dst) |
| 24146 | res = dst + src; |
| 24147 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24148 | flag_N = flag_X = flag_C = res >> 8; |
| 24149 | flag_NotZ = res & 0xFFFF; |
| 24150 | WRITE_WORD_F(adr, res) |
| 24151 | POST_IO |
| 24152 | RET(16) |
| 24153 | } |
| 24154 | |
| 24155 | // ADDQ |
| 24156 | OPCODE(0x5079) |
| 24157 | { |
| 24158 | u32 adr, res; |
| 24159 | u32 src, dst; |
| 24160 | |
| 24161 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24162 | FETCH_LONG(adr); |
| 24163 | PRE_IO |
| 24164 | READ_WORD_F(adr, dst) |
| 24165 | res = dst + src; |
| 24166 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24167 | flag_N = flag_X = flag_C = res >> 8; |
| 24168 | flag_NotZ = res & 0xFFFF; |
| 24169 | WRITE_WORD_F(adr, res) |
| 24170 | POST_IO |
| 24171 | RET(20) |
| 24172 | } |
| 24173 | |
| 24174 | // ADDQ |
| 24175 | OPCODE(0x505F) |
| 24176 | { |
| 24177 | u32 adr, res; |
| 24178 | u32 src, dst; |
| 24179 | |
| 24180 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24181 | adr = AREG(7); |
| 24182 | AREG(7) += 2; |
| 24183 | PRE_IO |
| 24184 | READ_WORD_F(adr, dst) |
| 24185 | res = dst + src; |
| 24186 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24187 | flag_N = flag_X = flag_C = res >> 8; |
| 24188 | flag_NotZ = res & 0xFFFF; |
| 24189 | WRITE_WORD_F(adr, res) |
| 24190 | POST_IO |
| 24191 | RET(12) |
| 24192 | } |
| 24193 | |
| 24194 | // ADDQ |
| 24195 | OPCODE(0x5067) |
| 24196 | { |
| 24197 | u32 adr, res; |
| 24198 | u32 src, dst; |
| 24199 | |
| 24200 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24201 | adr = AREG(7) - 2; |
| 24202 | AREG(7) = adr; |
| 24203 | PRE_IO |
| 24204 | READ_WORD_F(adr, dst) |
| 24205 | res = dst + src; |
| 24206 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 24207 | flag_N = flag_X = flag_C = res >> 8; |
| 24208 | flag_NotZ = res & 0xFFFF; |
| 24209 | WRITE_WORD_F(adr, res) |
| 24210 | POST_IO |
| 24211 | RET(14) |
| 24212 | } |
| 24213 | |
| 24214 | // ADDQ |
| 24215 | OPCODE(0x5080) |
| 24216 | { |
| 24217 | u32 adr, res; |
| 24218 | u32 src, dst; |
| 24219 | |
| 24220 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24221 | dst = DREGu32((Opcode >> 0) & 7); |
| 24222 | res = dst + src; |
| 24223 | flag_NotZ = res; |
| 24224 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24225 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24226 | flag_N = res >> 24; |
| 24227 | DREGu32((Opcode >> 0) & 7) = res; |
| 24228 | RET(8) |
| 24229 | } |
| 24230 | |
| 24231 | // ADDQ |
| 24232 | OPCODE(0x5088) |
| 24233 | { |
| 24234 | u32 adr, res; |
| 24235 | u32 src, dst; |
| 24236 | |
| 24237 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24238 | dst = AREGu32((Opcode >> 0) & 7); |
| 24239 | res = dst + src; |
| 24240 | AREG((Opcode >> 0) & 7) = res; |
| 24241 | RET(8) |
| 24242 | } |
| 24243 | |
| 24244 | // ADDQ |
| 24245 | OPCODE(0x5090) |
| 24246 | { |
| 24247 | u32 adr, res; |
| 24248 | u32 src, dst; |
| 24249 | |
| 24250 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24251 | adr = AREG((Opcode >> 0) & 7); |
| 24252 | PRE_IO |
| 24253 | READ_LONG_F(adr, dst) |
| 24254 | res = dst + src; |
| 24255 | flag_NotZ = res; |
| 24256 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24257 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24258 | flag_N = res >> 24; |
| 24259 | WRITE_LONG_F(adr, res) |
| 24260 | POST_IO |
| 24261 | RET(20) |
| 24262 | } |
| 24263 | |
| 24264 | // ADDQ |
| 24265 | OPCODE(0x5098) |
| 24266 | { |
| 24267 | u32 adr, res; |
| 24268 | u32 src, dst; |
| 24269 | |
| 24270 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24271 | adr = AREG((Opcode >> 0) & 7); |
| 24272 | AREG((Opcode >> 0) & 7) += 4; |
| 24273 | PRE_IO |
| 24274 | READ_LONG_F(adr, dst) |
| 24275 | res = dst + src; |
| 24276 | flag_NotZ = res; |
| 24277 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24278 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24279 | flag_N = res >> 24; |
| 24280 | WRITE_LONG_F(adr, res) |
| 24281 | POST_IO |
| 24282 | RET(20) |
| 24283 | } |
| 24284 | |
| 24285 | // ADDQ |
| 24286 | OPCODE(0x50A0) |
| 24287 | { |
| 24288 | u32 adr, res; |
| 24289 | u32 src, dst; |
| 24290 | |
| 24291 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24292 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 24293 | AREG((Opcode >> 0) & 7) = adr; |
| 24294 | PRE_IO |
| 24295 | READ_LONG_F(adr, dst) |
| 24296 | res = dst + src; |
| 24297 | flag_NotZ = res; |
| 24298 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24299 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24300 | flag_N = res >> 24; |
| 24301 | WRITE_LONG_F(adr, res) |
| 24302 | POST_IO |
| 24303 | RET(22) |
| 24304 | } |
| 24305 | |
| 24306 | // ADDQ |
| 24307 | OPCODE(0x50A8) |
| 24308 | { |
| 24309 | u32 adr, res; |
| 24310 | u32 src, dst; |
| 24311 | |
| 24312 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24313 | FETCH_SWORD(adr); |
| 24314 | adr += AREG((Opcode >> 0) & 7); |
| 24315 | PRE_IO |
| 24316 | READ_LONG_F(adr, dst) |
| 24317 | res = dst + src; |
| 24318 | flag_NotZ = res; |
| 24319 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24320 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24321 | flag_N = res >> 24; |
| 24322 | WRITE_LONG_F(adr, res) |
| 24323 | POST_IO |
| 24324 | RET(24) |
| 24325 | } |
| 24326 | |
| 24327 | // ADDQ |
| 24328 | OPCODE(0x50B0) |
| 24329 | { |
| 24330 | u32 adr, res; |
| 24331 | u32 src, dst; |
| 24332 | |
| 24333 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24334 | adr = AREG((Opcode >> 0) & 7); |
| 24335 | DECODE_EXT_WORD |
| 24336 | PRE_IO |
| 24337 | READ_LONG_F(adr, dst) |
| 24338 | res = dst + src; |
| 24339 | flag_NotZ = res; |
| 24340 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24341 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24342 | flag_N = res >> 24; |
| 24343 | WRITE_LONG_F(adr, res) |
| 24344 | POST_IO |
| 24345 | RET(26) |
| 24346 | } |
| 24347 | |
| 24348 | // ADDQ |
| 24349 | OPCODE(0x50B8) |
| 24350 | { |
| 24351 | u32 adr, res; |
| 24352 | u32 src, dst; |
| 24353 | |
| 24354 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24355 | FETCH_SWORD(adr); |
| 24356 | PRE_IO |
| 24357 | READ_LONG_F(adr, dst) |
| 24358 | res = dst + src; |
| 24359 | flag_NotZ = res; |
| 24360 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24361 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24362 | flag_N = res >> 24; |
| 24363 | WRITE_LONG_F(adr, res) |
| 24364 | POST_IO |
| 24365 | RET(24) |
| 24366 | } |
| 24367 | |
| 24368 | // ADDQ |
| 24369 | OPCODE(0x50B9) |
| 24370 | { |
| 24371 | u32 adr, res; |
| 24372 | u32 src, dst; |
| 24373 | |
| 24374 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24375 | FETCH_LONG(adr); |
| 24376 | PRE_IO |
| 24377 | READ_LONG_F(adr, dst) |
| 24378 | res = dst + src; |
| 24379 | flag_NotZ = res; |
| 24380 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24381 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24382 | flag_N = res >> 24; |
| 24383 | WRITE_LONG_F(adr, res) |
| 24384 | POST_IO |
| 24385 | RET(28) |
| 24386 | } |
| 24387 | |
| 24388 | // ADDQ |
| 24389 | OPCODE(0x509F) |
| 24390 | { |
| 24391 | u32 adr, res; |
| 24392 | u32 src, dst; |
| 24393 | |
| 24394 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24395 | adr = AREG(7); |
| 24396 | AREG(7) += 4; |
| 24397 | PRE_IO |
| 24398 | READ_LONG_F(adr, dst) |
| 24399 | res = dst + src; |
| 24400 | flag_NotZ = res; |
| 24401 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24402 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24403 | flag_N = res >> 24; |
| 24404 | WRITE_LONG_F(adr, res) |
| 24405 | POST_IO |
| 24406 | RET(20) |
| 24407 | } |
| 24408 | |
| 24409 | // ADDQ |
| 24410 | OPCODE(0x50A7) |
| 24411 | { |
| 24412 | u32 adr, res; |
| 24413 | u32 src, dst; |
| 24414 | |
| 24415 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24416 | adr = AREG(7) - 4; |
| 24417 | AREG(7) = adr; |
| 24418 | PRE_IO |
| 24419 | READ_LONG_F(adr, dst) |
| 24420 | res = dst + src; |
| 24421 | flag_NotZ = res; |
| 24422 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 24423 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 24424 | flag_N = res >> 24; |
| 24425 | WRITE_LONG_F(adr, res) |
| 24426 | POST_IO |
| 24427 | RET(22) |
| 24428 | } |
| 24429 | |
| 24430 | // SUBQ |
| 24431 | OPCODE(0x5100) |
| 24432 | { |
| 24433 | u32 adr, res; |
| 24434 | u32 src, dst; |
| 24435 | |
| 24436 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24437 | dst = DREGu8((Opcode >> 0) & 7); |
| 24438 | res = dst - src; |
| 24439 | flag_N = flag_X = flag_C = res; |
| 24440 | flag_V = (src ^ dst) & (res ^ dst); |
| 24441 | flag_NotZ = res & 0xFF; |
| 24442 | DREGu8((Opcode >> 0) & 7) = res; |
| 24443 | RET(4) |
| 24444 | } |
| 24445 | |
| 24446 | // SUBQ |
| 24447 | OPCODE(0x5110) |
| 24448 | { |
| 24449 | u32 adr, res; |
| 24450 | u32 src, dst; |
| 24451 | |
| 24452 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24453 | adr = AREG((Opcode >> 0) & 7); |
| 24454 | PRE_IO |
| 24455 | READ_BYTE_F(adr, dst) |
| 24456 | res = dst - src; |
| 24457 | flag_N = flag_X = flag_C = res; |
| 24458 | flag_V = (src ^ dst) & (res ^ dst); |
| 24459 | flag_NotZ = res & 0xFF; |
| 24460 | WRITE_BYTE_F(adr, res) |
| 24461 | POST_IO |
| 24462 | RET(12) |
| 24463 | } |
| 24464 | |
| 24465 | // SUBQ |
| 24466 | OPCODE(0x5118) |
| 24467 | { |
| 24468 | u32 adr, res; |
| 24469 | u32 src, dst; |
| 24470 | |
| 24471 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24472 | adr = AREG((Opcode >> 0) & 7); |
| 24473 | AREG((Opcode >> 0) & 7) += 1; |
| 24474 | PRE_IO |
| 24475 | READ_BYTE_F(adr, dst) |
| 24476 | res = dst - src; |
| 24477 | flag_N = flag_X = flag_C = res; |
| 24478 | flag_V = (src ^ dst) & (res ^ dst); |
| 24479 | flag_NotZ = res & 0xFF; |
| 24480 | WRITE_BYTE_F(adr, res) |
| 24481 | POST_IO |
| 24482 | RET(12) |
| 24483 | } |
| 24484 | |
| 24485 | // SUBQ |
| 24486 | OPCODE(0x5120) |
| 24487 | { |
| 24488 | u32 adr, res; |
| 24489 | u32 src, dst; |
| 24490 | |
| 24491 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24492 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 24493 | AREG((Opcode >> 0) & 7) = adr; |
| 24494 | PRE_IO |
| 24495 | READ_BYTE_F(adr, dst) |
| 24496 | res = dst - src; |
| 24497 | flag_N = flag_X = flag_C = res; |
| 24498 | flag_V = (src ^ dst) & (res ^ dst); |
| 24499 | flag_NotZ = res & 0xFF; |
| 24500 | WRITE_BYTE_F(adr, res) |
| 24501 | POST_IO |
| 24502 | RET(14) |
| 24503 | } |
| 24504 | |
| 24505 | // SUBQ |
| 24506 | OPCODE(0x5128) |
| 24507 | { |
| 24508 | u32 adr, res; |
| 24509 | u32 src, dst; |
| 24510 | |
| 24511 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24512 | FETCH_SWORD(adr); |
| 24513 | adr += AREG((Opcode >> 0) & 7); |
| 24514 | PRE_IO |
| 24515 | READ_BYTE_F(adr, dst) |
| 24516 | res = dst - src; |
| 24517 | flag_N = flag_X = flag_C = res; |
| 24518 | flag_V = (src ^ dst) & (res ^ dst); |
| 24519 | flag_NotZ = res & 0xFF; |
| 24520 | WRITE_BYTE_F(adr, res) |
| 24521 | POST_IO |
| 24522 | RET(16) |
| 24523 | } |
| 24524 | |
| 24525 | // SUBQ |
| 24526 | OPCODE(0x5130) |
| 24527 | { |
| 24528 | u32 adr, res; |
| 24529 | u32 src, dst; |
| 24530 | |
| 24531 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24532 | adr = AREG((Opcode >> 0) & 7); |
| 24533 | DECODE_EXT_WORD |
| 24534 | PRE_IO |
| 24535 | READ_BYTE_F(adr, dst) |
| 24536 | res = dst - src; |
| 24537 | flag_N = flag_X = flag_C = res; |
| 24538 | flag_V = (src ^ dst) & (res ^ dst); |
| 24539 | flag_NotZ = res & 0xFF; |
| 24540 | WRITE_BYTE_F(adr, res) |
| 24541 | POST_IO |
| 24542 | RET(18) |
| 24543 | } |
| 24544 | |
| 24545 | // SUBQ |
| 24546 | OPCODE(0x5138) |
| 24547 | { |
| 24548 | u32 adr, res; |
| 24549 | u32 src, dst; |
| 24550 | |
| 24551 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24552 | FETCH_SWORD(adr); |
| 24553 | PRE_IO |
| 24554 | READ_BYTE_F(adr, dst) |
| 24555 | res = dst - src; |
| 24556 | flag_N = flag_X = flag_C = res; |
| 24557 | flag_V = (src ^ dst) & (res ^ dst); |
| 24558 | flag_NotZ = res & 0xFF; |
| 24559 | WRITE_BYTE_F(adr, res) |
| 24560 | POST_IO |
| 24561 | RET(16) |
| 24562 | } |
| 24563 | |
| 24564 | // SUBQ |
| 24565 | OPCODE(0x5139) |
| 24566 | { |
| 24567 | u32 adr, res; |
| 24568 | u32 src, dst; |
| 24569 | |
| 24570 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24571 | FETCH_LONG(adr); |
| 24572 | PRE_IO |
| 24573 | READ_BYTE_F(adr, dst) |
| 24574 | res = dst - src; |
| 24575 | flag_N = flag_X = flag_C = res; |
| 24576 | flag_V = (src ^ dst) & (res ^ dst); |
| 24577 | flag_NotZ = res & 0xFF; |
| 24578 | WRITE_BYTE_F(adr, res) |
| 24579 | POST_IO |
| 24580 | RET(20) |
| 24581 | } |
| 24582 | |
| 24583 | // SUBQ |
| 24584 | OPCODE(0x511F) |
| 24585 | { |
| 24586 | u32 adr, res; |
| 24587 | u32 src, dst; |
| 24588 | |
| 24589 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24590 | adr = AREG(7); |
| 24591 | AREG(7) += 2; |
| 24592 | PRE_IO |
| 24593 | READ_BYTE_F(adr, dst) |
| 24594 | res = dst - src; |
| 24595 | flag_N = flag_X = flag_C = res; |
| 24596 | flag_V = (src ^ dst) & (res ^ dst); |
| 24597 | flag_NotZ = res & 0xFF; |
| 24598 | WRITE_BYTE_F(adr, res) |
| 24599 | POST_IO |
| 24600 | RET(12) |
| 24601 | } |
| 24602 | |
| 24603 | // SUBQ |
| 24604 | OPCODE(0x5127) |
| 24605 | { |
| 24606 | u32 adr, res; |
| 24607 | u32 src, dst; |
| 24608 | |
| 24609 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24610 | adr = AREG(7) - 2; |
| 24611 | AREG(7) = adr; |
| 24612 | PRE_IO |
| 24613 | READ_BYTE_F(adr, dst) |
| 24614 | res = dst - src; |
| 24615 | flag_N = flag_X = flag_C = res; |
| 24616 | flag_V = (src ^ dst) & (res ^ dst); |
| 24617 | flag_NotZ = res & 0xFF; |
| 24618 | WRITE_BYTE_F(adr, res) |
| 24619 | POST_IO |
| 24620 | RET(14) |
| 24621 | } |
| 24622 | |
| 24623 | // SUBQ |
| 24624 | OPCODE(0x5140) |
| 24625 | { |
| 24626 | u32 adr, res; |
| 24627 | u32 src, dst; |
| 24628 | |
| 24629 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24630 | dst = DREGu16((Opcode >> 0) & 7); |
| 24631 | res = dst - src; |
| 24632 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24633 | flag_N = flag_X = flag_C = res >> 8; |
| 24634 | flag_NotZ = res & 0xFFFF; |
| 24635 | DREGu16((Opcode >> 0) & 7) = res; |
| 24636 | RET(4) |
| 24637 | } |
| 24638 | |
| 24639 | // SUBQ |
| 24640 | OPCODE(0x5148) |
| 24641 | { |
| 24642 | u32 adr, res; |
| 24643 | u32 src, dst; |
| 24644 | |
| 24645 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24646 | dst = AREGu32((Opcode >> 0) & 7); |
| 24647 | res = dst - src; |
| 24648 | AREG((Opcode >> 0) & 7) = res; |
| 24649 | RET(8) |
| 24650 | } |
| 24651 | |
| 24652 | // SUBQ |
| 24653 | OPCODE(0x5150) |
| 24654 | { |
| 24655 | u32 adr, res; |
| 24656 | u32 src, dst; |
| 24657 | |
| 24658 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24659 | adr = AREG((Opcode >> 0) & 7); |
| 24660 | PRE_IO |
| 24661 | READ_WORD_F(adr, dst) |
| 24662 | res = dst - src; |
| 24663 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24664 | flag_N = flag_X = flag_C = res >> 8; |
| 24665 | flag_NotZ = res & 0xFFFF; |
| 24666 | WRITE_WORD_F(adr, res) |
| 24667 | POST_IO |
| 24668 | RET(12) |
| 24669 | } |
| 24670 | |
| 24671 | // SUBQ |
| 24672 | OPCODE(0x5158) |
| 24673 | { |
| 24674 | u32 adr, res; |
| 24675 | u32 src, dst; |
| 24676 | |
| 24677 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24678 | adr = AREG((Opcode >> 0) & 7); |
| 24679 | AREG((Opcode >> 0) & 7) += 2; |
| 24680 | PRE_IO |
| 24681 | READ_WORD_F(adr, dst) |
| 24682 | res = dst - src; |
| 24683 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24684 | flag_N = flag_X = flag_C = res >> 8; |
| 24685 | flag_NotZ = res & 0xFFFF; |
| 24686 | WRITE_WORD_F(adr, res) |
| 24687 | POST_IO |
| 24688 | RET(12) |
| 24689 | } |
| 24690 | |
| 24691 | // SUBQ |
| 24692 | OPCODE(0x5160) |
| 24693 | { |
| 24694 | u32 adr, res; |
| 24695 | u32 src, dst; |
| 24696 | |
| 24697 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24698 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 24699 | AREG((Opcode >> 0) & 7) = adr; |
| 24700 | PRE_IO |
| 24701 | READ_WORD_F(adr, dst) |
| 24702 | res = dst - src; |
| 24703 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24704 | flag_N = flag_X = flag_C = res >> 8; |
| 24705 | flag_NotZ = res & 0xFFFF; |
| 24706 | WRITE_WORD_F(adr, res) |
| 24707 | POST_IO |
| 24708 | RET(14) |
| 24709 | } |
| 24710 | |
| 24711 | // SUBQ |
| 24712 | OPCODE(0x5168) |
| 24713 | { |
| 24714 | u32 adr, res; |
| 24715 | u32 src, dst; |
| 24716 | |
| 24717 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24718 | FETCH_SWORD(adr); |
| 24719 | adr += AREG((Opcode >> 0) & 7); |
| 24720 | PRE_IO |
| 24721 | READ_WORD_F(adr, dst) |
| 24722 | res = dst - src; |
| 24723 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24724 | flag_N = flag_X = flag_C = res >> 8; |
| 24725 | flag_NotZ = res & 0xFFFF; |
| 24726 | WRITE_WORD_F(adr, res) |
| 24727 | POST_IO |
| 24728 | RET(16) |
| 24729 | } |
| 24730 | |
| 24731 | // SUBQ |
| 24732 | OPCODE(0x5170) |
| 24733 | { |
| 24734 | u32 adr, res; |
| 24735 | u32 src, dst; |
| 24736 | |
| 24737 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24738 | adr = AREG((Opcode >> 0) & 7); |
| 24739 | DECODE_EXT_WORD |
| 24740 | PRE_IO |
| 24741 | READ_WORD_F(adr, dst) |
| 24742 | res = dst - src; |
| 24743 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24744 | flag_N = flag_X = flag_C = res >> 8; |
| 24745 | flag_NotZ = res & 0xFFFF; |
| 24746 | WRITE_WORD_F(adr, res) |
| 24747 | POST_IO |
| 24748 | RET(18) |
| 24749 | } |
| 24750 | |
| 24751 | // SUBQ |
| 24752 | OPCODE(0x5178) |
| 24753 | { |
| 24754 | u32 adr, res; |
| 24755 | u32 src, dst; |
| 24756 | |
| 24757 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24758 | FETCH_SWORD(adr); |
| 24759 | PRE_IO |
| 24760 | READ_WORD_F(adr, dst) |
| 24761 | res = dst - src; |
| 24762 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24763 | flag_N = flag_X = flag_C = res >> 8; |
| 24764 | flag_NotZ = res & 0xFFFF; |
| 24765 | WRITE_WORD_F(adr, res) |
| 24766 | POST_IO |
| 24767 | RET(16) |
| 24768 | } |
| 24769 | |
| 24770 | // SUBQ |
| 24771 | OPCODE(0x5179) |
| 24772 | { |
| 24773 | u32 adr, res; |
| 24774 | u32 src, dst; |
| 24775 | |
| 24776 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24777 | FETCH_LONG(adr); |
| 24778 | PRE_IO |
| 24779 | READ_WORD_F(adr, dst) |
| 24780 | res = dst - src; |
| 24781 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24782 | flag_N = flag_X = flag_C = res >> 8; |
| 24783 | flag_NotZ = res & 0xFFFF; |
| 24784 | WRITE_WORD_F(adr, res) |
| 24785 | POST_IO |
| 24786 | RET(20) |
| 24787 | } |
| 24788 | |
| 24789 | // SUBQ |
| 24790 | OPCODE(0x515F) |
| 24791 | { |
| 24792 | u32 adr, res; |
| 24793 | u32 src, dst; |
| 24794 | |
| 24795 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24796 | adr = AREG(7); |
| 24797 | AREG(7) += 2; |
| 24798 | PRE_IO |
| 24799 | READ_WORD_F(adr, dst) |
| 24800 | res = dst - src; |
| 24801 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24802 | flag_N = flag_X = flag_C = res >> 8; |
| 24803 | flag_NotZ = res & 0xFFFF; |
| 24804 | WRITE_WORD_F(adr, res) |
| 24805 | POST_IO |
| 24806 | RET(12) |
| 24807 | } |
| 24808 | |
| 24809 | // SUBQ |
| 24810 | OPCODE(0x5167) |
| 24811 | { |
| 24812 | u32 adr, res; |
| 24813 | u32 src, dst; |
| 24814 | |
| 24815 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24816 | adr = AREG(7) - 2; |
| 24817 | AREG(7) = adr; |
| 24818 | PRE_IO |
| 24819 | READ_WORD_F(adr, dst) |
| 24820 | res = dst - src; |
| 24821 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 24822 | flag_N = flag_X = flag_C = res >> 8; |
| 24823 | flag_NotZ = res & 0xFFFF; |
| 24824 | WRITE_WORD_F(adr, res) |
| 24825 | POST_IO |
| 24826 | RET(14) |
| 24827 | } |
| 24828 | |
| 24829 | // SUBQ |
| 24830 | OPCODE(0x5180) |
| 24831 | { |
| 24832 | u32 adr, res; |
| 24833 | u32 src, dst; |
| 24834 | |
| 24835 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24836 | dst = DREGu32((Opcode >> 0) & 7); |
| 24837 | res = dst - src; |
| 24838 | flag_NotZ = res; |
| 24839 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 24840 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 24841 | flag_N = res >> 24; |
| 24842 | DREGu32((Opcode >> 0) & 7) = res; |
| 24843 | RET(8) |
| 24844 | } |
| 24845 | |
| 24846 | // SUBQ |
| 24847 | OPCODE(0x5188) |
| 24848 | { |
| 24849 | u32 adr, res; |
| 24850 | u32 src, dst; |
| 24851 | |
| 24852 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24853 | dst = AREGu32((Opcode >> 0) & 7); |
| 24854 | res = dst - src; |
| 24855 | AREG((Opcode >> 0) & 7) = res; |
| 24856 | RET(8) |
| 24857 | } |
| 24858 | |
| 24859 | // SUBQ |
| 24860 | OPCODE(0x5190) |
| 24861 | { |
| 24862 | u32 adr, res; |
| 24863 | u32 src, dst; |
| 24864 | |
| 24865 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24866 | adr = AREG((Opcode >> 0) & 7); |
| 24867 | PRE_IO |
| 24868 | READ_LONG_F(adr, dst) |
| 24869 | res = dst - src; |
| 24870 | flag_NotZ = res; |
| 24871 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 24872 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 24873 | flag_N = res >> 24; |
| 24874 | WRITE_LONG_F(adr, res) |
| 24875 | POST_IO |
| 24876 | RET(20) |
| 24877 | } |
| 24878 | |
| 24879 | // SUBQ |
| 24880 | OPCODE(0x5198) |
| 24881 | { |
| 24882 | u32 adr, res; |
| 24883 | u32 src, dst; |
| 24884 | |
| 24885 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24886 | adr = AREG((Opcode >> 0) & 7); |
| 24887 | AREG((Opcode >> 0) & 7) += 4; |
| 24888 | PRE_IO |
| 24889 | READ_LONG_F(adr, dst) |
| 24890 | res = dst - src; |
| 24891 | flag_NotZ = res; |
| 24892 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 24893 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 24894 | flag_N = res >> 24; |
| 24895 | WRITE_LONG_F(adr, res) |
| 24896 | POST_IO |
| 24897 | RET(20) |
| 24898 | } |
| 24899 | |
| 24900 | // SUBQ |
| 24901 | OPCODE(0x51A0) |
| 24902 | { |
| 24903 | u32 adr, res; |
| 24904 | u32 src, dst; |
| 24905 | |
| 24906 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24907 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 24908 | AREG((Opcode >> 0) & 7) = adr; |
| 24909 | PRE_IO |
| 24910 | READ_LONG_F(adr, dst) |
| 24911 | res = dst - src; |
| 24912 | flag_NotZ = res; |
| 24913 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 24914 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 24915 | flag_N = res >> 24; |
| 24916 | WRITE_LONG_F(adr, res) |
| 24917 | POST_IO |
| 24918 | RET(22) |
| 24919 | } |
| 24920 | |
| 24921 | // SUBQ |
| 24922 | OPCODE(0x51A8) |
| 24923 | { |
| 24924 | u32 adr, res; |
| 24925 | u32 src, dst; |
| 24926 | |
| 24927 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24928 | FETCH_SWORD(adr); |
| 24929 | adr += AREG((Opcode >> 0) & 7); |
| 24930 | PRE_IO |
| 24931 | READ_LONG_F(adr, dst) |
| 24932 | res = dst - src; |
| 24933 | flag_NotZ = res; |
| 24934 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 24935 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 24936 | flag_N = res >> 24; |
| 24937 | WRITE_LONG_F(adr, res) |
| 24938 | POST_IO |
| 24939 | RET(24) |
| 24940 | } |
| 24941 | |
| 24942 | // SUBQ |
| 24943 | OPCODE(0x51B0) |
| 24944 | { |
| 24945 | u32 adr, res; |
| 24946 | u32 src, dst; |
| 24947 | |
| 24948 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24949 | adr = AREG((Opcode >> 0) & 7); |
| 24950 | DECODE_EXT_WORD |
| 24951 | PRE_IO |
| 24952 | READ_LONG_F(adr, dst) |
| 24953 | res = dst - src; |
| 24954 | flag_NotZ = res; |
| 24955 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 24956 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 24957 | flag_N = res >> 24; |
| 24958 | WRITE_LONG_F(adr, res) |
| 24959 | POST_IO |
| 24960 | RET(26) |
| 24961 | } |
| 24962 | |
| 24963 | // SUBQ |
| 24964 | OPCODE(0x51B8) |
| 24965 | { |
| 24966 | u32 adr, res; |
| 24967 | u32 src, dst; |
| 24968 | |
| 24969 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24970 | FETCH_SWORD(adr); |
| 24971 | PRE_IO |
| 24972 | READ_LONG_F(adr, dst) |
| 24973 | res = dst - src; |
| 24974 | flag_NotZ = res; |
| 24975 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 24976 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 24977 | flag_N = res >> 24; |
| 24978 | WRITE_LONG_F(adr, res) |
| 24979 | POST_IO |
| 24980 | RET(24) |
| 24981 | } |
| 24982 | |
| 24983 | // SUBQ |
| 24984 | OPCODE(0x51B9) |
| 24985 | { |
| 24986 | u32 adr, res; |
| 24987 | u32 src, dst; |
| 24988 | |
| 24989 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 24990 | FETCH_LONG(adr); |
| 24991 | PRE_IO |
| 24992 | READ_LONG_F(adr, dst) |
| 24993 | res = dst - src; |
| 24994 | flag_NotZ = res; |
| 24995 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 24996 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 24997 | flag_N = res >> 24; |
| 24998 | WRITE_LONG_F(adr, res) |
| 24999 | POST_IO |
| 25000 | RET(28) |
| 25001 | } |
| 25002 | |
| 25003 | // SUBQ |
| 25004 | OPCODE(0x519F) |
| 25005 | { |
| 25006 | u32 adr, res; |
| 25007 | u32 src, dst; |
| 25008 | |
| 25009 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 25010 | adr = AREG(7); |
| 25011 | AREG(7) += 4; |
| 25012 | PRE_IO |
| 25013 | READ_LONG_F(adr, dst) |
| 25014 | res = dst - src; |
| 25015 | flag_NotZ = res; |
| 25016 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 25017 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 25018 | flag_N = res >> 24; |
| 25019 | WRITE_LONG_F(adr, res) |
| 25020 | POST_IO |
| 25021 | RET(20) |
| 25022 | } |
| 25023 | |
| 25024 | // SUBQ |
| 25025 | OPCODE(0x51A7) |
| 25026 | { |
| 25027 | u32 adr, res; |
| 25028 | u32 src, dst; |
| 25029 | |
| 25030 | src = (((Opcode >> 9) - 1) & 7) + 1; |
| 25031 | adr = AREG(7) - 4; |
| 25032 | AREG(7) = adr; |
| 25033 | PRE_IO |
| 25034 | READ_LONG_F(adr, dst) |
| 25035 | res = dst - src; |
| 25036 | flag_NotZ = res; |
| 25037 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 25038 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 25039 | flag_N = res >> 24; |
| 25040 | WRITE_LONG_F(adr, res) |
| 25041 | POST_IO |
| 25042 | RET(22) |
| 25043 | } |
| 25044 | |
| 25045 | // BCC |
| 25046 | OPCODE(0x6201) |
| 25047 | { |
| 25048 | u32 adr, res; |
| 25049 | u32 src, dst; |
| 25050 | |
| 25051 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 25052 | { |
| 25053 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25054 | m68kcontext.io_cycle_counter -= 2; |
| 25055 | } |
| 25056 | RET(8) |
| 25057 | } |
| 25058 | |
| 25059 | // BCC |
| 25060 | OPCODE(0x6301) |
| 25061 | { |
| 25062 | u32 adr, res; |
| 25063 | u32 src, dst; |
| 25064 | |
| 25065 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 25066 | { |
| 25067 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25068 | m68kcontext.io_cycle_counter -= 2; |
| 25069 | } |
| 25070 | RET(8) |
| 25071 | } |
| 25072 | |
| 25073 | // BCC |
| 25074 | OPCODE(0x6401) |
| 25075 | { |
| 25076 | u32 adr, res; |
| 25077 | u32 src, dst; |
| 25078 | |
| 25079 | if (!(flag_C & 0x100)) |
| 25080 | { |
| 25081 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25082 | m68kcontext.io_cycle_counter -= 2; |
| 25083 | } |
| 25084 | RET(8) |
| 25085 | } |
| 25086 | |
| 25087 | // BCC |
| 25088 | OPCODE(0x6501) |
| 25089 | { |
| 25090 | u32 adr, res; |
| 25091 | u32 src, dst; |
| 25092 | |
| 25093 | if (flag_C & 0x100) |
| 25094 | { |
| 25095 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25096 | m68kcontext.io_cycle_counter -= 2; |
| 25097 | } |
| 25098 | RET(8) |
| 25099 | } |
| 25100 | |
| 25101 | // BCC |
| 25102 | OPCODE(0x6601) |
| 25103 | { |
| 25104 | u32 adr, res; |
| 25105 | u32 src, dst; |
| 25106 | |
| 25107 | if (flag_NotZ) |
| 25108 | { |
| 25109 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25110 | m68kcontext.io_cycle_counter -= 2; |
| 25111 | } |
| 25112 | RET(8) |
| 25113 | } |
| 25114 | |
| 25115 | // BCC |
| 25116 | OPCODE(0x6701) |
| 25117 | { |
| 25118 | u32 adr, res; |
| 25119 | u32 src, dst; |
| 25120 | |
| 25121 | if (!flag_NotZ) |
| 25122 | { |
| 25123 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25124 | m68kcontext.io_cycle_counter -= 2; |
| 25125 | } |
| 25126 | RET(8) |
| 25127 | } |
| 25128 | |
| 25129 | // BCC |
| 25130 | OPCODE(0x6801) |
| 25131 | { |
| 25132 | u32 adr, res; |
| 25133 | u32 src, dst; |
| 25134 | |
| 25135 | if (!(flag_V & 0x80)) |
| 25136 | { |
| 25137 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25138 | m68kcontext.io_cycle_counter -= 2; |
| 25139 | } |
| 25140 | RET(8) |
| 25141 | } |
| 25142 | |
| 25143 | // BCC |
| 25144 | OPCODE(0x6901) |
| 25145 | { |
| 25146 | u32 adr, res; |
| 25147 | u32 src, dst; |
| 25148 | |
| 25149 | if (flag_V & 0x80) |
| 25150 | { |
| 25151 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25152 | m68kcontext.io_cycle_counter -= 2; |
| 25153 | } |
| 25154 | RET(8) |
| 25155 | } |
| 25156 | |
| 25157 | // BCC |
| 25158 | OPCODE(0x6A01) |
| 25159 | { |
| 25160 | u32 adr, res; |
| 25161 | u32 src, dst; |
| 25162 | |
| 25163 | if (!(flag_N & 0x80)) |
| 25164 | { |
| 25165 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25166 | m68kcontext.io_cycle_counter -= 2; |
| 25167 | } |
| 25168 | RET(8) |
| 25169 | } |
| 25170 | |
| 25171 | // BCC |
| 25172 | OPCODE(0x6B01) |
| 25173 | { |
| 25174 | u32 adr, res; |
| 25175 | u32 src, dst; |
| 25176 | |
| 25177 | if (flag_N & 0x80) |
| 25178 | { |
| 25179 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25180 | m68kcontext.io_cycle_counter -= 2; |
| 25181 | } |
| 25182 | RET(8) |
| 25183 | } |
| 25184 | |
| 25185 | // BCC |
| 25186 | OPCODE(0x6C01) |
| 25187 | { |
| 25188 | u32 adr, res; |
| 25189 | u32 src, dst; |
| 25190 | |
| 25191 | if (!((flag_N ^ flag_V) & 0x80)) |
| 25192 | { |
| 25193 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25194 | m68kcontext.io_cycle_counter -= 2; |
| 25195 | } |
| 25196 | RET(8) |
| 25197 | } |
| 25198 | |
| 25199 | // BCC |
| 25200 | OPCODE(0x6D01) |
| 25201 | { |
| 25202 | u32 adr, res; |
| 25203 | u32 src, dst; |
| 25204 | |
| 25205 | if ((flag_N ^ flag_V) & 0x80) |
| 25206 | { |
| 25207 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25208 | m68kcontext.io_cycle_counter -= 2; |
| 25209 | } |
| 25210 | RET(8) |
| 25211 | } |
| 25212 | |
| 25213 | // BCC |
| 25214 | OPCODE(0x6E01) |
| 25215 | { |
| 25216 | u32 adr, res; |
| 25217 | u32 src, dst; |
| 25218 | |
| 25219 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 25220 | { |
| 25221 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25222 | m68kcontext.io_cycle_counter -= 2; |
| 25223 | } |
| 25224 | RET(8) |
| 25225 | } |
| 25226 | |
| 25227 | // BCC |
| 25228 | OPCODE(0x6F01) |
| 25229 | { |
| 25230 | u32 adr, res; |
| 25231 | u32 src, dst; |
| 25232 | |
| 25233 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 25234 | { |
| 25235 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25236 | m68kcontext.io_cycle_counter -= 2; |
| 25237 | } |
| 25238 | RET(8) |
| 25239 | } |
| 25240 | |
| 25241 | // BCC16 |
| 25242 | OPCODE(0x6200) |
| 25243 | { |
| 25244 | u32 adr, res; |
| 25245 | u32 src, dst; |
| 25246 | |
| 25247 | if (flag_NotZ && (!(flag_C & 0x100))) |
| 25248 | { |
| 25249 | u32 newPC; |
| 25250 | |
| 25251 | newPC = GET_PC; |
| 25252 | newPC += GET_SWORD; |
| 25253 | SET_PC(newPC); |
| 25254 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25255 | RET(10) |
| 25256 | } |
| 25257 | PC++; |
| 25258 | RET(12) |
| 25259 | } |
| 25260 | |
| 25261 | // BCC16 |
| 25262 | OPCODE(0x6300) |
| 25263 | { |
| 25264 | u32 adr, res; |
| 25265 | u32 src, dst; |
| 25266 | |
| 25267 | if ((!flag_NotZ) || (flag_C & 0x100)) |
| 25268 | { |
| 25269 | u32 newPC; |
| 25270 | |
| 25271 | newPC = GET_PC; |
| 25272 | newPC += GET_SWORD; |
| 25273 | SET_PC(newPC); |
| 25274 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25275 | RET(10) |
| 25276 | } |
| 25277 | PC++; |
| 25278 | RET(12) |
| 25279 | } |
| 25280 | |
| 25281 | // BCC16 |
| 25282 | OPCODE(0x6400) |
| 25283 | { |
| 25284 | u32 adr, res; |
| 25285 | u32 src, dst; |
| 25286 | |
| 25287 | if (!(flag_C & 0x100)) |
| 25288 | { |
| 25289 | u32 newPC; |
| 25290 | |
| 25291 | newPC = GET_PC; |
| 25292 | newPC += GET_SWORD; |
| 25293 | SET_PC(newPC); |
| 25294 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25295 | RET(10) |
| 25296 | } |
| 25297 | PC++; |
| 25298 | RET(12) |
| 25299 | } |
| 25300 | |
| 25301 | // BCC16 |
| 25302 | OPCODE(0x6500) |
| 25303 | { |
| 25304 | u32 adr, res; |
| 25305 | u32 src, dst; |
| 25306 | |
| 25307 | if (flag_C & 0x100) |
| 25308 | { |
| 25309 | u32 newPC; |
| 25310 | |
| 25311 | newPC = GET_PC; |
| 25312 | newPC += GET_SWORD; |
| 25313 | SET_PC(newPC); |
| 25314 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25315 | RET(10) |
| 25316 | } |
| 25317 | PC++; |
| 25318 | RET(12) |
| 25319 | } |
| 25320 | |
| 25321 | // BCC16 |
| 25322 | OPCODE(0x6600) |
| 25323 | { |
| 25324 | u32 adr, res; |
| 25325 | u32 src, dst; |
| 25326 | |
| 25327 | if (flag_NotZ) |
| 25328 | { |
| 25329 | u32 newPC; |
| 25330 | |
| 25331 | newPC = GET_PC; |
| 25332 | newPC += GET_SWORD; |
| 25333 | SET_PC(newPC); |
| 25334 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25335 | RET(10) |
| 25336 | } |
| 25337 | PC++; |
| 25338 | RET(12) |
| 25339 | } |
| 25340 | |
| 25341 | // BCC16 |
| 25342 | OPCODE(0x6700) |
| 25343 | { |
| 25344 | u32 adr, res; |
| 25345 | u32 src, dst; |
| 25346 | |
| 25347 | if (!flag_NotZ) |
| 25348 | { |
| 25349 | u32 newPC; |
| 25350 | |
| 25351 | newPC = GET_PC; |
| 25352 | newPC += GET_SWORD; |
| 25353 | SET_PC(newPC); |
| 25354 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25355 | RET(10) |
| 25356 | } |
| 25357 | PC++; |
| 25358 | RET(12) |
| 25359 | } |
| 25360 | |
| 25361 | // BCC16 |
| 25362 | OPCODE(0x6800) |
| 25363 | { |
| 25364 | u32 adr, res; |
| 25365 | u32 src, dst; |
| 25366 | |
| 25367 | if (!(flag_V & 0x80)) |
| 25368 | { |
| 25369 | u32 newPC; |
| 25370 | |
| 25371 | newPC = GET_PC; |
| 25372 | newPC += GET_SWORD; |
| 25373 | SET_PC(newPC); |
| 25374 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25375 | RET(10) |
| 25376 | } |
| 25377 | PC++; |
| 25378 | RET(12) |
| 25379 | } |
| 25380 | |
| 25381 | // BCC16 |
| 25382 | OPCODE(0x6900) |
| 25383 | { |
| 25384 | u32 adr, res; |
| 25385 | u32 src, dst; |
| 25386 | |
| 25387 | if (flag_V & 0x80) |
| 25388 | { |
| 25389 | u32 newPC; |
| 25390 | |
| 25391 | newPC = GET_PC; |
| 25392 | newPC += GET_SWORD; |
| 25393 | SET_PC(newPC); |
| 25394 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25395 | RET(10) |
| 25396 | } |
| 25397 | PC++; |
| 25398 | RET(12) |
| 25399 | } |
| 25400 | |
| 25401 | // BCC16 |
| 25402 | OPCODE(0x6A00) |
| 25403 | { |
| 25404 | u32 adr, res; |
| 25405 | u32 src, dst; |
| 25406 | |
| 25407 | if (!(flag_N & 0x80)) |
| 25408 | { |
| 25409 | u32 newPC; |
| 25410 | |
| 25411 | newPC = GET_PC; |
| 25412 | newPC += GET_SWORD; |
| 25413 | SET_PC(newPC); |
| 25414 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25415 | RET(10) |
| 25416 | } |
| 25417 | PC++; |
| 25418 | RET(12) |
| 25419 | } |
| 25420 | |
| 25421 | // BCC16 |
| 25422 | OPCODE(0x6B00) |
| 25423 | { |
| 25424 | u32 adr, res; |
| 25425 | u32 src, dst; |
| 25426 | |
| 25427 | if (flag_N & 0x80) |
| 25428 | { |
| 25429 | u32 newPC; |
| 25430 | |
| 25431 | newPC = GET_PC; |
| 25432 | newPC += GET_SWORD; |
| 25433 | SET_PC(newPC); |
| 25434 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25435 | RET(10) |
| 25436 | } |
| 25437 | PC++; |
| 25438 | RET(12) |
| 25439 | } |
| 25440 | |
| 25441 | // BCC16 |
| 25442 | OPCODE(0x6C00) |
| 25443 | { |
| 25444 | u32 adr, res; |
| 25445 | u32 src, dst; |
| 25446 | |
| 25447 | if (!((flag_N ^ flag_V) & 0x80)) |
| 25448 | { |
| 25449 | u32 newPC; |
| 25450 | |
| 25451 | newPC = GET_PC; |
| 25452 | newPC += GET_SWORD; |
| 25453 | SET_PC(newPC); |
| 25454 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25455 | RET(10) |
| 25456 | } |
| 25457 | PC++; |
| 25458 | RET(12) |
| 25459 | } |
| 25460 | |
| 25461 | // BCC16 |
| 25462 | OPCODE(0x6D00) |
| 25463 | { |
| 25464 | u32 adr, res; |
| 25465 | u32 src, dst; |
| 25466 | |
| 25467 | if ((flag_N ^ flag_V) & 0x80) |
| 25468 | { |
| 25469 | u32 newPC; |
| 25470 | |
| 25471 | newPC = GET_PC; |
| 25472 | newPC += GET_SWORD; |
| 25473 | SET_PC(newPC); |
| 25474 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25475 | RET(10) |
| 25476 | } |
| 25477 | PC++; |
| 25478 | RET(12) |
| 25479 | } |
| 25480 | |
| 25481 | // BCC16 |
| 25482 | OPCODE(0x6E00) |
| 25483 | { |
| 25484 | u32 adr, res; |
| 25485 | u32 src, dst; |
| 25486 | |
| 25487 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
| 25488 | { |
| 25489 | u32 newPC; |
| 25490 | |
| 25491 | newPC = GET_PC; |
| 25492 | newPC += GET_SWORD; |
| 25493 | SET_PC(newPC); |
| 25494 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25495 | RET(10) |
| 25496 | } |
| 25497 | PC++; |
| 25498 | RET(12) |
| 25499 | } |
| 25500 | |
| 25501 | // BCC16 |
| 25502 | OPCODE(0x6F00) |
| 25503 | { |
| 25504 | u32 adr, res; |
| 25505 | u32 src, dst; |
| 25506 | |
| 25507 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
| 25508 | { |
| 25509 | u32 newPC; |
| 25510 | |
| 25511 | newPC = GET_PC; |
| 25512 | newPC += GET_SWORD; |
| 25513 | SET_PC(newPC); |
| 25514 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25515 | RET(10) |
| 25516 | } |
| 25517 | PC++; |
| 25518 | RET(12) |
| 25519 | } |
| 25520 | |
| 25521 | // BRA |
| 25522 | OPCODE(0x6001) |
| 25523 | { |
| 25524 | #ifdef FAMEC_CHECK_BRANCHES |
| 25525 | u32 newPC = GET_PC; |
| 25526 | s8 offs=Opcode; |
| 25527 | newPC += offs; |
| 25528 | SET_PC(newPC); |
| 25529 | CHECK_BRANCH_EXCEPTION(offs) |
| 25530 | #else |
| 25531 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25532 | #endif |
| 25533 | RET(10) |
| 25534 | } |
| 25535 | |
| 25536 | // BRA16 |
| 25537 | OPCODE(0x6000) |
| 25538 | { |
| 25539 | u32 adr, res; |
| 25540 | u32 src, dst; |
| 25541 | |
| 25542 | { |
| 25543 | u32 newPC; |
| 25544 | |
| 25545 | newPC = GET_PC; |
| 25546 | newPC += GET_SWORD; |
| 25547 | SET_PC(newPC); |
| 25548 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25549 | } |
| 25550 | RET(10) |
| 25551 | } |
| 25552 | |
| 25553 | // BSR |
| 25554 | OPCODE(0x6101) |
| 25555 | { |
| 25556 | u32 adr, res; |
| 25557 | u32 src, dst; |
| 25558 | u32 oldPC; |
| 25559 | s8 offs; |
| 25560 | |
| 25561 | PRE_IO |
| 25562 | |
| 25563 | oldPC = GET_PC; |
| 25564 | PUSH_32_F(oldPC) |
| 25565 | #ifdef FAMEC_CHECK_BRANCHES |
| 25566 | offs = Opcode; |
| 25567 | oldPC += offs; |
| 25568 | SET_PC(oldPC); |
| 25569 | CHECK_BRANCH_EXCEPTION(offs) |
| 25570 | #else |
| 25571 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 25572 | #endif |
| 25573 | POST_IO |
| 25574 | RET(18) |
| 25575 | } |
| 25576 | |
| 25577 | // BSR16 |
| 25578 | OPCODE(0x6100) |
| 25579 | { |
| 25580 | u32 adr, res; |
| 25581 | u32 src, dst; |
| 25582 | |
| 25583 | PRE_IO |
| 25584 | { |
| 25585 | u32 oldPC, newPC; |
| 25586 | |
| 25587 | newPC = GET_PC; |
| 25588 | oldPC = newPC + 2; |
| 25589 | PUSH_32_F(oldPC) |
| 25590 | newPC += GET_SWORD; |
| 25591 | SET_PC(newPC); |
| 25592 | CHECK_BRANCH_EXCEPTION(newPC) |
| 25593 | } |
| 25594 | POST_IO |
| 25595 | RET(18) |
| 25596 | } |
| 25597 | |
| 25598 | // MOVEQ |
| 25599 | OPCODE(0x7000) |
| 25600 | { |
| 25601 | u32 adr, res; |
| 25602 | u32 src, dst; |
| 25603 | |
| 25604 | res = (s32)(s8)Opcode; |
| 25605 | flag_C = flag_V = 0; |
| 25606 | flag_N = flag_NotZ = res; |
| 25607 | DREGu32((Opcode >> 9) & 7) = res; |
| 25608 | RET(4) |
| 25609 | } |
| 25610 | |
| 25611 | // ORaD |
| 25612 | OPCODE(0x8000) |
| 25613 | { |
| 25614 | u32 adr, res; |
| 25615 | u32 src, dst; |
| 25616 | |
| 25617 | src = DREGu8((Opcode >> 0) & 7); |
| 25618 | res = DREGu8((Opcode >> 9) & 7); |
| 25619 | res |= src; |
| 25620 | flag_C = 0; |
| 25621 | flag_V = 0; |
| 25622 | flag_NotZ = res; |
| 25623 | flag_N = res; |
| 25624 | DREGu8((Opcode >> 9) & 7) = res; |
| 25625 | RET(4) |
| 25626 | } |
| 25627 | |
| 25628 | // ORaD |
| 25629 | OPCODE(0x8010) |
| 25630 | { |
| 25631 | u32 adr, res; |
| 25632 | u32 src, dst; |
| 25633 | |
| 25634 | adr = AREG((Opcode >> 0) & 7); |
| 25635 | PRE_IO |
| 25636 | READ_BYTE_F(adr, src) |
| 25637 | res = DREGu8((Opcode >> 9) & 7); |
| 25638 | res |= src; |
| 25639 | flag_C = 0; |
| 25640 | flag_V = 0; |
| 25641 | flag_NotZ = res; |
| 25642 | flag_N = res; |
| 25643 | DREGu8((Opcode >> 9) & 7) = res; |
| 25644 | POST_IO |
| 25645 | RET(8) |
| 25646 | } |
| 25647 | |
| 25648 | // ORaD |
| 25649 | OPCODE(0x8018) |
| 25650 | { |
| 25651 | u32 adr, res; |
| 25652 | u32 src, dst; |
| 25653 | |
| 25654 | adr = AREG((Opcode >> 0) & 7); |
| 25655 | AREG((Opcode >> 0) & 7) += 1; |
| 25656 | PRE_IO |
| 25657 | READ_BYTE_F(adr, src) |
| 25658 | res = DREGu8((Opcode >> 9) & 7); |
| 25659 | res |= src; |
| 25660 | flag_C = 0; |
| 25661 | flag_V = 0; |
| 25662 | flag_NotZ = res; |
| 25663 | flag_N = res; |
| 25664 | DREGu8((Opcode >> 9) & 7) = res; |
| 25665 | POST_IO |
| 25666 | RET(8) |
| 25667 | } |
| 25668 | |
| 25669 | // ORaD |
| 25670 | OPCODE(0x8020) |
| 25671 | { |
| 25672 | u32 adr, res; |
| 25673 | u32 src, dst; |
| 25674 | |
| 25675 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 25676 | AREG((Opcode >> 0) & 7) = adr; |
| 25677 | PRE_IO |
| 25678 | READ_BYTE_F(adr, src) |
| 25679 | res = DREGu8((Opcode >> 9) & 7); |
| 25680 | res |= src; |
| 25681 | flag_C = 0; |
| 25682 | flag_V = 0; |
| 25683 | flag_NotZ = res; |
| 25684 | flag_N = res; |
| 25685 | DREGu8((Opcode >> 9) & 7) = res; |
| 25686 | POST_IO |
| 25687 | RET(10) |
| 25688 | } |
| 25689 | |
| 25690 | // ORaD |
| 25691 | OPCODE(0x8028) |
| 25692 | { |
| 25693 | u32 adr, res; |
| 25694 | u32 src, dst; |
| 25695 | |
| 25696 | FETCH_SWORD(adr); |
| 25697 | adr += AREG((Opcode >> 0) & 7); |
| 25698 | PRE_IO |
| 25699 | READ_BYTE_F(adr, src) |
| 25700 | res = DREGu8((Opcode >> 9) & 7); |
| 25701 | res |= src; |
| 25702 | flag_C = 0; |
| 25703 | flag_V = 0; |
| 25704 | flag_NotZ = res; |
| 25705 | flag_N = res; |
| 25706 | DREGu8((Opcode >> 9) & 7) = res; |
| 25707 | POST_IO |
| 25708 | RET(12) |
| 25709 | } |
| 25710 | |
| 25711 | // ORaD |
| 25712 | OPCODE(0x8030) |
| 25713 | { |
| 25714 | u32 adr, res; |
| 25715 | u32 src, dst; |
| 25716 | |
| 25717 | adr = AREG((Opcode >> 0) & 7); |
| 25718 | DECODE_EXT_WORD |
| 25719 | PRE_IO |
| 25720 | READ_BYTE_F(adr, src) |
| 25721 | res = DREGu8((Opcode >> 9) & 7); |
| 25722 | res |= src; |
| 25723 | flag_C = 0; |
| 25724 | flag_V = 0; |
| 25725 | flag_NotZ = res; |
| 25726 | flag_N = res; |
| 25727 | DREGu8((Opcode >> 9) & 7) = res; |
| 25728 | POST_IO |
| 25729 | RET(14) |
| 25730 | } |
| 25731 | |
| 25732 | // ORaD |
| 25733 | OPCODE(0x8038) |
| 25734 | { |
| 25735 | u32 adr, res; |
| 25736 | u32 src, dst; |
| 25737 | |
| 25738 | FETCH_SWORD(adr); |
| 25739 | PRE_IO |
| 25740 | READ_BYTE_F(adr, src) |
| 25741 | res = DREGu8((Opcode >> 9) & 7); |
| 25742 | res |= src; |
| 25743 | flag_C = 0; |
| 25744 | flag_V = 0; |
| 25745 | flag_NotZ = res; |
| 25746 | flag_N = res; |
| 25747 | DREGu8((Opcode >> 9) & 7) = res; |
| 25748 | POST_IO |
| 25749 | RET(12) |
| 25750 | } |
| 25751 | |
| 25752 | // ORaD |
| 25753 | OPCODE(0x8039) |
| 25754 | { |
| 25755 | u32 adr, res; |
| 25756 | u32 src, dst; |
| 25757 | |
| 25758 | FETCH_LONG(adr); |
| 25759 | PRE_IO |
| 25760 | READ_BYTE_F(adr, src) |
| 25761 | res = DREGu8((Opcode >> 9) & 7); |
| 25762 | res |= src; |
| 25763 | flag_C = 0; |
| 25764 | flag_V = 0; |
| 25765 | flag_NotZ = res; |
| 25766 | flag_N = res; |
| 25767 | DREGu8((Opcode >> 9) & 7) = res; |
| 25768 | POST_IO |
| 25769 | RET(16) |
| 25770 | } |
| 25771 | |
| 25772 | // ORaD |
| 25773 | OPCODE(0x803A) |
| 25774 | { |
| 25775 | u32 adr, res; |
| 25776 | u32 src, dst; |
| 25777 | |
| 25778 | adr = GET_SWORD + GET_PC; |
| 25779 | PC++; |
| 25780 | PRE_IO |
| 25781 | READ_BYTE_F(adr, src) |
| 25782 | res = DREGu8((Opcode >> 9) & 7); |
| 25783 | res |= src; |
| 25784 | flag_C = 0; |
| 25785 | flag_V = 0; |
| 25786 | flag_NotZ = res; |
| 25787 | flag_N = res; |
| 25788 | DREGu8((Opcode >> 9) & 7) = res; |
| 25789 | POST_IO |
| 25790 | RET(12) |
| 25791 | } |
| 25792 | |
| 25793 | // ORaD |
| 25794 | OPCODE(0x803B) |
| 25795 | { |
| 25796 | u32 adr, res; |
| 25797 | u32 src, dst; |
| 25798 | |
| 25799 | adr = GET_PC; |
| 25800 | DECODE_EXT_WORD |
| 25801 | PRE_IO |
| 25802 | READ_BYTE_F(adr, src) |
| 25803 | res = DREGu8((Opcode >> 9) & 7); |
| 25804 | res |= src; |
| 25805 | flag_C = 0; |
| 25806 | flag_V = 0; |
| 25807 | flag_NotZ = res; |
| 25808 | flag_N = res; |
| 25809 | DREGu8((Opcode >> 9) & 7) = res; |
| 25810 | POST_IO |
| 25811 | RET(14) |
| 25812 | } |
| 25813 | |
| 25814 | // ORaD |
| 25815 | OPCODE(0x803C) |
| 25816 | { |
| 25817 | u32 adr, res; |
| 25818 | u32 src, dst; |
| 25819 | |
| 25820 | FETCH_BYTE(src); |
| 25821 | res = DREGu8((Opcode >> 9) & 7); |
| 25822 | res |= src; |
| 25823 | flag_C = 0; |
| 25824 | flag_V = 0; |
| 25825 | flag_NotZ = res; |
| 25826 | flag_N = res; |
| 25827 | DREGu8((Opcode >> 9) & 7) = res; |
| 25828 | RET(8) |
| 25829 | } |
| 25830 | |
| 25831 | // ORaD |
| 25832 | OPCODE(0x801F) |
| 25833 | { |
| 25834 | u32 adr, res; |
| 25835 | u32 src, dst; |
| 25836 | |
| 25837 | adr = AREG(7); |
| 25838 | AREG(7) += 2; |
| 25839 | PRE_IO |
| 25840 | READ_BYTE_F(adr, src) |
| 25841 | res = DREGu8((Opcode >> 9) & 7); |
| 25842 | res |= src; |
| 25843 | flag_C = 0; |
| 25844 | flag_V = 0; |
| 25845 | flag_NotZ = res; |
| 25846 | flag_N = res; |
| 25847 | DREGu8((Opcode >> 9) & 7) = res; |
| 25848 | POST_IO |
| 25849 | RET(8) |
| 25850 | } |
| 25851 | |
| 25852 | // ORaD |
| 25853 | OPCODE(0x8027) |
| 25854 | { |
| 25855 | u32 adr, res; |
| 25856 | u32 src, dst; |
| 25857 | |
| 25858 | adr = AREG(7) - 2; |
| 25859 | AREG(7) = adr; |
| 25860 | PRE_IO |
| 25861 | READ_BYTE_F(adr, src) |
| 25862 | res = DREGu8((Opcode >> 9) & 7); |
| 25863 | res |= src; |
| 25864 | flag_C = 0; |
| 25865 | flag_V = 0; |
| 25866 | flag_NotZ = res; |
| 25867 | flag_N = res; |
| 25868 | DREGu8((Opcode >> 9) & 7) = res; |
| 25869 | POST_IO |
| 25870 | RET(10) |
| 25871 | } |
| 25872 | |
| 25873 | // ORaD |
| 25874 | OPCODE(0x8040) |
| 25875 | { |
| 25876 | u32 adr, res; |
| 25877 | u32 src, dst; |
| 25878 | |
| 25879 | src = DREGu16((Opcode >> 0) & 7); |
| 25880 | res = DREGu16((Opcode >> 9) & 7); |
| 25881 | res |= src; |
| 25882 | flag_C = 0; |
| 25883 | flag_V = 0; |
| 25884 | flag_NotZ = res; |
| 25885 | flag_N = res >> 8; |
| 25886 | DREGu16((Opcode >> 9) & 7) = res; |
| 25887 | RET(4) |
| 25888 | } |
| 25889 | |
| 25890 | // ORaD |
| 25891 | OPCODE(0x8050) |
| 25892 | { |
| 25893 | u32 adr, res; |
| 25894 | u32 src, dst; |
| 25895 | |
| 25896 | adr = AREG((Opcode >> 0) & 7); |
| 25897 | PRE_IO |
| 25898 | READ_WORD_F(adr, src) |
| 25899 | res = DREGu16((Opcode >> 9) & 7); |
| 25900 | res |= src; |
| 25901 | flag_C = 0; |
| 25902 | flag_V = 0; |
| 25903 | flag_NotZ = res; |
| 25904 | flag_N = res >> 8; |
| 25905 | DREGu16((Opcode >> 9) & 7) = res; |
| 25906 | POST_IO |
| 25907 | RET(8) |
| 25908 | } |
| 25909 | |
| 25910 | // ORaD |
| 25911 | OPCODE(0x8058) |
| 25912 | { |
| 25913 | u32 adr, res; |
| 25914 | u32 src, dst; |
| 25915 | |
| 25916 | adr = AREG((Opcode >> 0) & 7); |
| 25917 | AREG((Opcode >> 0) & 7) += 2; |
| 25918 | PRE_IO |
| 25919 | READ_WORD_F(adr, src) |
| 25920 | res = DREGu16((Opcode >> 9) & 7); |
| 25921 | res |= src; |
| 25922 | flag_C = 0; |
| 25923 | flag_V = 0; |
| 25924 | flag_NotZ = res; |
| 25925 | flag_N = res >> 8; |
| 25926 | DREGu16((Opcode >> 9) & 7) = res; |
| 25927 | POST_IO |
| 25928 | RET(8) |
| 25929 | } |
| 25930 | |
| 25931 | // ORaD |
| 25932 | OPCODE(0x8060) |
| 25933 | { |
| 25934 | u32 adr, res; |
| 25935 | u32 src, dst; |
| 25936 | |
| 25937 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 25938 | AREG((Opcode >> 0) & 7) = adr; |
| 25939 | PRE_IO |
| 25940 | READ_WORD_F(adr, src) |
| 25941 | res = DREGu16((Opcode >> 9) & 7); |
| 25942 | res |= src; |
| 25943 | flag_C = 0; |
| 25944 | flag_V = 0; |
| 25945 | flag_NotZ = res; |
| 25946 | flag_N = res >> 8; |
| 25947 | DREGu16((Opcode >> 9) & 7) = res; |
| 25948 | POST_IO |
| 25949 | RET(10) |
| 25950 | } |
| 25951 | |
| 25952 | // ORaD |
| 25953 | OPCODE(0x8068) |
| 25954 | { |
| 25955 | u32 adr, res; |
| 25956 | u32 src, dst; |
| 25957 | |
| 25958 | FETCH_SWORD(adr); |
| 25959 | adr += AREG((Opcode >> 0) & 7); |
| 25960 | PRE_IO |
| 25961 | READ_WORD_F(adr, src) |
| 25962 | res = DREGu16((Opcode >> 9) & 7); |
| 25963 | res |= src; |
| 25964 | flag_C = 0; |
| 25965 | flag_V = 0; |
| 25966 | flag_NotZ = res; |
| 25967 | flag_N = res >> 8; |
| 25968 | DREGu16((Opcode >> 9) & 7) = res; |
| 25969 | POST_IO |
| 25970 | RET(12) |
| 25971 | } |
| 25972 | |
| 25973 | // ORaD |
| 25974 | OPCODE(0x8070) |
| 25975 | { |
| 25976 | u32 adr, res; |
| 25977 | u32 src, dst; |
| 25978 | |
| 25979 | adr = AREG((Opcode >> 0) & 7); |
| 25980 | DECODE_EXT_WORD |
| 25981 | PRE_IO |
| 25982 | READ_WORD_F(adr, src) |
| 25983 | res = DREGu16((Opcode >> 9) & 7); |
| 25984 | res |= src; |
| 25985 | flag_C = 0; |
| 25986 | flag_V = 0; |
| 25987 | flag_NotZ = res; |
| 25988 | flag_N = res >> 8; |
| 25989 | DREGu16((Opcode >> 9) & 7) = res; |
| 25990 | POST_IO |
| 25991 | RET(14) |
| 25992 | } |
| 25993 | |
| 25994 | // ORaD |
| 25995 | OPCODE(0x8078) |
| 25996 | { |
| 25997 | u32 adr, res; |
| 25998 | u32 src, dst; |
| 25999 | |
| 26000 | FETCH_SWORD(adr); |
| 26001 | PRE_IO |
| 26002 | READ_WORD_F(adr, src) |
| 26003 | res = DREGu16((Opcode >> 9) & 7); |
| 26004 | res |= src; |
| 26005 | flag_C = 0; |
| 26006 | flag_V = 0; |
| 26007 | flag_NotZ = res; |
| 26008 | flag_N = res >> 8; |
| 26009 | DREGu16((Opcode >> 9) & 7) = res; |
| 26010 | POST_IO |
| 26011 | RET(12) |
| 26012 | } |
| 26013 | |
| 26014 | // ORaD |
| 26015 | OPCODE(0x8079) |
| 26016 | { |
| 26017 | u32 adr, res; |
| 26018 | u32 src, dst; |
| 26019 | |
| 26020 | FETCH_LONG(adr); |
| 26021 | PRE_IO |
| 26022 | READ_WORD_F(adr, src) |
| 26023 | res = DREGu16((Opcode >> 9) & 7); |
| 26024 | res |= src; |
| 26025 | flag_C = 0; |
| 26026 | flag_V = 0; |
| 26027 | flag_NotZ = res; |
| 26028 | flag_N = res >> 8; |
| 26029 | DREGu16((Opcode >> 9) & 7) = res; |
| 26030 | POST_IO |
| 26031 | RET(16) |
| 26032 | } |
| 26033 | |
| 26034 | // ORaD |
| 26035 | OPCODE(0x807A) |
| 26036 | { |
| 26037 | u32 adr, res; |
| 26038 | u32 src, dst; |
| 26039 | |
| 26040 | adr = GET_SWORD + GET_PC; |
| 26041 | PC++; |
| 26042 | PRE_IO |
| 26043 | READ_WORD_F(adr, src) |
| 26044 | res = DREGu16((Opcode >> 9) & 7); |
| 26045 | res |= src; |
| 26046 | flag_C = 0; |
| 26047 | flag_V = 0; |
| 26048 | flag_NotZ = res; |
| 26049 | flag_N = res >> 8; |
| 26050 | DREGu16((Opcode >> 9) & 7) = res; |
| 26051 | POST_IO |
| 26052 | RET(12) |
| 26053 | } |
| 26054 | |
| 26055 | // ORaD |
| 26056 | OPCODE(0x807B) |
| 26057 | { |
| 26058 | u32 adr, res; |
| 26059 | u32 src, dst; |
| 26060 | |
| 26061 | adr = GET_PC; |
| 26062 | DECODE_EXT_WORD |
| 26063 | PRE_IO |
| 26064 | READ_WORD_F(adr, src) |
| 26065 | res = DREGu16((Opcode >> 9) & 7); |
| 26066 | res |= src; |
| 26067 | flag_C = 0; |
| 26068 | flag_V = 0; |
| 26069 | flag_NotZ = res; |
| 26070 | flag_N = res >> 8; |
| 26071 | DREGu16((Opcode >> 9) & 7) = res; |
| 26072 | POST_IO |
| 26073 | RET(14) |
| 26074 | } |
| 26075 | |
| 26076 | // ORaD |
| 26077 | OPCODE(0x807C) |
| 26078 | { |
| 26079 | u32 adr, res; |
| 26080 | u32 src, dst; |
| 26081 | |
| 26082 | FETCH_WORD(src); |
| 26083 | res = DREGu16((Opcode >> 9) & 7); |
| 26084 | res |= src; |
| 26085 | flag_C = 0; |
| 26086 | flag_V = 0; |
| 26087 | flag_NotZ = res; |
| 26088 | flag_N = res >> 8; |
| 26089 | DREGu16((Opcode >> 9) & 7) = res; |
| 26090 | RET(8) |
| 26091 | } |
| 26092 | |
| 26093 | // ORaD |
| 26094 | OPCODE(0x805F) |
| 26095 | { |
| 26096 | u32 adr, res; |
| 26097 | u32 src, dst; |
| 26098 | |
| 26099 | adr = AREG(7); |
| 26100 | AREG(7) += 2; |
| 26101 | PRE_IO |
| 26102 | READ_WORD_F(adr, src) |
| 26103 | res = DREGu16((Opcode >> 9) & 7); |
| 26104 | res |= src; |
| 26105 | flag_C = 0; |
| 26106 | flag_V = 0; |
| 26107 | flag_NotZ = res; |
| 26108 | flag_N = res >> 8; |
| 26109 | DREGu16((Opcode >> 9) & 7) = res; |
| 26110 | POST_IO |
| 26111 | RET(8) |
| 26112 | } |
| 26113 | |
| 26114 | // ORaD |
| 26115 | OPCODE(0x8067) |
| 26116 | { |
| 26117 | u32 adr, res; |
| 26118 | u32 src, dst; |
| 26119 | |
| 26120 | adr = AREG(7) - 2; |
| 26121 | AREG(7) = adr; |
| 26122 | PRE_IO |
| 26123 | READ_WORD_F(adr, src) |
| 26124 | res = DREGu16((Opcode >> 9) & 7); |
| 26125 | res |= src; |
| 26126 | flag_C = 0; |
| 26127 | flag_V = 0; |
| 26128 | flag_NotZ = res; |
| 26129 | flag_N = res >> 8; |
| 26130 | DREGu16((Opcode >> 9) & 7) = res; |
| 26131 | POST_IO |
| 26132 | RET(10) |
| 26133 | } |
| 26134 | |
| 26135 | // ORaD |
| 26136 | OPCODE(0x8080) |
| 26137 | { |
| 26138 | u32 adr, res; |
| 26139 | u32 src, dst; |
| 26140 | |
| 26141 | src = DREGu32((Opcode >> 0) & 7); |
| 26142 | res = DREGu32((Opcode >> 9) & 7); |
| 26143 | res |= src; |
| 26144 | flag_C = 0; |
| 26145 | flag_V = 0; |
| 26146 | flag_NotZ = res; |
| 26147 | flag_N = res >> 24; |
| 26148 | DREGu32((Opcode >> 9) & 7) = res; |
| 26149 | RET(8) |
| 26150 | } |
| 26151 | |
| 26152 | // ORaD |
| 26153 | OPCODE(0x8090) |
| 26154 | { |
| 26155 | u32 adr, res; |
| 26156 | u32 src, dst; |
| 26157 | |
| 26158 | adr = AREG((Opcode >> 0) & 7); |
| 26159 | PRE_IO |
| 26160 | READ_LONG_F(adr, src) |
| 26161 | res = DREGu32((Opcode >> 9) & 7); |
| 26162 | res |= src; |
| 26163 | flag_C = 0; |
| 26164 | flag_V = 0; |
| 26165 | flag_NotZ = res; |
| 26166 | flag_N = res >> 24; |
| 26167 | DREGu32((Opcode >> 9) & 7) = res; |
| 26168 | POST_IO |
| 26169 | RET(14) |
| 26170 | } |
| 26171 | |
| 26172 | // ORaD |
| 26173 | OPCODE(0x8098) |
| 26174 | { |
| 26175 | u32 adr, res; |
| 26176 | u32 src, dst; |
| 26177 | |
| 26178 | adr = AREG((Opcode >> 0) & 7); |
| 26179 | AREG((Opcode >> 0) & 7) += 4; |
| 26180 | PRE_IO |
| 26181 | READ_LONG_F(adr, src) |
| 26182 | res = DREGu32((Opcode >> 9) & 7); |
| 26183 | res |= src; |
| 26184 | flag_C = 0; |
| 26185 | flag_V = 0; |
| 26186 | flag_NotZ = res; |
| 26187 | flag_N = res >> 24; |
| 26188 | DREGu32((Opcode >> 9) & 7) = res; |
| 26189 | POST_IO |
| 26190 | RET(14) |
| 26191 | } |
| 26192 | |
| 26193 | // ORaD |
| 26194 | OPCODE(0x80A0) |
| 26195 | { |
| 26196 | u32 adr, res; |
| 26197 | u32 src, dst; |
| 26198 | |
| 26199 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 26200 | AREG((Opcode >> 0) & 7) = adr; |
| 26201 | PRE_IO |
| 26202 | READ_LONG_F(adr, src) |
| 26203 | res = DREGu32((Opcode >> 9) & 7); |
| 26204 | res |= src; |
| 26205 | flag_C = 0; |
| 26206 | flag_V = 0; |
| 26207 | flag_NotZ = res; |
| 26208 | flag_N = res >> 24; |
| 26209 | DREGu32((Opcode >> 9) & 7) = res; |
| 26210 | POST_IO |
| 26211 | RET(16) |
| 26212 | } |
| 26213 | |
| 26214 | // ORaD |
| 26215 | OPCODE(0x80A8) |
| 26216 | { |
| 26217 | u32 adr, res; |
| 26218 | u32 src, dst; |
| 26219 | |
| 26220 | FETCH_SWORD(adr); |
| 26221 | adr += AREG((Opcode >> 0) & 7); |
| 26222 | PRE_IO |
| 26223 | READ_LONG_F(adr, src) |
| 26224 | res = DREGu32((Opcode >> 9) & 7); |
| 26225 | res |= src; |
| 26226 | flag_C = 0; |
| 26227 | flag_V = 0; |
| 26228 | flag_NotZ = res; |
| 26229 | flag_N = res >> 24; |
| 26230 | DREGu32((Opcode >> 9) & 7) = res; |
| 26231 | POST_IO |
| 26232 | RET(18) |
| 26233 | } |
| 26234 | |
| 26235 | // ORaD |
| 26236 | OPCODE(0x80B0) |
| 26237 | { |
| 26238 | u32 adr, res; |
| 26239 | u32 src, dst; |
| 26240 | |
| 26241 | adr = AREG((Opcode >> 0) & 7); |
| 26242 | DECODE_EXT_WORD |
| 26243 | PRE_IO |
| 26244 | READ_LONG_F(adr, src) |
| 26245 | res = DREGu32((Opcode >> 9) & 7); |
| 26246 | res |= src; |
| 26247 | flag_C = 0; |
| 26248 | flag_V = 0; |
| 26249 | flag_NotZ = res; |
| 26250 | flag_N = res >> 24; |
| 26251 | DREGu32((Opcode >> 9) & 7) = res; |
| 26252 | POST_IO |
| 26253 | RET(20) |
| 26254 | } |
| 26255 | |
| 26256 | // ORaD |
| 26257 | OPCODE(0x80B8) |
| 26258 | { |
| 26259 | u32 adr, res; |
| 26260 | u32 src, dst; |
| 26261 | |
| 26262 | FETCH_SWORD(adr); |
| 26263 | PRE_IO |
| 26264 | READ_LONG_F(adr, src) |
| 26265 | res = DREGu32((Opcode >> 9) & 7); |
| 26266 | res |= src; |
| 26267 | flag_C = 0; |
| 26268 | flag_V = 0; |
| 26269 | flag_NotZ = res; |
| 26270 | flag_N = res >> 24; |
| 26271 | DREGu32((Opcode >> 9) & 7) = res; |
| 26272 | POST_IO |
| 26273 | RET(18) |
| 26274 | } |
| 26275 | |
| 26276 | // ORaD |
| 26277 | OPCODE(0x80B9) |
| 26278 | { |
| 26279 | u32 adr, res; |
| 26280 | u32 src, dst; |
| 26281 | |
| 26282 | FETCH_LONG(adr); |
| 26283 | PRE_IO |
| 26284 | READ_LONG_F(adr, src) |
| 26285 | res = DREGu32((Opcode >> 9) & 7); |
| 26286 | res |= src; |
| 26287 | flag_C = 0; |
| 26288 | flag_V = 0; |
| 26289 | flag_NotZ = res; |
| 26290 | flag_N = res >> 24; |
| 26291 | DREGu32((Opcode >> 9) & 7) = res; |
| 26292 | POST_IO |
| 26293 | RET(22) |
| 26294 | } |
| 26295 | |
| 26296 | // ORaD |
| 26297 | OPCODE(0x80BA) |
| 26298 | { |
| 26299 | u32 adr, res; |
| 26300 | u32 src, dst; |
| 26301 | |
| 26302 | adr = GET_SWORD + GET_PC; |
| 26303 | PC++; |
| 26304 | PRE_IO |
| 26305 | READ_LONG_F(adr, src) |
| 26306 | res = DREGu32((Opcode >> 9) & 7); |
| 26307 | res |= src; |
| 26308 | flag_C = 0; |
| 26309 | flag_V = 0; |
| 26310 | flag_NotZ = res; |
| 26311 | flag_N = res >> 24; |
| 26312 | DREGu32((Opcode >> 9) & 7) = res; |
| 26313 | POST_IO |
| 26314 | RET(18) |
| 26315 | } |
| 26316 | |
| 26317 | // ORaD |
| 26318 | OPCODE(0x80BB) |
| 26319 | { |
| 26320 | u32 adr, res; |
| 26321 | u32 src, dst; |
| 26322 | |
| 26323 | adr = GET_PC; |
| 26324 | DECODE_EXT_WORD |
| 26325 | PRE_IO |
| 26326 | READ_LONG_F(adr, src) |
| 26327 | res = DREGu32((Opcode >> 9) & 7); |
| 26328 | res |= src; |
| 26329 | flag_C = 0; |
| 26330 | flag_V = 0; |
| 26331 | flag_NotZ = res; |
| 26332 | flag_N = res >> 24; |
| 26333 | DREGu32((Opcode >> 9) & 7) = res; |
| 26334 | POST_IO |
| 26335 | RET(20) |
| 26336 | } |
| 26337 | |
| 26338 | // ORaD |
| 26339 | OPCODE(0x80BC) |
| 26340 | { |
| 26341 | u32 adr, res; |
| 26342 | u32 src, dst; |
| 26343 | |
| 26344 | FETCH_LONG(src); |
| 26345 | res = DREGu32((Opcode >> 9) & 7); |
| 26346 | res |= src; |
| 26347 | flag_C = 0; |
| 26348 | flag_V = 0; |
| 26349 | flag_NotZ = res; |
| 26350 | flag_N = res >> 24; |
| 26351 | DREGu32((Opcode >> 9) & 7) = res; |
| 26352 | RET(16) |
| 26353 | } |
| 26354 | |
| 26355 | // ORaD |
| 26356 | OPCODE(0x809F) |
| 26357 | { |
| 26358 | u32 adr, res; |
| 26359 | u32 src, dst; |
| 26360 | |
| 26361 | adr = AREG(7); |
| 26362 | AREG(7) += 4; |
| 26363 | PRE_IO |
| 26364 | READ_LONG_F(adr, src) |
| 26365 | res = DREGu32((Opcode >> 9) & 7); |
| 26366 | res |= src; |
| 26367 | flag_C = 0; |
| 26368 | flag_V = 0; |
| 26369 | flag_NotZ = res; |
| 26370 | flag_N = res >> 24; |
| 26371 | DREGu32((Opcode >> 9) & 7) = res; |
| 26372 | POST_IO |
| 26373 | RET(14) |
| 26374 | } |
| 26375 | |
| 26376 | // ORaD |
| 26377 | OPCODE(0x80A7) |
| 26378 | { |
| 26379 | u32 adr, res; |
| 26380 | u32 src, dst; |
| 26381 | |
| 26382 | adr = AREG(7) - 4; |
| 26383 | AREG(7) = adr; |
| 26384 | PRE_IO |
| 26385 | READ_LONG_F(adr, src) |
| 26386 | res = DREGu32((Opcode >> 9) & 7); |
| 26387 | res |= src; |
| 26388 | flag_C = 0; |
| 26389 | flag_V = 0; |
| 26390 | flag_NotZ = res; |
| 26391 | flag_N = res >> 24; |
| 26392 | DREGu32((Opcode >> 9) & 7) = res; |
| 26393 | POST_IO |
| 26394 | RET(16) |
| 26395 | } |
| 26396 | |
| 26397 | // ORDa |
| 26398 | OPCODE(0x8110) |
| 26399 | { |
| 26400 | u32 adr, res; |
| 26401 | u32 src, dst; |
| 26402 | |
| 26403 | src = DREGu8((Opcode >> 9) & 7); |
| 26404 | adr = AREG((Opcode >> 0) & 7); |
| 26405 | PRE_IO |
| 26406 | READ_BYTE_F(adr, res) |
| 26407 | res |= src; |
| 26408 | flag_C = 0; |
| 26409 | flag_V = 0; |
| 26410 | flag_NotZ = res; |
| 26411 | flag_N = res; |
| 26412 | WRITE_BYTE_F(adr, res) |
| 26413 | POST_IO |
| 26414 | RET(12) |
| 26415 | } |
| 26416 | |
| 26417 | // ORDa |
| 26418 | OPCODE(0x8118) |
| 26419 | { |
| 26420 | u32 adr, res; |
| 26421 | u32 src, dst; |
| 26422 | |
| 26423 | src = DREGu8((Opcode >> 9) & 7); |
| 26424 | adr = AREG((Opcode >> 0) & 7); |
| 26425 | AREG((Opcode >> 0) & 7) += 1; |
| 26426 | PRE_IO |
| 26427 | READ_BYTE_F(adr, res) |
| 26428 | res |= src; |
| 26429 | flag_C = 0; |
| 26430 | flag_V = 0; |
| 26431 | flag_NotZ = res; |
| 26432 | flag_N = res; |
| 26433 | WRITE_BYTE_F(adr, res) |
| 26434 | POST_IO |
| 26435 | RET(12) |
| 26436 | } |
| 26437 | |
| 26438 | // ORDa |
| 26439 | OPCODE(0x8120) |
| 26440 | { |
| 26441 | u32 adr, res; |
| 26442 | u32 src, dst; |
| 26443 | |
| 26444 | src = DREGu8((Opcode >> 9) & 7); |
| 26445 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 26446 | AREG((Opcode >> 0) & 7) = adr; |
| 26447 | PRE_IO |
| 26448 | READ_BYTE_F(adr, res) |
| 26449 | res |= src; |
| 26450 | flag_C = 0; |
| 26451 | flag_V = 0; |
| 26452 | flag_NotZ = res; |
| 26453 | flag_N = res; |
| 26454 | WRITE_BYTE_F(adr, res) |
| 26455 | POST_IO |
| 26456 | RET(14) |
| 26457 | } |
| 26458 | |
| 26459 | // ORDa |
| 26460 | OPCODE(0x8128) |
| 26461 | { |
| 26462 | u32 adr, res; |
| 26463 | u32 src, dst; |
| 26464 | |
| 26465 | src = DREGu8((Opcode >> 9) & 7); |
| 26466 | FETCH_SWORD(adr); |
| 26467 | adr += AREG((Opcode >> 0) & 7); |
| 26468 | PRE_IO |
| 26469 | READ_BYTE_F(adr, res) |
| 26470 | res |= src; |
| 26471 | flag_C = 0; |
| 26472 | flag_V = 0; |
| 26473 | flag_NotZ = res; |
| 26474 | flag_N = res; |
| 26475 | WRITE_BYTE_F(adr, res) |
| 26476 | POST_IO |
| 26477 | RET(16) |
| 26478 | } |
| 26479 | |
| 26480 | // ORDa |
| 26481 | OPCODE(0x8130) |
| 26482 | { |
| 26483 | u32 adr, res; |
| 26484 | u32 src, dst; |
| 26485 | |
| 26486 | src = DREGu8((Opcode >> 9) & 7); |
| 26487 | adr = AREG((Opcode >> 0) & 7); |
| 26488 | DECODE_EXT_WORD |
| 26489 | PRE_IO |
| 26490 | READ_BYTE_F(adr, res) |
| 26491 | res |= src; |
| 26492 | flag_C = 0; |
| 26493 | flag_V = 0; |
| 26494 | flag_NotZ = res; |
| 26495 | flag_N = res; |
| 26496 | WRITE_BYTE_F(adr, res) |
| 26497 | POST_IO |
| 26498 | RET(18) |
| 26499 | } |
| 26500 | |
| 26501 | // ORDa |
| 26502 | OPCODE(0x8138) |
| 26503 | { |
| 26504 | u32 adr, res; |
| 26505 | u32 src, dst; |
| 26506 | |
| 26507 | src = DREGu8((Opcode >> 9) & 7); |
| 26508 | FETCH_SWORD(adr); |
| 26509 | PRE_IO |
| 26510 | READ_BYTE_F(adr, res) |
| 26511 | res |= src; |
| 26512 | flag_C = 0; |
| 26513 | flag_V = 0; |
| 26514 | flag_NotZ = res; |
| 26515 | flag_N = res; |
| 26516 | WRITE_BYTE_F(adr, res) |
| 26517 | POST_IO |
| 26518 | RET(16) |
| 26519 | } |
| 26520 | |
| 26521 | // ORDa |
| 26522 | OPCODE(0x8139) |
| 26523 | { |
| 26524 | u32 adr, res; |
| 26525 | u32 src, dst; |
| 26526 | |
| 26527 | src = DREGu8((Opcode >> 9) & 7); |
| 26528 | FETCH_LONG(adr); |
| 26529 | PRE_IO |
| 26530 | READ_BYTE_F(adr, res) |
| 26531 | res |= src; |
| 26532 | flag_C = 0; |
| 26533 | flag_V = 0; |
| 26534 | flag_NotZ = res; |
| 26535 | flag_N = res; |
| 26536 | WRITE_BYTE_F(adr, res) |
| 26537 | POST_IO |
| 26538 | RET(20) |
| 26539 | } |
| 26540 | |
| 26541 | // ORDa |
| 26542 | OPCODE(0x811F) |
| 26543 | { |
| 26544 | u32 adr, res; |
| 26545 | u32 src, dst; |
| 26546 | |
| 26547 | src = DREGu8((Opcode >> 9) & 7); |
| 26548 | adr = AREG(7); |
| 26549 | AREG(7) += 2; |
| 26550 | PRE_IO |
| 26551 | READ_BYTE_F(adr, res) |
| 26552 | res |= src; |
| 26553 | flag_C = 0; |
| 26554 | flag_V = 0; |
| 26555 | flag_NotZ = res; |
| 26556 | flag_N = res; |
| 26557 | WRITE_BYTE_F(adr, res) |
| 26558 | POST_IO |
| 26559 | RET(12) |
| 26560 | } |
| 26561 | |
| 26562 | // ORDa |
| 26563 | OPCODE(0x8127) |
| 26564 | { |
| 26565 | u32 adr, res; |
| 26566 | u32 src, dst; |
| 26567 | |
| 26568 | src = DREGu8((Opcode >> 9) & 7); |
| 26569 | adr = AREG(7) - 2; |
| 26570 | AREG(7) = adr; |
| 26571 | PRE_IO |
| 26572 | READ_BYTE_F(adr, res) |
| 26573 | res |= src; |
| 26574 | flag_C = 0; |
| 26575 | flag_V = 0; |
| 26576 | flag_NotZ = res; |
| 26577 | flag_N = res; |
| 26578 | WRITE_BYTE_F(adr, res) |
| 26579 | POST_IO |
| 26580 | RET(14) |
| 26581 | } |
| 26582 | |
| 26583 | // ORDa |
| 26584 | OPCODE(0x8150) |
| 26585 | { |
| 26586 | u32 adr, res; |
| 26587 | u32 src, dst; |
| 26588 | |
| 26589 | src = DREGu16((Opcode >> 9) & 7); |
| 26590 | adr = AREG((Opcode >> 0) & 7); |
| 26591 | PRE_IO |
| 26592 | READ_WORD_F(adr, res) |
| 26593 | res |= src; |
| 26594 | flag_C = 0; |
| 26595 | flag_V = 0; |
| 26596 | flag_NotZ = res; |
| 26597 | flag_N = res >> 8; |
| 26598 | WRITE_WORD_F(adr, res) |
| 26599 | POST_IO |
| 26600 | RET(12) |
| 26601 | } |
| 26602 | |
| 26603 | // ORDa |
| 26604 | OPCODE(0x8158) |
| 26605 | { |
| 26606 | u32 adr, res; |
| 26607 | u32 src, dst; |
| 26608 | |
| 26609 | src = DREGu16((Opcode >> 9) & 7); |
| 26610 | adr = AREG((Opcode >> 0) & 7); |
| 26611 | AREG((Opcode >> 0) & 7) += 2; |
| 26612 | PRE_IO |
| 26613 | READ_WORD_F(adr, res) |
| 26614 | res |= src; |
| 26615 | flag_C = 0; |
| 26616 | flag_V = 0; |
| 26617 | flag_NotZ = res; |
| 26618 | flag_N = res >> 8; |
| 26619 | WRITE_WORD_F(adr, res) |
| 26620 | POST_IO |
| 26621 | RET(12) |
| 26622 | } |
| 26623 | |
| 26624 | // ORDa |
| 26625 | OPCODE(0x8160) |
| 26626 | { |
| 26627 | u32 adr, res; |
| 26628 | u32 src, dst; |
| 26629 | |
| 26630 | src = DREGu16((Opcode >> 9) & 7); |
| 26631 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 26632 | AREG((Opcode >> 0) & 7) = adr; |
| 26633 | PRE_IO |
| 26634 | READ_WORD_F(adr, res) |
| 26635 | res |= src; |
| 26636 | flag_C = 0; |
| 26637 | flag_V = 0; |
| 26638 | flag_NotZ = res; |
| 26639 | flag_N = res >> 8; |
| 26640 | WRITE_WORD_F(adr, res) |
| 26641 | POST_IO |
| 26642 | RET(14) |
| 26643 | } |
| 26644 | |
| 26645 | // ORDa |
| 26646 | OPCODE(0x8168) |
| 26647 | { |
| 26648 | u32 adr, res; |
| 26649 | u32 src, dst; |
| 26650 | |
| 26651 | src = DREGu16((Opcode >> 9) & 7); |
| 26652 | FETCH_SWORD(adr); |
| 26653 | adr += AREG((Opcode >> 0) & 7); |
| 26654 | PRE_IO |
| 26655 | READ_WORD_F(adr, res) |
| 26656 | res |= src; |
| 26657 | flag_C = 0; |
| 26658 | flag_V = 0; |
| 26659 | flag_NotZ = res; |
| 26660 | flag_N = res >> 8; |
| 26661 | WRITE_WORD_F(adr, res) |
| 26662 | POST_IO |
| 26663 | RET(16) |
| 26664 | } |
| 26665 | |
| 26666 | // ORDa |
| 26667 | OPCODE(0x8170) |
| 26668 | { |
| 26669 | u32 adr, res; |
| 26670 | u32 src, dst; |
| 26671 | |
| 26672 | src = DREGu16((Opcode >> 9) & 7); |
| 26673 | adr = AREG((Opcode >> 0) & 7); |
| 26674 | DECODE_EXT_WORD |
| 26675 | PRE_IO |
| 26676 | READ_WORD_F(adr, res) |
| 26677 | res |= src; |
| 26678 | flag_C = 0; |
| 26679 | flag_V = 0; |
| 26680 | flag_NotZ = res; |
| 26681 | flag_N = res >> 8; |
| 26682 | WRITE_WORD_F(adr, res) |
| 26683 | POST_IO |
| 26684 | RET(18) |
| 26685 | } |
| 26686 | |
| 26687 | // ORDa |
| 26688 | OPCODE(0x8178) |
| 26689 | { |
| 26690 | u32 adr, res; |
| 26691 | u32 src, dst; |
| 26692 | |
| 26693 | src = DREGu16((Opcode >> 9) & 7); |
| 26694 | FETCH_SWORD(adr); |
| 26695 | PRE_IO |
| 26696 | READ_WORD_F(adr, res) |
| 26697 | res |= src; |
| 26698 | flag_C = 0; |
| 26699 | flag_V = 0; |
| 26700 | flag_NotZ = res; |
| 26701 | flag_N = res >> 8; |
| 26702 | WRITE_WORD_F(adr, res) |
| 26703 | POST_IO |
| 26704 | RET(16) |
| 26705 | } |
| 26706 | |
| 26707 | // ORDa |
| 26708 | OPCODE(0x8179) |
| 26709 | { |
| 26710 | u32 adr, res; |
| 26711 | u32 src, dst; |
| 26712 | |
| 26713 | src = DREGu16((Opcode >> 9) & 7); |
| 26714 | FETCH_LONG(adr); |
| 26715 | PRE_IO |
| 26716 | READ_WORD_F(adr, res) |
| 26717 | res |= src; |
| 26718 | flag_C = 0; |
| 26719 | flag_V = 0; |
| 26720 | flag_NotZ = res; |
| 26721 | flag_N = res >> 8; |
| 26722 | WRITE_WORD_F(adr, res) |
| 26723 | POST_IO |
| 26724 | RET(20) |
| 26725 | } |
| 26726 | |
| 26727 | // ORDa |
| 26728 | OPCODE(0x815F) |
| 26729 | { |
| 26730 | u32 adr, res; |
| 26731 | u32 src, dst; |
| 26732 | |
| 26733 | src = DREGu16((Opcode >> 9) & 7); |
| 26734 | adr = AREG(7); |
| 26735 | AREG(7) += 2; |
| 26736 | PRE_IO |
| 26737 | READ_WORD_F(adr, res) |
| 26738 | res |= src; |
| 26739 | flag_C = 0; |
| 26740 | flag_V = 0; |
| 26741 | flag_NotZ = res; |
| 26742 | flag_N = res >> 8; |
| 26743 | WRITE_WORD_F(adr, res) |
| 26744 | POST_IO |
| 26745 | RET(12) |
| 26746 | } |
| 26747 | |
| 26748 | // ORDa |
| 26749 | OPCODE(0x8167) |
| 26750 | { |
| 26751 | u32 adr, res; |
| 26752 | u32 src, dst; |
| 26753 | |
| 26754 | src = DREGu16((Opcode >> 9) & 7); |
| 26755 | adr = AREG(7) - 2; |
| 26756 | AREG(7) = adr; |
| 26757 | PRE_IO |
| 26758 | READ_WORD_F(adr, res) |
| 26759 | res |= src; |
| 26760 | flag_C = 0; |
| 26761 | flag_V = 0; |
| 26762 | flag_NotZ = res; |
| 26763 | flag_N = res >> 8; |
| 26764 | WRITE_WORD_F(adr, res) |
| 26765 | POST_IO |
| 26766 | RET(14) |
| 26767 | } |
| 26768 | |
| 26769 | // ORDa |
| 26770 | OPCODE(0x8190) |
| 26771 | { |
| 26772 | u32 adr, res; |
| 26773 | u32 src, dst; |
| 26774 | |
| 26775 | src = DREGu32((Opcode >> 9) & 7); |
| 26776 | adr = AREG((Opcode >> 0) & 7); |
| 26777 | PRE_IO |
| 26778 | READ_LONG_F(adr, res) |
| 26779 | res |= src; |
| 26780 | flag_C = 0; |
| 26781 | flag_V = 0; |
| 26782 | flag_NotZ = res; |
| 26783 | flag_N = res >> 24; |
| 26784 | WRITE_LONG_F(adr, res) |
| 26785 | POST_IO |
| 26786 | RET(20) |
| 26787 | } |
| 26788 | |
| 26789 | // ORDa |
| 26790 | OPCODE(0x8198) |
| 26791 | { |
| 26792 | u32 adr, res; |
| 26793 | u32 src, dst; |
| 26794 | |
| 26795 | src = DREGu32((Opcode >> 9) & 7); |
| 26796 | adr = AREG((Opcode >> 0) & 7); |
| 26797 | AREG((Opcode >> 0) & 7) += 4; |
| 26798 | PRE_IO |
| 26799 | READ_LONG_F(adr, res) |
| 26800 | res |= src; |
| 26801 | flag_C = 0; |
| 26802 | flag_V = 0; |
| 26803 | flag_NotZ = res; |
| 26804 | flag_N = res >> 24; |
| 26805 | WRITE_LONG_F(adr, res) |
| 26806 | POST_IO |
| 26807 | RET(20) |
| 26808 | } |
| 26809 | |
| 26810 | // ORDa |
| 26811 | OPCODE(0x81A0) |
| 26812 | { |
| 26813 | u32 adr, res; |
| 26814 | u32 src, dst; |
| 26815 | |
| 26816 | src = DREGu32((Opcode >> 9) & 7); |
| 26817 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 26818 | AREG((Opcode >> 0) & 7) = adr; |
| 26819 | PRE_IO |
| 26820 | READ_LONG_F(adr, res) |
| 26821 | res |= src; |
| 26822 | flag_C = 0; |
| 26823 | flag_V = 0; |
| 26824 | flag_NotZ = res; |
| 26825 | flag_N = res >> 24; |
| 26826 | WRITE_LONG_F(adr, res) |
| 26827 | POST_IO |
| 26828 | RET(22) |
| 26829 | } |
| 26830 | |
| 26831 | // ORDa |
| 26832 | OPCODE(0x81A8) |
| 26833 | { |
| 26834 | u32 adr, res; |
| 26835 | u32 src, dst; |
| 26836 | |
| 26837 | src = DREGu32((Opcode >> 9) & 7); |
| 26838 | FETCH_SWORD(adr); |
| 26839 | adr += AREG((Opcode >> 0) & 7); |
| 26840 | PRE_IO |
| 26841 | READ_LONG_F(adr, res) |
| 26842 | res |= src; |
| 26843 | flag_C = 0; |
| 26844 | flag_V = 0; |
| 26845 | flag_NotZ = res; |
| 26846 | flag_N = res >> 24; |
| 26847 | WRITE_LONG_F(adr, res) |
| 26848 | POST_IO |
| 26849 | RET(24) |
| 26850 | } |
| 26851 | |
| 26852 | // ORDa |
| 26853 | OPCODE(0x81B0) |
| 26854 | { |
| 26855 | u32 adr, res; |
| 26856 | u32 src, dst; |
| 26857 | |
| 26858 | src = DREGu32((Opcode >> 9) & 7); |
| 26859 | adr = AREG((Opcode >> 0) & 7); |
| 26860 | DECODE_EXT_WORD |
| 26861 | PRE_IO |
| 26862 | READ_LONG_F(adr, res) |
| 26863 | res |= src; |
| 26864 | flag_C = 0; |
| 26865 | flag_V = 0; |
| 26866 | flag_NotZ = res; |
| 26867 | flag_N = res >> 24; |
| 26868 | WRITE_LONG_F(adr, res) |
| 26869 | POST_IO |
| 26870 | RET(26) |
| 26871 | } |
| 26872 | |
| 26873 | // ORDa |
| 26874 | OPCODE(0x81B8) |
| 26875 | { |
| 26876 | u32 adr, res; |
| 26877 | u32 src, dst; |
| 26878 | |
| 26879 | src = DREGu32((Opcode >> 9) & 7); |
| 26880 | FETCH_SWORD(adr); |
| 26881 | PRE_IO |
| 26882 | READ_LONG_F(adr, res) |
| 26883 | res |= src; |
| 26884 | flag_C = 0; |
| 26885 | flag_V = 0; |
| 26886 | flag_NotZ = res; |
| 26887 | flag_N = res >> 24; |
| 26888 | WRITE_LONG_F(adr, res) |
| 26889 | POST_IO |
| 26890 | RET(24) |
| 26891 | } |
| 26892 | |
| 26893 | // ORDa |
| 26894 | OPCODE(0x81B9) |
| 26895 | { |
| 26896 | u32 adr, res; |
| 26897 | u32 src, dst; |
| 26898 | |
| 26899 | src = DREGu32((Opcode >> 9) & 7); |
| 26900 | FETCH_LONG(adr); |
| 26901 | PRE_IO |
| 26902 | READ_LONG_F(adr, res) |
| 26903 | res |= src; |
| 26904 | flag_C = 0; |
| 26905 | flag_V = 0; |
| 26906 | flag_NotZ = res; |
| 26907 | flag_N = res >> 24; |
| 26908 | WRITE_LONG_F(adr, res) |
| 26909 | POST_IO |
| 26910 | RET(28) |
| 26911 | } |
| 26912 | |
| 26913 | // ORDa |
| 26914 | OPCODE(0x819F) |
| 26915 | { |
| 26916 | u32 adr, res; |
| 26917 | u32 src, dst; |
| 26918 | |
| 26919 | src = DREGu32((Opcode >> 9) & 7); |
| 26920 | adr = AREG(7); |
| 26921 | AREG(7) += 4; |
| 26922 | PRE_IO |
| 26923 | READ_LONG_F(adr, res) |
| 26924 | res |= src; |
| 26925 | flag_C = 0; |
| 26926 | flag_V = 0; |
| 26927 | flag_NotZ = res; |
| 26928 | flag_N = res >> 24; |
| 26929 | WRITE_LONG_F(adr, res) |
| 26930 | POST_IO |
| 26931 | RET(20) |
| 26932 | } |
| 26933 | |
| 26934 | // ORDa |
| 26935 | OPCODE(0x81A7) |
| 26936 | { |
| 26937 | u32 adr, res; |
| 26938 | u32 src, dst; |
| 26939 | |
| 26940 | src = DREGu32((Opcode >> 9) & 7); |
| 26941 | adr = AREG(7) - 4; |
| 26942 | AREG(7) = adr; |
| 26943 | PRE_IO |
| 26944 | READ_LONG_F(adr, res) |
| 26945 | res |= src; |
| 26946 | flag_C = 0; |
| 26947 | flag_V = 0; |
| 26948 | flag_NotZ = res; |
| 26949 | flag_N = res >> 24; |
| 26950 | WRITE_LONG_F(adr, res) |
| 26951 | POST_IO |
| 26952 | RET(22) |
| 26953 | } |
| 26954 | |
| 26955 | // SBCD |
| 26956 | OPCODE(0x8100) |
| 26957 | { |
| 26958 | u32 adr, res; |
| 26959 | u32 src, dst; |
| 26960 | u32 corf = 0; |
| 26961 | |
| 26962 | src = DREGu8((Opcode >> 0) & 7); |
| 26963 | dst = DREGu8((Opcode >> 9) & 7); |
| 26964 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 26965 | if (res > 0xF) corf = 6; |
| 26966 | res += (dst & 0xF0) - (src & 0xF0); |
| 26967 | flag_V = res; |
| 26968 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
| 26969 | if (res > 0xff) res += 0xA0; |
| 26970 | res = (res - corf) & 0xFF; |
| 26971 | flag_V &= ~res; |
| 26972 | flag_NotZ |= res; |
| 26973 | flag_N = res; |
| 26974 | DREGu8((Opcode >> 9) & 7) = res; |
| 26975 | RET(6) |
| 26976 | } |
| 26977 | |
| 26978 | // SBCDM |
| 26979 | OPCODE(0x8108) |
| 26980 | { |
| 26981 | u32 adr, res; |
| 26982 | u32 src, dst; |
| 26983 | u32 corf = 0; |
| 26984 | |
| 26985 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 26986 | AREG((Opcode >> 0) & 7) = adr; |
| 26987 | PRE_IO |
| 26988 | READ_BYTE_F(adr, src) |
| 26989 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 26990 | AREG((Opcode >> 9) & 7) = adr; |
| 26991 | READ_BYTE_F(adr, dst) |
| 26992 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 26993 | if (res > 0xF) corf = 6; |
| 26994 | res += (dst & 0xF0) - (src & 0xF0); |
| 26995 | flag_V = res; |
| 26996 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
| 26997 | if (res > 0xff) res += 0xA0; |
| 26998 | res = (res - corf) & 0xFF; |
| 26999 | flag_V &= ~res; |
| 27000 | flag_NotZ |= res; |
| 27001 | flag_N = res; |
| 27002 | WRITE_BYTE_F(adr, res) |
| 27003 | POST_IO |
| 27004 | RET(18) |
| 27005 | } |
| 27006 | |
| 27007 | // SBCD7M |
| 27008 | OPCODE(0x810F) |
| 27009 | { |
| 27010 | u32 adr, res; |
| 27011 | u32 src, dst; |
| 27012 | u32 corf = 0; |
| 27013 | |
| 27014 | adr = AREG(7) - 2; |
| 27015 | AREG(7) = adr; |
| 27016 | PRE_IO |
| 27017 | READ_BYTE_F(adr, src) |
| 27018 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 27019 | AREG((Opcode >> 9) & 7) = adr; |
| 27020 | READ_BYTE_F(adr, dst) |
| 27021 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 27022 | if (res > 0xF) corf = 6; |
| 27023 | res += (dst & 0xF0) - (src & 0xF0); |
| 27024 | flag_V = res; |
| 27025 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
| 27026 | if (res > 0xff) res += 0xA0; |
| 27027 | res = (res - corf) & 0xFF; |
| 27028 | flag_V &= ~res; |
| 27029 | flag_NotZ |= res; |
| 27030 | flag_N = res; |
| 27031 | WRITE_BYTE_F(adr, res) |
| 27032 | POST_IO |
| 27033 | RET(18) |
| 27034 | } |
| 27035 | |
| 27036 | // SBCDM7 |
| 27037 | OPCODE(0x8F08) |
| 27038 | { |
| 27039 | u32 adr, res; |
| 27040 | u32 src, dst; |
| 27041 | u32 corf = 0; |
| 27042 | |
| 27043 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 27044 | AREG((Opcode >> 0) & 7) = adr; |
| 27045 | PRE_IO |
| 27046 | READ_BYTE_F(adr, src) |
| 27047 | adr = AREG(7) - 2; |
| 27048 | AREG(7) = adr; |
| 27049 | READ_BYTE_F(adr, dst) |
| 27050 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 27051 | if (res > 0xF) corf = 6; |
| 27052 | res += (dst & 0xF0) - (src & 0xF0); |
| 27053 | flag_V = res; |
| 27054 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
| 27055 | if (res > 0xff) res += 0xA0; |
| 27056 | res = (res - corf) & 0xFF; |
| 27057 | flag_V &= ~res; |
| 27058 | flag_NotZ |= res; |
| 27059 | flag_N = res; |
| 27060 | WRITE_BYTE_F(adr, res) |
| 27061 | POST_IO |
| 27062 | RET(18) |
| 27063 | } |
| 27064 | |
| 27065 | // SBCD7M7 |
| 27066 | OPCODE(0x8F0F) |
| 27067 | { |
| 27068 | u32 adr, res; |
| 27069 | u32 src, dst; |
| 27070 | u32 corf = 0; |
| 27071 | |
| 27072 | adr = AREG(7) - 2; |
| 27073 | AREG(7) = adr; |
| 27074 | PRE_IO |
| 27075 | READ_BYTE_F(adr, src) |
| 27076 | adr = AREG(7) - 2; |
| 27077 | AREG(7) = adr; |
| 27078 | READ_BYTE_F(adr, dst) |
| 27079 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
| 27080 | if (res > 0xF) corf = 6; |
| 27081 | res += (dst & 0xF0) - (src & 0xF0); |
| 27082 | flag_V = res; |
| 27083 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
| 27084 | if (res > 0xff) res += 0xA0; |
| 27085 | res = (res - corf) & 0xFF; |
| 27086 | flag_V &= ~res; |
| 27087 | flag_NotZ |= res; |
| 27088 | flag_N = res; |
| 27089 | WRITE_BYTE_F(adr, res) |
| 27090 | POST_IO |
| 27091 | RET(18) |
| 27092 | } |
| 27093 | |
| 27094 | // DIVU |
| 27095 | OPCODE(0x80C0) |
| 27096 | { |
| 27097 | u32 adr, res; |
| 27098 | u32 src, dst; |
| 27099 | |
| 27100 | src = DREGu16((Opcode >> 0) & 7); |
| 27101 | if (src == 0) |
| 27102 | { |
| 27103 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27104 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27105 | RET(140) |
| 27106 | #else |
| 27107 | RET(10) |
| 27108 | #endif |
| 27109 | } |
| 27110 | dst = DREGu32((Opcode >> 9) & 7); |
| 27111 | { |
| 27112 | u32 q, r; |
| 27113 | |
| 27114 | q = dst / src; |
| 27115 | r = dst % src; |
| 27116 | |
| 27117 | if (q & 0xFFFF0000) |
| 27118 | { |
| 27119 | flag_V = M68K_SR_V; |
| 27120 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27121 | RET(140) |
| 27122 | #else |
| 27123 | RET(70) |
| 27124 | #endif |
| 27125 | } |
| 27126 | q &= 0x0000FFFF; |
| 27127 | flag_NotZ = q; |
| 27128 | flag_N = q >> 8; |
| 27129 | flag_V = flag_C = 0; |
| 27130 | res = q | (r << 16); |
| 27131 | DREGu32((Opcode >> 9) & 7) = res; |
| 27132 | } |
| 27133 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27134 | RET(140) |
| 27135 | #else |
| 27136 | RET(90) |
| 27137 | #endif |
| 27138 | } |
| 27139 | |
| 27140 | // DIVU |
| 27141 | OPCODE(0x80D0) |
| 27142 | { |
| 27143 | u32 adr, res; |
| 27144 | u32 src, dst; |
| 27145 | |
| 27146 | adr = AREG((Opcode >> 0) & 7); |
| 27147 | PRE_IO |
| 27148 | READ_WORD_F(adr, src) |
| 27149 | if (src == 0) |
| 27150 | { |
| 27151 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27152 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27153 | RET(144) |
| 27154 | #else |
| 27155 | RET(14) |
| 27156 | #endif |
| 27157 | } |
| 27158 | dst = DREGu32((Opcode >> 9) & 7); |
| 27159 | { |
| 27160 | u32 q, r; |
| 27161 | |
| 27162 | q = dst / src; |
| 27163 | r = dst % src; |
| 27164 | |
| 27165 | if (q & 0xFFFF0000) |
| 27166 | { |
| 27167 | flag_V = M68K_SR_V; |
| 27168 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27169 | RET(144) |
| 27170 | #else |
| 27171 | RET(74) |
| 27172 | #endif |
| 27173 | } |
| 27174 | q &= 0x0000FFFF; |
| 27175 | flag_NotZ = q; |
| 27176 | flag_N = q >> 8; |
| 27177 | flag_V = flag_C = 0; |
| 27178 | res = q | (r << 16); |
| 27179 | DREGu32((Opcode >> 9) & 7) = res; |
| 27180 | } |
| 27181 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27182 | RET(144) |
| 27183 | #else |
| 27184 | RET(94) |
| 27185 | #endif |
| 27186 | } |
| 27187 | |
| 27188 | // DIVU |
| 27189 | OPCODE(0x80D8) |
| 27190 | { |
| 27191 | u32 adr, res; |
| 27192 | u32 src, dst; |
| 27193 | |
| 27194 | adr = AREG((Opcode >> 0) & 7); |
| 27195 | AREG((Opcode >> 0) & 7) += 2; |
| 27196 | PRE_IO |
| 27197 | READ_WORD_F(adr, src) |
| 27198 | if (src == 0) |
| 27199 | { |
| 27200 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27201 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27202 | RET(144) |
| 27203 | #else |
| 27204 | RET(14) |
| 27205 | #endif |
| 27206 | } |
| 27207 | dst = DREGu32((Opcode >> 9) & 7); |
| 27208 | { |
| 27209 | u32 q, r; |
| 27210 | |
| 27211 | q = dst / src; |
| 27212 | r = dst % src; |
| 27213 | |
| 27214 | if (q & 0xFFFF0000) |
| 27215 | { |
| 27216 | flag_V = M68K_SR_V; |
| 27217 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27218 | RET(144) |
| 27219 | #else |
| 27220 | RET(74) |
| 27221 | #endif |
| 27222 | } |
| 27223 | q &= 0x0000FFFF; |
| 27224 | flag_NotZ = q; |
| 27225 | flag_N = q >> 8; |
| 27226 | flag_V = flag_C = 0; |
| 27227 | res = q | (r << 16); |
| 27228 | DREGu32((Opcode >> 9) & 7) = res; |
| 27229 | } |
| 27230 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27231 | RET(144) |
| 27232 | #else |
| 27233 | RET(94) |
| 27234 | #endif |
| 27235 | } |
| 27236 | |
| 27237 | // DIVU |
| 27238 | OPCODE(0x80E0) |
| 27239 | { |
| 27240 | u32 adr, res; |
| 27241 | u32 src, dst; |
| 27242 | |
| 27243 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 27244 | AREG((Opcode >> 0) & 7) = adr; |
| 27245 | PRE_IO |
| 27246 | READ_WORD_F(adr, src) |
| 27247 | if (src == 0) |
| 27248 | { |
| 27249 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27250 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27251 | RET(146) |
| 27252 | #else |
| 27253 | RET(16) |
| 27254 | #endif |
| 27255 | } |
| 27256 | dst = DREGu32((Opcode >> 9) & 7); |
| 27257 | { |
| 27258 | u32 q, r; |
| 27259 | |
| 27260 | q = dst / src; |
| 27261 | r = dst % src; |
| 27262 | |
| 27263 | if (q & 0xFFFF0000) |
| 27264 | { |
| 27265 | flag_V = M68K_SR_V; |
| 27266 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27267 | RET(146) |
| 27268 | #else |
| 27269 | RET(76) |
| 27270 | #endif |
| 27271 | } |
| 27272 | q &= 0x0000FFFF; |
| 27273 | flag_NotZ = q; |
| 27274 | flag_N = q >> 8; |
| 27275 | flag_V = flag_C = 0; |
| 27276 | res = q | (r << 16); |
| 27277 | DREGu32((Opcode >> 9) & 7) = res; |
| 27278 | } |
| 27279 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27280 | RET(146) |
| 27281 | #else |
| 27282 | RET(96) |
| 27283 | #endif |
| 27284 | } |
| 27285 | |
| 27286 | // DIVU |
| 27287 | OPCODE(0x80E8) |
| 27288 | { |
| 27289 | u32 adr, res; |
| 27290 | u32 src, dst; |
| 27291 | |
| 27292 | FETCH_SWORD(adr); |
| 27293 | adr += AREG((Opcode >> 0) & 7); |
| 27294 | PRE_IO |
| 27295 | READ_WORD_F(adr, src) |
| 27296 | if (src == 0) |
| 27297 | { |
| 27298 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27299 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27300 | RET(148) |
| 27301 | #else |
| 27302 | RET(18) |
| 27303 | #endif |
| 27304 | } |
| 27305 | dst = DREGu32((Opcode >> 9) & 7); |
| 27306 | { |
| 27307 | u32 q, r; |
| 27308 | |
| 27309 | q = dst / src; |
| 27310 | r = dst % src; |
| 27311 | |
| 27312 | if (q & 0xFFFF0000) |
| 27313 | { |
| 27314 | flag_V = M68K_SR_V; |
| 27315 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27316 | RET(148) |
| 27317 | #else |
| 27318 | RET(78) |
| 27319 | #endif |
| 27320 | } |
| 27321 | q &= 0x0000FFFF; |
| 27322 | flag_NotZ = q; |
| 27323 | flag_N = q >> 8; |
| 27324 | flag_V = flag_C = 0; |
| 27325 | res = q | (r << 16); |
| 27326 | DREGu32((Opcode >> 9) & 7) = res; |
| 27327 | } |
| 27328 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27329 | RET(148) |
| 27330 | #else |
| 27331 | RET(98) |
| 27332 | #endif |
| 27333 | } |
| 27334 | |
| 27335 | // DIVU |
| 27336 | OPCODE(0x80F0) |
| 27337 | { |
| 27338 | u32 adr, res; |
| 27339 | u32 src, dst; |
| 27340 | |
| 27341 | adr = AREG((Opcode >> 0) & 7); |
| 27342 | DECODE_EXT_WORD |
| 27343 | PRE_IO |
| 27344 | READ_WORD_F(adr, src) |
| 27345 | if (src == 0) |
| 27346 | { |
| 27347 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27348 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27349 | RET(150) |
| 27350 | #else |
| 27351 | RET(20) |
| 27352 | #endif |
| 27353 | } |
| 27354 | dst = DREGu32((Opcode >> 9) & 7); |
| 27355 | { |
| 27356 | u32 q, r; |
| 27357 | |
| 27358 | q = dst / src; |
| 27359 | r = dst % src; |
| 27360 | |
| 27361 | if (q & 0xFFFF0000) |
| 27362 | { |
| 27363 | flag_V = M68K_SR_V; |
| 27364 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27365 | RET(150) |
| 27366 | #else |
| 27367 | RET(80) |
| 27368 | #endif |
| 27369 | } |
| 27370 | q &= 0x0000FFFF; |
| 27371 | flag_NotZ = q; |
| 27372 | flag_N = q >> 8; |
| 27373 | flag_V = flag_C = 0; |
| 27374 | res = q | (r << 16); |
| 27375 | DREGu32((Opcode >> 9) & 7) = res; |
| 27376 | } |
| 27377 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27378 | RET(150) |
| 27379 | #else |
| 27380 | RET(100) |
| 27381 | #endif |
| 27382 | } |
| 27383 | |
| 27384 | // DIVU |
| 27385 | OPCODE(0x80F8) |
| 27386 | { |
| 27387 | u32 adr, res; |
| 27388 | u32 src, dst; |
| 27389 | |
| 27390 | FETCH_SWORD(adr); |
| 27391 | PRE_IO |
| 27392 | READ_WORD_F(adr, src) |
| 27393 | if (src == 0) |
| 27394 | { |
| 27395 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27396 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27397 | RET(148) |
| 27398 | #else |
| 27399 | RET(18) |
| 27400 | #endif |
| 27401 | } |
| 27402 | dst = DREGu32((Opcode >> 9) & 7); |
| 27403 | { |
| 27404 | u32 q, r; |
| 27405 | |
| 27406 | q = dst / src; |
| 27407 | r = dst % src; |
| 27408 | |
| 27409 | if (q & 0xFFFF0000) |
| 27410 | { |
| 27411 | flag_V = M68K_SR_V; |
| 27412 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27413 | RET(148) |
| 27414 | #else |
| 27415 | RET(78) |
| 27416 | #endif |
| 27417 | } |
| 27418 | q &= 0x0000FFFF; |
| 27419 | flag_NotZ = q; |
| 27420 | flag_N = q >> 8; |
| 27421 | flag_V = flag_C = 0; |
| 27422 | res = q | (r << 16); |
| 27423 | DREGu32((Opcode >> 9) & 7) = res; |
| 27424 | } |
| 27425 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27426 | RET(148) |
| 27427 | #else |
| 27428 | RET(98) |
| 27429 | #endif |
| 27430 | } |
| 27431 | |
| 27432 | // DIVU |
| 27433 | OPCODE(0x80F9) |
| 27434 | { |
| 27435 | u32 adr, res; |
| 27436 | u32 src, dst; |
| 27437 | |
| 27438 | FETCH_LONG(adr); |
| 27439 | PRE_IO |
| 27440 | READ_WORD_F(adr, src) |
| 27441 | if (src == 0) |
| 27442 | { |
| 27443 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27444 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27445 | RET(152) |
| 27446 | #else |
| 27447 | RET(22) |
| 27448 | #endif |
| 27449 | } |
| 27450 | dst = DREGu32((Opcode >> 9) & 7); |
| 27451 | { |
| 27452 | u32 q, r; |
| 27453 | |
| 27454 | q = dst / src; |
| 27455 | r = dst % src; |
| 27456 | |
| 27457 | if (q & 0xFFFF0000) |
| 27458 | { |
| 27459 | flag_V = M68K_SR_V; |
| 27460 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27461 | RET(152) |
| 27462 | #else |
| 27463 | RET(82) |
| 27464 | #endif |
| 27465 | } |
| 27466 | q &= 0x0000FFFF; |
| 27467 | flag_NotZ = q; |
| 27468 | flag_N = q >> 8; |
| 27469 | flag_V = flag_C = 0; |
| 27470 | res = q | (r << 16); |
| 27471 | DREGu32((Opcode >> 9) & 7) = res; |
| 27472 | } |
| 27473 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27474 | RET(152) |
| 27475 | #else |
| 27476 | RET(102) |
| 27477 | #endif |
| 27478 | } |
| 27479 | |
| 27480 | // DIVU |
| 27481 | OPCODE(0x80FA) |
| 27482 | { |
| 27483 | u32 adr, res; |
| 27484 | u32 src, dst; |
| 27485 | |
| 27486 | adr = GET_SWORD + GET_PC; |
| 27487 | PC++; |
| 27488 | PRE_IO |
| 27489 | READ_WORD_F(adr, src) |
| 27490 | if (src == 0) |
| 27491 | { |
| 27492 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27493 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27494 | RET(148) |
| 27495 | #else |
| 27496 | RET(18) |
| 27497 | #endif |
| 27498 | } |
| 27499 | dst = DREGu32((Opcode >> 9) & 7); |
| 27500 | { |
| 27501 | u32 q, r; |
| 27502 | |
| 27503 | q = dst / src; |
| 27504 | r = dst % src; |
| 27505 | |
| 27506 | if (q & 0xFFFF0000) |
| 27507 | { |
| 27508 | flag_V = M68K_SR_V; |
| 27509 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27510 | RET(148) |
| 27511 | #else |
| 27512 | RET(78) |
| 27513 | #endif |
| 27514 | } |
| 27515 | q &= 0x0000FFFF; |
| 27516 | flag_NotZ = q; |
| 27517 | flag_N = q >> 8; |
| 27518 | flag_V = flag_C = 0; |
| 27519 | res = q | (r << 16); |
| 27520 | DREGu32((Opcode >> 9) & 7) = res; |
| 27521 | } |
| 27522 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27523 | RET(148) |
| 27524 | #else |
| 27525 | RET(98) |
| 27526 | #endif |
| 27527 | } |
| 27528 | |
| 27529 | // DIVU |
| 27530 | OPCODE(0x80FB) |
| 27531 | { |
| 27532 | u32 adr, res; |
| 27533 | u32 src, dst; |
| 27534 | |
| 27535 | adr = GET_PC; |
| 27536 | DECODE_EXT_WORD |
| 27537 | PRE_IO |
| 27538 | READ_WORD_F(adr, src) |
| 27539 | if (src == 0) |
| 27540 | { |
| 27541 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27542 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27543 | RET(150) |
| 27544 | #else |
| 27545 | RET(20) |
| 27546 | #endif |
| 27547 | } |
| 27548 | dst = DREGu32((Opcode >> 9) & 7); |
| 27549 | { |
| 27550 | u32 q, r; |
| 27551 | |
| 27552 | q = dst / src; |
| 27553 | r = dst % src; |
| 27554 | |
| 27555 | if (q & 0xFFFF0000) |
| 27556 | { |
| 27557 | flag_V = M68K_SR_V; |
| 27558 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27559 | RET(150) |
| 27560 | #else |
| 27561 | RET(80) |
| 27562 | #endif |
| 27563 | } |
| 27564 | q &= 0x0000FFFF; |
| 27565 | flag_NotZ = q; |
| 27566 | flag_N = q >> 8; |
| 27567 | flag_V = flag_C = 0; |
| 27568 | res = q | (r << 16); |
| 27569 | DREGu32((Opcode >> 9) & 7) = res; |
| 27570 | } |
| 27571 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27572 | RET(150) |
| 27573 | #else |
| 27574 | RET(100) |
| 27575 | #endif |
| 27576 | } |
| 27577 | |
| 27578 | // DIVU |
| 27579 | OPCODE(0x80FC) |
| 27580 | { |
| 27581 | u32 adr, res; |
| 27582 | u32 src, dst; |
| 27583 | |
| 27584 | FETCH_WORD(src); |
| 27585 | if (src == 0) |
| 27586 | { |
| 27587 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27588 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27589 | RET(144) |
| 27590 | #else |
| 27591 | RET(14) |
| 27592 | #endif |
| 27593 | } |
| 27594 | dst = DREGu32((Opcode >> 9) & 7); |
| 27595 | { |
| 27596 | u32 q, r; |
| 27597 | |
| 27598 | q = dst / src; |
| 27599 | r = dst % src; |
| 27600 | |
| 27601 | if (q & 0xFFFF0000) |
| 27602 | { |
| 27603 | flag_V = M68K_SR_V; |
| 27604 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27605 | RET(144) |
| 27606 | #else |
| 27607 | RET(74) |
| 27608 | #endif |
| 27609 | } |
| 27610 | q &= 0x0000FFFF; |
| 27611 | flag_NotZ = q; |
| 27612 | flag_N = q >> 8; |
| 27613 | flag_V = flag_C = 0; |
| 27614 | res = q | (r << 16); |
| 27615 | DREGu32((Opcode >> 9) & 7) = res; |
| 27616 | } |
| 27617 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27618 | RET(144) |
| 27619 | #else |
| 27620 | RET(94) |
| 27621 | #endif |
| 27622 | } |
| 27623 | |
| 27624 | // DIVU |
| 27625 | OPCODE(0x80DF) |
| 27626 | { |
| 27627 | u32 adr, res; |
| 27628 | u32 src, dst; |
| 27629 | |
| 27630 | adr = AREG(7); |
| 27631 | AREG(7) += 2; |
| 27632 | PRE_IO |
| 27633 | READ_WORD_F(adr, src) |
| 27634 | if (src == 0) |
| 27635 | { |
| 27636 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27637 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27638 | RET(144) |
| 27639 | #else |
| 27640 | RET(14) |
| 27641 | #endif |
| 27642 | } |
| 27643 | dst = DREGu32((Opcode >> 9) & 7); |
| 27644 | { |
| 27645 | u32 q, r; |
| 27646 | |
| 27647 | q = dst / src; |
| 27648 | r = dst % src; |
| 27649 | |
| 27650 | if (q & 0xFFFF0000) |
| 27651 | { |
| 27652 | flag_V = M68K_SR_V; |
| 27653 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27654 | RET(144) |
| 27655 | #else |
| 27656 | RET(74) |
| 27657 | #endif |
| 27658 | } |
| 27659 | q &= 0x0000FFFF; |
| 27660 | flag_NotZ = q; |
| 27661 | flag_N = q >> 8; |
| 27662 | flag_V = flag_C = 0; |
| 27663 | res = q | (r << 16); |
| 27664 | DREGu32((Opcode >> 9) & 7) = res; |
| 27665 | } |
| 27666 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27667 | RET(144) |
| 27668 | #else |
| 27669 | RET(94) |
| 27670 | #endif |
| 27671 | } |
| 27672 | |
| 27673 | // DIVU |
| 27674 | OPCODE(0x80E7) |
| 27675 | { |
| 27676 | u32 adr, res; |
| 27677 | u32 src, dst; |
| 27678 | |
| 27679 | adr = AREG(7) - 2; |
| 27680 | AREG(7) = adr; |
| 27681 | PRE_IO |
| 27682 | READ_WORD_F(adr, src) |
| 27683 | if (src == 0) |
| 27684 | { |
| 27685 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27686 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27687 | RET(146) |
| 27688 | #else |
| 27689 | RET(16) |
| 27690 | #endif |
| 27691 | } |
| 27692 | dst = DREGu32((Opcode >> 9) & 7); |
| 27693 | { |
| 27694 | u32 q, r; |
| 27695 | |
| 27696 | q = dst / src; |
| 27697 | r = dst % src; |
| 27698 | |
| 27699 | if (q & 0xFFFF0000) |
| 27700 | { |
| 27701 | flag_V = M68K_SR_V; |
| 27702 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27703 | RET(146) |
| 27704 | #else |
| 27705 | RET(76) |
| 27706 | #endif |
| 27707 | } |
| 27708 | q &= 0x0000FFFF; |
| 27709 | flag_NotZ = q; |
| 27710 | flag_N = q >> 8; |
| 27711 | flag_V = flag_C = 0; |
| 27712 | res = q | (r << 16); |
| 27713 | DREGu32((Opcode >> 9) & 7) = res; |
| 27714 | } |
| 27715 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27716 | RET(146) |
| 27717 | #else |
| 27718 | RET(96) |
| 27719 | #endif |
| 27720 | } |
| 27721 | |
| 27722 | // DIVS |
| 27723 | OPCODE(0x81C0) |
| 27724 | { |
| 27725 | u32 adr, res; |
| 27726 | u32 src, dst; |
| 27727 | |
| 27728 | src = (s32)DREGs16((Opcode >> 0) & 7); |
| 27729 | if (src == 0) |
| 27730 | { |
| 27731 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27732 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27733 | goto end81C0; |
| 27734 | #endif |
| 27735 | RET(10) |
| 27736 | } |
| 27737 | dst = DREGu32((Opcode >> 9) & 7); |
| 27738 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 27739 | { |
| 27740 | flag_NotZ = flag_N = 0; |
| 27741 | flag_V = flag_C = 0; |
| 27742 | res = 0; |
| 27743 | DREGu32((Opcode >> 9) & 7) = res; |
| 27744 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27745 | goto end81C0; |
| 27746 | #endif |
| 27747 | RET(50) |
| 27748 | } |
| 27749 | { |
| 27750 | s32 q, r; |
| 27751 | |
| 27752 | q = (s32)dst / (s32)src; |
| 27753 | r = (s32)dst % (s32)src; |
| 27754 | |
| 27755 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 27756 | { |
| 27757 | flag_V = M68K_SR_V; |
| 27758 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27759 | goto end81C0; |
| 27760 | #endif |
| 27761 | RET(80) |
| 27762 | } |
| 27763 | q &= 0x0000FFFF; |
| 27764 | flag_NotZ = q; |
| 27765 | flag_N = q >> 8; |
| 27766 | flag_V = flag_C = 0; |
| 27767 | res = q | (r << 16); |
| 27768 | DREGu32((Opcode >> 9) & 7) = res; |
| 27769 | } |
| 27770 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27771 | end81C0: m68kcontext.io_cycle_counter -= 50; |
| 27772 | #endif |
| 27773 | RET(108) |
| 27774 | } |
| 27775 | |
| 27776 | // DIVS |
| 27777 | OPCODE(0x81D0) |
| 27778 | { |
| 27779 | u32 adr, res; |
| 27780 | u32 src, dst; |
| 27781 | |
| 27782 | adr = AREG((Opcode >> 0) & 7); |
| 27783 | PRE_IO |
| 27784 | READSX_WORD_F(adr, src) |
| 27785 | if (src == 0) |
| 27786 | { |
| 27787 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27788 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27789 | goto end81D0; |
| 27790 | #endif |
| 27791 | RET(14) |
| 27792 | } |
| 27793 | dst = DREGu32((Opcode >> 9) & 7); |
| 27794 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 27795 | { |
| 27796 | flag_NotZ = flag_N = 0; |
| 27797 | flag_V = flag_C = 0; |
| 27798 | res = 0; |
| 27799 | DREGu32((Opcode >> 9) & 7) = res; |
| 27800 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27801 | goto end81D0; |
| 27802 | #endif |
| 27803 | RET(54) |
| 27804 | } |
| 27805 | { |
| 27806 | s32 q, r; |
| 27807 | |
| 27808 | q = (s32)dst / (s32)src; |
| 27809 | r = (s32)dst % (s32)src; |
| 27810 | |
| 27811 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 27812 | { |
| 27813 | flag_V = M68K_SR_V; |
| 27814 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27815 | goto end81D0; |
| 27816 | #endif |
| 27817 | RET(84) |
| 27818 | } |
| 27819 | q &= 0x0000FFFF; |
| 27820 | flag_NotZ = q; |
| 27821 | flag_N = q >> 8; |
| 27822 | flag_V = flag_C = 0; |
| 27823 | res = q | (r << 16); |
| 27824 | DREGu32((Opcode >> 9) & 7) = res; |
| 27825 | } |
| 27826 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27827 | end81D0: m68kcontext.io_cycle_counter -= 50; |
| 27828 | #endif |
| 27829 | RET(112) |
| 27830 | } |
| 27831 | |
| 27832 | // DIVS |
| 27833 | OPCODE(0x81D8) |
| 27834 | { |
| 27835 | u32 adr, res; |
| 27836 | u32 src, dst; |
| 27837 | |
| 27838 | adr = AREG((Opcode >> 0) & 7); |
| 27839 | AREG((Opcode >> 0) & 7) += 2; |
| 27840 | PRE_IO |
| 27841 | READSX_WORD_F(adr, src) |
| 27842 | if (src == 0) |
| 27843 | { |
| 27844 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27845 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27846 | goto end81D8; |
| 27847 | #endif |
| 27848 | RET(14) |
| 27849 | } |
| 27850 | dst = DREGu32((Opcode >> 9) & 7); |
| 27851 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 27852 | { |
| 27853 | flag_NotZ = flag_N = 0; |
| 27854 | flag_V = flag_C = 0; |
| 27855 | res = 0; |
| 27856 | DREGu32((Opcode >> 9) & 7) = res; |
| 27857 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27858 | goto end81D8; |
| 27859 | #endif |
| 27860 | RET(54) |
| 27861 | } |
| 27862 | { |
| 27863 | s32 q, r; |
| 27864 | |
| 27865 | q = (s32)dst / (s32)src; |
| 27866 | r = (s32)dst % (s32)src; |
| 27867 | |
| 27868 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 27869 | { |
| 27870 | flag_V = M68K_SR_V; |
| 27871 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27872 | goto end81D8; |
| 27873 | #endif |
| 27874 | RET(84) |
| 27875 | } |
| 27876 | q &= 0x0000FFFF; |
| 27877 | flag_NotZ = q; |
| 27878 | flag_N = q >> 8; |
| 27879 | flag_V = flag_C = 0; |
| 27880 | res = q | (r << 16); |
| 27881 | DREGu32((Opcode >> 9) & 7) = res; |
| 27882 | } |
| 27883 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27884 | end81D8: m68kcontext.io_cycle_counter -= 50; |
| 27885 | #endif |
| 27886 | RET(112) |
| 27887 | } |
| 27888 | |
| 27889 | // DIVS |
| 27890 | OPCODE(0x81E0) |
| 27891 | { |
| 27892 | u32 adr, res; |
| 27893 | u32 src, dst; |
| 27894 | |
| 27895 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 27896 | AREG((Opcode >> 0) & 7) = adr; |
| 27897 | PRE_IO |
| 27898 | READSX_WORD_F(adr, src) |
| 27899 | if (src == 0) |
| 27900 | { |
| 27901 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27902 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27903 | goto end81E0; |
| 27904 | #endif |
| 27905 | RET(16) |
| 27906 | } |
| 27907 | dst = DREGu32((Opcode >> 9) & 7); |
| 27908 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 27909 | { |
| 27910 | flag_NotZ = flag_N = 0; |
| 27911 | flag_V = flag_C = 0; |
| 27912 | res = 0; |
| 27913 | DREGu32((Opcode >> 9) & 7) = res; |
| 27914 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27915 | goto end81E0; |
| 27916 | #endif |
| 27917 | RET(56) |
| 27918 | } |
| 27919 | { |
| 27920 | s32 q, r; |
| 27921 | |
| 27922 | q = (s32)dst / (s32)src; |
| 27923 | r = (s32)dst % (s32)src; |
| 27924 | |
| 27925 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 27926 | { |
| 27927 | flag_V = M68K_SR_V; |
| 27928 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27929 | goto end81E0; |
| 27930 | #endif |
| 27931 | RET(86) |
| 27932 | } |
| 27933 | q &= 0x0000FFFF; |
| 27934 | flag_NotZ = q; |
| 27935 | flag_N = q >> 8; |
| 27936 | flag_V = flag_C = 0; |
| 27937 | res = q | (r << 16); |
| 27938 | DREGu32((Opcode >> 9) & 7) = res; |
| 27939 | } |
| 27940 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27941 | end81E0: m68kcontext.io_cycle_counter -= 50; |
| 27942 | #endif |
| 27943 | RET(114) |
| 27944 | } |
| 27945 | |
| 27946 | // DIVS |
| 27947 | OPCODE(0x81E8) |
| 27948 | { |
| 27949 | u32 adr, res; |
| 27950 | u32 src, dst; |
| 27951 | |
| 27952 | FETCH_SWORD(adr); |
| 27953 | adr += AREG((Opcode >> 0) & 7); |
| 27954 | PRE_IO |
| 27955 | READSX_WORD_F(adr, src) |
| 27956 | if (src == 0) |
| 27957 | { |
| 27958 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 27959 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27960 | goto end81E8; |
| 27961 | #endif |
| 27962 | RET(18) |
| 27963 | } |
| 27964 | dst = DREGu32((Opcode >> 9) & 7); |
| 27965 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 27966 | { |
| 27967 | flag_NotZ = flag_N = 0; |
| 27968 | flag_V = flag_C = 0; |
| 27969 | res = 0; |
| 27970 | DREGu32((Opcode >> 9) & 7) = res; |
| 27971 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27972 | goto end81E8; |
| 27973 | #endif |
| 27974 | RET(58) |
| 27975 | } |
| 27976 | { |
| 27977 | s32 q, r; |
| 27978 | |
| 27979 | q = (s32)dst / (s32)src; |
| 27980 | r = (s32)dst % (s32)src; |
| 27981 | |
| 27982 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 27983 | { |
| 27984 | flag_V = M68K_SR_V; |
| 27985 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27986 | goto end81E8; |
| 27987 | #endif |
| 27988 | RET(88) |
| 27989 | } |
| 27990 | q &= 0x0000FFFF; |
| 27991 | flag_NotZ = q; |
| 27992 | flag_N = q >> 8; |
| 27993 | flag_V = flag_C = 0; |
| 27994 | res = q | (r << 16); |
| 27995 | DREGu32((Opcode >> 9) & 7) = res; |
| 27996 | } |
| 27997 | #ifdef USE_CYCLONE_TIMING_DIV |
| 27998 | end81E8: m68kcontext.io_cycle_counter -= 50; |
| 27999 | #endif |
| 28000 | RET(116) |
| 28001 | } |
| 28002 | |
| 28003 | // DIVS |
| 28004 | OPCODE(0x81F0) |
| 28005 | { |
| 28006 | u32 adr, res; |
| 28007 | u32 src, dst; |
| 28008 | |
| 28009 | adr = AREG((Opcode >> 0) & 7); |
| 28010 | DECODE_EXT_WORD |
| 28011 | PRE_IO |
| 28012 | READSX_WORD_F(adr, src) |
| 28013 | if (src == 0) |
| 28014 | { |
| 28015 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 28016 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28017 | goto end81F0; |
| 28018 | #endif |
| 28019 | RET(20) |
| 28020 | } |
| 28021 | dst = DREGu32((Opcode >> 9) & 7); |
| 28022 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 28023 | { |
| 28024 | flag_NotZ = flag_N = 0; |
| 28025 | flag_V = flag_C = 0; |
| 28026 | res = 0; |
| 28027 | DREGu32((Opcode >> 9) & 7) = res; |
| 28028 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28029 | goto end81F0; |
| 28030 | #endif |
| 28031 | RET(60) |
| 28032 | } |
| 28033 | { |
| 28034 | s32 q, r; |
| 28035 | |
| 28036 | q = (s32)dst / (s32)src; |
| 28037 | r = (s32)dst % (s32)src; |
| 28038 | |
| 28039 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 28040 | { |
| 28041 | flag_V = M68K_SR_V; |
| 28042 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28043 | goto end81F0; |
| 28044 | #endif |
| 28045 | RET(90) |
| 28046 | } |
| 28047 | q &= 0x0000FFFF; |
| 28048 | flag_NotZ = q; |
| 28049 | flag_N = q >> 8; |
| 28050 | flag_V = flag_C = 0; |
| 28051 | res = q | (r << 16); |
| 28052 | DREGu32((Opcode >> 9) & 7) = res; |
| 28053 | } |
| 28054 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28055 | end81F0: m68kcontext.io_cycle_counter -= 50; |
| 28056 | #endif |
| 28057 | RET(118) |
| 28058 | } |
| 28059 | |
| 28060 | // DIVS |
| 28061 | OPCODE(0x81F8) |
| 28062 | { |
| 28063 | u32 adr, res; |
| 28064 | u32 src, dst; |
| 28065 | |
| 28066 | FETCH_SWORD(adr); |
| 28067 | PRE_IO |
| 28068 | READSX_WORD_F(adr, src) |
| 28069 | if (src == 0) |
| 28070 | { |
| 28071 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 28072 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28073 | goto end81F8; |
| 28074 | #endif |
| 28075 | RET(18) |
| 28076 | } |
| 28077 | dst = DREGu32((Opcode >> 9) & 7); |
| 28078 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 28079 | { |
| 28080 | flag_NotZ = flag_N = 0; |
| 28081 | flag_V = flag_C = 0; |
| 28082 | res = 0; |
| 28083 | DREGu32((Opcode >> 9) & 7) = res; |
| 28084 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28085 | goto end81F8; |
| 28086 | #endif |
| 28087 | RET(58) |
| 28088 | } |
| 28089 | { |
| 28090 | s32 q, r; |
| 28091 | |
| 28092 | q = (s32)dst / (s32)src; |
| 28093 | r = (s32)dst % (s32)src; |
| 28094 | |
| 28095 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 28096 | { |
| 28097 | flag_V = M68K_SR_V; |
| 28098 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28099 | goto end81F8; |
| 28100 | #endif |
| 28101 | RET(88) |
| 28102 | } |
| 28103 | q &= 0x0000FFFF; |
| 28104 | flag_NotZ = q; |
| 28105 | flag_N = q >> 8; |
| 28106 | flag_V = flag_C = 0; |
| 28107 | res = q | (r << 16); |
| 28108 | DREGu32((Opcode >> 9) & 7) = res; |
| 28109 | } |
| 28110 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28111 | end81F8: m68kcontext.io_cycle_counter -= 50; |
| 28112 | #endif |
| 28113 | RET(116) |
| 28114 | } |
| 28115 | |
| 28116 | // DIVS |
| 28117 | OPCODE(0x81F9) |
| 28118 | { |
| 28119 | u32 adr, res; |
| 28120 | u32 src, dst; |
| 28121 | |
| 28122 | FETCH_LONG(adr); |
| 28123 | PRE_IO |
| 28124 | READSX_WORD_F(adr, src) |
| 28125 | if (src == 0) |
| 28126 | { |
| 28127 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 28128 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28129 | goto end81F9; |
| 28130 | #endif |
| 28131 | RET(22) |
| 28132 | } |
| 28133 | dst = DREGu32((Opcode >> 9) & 7); |
| 28134 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 28135 | { |
| 28136 | flag_NotZ = flag_N = 0; |
| 28137 | flag_V = flag_C = 0; |
| 28138 | res = 0; |
| 28139 | DREGu32((Opcode >> 9) & 7) = res; |
| 28140 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28141 | goto end81F9; |
| 28142 | #endif |
| 28143 | RET(62) |
| 28144 | } |
| 28145 | { |
| 28146 | s32 q, r; |
| 28147 | |
| 28148 | q = (s32)dst / (s32)src; |
| 28149 | r = (s32)dst % (s32)src; |
| 28150 | |
| 28151 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 28152 | { |
| 28153 | flag_V = M68K_SR_V; |
| 28154 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28155 | goto end81F9; |
| 28156 | #endif |
| 28157 | RET(92) |
| 28158 | } |
| 28159 | q &= 0x0000FFFF; |
| 28160 | flag_NotZ = q; |
| 28161 | flag_N = q >> 8; |
| 28162 | flag_V = flag_C = 0; |
| 28163 | res = q | (r << 16); |
| 28164 | DREGu32((Opcode >> 9) & 7) = res; |
| 28165 | } |
| 28166 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28167 | end81F9: m68kcontext.io_cycle_counter -= 50; |
| 28168 | #endif |
| 28169 | RET(120) |
| 28170 | } |
| 28171 | |
| 28172 | // DIVS |
| 28173 | OPCODE(0x81FA) |
| 28174 | { |
| 28175 | u32 adr, res; |
| 28176 | u32 src, dst; |
| 28177 | |
| 28178 | adr = GET_SWORD + GET_PC; |
| 28179 | PC++; |
| 28180 | PRE_IO |
| 28181 | READSX_WORD_F(adr, src) |
| 28182 | if (src == 0) |
| 28183 | { |
| 28184 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 28185 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28186 | goto end81FA; |
| 28187 | #endif |
| 28188 | RET(18) |
| 28189 | } |
| 28190 | dst = DREGu32((Opcode >> 9) & 7); |
| 28191 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 28192 | { |
| 28193 | flag_NotZ = flag_N = 0; |
| 28194 | flag_V = flag_C = 0; |
| 28195 | res = 0; |
| 28196 | DREGu32((Opcode >> 9) & 7) = res; |
| 28197 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28198 | goto end81FA; |
| 28199 | #endif |
| 28200 | RET(58) |
| 28201 | } |
| 28202 | { |
| 28203 | s32 q, r; |
| 28204 | |
| 28205 | q = (s32)dst / (s32)src; |
| 28206 | r = (s32)dst % (s32)src; |
| 28207 | |
| 28208 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 28209 | { |
| 28210 | flag_V = M68K_SR_V; |
| 28211 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28212 | goto end81FA; |
| 28213 | #endif |
| 28214 | RET(88) |
| 28215 | } |
| 28216 | q &= 0x0000FFFF; |
| 28217 | flag_NotZ = q; |
| 28218 | flag_N = q >> 8; |
| 28219 | flag_V = flag_C = 0; |
| 28220 | res = q | (r << 16); |
| 28221 | DREGu32((Opcode >> 9) & 7) = res; |
| 28222 | } |
| 28223 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28224 | end81FA: m68kcontext.io_cycle_counter -= 50; |
| 28225 | #endif |
| 28226 | RET(116) |
| 28227 | } |
| 28228 | |
| 28229 | // DIVS |
| 28230 | OPCODE(0x81FB) |
| 28231 | { |
| 28232 | u32 adr, res; |
| 28233 | u32 src, dst; |
| 28234 | |
| 28235 | adr = GET_PC; |
| 28236 | DECODE_EXT_WORD |
| 28237 | PRE_IO |
| 28238 | READSX_WORD_F(adr, src) |
| 28239 | if (src == 0) |
| 28240 | { |
| 28241 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 28242 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28243 | goto end81FB; |
| 28244 | #endif |
| 28245 | RET(20) |
| 28246 | } |
| 28247 | dst = DREGu32((Opcode >> 9) & 7); |
| 28248 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 28249 | { |
| 28250 | flag_NotZ = flag_N = 0; |
| 28251 | flag_V = flag_C = 0; |
| 28252 | res = 0; |
| 28253 | DREGu32((Opcode >> 9) & 7) = res; |
| 28254 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28255 | goto end81FB; |
| 28256 | #endif |
| 28257 | RET(60) |
| 28258 | } |
| 28259 | { |
| 28260 | s32 q, r; |
| 28261 | |
| 28262 | q = (s32)dst / (s32)src; |
| 28263 | r = (s32)dst % (s32)src; |
| 28264 | |
| 28265 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 28266 | { |
| 28267 | flag_V = M68K_SR_V; |
| 28268 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28269 | goto end81FB; |
| 28270 | #endif |
| 28271 | RET(90) |
| 28272 | } |
| 28273 | q &= 0x0000FFFF; |
| 28274 | flag_NotZ = q; |
| 28275 | flag_N = q >> 8; |
| 28276 | flag_V = flag_C = 0; |
| 28277 | res = q | (r << 16); |
| 28278 | DREGu32((Opcode >> 9) & 7) = res; |
| 28279 | } |
| 28280 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28281 | end81FB: m68kcontext.io_cycle_counter -= 50; |
| 28282 | #endif |
| 28283 | RET(118) |
| 28284 | } |
| 28285 | |
| 28286 | // DIVS |
| 28287 | OPCODE(0x81FC) |
| 28288 | { |
| 28289 | u32 adr, res; |
| 28290 | u32 src, dst; |
| 28291 | |
| 28292 | FETCH_SWORD(src); |
| 28293 | if (src == 0) |
| 28294 | { |
| 28295 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 28296 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28297 | goto end81FC; |
| 28298 | #endif |
| 28299 | RET(14) |
| 28300 | } |
| 28301 | dst = DREGu32((Opcode >> 9) & 7); |
| 28302 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 28303 | { |
| 28304 | flag_NotZ = flag_N = 0; |
| 28305 | flag_V = flag_C = 0; |
| 28306 | res = 0; |
| 28307 | DREGu32((Opcode >> 9) & 7) = res; |
| 28308 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28309 | goto end81FC; |
| 28310 | #endif |
| 28311 | RET(54) |
| 28312 | } |
| 28313 | { |
| 28314 | s32 q, r; |
| 28315 | |
| 28316 | q = (s32)dst / (s32)src; |
| 28317 | r = (s32)dst % (s32)src; |
| 28318 | |
| 28319 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 28320 | { |
| 28321 | flag_V = M68K_SR_V; |
| 28322 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28323 | goto end81FC; |
| 28324 | #endif |
| 28325 | RET(84) |
| 28326 | } |
| 28327 | q &= 0x0000FFFF; |
| 28328 | flag_NotZ = q; |
| 28329 | flag_N = q >> 8; |
| 28330 | flag_V = flag_C = 0; |
| 28331 | res = q | (r << 16); |
| 28332 | DREGu32((Opcode >> 9) & 7) = res; |
| 28333 | } |
| 28334 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28335 | end81FC: m68kcontext.io_cycle_counter -= 50; |
| 28336 | #endif |
| 28337 | RET(112) |
| 28338 | } |
| 28339 | |
| 28340 | // DIVS |
| 28341 | OPCODE(0x81DF) |
| 28342 | { |
| 28343 | u32 adr, res; |
| 28344 | u32 src, dst; |
| 28345 | |
| 28346 | adr = AREG(7); |
| 28347 | AREG(7) += 2; |
| 28348 | PRE_IO |
| 28349 | READSX_WORD_F(adr, src) |
| 28350 | if (src == 0) |
| 28351 | { |
| 28352 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 28353 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28354 | goto end81DF; |
| 28355 | #endif |
| 28356 | RET(14) |
| 28357 | } |
| 28358 | dst = DREGu32((Opcode >> 9) & 7); |
| 28359 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 28360 | { |
| 28361 | flag_NotZ = flag_N = 0; |
| 28362 | flag_V = flag_C = 0; |
| 28363 | res = 0; |
| 28364 | DREGu32((Opcode >> 9) & 7) = res; |
| 28365 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28366 | goto end81DF; |
| 28367 | #endif |
| 28368 | RET(54) |
| 28369 | } |
| 28370 | { |
| 28371 | s32 q, r; |
| 28372 | |
| 28373 | q = (s32)dst / (s32)src; |
| 28374 | r = (s32)dst % (s32)src; |
| 28375 | |
| 28376 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 28377 | { |
| 28378 | flag_V = M68K_SR_V; |
| 28379 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28380 | goto end81DF; |
| 28381 | #endif |
| 28382 | RET(84) |
| 28383 | } |
| 28384 | q &= 0x0000FFFF; |
| 28385 | flag_NotZ = q; |
| 28386 | flag_N = q >> 8; |
| 28387 | flag_V = flag_C = 0; |
| 28388 | res = q | (r << 16); |
| 28389 | DREGu32((Opcode >> 9) & 7) = res; |
| 28390 | } |
| 28391 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28392 | end81DF: m68kcontext.io_cycle_counter -= 50; |
| 28393 | #endif |
| 28394 | RET(112) |
| 28395 | } |
| 28396 | |
| 28397 | // DIVS |
| 28398 | OPCODE(0x81E7) |
| 28399 | { |
| 28400 | u32 adr, res; |
| 28401 | u32 src, dst; |
| 28402 | |
| 28403 | adr = AREG(7) - 2; |
| 28404 | AREG(7) = adr; |
| 28405 | PRE_IO |
| 28406 | READSX_WORD_F(adr, src) |
| 28407 | if (src == 0) |
| 28408 | { |
| 28409 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
| 28410 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28411 | goto end81E7; |
| 28412 | #endif |
| 28413 | RET(16) |
| 28414 | } |
| 28415 | dst = DREGu32((Opcode >> 9) & 7); |
| 28416 | if ((dst == 0x80000000) && (src == (u32)-1)) |
| 28417 | { |
| 28418 | flag_NotZ = flag_N = 0; |
| 28419 | flag_V = flag_C = 0; |
| 28420 | res = 0; |
| 28421 | DREGu32((Opcode >> 9) & 7) = res; |
| 28422 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28423 | goto end81E7; |
| 28424 | #endif |
| 28425 | RET(56) |
| 28426 | } |
| 28427 | { |
| 28428 | s32 q, r; |
| 28429 | |
| 28430 | q = (s32)dst / (s32)src; |
| 28431 | r = (s32)dst % (s32)src; |
| 28432 | |
| 28433 | if ((q > 0x7FFF) || (q < -0x8000)) |
| 28434 | { |
| 28435 | flag_V = M68K_SR_V; |
| 28436 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28437 | goto end81E7; |
| 28438 | #endif |
| 28439 | RET(86) |
| 28440 | } |
| 28441 | q &= 0x0000FFFF; |
| 28442 | flag_NotZ = q; |
| 28443 | flag_N = q >> 8; |
| 28444 | flag_V = flag_C = 0; |
| 28445 | res = q | (r << 16); |
| 28446 | DREGu32((Opcode >> 9) & 7) = res; |
| 28447 | } |
| 28448 | #ifdef USE_CYCLONE_TIMING_DIV |
| 28449 | end81E7: m68kcontext.io_cycle_counter -= 50; |
| 28450 | #endif |
| 28451 | RET(114) |
| 28452 | } |
| 28453 | |
| 28454 | // SUBaD |
| 28455 | OPCODE(0x9000) |
| 28456 | { |
| 28457 | u32 adr, res; |
| 28458 | u32 src, dst; |
| 28459 | |
| 28460 | src = DREGu8((Opcode >> 0) & 7); |
| 28461 | dst = DREGu8((Opcode >> 9) & 7); |
| 28462 | res = dst - src; |
| 28463 | flag_N = flag_X = flag_C = res; |
| 28464 | flag_V = (src ^ dst) & (res ^ dst); |
| 28465 | flag_NotZ = res & 0xFF; |
| 28466 | DREGu8((Opcode >> 9) & 7) = res; |
| 28467 | RET(4) |
| 28468 | } |
| 28469 | |
| 28470 | // SUBaD |
| 28471 | #if 0 |
| 28472 | OPCODE(0x9008) |
| 28473 | { |
| 28474 | u32 adr, res; |
| 28475 | u32 src, dst; |
| 28476 | |
| 28477 | // can't read byte from Ax registers ! |
| 28478 | m68kcontext.execinfo |= M68K_FAULTED; |
| 28479 | m68kcontext.io_cycle_counter = 0; |
| 28480 | /* |
| 28481 | goto famec_Exec_End; |
| 28482 | dst = DREGu8((Opcode >> 9) & 7); |
| 28483 | res = dst - src; |
| 28484 | flag_N = flag_X = flag_C = res; |
| 28485 | flag_V = (src ^ dst) & (res ^ dst); |
| 28486 | flag_NotZ = res & 0xFF; |
| 28487 | DREGu8((Opcode >> 9) & 7) = res; |
| 28488 | */ |
| 28489 | RET(4) |
| 28490 | } |
| 28491 | #endif |
| 28492 | |
| 28493 | // SUBaD |
| 28494 | OPCODE(0x9010) |
| 28495 | { |
| 28496 | u32 adr, res; |
| 28497 | u32 src, dst; |
| 28498 | |
| 28499 | adr = AREG((Opcode >> 0) & 7); |
| 28500 | PRE_IO |
| 28501 | READ_BYTE_F(adr, src) |
| 28502 | dst = DREGu8((Opcode >> 9) & 7); |
| 28503 | res = dst - src; |
| 28504 | flag_N = flag_X = flag_C = res; |
| 28505 | flag_V = (src ^ dst) & (res ^ dst); |
| 28506 | flag_NotZ = res & 0xFF; |
| 28507 | DREGu8((Opcode >> 9) & 7) = res; |
| 28508 | POST_IO |
| 28509 | RET(8) |
| 28510 | } |
| 28511 | |
| 28512 | // SUBaD |
| 28513 | OPCODE(0x9018) |
| 28514 | { |
| 28515 | u32 adr, res; |
| 28516 | u32 src, dst; |
| 28517 | |
| 28518 | adr = AREG((Opcode >> 0) & 7); |
| 28519 | AREG((Opcode >> 0) & 7) += 1; |
| 28520 | PRE_IO |
| 28521 | READ_BYTE_F(adr, src) |
| 28522 | dst = DREGu8((Opcode >> 9) & 7); |
| 28523 | res = dst - src; |
| 28524 | flag_N = flag_X = flag_C = res; |
| 28525 | flag_V = (src ^ dst) & (res ^ dst); |
| 28526 | flag_NotZ = res & 0xFF; |
| 28527 | DREGu8((Opcode >> 9) & 7) = res; |
| 28528 | POST_IO |
| 28529 | RET(8) |
| 28530 | } |
| 28531 | |
| 28532 | // SUBaD |
| 28533 | OPCODE(0x9020) |
| 28534 | { |
| 28535 | u32 adr, res; |
| 28536 | u32 src, dst; |
| 28537 | |
| 28538 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 28539 | AREG((Opcode >> 0) & 7) = adr; |
| 28540 | PRE_IO |
| 28541 | READ_BYTE_F(adr, src) |
| 28542 | dst = DREGu8((Opcode >> 9) & 7); |
| 28543 | res = dst - src; |
| 28544 | flag_N = flag_X = flag_C = res; |
| 28545 | flag_V = (src ^ dst) & (res ^ dst); |
| 28546 | flag_NotZ = res & 0xFF; |
| 28547 | DREGu8((Opcode >> 9) & 7) = res; |
| 28548 | POST_IO |
| 28549 | RET(10) |
| 28550 | } |
| 28551 | |
| 28552 | // SUBaD |
| 28553 | OPCODE(0x9028) |
| 28554 | { |
| 28555 | u32 adr, res; |
| 28556 | u32 src, dst; |
| 28557 | |
| 28558 | FETCH_SWORD(adr); |
| 28559 | adr += AREG((Opcode >> 0) & 7); |
| 28560 | PRE_IO |
| 28561 | READ_BYTE_F(adr, src) |
| 28562 | dst = DREGu8((Opcode >> 9) & 7); |
| 28563 | res = dst - src; |
| 28564 | flag_N = flag_X = flag_C = res; |
| 28565 | flag_V = (src ^ dst) & (res ^ dst); |
| 28566 | flag_NotZ = res & 0xFF; |
| 28567 | DREGu8((Opcode >> 9) & 7) = res; |
| 28568 | POST_IO |
| 28569 | RET(12) |
| 28570 | } |
| 28571 | |
| 28572 | // SUBaD |
| 28573 | OPCODE(0x9030) |
| 28574 | { |
| 28575 | u32 adr, res; |
| 28576 | u32 src, dst; |
| 28577 | |
| 28578 | adr = AREG((Opcode >> 0) & 7); |
| 28579 | DECODE_EXT_WORD |
| 28580 | PRE_IO |
| 28581 | READ_BYTE_F(adr, src) |
| 28582 | dst = DREGu8((Opcode >> 9) & 7); |
| 28583 | res = dst - src; |
| 28584 | flag_N = flag_X = flag_C = res; |
| 28585 | flag_V = (src ^ dst) & (res ^ dst); |
| 28586 | flag_NotZ = res & 0xFF; |
| 28587 | DREGu8((Opcode >> 9) & 7) = res; |
| 28588 | POST_IO |
| 28589 | RET(14) |
| 28590 | } |
| 28591 | |
| 28592 | // SUBaD |
| 28593 | OPCODE(0x9038) |
| 28594 | { |
| 28595 | u32 adr, res; |
| 28596 | u32 src, dst; |
| 28597 | |
| 28598 | FETCH_SWORD(adr); |
| 28599 | PRE_IO |
| 28600 | READ_BYTE_F(adr, src) |
| 28601 | dst = DREGu8((Opcode >> 9) & 7); |
| 28602 | res = dst - src; |
| 28603 | flag_N = flag_X = flag_C = res; |
| 28604 | flag_V = (src ^ dst) & (res ^ dst); |
| 28605 | flag_NotZ = res & 0xFF; |
| 28606 | DREGu8((Opcode >> 9) & 7) = res; |
| 28607 | POST_IO |
| 28608 | RET(12) |
| 28609 | } |
| 28610 | |
| 28611 | // SUBaD |
| 28612 | OPCODE(0x9039) |
| 28613 | { |
| 28614 | u32 adr, res; |
| 28615 | u32 src, dst; |
| 28616 | |
| 28617 | FETCH_LONG(adr); |
| 28618 | PRE_IO |
| 28619 | READ_BYTE_F(adr, src) |
| 28620 | dst = DREGu8((Opcode >> 9) & 7); |
| 28621 | res = dst - src; |
| 28622 | flag_N = flag_X = flag_C = res; |
| 28623 | flag_V = (src ^ dst) & (res ^ dst); |
| 28624 | flag_NotZ = res & 0xFF; |
| 28625 | DREGu8((Opcode >> 9) & 7) = res; |
| 28626 | POST_IO |
| 28627 | RET(16) |
| 28628 | } |
| 28629 | |
| 28630 | // SUBaD |
| 28631 | OPCODE(0x903A) |
| 28632 | { |
| 28633 | u32 adr, res; |
| 28634 | u32 src, dst; |
| 28635 | |
| 28636 | adr = GET_SWORD + GET_PC; |
| 28637 | PC++; |
| 28638 | PRE_IO |
| 28639 | READ_BYTE_F(adr, src) |
| 28640 | dst = DREGu8((Opcode >> 9) & 7); |
| 28641 | res = dst - src; |
| 28642 | flag_N = flag_X = flag_C = res; |
| 28643 | flag_V = (src ^ dst) & (res ^ dst); |
| 28644 | flag_NotZ = res & 0xFF; |
| 28645 | DREGu8((Opcode >> 9) & 7) = res; |
| 28646 | POST_IO |
| 28647 | RET(12) |
| 28648 | } |
| 28649 | |
| 28650 | // SUBaD |
| 28651 | OPCODE(0x903B) |
| 28652 | { |
| 28653 | u32 adr, res; |
| 28654 | u32 src, dst; |
| 28655 | |
| 28656 | adr = GET_PC; |
| 28657 | DECODE_EXT_WORD |
| 28658 | PRE_IO |
| 28659 | READ_BYTE_F(adr, src) |
| 28660 | dst = DREGu8((Opcode >> 9) & 7); |
| 28661 | res = dst - src; |
| 28662 | flag_N = flag_X = flag_C = res; |
| 28663 | flag_V = (src ^ dst) & (res ^ dst); |
| 28664 | flag_NotZ = res & 0xFF; |
| 28665 | DREGu8((Opcode >> 9) & 7) = res; |
| 28666 | POST_IO |
| 28667 | RET(14) |
| 28668 | } |
| 28669 | |
| 28670 | // SUBaD |
| 28671 | OPCODE(0x903C) |
| 28672 | { |
| 28673 | u32 adr, res; |
| 28674 | u32 src, dst; |
| 28675 | |
| 28676 | FETCH_BYTE(src); |
| 28677 | dst = DREGu8((Opcode >> 9) & 7); |
| 28678 | res = dst - src; |
| 28679 | flag_N = flag_X = flag_C = res; |
| 28680 | flag_V = (src ^ dst) & (res ^ dst); |
| 28681 | flag_NotZ = res & 0xFF; |
| 28682 | DREGu8((Opcode >> 9) & 7) = res; |
| 28683 | RET(8) |
| 28684 | } |
| 28685 | |
| 28686 | // SUBaD |
| 28687 | OPCODE(0x901F) |
| 28688 | { |
| 28689 | u32 adr, res; |
| 28690 | u32 src, dst; |
| 28691 | |
| 28692 | adr = AREG(7); |
| 28693 | AREG(7) += 2; |
| 28694 | PRE_IO |
| 28695 | READ_BYTE_F(adr, src) |
| 28696 | dst = DREGu8((Opcode >> 9) & 7); |
| 28697 | res = dst - src; |
| 28698 | flag_N = flag_X = flag_C = res; |
| 28699 | flag_V = (src ^ dst) & (res ^ dst); |
| 28700 | flag_NotZ = res & 0xFF; |
| 28701 | DREGu8((Opcode >> 9) & 7) = res; |
| 28702 | POST_IO |
| 28703 | RET(8) |
| 28704 | } |
| 28705 | |
| 28706 | // SUBaD |
| 28707 | OPCODE(0x9027) |
| 28708 | { |
| 28709 | u32 adr, res; |
| 28710 | u32 src, dst; |
| 28711 | |
| 28712 | adr = AREG(7) - 2; |
| 28713 | AREG(7) = adr; |
| 28714 | PRE_IO |
| 28715 | READ_BYTE_F(adr, src) |
| 28716 | dst = DREGu8((Opcode >> 9) & 7); |
| 28717 | res = dst - src; |
| 28718 | flag_N = flag_X = flag_C = res; |
| 28719 | flag_V = (src ^ dst) & (res ^ dst); |
| 28720 | flag_NotZ = res & 0xFF; |
| 28721 | DREGu8((Opcode >> 9) & 7) = res; |
| 28722 | POST_IO |
| 28723 | RET(10) |
| 28724 | } |
| 28725 | |
| 28726 | // SUBaD |
| 28727 | OPCODE(0x9040) |
| 28728 | { |
| 28729 | u32 adr, res; |
| 28730 | u32 src, dst; |
| 28731 | |
| 28732 | src = DREGu16((Opcode >> 0) & 7); |
| 28733 | dst = DREGu16((Opcode >> 9) & 7); |
| 28734 | res = dst - src; |
| 28735 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28736 | flag_N = flag_X = flag_C = res >> 8; |
| 28737 | flag_NotZ = res & 0xFFFF; |
| 28738 | DREGu16((Opcode >> 9) & 7) = res; |
| 28739 | RET(4) |
| 28740 | } |
| 28741 | |
| 28742 | // SUBaD |
| 28743 | OPCODE(0x9048) |
| 28744 | { |
| 28745 | u32 adr, res; |
| 28746 | u32 src, dst; |
| 28747 | |
| 28748 | src = AREGu16((Opcode >> 0) & 7); |
| 28749 | dst = DREGu16((Opcode >> 9) & 7); |
| 28750 | res = dst - src; |
| 28751 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28752 | flag_N = flag_X = flag_C = res >> 8; |
| 28753 | flag_NotZ = res & 0xFFFF; |
| 28754 | DREGu16((Opcode >> 9) & 7) = res; |
| 28755 | RET(4) |
| 28756 | } |
| 28757 | |
| 28758 | // SUBaD |
| 28759 | OPCODE(0x9050) |
| 28760 | { |
| 28761 | u32 adr, res; |
| 28762 | u32 src, dst; |
| 28763 | |
| 28764 | adr = AREG((Opcode >> 0) & 7); |
| 28765 | PRE_IO |
| 28766 | READ_WORD_F(adr, src) |
| 28767 | dst = DREGu16((Opcode >> 9) & 7); |
| 28768 | res = dst - src; |
| 28769 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28770 | flag_N = flag_X = flag_C = res >> 8; |
| 28771 | flag_NotZ = res & 0xFFFF; |
| 28772 | DREGu16((Opcode >> 9) & 7) = res; |
| 28773 | POST_IO |
| 28774 | RET(8) |
| 28775 | } |
| 28776 | |
| 28777 | // SUBaD |
| 28778 | OPCODE(0x9058) |
| 28779 | { |
| 28780 | u32 adr, res; |
| 28781 | u32 src, dst; |
| 28782 | |
| 28783 | adr = AREG((Opcode >> 0) & 7); |
| 28784 | AREG((Opcode >> 0) & 7) += 2; |
| 28785 | PRE_IO |
| 28786 | READ_WORD_F(adr, src) |
| 28787 | dst = DREGu16((Opcode >> 9) & 7); |
| 28788 | res = dst - src; |
| 28789 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28790 | flag_N = flag_X = flag_C = res >> 8; |
| 28791 | flag_NotZ = res & 0xFFFF; |
| 28792 | DREGu16((Opcode >> 9) & 7) = res; |
| 28793 | POST_IO |
| 28794 | RET(8) |
| 28795 | } |
| 28796 | |
| 28797 | // SUBaD |
| 28798 | OPCODE(0x9060) |
| 28799 | { |
| 28800 | u32 adr, res; |
| 28801 | u32 src, dst; |
| 28802 | |
| 28803 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 28804 | AREG((Opcode >> 0) & 7) = adr; |
| 28805 | PRE_IO |
| 28806 | READ_WORD_F(adr, src) |
| 28807 | dst = DREGu16((Opcode >> 9) & 7); |
| 28808 | res = dst - src; |
| 28809 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28810 | flag_N = flag_X = flag_C = res >> 8; |
| 28811 | flag_NotZ = res & 0xFFFF; |
| 28812 | DREGu16((Opcode >> 9) & 7) = res; |
| 28813 | POST_IO |
| 28814 | RET(10) |
| 28815 | } |
| 28816 | |
| 28817 | // SUBaD |
| 28818 | OPCODE(0x9068) |
| 28819 | { |
| 28820 | u32 adr, res; |
| 28821 | u32 src, dst; |
| 28822 | |
| 28823 | FETCH_SWORD(adr); |
| 28824 | adr += AREG((Opcode >> 0) & 7); |
| 28825 | PRE_IO |
| 28826 | READ_WORD_F(adr, src) |
| 28827 | dst = DREGu16((Opcode >> 9) & 7); |
| 28828 | res = dst - src; |
| 28829 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28830 | flag_N = flag_X = flag_C = res >> 8; |
| 28831 | flag_NotZ = res & 0xFFFF; |
| 28832 | DREGu16((Opcode >> 9) & 7) = res; |
| 28833 | POST_IO |
| 28834 | RET(12) |
| 28835 | } |
| 28836 | |
| 28837 | // SUBaD |
| 28838 | OPCODE(0x9070) |
| 28839 | { |
| 28840 | u32 adr, res; |
| 28841 | u32 src, dst; |
| 28842 | |
| 28843 | adr = AREG((Opcode >> 0) & 7); |
| 28844 | DECODE_EXT_WORD |
| 28845 | PRE_IO |
| 28846 | READ_WORD_F(adr, src) |
| 28847 | dst = DREGu16((Opcode >> 9) & 7); |
| 28848 | res = dst - src; |
| 28849 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28850 | flag_N = flag_X = flag_C = res >> 8; |
| 28851 | flag_NotZ = res & 0xFFFF; |
| 28852 | DREGu16((Opcode >> 9) & 7) = res; |
| 28853 | POST_IO |
| 28854 | RET(14) |
| 28855 | } |
| 28856 | |
| 28857 | // SUBaD |
| 28858 | OPCODE(0x9078) |
| 28859 | { |
| 28860 | u32 adr, res; |
| 28861 | u32 src, dst; |
| 28862 | |
| 28863 | FETCH_SWORD(adr); |
| 28864 | PRE_IO |
| 28865 | READ_WORD_F(adr, src) |
| 28866 | dst = DREGu16((Opcode >> 9) & 7); |
| 28867 | res = dst - src; |
| 28868 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28869 | flag_N = flag_X = flag_C = res >> 8; |
| 28870 | flag_NotZ = res & 0xFFFF; |
| 28871 | DREGu16((Opcode >> 9) & 7) = res; |
| 28872 | POST_IO |
| 28873 | RET(12) |
| 28874 | } |
| 28875 | |
| 28876 | // SUBaD |
| 28877 | OPCODE(0x9079) |
| 28878 | { |
| 28879 | u32 adr, res; |
| 28880 | u32 src, dst; |
| 28881 | |
| 28882 | FETCH_LONG(adr); |
| 28883 | PRE_IO |
| 28884 | READ_WORD_F(adr, src) |
| 28885 | dst = DREGu16((Opcode >> 9) & 7); |
| 28886 | res = dst - src; |
| 28887 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28888 | flag_N = flag_X = flag_C = res >> 8; |
| 28889 | flag_NotZ = res & 0xFFFF; |
| 28890 | DREGu16((Opcode >> 9) & 7) = res; |
| 28891 | POST_IO |
| 28892 | RET(16) |
| 28893 | } |
| 28894 | |
| 28895 | // SUBaD |
| 28896 | OPCODE(0x907A) |
| 28897 | { |
| 28898 | u32 adr, res; |
| 28899 | u32 src, dst; |
| 28900 | |
| 28901 | adr = GET_SWORD + GET_PC; |
| 28902 | PC++; |
| 28903 | PRE_IO |
| 28904 | READ_WORD_F(adr, src) |
| 28905 | dst = DREGu16((Opcode >> 9) & 7); |
| 28906 | res = dst - src; |
| 28907 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28908 | flag_N = flag_X = flag_C = res >> 8; |
| 28909 | flag_NotZ = res & 0xFFFF; |
| 28910 | DREGu16((Opcode >> 9) & 7) = res; |
| 28911 | POST_IO |
| 28912 | RET(12) |
| 28913 | } |
| 28914 | |
| 28915 | // SUBaD |
| 28916 | OPCODE(0x907B) |
| 28917 | { |
| 28918 | u32 adr, res; |
| 28919 | u32 src, dst; |
| 28920 | |
| 28921 | adr = GET_PC; |
| 28922 | DECODE_EXT_WORD |
| 28923 | PRE_IO |
| 28924 | READ_WORD_F(adr, src) |
| 28925 | dst = DREGu16((Opcode >> 9) & 7); |
| 28926 | res = dst - src; |
| 28927 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28928 | flag_N = flag_X = flag_C = res >> 8; |
| 28929 | flag_NotZ = res & 0xFFFF; |
| 28930 | DREGu16((Opcode >> 9) & 7) = res; |
| 28931 | POST_IO |
| 28932 | RET(14) |
| 28933 | } |
| 28934 | |
| 28935 | // SUBaD |
| 28936 | OPCODE(0x907C) |
| 28937 | { |
| 28938 | u32 adr, res; |
| 28939 | u32 src, dst; |
| 28940 | |
| 28941 | FETCH_WORD(src); |
| 28942 | dst = DREGu16((Opcode >> 9) & 7); |
| 28943 | res = dst - src; |
| 28944 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28945 | flag_N = flag_X = flag_C = res >> 8; |
| 28946 | flag_NotZ = res & 0xFFFF; |
| 28947 | DREGu16((Opcode >> 9) & 7) = res; |
| 28948 | RET(8) |
| 28949 | } |
| 28950 | |
| 28951 | // SUBaD |
| 28952 | OPCODE(0x905F) |
| 28953 | { |
| 28954 | u32 adr, res; |
| 28955 | u32 src, dst; |
| 28956 | |
| 28957 | adr = AREG(7); |
| 28958 | AREG(7) += 2; |
| 28959 | PRE_IO |
| 28960 | READ_WORD_F(adr, src) |
| 28961 | dst = DREGu16((Opcode >> 9) & 7); |
| 28962 | res = dst - src; |
| 28963 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28964 | flag_N = flag_X = flag_C = res >> 8; |
| 28965 | flag_NotZ = res & 0xFFFF; |
| 28966 | DREGu16((Opcode >> 9) & 7) = res; |
| 28967 | POST_IO |
| 28968 | RET(8) |
| 28969 | } |
| 28970 | |
| 28971 | // SUBaD |
| 28972 | OPCODE(0x9067) |
| 28973 | { |
| 28974 | u32 adr, res; |
| 28975 | u32 src, dst; |
| 28976 | |
| 28977 | adr = AREG(7) - 2; |
| 28978 | AREG(7) = adr; |
| 28979 | PRE_IO |
| 28980 | READ_WORD_F(adr, src) |
| 28981 | dst = DREGu16((Opcode >> 9) & 7); |
| 28982 | res = dst - src; |
| 28983 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 28984 | flag_N = flag_X = flag_C = res >> 8; |
| 28985 | flag_NotZ = res & 0xFFFF; |
| 28986 | DREGu16((Opcode >> 9) & 7) = res; |
| 28987 | POST_IO |
| 28988 | RET(10) |
| 28989 | } |
| 28990 | |
| 28991 | // SUBaD |
| 28992 | OPCODE(0x9080) |
| 28993 | { |
| 28994 | u32 adr, res; |
| 28995 | u32 src, dst; |
| 28996 | |
| 28997 | src = DREGu32((Opcode >> 0) & 7); |
| 28998 | dst = DREGu32((Opcode >> 9) & 7); |
| 28999 | res = dst - src; |
| 29000 | flag_NotZ = res; |
| 29001 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29002 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29003 | flag_N = res >> 24; |
| 29004 | DREGu32((Opcode >> 9) & 7) = res; |
| 29005 | RET(8) |
| 29006 | } |
| 29007 | |
| 29008 | // SUBaD |
| 29009 | OPCODE(0x9088) |
| 29010 | { |
| 29011 | u32 adr, res; |
| 29012 | u32 src, dst; |
| 29013 | |
| 29014 | src = AREGu32((Opcode >> 0) & 7); |
| 29015 | dst = DREGu32((Opcode >> 9) & 7); |
| 29016 | res = dst - src; |
| 29017 | flag_NotZ = res; |
| 29018 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29019 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29020 | flag_N = res >> 24; |
| 29021 | DREGu32((Opcode >> 9) & 7) = res; |
| 29022 | RET(8) |
| 29023 | } |
| 29024 | |
| 29025 | // SUBaD |
| 29026 | OPCODE(0x9090) |
| 29027 | { |
| 29028 | u32 adr, res; |
| 29029 | u32 src, dst; |
| 29030 | |
| 29031 | adr = AREG((Opcode >> 0) & 7); |
| 29032 | PRE_IO |
| 29033 | READ_LONG_F(adr, src) |
| 29034 | dst = DREGu32((Opcode >> 9) & 7); |
| 29035 | res = dst - src; |
| 29036 | flag_NotZ = res; |
| 29037 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29038 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29039 | flag_N = res >> 24; |
| 29040 | DREGu32((Opcode >> 9) & 7) = res; |
| 29041 | POST_IO |
| 29042 | RET(14) |
| 29043 | } |
| 29044 | |
| 29045 | // SUBaD |
| 29046 | OPCODE(0x9098) |
| 29047 | { |
| 29048 | u32 adr, res; |
| 29049 | u32 src, dst; |
| 29050 | |
| 29051 | adr = AREG((Opcode >> 0) & 7); |
| 29052 | AREG((Opcode >> 0) & 7) += 4; |
| 29053 | PRE_IO |
| 29054 | READ_LONG_F(adr, src) |
| 29055 | dst = DREGu32((Opcode >> 9) & 7); |
| 29056 | res = dst - src; |
| 29057 | flag_NotZ = res; |
| 29058 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29059 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29060 | flag_N = res >> 24; |
| 29061 | DREGu32((Opcode >> 9) & 7) = res; |
| 29062 | POST_IO |
| 29063 | RET(14) |
| 29064 | } |
| 29065 | |
| 29066 | // SUBaD |
| 29067 | OPCODE(0x90A0) |
| 29068 | { |
| 29069 | u32 adr, res; |
| 29070 | u32 src, dst; |
| 29071 | |
| 29072 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 29073 | AREG((Opcode >> 0) & 7) = adr; |
| 29074 | PRE_IO |
| 29075 | READ_LONG_F(adr, src) |
| 29076 | dst = DREGu32((Opcode >> 9) & 7); |
| 29077 | res = dst - src; |
| 29078 | flag_NotZ = res; |
| 29079 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29080 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29081 | flag_N = res >> 24; |
| 29082 | DREGu32((Opcode >> 9) & 7) = res; |
| 29083 | POST_IO |
| 29084 | RET(16) |
| 29085 | } |
| 29086 | |
| 29087 | // SUBaD |
| 29088 | OPCODE(0x90A8) |
| 29089 | { |
| 29090 | u32 adr, res; |
| 29091 | u32 src, dst; |
| 29092 | |
| 29093 | FETCH_SWORD(adr); |
| 29094 | adr += AREG((Opcode >> 0) & 7); |
| 29095 | PRE_IO |
| 29096 | READ_LONG_F(adr, src) |
| 29097 | dst = DREGu32((Opcode >> 9) & 7); |
| 29098 | res = dst - src; |
| 29099 | flag_NotZ = res; |
| 29100 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29101 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29102 | flag_N = res >> 24; |
| 29103 | DREGu32((Opcode >> 9) & 7) = res; |
| 29104 | POST_IO |
| 29105 | RET(18) |
| 29106 | } |
| 29107 | |
| 29108 | // SUBaD |
| 29109 | OPCODE(0x90B0) |
| 29110 | { |
| 29111 | u32 adr, res; |
| 29112 | u32 src, dst; |
| 29113 | |
| 29114 | adr = AREG((Opcode >> 0) & 7); |
| 29115 | DECODE_EXT_WORD |
| 29116 | PRE_IO |
| 29117 | READ_LONG_F(adr, src) |
| 29118 | dst = DREGu32((Opcode >> 9) & 7); |
| 29119 | res = dst - src; |
| 29120 | flag_NotZ = res; |
| 29121 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29122 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29123 | flag_N = res >> 24; |
| 29124 | DREGu32((Opcode >> 9) & 7) = res; |
| 29125 | POST_IO |
| 29126 | RET(20) |
| 29127 | } |
| 29128 | |
| 29129 | // SUBaD |
| 29130 | OPCODE(0x90B8) |
| 29131 | { |
| 29132 | u32 adr, res; |
| 29133 | u32 src, dst; |
| 29134 | |
| 29135 | FETCH_SWORD(adr); |
| 29136 | PRE_IO |
| 29137 | READ_LONG_F(adr, src) |
| 29138 | dst = DREGu32((Opcode >> 9) & 7); |
| 29139 | res = dst - src; |
| 29140 | flag_NotZ = res; |
| 29141 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29142 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29143 | flag_N = res >> 24; |
| 29144 | DREGu32((Opcode >> 9) & 7) = res; |
| 29145 | POST_IO |
| 29146 | RET(18) |
| 29147 | } |
| 29148 | |
| 29149 | // SUBaD |
| 29150 | OPCODE(0x90B9) |
| 29151 | { |
| 29152 | u32 adr, res; |
| 29153 | u32 src, dst; |
| 29154 | |
| 29155 | FETCH_LONG(adr); |
| 29156 | PRE_IO |
| 29157 | READ_LONG_F(adr, src) |
| 29158 | dst = DREGu32((Opcode >> 9) & 7); |
| 29159 | res = dst - src; |
| 29160 | flag_NotZ = res; |
| 29161 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29162 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29163 | flag_N = res >> 24; |
| 29164 | DREGu32((Opcode >> 9) & 7) = res; |
| 29165 | POST_IO |
| 29166 | RET(22) |
| 29167 | } |
| 29168 | |
| 29169 | // SUBaD |
| 29170 | OPCODE(0x90BA) |
| 29171 | { |
| 29172 | u32 adr, res; |
| 29173 | u32 src, dst; |
| 29174 | |
| 29175 | adr = GET_SWORD + GET_PC; |
| 29176 | PC++; |
| 29177 | PRE_IO |
| 29178 | READ_LONG_F(adr, src) |
| 29179 | dst = DREGu32((Opcode >> 9) & 7); |
| 29180 | res = dst - src; |
| 29181 | flag_NotZ = res; |
| 29182 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29183 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29184 | flag_N = res >> 24; |
| 29185 | DREGu32((Opcode >> 9) & 7) = res; |
| 29186 | POST_IO |
| 29187 | RET(18) |
| 29188 | } |
| 29189 | |
| 29190 | // SUBaD |
| 29191 | OPCODE(0x90BB) |
| 29192 | { |
| 29193 | u32 adr, res; |
| 29194 | u32 src, dst; |
| 29195 | |
| 29196 | adr = GET_PC; |
| 29197 | DECODE_EXT_WORD |
| 29198 | PRE_IO |
| 29199 | READ_LONG_F(adr, src) |
| 29200 | dst = DREGu32((Opcode >> 9) & 7); |
| 29201 | res = dst - src; |
| 29202 | flag_NotZ = res; |
| 29203 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29204 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29205 | flag_N = res >> 24; |
| 29206 | DREGu32((Opcode >> 9) & 7) = res; |
| 29207 | POST_IO |
| 29208 | RET(20) |
| 29209 | } |
| 29210 | |
| 29211 | // SUBaD |
| 29212 | OPCODE(0x90BC) |
| 29213 | { |
| 29214 | u32 adr, res; |
| 29215 | u32 src, dst; |
| 29216 | |
| 29217 | FETCH_LONG(src); |
| 29218 | dst = DREGu32((Opcode >> 9) & 7); |
| 29219 | res = dst - src; |
| 29220 | flag_NotZ = res; |
| 29221 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29222 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29223 | flag_N = res >> 24; |
| 29224 | DREGu32((Opcode >> 9) & 7) = res; |
| 29225 | RET(16) |
| 29226 | } |
| 29227 | |
| 29228 | // SUBaD |
| 29229 | OPCODE(0x909F) |
| 29230 | { |
| 29231 | u32 adr, res; |
| 29232 | u32 src, dst; |
| 29233 | |
| 29234 | adr = AREG(7); |
| 29235 | AREG(7) += 4; |
| 29236 | PRE_IO |
| 29237 | READ_LONG_F(adr, src) |
| 29238 | dst = DREGu32((Opcode >> 9) & 7); |
| 29239 | res = dst - src; |
| 29240 | flag_NotZ = res; |
| 29241 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29242 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29243 | flag_N = res >> 24; |
| 29244 | DREGu32((Opcode >> 9) & 7) = res; |
| 29245 | POST_IO |
| 29246 | RET(14) |
| 29247 | } |
| 29248 | |
| 29249 | // SUBaD |
| 29250 | OPCODE(0x90A7) |
| 29251 | { |
| 29252 | u32 adr, res; |
| 29253 | u32 src, dst; |
| 29254 | |
| 29255 | adr = AREG(7) - 4; |
| 29256 | AREG(7) = adr; |
| 29257 | PRE_IO |
| 29258 | READ_LONG_F(adr, src) |
| 29259 | dst = DREGu32((Opcode >> 9) & 7); |
| 29260 | res = dst - src; |
| 29261 | flag_NotZ = res; |
| 29262 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29263 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29264 | flag_N = res >> 24; |
| 29265 | DREGu32((Opcode >> 9) & 7) = res; |
| 29266 | POST_IO |
| 29267 | RET(16) |
| 29268 | } |
| 29269 | |
| 29270 | // SUBDa |
| 29271 | OPCODE(0x9110) |
| 29272 | { |
| 29273 | u32 adr, res; |
| 29274 | u32 src, dst; |
| 29275 | |
| 29276 | src = DREGu8((Opcode >> 9) & 7); |
| 29277 | adr = AREG((Opcode >> 0) & 7); |
| 29278 | PRE_IO |
| 29279 | READ_BYTE_F(adr, dst) |
| 29280 | res = dst - src; |
| 29281 | flag_N = flag_X = flag_C = res; |
| 29282 | flag_V = (src ^ dst) & (res ^ dst); |
| 29283 | flag_NotZ = res & 0xFF; |
| 29284 | WRITE_BYTE_F(adr, res) |
| 29285 | POST_IO |
| 29286 | RET(12) |
| 29287 | } |
| 29288 | |
| 29289 | // SUBDa |
| 29290 | OPCODE(0x9118) |
| 29291 | { |
| 29292 | u32 adr, res; |
| 29293 | u32 src, dst; |
| 29294 | |
| 29295 | src = DREGu8((Opcode >> 9) & 7); |
| 29296 | adr = AREG((Opcode >> 0) & 7); |
| 29297 | AREG((Opcode >> 0) & 7) += 1; |
| 29298 | PRE_IO |
| 29299 | READ_BYTE_F(adr, dst) |
| 29300 | res = dst - src; |
| 29301 | flag_N = flag_X = flag_C = res; |
| 29302 | flag_V = (src ^ dst) & (res ^ dst); |
| 29303 | flag_NotZ = res & 0xFF; |
| 29304 | WRITE_BYTE_F(adr, res) |
| 29305 | POST_IO |
| 29306 | RET(12) |
| 29307 | } |
| 29308 | |
| 29309 | // SUBDa |
| 29310 | OPCODE(0x9120) |
| 29311 | { |
| 29312 | u32 adr, res; |
| 29313 | u32 src, dst; |
| 29314 | |
| 29315 | src = DREGu8((Opcode >> 9) & 7); |
| 29316 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 29317 | AREG((Opcode >> 0) & 7) = adr; |
| 29318 | PRE_IO |
| 29319 | READ_BYTE_F(adr, dst) |
| 29320 | res = dst - src; |
| 29321 | flag_N = flag_X = flag_C = res; |
| 29322 | flag_V = (src ^ dst) & (res ^ dst); |
| 29323 | flag_NotZ = res & 0xFF; |
| 29324 | WRITE_BYTE_F(adr, res) |
| 29325 | POST_IO |
| 29326 | RET(14) |
| 29327 | } |
| 29328 | |
| 29329 | // SUBDa |
| 29330 | OPCODE(0x9128) |
| 29331 | { |
| 29332 | u32 adr, res; |
| 29333 | u32 src, dst; |
| 29334 | |
| 29335 | src = DREGu8((Opcode >> 9) & 7); |
| 29336 | FETCH_SWORD(adr); |
| 29337 | adr += AREG((Opcode >> 0) & 7); |
| 29338 | PRE_IO |
| 29339 | READ_BYTE_F(adr, dst) |
| 29340 | res = dst - src; |
| 29341 | flag_N = flag_X = flag_C = res; |
| 29342 | flag_V = (src ^ dst) & (res ^ dst); |
| 29343 | flag_NotZ = res & 0xFF; |
| 29344 | WRITE_BYTE_F(adr, res) |
| 29345 | POST_IO |
| 29346 | RET(16) |
| 29347 | } |
| 29348 | |
| 29349 | // SUBDa |
| 29350 | OPCODE(0x9130) |
| 29351 | { |
| 29352 | u32 adr, res; |
| 29353 | u32 src, dst; |
| 29354 | |
| 29355 | src = DREGu8((Opcode >> 9) & 7); |
| 29356 | adr = AREG((Opcode >> 0) & 7); |
| 29357 | DECODE_EXT_WORD |
| 29358 | PRE_IO |
| 29359 | READ_BYTE_F(adr, dst) |
| 29360 | res = dst - src; |
| 29361 | flag_N = flag_X = flag_C = res; |
| 29362 | flag_V = (src ^ dst) & (res ^ dst); |
| 29363 | flag_NotZ = res & 0xFF; |
| 29364 | WRITE_BYTE_F(adr, res) |
| 29365 | POST_IO |
| 29366 | RET(18) |
| 29367 | } |
| 29368 | |
| 29369 | // SUBDa |
| 29370 | OPCODE(0x9138) |
| 29371 | { |
| 29372 | u32 adr, res; |
| 29373 | u32 src, dst; |
| 29374 | |
| 29375 | src = DREGu8((Opcode >> 9) & 7); |
| 29376 | FETCH_SWORD(adr); |
| 29377 | PRE_IO |
| 29378 | READ_BYTE_F(adr, dst) |
| 29379 | res = dst - src; |
| 29380 | flag_N = flag_X = flag_C = res; |
| 29381 | flag_V = (src ^ dst) & (res ^ dst); |
| 29382 | flag_NotZ = res & 0xFF; |
| 29383 | WRITE_BYTE_F(adr, res) |
| 29384 | POST_IO |
| 29385 | RET(16) |
| 29386 | } |
| 29387 | |
| 29388 | // SUBDa |
| 29389 | OPCODE(0x9139) |
| 29390 | { |
| 29391 | u32 adr, res; |
| 29392 | u32 src, dst; |
| 29393 | |
| 29394 | src = DREGu8((Opcode >> 9) & 7); |
| 29395 | FETCH_LONG(adr); |
| 29396 | PRE_IO |
| 29397 | READ_BYTE_F(adr, dst) |
| 29398 | res = dst - src; |
| 29399 | flag_N = flag_X = flag_C = res; |
| 29400 | flag_V = (src ^ dst) & (res ^ dst); |
| 29401 | flag_NotZ = res & 0xFF; |
| 29402 | WRITE_BYTE_F(adr, res) |
| 29403 | POST_IO |
| 29404 | RET(20) |
| 29405 | } |
| 29406 | |
| 29407 | // SUBDa |
| 29408 | OPCODE(0x911F) |
| 29409 | { |
| 29410 | u32 adr, res; |
| 29411 | u32 src, dst; |
| 29412 | |
| 29413 | src = DREGu8((Opcode >> 9) & 7); |
| 29414 | adr = AREG(7); |
| 29415 | AREG(7) += 2; |
| 29416 | PRE_IO |
| 29417 | READ_BYTE_F(adr, dst) |
| 29418 | res = dst - src; |
| 29419 | flag_N = flag_X = flag_C = res; |
| 29420 | flag_V = (src ^ dst) & (res ^ dst); |
| 29421 | flag_NotZ = res & 0xFF; |
| 29422 | WRITE_BYTE_F(adr, res) |
| 29423 | POST_IO |
| 29424 | RET(12) |
| 29425 | } |
| 29426 | |
| 29427 | // SUBDa |
| 29428 | OPCODE(0x9127) |
| 29429 | { |
| 29430 | u32 adr, res; |
| 29431 | u32 src, dst; |
| 29432 | |
| 29433 | src = DREGu8((Opcode >> 9) & 7); |
| 29434 | adr = AREG(7) - 2; |
| 29435 | AREG(7) = adr; |
| 29436 | PRE_IO |
| 29437 | READ_BYTE_F(adr, dst) |
| 29438 | res = dst - src; |
| 29439 | flag_N = flag_X = flag_C = res; |
| 29440 | flag_V = (src ^ dst) & (res ^ dst); |
| 29441 | flag_NotZ = res & 0xFF; |
| 29442 | WRITE_BYTE_F(adr, res) |
| 29443 | POST_IO |
| 29444 | RET(14) |
| 29445 | } |
| 29446 | |
| 29447 | // SUBDa |
| 29448 | OPCODE(0x9150) |
| 29449 | { |
| 29450 | u32 adr, res; |
| 29451 | u32 src, dst; |
| 29452 | |
| 29453 | src = DREGu16((Opcode >> 9) & 7); |
| 29454 | adr = AREG((Opcode >> 0) & 7); |
| 29455 | PRE_IO |
| 29456 | READ_WORD_F(adr, dst) |
| 29457 | res = dst - src; |
| 29458 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29459 | flag_N = flag_X = flag_C = res >> 8; |
| 29460 | flag_NotZ = res & 0xFFFF; |
| 29461 | WRITE_WORD_F(adr, res) |
| 29462 | POST_IO |
| 29463 | RET(12) |
| 29464 | } |
| 29465 | |
| 29466 | // SUBDa |
| 29467 | OPCODE(0x9158) |
| 29468 | { |
| 29469 | u32 adr, res; |
| 29470 | u32 src, dst; |
| 29471 | |
| 29472 | src = DREGu16((Opcode >> 9) & 7); |
| 29473 | adr = AREG((Opcode >> 0) & 7); |
| 29474 | AREG((Opcode >> 0) & 7) += 2; |
| 29475 | PRE_IO |
| 29476 | READ_WORD_F(adr, dst) |
| 29477 | res = dst - src; |
| 29478 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29479 | flag_N = flag_X = flag_C = res >> 8; |
| 29480 | flag_NotZ = res & 0xFFFF; |
| 29481 | WRITE_WORD_F(adr, res) |
| 29482 | POST_IO |
| 29483 | RET(12) |
| 29484 | } |
| 29485 | |
| 29486 | // SUBDa |
| 29487 | OPCODE(0x9160) |
| 29488 | { |
| 29489 | u32 adr, res; |
| 29490 | u32 src, dst; |
| 29491 | |
| 29492 | src = DREGu16((Opcode >> 9) & 7); |
| 29493 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 29494 | AREG((Opcode >> 0) & 7) = adr; |
| 29495 | PRE_IO |
| 29496 | READ_WORD_F(adr, dst) |
| 29497 | res = dst - src; |
| 29498 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29499 | flag_N = flag_X = flag_C = res >> 8; |
| 29500 | flag_NotZ = res & 0xFFFF; |
| 29501 | WRITE_WORD_F(adr, res) |
| 29502 | POST_IO |
| 29503 | RET(14) |
| 29504 | } |
| 29505 | |
| 29506 | // SUBDa |
| 29507 | OPCODE(0x9168) |
| 29508 | { |
| 29509 | u32 adr, res; |
| 29510 | u32 src, dst; |
| 29511 | |
| 29512 | src = DREGu16((Opcode >> 9) & 7); |
| 29513 | FETCH_SWORD(adr); |
| 29514 | adr += AREG((Opcode >> 0) & 7); |
| 29515 | PRE_IO |
| 29516 | READ_WORD_F(adr, dst) |
| 29517 | res = dst - src; |
| 29518 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29519 | flag_N = flag_X = flag_C = res >> 8; |
| 29520 | flag_NotZ = res & 0xFFFF; |
| 29521 | WRITE_WORD_F(adr, res) |
| 29522 | POST_IO |
| 29523 | RET(16) |
| 29524 | } |
| 29525 | |
| 29526 | // SUBDa |
| 29527 | OPCODE(0x9170) |
| 29528 | { |
| 29529 | u32 adr, res; |
| 29530 | u32 src, dst; |
| 29531 | |
| 29532 | src = DREGu16((Opcode >> 9) & 7); |
| 29533 | adr = AREG((Opcode >> 0) & 7); |
| 29534 | DECODE_EXT_WORD |
| 29535 | PRE_IO |
| 29536 | READ_WORD_F(adr, dst) |
| 29537 | res = dst - src; |
| 29538 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29539 | flag_N = flag_X = flag_C = res >> 8; |
| 29540 | flag_NotZ = res & 0xFFFF; |
| 29541 | WRITE_WORD_F(adr, res) |
| 29542 | POST_IO |
| 29543 | RET(18) |
| 29544 | } |
| 29545 | |
| 29546 | // SUBDa |
| 29547 | OPCODE(0x9178) |
| 29548 | { |
| 29549 | u32 adr, res; |
| 29550 | u32 src, dst; |
| 29551 | |
| 29552 | src = DREGu16((Opcode >> 9) & 7); |
| 29553 | FETCH_SWORD(adr); |
| 29554 | PRE_IO |
| 29555 | READ_WORD_F(adr, dst) |
| 29556 | res = dst - src; |
| 29557 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29558 | flag_N = flag_X = flag_C = res >> 8; |
| 29559 | flag_NotZ = res & 0xFFFF; |
| 29560 | WRITE_WORD_F(adr, res) |
| 29561 | POST_IO |
| 29562 | RET(16) |
| 29563 | } |
| 29564 | |
| 29565 | // SUBDa |
| 29566 | OPCODE(0x9179) |
| 29567 | { |
| 29568 | u32 adr, res; |
| 29569 | u32 src, dst; |
| 29570 | |
| 29571 | src = DREGu16((Opcode >> 9) & 7); |
| 29572 | FETCH_LONG(adr); |
| 29573 | PRE_IO |
| 29574 | READ_WORD_F(adr, dst) |
| 29575 | res = dst - src; |
| 29576 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29577 | flag_N = flag_X = flag_C = res >> 8; |
| 29578 | flag_NotZ = res & 0xFFFF; |
| 29579 | WRITE_WORD_F(adr, res) |
| 29580 | POST_IO |
| 29581 | RET(20) |
| 29582 | } |
| 29583 | |
| 29584 | // SUBDa |
| 29585 | OPCODE(0x915F) |
| 29586 | { |
| 29587 | u32 adr, res; |
| 29588 | u32 src, dst; |
| 29589 | |
| 29590 | src = DREGu16((Opcode >> 9) & 7); |
| 29591 | adr = AREG(7); |
| 29592 | AREG(7) += 2; |
| 29593 | PRE_IO |
| 29594 | READ_WORD_F(adr, dst) |
| 29595 | res = dst - src; |
| 29596 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29597 | flag_N = flag_X = flag_C = res >> 8; |
| 29598 | flag_NotZ = res & 0xFFFF; |
| 29599 | WRITE_WORD_F(adr, res) |
| 29600 | POST_IO |
| 29601 | RET(12) |
| 29602 | } |
| 29603 | |
| 29604 | // SUBDa |
| 29605 | OPCODE(0x9167) |
| 29606 | { |
| 29607 | u32 adr, res; |
| 29608 | u32 src, dst; |
| 29609 | |
| 29610 | src = DREGu16((Opcode >> 9) & 7); |
| 29611 | adr = AREG(7) - 2; |
| 29612 | AREG(7) = adr; |
| 29613 | PRE_IO |
| 29614 | READ_WORD_F(adr, dst) |
| 29615 | res = dst - src; |
| 29616 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29617 | flag_N = flag_X = flag_C = res >> 8; |
| 29618 | flag_NotZ = res & 0xFFFF; |
| 29619 | WRITE_WORD_F(adr, res) |
| 29620 | POST_IO |
| 29621 | RET(14) |
| 29622 | } |
| 29623 | |
| 29624 | // SUBDa |
| 29625 | OPCODE(0x9190) |
| 29626 | { |
| 29627 | u32 adr, res; |
| 29628 | u32 src, dst; |
| 29629 | |
| 29630 | src = DREGu32((Opcode >> 9) & 7); |
| 29631 | adr = AREG((Opcode >> 0) & 7); |
| 29632 | PRE_IO |
| 29633 | READ_LONG_F(adr, dst) |
| 29634 | res = dst - src; |
| 29635 | flag_NotZ = res; |
| 29636 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29637 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29638 | flag_N = res >> 24; |
| 29639 | WRITE_LONG_F(adr, res) |
| 29640 | POST_IO |
| 29641 | RET(20) |
| 29642 | } |
| 29643 | |
| 29644 | // SUBDa |
| 29645 | OPCODE(0x9198) |
| 29646 | { |
| 29647 | u32 adr, res; |
| 29648 | u32 src, dst; |
| 29649 | |
| 29650 | src = DREGu32((Opcode >> 9) & 7); |
| 29651 | adr = AREG((Opcode >> 0) & 7); |
| 29652 | AREG((Opcode >> 0) & 7) += 4; |
| 29653 | PRE_IO |
| 29654 | READ_LONG_F(adr, dst) |
| 29655 | res = dst - src; |
| 29656 | flag_NotZ = res; |
| 29657 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29658 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29659 | flag_N = res >> 24; |
| 29660 | WRITE_LONG_F(adr, res) |
| 29661 | POST_IO |
| 29662 | RET(20) |
| 29663 | } |
| 29664 | |
| 29665 | // SUBDa |
| 29666 | OPCODE(0x91A0) |
| 29667 | { |
| 29668 | u32 adr, res; |
| 29669 | u32 src, dst; |
| 29670 | |
| 29671 | src = DREGu32((Opcode >> 9) & 7); |
| 29672 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 29673 | AREG((Opcode >> 0) & 7) = adr; |
| 29674 | PRE_IO |
| 29675 | READ_LONG_F(adr, dst) |
| 29676 | res = dst - src; |
| 29677 | flag_NotZ = res; |
| 29678 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29679 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29680 | flag_N = res >> 24; |
| 29681 | WRITE_LONG_F(adr, res) |
| 29682 | POST_IO |
| 29683 | RET(22) |
| 29684 | } |
| 29685 | |
| 29686 | // SUBDa |
| 29687 | OPCODE(0x91A8) |
| 29688 | { |
| 29689 | u32 adr, res; |
| 29690 | u32 src, dst; |
| 29691 | |
| 29692 | src = DREGu32((Opcode >> 9) & 7); |
| 29693 | FETCH_SWORD(adr); |
| 29694 | adr += AREG((Opcode >> 0) & 7); |
| 29695 | PRE_IO |
| 29696 | READ_LONG_F(adr, dst) |
| 29697 | res = dst - src; |
| 29698 | flag_NotZ = res; |
| 29699 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29700 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29701 | flag_N = res >> 24; |
| 29702 | WRITE_LONG_F(adr, res) |
| 29703 | POST_IO |
| 29704 | RET(24) |
| 29705 | } |
| 29706 | |
| 29707 | // SUBDa |
| 29708 | OPCODE(0x91B0) |
| 29709 | { |
| 29710 | u32 adr, res; |
| 29711 | u32 src, dst; |
| 29712 | |
| 29713 | src = DREGu32((Opcode >> 9) & 7); |
| 29714 | adr = AREG((Opcode >> 0) & 7); |
| 29715 | DECODE_EXT_WORD |
| 29716 | PRE_IO |
| 29717 | READ_LONG_F(adr, dst) |
| 29718 | res = dst - src; |
| 29719 | flag_NotZ = res; |
| 29720 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29721 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29722 | flag_N = res >> 24; |
| 29723 | WRITE_LONG_F(adr, res) |
| 29724 | POST_IO |
| 29725 | RET(26) |
| 29726 | } |
| 29727 | |
| 29728 | // SUBDa |
| 29729 | OPCODE(0x91B8) |
| 29730 | { |
| 29731 | u32 adr, res; |
| 29732 | u32 src, dst; |
| 29733 | |
| 29734 | src = DREGu32((Opcode >> 9) & 7); |
| 29735 | FETCH_SWORD(adr); |
| 29736 | PRE_IO |
| 29737 | READ_LONG_F(adr, dst) |
| 29738 | res = dst - src; |
| 29739 | flag_NotZ = res; |
| 29740 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29741 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29742 | flag_N = res >> 24; |
| 29743 | WRITE_LONG_F(adr, res) |
| 29744 | POST_IO |
| 29745 | RET(24) |
| 29746 | } |
| 29747 | |
| 29748 | // SUBDa |
| 29749 | OPCODE(0x91B9) |
| 29750 | { |
| 29751 | u32 adr, res; |
| 29752 | u32 src, dst; |
| 29753 | |
| 29754 | src = DREGu32((Opcode >> 9) & 7); |
| 29755 | FETCH_LONG(adr); |
| 29756 | PRE_IO |
| 29757 | READ_LONG_F(adr, dst) |
| 29758 | res = dst - src; |
| 29759 | flag_NotZ = res; |
| 29760 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29761 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29762 | flag_N = res >> 24; |
| 29763 | WRITE_LONG_F(adr, res) |
| 29764 | POST_IO |
| 29765 | RET(28) |
| 29766 | } |
| 29767 | |
| 29768 | // SUBDa |
| 29769 | OPCODE(0x919F) |
| 29770 | { |
| 29771 | u32 adr, res; |
| 29772 | u32 src, dst; |
| 29773 | |
| 29774 | src = DREGu32((Opcode >> 9) & 7); |
| 29775 | adr = AREG(7); |
| 29776 | AREG(7) += 4; |
| 29777 | PRE_IO |
| 29778 | READ_LONG_F(adr, dst) |
| 29779 | res = dst - src; |
| 29780 | flag_NotZ = res; |
| 29781 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29782 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29783 | flag_N = res >> 24; |
| 29784 | WRITE_LONG_F(adr, res) |
| 29785 | POST_IO |
| 29786 | RET(20) |
| 29787 | } |
| 29788 | |
| 29789 | // SUBDa |
| 29790 | OPCODE(0x91A7) |
| 29791 | { |
| 29792 | u32 adr, res; |
| 29793 | u32 src, dst; |
| 29794 | |
| 29795 | src = DREGu32((Opcode >> 9) & 7); |
| 29796 | adr = AREG(7) - 4; |
| 29797 | AREG(7) = adr; |
| 29798 | PRE_IO |
| 29799 | READ_LONG_F(adr, dst) |
| 29800 | res = dst - src; |
| 29801 | flag_NotZ = res; |
| 29802 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29803 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29804 | flag_N = res >> 24; |
| 29805 | WRITE_LONG_F(adr, res) |
| 29806 | POST_IO |
| 29807 | RET(22) |
| 29808 | } |
| 29809 | |
| 29810 | // SUBX |
| 29811 | OPCODE(0x9100) |
| 29812 | { |
| 29813 | u32 adr, res; |
| 29814 | u32 src, dst; |
| 29815 | |
| 29816 | src = DREGu8((Opcode >> 0) & 7); |
| 29817 | dst = DREGu8((Opcode >> 9) & 7); |
| 29818 | res = dst - src - ((flag_X >> 8) & 1); |
| 29819 | flag_N = flag_X = flag_C = res; |
| 29820 | flag_V = (src ^ dst) & (res ^ dst); |
| 29821 | flag_NotZ |= res & 0xFF; |
| 29822 | DREGu8((Opcode >> 9) & 7) = res; |
| 29823 | RET(4) |
| 29824 | } |
| 29825 | |
| 29826 | // SUBX |
| 29827 | OPCODE(0x9140) |
| 29828 | { |
| 29829 | u32 adr, res; |
| 29830 | u32 src, dst; |
| 29831 | |
| 29832 | src = DREGu16((Opcode >> 0) & 7); |
| 29833 | dst = DREGu16((Opcode >> 9) & 7); |
| 29834 | res = dst - src - ((flag_X >> 8) & 1); |
| 29835 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29836 | flag_N = flag_X = flag_C = res >> 8; |
| 29837 | flag_NotZ |= res & 0xFFFF; |
| 29838 | DREGu16((Opcode >> 9) & 7) = res; |
| 29839 | RET(4) |
| 29840 | } |
| 29841 | |
| 29842 | // SUBX |
| 29843 | OPCODE(0x9180) |
| 29844 | { |
| 29845 | u32 adr, res; |
| 29846 | u32 src, dst; |
| 29847 | |
| 29848 | src = DREGu32((Opcode >> 0) & 7); |
| 29849 | dst = DREGu32((Opcode >> 9) & 7); |
| 29850 | res = dst - src - ((flag_X >> 8) & 1); |
| 29851 | flag_NotZ |= res; |
| 29852 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29853 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29854 | flag_N = res >> 24; |
| 29855 | DREGu32((Opcode >> 9) & 7) = res; |
| 29856 | RET(8) |
| 29857 | } |
| 29858 | |
| 29859 | // SUBXM |
| 29860 | OPCODE(0x9108) |
| 29861 | { |
| 29862 | u32 adr, res; |
| 29863 | u32 src, dst; |
| 29864 | |
| 29865 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 29866 | AREG((Opcode >> 0) & 7) = adr; |
| 29867 | PRE_IO |
| 29868 | READ_BYTE_F(adr, src) |
| 29869 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 29870 | AREG((Opcode >> 9) & 7) = adr; |
| 29871 | READ_BYTE_F(adr, dst) |
| 29872 | res = dst - src - ((flag_X >> 8) & 1); |
| 29873 | flag_N = flag_X = flag_C = res; |
| 29874 | flag_V = (src ^ dst) & (res ^ dst); |
| 29875 | flag_NotZ |= res & 0xFF; |
| 29876 | WRITE_BYTE_F(adr, res) |
| 29877 | POST_IO |
| 29878 | RET(18) |
| 29879 | } |
| 29880 | |
| 29881 | // SUBXM |
| 29882 | OPCODE(0x9148) |
| 29883 | { |
| 29884 | u32 adr, res; |
| 29885 | u32 src, dst; |
| 29886 | |
| 29887 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 29888 | AREG((Opcode >> 0) & 7) = adr; |
| 29889 | PRE_IO |
| 29890 | READ_WORD_F(adr, src) |
| 29891 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 29892 | AREG((Opcode >> 9) & 7) = adr; |
| 29893 | READ_WORD_F(adr, dst) |
| 29894 | res = dst - src - ((flag_X >> 8) & 1); |
| 29895 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29896 | flag_N = flag_X = flag_C = res >> 8; |
| 29897 | flag_NotZ |= res & 0xFFFF; |
| 29898 | WRITE_WORD_F(adr, res) |
| 29899 | POST_IO |
| 29900 | RET(18) |
| 29901 | } |
| 29902 | |
| 29903 | // SUBXM |
| 29904 | OPCODE(0x9188) |
| 29905 | { |
| 29906 | u32 adr, res; |
| 29907 | u32 src, dst; |
| 29908 | |
| 29909 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 29910 | AREG((Opcode >> 0) & 7) = adr; |
| 29911 | PRE_IO |
| 29912 | READ_LONG_F(adr, src) |
| 29913 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 29914 | AREG((Opcode >> 9) & 7) = adr; |
| 29915 | READ_LONG_F(adr, dst) |
| 29916 | res = dst - src - ((flag_X >> 8) & 1); |
| 29917 | flag_NotZ |= res; |
| 29918 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29919 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29920 | flag_N = res >> 24; |
| 29921 | WRITE_LONG_F(adr, res) |
| 29922 | POST_IO |
| 29923 | RET(30) |
| 29924 | } |
| 29925 | |
| 29926 | // SUBX7M |
| 29927 | OPCODE(0x910F) |
| 29928 | { |
| 29929 | u32 adr, res; |
| 29930 | u32 src, dst; |
| 29931 | |
| 29932 | adr = AREG(7) - 2; |
| 29933 | AREG(7) = adr; |
| 29934 | PRE_IO |
| 29935 | READ_BYTE_F(adr, src) |
| 29936 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 29937 | AREG((Opcode >> 9) & 7) = adr; |
| 29938 | READ_BYTE_F(adr, dst) |
| 29939 | res = dst - src - ((flag_X >> 8) & 1); |
| 29940 | flag_N = flag_X = flag_C = res; |
| 29941 | flag_V = (src ^ dst) & (res ^ dst); |
| 29942 | flag_NotZ |= res & 0xFF; |
| 29943 | WRITE_BYTE_F(adr, res) |
| 29944 | POST_IO |
| 29945 | RET(18) |
| 29946 | } |
| 29947 | |
| 29948 | // SUBX7M |
| 29949 | OPCODE(0x914F) |
| 29950 | { |
| 29951 | u32 adr, res; |
| 29952 | u32 src, dst; |
| 29953 | |
| 29954 | adr = AREG(7) - 2; |
| 29955 | AREG(7) = adr; |
| 29956 | PRE_IO |
| 29957 | READ_WORD_F(adr, src) |
| 29958 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 29959 | AREG((Opcode >> 9) & 7) = adr; |
| 29960 | READ_WORD_F(adr, dst) |
| 29961 | res = dst - src - ((flag_X >> 8) & 1); |
| 29962 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 29963 | flag_N = flag_X = flag_C = res >> 8; |
| 29964 | flag_NotZ |= res & 0xFFFF; |
| 29965 | WRITE_WORD_F(adr, res) |
| 29966 | POST_IO |
| 29967 | RET(18) |
| 29968 | } |
| 29969 | |
| 29970 | // SUBX7M |
| 29971 | OPCODE(0x918F) |
| 29972 | { |
| 29973 | u32 adr, res; |
| 29974 | u32 src, dst; |
| 29975 | |
| 29976 | adr = AREG(7) - 4; |
| 29977 | AREG(7) = adr; |
| 29978 | PRE_IO |
| 29979 | READ_LONG_F(adr, src) |
| 29980 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 29981 | AREG((Opcode >> 9) & 7) = adr; |
| 29982 | READ_LONG_F(adr, dst) |
| 29983 | res = dst - src - ((flag_X >> 8) & 1); |
| 29984 | flag_NotZ |= res; |
| 29985 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 29986 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 29987 | flag_N = res >> 24; |
| 29988 | WRITE_LONG_F(adr, res) |
| 29989 | POST_IO |
| 29990 | RET(30) |
| 29991 | } |
| 29992 | |
| 29993 | // SUBXM7 |
| 29994 | OPCODE(0x9F08) |
| 29995 | { |
| 29996 | u32 adr, res; |
| 29997 | u32 src, dst; |
| 29998 | |
| 29999 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 30000 | AREG((Opcode >> 0) & 7) = adr; |
| 30001 | PRE_IO |
| 30002 | READ_BYTE_F(adr, src) |
| 30003 | adr = AREG(7) - 2; |
| 30004 | AREG(7) = adr; |
| 30005 | READ_BYTE_F(adr, dst) |
| 30006 | res = dst - src - ((flag_X >> 8) & 1); |
| 30007 | flag_N = flag_X = flag_C = res; |
| 30008 | flag_V = (src ^ dst) & (res ^ dst); |
| 30009 | flag_NotZ |= res & 0xFF; |
| 30010 | WRITE_BYTE_F(adr, res) |
| 30011 | POST_IO |
| 30012 | RET(18) |
| 30013 | } |
| 30014 | |
| 30015 | // SUBXM7 |
| 30016 | OPCODE(0x9F48) |
| 30017 | { |
| 30018 | u32 adr, res; |
| 30019 | u32 src, dst; |
| 30020 | |
| 30021 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 30022 | AREG((Opcode >> 0) & 7) = adr; |
| 30023 | PRE_IO |
| 30024 | READ_WORD_F(adr, src) |
| 30025 | adr = AREG(7) - 2; |
| 30026 | AREG(7) = adr; |
| 30027 | READ_WORD_F(adr, dst) |
| 30028 | res = dst - src - ((flag_X >> 8) & 1); |
| 30029 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 30030 | flag_N = flag_X = flag_C = res >> 8; |
| 30031 | flag_NotZ |= res & 0xFFFF; |
| 30032 | WRITE_WORD_F(adr, res) |
| 30033 | POST_IO |
| 30034 | RET(18) |
| 30035 | } |
| 30036 | |
| 30037 | // SUBXM7 |
| 30038 | OPCODE(0x9F88) |
| 30039 | { |
| 30040 | u32 adr, res; |
| 30041 | u32 src, dst; |
| 30042 | |
| 30043 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 30044 | AREG((Opcode >> 0) & 7) = adr; |
| 30045 | PRE_IO |
| 30046 | READ_LONG_F(adr, src) |
| 30047 | adr = AREG(7) - 4; |
| 30048 | AREG(7) = adr; |
| 30049 | READ_LONG_F(adr, dst) |
| 30050 | res = dst - src - ((flag_X >> 8) & 1); |
| 30051 | flag_NotZ |= res; |
| 30052 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 30053 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 30054 | flag_N = res >> 24; |
| 30055 | WRITE_LONG_F(adr, res) |
| 30056 | POST_IO |
| 30057 | RET(30) |
| 30058 | } |
| 30059 | |
| 30060 | // SUBX7M7 |
| 30061 | OPCODE(0x9F0F) |
| 30062 | { |
| 30063 | u32 adr, res; |
| 30064 | u32 src, dst; |
| 30065 | |
| 30066 | adr = AREG(7) - 2; |
| 30067 | AREG(7) = adr; |
| 30068 | PRE_IO |
| 30069 | READ_BYTE_F(adr, src) |
| 30070 | adr = AREG(7) - 2; |
| 30071 | AREG(7) = adr; |
| 30072 | READ_BYTE_F(adr, dst) |
| 30073 | res = dst - src - ((flag_X >> 8) & 1); |
| 30074 | flag_N = flag_X = flag_C = res; |
| 30075 | flag_V = (src ^ dst) & (res ^ dst); |
| 30076 | flag_NotZ |= res & 0xFF; |
| 30077 | WRITE_BYTE_F(adr, res) |
| 30078 | POST_IO |
| 30079 | RET(18) |
| 30080 | } |
| 30081 | |
| 30082 | // SUBX7M7 |
| 30083 | OPCODE(0x9F4F) |
| 30084 | { |
| 30085 | u32 adr, res; |
| 30086 | u32 src, dst; |
| 30087 | |
| 30088 | adr = AREG(7) - 2; |
| 30089 | AREG(7) = adr; |
| 30090 | PRE_IO |
| 30091 | READ_WORD_F(adr, src) |
| 30092 | adr = AREG(7) - 2; |
| 30093 | AREG(7) = adr; |
| 30094 | READ_WORD_F(adr, dst) |
| 30095 | res = dst - src - ((flag_X >> 8) & 1); |
| 30096 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 30097 | flag_N = flag_X = flag_C = res >> 8; |
| 30098 | flag_NotZ |= res & 0xFFFF; |
| 30099 | WRITE_WORD_F(adr, res) |
| 30100 | POST_IO |
| 30101 | RET(18) |
| 30102 | } |
| 30103 | |
| 30104 | // SUBX7M7 |
| 30105 | OPCODE(0x9F8F) |
| 30106 | { |
| 30107 | u32 adr, res; |
| 30108 | u32 src, dst; |
| 30109 | |
| 30110 | adr = AREG(7) - 4; |
| 30111 | AREG(7) = adr; |
| 30112 | PRE_IO |
| 30113 | READ_LONG_F(adr, src) |
| 30114 | adr = AREG(7) - 4; |
| 30115 | AREG(7) = adr; |
| 30116 | READ_LONG_F(adr, dst) |
| 30117 | res = dst - src - ((flag_X >> 8) & 1); |
| 30118 | flag_NotZ |= res; |
| 30119 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 30120 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 30121 | flag_N = res >> 24; |
| 30122 | WRITE_LONG_F(adr, res) |
| 30123 | POST_IO |
| 30124 | RET(30) |
| 30125 | } |
| 30126 | |
| 30127 | // SUBA |
| 30128 | OPCODE(0x90C0) |
| 30129 | { |
| 30130 | u32 adr, res; |
| 30131 | u32 src, dst; |
| 30132 | |
| 30133 | src = (s32)DREGs16((Opcode >> 0) & 7); |
| 30134 | dst = AREGu32((Opcode >> 9) & 7); |
| 30135 | res = dst - src; |
| 30136 | AREG((Opcode >> 9) & 7) = res; |
| 30137 | RET(8) |
| 30138 | } |
| 30139 | |
| 30140 | // SUBA |
| 30141 | OPCODE(0x90C8) |
| 30142 | { |
| 30143 | u32 adr, res; |
| 30144 | u32 src, dst; |
| 30145 | |
| 30146 | src = (s32)AREGs16((Opcode >> 0) & 7); |
| 30147 | dst = AREGu32((Opcode >> 9) & 7); |
| 30148 | res = dst - src; |
| 30149 | AREG((Opcode >> 9) & 7) = res; |
| 30150 | RET(8) |
| 30151 | } |
| 30152 | |
| 30153 | // SUBA |
| 30154 | OPCODE(0x90D0) |
| 30155 | { |
| 30156 | u32 adr, res; |
| 30157 | u32 src, dst; |
| 30158 | |
| 30159 | adr = AREG((Opcode >> 0) & 7); |
| 30160 | PRE_IO |
| 30161 | READSX_WORD_F(adr, src) |
| 30162 | dst = AREGu32((Opcode >> 9) & 7); |
| 30163 | res = dst - src; |
| 30164 | AREG((Opcode >> 9) & 7) = res; |
| 30165 | POST_IO |
| 30166 | #ifdef USE_CYCLONE_TIMING |
| 30167 | RET(12) |
| 30168 | #else |
| 30169 | RET(10) |
| 30170 | #endif |
| 30171 | } |
| 30172 | |
| 30173 | // SUBA |
| 30174 | OPCODE(0x90D8) |
| 30175 | { |
| 30176 | u32 adr, res; |
| 30177 | u32 src, dst; |
| 30178 | |
| 30179 | adr = AREG((Opcode >> 0) & 7); |
| 30180 | AREG((Opcode >> 0) & 7) += 2; |
| 30181 | PRE_IO |
| 30182 | READSX_WORD_F(adr, src) |
| 30183 | dst = AREGu32((Opcode >> 9) & 7); |
| 30184 | res = dst - src; |
| 30185 | AREG((Opcode >> 9) & 7) = res; |
| 30186 | POST_IO |
| 30187 | #ifdef USE_CYCLONE_TIMING |
| 30188 | RET(12) |
| 30189 | #else |
| 30190 | RET(10) |
| 30191 | #endif |
| 30192 | } |
| 30193 | |
| 30194 | // SUBA |
| 30195 | OPCODE(0x90E0) |
| 30196 | { |
| 30197 | u32 adr, res; |
| 30198 | u32 src, dst; |
| 30199 | |
| 30200 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 30201 | AREG((Opcode >> 0) & 7) = adr; |
| 30202 | PRE_IO |
| 30203 | READSX_WORD_F(adr, src) |
| 30204 | dst = AREGu32((Opcode >> 9) & 7); |
| 30205 | res = dst - src; |
| 30206 | AREG((Opcode >> 9) & 7) = res; |
| 30207 | POST_IO |
| 30208 | #ifdef USE_CYCLONE_TIMING |
| 30209 | RET(14) |
| 30210 | #else |
| 30211 | RET(12) |
| 30212 | #endif |
| 30213 | } |
| 30214 | |
| 30215 | // SUBA |
| 30216 | OPCODE(0x90E8) |
| 30217 | { |
| 30218 | u32 adr, res; |
| 30219 | u32 src, dst; |
| 30220 | |
| 30221 | FETCH_SWORD(adr); |
| 30222 | adr += AREG((Opcode >> 0) & 7); |
| 30223 | PRE_IO |
| 30224 | READSX_WORD_F(adr, src) |
| 30225 | dst = AREGu32((Opcode >> 9) & 7); |
| 30226 | res = dst - src; |
| 30227 | AREG((Opcode >> 9) & 7) = res; |
| 30228 | POST_IO |
| 30229 | #ifdef USE_CYCLONE_TIMING |
| 30230 | RET(16) |
| 30231 | #else |
| 30232 | RET(14) |
| 30233 | #endif |
| 30234 | } |
| 30235 | |
| 30236 | // SUBA |
| 30237 | OPCODE(0x90F0) |
| 30238 | { |
| 30239 | u32 adr, res; |
| 30240 | u32 src, dst; |
| 30241 | |
| 30242 | adr = AREG((Opcode >> 0) & 7); |
| 30243 | DECODE_EXT_WORD |
| 30244 | PRE_IO |
| 30245 | READSX_WORD_F(adr, src) |
| 30246 | dst = AREGu32((Opcode >> 9) & 7); |
| 30247 | res = dst - src; |
| 30248 | AREG((Opcode >> 9) & 7) = res; |
| 30249 | POST_IO |
| 30250 | #ifdef USE_CYCLONE_TIMING |
| 30251 | RET(18) |
| 30252 | #else |
| 30253 | RET(16) |
| 30254 | #endif |
| 30255 | } |
| 30256 | |
| 30257 | // SUBA |
| 30258 | OPCODE(0x90F8) |
| 30259 | { |
| 30260 | u32 adr, res; |
| 30261 | u32 src, dst; |
| 30262 | |
| 30263 | FETCH_SWORD(adr); |
| 30264 | PRE_IO |
| 30265 | READSX_WORD_F(adr, src) |
| 30266 | dst = AREGu32((Opcode >> 9) & 7); |
| 30267 | res = dst - src; |
| 30268 | AREG((Opcode >> 9) & 7) = res; |
| 30269 | POST_IO |
| 30270 | #ifdef USE_CYCLONE_TIMING |
| 30271 | RET(16) |
| 30272 | #else |
| 30273 | RET(14) |
| 30274 | #endif |
| 30275 | } |
| 30276 | |
| 30277 | // SUBA |
| 30278 | OPCODE(0x90F9) |
| 30279 | { |
| 30280 | u32 adr, res; |
| 30281 | u32 src, dst; |
| 30282 | |
| 30283 | FETCH_LONG(adr); |
| 30284 | PRE_IO |
| 30285 | READSX_WORD_F(adr, src) |
| 30286 | dst = AREGu32((Opcode >> 9) & 7); |
| 30287 | res = dst - src; |
| 30288 | AREG((Opcode >> 9) & 7) = res; |
| 30289 | POST_IO |
| 30290 | #ifdef USE_CYCLONE_TIMING |
| 30291 | RET(20) |
| 30292 | #else |
| 30293 | RET(18) |
| 30294 | #endif |
| 30295 | } |
| 30296 | |
| 30297 | // SUBA |
| 30298 | OPCODE(0x90FA) |
| 30299 | { |
| 30300 | u32 adr, res; |
| 30301 | u32 src, dst; |
| 30302 | |
| 30303 | adr = GET_SWORD + GET_PC; |
| 30304 | PC++; |
| 30305 | PRE_IO |
| 30306 | READSX_WORD_F(adr, src) |
| 30307 | dst = AREGu32((Opcode >> 9) & 7); |
| 30308 | res = dst - src; |
| 30309 | AREG((Opcode >> 9) & 7) = res; |
| 30310 | POST_IO |
| 30311 | #ifdef USE_CYCLONE_TIMING |
| 30312 | RET(16) |
| 30313 | #else |
| 30314 | RET(14) |
| 30315 | #endif |
| 30316 | } |
| 30317 | |
| 30318 | // SUBA |
| 30319 | OPCODE(0x90FB) |
| 30320 | { |
| 30321 | u32 adr, res; |
| 30322 | u32 src, dst; |
| 30323 | |
| 30324 | adr = GET_PC; |
| 30325 | DECODE_EXT_WORD |
| 30326 | PRE_IO |
| 30327 | READSX_WORD_F(adr, src) |
| 30328 | dst = AREGu32((Opcode >> 9) & 7); |
| 30329 | res = dst - src; |
| 30330 | AREG((Opcode >> 9) & 7) = res; |
| 30331 | POST_IO |
| 30332 | #ifdef USE_CYCLONE_TIMING |
| 30333 | RET(18) |
| 30334 | #else |
| 30335 | RET(16) |
| 30336 | #endif |
| 30337 | } |
| 30338 | |
| 30339 | // SUBA |
| 30340 | OPCODE(0x90FC) |
| 30341 | { |
| 30342 | u32 adr, res; |
| 30343 | u32 src, dst; |
| 30344 | |
| 30345 | FETCH_SWORD(src); |
| 30346 | dst = AREGu32((Opcode >> 9) & 7); |
| 30347 | res = dst - src; |
| 30348 | AREG((Opcode >> 9) & 7) = res; |
| 30349 | RET(12) |
| 30350 | } |
| 30351 | |
| 30352 | // SUBA |
| 30353 | OPCODE(0x90DF) |
| 30354 | { |
| 30355 | u32 adr, res; |
| 30356 | u32 src, dst; |
| 30357 | |
| 30358 | adr = AREG(7); |
| 30359 | AREG(7) += 2; |
| 30360 | PRE_IO |
| 30361 | READSX_WORD_F(adr, src) |
| 30362 | dst = AREGu32((Opcode >> 9) & 7); |
| 30363 | res = dst - src; |
| 30364 | AREG((Opcode >> 9) & 7) = res; |
| 30365 | POST_IO |
| 30366 | #ifdef USE_CYCLONE_TIMING |
| 30367 | RET(12) |
| 30368 | #else |
| 30369 | RET(10) |
| 30370 | #endif |
| 30371 | } |
| 30372 | |
| 30373 | // SUBA |
| 30374 | OPCODE(0x90E7) |
| 30375 | { |
| 30376 | u32 adr, res; |
| 30377 | u32 src, dst; |
| 30378 | |
| 30379 | adr = AREG(7) - 2; |
| 30380 | AREG(7) = adr; |
| 30381 | PRE_IO |
| 30382 | READSX_WORD_F(adr, src) |
| 30383 | dst = AREGu32((Opcode >> 9) & 7); |
| 30384 | res = dst - src; |
| 30385 | AREG((Opcode >> 9) & 7) = res; |
| 30386 | POST_IO |
| 30387 | #ifdef USE_CYCLONE_TIMING |
| 30388 | RET(14) |
| 30389 | #else |
| 30390 | RET(12) |
| 30391 | #endif |
| 30392 | } |
| 30393 | |
| 30394 | // SUBA |
| 30395 | OPCODE(0x91C0) |
| 30396 | { |
| 30397 | u32 adr, res; |
| 30398 | u32 src, dst; |
| 30399 | |
| 30400 | src = (s32)DREGs32((Opcode >> 0) & 7); |
| 30401 | dst = AREGu32((Opcode >> 9) & 7); |
| 30402 | res = dst - src; |
| 30403 | AREG((Opcode >> 9) & 7) = res; |
| 30404 | #ifdef USE_CYCLONE_TIMING |
| 30405 | RET(8) |
| 30406 | #else |
| 30407 | RET(6) |
| 30408 | #endif |
| 30409 | } |
| 30410 | |
| 30411 | // SUBA |
| 30412 | OPCODE(0x91C8) |
| 30413 | { |
| 30414 | u32 adr, res; |
| 30415 | u32 src, dst; |
| 30416 | |
| 30417 | src = (s32)AREGs32((Opcode >> 0) & 7); |
| 30418 | dst = AREGu32((Opcode >> 9) & 7); |
| 30419 | res = dst - src; |
| 30420 | AREG((Opcode >> 9) & 7) = res; |
| 30421 | #ifdef USE_CYCLONE_TIMING |
| 30422 | RET(8) |
| 30423 | #else |
| 30424 | RET(6) |
| 30425 | #endif |
| 30426 | } |
| 30427 | |
| 30428 | // SUBA |
| 30429 | OPCODE(0x91D0) |
| 30430 | { |
| 30431 | u32 adr, res; |
| 30432 | u32 src, dst; |
| 30433 | |
| 30434 | adr = AREG((Opcode >> 0) & 7); |
| 30435 | PRE_IO |
| 30436 | READSX_LONG_F(adr, src) |
| 30437 | dst = AREGu32((Opcode >> 9) & 7); |
| 30438 | res = dst - src; |
| 30439 | AREG((Opcode >> 9) & 7) = res; |
| 30440 | POST_IO |
| 30441 | RET(14) |
| 30442 | } |
| 30443 | |
| 30444 | // SUBA |
| 30445 | OPCODE(0x91D8) |
| 30446 | { |
| 30447 | u32 adr, res; |
| 30448 | u32 src, dst; |
| 30449 | |
| 30450 | adr = AREG((Opcode >> 0) & 7); |
| 30451 | AREG((Opcode >> 0) & 7) += 4; |
| 30452 | PRE_IO |
| 30453 | READSX_LONG_F(adr, src) |
| 30454 | dst = AREGu32((Opcode >> 9) & 7); |
| 30455 | res = dst - src; |
| 30456 | AREG((Opcode >> 9) & 7) = res; |
| 30457 | POST_IO |
| 30458 | RET(14) |
| 30459 | } |
| 30460 | |
| 30461 | // SUBA |
| 30462 | OPCODE(0x91E0) |
| 30463 | { |
| 30464 | u32 adr, res; |
| 30465 | u32 src, dst; |
| 30466 | |
| 30467 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 30468 | AREG((Opcode >> 0) & 7) = adr; |
| 30469 | PRE_IO |
| 30470 | READSX_LONG_F(adr, src) |
| 30471 | dst = AREGu32((Opcode >> 9) & 7); |
| 30472 | res = dst - src; |
| 30473 | AREG((Opcode >> 9) & 7) = res; |
| 30474 | POST_IO |
| 30475 | RET(16) |
| 30476 | } |
| 30477 | |
| 30478 | // SUBA |
| 30479 | OPCODE(0x91E8) |
| 30480 | { |
| 30481 | u32 adr, res; |
| 30482 | u32 src, dst; |
| 30483 | |
| 30484 | FETCH_SWORD(adr); |
| 30485 | adr += AREG((Opcode >> 0) & 7); |
| 30486 | PRE_IO |
| 30487 | READSX_LONG_F(adr, src) |
| 30488 | dst = AREGu32((Opcode >> 9) & 7); |
| 30489 | res = dst - src; |
| 30490 | AREG((Opcode >> 9) & 7) = res; |
| 30491 | POST_IO |
| 30492 | RET(18) |
| 30493 | } |
| 30494 | |
| 30495 | // SUBA |
| 30496 | OPCODE(0x91F0) |
| 30497 | { |
| 30498 | u32 adr, res; |
| 30499 | u32 src, dst; |
| 30500 | |
| 30501 | adr = AREG((Opcode >> 0) & 7); |
| 30502 | DECODE_EXT_WORD |
| 30503 | PRE_IO |
| 30504 | READSX_LONG_F(adr, src) |
| 30505 | dst = AREGu32((Opcode >> 9) & 7); |
| 30506 | res = dst - src; |
| 30507 | AREG((Opcode >> 9) & 7) = res; |
| 30508 | POST_IO |
| 30509 | RET(20) |
| 30510 | } |
| 30511 | |
| 30512 | // SUBA |
| 30513 | OPCODE(0x91F8) |
| 30514 | { |
| 30515 | u32 adr, res; |
| 30516 | u32 src, dst; |
| 30517 | |
| 30518 | FETCH_SWORD(adr); |
| 30519 | PRE_IO |
| 30520 | READSX_LONG_F(adr, src) |
| 30521 | dst = AREGu32((Opcode >> 9) & 7); |
| 30522 | res = dst - src; |
| 30523 | AREG((Opcode >> 9) & 7) = res; |
| 30524 | POST_IO |
| 30525 | RET(18) |
| 30526 | } |
| 30527 | |
| 30528 | // SUBA |
| 30529 | OPCODE(0x91F9) |
| 30530 | { |
| 30531 | u32 adr, res; |
| 30532 | u32 src, dst; |
| 30533 | |
| 30534 | FETCH_LONG(adr); |
| 30535 | PRE_IO |
| 30536 | READSX_LONG_F(adr, src) |
| 30537 | dst = AREGu32((Opcode >> 9) & 7); |
| 30538 | res = dst - src; |
| 30539 | AREG((Opcode >> 9) & 7) = res; |
| 30540 | POST_IO |
| 30541 | RET(22) |
| 30542 | } |
| 30543 | |
| 30544 | // SUBA |
| 30545 | OPCODE(0x91FA) |
| 30546 | { |
| 30547 | u32 adr, res; |
| 30548 | u32 src, dst; |
| 30549 | |
| 30550 | adr = GET_SWORD + GET_PC; |
| 30551 | PC++; |
| 30552 | PRE_IO |
| 30553 | READSX_LONG_F(adr, src) |
| 30554 | dst = AREGu32((Opcode >> 9) & 7); |
| 30555 | res = dst - src; |
| 30556 | AREG((Opcode >> 9) & 7) = res; |
| 30557 | POST_IO |
| 30558 | RET(18) |
| 30559 | } |
| 30560 | |
| 30561 | // SUBA |
| 30562 | OPCODE(0x91FB) |
| 30563 | { |
| 30564 | u32 adr, res; |
| 30565 | u32 src, dst; |
| 30566 | |
| 30567 | adr = GET_PC; |
| 30568 | DECODE_EXT_WORD |
| 30569 | PRE_IO |
| 30570 | READSX_LONG_F(adr, src) |
| 30571 | dst = AREGu32((Opcode >> 9) & 7); |
| 30572 | res = dst - src; |
| 30573 | AREG((Opcode >> 9) & 7) = res; |
| 30574 | POST_IO |
| 30575 | RET(20) |
| 30576 | } |
| 30577 | |
| 30578 | // SUBA |
| 30579 | OPCODE(0x91FC) |
| 30580 | { |
| 30581 | u32 adr, res; |
| 30582 | u32 src, dst; |
| 30583 | |
| 30584 | FETCH_LONG(src); |
| 30585 | dst = AREGu32((Opcode >> 9) & 7); |
| 30586 | res = dst - src; |
| 30587 | AREG((Opcode >> 9) & 7) = res; |
| 30588 | #ifdef USE_CYCLONE_TIMING |
| 30589 | RET(16) |
| 30590 | #else |
| 30591 | RET(14) |
| 30592 | #endif |
| 30593 | } |
| 30594 | |
| 30595 | // SUBA |
| 30596 | OPCODE(0x91DF) |
| 30597 | { |
| 30598 | u32 adr, res; |
| 30599 | u32 src, dst; |
| 30600 | |
| 30601 | adr = AREG(7); |
| 30602 | AREG(7) += 4; |
| 30603 | PRE_IO |
| 30604 | READSX_LONG_F(adr, src) |
| 30605 | dst = AREGu32((Opcode >> 9) & 7); |
| 30606 | res = dst - src; |
| 30607 | AREG((Opcode >> 9) & 7) = res; |
| 30608 | POST_IO |
| 30609 | RET(14) |
| 30610 | } |
| 30611 | |
| 30612 | // SUBA |
| 30613 | OPCODE(0x91E7) |
| 30614 | { |
| 30615 | u32 adr, res; |
| 30616 | u32 src, dst; |
| 30617 | |
| 30618 | adr = AREG(7) - 4; |
| 30619 | AREG(7) = adr; |
| 30620 | PRE_IO |
| 30621 | READSX_LONG_F(adr, src) |
| 30622 | dst = AREGu32((Opcode >> 9) & 7); |
| 30623 | res = dst - src; |
| 30624 | AREG((Opcode >> 9) & 7) = res; |
| 30625 | POST_IO |
| 30626 | RET(16) |
| 30627 | } |
| 30628 | |
| 30629 | // CMP |
| 30630 | OPCODE(0xB000) |
| 30631 | { |
| 30632 | u32 adr, res; |
| 30633 | u32 src, dst; |
| 30634 | |
| 30635 | src = DREGu8((Opcode >> 0) & 7); |
| 30636 | dst = DREGu8((Opcode >> 9) & 7); |
| 30637 | res = dst - src; |
| 30638 | flag_N = flag_C = res; |
| 30639 | flag_V = (src ^ dst) & (res ^ dst); |
| 30640 | flag_NotZ = res & 0xFF; |
| 30641 | RET(4) |
| 30642 | } |
| 30643 | |
| 30644 | // CMP |
| 30645 | #if 0 |
| 30646 | OPCODE(0xB008) |
| 30647 | { |
| 30648 | u32 adr, res; |
| 30649 | u32 src, dst; |
| 30650 | |
| 30651 | // can't read byte from Ax registers ! |
| 30652 | m68kcontext.execinfo |= M68K_FAULTED; |
| 30653 | m68kcontext.io_cycle_counter = 0; |
| 30654 | /* |
| 30655 | goto famec_Exec_End; |
| 30656 | dst = DREGu8((Opcode >> 9) & 7); |
| 30657 | res = dst - src; |
| 30658 | flag_N = flag_C = res; |
| 30659 | flag_V = (src ^ dst) & (res ^ dst); |
| 30660 | flag_NotZ = res & 0xFF; |
| 30661 | */ |
| 30662 | RET(4) |
| 30663 | } |
| 30664 | #endif |
| 30665 | |
| 30666 | // CMP |
| 30667 | OPCODE(0xB010) |
| 30668 | { |
| 30669 | u32 adr, res; |
| 30670 | u32 src, dst; |
| 30671 | |
| 30672 | adr = AREG((Opcode >> 0) & 7); |
| 30673 | PRE_IO |
| 30674 | READ_BYTE_F(adr, src) |
| 30675 | dst = DREGu8((Opcode >> 9) & 7); |
| 30676 | res = dst - src; |
| 30677 | flag_N = flag_C = res; |
| 30678 | flag_V = (src ^ dst) & (res ^ dst); |
| 30679 | flag_NotZ = res & 0xFF; |
| 30680 | POST_IO |
| 30681 | RET(8) |
| 30682 | } |
| 30683 | |
| 30684 | // CMP |
| 30685 | OPCODE(0xB018) |
| 30686 | { |
| 30687 | u32 adr, res; |
| 30688 | u32 src, dst; |
| 30689 | |
| 30690 | adr = AREG((Opcode >> 0) & 7); |
| 30691 | AREG((Opcode >> 0) & 7) += 1; |
| 30692 | PRE_IO |
| 30693 | READ_BYTE_F(adr, src) |
| 30694 | dst = DREGu8((Opcode >> 9) & 7); |
| 30695 | res = dst - src; |
| 30696 | flag_N = flag_C = res; |
| 30697 | flag_V = (src ^ dst) & (res ^ dst); |
| 30698 | flag_NotZ = res & 0xFF; |
| 30699 | POST_IO |
| 30700 | RET(8) |
| 30701 | } |
| 30702 | |
| 30703 | // CMP |
| 30704 | OPCODE(0xB020) |
| 30705 | { |
| 30706 | u32 adr, res; |
| 30707 | u32 src, dst; |
| 30708 | |
| 30709 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 30710 | AREG((Opcode >> 0) & 7) = adr; |
| 30711 | PRE_IO |
| 30712 | READ_BYTE_F(adr, src) |
| 30713 | dst = DREGu8((Opcode >> 9) & 7); |
| 30714 | res = dst - src; |
| 30715 | flag_N = flag_C = res; |
| 30716 | flag_V = (src ^ dst) & (res ^ dst); |
| 30717 | flag_NotZ = res & 0xFF; |
| 30718 | POST_IO |
| 30719 | RET(10) |
| 30720 | } |
| 30721 | |
| 30722 | // CMP |
| 30723 | OPCODE(0xB028) |
| 30724 | { |
| 30725 | u32 adr, res; |
| 30726 | u32 src, dst; |
| 30727 | |
| 30728 | FETCH_SWORD(adr); |
| 30729 | adr += AREG((Opcode >> 0) & 7); |
| 30730 | PRE_IO |
| 30731 | READ_BYTE_F(adr, src) |
| 30732 | dst = DREGu8((Opcode >> 9) & 7); |
| 30733 | res = dst - src; |
| 30734 | flag_N = flag_C = res; |
| 30735 | flag_V = (src ^ dst) & (res ^ dst); |
| 30736 | flag_NotZ = res & 0xFF; |
| 30737 | POST_IO |
| 30738 | RET(12) |
| 30739 | } |
| 30740 | |
| 30741 | // CMP |
| 30742 | OPCODE(0xB030) |
| 30743 | { |
| 30744 | u32 adr, res; |
| 30745 | u32 src, dst; |
| 30746 | |
| 30747 | adr = AREG((Opcode >> 0) & 7); |
| 30748 | DECODE_EXT_WORD |
| 30749 | PRE_IO |
| 30750 | READ_BYTE_F(adr, src) |
| 30751 | dst = DREGu8((Opcode >> 9) & 7); |
| 30752 | res = dst - src; |
| 30753 | flag_N = flag_C = res; |
| 30754 | flag_V = (src ^ dst) & (res ^ dst); |
| 30755 | flag_NotZ = res & 0xFF; |
| 30756 | POST_IO |
| 30757 | RET(14) |
| 30758 | } |
| 30759 | |
| 30760 | // CMP |
| 30761 | OPCODE(0xB038) |
| 30762 | { |
| 30763 | u32 adr, res; |
| 30764 | u32 src, dst; |
| 30765 | |
| 30766 | FETCH_SWORD(adr); |
| 30767 | PRE_IO |
| 30768 | READ_BYTE_F(adr, src) |
| 30769 | dst = DREGu8((Opcode >> 9) & 7); |
| 30770 | res = dst - src; |
| 30771 | flag_N = flag_C = res; |
| 30772 | flag_V = (src ^ dst) & (res ^ dst); |
| 30773 | flag_NotZ = res & 0xFF; |
| 30774 | POST_IO |
| 30775 | RET(12) |
| 30776 | } |
| 30777 | |
| 30778 | // CMP |
| 30779 | OPCODE(0xB039) |
| 30780 | { |
| 30781 | u32 adr, res; |
| 30782 | u32 src, dst; |
| 30783 | |
| 30784 | FETCH_LONG(adr); |
| 30785 | PRE_IO |
| 30786 | READ_BYTE_F(adr, src) |
| 30787 | dst = DREGu8((Opcode >> 9) & 7); |
| 30788 | res = dst - src; |
| 30789 | flag_N = flag_C = res; |
| 30790 | flag_V = (src ^ dst) & (res ^ dst); |
| 30791 | flag_NotZ = res & 0xFF; |
| 30792 | POST_IO |
| 30793 | RET(16) |
| 30794 | } |
| 30795 | |
| 30796 | // CMP |
| 30797 | OPCODE(0xB03A) |
| 30798 | { |
| 30799 | u32 adr, res; |
| 30800 | u32 src, dst; |
| 30801 | |
| 30802 | adr = GET_SWORD + GET_PC; |
| 30803 | PC++; |
| 30804 | PRE_IO |
| 30805 | READ_BYTE_F(adr, src) |
| 30806 | dst = DREGu8((Opcode >> 9) & 7); |
| 30807 | res = dst - src; |
| 30808 | flag_N = flag_C = res; |
| 30809 | flag_V = (src ^ dst) & (res ^ dst); |
| 30810 | flag_NotZ = res & 0xFF; |
| 30811 | POST_IO |
| 30812 | RET(12) |
| 30813 | } |
| 30814 | |
| 30815 | // CMP |
| 30816 | OPCODE(0xB03B) |
| 30817 | { |
| 30818 | u32 adr, res; |
| 30819 | u32 src, dst; |
| 30820 | |
| 30821 | adr = GET_PC; |
| 30822 | DECODE_EXT_WORD |
| 30823 | PRE_IO |
| 30824 | READ_BYTE_F(adr, src) |
| 30825 | dst = DREGu8((Opcode >> 9) & 7); |
| 30826 | res = dst - src; |
| 30827 | flag_N = flag_C = res; |
| 30828 | flag_V = (src ^ dst) & (res ^ dst); |
| 30829 | flag_NotZ = res & 0xFF; |
| 30830 | POST_IO |
| 30831 | RET(14) |
| 30832 | } |
| 30833 | |
| 30834 | // CMP |
| 30835 | OPCODE(0xB03C) |
| 30836 | { |
| 30837 | u32 adr, res; |
| 30838 | u32 src, dst; |
| 30839 | |
| 30840 | FETCH_BYTE(src); |
| 30841 | dst = DREGu8((Opcode >> 9) & 7); |
| 30842 | res = dst - src; |
| 30843 | flag_N = flag_C = res; |
| 30844 | flag_V = (src ^ dst) & (res ^ dst); |
| 30845 | flag_NotZ = res & 0xFF; |
| 30846 | RET(8) |
| 30847 | } |
| 30848 | |
| 30849 | // CMP |
| 30850 | OPCODE(0xB01F) |
| 30851 | { |
| 30852 | u32 adr, res; |
| 30853 | u32 src, dst; |
| 30854 | |
| 30855 | adr = AREG(7); |
| 30856 | AREG(7) += 2; |
| 30857 | PRE_IO |
| 30858 | READ_BYTE_F(adr, src) |
| 30859 | dst = DREGu8((Opcode >> 9) & 7); |
| 30860 | res = dst - src; |
| 30861 | flag_N = flag_C = res; |
| 30862 | flag_V = (src ^ dst) & (res ^ dst); |
| 30863 | flag_NotZ = res & 0xFF; |
| 30864 | POST_IO |
| 30865 | RET(8) |
| 30866 | } |
| 30867 | |
| 30868 | // CMP |
| 30869 | OPCODE(0xB027) |
| 30870 | { |
| 30871 | u32 adr, res; |
| 30872 | u32 src, dst; |
| 30873 | |
| 30874 | adr = AREG(7) - 2; |
| 30875 | AREG(7) = adr; |
| 30876 | PRE_IO |
| 30877 | READ_BYTE_F(adr, src) |
| 30878 | dst = DREGu8((Opcode >> 9) & 7); |
| 30879 | res = dst - src; |
| 30880 | flag_N = flag_C = res; |
| 30881 | flag_V = (src ^ dst) & (res ^ dst); |
| 30882 | flag_NotZ = res & 0xFF; |
| 30883 | POST_IO |
| 30884 | RET(10) |
| 30885 | } |
| 30886 | |
| 30887 | // CMP |
| 30888 | OPCODE(0xB040) |
| 30889 | { |
| 30890 | u32 adr, res; |
| 30891 | u32 src, dst; |
| 30892 | |
| 30893 | src = DREGu16((Opcode >> 0) & 7); |
| 30894 | dst = DREGu16((Opcode >> 9) & 7); |
| 30895 | res = dst - src; |
| 30896 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 30897 | flag_N = flag_C = res >> 8; |
| 30898 | flag_NotZ = res & 0xFFFF; |
| 30899 | RET(4) |
| 30900 | } |
| 30901 | |
| 30902 | // CMP |
| 30903 | OPCODE(0xB048) |
| 30904 | { |
| 30905 | u32 adr, res; |
| 30906 | u32 src, dst; |
| 30907 | |
| 30908 | src = AREGu16((Opcode >> 0) & 7); |
| 30909 | dst = DREGu16((Opcode >> 9) & 7); |
| 30910 | res = dst - src; |
| 30911 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 30912 | flag_N = flag_C = res >> 8; |
| 30913 | flag_NotZ = res & 0xFFFF; |
| 30914 | RET(4) |
| 30915 | } |
| 30916 | |
| 30917 | // CMP |
| 30918 | OPCODE(0xB050) |
| 30919 | { |
| 30920 | u32 adr, res; |
| 30921 | u32 src, dst; |
| 30922 | |
| 30923 | adr = AREG((Opcode >> 0) & 7); |
| 30924 | PRE_IO |
| 30925 | READ_WORD_F(adr, src) |
| 30926 | dst = DREGu16((Opcode >> 9) & 7); |
| 30927 | res = dst - src; |
| 30928 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 30929 | flag_N = flag_C = res >> 8; |
| 30930 | flag_NotZ = res & 0xFFFF; |
| 30931 | POST_IO |
| 30932 | RET(8) |
| 30933 | } |
| 30934 | |
| 30935 | // CMP |
| 30936 | OPCODE(0xB058) |
| 30937 | { |
| 30938 | u32 adr, res; |
| 30939 | u32 src, dst; |
| 30940 | |
| 30941 | adr = AREG((Opcode >> 0) & 7); |
| 30942 | AREG((Opcode >> 0) & 7) += 2; |
| 30943 | PRE_IO |
| 30944 | READ_WORD_F(adr, src) |
| 30945 | dst = DREGu16((Opcode >> 9) & 7); |
| 30946 | res = dst - src; |
| 30947 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 30948 | flag_N = flag_C = res >> 8; |
| 30949 | flag_NotZ = res & 0xFFFF; |
| 30950 | POST_IO |
| 30951 | RET(8) |
| 30952 | } |
| 30953 | |
| 30954 | // CMP |
| 30955 | OPCODE(0xB060) |
| 30956 | { |
| 30957 | u32 adr, res; |
| 30958 | u32 src, dst; |
| 30959 | |
| 30960 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 30961 | AREG((Opcode >> 0) & 7) = adr; |
| 30962 | PRE_IO |
| 30963 | READ_WORD_F(adr, src) |
| 30964 | dst = DREGu16((Opcode >> 9) & 7); |
| 30965 | res = dst - src; |
| 30966 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 30967 | flag_N = flag_C = res >> 8; |
| 30968 | flag_NotZ = res & 0xFFFF; |
| 30969 | POST_IO |
| 30970 | RET(10) |
| 30971 | } |
| 30972 | |
| 30973 | // CMP |
| 30974 | OPCODE(0xB068) |
| 30975 | { |
| 30976 | u32 adr, res; |
| 30977 | u32 src, dst; |
| 30978 | |
| 30979 | FETCH_SWORD(adr); |
| 30980 | adr += AREG((Opcode >> 0) & 7); |
| 30981 | PRE_IO |
| 30982 | READ_WORD_F(adr, src) |
| 30983 | dst = DREGu16((Opcode >> 9) & 7); |
| 30984 | res = dst - src; |
| 30985 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 30986 | flag_N = flag_C = res >> 8; |
| 30987 | flag_NotZ = res & 0xFFFF; |
| 30988 | POST_IO |
| 30989 | RET(12) |
| 30990 | } |
| 30991 | |
| 30992 | // CMP |
| 30993 | OPCODE(0xB070) |
| 30994 | { |
| 30995 | u32 adr, res; |
| 30996 | u32 src, dst; |
| 30997 | |
| 30998 | adr = AREG((Opcode >> 0) & 7); |
| 30999 | DECODE_EXT_WORD |
| 31000 | PRE_IO |
| 31001 | READ_WORD_F(adr, src) |
| 31002 | dst = DREGu16((Opcode >> 9) & 7); |
| 31003 | res = dst - src; |
| 31004 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31005 | flag_N = flag_C = res >> 8; |
| 31006 | flag_NotZ = res & 0xFFFF; |
| 31007 | POST_IO |
| 31008 | RET(14) |
| 31009 | } |
| 31010 | |
| 31011 | // CMP |
| 31012 | OPCODE(0xB078) |
| 31013 | { |
| 31014 | u32 adr, res; |
| 31015 | u32 src, dst; |
| 31016 | |
| 31017 | FETCH_SWORD(adr); |
| 31018 | PRE_IO |
| 31019 | READ_WORD_F(adr, src) |
| 31020 | dst = DREGu16((Opcode >> 9) & 7); |
| 31021 | res = dst - src; |
| 31022 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31023 | flag_N = flag_C = res >> 8; |
| 31024 | flag_NotZ = res & 0xFFFF; |
| 31025 | POST_IO |
| 31026 | RET(12) |
| 31027 | } |
| 31028 | |
| 31029 | // CMP |
| 31030 | OPCODE(0xB079) |
| 31031 | { |
| 31032 | u32 adr, res; |
| 31033 | u32 src, dst; |
| 31034 | |
| 31035 | FETCH_LONG(adr); |
| 31036 | PRE_IO |
| 31037 | READ_WORD_F(adr, src) |
| 31038 | dst = DREGu16((Opcode >> 9) & 7); |
| 31039 | res = dst - src; |
| 31040 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31041 | flag_N = flag_C = res >> 8; |
| 31042 | flag_NotZ = res & 0xFFFF; |
| 31043 | POST_IO |
| 31044 | RET(16) |
| 31045 | } |
| 31046 | |
| 31047 | // CMP |
| 31048 | OPCODE(0xB07A) |
| 31049 | { |
| 31050 | u32 adr, res; |
| 31051 | u32 src, dst; |
| 31052 | |
| 31053 | adr = GET_SWORD + GET_PC; |
| 31054 | PC++; |
| 31055 | PRE_IO |
| 31056 | READ_WORD_F(adr, src) |
| 31057 | dst = DREGu16((Opcode >> 9) & 7); |
| 31058 | res = dst - src; |
| 31059 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31060 | flag_N = flag_C = res >> 8; |
| 31061 | flag_NotZ = res & 0xFFFF; |
| 31062 | POST_IO |
| 31063 | RET(12) |
| 31064 | } |
| 31065 | |
| 31066 | // CMP |
| 31067 | OPCODE(0xB07B) |
| 31068 | { |
| 31069 | u32 adr, res; |
| 31070 | u32 src, dst; |
| 31071 | |
| 31072 | adr = GET_PC; |
| 31073 | DECODE_EXT_WORD |
| 31074 | PRE_IO |
| 31075 | READ_WORD_F(adr, src) |
| 31076 | dst = DREGu16((Opcode >> 9) & 7); |
| 31077 | res = dst - src; |
| 31078 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31079 | flag_N = flag_C = res >> 8; |
| 31080 | flag_NotZ = res & 0xFFFF; |
| 31081 | POST_IO |
| 31082 | RET(14) |
| 31083 | } |
| 31084 | |
| 31085 | // CMP |
| 31086 | OPCODE(0xB07C) |
| 31087 | { |
| 31088 | u32 adr, res; |
| 31089 | u32 src, dst; |
| 31090 | |
| 31091 | FETCH_WORD(src); |
| 31092 | dst = DREGu16((Opcode >> 9) & 7); |
| 31093 | res = dst - src; |
| 31094 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31095 | flag_N = flag_C = res >> 8; |
| 31096 | flag_NotZ = res & 0xFFFF; |
| 31097 | RET(8) |
| 31098 | } |
| 31099 | |
| 31100 | // CMP |
| 31101 | OPCODE(0xB05F) |
| 31102 | { |
| 31103 | u32 adr, res; |
| 31104 | u32 src, dst; |
| 31105 | |
| 31106 | adr = AREG(7); |
| 31107 | AREG(7) += 2; |
| 31108 | PRE_IO |
| 31109 | READ_WORD_F(adr, src) |
| 31110 | dst = DREGu16((Opcode >> 9) & 7); |
| 31111 | res = dst - src; |
| 31112 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31113 | flag_N = flag_C = res >> 8; |
| 31114 | flag_NotZ = res & 0xFFFF; |
| 31115 | POST_IO |
| 31116 | RET(8) |
| 31117 | } |
| 31118 | |
| 31119 | // CMP |
| 31120 | OPCODE(0xB067) |
| 31121 | { |
| 31122 | u32 adr, res; |
| 31123 | u32 src, dst; |
| 31124 | |
| 31125 | adr = AREG(7) - 2; |
| 31126 | AREG(7) = adr; |
| 31127 | PRE_IO |
| 31128 | READ_WORD_F(adr, src) |
| 31129 | dst = DREGu16((Opcode >> 9) & 7); |
| 31130 | res = dst - src; |
| 31131 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31132 | flag_N = flag_C = res >> 8; |
| 31133 | flag_NotZ = res & 0xFFFF; |
| 31134 | POST_IO |
| 31135 | RET(10) |
| 31136 | } |
| 31137 | |
| 31138 | // CMP |
| 31139 | OPCODE(0xB080) |
| 31140 | { |
| 31141 | u32 adr, res; |
| 31142 | u32 src, dst; |
| 31143 | |
| 31144 | src = DREGu32((Opcode >> 0) & 7); |
| 31145 | dst = DREGu32((Opcode >> 9) & 7); |
| 31146 | res = dst - src; |
| 31147 | flag_NotZ = res; |
| 31148 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31149 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31150 | flag_N = res >> 24; |
| 31151 | RET(6) |
| 31152 | } |
| 31153 | |
| 31154 | // CMP |
| 31155 | OPCODE(0xB088) |
| 31156 | { |
| 31157 | u32 adr, res; |
| 31158 | u32 src, dst; |
| 31159 | |
| 31160 | src = AREGu32((Opcode >> 0) & 7); |
| 31161 | dst = DREGu32((Opcode >> 9) & 7); |
| 31162 | res = dst - src; |
| 31163 | flag_NotZ = res; |
| 31164 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31165 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31166 | flag_N = res >> 24; |
| 31167 | RET(6) |
| 31168 | } |
| 31169 | |
| 31170 | // CMP |
| 31171 | OPCODE(0xB090) |
| 31172 | { |
| 31173 | u32 adr, res; |
| 31174 | u32 src, dst; |
| 31175 | |
| 31176 | adr = AREG((Opcode >> 0) & 7); |
| 31177 | PRE_IO |
| 31178 | READ_LONG_F(adr, src) |
| 31179 | dst = DREGu32((Opcode >> 9) & 7); |
| 31180 | res = dst - src; |
| 31181 | flag_NotZ = res; |
| 31182 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31183 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31184 | flag_N = res >> 24; |
| 31185 | POST_IO |
| 31186 | RET(14) |
| 31187 | } |
| 31188 | |
| 31189 | // CMP |
| 31190 | OPCODE(0xB098) |
| 31191 | { |
| 31192 | u32 adr, res; |
| 31193 | u32 src, dst; |
| 31194 | |
| 31195 | adr = AREG((Opcode >> 0) & 7); |
| 31196 | AREG((Opcode >> 0) & 7) += 4; |
| 31197 | PRE_IO |
| 31198 | READ_LONG_F(adr, src) |
| 31199 | dst = DREGu32((Opcode >> 9) & 7); |
| 31200 | res = dst - src; |
| 31201 | flag_NotZ = res; |
| 31202 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31203 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31204 | flag_N = res >> 24; |
| 31205 | POST_IO |
| 31206 | RET(14) |
| 31207 | } |
| 31208 | |
| 31209 | // CMP |
| 31210 | OPCODE(0xB0A0) |
| 31211 | { |
| 31212 | u32 adr, res; |
| 31213 | u32 src, dst; |
| 31214 | |
| 31215 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 31216 | AREG((Opcode >> 0) & 7) = adr; |
| 31217 | PRE_IO |
| 31218 | READ_LONG_F(adr, src) |
| 31219 | dst = DREGu32((Opcode >> 9) & 7); |
| 31220 | res = dst - src; |
| 31221 | flag_NotZ = res; |
| 31222 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31223 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31224 | flag_N = res >> 24; |
| 31225 | POST_IO |
| 31226 | RET(16) |
| 31227 | } |
| 31228 | |
| 31229 | // CMP |
| 31230 | OPCODE(0xB0A8) |
| 31231 | { |
| 31232 | u32 adr, res; |
| 31233 | u32 src, dst; |
| 31234 | |
| 31235 | FETCH_SWORD(adr); |
| 31236 | adr += AREG((Opcode >> 0) & 7); |
| 31237 | PRE_IO |
| 31238 | READ_LONG_F(adr, src) |
| 31239 | dst = DREGu32((Opcode >> 9) & 7); |
| 31240 | res = dst - src; |
| 31241 | flag_NotZ = res; |
| 31242 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31243 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31244 | flag_N = res >> 24; |
| 31245 | POST_IO |
| 31246 | RET(18) |
| 31247 | } |
| 31248 | |
| 31249 | // CMP |
| 31250 | OPCODE(0xB0B0) |
| 31251 | { |
| 31252 | u32 adr, res; |
| 31253 | u32 src, dst; |
| 31254 | |
| 31255 | adr = AREG((Opcode >> 0) & 7); |
| 31256 | DECODE_EXT_WORD |
| 31257 | PRE_IO |
| 31258 | READ_LONG_F(adr, src) |
| 31259 | dst = DREGu32((Opcode >> 9) & 7); |
| 31260 | res = dst - src; |
| 31261 | flag_NotZ = res; |
| 31262 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31263 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31264 | flag_N = res >> 24; |
| 31265 | POST_IO |
| 31266 | RET(20) |
| 31267 | } |
| 31268 | |
| 31269 | // CMP |
| 31270 | OPCODE(0xB0B8) |
| 31271 | { |
| 31272 | u32 adr, res; |
| 31273 | u32 src, dst; |
| 31274 | |
| 31275 | FETCH_SWORD(adr); |
| 31276 | PRE_IO |
| 31277 | READ_LONG_F(adr, src) |
| 31278 | dst = DREGu32((Opcode >> 9) & 7); |
| 31279 | res = dst - src; |
| 31280 | flag_NotZ = res; |
| 31281 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31282 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31283 | flag_N = res >> 24; |
| 31284 | POST_IO |
| 31285 | RET(18) |
| 31286 | } |
| 31287 | |
| 31288 | // CMP |
| 31289 | OPCODE(0xB0B9) |
| 31290 | { |
| 31291 | u32 adr, res; |
| 31292 | u32 src, dst; |
| 31293 | |
| 31294 | FETCH_LONG(adr); |
| 31295 | PRE_IO |
| 31296 | READ_LONG_F(adr, src) |
| 31297 | dst = DREGu32((Opcode >> 9) & 7); |
| 31298 | res = dst - src; |
| 31299 | flag_NotZ = res; |
| 31300 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31301 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31302 | flag_N = res >> 24; |
| 31303 | POST_IO |
| 31304 | RET(22) |
| 31305 | } |
| 31306 | |
| 31307 | // CMP |
| 31308 | OPCODE(0xB0BA) |
| 31309 | { |
| 31310 | u32 adr, res; |
| 31311 | u32 src, dst; |
| 31312 | |
| 31313 | adr = GET_SWORD + GET_PC; |
| 31314 | PC++; |
| 31315 | PRE_IO |
| 31316 | READ_LONG_F(adr, src) |
| 31317 | dst = DREGu32((Opcode >> 9) & 7); |
| 31318 | res = dst - src; |
| 31319 | flag_NotZ = res; |
| 31320 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31321 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31322 | flag_N = res >> 24; |
| 31323 | POST_IO |
| 31324 | RET(18) |
| 31325 | } |
| 31326 | |
| 31327 | // CMP |
| 31328 | OPCODE(0xB0BB) |
| 31329 | { |
| 31330 | u32 adr, res; |
| 31331 | u32 src, dst; |
| 31332 | |
| 31333 | adr = GET_PC; |
| 31334 | DECODE_EXT_WORD |
| 31335 | PRE_IO |
| 31336 | READ_LONG_F(adr, src) |
| 31337 | dst = DREGu32((Opcode >> 9) & 7); |
| 31338 | res = dst - src; |
| 31339 | flag_NotZ = res; |
| 31340 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31341 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31342 | flag_N = res >> 24; |
| 31343 | POST_IO |
| 31344 | RET(20) |
| 31345 | } |
| 31346 | |
| 31347 | // CMP |
| 31348 | OPCODE(0xB0BC) |
| 31349 | { |
| 31350 | u32 adr, res; |
| 31351 | u32 src, dst; |
| 31352 | |
| 31353 | FETCH_LONG(src); |
| 31354 | dst = DREGu32((Opcode >> 9) & 7); |
| 31355 | res = dst - src; |
| 31356 | flag_NotZ = res; |
| 31357 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31358 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31359 | flag_N = res >> 24; |
| 31360 | RET(14) |
| 31361 | } |
| 31362 | |
| 31363 | // CMP |
| 31364 | OPCODE(0xB09F) |
| 31365 | { |
| 31366 | u32 adr, res; |
| 31367 | u32 src, dst; |
| 31368 | |
| 31369 | adr = AREG(7); |
| 31370 | AREG(7) += 4; |
| 31371 | PRE_IO |
| 31372 | READ_LONG_F(adr, src) |
| 31373 | dst = DREGu32((Opcode >> 9) & 7); |
| 31374 | res = dst - src; |
| 31375 | flag_NotZ = res; |
| 31376 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31377 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31378 | flag_N = res >> 24; |
| 31379 | POST_IO |
| 31380 | RET(14) |
| 31381 | } |
| 31382 | |
| 31383 | // CMP |
| 31384 | OPCODE(0xB0A7) |
| 31385 | { |
| 31386 | u32 adr, res; |
| 31387 | u32 src, dst; |
| 31388 | |
| 31389 | adr = AREG(7) - 4; |
| 31390 | AREG(7) = adr; |
| 31391 | PRE_IO |
| 31392 | READ_LONG_F(adr, src) |
| 31393 | dst = DREGu32((Opcode >> 9) & 7); |
| 31394 | res = dst - src; |
| 31395 | flag_NotZ = res; |
| 31396 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31397 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31398 | flag_N = res >> 24; |
| 31399 | POST_IO |
| 31400 | RET(16) |
| 31401 | } |
| 31402 | |
| 31403 | // CMPM |
| 31404 | OPCODE(0xB108) |
| 31405 | { |
| 31406 | u32 adr, res; |
| 31407 | u32 src, dst; |
| 31408 | |
| 31409 | adr = AREG((Opcode >> 0) & 7); |
| 31410 | AREG((Opcode >> 0) & 7) += 1; |
| 31411 | PRE_IO |
| 31412 | READ_BYTE_F(adr, src) |
| 31413 | adr = AREG((Opcode >> 9) & 7); |
| 31414 | AREG((Opcode >> 9) & 7) += 1; |
| 31415 | READ_BYTE_F(adr, dst) |
| 31416 | res = dst - src; |
| 31417 | flag_N = flag_C = res; |
| 31418 | flag_V = (src ^ dst) & (res ^ dst); |
| 31419 | flag_NotZ = res & 0xFF; |
| 31420 | POST_IO |
| 31421 | RET(12) |
| 31422 | } |
| 31423 | |
| 31424 | // CMPM |
| 31425 | OPCODE(0xB148) |
| 31426 | { |
| 31427 | u32 adr, res; |
| 31428 | u32 src, dst; |
| 31429 | |
| 31430 | adr = AREG((Opcode >> 0) & 7); |
| 31431 | AREG((Opcode >> 0) & 7) += 2; |
| 31432 | PRE_IO |
| 31433 | READ_WORD_F(adr, src) |
| 31434 | adr = AREG((Opcode >> 9) & 7); |
| 31435 | AREG((Opcode >> 9) & 7) += 2; |
| 31436 | READ_WORD_F(adr, dst) |
| 31437 | res = dst - src; |
| 31438 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31439 | flag_N = flag_C = res >> 8; |
| 31440 | flag_NotZ = res & 0xFFFF; |
| 31441 | POST_IO |
| 31442 | RET(12) |
| 31443 | } |
| 31444 | |
| 31445 | // CMPM |
| 31446 | OPCODE(0xB188) |
| 31447 | { |
| 31448 | u32 adr, res; |
| 31449 | u32 src, dst; |
| 31450 | |
| 31451 | adr = AREG((Opcode >> 0) & 7); |
| 31452 | AREG((Opcode >> 0) & 7) += 4; |
| 31453 | PRE_IO |
| 31454 | READ_LONG_F(adr, src) |
| 31455 | adr = AREG((Opcode >> 9) & 7); |
| 31456 | AREG((Opcode >> 9) & 7) += 4; |
| 31457 | READ_LONG_F(adr, dst) |
| 31458 | res = dst - src; |
| 31459 | flag_NotZ = res; |
| 31460 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31461 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31462 | flag_N = res >> 24; |
| 31463 | POST_IO |
| 31464 | RET(20) |
| 31465 | } |
| 31466 | |
| 31467 | // CMP7M |
| 31468 | OPCODE(0xB10F) |
| 31469 | { |
| 31470 | u32 adr, res; |
| 31471 | u32 src, dst; |
| 31472 | |
| 31473 | adr = AREG(7); |
| 31474 | AREG(7) += 2; |
| 31475 | PRE_IO |
| 31476 | READ_BYTE_F(adr, src) |
| 31477 | adr = AREG((Opcode >> 9) & 7); |
| 31478 | AREG((Opcode >> 9) & 7) += 1; |
| 31479 | READ_BYTE_F(adr, dst) |
| 31480 | res = dst - src; |
| 31481 | flag_N = flag_C = res; |
| 31482 | flag_V = (src ^ dst) & (res ^ dst); |
| 31483 | flag_NotZ = res & 0xFF; |
| 31484 | POST_IO |
| 31485 | RET(12) |
| 31486 | } |
| 31487 | |
| 31488 | // CMP7M |
| 31489 | OPCODE(0xB14F) |
| 31490 | { |
| 31491 | u32 adr, res; |
| 31492 | u32 src, dst; |
| 31493 | |
| 31494 | adr = AREG(7); |
| 31495 | AREG(7) += 2; |
| 31496 | PRE_IO |
| 31497 | READ_WORD_F(adr, src) |
| 31498 | adr = AREG((Opcode >> 9) & 7); |
| 31499 | AREG((Opcode >> 9) & 7) += 2; |
| 31500 | READ_WORD_F(adr, dst) |
| 31501 | res = dst - src; |
| 31502 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31503 | flag_N = flag_C = res >> 8; |
| 31504 | flag_NotZ = res & 0xFFFF; |
| 31505 | POST_IO |
| 31506 | RET(12) |
| 31507 | } |
| 31508 | |
| 31509 | // CMP7M |
| 31510 | OPCODE(0xB18F) |
| 31511 | { |
| 31512 | u32 adr, res; |
| 31513 | u32 src, dst; |
| 31514 | |
| 31515 | adr = AREG(7); |
| 31516 | AREG(7) += 4; |
| 31517 | PRE_IO |
| 31518 | READ_LONG_F(adr, src) |
| 31519 | adr = AREG((Opcode >> 9) & 7); |
| 31520 | AREG((Opcode >> 9) & 7) += 4; |
| 31521 | READ_LONG_F(adr, dst) |
| 31522 | res = dst - src; |
| 31523 | flag_NotZ = res; |
| 31524 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31525 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31526 | flag_N = res >> 24; |
| 31527 | POST_IO |
| 31528 | RET(20) |
| 31529 | } |
| 31530 | |
| 31531 | // CMPM7 |
| 31532 | OPCODE(0xBF08) |
| 31533 | { |
| 31534 | u32 adr, res; |
| 31535 | u32 src, dst; |
| 31536 | |
| 31537 | adr = AREG((Opcode >> 0) & 7); |
| 31538 | AREG((Opcode >> 0) & 7) += 1; |
| 31539 | PRE_IO |
| 31540 | READ_BYTE_F(adr, src) |
| 31541 | adr = AREG(7); |
| 31542 | AREG(7) += 2; |
| 31543 | READ_BYTE_F(adr, dst) |
| 31544 | res = dst - src; |
| 31545 | flag_N = flag_C = res; |
| 31546 | flag_V = (src ^ dst) & (res ^ dst); |
| 31547 | flag_NotZ = res & 0xFF; |
| 31548 | POST_IO |
| 31549 | RET(12) |
| 31550 | } |
| 31551 | |
| 31552 | // CMPM7 |
| 31553 | OPCODE(0xBF48) |
| 31554 | { |
| 31555 | u32 adr, res; |
| 31556 | u32 src, dst; |
| 31557 | |
| 31558 | adr = AREG((Opcode >> 0) & 7); |
| 31559 | AREG((Opcode >> 0) & 7) += 2; |
| 31560 | PRE_IO |
| 31561 | READ_WORD_F(adr, src) |
| 31562 | adr = AREG(7); |
| 31563 | AREG(7) += 2; |
| 31564 | READ_WORD_F(adr, dst) |
| 31565 | res = dst - src; |
| 31566 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31567 | flag_N = flag_C = res >> 8; |
| 31568 | flag_NotZ = res & 0xFFFF; |
| 31569 | POST_IO |
| 31570 | RET(12) |
| 31571 | } |
| 31572 | |
| 31573 | // CMPM7 |
| 31574 | OPCODE(0xBF88) |
| 31575 | { |
| 31576 | u32 adr, res; |
| 31577 | u32 src, dst; |
| 31578 | |
| 31579 | adr = AREG((Opcode >> 0) & 7); |
| 31580 | AREG((Opcode >> 0) & 7) += 4; |
| 31581 | PRE_IO |
| 31582 | READ_LONG_F(adr, src) |
| 31583 | adr = AREG(7); |
| 31584 | AREG(7) += 4; |
| 31585 | READ_LONG_F(adr, dst) |
| 31586 | res = dst - src; |
| 31587 | flag_NotZ = res; |
| 31588 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31589 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31590 | flag_N = res >> 24; |
| 31591 | POST_IO |
| 31592 | RET(20) |
| 31593 | } |
| 31594 | |
| 31595 | // CMP7M7 |
| 31596 | OPCODE(0xBF0F) |
| 31597 | { |
| 31598 | u32 adr, res; |
| 31599 | u32 src, dst; |
| 31600 | |
| 31601 | adr = AREG(7); |
| 31602 | AREG(7) += 2; |
| 31603 | PRE_IO |
| 31604 | READ_BYTE_F(adr, src) |
| 31605 | adr = AREG(7); |
| 31606 | AREG(7) += 2; |
| 31607 | READ_BYTE_F(adr, dst) |
| 31608 | res = dst - src; |
| 31609 | flag_N = flag_C = res; |
| 31610 | flag_V = (src ^ dst) & (res ^ dst); |
| 31611 | flag_NotZ = res & 0xFF; |
| 31612 | POST_IO |
| 31613 | RET(12) |
| 31614 | } |
| 31615 | |
| 31616 | // CMP7M7 |
| 31617 | OPCODE(0xBF4F) |
| 31618 | { |
| 31619 | u32 adr, res; |
| 31620 | u32 src, dst; |
| 31621 | |
| 31622 | adr = AREG(7); |
| 31623 | AREG(7) += 2; |
| 31624 | PRE_IO |
| 31625 | READ_WORD_F(adr, src) |
| 31626 | adr = AREG(7); |
| 31627 | AREG(7) += 2; |
| 31628 | READ_WORD_F(adr, dst) |
| 31629 | res = dst - src; |
| 31630 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
| 31631 | flag_N = flag_C = res >> 8; |
| 31632 | flag_NotZ = res & 0xFFFF; |
| 31633 | POST_IO |
| 31634 | RET(12) |
| 31635 | } |
| 31636 | |
| 31637 | // CMP7M7 |
| 31638 | OPCODE(0xBF8F) |
| 31639 | { |
| 31640 | u32 adr, res; |
| 31641 | u32 src, dst; |
| 31642 | |
| 31643 | adr = AREG(7); |
| 31644 | AREG(7) += 4; |
| 31645 | PRE_IO |
| 31646 | READ_LONG_F(adr, src) |
| 31647 | adr = AREG(7); |
| 31648 | AREG(7) += 4; |
| 31649 | READ_LONG_F(adr, dst) |
| 31650 | res = dst - src; |
| 31651 | flag_NotZ = res; |
| 31652 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 31653 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 31654 | flag_N = res >> 24; |
| 31655 | POST_IO |
| 31656 | RET(20) |
| 31657 | } |
| 31658 | |
| 31659 | // EORDa |
| 31660 | OPCODE(0xB100) |
| 31661 | { |
| 31662 | u32 adr, res; |
| 31663 | u32 src, dst; |
| 31664 | |
| 31665 | src = DREGu8((Opcode >> 9) & 7); |
| 31666 | res = DREGu8((Opcode >> 0) & 7); |
| 31667 | res ^= src; |
| 31668 | flag_C = 0; |
| 31669 | flag_V = 0; |
| 31670 | flag_NotZ = res; |
| 31671 | flag_N = res; |
| 31672 | DREGu8((Opcode >> 0) & 7) = res; |
| 31673 | RET(4) |
| 31674 | } |
| 31675 | |
| 31676 | // EORDa |
| 31677 | OPCODE(0xB110) |
| 31678 | { |
| 31679 | u32 adr, res; |
| 31680 | u32 src, dst; |
| 31681 | |
| 31682 | src = DREGu8((Opcode >> 9) & 7); |
| 31683 | adr = AREG((Opcode >> 0) & 7); |
| 31684 | PRE_IO |
| 31685 | READ_BYTE_F(adr, res) |
| 31686 | res ^= src; |
| 31687 | flag_C = 0; |
| 31688 | flag_V = 0; |
| 31689 | flag_NotZ = res; |
| 31690 | flag_N = res; |
| 31691 | WRITE_BYTE_F(adr, res) |
| 31692 | POST_IO |
| 31693 | RET(12) |
| 31694 | } |
| 31695 | |
| 31696 | // EORDa |
| 31697 | OPCODE(0xB118) |
| 31698 | { |
| 31699 | u32 adr, res; |
| 31700 | u32 src, dst; |
| 31701 | |
| 31702 | src = DREGu8((Opcode >> 9) & 7); |
| 31703 | adr = AREG((Opcode >> 0) & 7); |
| 31704 | AREG((Opcode >> 0) & 7) += 1; |
| 31705 | PRE_IO |
| 31706 | READ_BYTE_F(adr, res) |
| 31707 | res ^= src; |
| 31708 | flag_C = 0; |
| 31709 | flag_V = 0; |
| 31710 | flag_NotZ = res; |
| 31711 | flag_N = res; |
| 31712 | WRITE_BYTE_F(adr, res) |
| 31713 | POST_IO |
| 31714 | RET(12) |
| 31715 | } |
| 31716 | |
| 31717 | // EORDa |
| 31718 | OPCODE(0xB120) |
| 31719 | { |
| 31720 | u32 adr, res; |
| 31721 | u32 src, dst; |
| 31722 | |
| 31723 | src = DREGu8((Opcode >> 9) & 7); |
| 31724 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 31725 | AREG((Opcode >> 0) & 7) = adr; |
| 31726 | PRE_IO |
| 31727 | READ_BYTE_F(adr, res) |
| 31728 | res ^= src; |
| 31729 | flag_C = 0; |
| 31730 | flag_V = 0; |
| 31731 | flag_NotZ = res; |
| 31732 | flag_N = res; |
| 31733 | WRITE_BYTE_F(adr, res) |
| 31734 | POST_IO |
| 31735 | RET(14) |
| 31736 | } |
| 31737 | |
| 31738 | // EORDa |
| 31739 | OPCODE(0xB128) |
| 31740 | { |
| 31741 | u32 adr, res; |
| 31742 | u32 src, dst; |
| 31743 | |
| 31744 | src = DREGu8((Opcode >> 9) & 7); |
| 31745 | FETCH_SWORD(adr); |
| 31746 | adr += AREG((Opcode >> 0) & 7); |
| 31747 | PRE_IO |
| 31748 | READ_BYTE_F(adr, res) |
| 31749 | res ^= src; |
| 31750 | flag_C = 0; |
| 31751 | flag_V = 0; |
| 31752 | flag_NotZ = res; |
| 31753 | flag_N = res; |
| 31754 | WRITE_BYTE_F(adr, res) |
| 31755 | POST_IO |
| 31756 | RET(16) |
| 31757 | } |
| 31758 | |
| 31759 | // EORDa |
| 31760 | OPCODE(0xB130) |
| 31761 | { |
| 31762 | u32 adr, res; |
| 31763 | u32 src, dst; |
| 31764 | |
| 31765 | src = DREGu8((Opcode >> 9) & 7); |
| 31766 | adr = AREG((Opcode >> 0) & 7); |
| 31767 | DECODE_EXT_WORD |
| 31768 | PRE_IO |
| 31769 | READ_BYTE_F(adr, res) |
| 31770 | res ^= src; |
| 31771 | flag_C = 0; |
| 31772 | flag_V = 0; |
| 31773 | flag_NotZ = res; |
| 31774 | flag_N = res; |
| 31775 | WRITE_BYTE_F(adr, res) |
| 31776 | POST_IO |
| 31777 | RET(18) |
| 31778 | } |
| 31779 | |
| 31780 | // EORDa |
| 31781 | OPCODE(0xB138) |
| 31782 | { |
| 31783 | u32 adr, res; |
| 31784 | u32 src, dst; |
| 31785 | |
| 31786 | src = DREGu8((Opcode >> 9) & 7); |
| 31787 | FETCH_SWORD(adr); |
| 31788 | PRE_IO |
| 31789 | READ_BYTE_F(adr, res) |
| 31790 | res ^= src; |
| 31791 | flag_C = 0; |
| 31792 | flag_V = 0; |
| 31793 | flag_NotZ = res; |
| 31794 | flag_N = res; |
| 31795 | WRITE_BYTE_F(adr, res) |
| 31796 | POST_IO |
| 31797 | RET(16) |
| 31798 | } |
| 31799 | |
| 31800 | // EORDa |
| 31801 | OPCODE(0xB139) |
| 31802 | { |
| 31803 | u32 adr, res; |
| 31804 | u32 src, dst; |
| 31805 | |
| 31806 | src = DREGu8((Opcode >> 9) & 7); |
| 31807 | FETCH_LONG(adr); |
| 31808 | PRE_IO |
| 31809 | READ_BYTE_F(adr, res) |
| 31810 | res ^= src; |
| 31811 | flag_C = 0; |
| 31812 | flag_V = 0; |
| 31813 | flag_NotZ = res; |
| 31814 | flag_N = res; |
| 31815 | WRITE_BYTE_F(adr, res) |
| 31816 | POST_IO |
| 31817 | RET(20) |
| 31818 | } |
| 31819 | |
| 31820 | // EORDa |
| 31821 | OPCODE(0xB11F) |
| 31822 | { |
| 31823 | u32 adr, res; |
| 31824 | u32 src, dst; |
| 31825 | |
| 31826 | src = DREGu8((Opcode >> 9) & 7); |
| 31827 | adr = AREG(7); |
| 31828 | AREG(7) += 2; |
| 31829 | PRE_IO |
| 31830 | READ_BYTE_F(adr, res) |
| 31831 | res ^= src; |
| 31832 | flag_C = 0; |
| 31833 | flag_V = 0; |
| 31834 | flag_NotZ = res; |
| 31835 | flag_N = res; |
| 31836 | WRITE_BYTE_F(adr, res) |
| 31837 | POST_IO |
| 31838 | RET(12) |
| 31839 | } |
| 31840 | |
| 31841 | // EORDa |
| 31842 | OPCODE(0xB127) |
| 31843 | { |
| 31844 | u32 adr, res; |
| 31845 | u32 src, dst; |
| 31846 | |
| 31847 | src = DREGu8((Opcode >> 9) & 7); |
| 31848 | adr = AREG(7) - 2; |
| 31849 | AREG(7) = adr; |
| 31850 | PRE_IO |
| 31851 | READ_BYTE_F(adr, res) |
| 31852 | res ^= src; |
| 31853 | flag_C = 0; |
| 31854 | flag_V = 0; |
| 31855 | flag_NotZ = res; |
| 31856 | flag_N = res; |
| 31857 | WRITE_BYTE_F(adr, res) |
| 31858 | POST_IO |
| 31859 | RET(14) |
| 31860 | } |
| 31861 | |
| 31862 | // EORDa |
| 31863 | OPCODE(0xB140) |
| 31864 | { |
| 31865 | u32 adr, res; |
| 31866 | u32 src, dst; |
| 31867 | |
| 31868 | src = DREGu16((Opcode >> 9) & 7); |
| 31869 | res = DREGu16((Opcode >> 0) & 7); |
| 31870 | res ^= src; |
| 31871 | flag_C = 0; |
| 31872 | flag_V = 0; |
| 31873 | flag_NotZ = res; |
| 31874 | flag_N = res >> 8; |
| 31875 | DREGu16((Opcode >> 0) & 7) = res; |
| 31876 | RET(4) |
| 31877 | } |
| 31878 | |
| 31879 | // EORDa |
| 31880 | OPCODE(0xB150) |
| 31881 | { |
| 31882 | u32 adr, res; |
| 31883 | u32 src, dst; |
| 31884 | |
| 31885 | src = DREGu16((Opcode >> 9) & 7); |
| 31886 | adr = AREG((Opcode >> 0) & 7); |
| 31887 | PRE_IO |
| 31888 | READ_WORD_F(adr, res) |
| 31889 | res ^= src; |
| 31890 | flag_C = 0; |
| 31891 | flag_V = 0; |
| 31892 | flag_NotZ = res; |
| 31893 | flag_N = res >> 8; |
| 31894 | WRITE_WORD_F(adr, res) |
| 31895 | POST_IO |
| 31896 | RET(12) |
| 31897 | } |
| 31898 | |
| 31899 | // EORDa |
| 31900 | OPCODE(0xB158) |
| 31901 | { |
| 31902 | u32 adr, res; |
| 31903 | u32 src, dst; |
| 31904 | |
| 31905 | src = DREGu16((Opcode >> 9) & 7); |
| 31906 | adr = AREG((Opcode >> 0) & 7); |
| 31907 | AREG((Opcode >> 0) & 7) += 2; |
| 31908 | PRE_IO |
| 31909 | READ_WORD_F(adr, res) |
| 31910 | res ^= src; |
| 31911 | flag_C = 0; |
| 31912 | flag_V = 0; |
| 31913 | flag_NotZ = res; |
| 31914 | flag_N = res >> 8; |
| 31915 | WRITE_WORD_F(adr, res) |
| 31916 | POST_IO |
| 31917 | RET(12) |
| 31918 | } |
| 31919 | |
| 31920 | // EORDa |
| 31921 | OPCODE(0xB160) |
| 31922 | { |
| 31923 | u32 adr, res; |
| 31924 | u32 src, dst; |
| 31925 | |
| 31926 | src = DREGu16((Opcode >> 9) & 7); |
| 31927 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 31928 | AREG((Opcode >> 0) & 7) = adr; |
| 31929 | PRE_IO |
| 31930 | READ_WORD_F(adr, res) |
| 31931 | res ^= src; |
| 31932 | flag_C = 0; |
| 31933 | flag_V = 0; |
| 31934 | flag_NotZ = res; |
| 31935 | flag_N = res >> 8; |
| 31936 | WRITE_WORD_F(adr, res) |
| 31937 | POST_IO |
| 31938 | RET(14) |
| 31939 | } |
| 31940 | |
| 31941 | // EORDa |
| 31942 | OPCODE(0xB168) |
| 31943 | { |
| 31944 | u32 adr, res; |
| 31945 | u32 src, dst; |
| 31946 | |
| 31947 | src = DREGu16((Opcode >> 9) & 7); |
| 31948 | FETCH_SWORD(adr); |
| 31949 | adr += AREG((Opcode >> 0) & 7); |
| 31950 | PRE_IO |
| 31951 | READ_WORD_F(adr, res) |
| 31952 | res ^= src; |
| 31953 | flag_C = 0; |
| 31954 | flag_V = 0; |
| 31955 | flag_NotZ = res; |
| 31956 | flag_N = res >> 8; |
| 31957 | WRITE_WORD_F(adr, res) |
| 31958 | POST_IO |
| 31959 | RET(16) |
| 31960 | } |
| 31961 | |
| 31962 | // EORDa |
| 31963 | OPCODE(0xB170) |
| 31964 | { |
| 31965 | u32 adr, res; |
| 31966 | u32 src, dst; |
| 31967 | |
| 31968 | src = DREGu16((Opcode >> 9) & 7); |
| 31969 | adr = AREG((Opcode >> 0) & 7); |
| 31970 | DECODE_EXT_WORD |
| 31971 | PRE_IO |
| 31972 | READ_WORD_F(adr, res) |
| 31973 | res ^= src; |
| 31974 | flag_C = 0; |
| 31975 | flag_V = 0; |
| 31976 | flag_NotZ = res; |
| 31977 | flag_N = res >> 8; |
| 31978 | WRITE_WORD_F(adr, res) |
| 31979 | POST_IO |
| 31980 | RET(18) |
| 31981 | } |
| 31982 | |
| 31983 | // EORDa |
| 31984 | OPCODE(0xB178) |
| 31985 | { |
| 31986 | u32 adr, res; |
| 31987 | u32 src, dst; |
| 31988 | |
| 31989 | src = DREGu16((Opcode >> 9) & 7); |
| 31990 | FETCH_SWORD(adr); |
| 31991 | PRE_IO |
| 31992 | READ_WORD_F(adr, res) |
| 31993 | res ^= src; |
| 31994 | flag_C = 0; |
| 31995 | flag_V = 0; |
| 31996 | flag_NotZ = res; |
| 31997 | flag_N = res >> 8; |
| 31998 | WRITE_WORD_F(adr, res) |
| 31999 | POST_IO |
| 32000 | RET(16) |
| 32001 | } |
| 32002 | |
| 32003 | // EORDa |
| 32004 | OPCODE(0xB179) |
| 32005 | { |
| 32006 | u32 adr, res; |
| 32007 | u32 src, dst; |
| 32008 | |
| 32009 | src = DREGu16((Opcode >> 9) & 7); |
| 32010 | FETCH_LONG(adr); |
| 32011 | PRE_IO |
| 32012 | READ_WORD_F(adr, res) |
| 32013 | res ^= src; |
| 32014 | flag_C = 0; |
| 32015 | flag_V = 0; |
| 32016 | flag_NotZ = res; |
| 32017 | flag_N = res >> 8; |
| 32018 | WRITE_WORD_F(adr, res) |
| 32019 | POST_IO |
| 32020 | RET(20) |
| 32021 | } |
| 32022 | |
| 32023 | // EORDa |
| 32024 | OPCODE(0xB15F) |
| 32025 | { |
| 32026 | u32 adr, res; |
| 32027 | u32 src, dst; |
| 32028 | |
| 32029 | src = DREGu16((Opcode >> 9) & 7); |
| 32030 | adr = AREG(7); |
| 32031 | AREG(7) += 2; |
| 32032 | PRE_IO |
| 32033 | READ_WORD_F(adr, res) |
| 32034 | res ^= src; |
| 32035 | flag_C = 0; |
| 32036 | flag_V = 0; |
| 32037 | flag_NotZ = res; |
| 32038 | flag_N = res >> 8; |
| 32039 | WRITE_WORD_F(adr, res) |
| 32040 | POST_IO |
| 32041 | RET(12) |
| 32042 | } |
| 32043 | |
| 32044 | // EORDa |
| 32045 | OPCODE(0xB167) |
| 32046 | { |
| 32047 | u32 adr, res; |
| 32048 | u32 src, dst; |
| 32049 | |
| 32050 | src = DREGu16((Opcode >> 9) & 7); |
| 32051 | adr = AREG(7) - 2; |
| 32052 | AREG(7) = adr; |
| 32053 | PRE_IO |
| 32054 | READ_WORD_F(adr, res) |
| 32055 | res ^= src; |
| 32056 | flag_C = 0; |
| 32057 | flag_V = 0; |
| 32058 | flag_NotZ = res; |
| 32059 | flag_N = res >> 8; |
| 32060 | WRITE_WORD_F(adr, res) |
| 32061 | POST_IO |
| 32062 | RET(14) |
| 32063 | } |
| 32064 | |
| 32065 | // EORDa |
| 32066 | OPCODE(0xB180) |
| 32067 | { |
| 32068 | u32 adr, res; |
| 32069 | u32 src, dst; |
| 32070 | |
| 32071 | src = DREGu32((Opcode >> 9) & 7); |
| 32072 | res = DREGu32((Opcode >> 0) & 7); |
| 32073 | res ^= src; |
| 32074 | flag_C = 0; |
| 32075 | flag_V = 0; |
| 32076 | flag_NotZ = res; |
| 32077 | flag_N = res >> 24; |
| 32078 | DREGu32((Opcode >> 0) & 7) = res; |
| 32079 | RET(8) |
| 32080 | } |
| 32081 | |
| 32082 | // EORDa |
| 32083 | OPCODE(0xB190) |
| 32084 | { |
| 32085 | u32 adr, res; |
| 32086 | u32 src, dst; |
| 32087 | |
| 32088 | src = DREGu32((Opcode >> 9) & 7); |
| 32089 | adr = AREG((Opcode >> 0) & 7); |
| 32090 | PRE_IO |
| 32091 | READ_LONG_F(adr, res) |
| 32092 | res ^= src; |
| 32093 | flag_C = 0; |
| 32094 | flag_V = 0; |
| 32095 | flag_NotZ = res; |
| 32096 | flag_N = res >> 24; |
| 32097 | WRITE_LONG_F(adr, res) |
| 32098 | POST_IO |
| 32099 | RET(20) |
| 32100 | } |
| 32101 | |
| 32102 | // EORDa |
| 32103 | OPCODE(0xB198) |
| 32104 | { |
| 32105 | u32 adr, res; |
| 32106 | u32 src, dst; |
| 32107 | |
| 32108 | src = DREGu32((Opcode >> 9) & 7); |
| 32109 | adr = AREG((Opcode >> 0) & 7); |
| 32110 | AREG((Opcode >> 0) & 7) += 4; |
| 32111 | PRE_IO |
| 32112 | READ_LONG_F(adr, res) |
| 32113 | res ^= src; |
| 32114 | flag_C = 0; |
| 32115 | flag_V = 0; |
| 32116 | flag_NotZ = res; |
| 32117 | flag_N = res >> 24; |
| 32118 | WRITE_LONG_F(adr, res) |
| 32119 | POST_IO |
| 32120 | RET(20) |
| 32121 | } |
| 32122 | |
| 32123 | // EORDa |
| 32124 | OPCODE(0xB1A0) |
| 32125 | { |
| 32126 | u32 adr, res; |
| 32127 | u32 src, dst; |
| 32128 | |
| 32129 | src = DREGu32((Opcode >> 9) & 7); |
| 32130 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 32131 | AREG((Opcode >> 0) & 7) = adr; |
| 32132 | PRE_IO |
| 32133 | READ_LONG_F(adr, res) |
| 32134 | res ^= src; |
| 32135 | flag_C = 0; |
| 32136 | flag_V = 0; |
| 32137 | flag_NotZ = res; |
| 32138 | flag_N = res >> 24; |
| 32139 | WRITE_LONG_F(adr, res) |
| 32140 | POST_IO |
| 32141 | RET(22) |
| 32142 | } |
| 32143 | |
| 32144 | // EORDa |
| 32145 | OPCODE(0xB1A8) |
| 32146 | { |
| 32147 | u32 adr, res; |
| 32148 | u32 src, dst; |
| 32149 | |
| 32150 | src = DREGu32((Opcode >> 9) & 7); |
| 32151 | FETCH_SWORD(adr); |
| 32152 | adr += AREG((Opcode >> 0) & 7); |
| 32153 | PRE_IO |
| 32154 | READ_LONG_F(adr, res) |
| 32155 | res ^= src; |
| 32156 | flag_C = 0; |
| 32157 | flag_V = 0; |
| 32158 | flag_NotZ = res; |
| 32159 | flag_N = res >> 24; |
| 32160 | WRITE_LONG_F(adr, res) |
| 32161 | POST_IO |
| 32162 | RET(24) |
| 32163 | } |
| 32164 | |
| 32165 | // EORDa |
| 32166 | OPCODE(0xB1B0) |
| 32167 | { |
| 32168 | u32 adr, res; |
| 32169 | u32 src, dst; |
| 32170 | |
| 32171 | src = DREGu32((Opcode >> 9) & 7); |
| 32172 | adr = AREG((Opcode >> 0) & 7); |
| 32173 | DECODE_EXT_WORD |
| 32174 | PRE_IO |
| 32175 | READ_LONG_F(adr, res) |
| 32176 | res ^= src; |
| 32177 | flag_C = 0; |
| 32178 | flag_V = 0; |
| 32179 | flag_NotZ = res; |
| 32180 | flag_N = res >> 24; |
| 32181 | WRITE_LONG_F(adr, res) |
| 32182 | POST_IO |
| 32183 | RET(26) |
| 32184 | } |
| 32185 | |
| 32186 | // EORDa |
| 32187 | OPCODE(0xB1B8) |
| 32188 | { |
| 32189 | u32 adr, res; |
| 32190 | u32 src, dst; |
| 32191 | |
| 32192 | src = DREGu32((Opcode >> 9) & 7); |
| 32193 | FETCH_SWORD(adr); |
| 32194 | PRE_IO |
| 32195 | READ_LONG_F(adr, res) |
| 32196 | res ^= src; |
| 32197 | flag_C = 0; |
| 32198 | flag_V = 0; |
| 32199 | flag_NotZ = res; |
| 32200 | flag_N = res >> 24; |
| 32201 | WRITE_LONG_F(adr, res) |
| 32202 | POST_IO |
| 32203 | RET(24) |
| 32204 | } |
| 32205 | |
| 32206 | // EORDa |
| 32207 | OPCODE(0xB1B9) |
| 32208 | { |
| 32209 | u32 adr, res; |
| 32210 | u32 src, dst; |
| 32211 | |
| 32212 | src = DREGu32((Opcode >> 9) & 7); |
| 32213 | FETCH_LONG(adr); |
| 32214 | PRE_IO |
| 32215 | READ_LONG_F(adr, res) |
| 32216 | res ^= src; |
| 32217 | flag_C = 0; |
| 32218 | flag_V = 0; |
| 32219 | flag_NotZ = res; |
| 32220 | flag_N = res >> 24; |
| 32221 | WRITE_LONG_F(adr, res) |
| 32222 | POST_IO |
| 32223 | RET(28) |
| 32224 | } |
| 32225 | |
| 32226 | // EORDa |
| 32227 | OPCODE(0xB19F) |
| 32228 | { |
| 32229 | u32 adr, res; |
| 32230 | u32 src, dst; |
| 32231 | |
| 32232 | src = DREGu32((Opcode >> 9) & 7); |
| 32233 | adr = AREG(7); |
| 32234 | AREG(7) += 4; |
| 32235 | PRE_IO |
| 32236 | READ_LONG_F(adr, res) |
| 32237 | res ^= src; |
| 32238 | flag_C = 0; |
| 32239 | flag_V = 0; |
| 32240 | flag_NotZ = res; |
| 32241 | flag_N = res >> 24; |
| 32242 | WRITE_LONG_F(adr, res) |
| 32243 | POST_IO |
| 32244 | RET(20) |
| 32245 | } |
| 32246 | |
| 32247 | // EORDa |
| 32248 | OPCODE(0xB1A7) |
| 32249 | { |
| 32250 | u32 adr, res; |
| 32251 | u32 src, dst; |
| 32252 | |
| 32253 | src = DREGu32((Opcode >> 9) & 7); |
| 32254 | adr = AREG(7) - 4; |
| 32255 | AREG(7) = adr; |
| 32256 | PRE_IO |
| 32257 | READ_LONG_F(adr, res) |
| 32258 | res ^= src; |
| 32259 | flag_C = 0; |
| 32260 | flag_V = 0; |
| 32261 | flag_NotZ = res; |
| 32262 | flag_N = res >> 24; |
| 32263 | WRITE_LONG_F(adr, res) |
| 32264 | POST_IO |
| 32265 | RET(22) |
| 32266 | } |
| 32267 | |
| 32268 | // CMPA |
| 32269 | OPCODE(0xB0C0) |
| 32270 | { |
| 32271 | u32 adr, res; |
| 32272 | u32 src, dst; |
| 32273 | |
| 32274 | src = (s32)DREGs16((Opcode >> 0) & 7); |
| 32275 | dst = AREGu32((Opcode >> 9) & 7); |
| 32276 | res = dst - src; |
| 32277 | flag_NotZ = res; |
| 32278 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32279 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32280 | flag_N = res >> 24; |
| 32281 | RET(6) |
| 32282 | } |
| 32283 | |
| 32284 | // CMPA |
| 32285 | OPCODE(0xB0C8) |
| 32286 | { |
| 32287 | u32 adr, res; |
| 32288 | u32 src, dst; |
| 32289 | |
| 32290 | src = (s32)AREGs16((Opcode >> 0) & 7); |
| 32291 | dst = AREGu32((Opcode >> 9) & 7); |
| 32292 | res = dst - src; |
| 32293 | flag_NotZ = res; |
| 32294 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32295 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32296 | flag_N = res >> 24; |
| 32297 | RET(6) |
| 32298 | } |
| 32299 | |
| 32300 | // CMPA |
| 32301 | OPCODE(0xB0D0) |
| 32302 | { |
| 32303 | u32 adr, res; |
| 32304 | u32 src, dst; |
| 32305 | |
| 32306 | adr = AREG((Opcode >> 0) & 7); |
| 32307 | PRE_IO |
| 32308 | READSX_WORD_F(adr, src) |
| 32309 | dst = AREGu32((Opcode >> 9) & 7); |
| 32310 | res = dst - src; |
| 32311 | flag_NotZ = res; |
| 32312 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32313 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32314 | flag_N = res >> 24; |
| 32315 | POST_IO |
| 32316 | RET(10) |
| 32317 | } |
| 32318 | |
| 32319 | // CMPA |
| 32320 | OPCODE(0xB0D8) |
| 32321 | { |
| 32322 | u32 adr, res; |
| 32323 | u32 src, dst; |
| 32324 | |
| 32325 | adr = AREG((Opcode >> 0) & 7); |
| 32326 | AREG((Opcode >> 0) & 7) += 2; |
| 32327 | PRE_IO |
| 32328 | READSX_WORD_F(adr, src) |
| 32329 | dst = AREGu32((Opcode >> 9) & 7); |
| 32330 | res = dst - src; |
| 32331 | flag_NotZ = res; |
| 32332 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32333 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32334 | flag_N = res >> 24; |
| 32335 | POST_IO |
| 32336 | RET(10) |
| 32337 | } |
| 32338 | |
| 32339 | // CMPA |
| 32340 | OPCODE(0xB0E0) |
| 32341 | { |
| 32342 | u32 adr, res; |
| 32343 | u32 src, dst; |
| 32344 | |
| 32345 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 32346 | AREG((Opcode >> 0) & 7) = adr; |
| 32347 | PRE_IO |
| 32348 | READSX_WORD_F(adr, src) |
| 32349 | dst = AREGu32((Opcode >> 9) & 7); |
| 32350 | res = dst - src; |
| 32351 | flag_NotZ = res; |
| 32352 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32353 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32354 | flag_N = res >> 24; |
| 32355 | POST_IO |
| 32356 | RET(12) |
| 32357 | } |
| 32358 | |
| 32359 | // CMPA |
| 32360 | OPCODE(0xB0E8) |
| 32361 | { |
| 32362 | u32 adr, res; |
| 32363 | u32 src, dst; |
| 32364 | |
| 32365 | FETCH_SWORD(adr); |
| 32366 | adr += AREG((Opcode >> 0) & 7); |
| 32367 | PRE_IO |
| 32368 | READSX_WORD_F(adr, src) |
| 32369 | dst = AREGu32((Opcode >> 9) & 7); |
| 32370 | res = dst - src; |
| 32371 | flag_NotZ = res; |
| 32372 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32373 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32374 | flag_N = res >> 24; |
| 32375 | POST_IO |
| 32376 | RET(14) |
| 32377 | } |
| 32378 | |
| 32379 | // CMPA |
| 32380 | OPCODE(0xB0F0) |
| 32381 | { |
| 32382 | u32 adr, res; |
| 32383 | u32 src, dst; |
| 32384 | |
| 32385 | adr = AREG((Opcode >> 0) & 7); |
| 32386 | DECODE_EXT_WORD |
| 32387 | PRE_IO |
| 32388 | READSX_WORD_F(adr, src) |
| 32389 | dst = AREGu32((Opcode >> 9) & 7); |
| 32390 | res = dst - src; |
| 32391 | flag_NotZ = res; |
| 32392 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32393 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32394 | flag_N = res >> 24; |
| 32395 | POST_IO |
| 32396 | RET(16) |
| 32397 | } |
| 32398 | |
| 32399 | // CMPA |
| 32400 | OPCODE(0xB0F8) |
| 32401 | { |
| 32402 | u32 adr, res; |
| 32403 | u32 src, dst; |
| 32404 | |
| 32405 | FETCH_SWORD(adr); |
| 32406 | PRE_IO |
| 32407 | READSX_WORD_F(adr, src) |
| 32408 | dst = AREGu32((Opcode >> 9) & 7); |
| 32409 | res = dst - src; |
| 32410 | flag_NotZ = res; |
| 32411 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32412 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32413 | flag_N = res >> 24; |
| 32414 | POST_IO |
| 32415 | RET(14) |
| 32416 | } |
| 32417 | |
| 32418 | // CMPA |
| 32419 | OPCODE(0xB0F9) |
| 32420 | { |
| 32421 | u32 adr, res; |
| 32422 | u32 src, dst; |
| 32423 | |
| 32424 | FETCH_LONG(adr); |
| 32425 | PRE_IO |
| 32426 | READSX_WORD_F(adr, src) |
| 32427 | dst = AREGu32((Opcode >> 9) & 7); |
| 32428 | res = dst - src; |
| 32429 | flag_NotZ = res; |
| 32430 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32431 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32432 | flag_N = res >> 24; |
| 32433 | POST_IO |
| 32434 | RET(18) |
| 32435 | } |
| 32436 | |
| 32437 | // CMPA |
| 32438 | OPCODE(0xB0FA) |
| 32439 | { |
| 32440 | u32 adr, res; |
| 32441 | u32 src, dst; |
| 32442 | |
| 32443 | adr = GET_SWORD + GET_PC; |
| 32444 | PC++; |
| 32445 | PRE_IO |
| 32446 | READSX_WORD_F(adr, src) |
| 32447 | dst = AREGu32((Opcode >> 9) & 7); |
| 32448 | res = dst - src; |
| 32449 | flag_NotZ = res; |
| 32450 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32451 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32452 | flag_N = res >> 24; |
| 32453 | POST_IO |
| 32454 | RET(14) |
| 32455 | } |
| 32456 | |
| 32457 | // CMPA |
| 32458 | OPCODE(0xB0FB) |
| 32459 | { |
| 32460 | u32 adr, res; |
| 32461 | u32 src, dst; |
| 32462 | |
| 32463 | adr = GET_PC; |
| 32464 | DECODE_EXT_WORD |
| 32465 | PRE_IO |
| 32466 | READSX_WORD_F(adr, src) |
| 32467 | dst = AREGu32((Opcode >> 9) & 7); |
| 32468 | res = dst - src; |
| 32469 | flag_NotZ = res; |
| 32470 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32471 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32472 | flag_N = res >> 24; |
| 32473 | POST_IO |
| 32474 | RET(16) |
| 32475 | } |
| 32476 | |
| 32477 | // CMPA |
| 32478 | OPCODE(0xB0FC) |
| 32479 | { |
| 32480 | u32 adr, res; |
| 32481 | u32 src, dst; |
| 32482 | |
| 32483 | FETCH_SWORD(src); |
| 32484 | dst = AREGu32((Opcode >> 9) & 7); |
| 32485 | res = dst - src; |
| 32486 | flag_NotZ = res; |
| 32487 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32488 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32489 | flag_N = res >> 24; |
| 32490 | RET(10) |
| 32491 | } |
| 32492 | |
| 32493 | // CMPA |
| 32494 | OPCODE(0xB0DF) |
| 32495 | { |
| 32496 | u32 adr, res; |
| 32497 | u32 src, dst; |
| 32498 | |
| 32499 | adr = AREG(7); |
| 32500 | AREG(7) += 2; |
| 32501 | PRE_IO |
| 32502 | READSX_WORD_F(adr, src) |
| 32503 | dst = AREGu32((Opcode >> 9) & 7); |
| 32504 | res = dst - src; |
| 32505 | flag_NotZ = res; |
| 32506 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32507 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32508 | flag_N = res >> 24; |
| 32509 | POST_IO |
| 32510 | RET(10) |
| 32511 | } |
| 32512 | |
| 32513 | // CMPA |
| 32514 | OPCODE(0xB0E7) |
| 32515 | { |
| 32516 | u32 adr, res; |
| 32517 | u32 src, dst; |
| 32518 | |
| 32519 | adr = AREG(7) - 2; |
| 32520 | AREG(7) = adr; |
| 32521 | PRE_IO |
| 32522 | READSX_WORD_F(adr, src) |
| 32523 | dst = AREGu32((Opcode >> 9) & 7); |
| 32524 | res = dst - src; |
| 32525 | flag_NotZ = res; |
| 32526 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32527 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32528 | flag_N = res >> 24; |
| 32529 | POST_IO |
| 32530 | RET(12) |
| 32531 | } |
| 32532 | |
| 32533 | // CMPA |
| 32534 | OPCODE(0xB1C0) |
| 32535 | { |
| 32536 | u32 adr, res; |
| 32537 | u32 src, dst; |
| 32538 | |
| 32539 | src = (s32)DREGs32((Opcode >> 0) & 7); |
| 32540 | dst = AREGu32((Opcode >> 9) & 7); |
| 32541 | res = dst - src; |
| 32542 | flag_NotZ = res; |
| 32543 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32544 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32545 | flag_N = res >> 24; |
| 32546 | RET(6) |
| 32547 | } |
| 32548 | |
| 32549 | // CMPA |
| 32550 | OPCODE(0xB1C8) |
| 32551 | { |
| 32552 | u32 adr, res; |
| 32553 | u32 src, dst; |
| 32554 | |
| 32555 | src = (s32)AREGs32((Opcode >> 0) & 7); |
| 32556 | dst = AREGu32((Opcode >> 9) & 7); |
| 32557 | res = dst - src; |
| 32558 | flag_NotZ = res; |
| 32559 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32560 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32561 | flag_N = res >> 24; |
| 32562 | RET(6) |
| 32563 | } |
| 32564 | |
| 32565 | // CMPA |
| 32566 | OPCODE(0xB1D0) |
| 32567 | { |
| 32568 | u32 adr, res; |
| 32569 | u32 src, dst; |
| 32570 | |
| 32571 | adr = AREG((Opcode >> 0) & 7); |
| 32572 | PRE_IO |
| 32573 | READSX_LONG_F(adr, src) |
| 32574 | dst = AREGu32((Opcode >> 9) & 7); |
| 32575 | res = dst - src; |
| 32576 | flag_NotZ = res; |
| 32577 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32578 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32579 | flag_N = res >> 24; |
| 32580 | POST_IO |
| 32581 | RET(14) |
| 32582 | } |
| 32583 | |
| 32584 | // CMPA |
| 32585 | OPCODE(0xB1D8) |
| 32586 | { |
| 32587 | u32 adr, res; |
| 32588 | u32 src, dst; |
| 32589 | |
| 32590 | adr = AREG((Opcode >> 0) & 7); |
| 32591 | AREG((Opcode >> 0) & 7) += 4; |
| 32592 | PRE_IO |
| 32593 | READSX_LONG_F(adr, src) |
| 32594 | dst = AREGu32((Opcode >> 9) & 7); |
| 32595 | res = dst - src; |
| 32596 | flag_NotZ = res; |
| 32597 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32598 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32599 | flag_N = res >> 24; |
| 32600 | POST_IO |
| 32601 | RET(14) |
| 32602 | } |
| 32603 | |
| 32604 | // CMPA |
| 32605 | OPCODE(0xB1E0) |
| 32606 | { |
| 32607 | u32 adr, res; |
| 32608 | u32 src, dst; |
| 32609 | |
| 32610 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 32611 | AREG((Opcode >> 0) & 7) = adr; |
| 32612 | PRE_IO |
| 32613 | READSX_LONG_F(adr, src) |
| 32614 | dst = AREGu32((Opcode >> 9) & 7); |
| 32615 | res = dst - src; |
| 32616 | flag_NotZ = res; |
| 32617 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32618 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32619 | flag_N = res >> 24; |
| 32620 | POST_IO |
| 32621 | RET(16) |
| 32622 | } |
| 32623 | |
| 32624 | // CMPA |
| 32625 | OPCODE(0xB1E8) |
| 32626 | { |
| 32627 | u32 adr, res; |
| 32628 | u32 src, dst; |
| 32629 | |
| 32630 | FETCH_SWORD(adr); |
| 32631 | adr += AREG((Opcode >> 0) & 7); |
| 32632 | PRE_IO |
| 32633 | READSX_LONG_F(adr, src) |
| 32634 | dst = AREGu32((Opcode >> 9) & 7); |
| 32635 | res = dst - src; |
| 32636 | flag_NotZ = res; |
| 32637 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32638 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32639 | flag_N = res >> 24; |
| 32640 | POST_IO |
| 32641 | RET(18) |
| 32642 | } |
| 32643 | |
| 32644 | // CMPA |
| 32645 | OPCODE(0xB1F0) |
| 32646 | { |
| 32647 | u32 adr, res; |
| 32648 | u32 src, dst; |
| 32649 | |
| 32650 | adr = AREG((Opcode >> 0) & 7); |
| 32651 | DECODE_EXT_WORD |
| 32652 | PRE_IO |
| 32653 | READSX_LONG_F(adr, src) |
| 32654 | dst = AREGu32((Opcode >> 9) & 7); |
| 32655 | res = dst - src; |
| 32656 | flag_NotZ = res; |
| 32657 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32658 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32659 | flag_N = res >> 24; |
| 32660 | POST_IO |
| 32661 | RET(20) |
| 32662 | } |
| 32663 | |
| 32664 | // CMPA |
| 32665 | OPCODE(0xB1F8) |
| 32666 | { |
| 32667 | u32 adr, res; |
| 32668 | u32 src, dst; |
| 32669 | |
| 32670 | FETCH_SWORD(adr); |
| 32671 | PRE_IO |
| 32672 | READSX_LONG_F(adr, src) |
| 32673 | dst = AREGu32((Opcode >> 9) & 7); |
| 32674 | res = dst - src; |
| 32675 | flag_NotZ = res; |
| 32676 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32677 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32678 | flag_N = res >> 24; |
| 32679 | POST_IO |
| 32680 | RET(18) |
| 32681 | } |
| 32682 | |
| 32683 | // CMPA |
| 32684 | OPCODE(0xB1F9) |
| 32685 | { |
| 32686 | u32 adr, res; |
| 32687 | u32 src, dst; |
| 32688 | |
| 32689 | FETCH_LONG(adr); |
| 32690 | PRE_IO |
| 32691 | READSX_LONG_F(adr, src) |
| 32692 | dst = AREGu32((Opcode >> 9) & 7); |
| 32693 | res = dst - src; |
| 32694 | flag_NotZ = res; |
| 32695 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32696 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32697 | flag_N = res >> 24; |
| 32698 | POST_IO |
| 32699 | RET(22) |
| 32700 | } |
| 32701 | |
| 32702 | // CMPA |
| 32703 | OPCODE(0xB1FA) |
| 32704 | { |
| 32705 | u32 adr, res; |
| 32706 | u32 src, dst; |
| 32707 | |
| 32708 | adr = GET_SWORD + GET_PC; |
| 32709 | PC++; |
| 32710 | PRE_IO |
| 32711 | READSX_LONG_F(adr, src) |
| 32712 | dst = AREGu32((Opcode >> 9) & 7); |
| 32713 | res = dst - src; |
| 32714 | flag_NotZ = res; |
| 32715 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32716 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32717 | flag_N = res >> 24; |
| 32718 | POST_IO |
| 32719 | RET(18) |
| 32720 | } |
| 32721 | |
| 32722 | // CMPA |
| 32723 | OPCODE(0xB1FB) |
| 32724 | { |
| 32725 | u32 adr, res; |
| 32726 | u32 src, dst; |
| 32727 | |
| 32728 | adr = GET_PC; |
| 32729 | DECODE_EXT_WORD |
| 32730 | PRE_IO |
| 32731 | READSX_LONG_F(adr, src) |
| 32732 | dst = AREGu32((Opcode >> 9) & 7); |
| 32733 | res = dst - src; |
| 32734 | flag_NotZ = res; |
| 32735 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32736 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32737 | flag_N = res >> 24; |
| 32738 | POST_IO |
| 32739 | RET(20) |
| 32740 | } |
| 32741 | |
| 32742 | // CMPA |
| 32743 | OPCODE(0xB1FC) |
| 32744 | { |
| 32745 | u32 adr, res; |
| 32746 | u32 src, dst; |
| 32747 | |
| 32748 | FETCH_LONG(src); |
| 32749 | dst = AREGu32((Opcode >> 9) & 7); |
| 32750 | res = dst - src; |
| 32751 | flag_NotZ = res; |
| 32752 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32753 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32754 | flag_N = res >> 24; |
| 32755 | RET(14) |
| 32756 | } |
| 32757 | |
| 32758 | // CMPA |
| 32759 | OPCODE(0xB1DF) |
| 32760 | { |
| 32761 | u32 adr, res; |
| 32762 | u32 src, dst; |
| 32763 | |
| 32764 | adr = AREG(7); |
| 32765 | AREG(7) += 4; |
| 32766 | PRE_IO |
| 32767 | READSX_LONG_F(adr, src) |
| 32768 | dst = AREGu32((Opcode >> 9) & 7); |
| 32769 | res = dst - src; |
| 32770 | flag_NotZ = res; |
| 32771 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32772 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32773 | flag_N = res >> 24; |
| 32774 | POST_IO |
| 32775 | RET(14) |
| 32776 | } |
| 32777 | |
| 32778 | // CMPA |
| 32779 | OPCODE(0xB1E7) |
| 32780 | { |
| 32781 | u32 adr, res; |
| 32782 | u32 src, dst; |
| 32783 | |
| 32784 | adr = AREG(7) - 4; |
| 32785 | AREG(7) = adr; |
| 32786 | PRE_IO |
| 32787 | READSX_LONG_F(adr, src) |
| 32788 | dst = AREGu32((Opcode >> 9) & 7); |
| 32789 | res = dst - src; |
| 32790 | flag_NotZ = res; |
| 32791 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
| 32792 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
| 32793 | flag_N = res >> 24; |
| 32794 | POST_IO |
| 32795 | RET(16) |
| 32796 | } |
| 32797 | |
| 32798 | // ANDaD |
| 32799 | OPCODE(0xC000) |
| 32800 | { |
| 32801 | u32 adr, res; |
| 32802 | u32 src, dst; |
| 32803 | |
| 32804 | src = DREGu8((Opcode >> 0) & 7); |
| 32805 | res = DREGu8((Opcode >> 9) & 7); |
| 32806 | res &= src; |
| 32807 | flag_C = 0; |
| 32808 | flag_V = 0; |
| 32809 | flag_NotZ = res; |
| 32810 | flag_N = res; |
| 32811 | DREGu8((Opcode >> 9) & 7) = res; |
| 32812 | RET(4) |
| 32813 | } |
| 32814 | |
| 32815 | // ANDaD |
| 32816 | OPCODE(0xC010) |
| 32817 | { |
| 32818 | u32 adr, res; |
| 32819 | u32 src, dst; |
| 32820 | |
| 32821 | adr = AREG((Opcode >> 0) & 7); |
| 32822 | PRE_IO |
| 32823 | READ_BYTE_F(adr, src) |
| 32824 | res = DREGu8((Opcode >> 9) & 7); |
| 32825 | res &= src; |
| 32826 | flag_C = 0; |
| 32827 | flag_V = 0; |
| 32828 | flag_NotZ = res; |
| 32829 | flag_N = res; |
| 32830 | DREGu8((Opcode >> 9) & 7) = res; |
| 32831 | POST_IO |
| 32832 | RET(8) |
| 32833 | } |
| 32834 | |
| 32835 | // ANDaD |
| 32836 | OPCODE(0xC018) |
| 32837 | { |
| 32838 | u32 adr, res; |
| 32839 | u32 src, dst; |
| 32840 | |
| 32841 | adr = AREG((Opcode >> 0) & 7); |
| 32842 | AREG((Opcode >> 0) & 7) += 1; |
| 32843 | PRE_IO |
| 32844 | READ_BYTE_F(adr, src) |
| 32845 | res = DREGu8((Opcode >> 9) & 7); |
| 32846 | res &= src; |
| 32847 | flag_C = 0; |
| 32848 | flag_V = 0; |
| 32849 | flag_NotZ = res; |
| 32850 | flag_N = res; |
| 32851 | DREGu8((Opcode >> 9) & 7) = res; |
| 32852 | POST_IO |
| 32853 | RET(8) |
| 32854 | } |
| 32855 | |
| 32856 | // ANDaD |
| 32857 | OPCODE(0xC020) |
| 32858 | { |
| 32859 | u32 adr, res; |
| 32860 | u32 src, dst; |
| 32861 | |
| 32862 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 32863 | AREG((Opcode >> 0) & 7) = adr; |
| 32864 | PRE_IO |
| 32865 | READ_BYTE_F(adr, src) |
| 32866 | res = DREGu8((Opcode >> 9) & 7); |
| 32867 | res &= src; |
| 32868 | flag_C = 0; |
| 32869 | flag_V = 0; |
| 32870 | flag_NotZ = res; |
| 32871 | flag_N = res; |
| 32872 | DREGu8((Opcode >> 9) & 7) = res; |
| 32873 | POST_IO |
| 32874 | RET(10) |
| 32875 | } |
| 32876 | |
| 32877 | // ANDaD |
| 32878 | OPCODE(0xC028) |
| 32879 | { |
| 32880 | u32 adr, res; |
| 32881 | u32 src, dst; |
| 32882 | |
| 32883 | FETCH_SWORD(adr); |
| 32884 | adr += AREG((Opcode >> 0) & 7); |
| 32885 | PRE_IO |
| 32886 | READ_BYTE_F(adr, src) |
| 32887 | res = DREGu8((Opcode >> 9) & 7); |
| 32888 | res &= src; |
| 32889 | flag_C = 0; |
| 32890 | flag_V = 0; |
| 32891 | flag_NotZ = res; |
| 32892 | flag_N = res; |
| 32893 | DREGu8((Opcode >> 9) & 7) = res; |
| 32894 | POST_IO |
| 32895 | RET(12) |
| 32896 | } |
| 32897 | |
| 32898 | // ANDaD |
| 32899 | OPCODE(0xC030) |
| 32900 | { |
| 32901 | u32 adr, res; |
| 32902 | u32 src, dst; |
| 32903 | |
| 32904 | adr = AREG((Opcode >> 0) & 7); |
| 32905 | DECODE_EXT_WORD |
| 32906 | PRE_IO |
| 32907 | READ_BYTE_F(adr, src) |
| 32908 | res = DREGu8((Opcode >> 9) & 7); |
| 32909 | res &= src; |
| 32910 | flag_C = 0; |
| 32911 | flag_V = 0; |
| 32912 | flag_NotZ = res; |
| 32913 | flag_N = res; |
| 32914 | DREGu8((Opcode >> 9) & 7) = res; |
| 32915 | POST_IO |
| 32916 | RET(14) |
| 32917 | } |
| 32918 | |
| 32919 | // ANDaD |
| 32920 | OPCODE(0xC038) |
| 32921 | { |
| 32922 | u32 adr, res; |
| 32923 | u32 src, dst; |
| 32924 | |
| 32925 | FETCH_SWORD(adr); |
| 32926 | PRE_IO |
| 32927 | READ_BYTE_F(adr, src) |
| 32928 | res = DREGu8((Opcode >> 9) & 7); |
| 32929 | res &= src; |
| 32930 | flag_C = 0; |
| 32931 | flag_V = 0; |
| 32932 | flag_NotZ = res; |
| 32933 | flag_N = res; |
| 32934 | DREGu8((Opcode >> 9) & 7) = res; |
| 32935 | POST_IO |
| 32936 | RET(12) |
| 32937 | } |
| 32938 | |
| 32939 | // ANDaD |
| 32940 | OPCODE(0xC039) |
| 32941 | { |
| 32942 | u32 adr, res; |
| 32943 | u32 src, dst; |
| 32944 | |
| 32945 | FETCH_LONG(adr); |
| 32946 | PRE_IO |
| 32947 | READ_BYTE_F(adr, src) |
| 32948 | res = DREGu8((Opcode >> 9) & 7); |
| 32949 | res &= src; |
| 32950 | flag_C = 0; |
| 32951 | flag_V = 0; |
| 32952 | flag_NotZ = res; |
| 32953 | flag_N = res; |
| 32954 | DREGu8((Opcode >> 9) & 7) = res; |
| 32955 | POST_IO |
| 32956 | RET(16) |
| 32957 | } |
| 32958 | |
| 32959 | // ANDaD |
| 32960 | OPCODE(0xC03A) |
| 32961 | { |
| 32962 | u32 adr, res; |
| 32963 | u32 src, dst; |
| 32964 | |
| 32965 | adr = GET_SWORD + GET_PC; |
| 32966 | PC++; |
| 32967 | PRE_IO |
| 32968 | READ_BYTE_F(adr, src) |
| 32969 | res = DREGu8((Opcode >> 9) & 7); |
| 32970 | res &= src; |
| 32971 | flag_C = 0; |
| 32972 | flag_V = 0; |
| 32973 | flag_NotZ = res; |
| 32974 | flag_N = res; |
| 32975 | DREGu8((Opcode >> 9) & 7) = res; |
| 32976 | POST_IO |
| 32977 | RET(12) |
| 32978 | } |
| 32979 | |
| 32980 | // ANDaD |
| 32981 | OPCODE(0xC03B) |
| 32982 | { |
| 32983 | u32 adr, res; |
| 32984 | u32 src, dst; |
| 32985 | |
| 32986 | adr = GET_PC; |
| 32987 | DECODE_EXT_WORD |
| 32988 | PRE_IO |
| 32989 | READ_BYTE_F(adr, src) |
| 32990 | res = DREGu8((Opcode >> 9) & 7); |
| 32991 | res &= src; |
| 32992 | flag_C = 0; |
| 32993 | flag_V = 0; |
| 32994 | flag_NotZ = res; |
| 32995 | flag_N = res; |
| 32996 | DREGu8((Opcode >> 9) & 7) = res; |
| 32997 | POST_IO |
| 32998 | RET(14) |
| 32999 | } |
| 33000 | |
| 33001 | // ANDaD |
| 33002 | OPCODE(0xC03C) |
| 33003 | { |
| 33004 | u32 adr, res; |
| 33005 | u32 src, dst; |
| 33006 | |
| 33007 | FETCH_BYTE(src); |
| 33008 | res = DREGu8((Opcode >> 9) & 7); |
| 33009 | res &= src; |
| 33010 | flag_C = 0; |
| 33011 | flag_V = 0; |
| 33012 | flag_NotZ = res; |
| 33013 | flag_N = res; |
| 33014 | DREGu8((Opcode >> 9) & 7) = res; |
| 33015 | RET(8) |
| 33016 | } |
| 33017 | |
| 33018 | // ANDaD |
| 33019 | OPCODE(0xC01F) |
| 33020 | { |
| 33021 | u32 adr, res; |
| 33022 | u32 src, dst; |
| 33023 | |
| 33024 | adr = AREG(7); |
| 33025 | AREG(7) += 2; |
| 33026 | PRE_IO |
| 33027 | READ_BYTE_F(adr, src) |
| 33028 | res = DREGu8((Opcode >> 9) & 7); |
| 33029 | res &= src; |
| 33030 | flag_C = 0; |
| 33031 | flag_V = 0; |
| 33032 | flag_NotZ = res; |
| 33033 | flag_N = res; |
| 33034 | DREGu8((Opcode >> 9) & 7) = res; |
| 33035 | POST_IO |
| 33036 | RET(8) |
| 33037 | } |
| 33038 | |
| 33039 | // ANDaD |
| 33040 | OPCODE(0xC027) |
| 33041 | { |
| 33042 | u32 adr, res; |
| 33043 | u32 src, dst; |
| 33044 | |
| 33045 | adr = AREG(7) - 2; |
| 33046 | AREG(7) = adr; |
| 33047 | PRE_IO |
| 33048 | READ_BYTE_F(adr, src) |
| 33049 | res = DREGu8((Opcode >> 9) & 7); |
| 33050 | res &= src; |
| 33051 | flag_C = 0; |
| 33052 | flag_V = 0; |
| 33053 | flag_NotZ = res; |
| 33054 | flag_N = res; |
| 33055 | DREGu8((Opcode >> 9) & 7) = res; |
| 33056 | POST_IO |
| 33057 | RET(10) |
| 33058 | } |
| 33059 | |
| 33060 | // ANDaD |
| 33061 | OPCODE(0xC040) |
| 33062 | { |
| 33063 | u32 adr, res; |
| 33064 | u32 src, dst; |
| 33065 | |
| 33066 | src = DREGu16((Opcode >> 0) & 7); |
| 33067 | res = DREGu16((Opcode >> 9) & 7); |
| 33068 | res &= src; |
| 33069 | flag_C = 0; |
| 33070 | flag_V = 0; |
| 33071 | flag_NotZ = res; |
| 33072 | flag_N = res >> 8; |
| 33073 | DREGu16((Opcode >> 9) & 7) = res; |
| 33074 | RET(4) |
| 33075 | } |
| 33076 | |
| 33077 | // ANDaD |
| 33078 | OPCODE(0xC050) |
| 33079 | { |
| 33080 | u32 adr, res; |
| 33081 | u32 src, dst; |
| 33082 | |
| 33083 | adr = AREG((Opcode >> 0) & 7); |
| 33084 | PRE_IO |
| 33085 | READ_WORD_F(adr, src) |
| 33086 | res = DREGu16((Opcode >> 9) & 7); |
| 33087 | res &= src; |
| 33088 | flag_C = 0; |
| 33089 | flag_V = 0; |
| 33090 | flag_NotZ = res; |
| 33091 | flag_N = res >> 8; |
| 33092 | DREGu16((Opcode >> 9) & 7) = res; |
| 33093 | POST_IO |
| 33094 | RET(8) |
| 33095 | } |
| 33096 | |
| 33097 | // ANDaD |
| 33098 | OPCODE(0xC058) |
| 33099 | { |
| 33100 | u32 adr, res; |
| 33101 | u32 src, dst; |
| 33102 | |
| 33103 | adr = AREG((Opcode >> 0) & 7); |
| 33104 | AREG((Opcode >> 0) & 7) += 2; |
| 33105 | PRE_IO |
| 33106 | READ_WORD_F(adr, src) |
| 33107 | res = DREGu16((Opcode >> 9) & 7); |
| 33108 | res &= src; |
| 33109 | flag_C = 0; |
| 33110 | flag_V = 0; |
| 33111 | flag_NotZ = res; |
| 33112 | flag_N = res >> 8; |
| 33113 | DREGu16((Opcode >> 9) & 7) = res; |
| 33114 | POST_IO |
| 33115 | RET(8) |
| 33116 | } |
| 33117 | |
| 33118 | // ANDaD |
| 33119 | OPCODE(0xC060) |
| 33120 | { |
| 33121 | u32 adr, res; |
| 33122 | u32 src, dst; |
| 33123 | |
| 33124 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 33125 | AREG((Opcode >> 0) & 7) = adr; |
| 33126 | PRE_IO |
| 33127 | READ_WORD_F(adr, src) |
| 33128 | res = DREGu16((Opcode >> 9) & 7); |
| 33129 | res &= src; |
| 33130 | flag_C = 0; |
| 33131 | flag_V = 0; |
| 33132 | flag_NotZ = res; |
| 33133 | flag_N = res >> 8; |
| 33134 | DREGu16((Opcode >> 9) & 7) = res; |
| 33135 | POST_IO |
| 33136 | RET(10) |
| 33137 | } |
| 33138 | |
| 33139 | // ANDaD |
| 33140 | OPCODE(0xC068) |
| 33141 | { |
| 33142 | u32 adr, res; |
| 33143 | u32 src, dst; |
| 33144 | |
| 33145 | FETCH_SWORD(adr); |
| 33146 | adr += AREG((Opcode >> 0) & 7); |
| 33147 | PRE_IO |
| 33148 | READ_WORD_F(adr, src) |
| 33149 | res = DREGu16((Opcode >> 9) & 7); |
| 33150 | res &= src; |
| 33151 | flag_C = 0; |
| 33152 | flag_V = 0; |
| 33153 | flag_NotZ = res; |
| 33154 | flag_N = res >> 8; |
| 33155 | DREGu16((Opcode >> 9) & 7) = res; |
| 33156 | POST_IO |
| 33157 | RET(12) |
| 33158 | } |
| 33159 | |
| 33160 | // ANDaD |
| 33161 | OPCODE(0xC070) |
| 33162 | { |
| 33163 | u32 adr, res; |
| 33164 | u32 src, dst; |
| 33165 | |
| 33166 | adr = AREG((Opcode >> 0) & 7); |
| 33167 | DECODE_EXT_WORD |
| 33168 | PRE_IO |
| 33169 | READ_WORD_F(adr, src) |
| 33170 | res = DREGu16((Opcode >> 9) & 7); |
| 33171 | res &= src; |
| 33172 | flag_C = 0; |
| 33173 | flag_V = 0; |
| 33174 | flag_NotZ = res; |
| 33175 | flag_N = res >> 8; |
| 33176 | DREGu16((Opcode >> 9) & 7) = res; |
| 33177 | POST_IO |
| 33178 | RET(14) |
| 33179 | } |
| 33180 | |
| 33181 | // ANDaD |
| 33182 | OPCODE(0xC078) |
| 33183 | { |
| 33184 | u32 adr, res; |
| 33185 | u32 src, dst; |
| 33186 | |
| 33187 | FETCH_SWORD(adr); |
| 33188 | PRE_IO |
| 33189 | READ_WORD_F(adr, src) |
| 33190 | res = DREGu16((Opcode >> 9) & 7); |
| 33191 | res &= src; |
| 33192 | flag_C = 0; |
| 33193 | flag_V = 0; |
| 33194 | flag_NotZ = res; |
| 33195 | flag_N = res >> 8; |
| 33196 | DREGu16((Opcode >> 9) & 7) = res; |
| 33197 | POST_IO |
| 33198 | RET(12) |
| 33199 | } |
| 33200 | |
| 33201 | // ANDaD |
| 33202 | OPCODE(0xC079) |
| 33203 | { |
| 33204 | u32 adr, res; |
| 33205 | u32 src, dst; |
| 33206 | |
| 33207 | FETCH_LONG(adr); |
| 33208 | PRE_IO |
| 33209 | READ_WORD_F(adr, src) |
| 33210 | res = DREGu16((Opcode >> 9) & 7); |
| 33211 | res &= src; |
| 33212 | flag_C = 0; |
| 33213 | flag_V = 0; |
| 33214 | flag_NotZ = res; |
| 33215 | flag_N = res >> 8; |
| 33216 | DREGu16((Opcode >> 9) & 7) = res; |
| 33217 | POST_IO |
| 33218 | RET(16) |
| 33219 | } |
| 33220 | |
| 33221 | // ANDaD |
| 33222 | OPCODE(0xC07A) |
| 33223 | { |
| 33224 | u32 adr, res; |
| 33225 | u32 src, dst; |
| 33226 | |
| 33227 | adr = GET_SWORD + GET_PC; |
| 33228 | PC++; |
| 33229 | PRE_IO |
| 33230 | READ_WORD_F(adr, src) |
| 33231 | res = DREGu16((Opcode >> 9) & 7); |
| 33232 | res &= src; |
| 33233 | flag_C = 0; |
| 33234 | flag_V = 0; |
| 33235 | flag_NotZ = res; |
| 33236 | flag_N = res >> 8; |
| 33237 | DREGu16((Opcode >> 9) & 7) = res; |
| 33238 | POST_IO |
| 33239 | RET(12) |
| 33240 | } |
| 33241 | |
| 33242 | // ANDaD |
| 33243 | OPCODE(0xC07B) |
| 33244 | { |
| 33245 | u32 adr, res; |
| 33246 | u32 src, dst; |
| 33247 | |
| 33248 | adr = GET_PC; |
| 33249 | DECODE_EXT_WORD |
| 33250 | PRE_IO |
| 33251 | READ_WORD_F(adr, src) |
| 33252 | res = DREGu16((Opcode >> 9) & 7); |
| 33253 | res &= src; |
| 33254 | flag_C = 0; |
| 33255 | flag_V = 0; |
| 33256 | flag_NotZ = res; |
| 33257 | flag_N = res >> 8; |
| 33258 | DREGu16((Opcode >> 9) & 7) = res; |
| 33259 | POST_IO |
| 33260 | RET(14) |
| 33261 | } |
| 33262 | |
| 33263 | // ANDaD |
| 33264 | OPCODE(0xC07C) |
| 33265 | { |
| 33266 | u32 adr, res; |
| 33267 | u32 src, dst; |
| 33268 | |
| 33269 | FETCH_WORD(src); |
| 33270 | res = DREGu16((Opcode >> 9) & 7); |
| 33271 | res &= src; |
| 33272 | flag_C = 0; |
| 33273 | flag_V = 0; |
| 33274 | flag_NotZ = res; |
| 33275 | flag_N = res >> 8; |
| 33276 | DREGu16((Opcode >> 9) & 7) = res; |
| 33277 | RET(8) |
| 33278 | } |
| 33279 | |
| 33280 | // ANDaD |
| 33281 | OPCODE(0xC05F) |
| 33282 | { |
| 33283 | u32 adr, res; |
| 33284 | u32 src, dst; |
| 33285 | |
| 33286 | adr = AREG(7); |
| 33287 | AREG(7) += 2; |
| 33288 | PRE_IO |
| 33289 | READ_WORD_F(adr, src) |
| 33290 | res = DREGu16((Opcode >> 9) & 7); |
| 33291 | res &= src; |
| 33292 | flag_C = 0; |
| 33293 | flag_V = 0; |
| 33294 | flag_NotZ = res; |
| 33295 | flag_N = res >> 8; |
| 33296 | DREGu16((Opcode >> 9) & 7) = res; |
| 33297 | POST_IO |
| 33298 | RET(8) |
| 33299 | } |
| 33300 | |
| 33301 | // ANDaD |
| 33302 | OPCODE(0xC067) |
| 33303 | { |
| 33304 | u32 adr, res; |
| 33305 | u32 src, dst; |
| 33306 | |
| 33307 | adr = AREG(7) - 2; |
| 33308 | AREG(7) = adr; |
| 33309 | PRE_IO |
| 33310 | READ_WORD_F(adr, src) |
| 33311 | res = DREGu16((Opcode >> 9) & 7); |
| 33312 | res &= src; |
| 33313 | flag_C = 0; |
| 33314 | flag_V = 0; |
| 33315 | flag_NotZ = res; |
| 33316 | flag_N = res >> 8; |
| 33317 | DREGu16((Opcode >> 9) & 7) = res; |
| 33318 | POST_IO |
| 33319 | RET(10) |
| 33320 | } |
| 33321 | |
| 33322 | // ANDaD |
| 33323 | OPCODE(0xC080) |
| 33324 | { |
| 33325 | u32 adr, res; |
| 33326 | u32 src, dst; |
| 33327 | |
| 33328 | src = DREGu32((Opcode >> 0) & 7); |
| 33329 | res = DREGu32((Opcode >> 9) & 7); |
| 33330 | res &= src; |
| 33331 | flag_C = 0; |
| 33332 | flag_V = 0; |
| 33333 | flag_NotZ = res; |
| 33334 | flag_N = res >> 24; |
| 33335 | DREGu32((Opcode >> 9) & 7) = res; |
| 33336 | RET(8) |
| 33337 | } |
| 33338 | |
| 33339 | // ANDaD |
| 33340 | OPCODE(0xC090) |
| 33341 | { |
| 33342 | u32 adr, res; |
| 33343 | u32 src, dst; |
| 33344 | |
| 33345 | adr = AREG((Opcode >> 0) & 7); |
| 33346 | PRE_IO |
| 33347 | READ_LONG_F(adr, src) |
| 33348 | res = DREGu32((Opcode >> 9) & 7); |
| 33349 | res &= src; |
| 33350 | flag_C = 0; |
| 33351 | flag_V = 0; |
| 33352 | flag_NotZ = res; |
| 33353 | flag_N = res >> 24; |
| 33354 | DREGu32((Opcode >> 9) & 7) = res; |
| 33355 | POST_IO |
| 33356 | RET(14) |
| 33357 | } |
| 33358 | |
| 33359 | // ANDaD |
| 33360 | OPCODE(0xC098) |
| 33361 | { |
| 33362 | u32 adr, res; |
| 33363 | u32 src, dst; |
| 33364 | |
| 33365 | adr = AREG((Opcode >> 0) & 7); |
| 33366 | AREG((Opcode >> 0) & 7) += 4; |
| 33367 | PRE_IO |
| 33368 | READ_LONG_F(adr, src) |
| 33369 | res = DREGu32((Opcode >> 9) & 7); |
| 33370 | res &= src; |
| 33371 | flag_C = 0; |
| 33372 | flag_V = 0; |
| 33373 | flag_NotZ = res; |
| 33374 | flag_N = res >> 24; |
| 33375 | DREGu32((Opcode >> 9) & 7) = res; |
| 33376 | POST_IO |
| 33377 | RET(14) |
| 33378 | } |
| 33379 | |
| 33380 | // ANDaD |
| 33381 | OPCODE(0xC0A0) |
| 33382 | { |
| 33383 | u32 adr, res; |
| 33384 | u32 src, dst; |
| 33385 | |
| 33386 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 33387 | AREG((Opcode >> 0) & 7) = adr; |
| 33388 | PRE_IO |
| 33389 | READ_LONG_F(adr, src) |
| 33390 | res = DREGu32((Opcode >> 9) & 7); |
| 33391 | res &= src; |
| 33392 | flag_C = 0; |
| 33393 | flag_V = 0; |
| 33394 | flag_NotZ = res; |
| 33395 | flag_N = res >> 24; |
| 33396 | DREGu32((Opcode >> 9) & 7) = res; |
| 33397 | POST_IO |
| 33398 | RET(16) |
| 33399 | } |
| 33400 | |
| 33401 | // ANDaD |
| 33402 | OPCODE(0xC0A8) |
| 33403 | { |
| 33404 | u32 adr, res; |
| 33405 | u32 src, dst; |
| 33406 | |
| 33407 | FETCH_SWORD(adr); |
| 33408 | adr += AREG((Opcode >> 0) & 7); |
| 33409 | PRE_IO |
| 33410 | READ_LONG_F(adr, src) |
| 33411 | res = DREGu32((Opcode >> 9) & 7); |
| 33412 | res &= src; |
| 33413 | flag_C = 0; |
| 33414 | flag_V = 0; |
| 33415 | flag_NotZ = res; |
| 33416 | flag_N = res >> 24; |
| 33417 | DREGu32((Opcode >> 9) & 7) = res; |
| 33418 | POST_IO |
| 33419 | RET(18) |
| 33420 | } |
| 33421 | |
| 33422 | // ANDaD |
| 33423 | OPCODE(0xC0B0) |
| 33424 | { |
| 33425 | u32 adr, res; |
| 33426 | u32 src, dst; |
| 33427 | |
| 33428 | adr = AREG((Opcode >> 0) & 7); |
| 33429 | DECODE_EXT_WORD |
| 33430 | PRE_IO |
| 33431 | READ_LONG_F(adr, src) |
| 33432 | res = DREGu32((Opcode >> 9) & 7); |
| 33433 | res &= src; |
| 33434 | flag_C = 0; |
| 33435 | flag_V = 0; |
| 33436 | flag_NotZ = res; |
| 33437 | flag_N = res >> 24; |
| 33438 | DREGu32((Opcode >> 9) & 7) = res; |
| 33439 | POST_IO |
| 33440 | RET(20) |
| 33441 | } |
| 33442 | |
| 33443 | // ANDaD |
| 33444 | OPCODE(0xC0B8) |
| 33445 | { |
| 33446 | u32 adr, res; |
| 33447 | u32 src, dst; |
| 33448 | |
| 33449 | FETCH_SWORD(adr); |
| 33450 | PRE_IO |
| 33451 | READ_LONG_F(adr, src) |
| 33452 | res = DREGu32((Opcode >> 9) & 7); |
| 33453 | res &= src; |
| 33454 | flag_C = 0; |
| 33455 | flag_V = 0; |
| 33456 | flag_NotZ = res; |
| 33457 | flag_N = res >> 24; |
| 33458 | DREGu32((Opcode >> 9) & 7) = res; |
| 33459 | POST_IO |
| 33460 | RET(18) |
| 33461 | } |
| 33462 | |
| 33463 | // ANDaD |
| 33464 | OPCODE(0xC0B9) |
| 33465 | { |
| 33466 | u32 adr, res; |
| 33467 | u32 src, dst; |
| 33468 | |
| 33469 | FETCH_LONG(adr); |
| 33470 | PRE_IO |
| 33471 | READ_LONG_F(adr, src) |
| 33472 | res = DREGu32((Opcode >> 9) & 7); |
| 33473 | res &= src; |
| 33474 | flag_C = 0; |
| 33475 | flag_V = 0; |
| 33476 | flag_NotZ = res; |
| 33477 | flag_N = res >> 24; |
| 33478 | DREGu32((Opcode >> 9) & 7) = res; |
| 33479 | POST_IO |
| 33480 | RET(22) |
| 33481 | } |
| 33482 | |
| 33483 | // ANDaD |
| 33484 | OPCODE(0xC0BA) |
| 33485 | { |
| 33486 | u32 adr, res; |
| 33487 | u32 src, dst; |
| 33488 | |
| 33489 | adr = GET_SWORD + GET_PC; |
| 33490 | PC++; |
| 33491 | PRE_IO |
| 33492 | READ_LONG_F(adr, src) |
| 33493 | res = DREGu32((Opcode >> 9) & 7); |
| 33494 | res &= src; |
| 33495 | flag_C = 0; |
| 33496 | flag_V = 0; |
| 33497 | flag_NotZ = res; |
| 33498 | flag_N = res >> 24; |
| 33499 | DREGu32((Opcode >> 9) & 7) = res; |
| 33500 | POST_IO |
| 33501 | RET(18) |
| 33502 | } |
| 33503 | |
| 33504 | // ANDaD |
| 33505 | OPCODE(0xC0BB) |
| 33506 | { |
| 33507 | u32 adr, res; |
| 33508 | u32 src, dst; |
| 33509 | |
| 33510 | adr = GET_PC; |
| 33511 | DECODE_EXT_WORD |
| 33512 | PRE_IO |
| 33513 | READ_LONG_F(adr, src) |
| 33514 | res = DREGu32((Opcode >> 9) & 7); |
| 33515 | res &= src; |
| 33516 | flag_C = 0; |
| 33517 | flag_V = 0; |
| 33518 | flag_NotZ = res; |
| 33519 | flag_N = res >> 24; |
| 33520 | DREGu32((Opcode >> 9) & 7) = res; |
| 33521 | POST_IO |
| 33522 | RET(20) |
| 33523 | } |
| 33524 | |
| 33525 | // ANDaD |
| 33526 | OPCODE(0xC0BC) |
| 33527 | { |
| 33528 | u32 adr, res; |
| 33529 | u32 src, dst; |
| 33530 | |
| 33531 | FETCH_LONG(src); |
| 33532 | res = DREGu32((Opcode >> 9) & 7); |
| 33533 | res &= src; |
| 33534 | flag_C = 0; |
| 33535 | flag_V = 0; |
| 33536 | flag_NotZ = res; |
| 33537 | flag_N = res >> 24; |
| 33538 | DREGu32((Opcode >> 9) & 7) = res; |
| 33539 | RET(16) |
| 33540 | } |
| 33541 | |
| 33542 | // ANDaD |
| 33543 | OPCODE(0xC09F) |
| 33544 | { |
| 33545 | u32 adr, res; |
| 33546 | u32 src, dst; |
| 33547 | |
| 33548 | adr = AREG(7); |
| 33549 | AREG(7) += 4; |
| 33550 | PRE_IO |
| 33551 | READ_LONG_F(adr, src) |
| 33552 | res = DREGu32((Opcode >> 9) & 7); |
| 33553 | res &= src; |
| 33554 | flag_C = 0; |
| 33555 | flag_V = 0; |
| 33556 | flag_NotZ = res; |
| 33557 | flag_N = res >> 24; |
| 33558 | DREGu32((Opcode >> 9) & 7) = res; |
| 33559 | POST_IO |
| 33560 | RET(14) |
| 33561 | } |
| 33562 | |
| 33563 | // ANDaD |
| 33564 | OPCODE(0xC0A7) |
| 33565 | { |
| 33566 | u32 adr, res; |
| 33567 | u32 src, dst; |
| 33568 | |
| 33569 | adr = AREG(7) - 4; |
| 33570 | AREG(7) = adr; |
| 33571 | PRE_IO |
| 33572 | READ_LONG_F(adr, src) |
| 33573 | res = DREGu32((Opcode >> 9) & 7); |
| 33574 | res &= src; |
| 33575 | flag_C = 0; |
| 33576 | flag_V = 0; |
| 33577 | flag_NotZ = res; |
| 33578 | flag_N = res >> 24; |
| 33579 | DREGu32((Opcode >> 9) & 7) = res; |
| 33580 | POST_IO |
| 33581 | RET(16) |
| 33582 | } |
| 33583 | |
| 33584 | // ANDDa |
| 33585 | OPCODE(0xC110) |
| 33586 | { |
| 33587 | u32 adr, res; |
| 33588 | u32 src, dst; |
| 33589 | |
| 33590 | src = DREGu8((Opcode >> 9) & 7); |
| 33591 | adr = AREG((Opcode >> 0) & 7); |
| 33592 | PRE_IO |
| 33593 | READ_BYTE_F(adr, res) |
| 33594 | res &= src; |
| 33595 | flag_C = 0; |
| 33596 | flag_V = 0; |
| 33597 | flag_NotZ = res; |
| 33598 | flag_N = res; |
| 33599 | WRITE_BYTE_F(adr, res) |
| 33600 | POST_IO |
| 33601 | RET(12) |
| 33602 | } |
| 33603 | |
| 33604 | // ANDDa |
| 33605 | OPCODE(0xC118) |
| 33606 | { |
| 33607 | u32 adr, res; |
| 33608 | u32 src, dst; |
| 33609 | |
| 33610 | src = DREGu8((Opcode >> 9) & 7); |
| 33611 | adr = AREG((Opcode >> 0) & 7); |
| 33612 | AREG((Opcode >> 0) & 7) += 1; |
| 33613 | PRE_IO |
| 33614 | READ_BYTE_F(adr, res) |
| 33615 | res &= src; |
| 33616 | flag_C = 0; |
| 33617 | flag_V = 0; |
| 33618 | flag_NotZ = res; |
| 33619 | flag_N = res; |
| 33620 | WRITE_BYTE_F(adr, res) |
| 33621 | POST_IO |
| 33622 | RET(12) |
| 33623 | } |
| 33624 | |
| 33625 | // ANDDa |
| 33626 | OPCODE(0xC120) |
| 33627 | { |
| 33628 | u32 adr, res; |
| 33629 | u32 src, dst; |
| 33630 | |
| 33631 | src = DREGu8((Opcode >> 9) & 7); |
| 33632 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 33633 | AREG((Opcode >> 0) & 7) = adr; |
| 33634 | PRE_IO |
| 33635 | READ_BYTE_F(adr, res) |
| 33636 | res &= src; |
| 33637 | flag_C = 0; |
| 33638 | flag_V = 0; |
| 33639 | flag_NotZ = res; |
| 33640 | flag_N = res; |
| 33641 | WRITE_BYTE_F(adr, res) |
| 33642 | POST_IO |
| 33643 | RET(14) |
| 33644 | } |
| 33645 | |
| 33646 | // ANDDa |
| 33647 | OPCODE(0xC128) |
| 33648 | { |
| 33649 | u32 adr, res; |
| 33650 | u32 src, dst; |
| 33651 | |
| 33652 | src = DREGu8((Opcode >> 9) & 7); |
| 33653 | FETCH_SWORD(adr); |
| 33654 | adr += AREG((Opcode >> 0) & 7); |
| 33655 | PRE_IO |
| 33656 | READ_BYTE_F(adr, res) |
| 33657 | res &= src; |
| 33658 | flag_C = 0; |
| 33659 | flag_V = 0; |
| 33660 | flag_NotZ = res; |
| 33661 | flag_N = res; |
| 33662 | WRITE_BYTE_F(adr, res) |
| 33663 | POST_IO |
| 33664 | RET(16) |
| 33665 | } |
| 33666 | |
| 33667 | // ANDDa |
| 33668 | OPCODE(0xC130) |
| 33669 | { |
| 33670 | u32 adr, res; |
| 33671 | u32 src, dst; |
| 33672 | |
| 33673 | src = DREGu8((Opcode >> 9) & 7); |
| 33674 | adr = AREG((Opcode >> 0) & 7); |
| 33675 | DECODE_EXT_WORD |
| 33676 | PRE_IO |
| 33677 | READ_BYTE_F(adr, res) |
| 33678 | res &= src; |
| 33679 | flag_C = 0; |
| 33680 | flag_V = 0; |
| 33681 | flag_NotZ = res; |
| 33682 | flag_N = res; |
| 33683 | WRITE_BYTE_F(adr, res) |
| 33684 | POST_IO |
| 33685 | RET(18) |
| 33686 | } |
| 33687 | |
| 33688 | // ANDDa |
| 33689 | OPCODE(0xC138) |
| 33690 | { |
| 33691 | u32 adr, res; |
| 33692 | u32 src, dst; |
| 33693 | |
| 33694 | src = DREGu8((Opcode >> 9) & 7); |
| 33695 | FETCH_SWORD(adr); |
| 33696 | PRE_IO |
| 33697 | READ_BYTE_F(adr, res) |
| 33698 | res &= src; |
| 33699 | flag_C = 0; |
| 33700 | flag_V = 0; |
| 33701 | flag_NotZ = res; |
| 33702 | flag_N = res; |
| 33703 | WRITE_BYTE_F(adr, res) |
| 33704 | POST_IO |
| 33705 | RET(16) |
| 33706 | } |
| 33707 | |
| 33708 | // ANDDa |
| 33709 | OPCODE(0xC139) |
| 33710 | { |
| 33711 | u32 adr, res; |
| 33712 | u32 src, dst; |
| 33713 | |
| 33714 | src = DREGu8((Opcode >> 9) & 7); |
| 33715 | FETCH_LONG(adr); |
| 33716 | PRE_IO |
| 33717 | READ_BYTE_F(adr, res) |
| 33718 | res &= src; |
| 33719 | flag_C = 0; |
| 33720 | flag_V = 0; |
| 33721 | flag_NotZ = res; |
| 33722 | flag_N = res; |
| 33723 | WRITE_BYTE_F(adr, res) |
| 33724 | POST_IO |
| 33725 | RET(20) |
| 33726 | } |
| 33727 | |
| 33728 | // ANDDa |
| 33729 | OPCODE(0xC11F) |
| 33730 | { |
| 33731 | u32 adr, res; |
| 33732 | u32 src, dst; |
| 33733 | |
| 33734 | src = DREGu8((Opcode >> 9) & 7); |
| 33735 | adr = AREG(7); |
| 33736 | AREG(7) += 2; |
| 33737 | PRE_IO |
| 33738 | READ_BYTE_F(adr, res) |
| 33739 | res &= src; |
| 33740 | flag_C = 0; |
| 33741 | flag_V = 0; |
| 33742 | flag_NotZ = res; |
| 33743 | flag_N = res; |
| 33744 | WRITE_BYTE_F(adr, res) |
| 33745 | POST_IO |
| 33746 | RET(12) |
| 33747 | } |
| 33748 | |
| 33749 | // ANDDa |
| 33750 | OPCODE(0xC127) |
| 33751 | { |
| 33752 | u32 adr, res; |
| 33753 | u32 src, dst; |
| 33754 | |
| 33755 | src = DREGu8((Opcode >> 9) & 7); |
| 33756 | adr = AREG(7) - 2; |
| 33757 | AREG(7) = adr; |
| 33758 | PRE_IO |
| 33759 | READ_BYTE_F(adr, res) |
| 33760 | res &= src; |
| 33761 | flag_C = 0; |
| 33762 | flag_V = 0; |
| 33763 | flag_NotZ = res; |
| 33764 | flag_N = res; |
| 33765 | WRITE_BYTE_F(adr, res) |
| 33766 | POST_IO |
| 33767 | RET(14) |
| 33768 | } |
| 33769 | |
| 33770 | // ANDDa |
| 33771 | OPCODE(0xC150) |
| 33772 | { |
| 33773 | u32 adr, res; |
| 33774 | u32 src, dst; |
| 33775 | |
| 33776 | src = DREGu16((Opcode >> 9) & 7); |
| 33777 | adr = AREG((Opcode >> 0) & 7); |
| 33778 | PRE_IO |
| 33779 | READ_WORD_F(adr, res) |
| 33780 | res &= src; |
| 33781 | flag_C = 0; |
| 33782 | flag_V = 0; |
| 33783 | flag_NotZ = res; |
| 33784 | flag_N = res >> 8; |
| 33785 | WRITE_WORD_F(adr, res) |
| 33786 | POST_IO |
| 33787 | RET(12) |
| 33788 | } |
| 33789 | |
| 33790 | // ANDDa |
| 33791 | OPCODE(0xC158) |
| 33792 | { |
| 33793 | u32 adr, res; |
| 33794 | u32 src, dst; |
| 33795 | |
| 33796 | src = DREGu16((Opcode >> 9) & 7); |
| 33797 | adr = AREG((Opcode >> 0) & 7); |
| 33798 | AREG((Opcode >> 0) & 7) += 2; |
| 33799 | PRE_IO |
| 33800 | READ_WORD_F(adr, res) |
| 33801 | res &= src; |
| 33802 | flag_C = 0; |
| 33803 | flag_V = 0; |
| 33804 | flag_NotZ = res; |
| 33805 | flag_N = res >> 8; |
| 33806 | WRITE_WORD_F(adr, res) |
| 33807 | POST_IO |
| 33808 | RET(12) |
| 33809 | } |
| 33810 | |
| 33811 | // ANDDa |
| 33812 | OPCODE(0xC160) |
| 33813 | { |
| 33814 | u32 adr, res; |
| 33815 | u32 src, dst; |
| 33816 | |
| 33817 | src = DREGu16((Opcode >> 9) & 7); |
| 33818 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 33819 | AREG((Opcode >> 0) & 7) = adr; |
| 33820 | PRE_IO |
| 33821 | READ_WORD_F(adr, res) |
| 33822 | res &= src; |
| 33823 | flag_C = 0; |
| 33824 | flag_V = 0; |
| 33825 | flag_NotZ = res; |
| 33826 | flag_N = res >> 8; |
| 33827 | WRITE_WORD_F(adr, res) |
| 33828 | POST_IO |
| 33829 | RET(14) |
| 33830 | } |
| 33831 | |
| 33832 | // ANDDa |
| 33833 | OPCODE(0xC168) |
| 33834 | { |
| 33835 | u32 adr, res; |
| 33836 | u32 src, dst; |
| 33837 | |
| 33838 | src = DREGu16((Opcode >> 9) & 7); |
| 33839 | FETCH_SWORD(adr); |
| 33840 | adr += AREG((Opcode >> 0) & 7); |
| 33841 | PRE_IO |
| 33842 | READ_WORD_F(adr, res) |
| 33843 | res &= src; |
| 33844 | flag_C = 0; |
| 33845 | flag_V = 0; |
| 33846 | flag_NotZ = res; |
| 33847 | flag_N = res >> 8; |
| 33848 | WRITE_WORD_F(adr, res) |
| 33849 | POST_IO |
| 33850 | RET(16) |
| 33851 | } |
| 33852 | |
| 33853 | // ANDDa |
| 33854 | OPCODE(0xC170) |
| 33855 | { |
| 33856 | u32 adr, res; |
| 33857 | u32 src, dst; |
| 33858 | |
| 33859 | src = DREGu16((Opcode >> 9) & 7); |
| 33860 | adr = AREG((Opcode >> 0) & 7); |
| 33861 | DECODE_EXT_WORD |
| 33862 | PRE_IO |
| 33863 | READ_WORD_F(adr, res) |
| 33864 | res &= src; |
| 33865 | flag_C = 0; |
| 33866 | flag_V = 0; |
| 33867 | flag_NotZ = res; |
| 33868 | flag_N = res >> 8; |
| 33869 | WRITE_WORD_F(adr, res) |
| 33870 | POST_IO |
| 33871 | RET(18) |
| 33872 | } |
| 33873 | |
| 33874 | // ANDDa |
| 33875 | OPCODE(0xC178) |
| 33876 | { |
| 33877 | u32 adr, res; |
| 33878 | u32 src, dst; |
| 33879 | |
| 33880 | src = DREGu16((Opcode >> 9) & 7); |
| 33881 | FETCH_SWORD(adr); |
| 33882 | PRE_IO |
| 33883 | READ_WORD_F(adr, res) |
| 33884 | res &= src; |
| 33885 | flag_C = 0; |
| 33886 | flag_V = 0; |
| 33887 | flag_NotZ = res; |
| 33888 | flag_N = res >> 8; |
| 33889 | WRITE_WORD_F(adr, res) |
| 33890 | POST_IO |
| 33891 | RET(16) |
| 33892 | } |
| 33893 | |
| 33894 | // ANDDa |
| 33895 | OPCODE(0xC179) |
| 33896 | { |
| 33897 | u32 adr, res; |
| 33898 | u32 src, dst; |
| 33899 | |
| 33900 | src = DREGu16((Opcode >> 9) & 7); |
| 33901 | FETCH_LONG(adr); |
| 33902 | PRE_IO |
| 33903 | READ_WORD_F(adr, res) |
| 33904 | res &= src; |
| 33905 | flag_C = 0; |
| 33906 | flag_V = 0; |
| 33907 | flag_NotZ = res; |
| 33908 | flag_N = res >> 8; |
| 33909 | WRITE_WORD_F(adr, res) |
| 33910 | POST_IO |
| 33911 | RET(20) |
| 33912 | } |
| 33913 | |
| 33914 | // ANDDa |
| 33915 | OPCODE(0xC15F) |
| 33916 | { |
| 33917 | u32 adr, res; |
| 33918 | u32 src, dst; |
| 33919 | |
| 33920 | src = DREGu16((Opcode >> 9) & 7); |
| 33921 | adr = AREG(7); |
| 33922 | AREG(7) += 2; |
| 33923 | PRE_IO |
| 33924 | READ_WORD_F(adr, res) |
| 33925 | res &= src; |
| 33926 | flag_C = 0; |
| 33927 | flag_V = 0; |
| 33928 | flag_NotZ = res; |
| 33929 | flag_N = res >> 8; |
| 33930 | WRITE_WORD_F(adr, res) |
| 33931 | POST_IO |
| 33932 | RET(12) |
| 33933 | } |
| 33934 | |
| 33935 | // ANDDa |
| 33936 | OPCODE(0xC167) |
| 33937 | { |
| 33938 | u32 adr, res; |
| 33939 | u32 src, dst; |
| 33940 | |
| 33941 | src = DREGu16((Opcode >> 9) & 7); |
| 33942 | adr = AREG(7) - 2; |
| 33943 | AREG(7) = adr; |
| 33944 | PRE_IO |
| 33945 | READ_WORD_F(adr, res) |
| 33946 | res &= src; |
| 33947 | flag_C = 0; |
| 33948 | flag_V = 0; |
| 33949 | flag_NotZ = res; |
| 33950 | flag_N = res >> 8; |
| 33951 | WRITE_WORD_F(adr, res) |
| 33952 | POST_IO |
| 33953 | RET(14) |
| 33954 | } |
| 33955 | |
| 33956 | // ANDDa |
| 33957 | OPCODE(0xC190) |
| 33958 | { |
| 33959 | u32 adr, res; |
| 33960 | u32 src, dst; |
| 33961 | |
| 33962 | src = DREGu32((Opcode >> 9) & 7); |
| 33963 | adr = AREG((Opcode >> 0) & 7); |
| 33964 | PRE_IO |
| 33965 | READ_LONG_F(adr, res) |
| 33966 | res &= src; |
| 33967 | flag_C = 0; |
| 33968 | flag_V = 0; |
| 33969 | flag_NotZ = res; |
| 33970 | flag_N = res >> 24; |
| 33971 | WRITE_LONG_F(adr, res) |
| 33972 | POST_IO |
| 33973 | RET(20) |
| 33974 | } |
| 33975 | |
| 33976 | // ANDDa |
| 33977 | OPCODE(0xC198) |
| 33978 | { |
| 33979 | u32 adr, res; |
| 33980 | u32 src, dst; |
| 33981 | |
| 33982 | src = DREGu32((Opcode >> 9) & 7); |
| 33983 | adr = AREG((Opcode >> 0) & 7); |
| 33984 | AREG((Opcode >> 0) & 7) += 4; |
| 33985 | PRE_IO |
| 33986 | READ_LONG_F(adr, res) |
| 33987 | res &= src; |
| 33988 | flag_C = 0; |
| 33989 | flag_V = 0; |
| 33990 | flag_NotZ = res; |
| 33991 | flag_N = res >> 24; |
| 33992 | WRITE_LONG_F(adr, res) |
| 33993 | POST_IO |
| 33994 | RET(20) |
| 33995 | } |
| 33996 | |
| 33997 | // ANDDa |
| 33998 | OPCODE(0xC1A0) |
| 33999 | { |
| 34000 | u32 adr, res; |
| 34001 | u32 src, dst; |
| 34002 | |
| 34003 | src = DREGu32((Opcode >> 9) & 7); |
| 34004 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 34005 | AREG((Opcode >> 0) & 7) = adr; |
| 34006 | PRE_IO |
| 34007 | READ_LONG_F(adr, res) |
| 34008 | res &= src; |
| 34009 | flag_C = 0; |
| 34010 | flag_V = 0; |
| 34011 | flag_NotZ = res; |
| 34012 | flag_N = res >> 24; |
| 34013 | WRITE_LONG_F(adr, res) |
| 34014 | POST_IO |
| 34015 | RET(22) |
| 34016 | } |
| 34017 | |
| 34018 | // ANDDa |
| 34019 | OPCODE(0xC1A8) |
| 34020 | { |
| 34021 | u32 adr, res; |
| 34022 | u32 src, dst; |
| 34023 | |
| 34024 | src = DREGu32((Opcode >> 9) & 7); |
| 34025 | FETCH_SWORD(adr); |
| 34026 | adr += AREG((Opcode >> 0) & 7); |
| 34027 | PRE_IO |
| 34028 | READ_LONG_F(adr, res) |
| 34029 | res &= src; |
| 34030 | flag_C = 0; |
| 34031 | flag_V = 0; |
| 34032 | flag_NotZ = res; |
| 34033 | flag_N = res >> 24; |
| 34034 | WRITE_LONG_F(adr, res) |
| 34035 | POST_IO |
| 34036 | RET(24) |
| 34037 | } |
| 34038 | |
| 34039 | // ANDDa |
| 34040 | OPCODE(0xC1B0) |
| 34041 | { |
| 34042 | u32 adr, res; |
| 34043 | u32 src, dst; |
| 34044 | |
| 34045 | src = DREGu32((Opcode >> 9) & 7); |
| 34046 | adr = AREG((Opcode >> 0) & 7); |
| 34047 | DECODE_EXT_WORD |
| 34048 | PRE_IO |
| 34049 | READ_LONG_F(adr, res) |
| 34050 | res &= src; |
| 34051 | flag_C = 0; |
| 34052 | flag_V = 0; |
| 34053 | flag_NotZ = res; |
| 34054 | flag_N = res >> 24; |
| 34055 | WRITE_LONG_F(adr, res) |
| 34056 | POST_IO |
| 34057 | RET(26) |
| 34058 | } |
| 34059 | |
| 34060 | // ANDDa |
| 34061 | OPCODE(0xC1B8) |
| 34062 | { |
| 34063 | u32 adr, res; |
| 34064 | u32 src, dst; |
| 34065 | |
| 34066 | src = DREGu32((Opcode >> 9) & 7); |
| 34067 | FETCH_SWORD(adr); |
| 34068 | PRE_IO |
| 34069 | READ_LONG_F(adr, res) |
| 34070 | res &= src; |
| 34071 | flag_C = 0; |
| 34072 | flag_V = 0; |
| 34073 | flag_NotZ = res; |
| 34074 | flag_N = res >> 24; |
| 34075 | WRITE_LONG_F(adr, res) |
| 34076 | POST_IO |
| 34077 | RET(24) |
| 34078 | } |
| 34079 | |
| 34080 | // ANDDa |
| 34081 | OPCODE(0xC1B9) |
| 34082 | { |
| 34083 | u32 adr, res; |
| 34084 | u32 src, dst; |
| 34085 | |
| 34086 | src = DREGu32((Opcode >> 9) & 7); |
| 34087 | FETCH_LONG(adr); |
| 34088 | PRE_IO |
| 34089 | READ_LONG_F(adr, res) |
| 34090 | res &= src; |
| 34091 | flag_C = 0; |
| 34092 | flag_V = 0; |
| 34093 | flag_NotZ = res; |
| 34094 | flag_N = res >> 24; |
| 34095 | WRITE_LONG_F(adr, res) |
| 34096 | POST_IO |
| 34097 | RET(28) |
| 34098 | } |
| 34099 | |
| 34100 | // ANDDa |
| 34101 | OPCODE(0xC19F) |
| 34102 | { |
| 34103 | u32 adr, res; |
| 34104 | u32 src, dst; |
| 34105 | |
| 34106 | src = DREGu32((Opcode >> 9) & 7); |
| 34107 | adr = AREG(7); |
| 34108 | AREG(7) += 4; |
| 34109 | PRE_IO |
| 34110 | READ_LONG_F(adr, res) |
| 34111 | res &= src; |
| 34112 | flag_C = 0; |
| 34113 | flag_V = 0; |
| 34114 | flag_NotZ = res; |
| 34115 | flag_N = res >> 24; |
| 34116 | WRITE_LONG_F(adr, res) |
| 34117 | POST_IO |
| 34118 | RET(20) |
| 34119 | } |
| 34120 | |
| 34121 | // ANDDa |
| 34122 | OPCODE(0xC1A7) |
| 34123 | { |
| 34124 | u32 adr, res; |
| 34125 | u32 src, dst; |
| 34126 | |
| 34127 | src = DREGu32((Opcode >> 9) & 7); |
| 34128 | adr = AREG(7) - 4; |
| 34129 | AREG(7) = adr; |
| 34130 | PRE_IO |
| 34131 | READ_LONG_F(adr, res) |
| 34132 | res &= src; |
| 34133 | flag_C = 0; |
| 34134 | flag_V = 0; |
| 34135 | flag_NotZ = res; |
| 34136 | flag_N = res >> 24; |
| 34137 | WRITE_LONG_F(adr, res) |
| 34138 | POST_IO |
| 34139 | RET(22) |
| 34140 | } |
| 34141 | |
| 34142 | // ABCD |
| 34143 | OPCODE(0xC100) |
| 34144 | { |
| 34145 | u32 adr, res; |
| 34146 | u32 src, dst; |
| 34147 | u32 corf = 0; |
| 34148 | |
| 34149 | src = DREGu8((Opcode >> 0) & 7); |
| 34150 | dst = DREGu8((Opcode >> 9) & 7); |
| 34151 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
| 34152 | if (res > 9) corf = 6; |
| 34153 | res += (dst & 0xF0) + (src & 0xF0); |
| 34154 | flag_V = ~res; |
| 34155 | res += corf; |
| 34156 | if (res > 0x9F) |
| 34157 | { |
| 34158 | res -= 0xA0; |
| 34159 | flag_X = flag_C = M68K_SR_C; |
| 34160 | } |
| 34161 | else flag_X = flag_C = 0; |
| 34162 | flag_V &= res; |
| 34163 | flag_NotZ |= res & 0xFF; |
| 34164 | flag_N = res; |
| 34165 | DREGu8((Opcode >> 9) & 7) = res; |
| 34166 | RET(6) |
| 34167 | } |
| 34168 | |
| 34169 | // ABCDM |
| 34170 | OPCODE(0xC108) |
| 34171 | { |
| 34172 | u32 adr, res; |
| 34173 | u32 src, dst; |
| 34174 | u32 corf = 0; |
| 34175 | |
| 34176 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 34177 | AREG((Opcode >> 0) & 7) = adr; |
| 34178 | PRE_IO |
| 34179 | READ_BYTE_F(adr, src) |
| 34180 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 34181 | AREG((Opcode >> 9) & 7) = adr; |
| 34182 | READ_BYTE_F(adr, dst) |
| 34183 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
| 34184 | if (res > 9) corf = 6; |
| 34185 | res += (dst & 0xF0) + (src & 0xF0); |
| 34186 | flag_V = ~res; |
| 34187 | res += corf; |
| 34188 | if (res > 0x9F) |
| 34189 | { |
| 34190 | res -= 0xA0; |
| 34191 | flag_X = flag_C = M68K_SR_C; |
| 34192 | } |
| 34193 | else flag_X = flag_C = 0; |
| 34194 | flag_V &= res; |
| 34195 | flag_NotZ |= res & 0xFF; |
| 34196 | flag_N = res; |
| 34197 | WRITE_BYTE_F(adr, res) |
| 34198 | POST_IO |
| 34199 | RET(18) |
| 34200 | } |
| 34201 | |
| 34202 | // ABCD7M |
| 34203 | OPCODE(0xC10F) |
| 34204 | { |
| 34205 | u32 adr, res; |
| 34206 | u32 src, dst; |
| 34207 | u32 corf = 0; |
| 34208 | |
| 34209 | adr = AREG(7) - 2; |
| 34210 | AREG(7) = adr; |
| 34211 | PRE_IO |
| 34212 | READ_BYTE_F(adr, src) |
| 34213 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 34214 | AREG((Opcode >> 9) & 7) = adr; |
| 34215 | READ_BYTE_F(adr, dst) |
| 34216 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
| 34217 | if (res > 9) corf = 6; |
| 34218 | res += (dst & 0xF0) + (src & 0xF0); |
| 34219 | flag_V = ~res; |
| 34220 | res += corf; |
| 34221 | if (res > 0x9F) |
| 34222 | { |
| 34223 | res -= 0xA0; |
| 34224 | flag_X = flag_C = M68K_SR_C; |
| 34225 | } |
| 34226 | else flag_X = flag_C = 0; |
| 34227 | flag_V &= res; |
| 34228 | flag_NotZ |= res & 0xFF; |
| 34229 | flag_N = res; |
| 34230 | WRITE_BYTE_F(adr, res) |
| 34231 | POST_IO |
| 34232 | RET(18) |
| 34233 | } |
| 34234 | |
| 34235 | // ABCDM7 |
| 34236 | OPCODE(0xCF08) |
| 34237 | { |
| 34238 | u32 adr, res; |
| 34239 | u32 src, dst; |
| 34240 | u32 corf = 0; |
| 34241 | |
| 34242 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 34243 | AREG((Opcode >> 0) & 7) = adr; |
| 34244 | PRE_IO |
| 34245 | READ_BYTE_F(adr, src) |
| 34246 | adr = AREG(7) - 2; |
| 34247 | AREG(7) = adr; |
| 34248 | READ_BYTE_F(adr, dst) |
| 34249 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
| 34250 | if (res > 9) corf = 6; |
| 34251 | res += (dst & 0xF0) + (src & 0xF0); |
| 34252 | flag_V = ~res; |
| 34253 | res += corf; |
| 34254 | if (res > 0x9F) |
| 34255 | { |
| 34256 | res -= 0xA0; |
| 34257 | flag_X = flag_C = M68K_SR_C; |
| 34258 | } |
| 34259 | else flag_X = flag_C = 0; |
| 34260 | flag_V &= res; |
| 34261 | flag_NotZ |= res & 0xFF; |
| 34262 | flag_N = res; |
| 34263 | WRITE_BYTE_F(adr, res) |
| 34264 | POST_IO |
| 34265 | RET(18) |
| 34266 | } |
| 34267 | |
| 34268 | // ABCD7M7 |
| 34269 | OPCODE(0xCF0F) |
| 34270 | { |
| 34271 | u32 adr, res; |
| 34272 | u32 src, dst; |
| 34273 | u32 corf = 0; |
| 34274 | |
| 34275 | adr = AREG(7) - 2; |
| 34276 | AREG(7) = adr; |
| 34277 | PRE_IO |
| 34278 | READ_BYTE_F(adr, src) |
| 34279 | adr = AREG(7) - 2; |
| 34280 | AREG(7) = adr; |
| 34281 | READ_BYTE_F(adr, dst) |
| 34282 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
| 34283 | if (res > 9) corf = 6; |
| 34284 | res += (dst & 0xF0) + (src & 0xF0); |
| 34285 | flag_V = ~res; |
| 34286 | res += corf; |
| 34287 | if (res > 0x9F) |
| 34288 | { |
| 34289 | res -= 0xA0; |
| 34290 | flag_X = flag_C = M68K_SR_C; |
| 34291 | } |
| 34292 | else flag_X = flag_C = 0; |
| 34293 | flag_V &= res; |
| 34294 | flag_NotZ |= res & 0xFF; |
| 34295 | flag_N = res; |
| 34296 | WRITE_BYTE_F(adr, res) |
| 34297 | POST_IO |
| 34298 | RET(18) |
| 34299 | } |
| 34300 | |
| 34301 | // MULU |
| 34302 | OPCODE(0xC0C0) |
| 34303 | { |
| 34304 | u32 adr, res; |
| 34305 | u32 src, dst; |
| 34306 | |
| 34307 | src = DREGu16((Opcode >> 0) & 7); |
| 34308 | res = DREGu16((Opcode >> 9) & 7); |
| 34309 | res *= src; |
| 34310 | flag_N = res >> 24; |
| 34311 | flag_NotZ = res; |
| 34312 | flag_V = flag_C = 0; |
| 34313 | DREGu32((Opcode >> 9) & 7) = res; |
| 34314 | #ifdef USE_CYCLONE_TIMING |
| 34315 | RET(54) |
| 34316 | #else |
| 34317 | RET(50) |
| 34318 | #endif |
| 34319 | } |
| 34320 | |
| 34321 | // MULU |
| 34322 | OPCODE(0xC0D0) |
| 34323 | { |
| 34324 | u32 adr, res; |
| 34325 | u32 src, dst; |
| 34326 | |
| 34327 | adr = AREG((Opcode >> 0) & 7); |
| 34328 | PRE_IO |
| 34329 | READ_WORD_F(adr, src) |
| 34330 | res = DREGu16((Opcode >> 9) & 7); |
| 34331 | res *= src; |
| 34332 | flag_N = res >> 24; |
| 34333 | flag_NotZ = res; |
| 34334 | flag_V = flag_C = 0; |
| 34335 | DREGu32((Opcode >> 9) & 7) = res; |
| 34336 | POST_IO |
| 34337 | #ifdef USE_CYCLONE_TIMING |
| 34338 | RET(58) |
| 34339 | #else |
| 34340 | RET(54) |
| 34341 | #endif |
| 34342 | } |
| 34343 | |
| 34344 | // MULU |
| 34345 | OPCODE(0xC0D8) |
| 34346 | { |
| 34347 | u32 adr, res; |
| 34348 | u32 src, dst; |
| 34349 | |
| 34350 | adr = AREG((Opcode >> 0) & 7); |
| 34351 | AREG((Opcode >> 0) & 7) += 2; |
| 34352 | PRE_IO |
| 34353 | READ_WORD_F(adr, src) |
| 34354 | res = DREGu16((Opcode >> 9) & 7); |
| 34355 | res *= src; |
| 34356 | flag_N = res >> 24; |
| 34357 | flag_NotZ = res; |
| 34358 | flag_V = flag_C = 0; |
| 34359 | DREGu32((Opcode >> 9) & 7) = res; |
| 34360 | POST_IO |
| 34361 | #ifdef USE_CYCLONE_TIMING |
| 34362 | RET(58) |
| 34363 | #else |
| 34364 | RET(54) |
| 34365 | #endif |
| 34366 | } |
| 34367 | |
| 34368 | // MULU |
| 34369 | OPCODE(0xC0E0) |
| 34370 | { |
| 34371 | u32 adr, res; |
| 34372 | u32 src, dst; |
| 34373 | |
| 34374 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 34375 | AREG((Opcode >> 0) & 7) = adr; |
| 34376 | PRE_IO |
| 34377 | READ_WORD_F(adr, src) |
| 34378 | res = DREGu16((Opcode >> 9) & 7); |
| 34379 | res *= src; |
| 34380 | flag_N = res >> 24; |
| 34381 | flag_NotZ = res; |
| 34382 | flag_V = flag_C = 0; |
| 34383 | DREGu32((Opcode >> 9) & 7) = res; |
| 34384 | POST_IO |
| 34385 | #ifdef USE_CYCLONE_TIMING |
| 34386 | RET(60) |
| 34387 | #else |
| 34388 | RET(56) |
| 34389 | #endif |
| 34390 | } |
| 34391 | |
| 34392 | // MULU |
| 34393 | OPCODE(0xC0E8) |
| 34394 | { |
| 34395 | u32 adr, res; |
| 34396 | u32 src, dst; |
| 34397 | |
| 34398 | FETCH_SWORD(adr); |
| 34399 | adr += AREG((Opcode >> 0) & 7); |
| 34400 | PRE_IO |
| 34401 | READ_WORD_F(adr, src) |
| 34402 | res = DREGu16((Opcode >> 9) & 7); |
| 34403 | res *= src; |
| 34404 | flag_N = res >> 24; |
| 34405 | flag_NotZ = res; |
| 34406 | flag_V = flag_C = 0; |
| 34407 | DREGu32((Opcode >> 9) & 7) = res; |
| 34408 | POST_IO |
| 34409 | #ifdef USE_CYCLONE_TIMING |
| 34410 | RET(62) |
| 34411 | #else |
| 34412 | RET(58) |
| 34413 | #endif |
| 34414 | } |
| 34415 | |
| 34416 | // MULU |
| 34417 | OPCODE(0xC0F0) |
| 34418 | { |
| 34419 | u32 adr, res; |
| 34420 | u32 src, dst; |
| 34421 | |
| 34422 | adr = AREG((Opcode >> 0) & 7); |
| 34423 | DECODE_EXT_WORD |
| 34424 | PRE_IO |
| 34425 | READ_WORD_F(adr, src) |
| 34426 | res = DREGu16((Opcode >> 9) & 7); |
| 34427 | res *= src; |
| 34428 | flag_N = res >> 24; |
| 34429 | flag_NotZ = res; |
| 34430 | flag_V = flag_C = 0; |
| 34431 | DREGu32((Opcode >> 9) & 7) = res; |
| 34432 | POST_IO |
| 34433 | #ifdef USE_CYCLONE_TIMING |
| 34434 | RET(64) |
| 34435 | #else |
| 34436 | RET(60) |
| 34437 | #endif |
| 34438 | } |
| 34439 | |
| 34440 | // MULU |
| 34441 | OPCODE(0xC0F8) |
| 34442 | { |
| 34443 | u32 adr, res; |
| 34444 | u32 src, dst; |
| 34445 | |
| 34446 | FETCH_SWORD(adr); |
| 34447 | PRE_IO |
| 34448 | READ_WORD_F(adr, src) |
| 34449 | res = DREGu16((Opcode >> 9) & 7); |
| 34450 | res *= src; |
| 34451 | flag_N = res >> 24; |
| 34452 | flag_NotZ = res; |
| 34453 | flag_V = flag_C = 0; |
| 34454 | DREGu32((Opcode >> 9) & 7) = res; |
| 34455 | POST_IO |
| 34456 | #ifdef USE_CYCLONE_TIMING |
| 34457 | RET(62) |
| 34458 | #else |
| 34459 | RET(58) |
| 34460 | #endif |
| 34461 | } |
| 34462 | |
| 34463 | // MULU |
| 34464 | OPCODE(0xC0F9) |
| 34465 | { |
| 34466 | u32 adr, res; |
| 34467 | u32 src, dst; |
| 34468 | |
| 34469 | FETCH_LONG(adr); |
| 34470 | PRE_IO |
| 34471 | READ_WORD_F(adr, src) |
| 34472 | res = DREGu16((Opcode >> 9) & 7); |
| 34473 | res *= src; |
| 34474 | flag_N = res >> 24; |
| 34475 | flag_NotZ = res; |
| 34476 | flag_V = flag_C = 0; |
| 34477 | DREGu32((Opcode >> 9) & 7) = res; |
| 34478 | POST_IO |
| 34479 | #ifdef USE_CYCLONE_TIMING |
| 34480 | RET(66) |
| 34481 | #else |
| 34482 | RET(62) |
| 34483 | #endif |
| 34484 | } |
| 34485 | |
| 34486 | // MULU |
| 34487 | OPCODE(0xC0FA) |
| 34488 | { |
| 34489 | u32 adr, res; |
| 34490 | u32 src, dst; |
| 34491 | |
| 34492 | adr = GET_SWORD + GET_PC; |
| 34493 | PC++; |
| 34494 | PRE_IO |
| 34495 | READ_WORD_F(adr, src) |
| 34496 | res = DREGu16((Opcode >> 9) & 7); |
| 34497 | res *= src; |
| 34498 | flag_N = res >> 24; |
| 34499 | flag_NotZ = res; |
| 34500 | flag_V = flag_C = 0; |
| 34501 | DREGu32((Opcode >> 9) & 7) = res; |
| 34502 | POST_IO |
| 34503 | #ifdef USE_CYCLONE_TIMING |
| 34504 | RET(62) |
| 34505 | #else |
| 34506 | RET(58) |
| 34507 | #endif |
| 34508 | } |
| 34509 | |
| 34510 | // MULU |
| 34511 | OPCODE(0xC0FB) |
| 34512 | { |
| 34513 | u32 adr, res; |
| 34514 | u32 src, dst; |
| 34515 | |
| 34516 | adr = GET_PC; |
| 34517 | DECODE_EXT_WORD |
| 34518 | PRE_IO |
| 34519 | READ_WORD_F(adr, src) |
| 34520 | res = DREGu16((Opcode >> 9) & 7); |
| 34521 | res *= src; |
| 34522 | flag_N = res >> 24; |
| 34523 | flag_NotZ = res; |
| 34524 | flag_V = flag_C = 0; |
| 34525 | DREGu32((Opcode >> 9) & 7) = res; |
| 34526 | POST_IO |
| 34527 | #ifdef USE_CYCLONE_TIMING |
| 34528 | RET(64) |
| 34529 | #else |
| 34530 | RET(60) |
| 34531 | #endif |
| 34532 | } |
| 34533 | |
| 34534 | // MULU |
| 34535 | OPCODE(0xC0FC) |
| 34536 | { |
| 34537 | u32 adr, res; |
| 34538 | u32 src, dst; |
| 34539 | |
| 34540 | FETCH_WORD(src); |
| 34541 | res = DREGu16((Opcode >> 9) & 7); |
| 34542 | res *= src; |
| 34543 | flag_N = res >> 24; |
| 34544 | flag_NotZ = res; |
| 34545 | flag_V = flag_C = 0; |
| 34546 | DREGu32((Opcode >> 9) & 7) = res; |
| 34547 | #ifdef USE_CYCLONE_TIMING |
| 34548 | RET(58) |
| 34549 | #else |
| 34550 | RET(54) |
| 34551 | #endif |
| 34552 | } |
| 34553 | |
| 34554 | // MULU |
| 34555 | OPCODE(0xC0DF) |
| 34556 | { |
| 34557 | u32 adr, res; |
| 34558 | u32 src, dst; |
| 34559 | |
| 34560 | adr = AREG(7); |
| 34561 | AREG(7) += 2; |
| 34562 | PRE_IO |
| 34563 | READ_WORD_F(adr, src) |
| 34564 | res = DREGu16((Opcode >> 9) & 7); |
| 34565 | res *= src; |
| 34566 | flag_N = res >> 24; |
| 34567 | flag_NotZ = res; |
| 34568 | flag_V = flag_C = 0; |
| 34569 | DREGu32((Opcode >> 9) & 7) = res; |
| 34570 | POST_IO |
| 34571 | #ifdef USE_CYCLONE_TIMING |
| 34572 | RET(58) |
| 34573 | #else |
| 34574 | RET(54) |
| 34575 | #endif |
| 34576 | } |
| 34577 | |
| 34578 | // MULU |
| 34579 | OPCODE(0xC0E7) |
| 34580 | { |
| 34581 | u32 adr, res; |
| 34582 | u32 src, dst; |
| 34583 | |
| 34584 | adr = AREG(7) - 2; |
| 34585 | AREG(7) = adr; |
| 34586 | PRE_IO |
| 34587 | READ_WORD_F(adr, src) |
| 34588 | res = DREGu16((Opcode >> 9) & 7); |
| 34589 | res *= src; |
| 34590 | flag_N = res >> 24; |
| 34591 | flag_NotZ = res; |
| 34592 | flag_V = flag_C = 0; |
| 34593 | DREGu32((Opcode >> 9) & 7) = res; |
| 34594 | POST_IO |
| 34595 | #ifdef USE_CYCLONE_TIMING |
| 34596 | RET(60) |
| 34597 | #else |
| 34598 | RET(56) |
| 34599 | #endif |
| 34600 | } |
| 34601 | |
| 34602 | // MULS |
| 34603 | OPCODE(0xC1C0) |
| 34604 | { |
| 34605 | u32 adr, res; |
| 34606 | u32 src, dst; |
| 34607 | |
| 34608 | src = (s32)DREGs16((Opcode >> 0) & 7); |
| 34609 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34610 | res = ((s32)res) * ((s32)src); |
| 34611 | flag_N = res >> 24; |
| 34612 | flag_NotZ = res; |
| 34613 | flag_V = flag_C = 0; |
| 34614 | DREGu32((Opcode >> 9) & 7) = res; |
| 34615 | #ifdef USE_CYCLONE_TIMING |
| 34616 | RET(54) |
| 34617 | #else |
| 34618 | RET(50) |
| 34619 | #endif |
| 34620 | } |
| 34621 | |
| 34622 | // MULS |
| 34623 | OPCODE(0xC1D0) |
| 34624 | { |
| 34625 | u32 adr, res; |
| 34626 | u32 src, dst; |
| 34627 | |
| 34628 | adr = AREG((Opcode >> 0) & 7); |
| 34629 | PRE_IO |
| 34630 | READSX_WORD_F(adr, src) |
| 34631 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34632 | res = ((s32)res) * ((s32)src); |
| 34633 | flag_N = res >> 24; |
| 34634 | flag_NotZ = res; |
| 34635 | flag_V = flag_C = 0; |
| 34636 | DREGu32((Opcode >> 9) & 7) = res; |
| 34637 | POST_IO |
| 34638 | #ifdef USE_CYCLONE_TIMING |
| 34639 | RET(58) |
| 34640 | #else |
| 34641 | RET(54) |
| 34642 | #endif |
| 34643 | } |
| 34644 | |
| 34645 | // MULS |
| 34646 | OPCODE(0xC1D8) |
| 34647 | { |
| 34648 | u32 adr, res; |
| 34649 | u32 src, dst; |
| 34650 | |
| 34651 | adr = AREG((Opcode >> 0) & 7); |
| 34652 | AREG((Opcode >> 0) & 7) += 2; |
| 34653 | PRE_IO |
| 34654 | READSX_WORD_F(adr, src) |
| 34655 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34656 | res = ((s32)res) * ((s32)src); |
| 34657 | flag_N = res >> 24; |
| 34658 | flag_NotZ = res; |
| 34659 | flag_V = flag_C = 0; |
| 34660 | DREGu32((Opcode >> 9) & 7) = res; |
| 34661 | POST_IO |
| 34662 | #ifdef USE_CYCLONE_TIMING |
| 34663 | RET(58) |
| 34664 | #else |
| 34665 | RET(54) |
| 34666 | #endif |
| 34667 | } |
| 34668 | |
| 34669 | // MULS |
| 34670 | OPCODE(0xC1E0) |
| 34671 | { |
| 34672 | u32 adr, res; |
| 34673 | u32 src, dst; |
| 34674 | |
| 34675 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 34676 | AREG((Opcode >> 0) & 7) = adr; |
| 34677 | PRE_IO |
| 34678 | READSX_WORD_F(adr, src) |
| 34679 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34680 | res = ((s32)res) * ((s32)src); |
| 34681 | flag_N = res >> 24; |
| 34682 | flag_NotZ = res; |
| 34683 | flag_V = flag_C = 0; |
| 34684 | DREGu32((Opcode >> 9) & 7) = res; |
| 34685 | POST_IO |
| 34686 | #ifdef USE_CYCLONE_TIMING |
| 34687 | RET(60) |
| 34688 | #else |
| 34689 | RET(56) |
| 34690 | #endif |
| 34691 | } |
| 34692 | |
| 34693 | // MULS |
| 34694 | OPCODE(0xC1E8) |
| 34695 | { |
| 34696 | u32 adr, res; |
| 34697 | u32 src, dst; |
| 34698 | |
| 34699 | FETCH_SWORD(adr); |
| 34700 | adr += AREG((Opcode >> 0) & 7); |
| 34701 | PRE_IO |
| 34702 | READSX_WORD_F(adr, src) |
| 34703 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34704 | res = ((s32)res) * ((s32)src); |
| 34705 | flag_N = res >> 24; |
| 34706 | flag_NotZ = res; |
| 34707 | flag_V = flag_C = 0; |
| 34708 | DREGu32((Opcode >> 9) & 7) = res; |
| 34709 | POST_IO |
| 34710 | #ifdef USE_CYCLONE_TIMING |
| 34711 | RET(62) |
| 34712 | #else |
| 34713 | RET(58) |
| 34714 | #endif |
| 34715 | } |
| 34716 | |
| 34717 | // MULS |
| 34718 | OPCODE(0xC1F0) |
| 34719 | { |
| 34720 | u32 adr, res; |
| 34721 | u32 src, dst; |
| 34722 | |
| 34723 | adr = AREG((Opcode >> 0) & 7); |
| 34724 | DECODE_EXT_WORD |
| 34725 | PRE_IO |
| 34726 | READSX_WORD_F(adr, src) |
| 34727 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34728 | res = ((s32)res) * ((s32)src); |
| 34729 | flag_N = res >> 24; |
| 34730 | flag_NotZ = res; |
| 34731 | flag_V = flag_C = 0; |
| 34732 | DREGu32((Opcode >> 9) & 7) = res; |
| 34733 | POST_IO |
| 34734 | #ifdef USE_CYCLONE_TIMING |
| 34735 | RET(64) |
| 34736 | #else |
| 34737 | RET(60) |
| 34738 | #endif |
| 34739 | } |
| 34740 | |
| 34741 | // MULS |
| 34742 | OPCODE(0xC1F8) |
| 34743 | { |
| 34744 | u32 adr, res; |
| 34745 | u32 src, dst; |
| 34746 | |
| 34747 | FETCH_SWORD(adr); |
| 34748 | PRE_IO |
| 34749 | READSX_WORD_F(adr, src) |
| 34750 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34751 | res = ((s32)res) * ((s32)src); |
| 34752 | flag_N = res >> 24; |
| 34753 | flag_NotZ = res; |
| 34754 | flag_V = flag_C = 0; |
| 34755 | DREGu32((Opcode >> 9) & 7) = res; |
| 34756 | POST_IO |
| 34757 | #ifdef USE_CYCLONE_TIMING |
| 34758 | RET(62) |
| 34759 | #else |
| 34760 | RET(58) |
| 34761 | #endif |
| 34762 | } |
| 34763 | |
| 34764 | // MULS |
| 34765 | OPCODE(0xC1F9) |
| 34766 | { |
| 34767 | u32 adr, res; |
| 34768 | u32 src, dst; |
| 34769 | |
| 34770 | FETCH_LONG(adr); |
| 34771 | PRE_IO |
| 34772 | READSX_WORD_F(adr, src) |
| 34773 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34774 | res = ((s32)res) * ((s32)src); |
| 34775 | flag_N = res >> 24; |
| 34776 | flag_NotZ = res; |
| 34777 | flag_V = flag_C = 0; |
| 34778 | DREGu32((Opcode >> 9) & 7) = res; |
| 34779 | POST_IO |
| 34780 | #ifdef USE_CYCLONE_TIMING |
| 34781 | RET(66) |
| 34782 | #else |
| 34783 | RET(62) |
| 34784 | #endif |
| 34785 | } |
| 34786 | |
| 34787 | // MULS |
| 34788 | OPCODE(0xC1FA) |
| 34789 | { |
| 34790 | u32 adr, res; |
| 34791 | u32 src, dst; |
| 34792 | |
| 34793 | adr = GET_SWORD + GET_PC; |
| 34794 | PC++; |
| 34795 | PRE_IO |
| 34796 | READSX_WORD_F(adr, src) |
| 34797 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34798 | res = ((s32)res) * ((s32)src); |
| 34799 | flag_N = res >> 24; |
| 34800 | flag_NotZ = res; |
| 34801 | flag_V = flag_C = 0; |
| 34802 | DREGu32((Opcode >> 9) & 7) = res; |
| 34803 | POST_IO |
| 34804 | #ifdef USE_CYCLONE_TIMING |
| 34805 | RET(62) |
| 34806 | #else |
| 34807 | RET(58) |
| 34808 | #endif |
| 34809 | } |
| 34810 | |
| 34811 | // MULS |
| 34812 | OPCODE(0xC1FB) |
| 34813 | { |
| 34814 | u32 adr, res; |
| 34815 | u32 src, dst; |
| 34816 | |
| 34817 | adr = GET_PC; |
| 34818 | DECODE_EXT_WORD |
| 34819 | PRE_IO |
| 34820 | READSX_WORD_F(adr, src) |
| 34821 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34822 | res = ((s32)res) * ((s32)src); |
| 34823 | flag_N = res >> 24; |
| 34824 | flag_NotZ = res; |
| 34825 | flag_V = flag_C = 0; |
| 34826 | DREGu32((Opcode >> 9) & 7) = res; |
| 34827 | POST_IO |
| 34828 | #ifdef USE_CYCLONE_TIMING |
| 34829 | RET(64) |
| 34830 | #else |
| 34831 | RET(60) |
| 34832 | #endif |
| 34833 | } |
| 34834 | |
| 34835 | // MULS |
| 34836 | OPCODE(0xC1FC) |
| 34837 | { |
| 34838 | u32 adr, res; |
| 34839 | u32 src, dst; |
| 34840 | |
| 34841 | FETCH_SWORD(src); |
| 34842 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34843 | res = ((s32)res) * ((s32)src); |
| 34844 | flag_N = res >> 24; |
| 34845 | flag_NotZ = res; |
| 34846 | flag_V = flag_C = 0; |
| 34847 | DREGu32((Opcode >> 9) & 7) = res; |
| 34848 | #ifdef USE_CYCLONE_TIMING |
| 34849 | RET(58) |
| 34850 | #else |
| 34851 | RET(54) |
| 34852 | #endif |
| 34853 | } |
| 34854 | |
| 34855 | // MULS |
| 34856 | OPCODE(0xC1DF) |
| 34857 | { |
| 34858 | u32 adr, res; |
| 34859 | u32 src, dst; |
| 34860 | |
| 34861 | adr = AREG(7); |
| 34862 | AREG(7) += 2; |
| 34863 | PRE_IO |
| 34864 | READSX_WORD_F(adr, src) |
| 34865 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34866 | res = ((s32)res) * ((s32)src); |
| 34867 | flag_N = res >> 24; |
| 34868 | flag_NotZ = res; |
| 34869 | flag_V = flag_C = 0; |
| 34870 | DREGu32((Opcode >> 9) & 7) = res; |
| 34871 | POST_IO |
| 34872 | #ifdef USE_CYCLONE_TIMING |
| 34873 | RET(58) |
| 34874 | #else |
| 34875 | RET(54) |
| 34876 | #endif |
| 34877 | } |
| 34878 | |
| 34879 | // MULS |
| 34880 | OPCODE(0xC1E7) |
| 34881 | { |
| 34882 | u32 adr, res; |
| 34883 | u32 src, dst; |
| 34884 | |
| 34885 | adr = AREG(7) - 2; |
| 34886 | AREG(7) = adr; |
| 34887 | PRE_IO |
| 34888 | READSX_WORD_F(adr, src) |
| 34889 | res = (s32)DREGs16((Opcode >> 9) & 7); |
| 34890 | res = ((s32)res) * ((s32)src); |
| 34891 | flag_N = res >> 24; |
| 34892 | flag_NotZ = res; |
| 34893 | flag_V = flag_C = 0; |
| 34894 | DREGu32((Opcode >> 9) & 7) = res; |
| 34895 | POST_IO |
| 34896 | #ifdef USE_CYCLONE_TIMING |
| 34897 | RET(60) |
| 34898 | #else |
| 34899 | RET(56) |
| 34900 | #endif |
| 34901 | } |
| 34902 | |
| 34903 | // EXGDD |
| 34904 | OPCODE(0xC140) |
| 34905 | { |
| 34906 | u32 adr, res; |
| 34907 | u32 src, dst; |
| 34908 | |
| 34909 | res = DREGu32((Opcode >> 0) & 7); |
| 34910 | src = DREGu32((Opcode >> 9) & 7); |
| 34911 | DREGu32((Opcode >> 9) & 7) = res; |
| 34912 | res = src; |
| 34913 | DREGu32((Opcode >> 0) & 7) = res; |
| 34914 | RET(6) |
| 34915 | } |
| 34916 | |
| 34917 | // EXGAA |
| 34918 | OPCODE(0xC148) |
| 34919 | { |
| 34920 | u32 adr, res; |
| 34921 | u32 src, dst; |
| 34922 | |
| 34923 | res = AREGu32((Opcode >> 0) & 7); |
| 34924 | src = AREGu32((Opcode >> 9) & 7); |
| 34925 | AREG((Opcode >> 9) & 7) = res; |
| 34926 | res = src; |
| 34927 | AREG((Opcode >> 0) & 7) = res; |
| 34928 | RET(6) |
| 34929 | } |
| 34930 | |
| 34931 | // EXGAD |
| 34932 | OPCODE(0xC188) |
| 34933 | { |
| 34934 | u32 adr, res; |
| 34935 | u32 src, dst; |
| 34936 | |
| 34937 | res = AREGu32((Opcode >> 0) & 7); |
| 34938 | src = DREGu32((Opcode >> 9) & 7); |
| 34939 | DREGu32((Opcode >> 9) & 7) = res; |
| 34940 | res = src; |
| 34941 | AREG((Opcode >> 0) & 7) = res; |
| 34942 | RET(6) |
| 34943 | } |
| 34944 | |
| 34945 | // ADDaD |
| 34946 | OPCODE(0xD000) |
| 34947 | { |
| 34948 | u32 adr, res; |
| 34949 | u32 src, dst; |
| 34950 | |
| 34951 | src = DREGu8((Opcode >> 0) & 7); |
| 34952 | dst = DREGu8((Opcode >> 9) & 7); |
| 34953 | res = dst + src; |
| 34954 | flag_N = flag_X = flag_C = res; |
| 34955 | flag_V = (src ^ res) & (dst ^ res); |
| 34956 | flag_NotZ = res & 0xFF; |
| 34957 | DREGu8((Opcode >> 9) & 7) = res; |
| 34958 | RET(4) |
| 34959 | } |
| 34960 | |
| 34961 | // ADDaD |
| 34962 | #if 0 |
| 34963 | OPCODE(0xD008) |
| 34964 | { |
| 34965 | u32 adr, res; |
| 34966 | u32 src, dst; |
| 34967 | |
| 34968 | // can't read byte from Ax registers ! |
| 34969 | m68kcontext.execinfo |= M68K_FAULTED; |
| 34970 | m68kcontext.io_cycle_counter = 0; |
| 34971 | /* |
| 34972 | goto famec_Exec_End; |
| 34973 | dst = DREGu8((Opcode >> 9) & 7); |
| 34974 | res = dst + src; |
| 34975 | flag_N = flag_X = flag_C = res; |
| 34976 | flag_V = (src ^ res) & (dst ^ res); |
| 34977 | flag_NotZ = res & 0xFF; |
| 34978 | DREGu8((Opcode >> 9) & 7) = res; |
| 34979 | */ |
| 34980 | RET(4) |
| 34981 | } |
| 34982 | #endif |
| 34983 | |
| 34984 | // ADDaD |
| 34985 | OPCODE(0xD010) |
| 34986 | { |
| 34987 | u32 adr, res; |
| 34988 | u32 src, dst; |
| 34989 | |
| 34990 | adr = AREG((Opcode >> 0) & 7); |
| 34991 | PRE_IO |
| 34992 | READ_BYTE_F(adr, src) |
| 34993 | dst = DREGu8((Opcode >> 9) & 7); |
| 34994 | res = dst + src; |
| 34995 | flag_N = flag_X = flag_C = res; |
| 34996 | flag_V = (src ^ res) & (dst ^ res); |
| 34997 | flag_NotZ = res & 0xFF; |
| 34998 | DREGu8((Opcode >> 9) & 7) = res; |
| 34999 | POST_IO |
| 35000 | RET(8) |
| 35001 | } |
| 35002 | |
| 35003 | // ADDaD |
| 35004 | OPCODE(0xD018) |
| 35005 | { |
| 35006 | u32 adr, res; |
| 35007 | u32 src, dst; |
| 35008 | |
| 35009 | adr = AREG((Opcode >> 0) & 7); |
| 35010 | AREG((Opcode >> 0) & 7) += 1; |
| 35011 | PRE_IO |
| 35012 | READ_BYTE_F(adr, src) |
| 35013 | dst = DREGu8((Opcode >> 9) & 7); |
| 35014 | res = dst + src; |
| 35015 | flag_N = flag_X = flag_C = res; |
| 35016 | flag_V = (src ^ res) & (dst ^ res); |
| 35017 | flag_NotZ = res & 0xFF; |
| 35018 | DREGu8((Opcode >> 9) & 7) = res; |
| 35019 | POST_IO |
| 35020 | RET(8) |
| 35021 | } |
| 35022 | |
| 35023 | // ADDaD |
| 35024 | OPCODE(0xD020) |
| 35025 | { |
| 35026 | u32 adr, res; |
| 35027 | u32 src, dst; |
| 35028 | |
| 35029 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 35030 | AREG((Opcode >> 0) & 7) = adr; |
| 35031 | PRE_IO |
| 35032 | READ_BYTE_F(adr, src) |
| 35033 | dst = DREGu8((Opcode >> 9) & 7); |
| 35034 | res = dst + src; |
| 35035 | flag_N = flag_X = flag_C = res; |
| 35036 | flag_V = (src ^ res) & (dst ^ res); |
| 35037 | flag_NotZ = res & 0xFF; |
| 35038 | DREGu8((Opcode >> 9) & 7) = res; |
| 35039 | POST_IO |
| 35040 | RET(10) |
| 35041 | } |
| 35042 | |
| 35043 | // ADDaD |
| 35044 | OPCODE(0xD028) |
| 35045 | { |
| 35046 | u32 adr, res; |
| 35047 | u32 src, dst; |
| 35048 | |
| 35049 | FETCH_SWORD(adr); |
| 35050 | adr += AREG((Opcode >> 0) & 7); |
| 35051 | PRE_IO |
| 35052 | READ_BYTE_F(adr, src) |
| 35053 | dst = DREGu8((Opcode >> 9) & 7); |
| 35054 | res = dst + src; |
| 35055 | flag_N = flag_X = flag_C = res; |
| 35056 | flag_V = (src ^ res) & (dst ^ res); |
| 35057 | flag_NotZ = res & 0xFF; |
| 35058 | DREGu8((Opcode >> 9) & 7) = res; |
| 35059 | POST_IO |
| 35060 | RET(12) |
| 35061 | } |
| 35062 | |
| 35063 | // ADDaD |
| 35064 | OPCODE(0xD030) |
| 35065 | { |
| 35066 | u32 adr, res; |
| 35067 | u32 src, dst; |
| 35068 | |
| 35069 | adr = AREG((Opcode >> 0) & 7); |
| 35070 | DECODE_EXT_WORD |
| 35071 | PRE_IO |
| 35072 | READ_BYTE_F(adr, src) |
| 35073 | dst = DREGu8((Opcode >> 9) & 7); |
| 35074 | res = dst + src; |
| 35075 | flag_N = flag_X = flag_C = res; |
| 35076 | flag_V = (src ^ res) & (dst ^ res); |
| 35077 | flag_NotZ = res & 0xFF; |
| 35078 | DREGu8((Opcode >> 9) & 7) = res; |
| 35079 | POST_IO |
| 35080 | RET(14) |
| 35081 | } |
| 35082 | |
| 35083 | // ADDaD |
| 35084 | OPCODE(0xD038) |
| 35085 | { |
| 35086 | u32 adr, res; |
| 35087 | u32 src, dst; |
| 35088 | |
| 35089 | FETCH_SWORD(adr); |
| 35090 | PRE_IO |
| 35091 | READ_BYTE_F(adr, src) |
| 35092 | dst = DREGu8((Opcode >> 9) & 7); |
| 35093 | res = dst + src; |
| 35094 | flag_N = flag_X = flag_C = res; |
| 35095 | flag_V = (src ^ res) & (dst ^ res); |
| 35096 | flag_NotZ = res & 0xFF; |
| 35097 | DREGu8((Opcode >> 9) & 7) = res; |
| 35098 | POST_IO |
| 35099 | RET(12) |
| 35100 | } |
| 35101 | |
| 35102 | // ADDaD |
| 35103 | OPCODE(0xD039) |
| 35104 | { |
| 35105 | u32 adr, res; |
| 35106 | u32 src, dst; |
| 35107 | |
| 35108 | FETCH_LONG(adr); |
| 35109 | PRE_IO |
| 35110 | READ_BYTE_F(adr, src) |
| 35111 | dst = DREGu8((Opcode >> 9) & 7); |
| 35112 | res = dst + src; |
| 35113 | flag_N = flag_X = flag_C = res; |
| 35114 | flag_V = (src ^ res) & (dst ^ res); |
| 35115 | flag_NotZ = res & 0xFF; |
| 35116 | DREGu8((Opcode >> 9) & 7) = res; |
| 35117 | POST_IO |
| 35118 | RET(16) |
| 35119 | } |
| 35120 | |
| 35121 | // ADDaD |
| 35122 | OPCODE(0xD03A) |
| 35123 | { |
| 35124 | u32 adr, res; |
| 35125 | u32 src, dst; |
| 35126 | |
| 35127 | adr = GET_SWORD + GET_PC; |
| 35128 | PC++; |
| 35129 | PRE_IO |
| 35130 | READ_BYTE_F(adr, src) |
| 35131 | dst = DREGu8((Opcode >> 9) & 7); |
| 35132 | res = dst + src; |
| 35133 | flag_N = flag_X = flag_C = res; |
| 35134 | flag_V = (src ^ res) & (dst ^ res); |
| 35135 | flag_NotZ = res & 0xFF; |
| 35136 | DREGu8((Opcode >> 9) & 7) = res; |
| 35137 | POST_IO |
| 35138 | RET(12) |
| 35139 | } |
| 35140 | |
| 35141 | // ADDaD |
| 35142 | OPCODE(0xD03B) |
| 35143 | { |
| 35144 | u32 adr, res; |
| 35145 | u32 src, dst; |
| 35146 | |
| 35147 | adr = GET_PC; |
| 35148 | DECODE_EXT_WORD |
| 35149 | PRE_IO |
| 35150 | READ_BYTE_F(adr, src) |
| 35151 | dst = DREGu8((Opcode >> 9) & 7); |
| 35152 | res = dst + src; |
| 35153 | flag_N = flag_X = flag_C = res; |
| 35154 | flag_V = (src ^ res) & (dst ^ res); |
| 35155 | flag_NotZ = res & 0xFF; |
| 35156 | DREGu8((Opcode >> 9) & 7) = res; |
| 35157 | POST_IO |
| 35158 | RET(14) |
| 35159 | } |
| 35160 | |
| 35161 | // ADDaD |
| 35162 | OPCODE(0xD03C) |
| 35163 | { |
| 35164 | u32 adr, res; |
| 35165 | u32 src, dst; |
| 35166 | |
| 35167 | FETCH_BYTE(src); |
| 35168 | dst = DREGu8((Opcode >> 9) & 7); |
| 35169 | res = dst + src; |
| 35170 | flag_N = flag_X = flag_C = res; |
| 35171 | flag_V = (src ^ res) & (dst ^ res); |
| 35172 | flag_NotZ = res & 0xFF; |
| 35173 | DREGu8((Opcode >> 9) & 7) = res; |
| 35174 | RET(8) |
| 35175 | } |
| 35176 | |
| 35177 | // ADDaD |
| 35178 | OPCODE(0xD01F) |
| 35179 | { |
| 35180 | u32 adr, res; |
| 35181 | u32 src, dst; |
| 35182 | |
| 35183 | adr = AREG(7); |
| 35184 | AREG(7) += 2; |
| 35185 | PRE_IO |
| 35186 | READ_BYTE_F(adr, src) |
| 35187 | dst = DREGu8((Opcode >> 9) & 7); |
| 35188 | res = dst + src; |
| 35189 | flag_N = flag_X = flag_C = res; |
| 35190 | flag_V = (src ^ res) & (dst ^ res); |
| 35191 | flag_NotZ = res & 0xFF; |
| 35192 | DREGu8((Opcode >> 9) & 7) = res; |
| 35193 | POST_IO |
| 35194 | RET(8) |
| 35195 | } |
| 35196 | |
| 35197 | // ADDaD |
| 35198 | OPCODE(0xD027) |
| 35199 | { |
| 35200 | u32 adr, res; |
| 35201 | u32 src, dst; |
| 35202 | |
| 35203 | adr = AREG(7) - 2; |
| 35204 | AREG(7) = adr; |
| 35205 | PRE_IO |
| 35206 | READ_BYTE_F(adr, src) |
| 35207 | dst = DREGu8((Opcode >> 9) & 7); |
| 35208 | res = dst + src; |
| 35209 | flag_N = flag_X = flag_C = res; |
| 35210 | flag_V = (src ^ res) & (dst ^ res); |
| 35211 | flag_NotZ = res & 0xFF; |
| 35212 | DREGu8((Opcode >> 9) & 7) = res; |
| 35213 | POST_IO |
| 35214 | RET(10) |
| 35215 | } |
| 35216 | |
| 35217 | // ADDaD |
| 35218 | OPCODE(0xD040) |
| 35219 | { |
| 35220 | u32 adr, res; |
| 35221 | u32 src, dst; |
| 35222 | |
| 35223 | src = DREGu16((Opcode >> 0) & 7); |
| 35224 | dst = DREGu16((Opcode >> 9) & 7); |
| 35225 | res = dst + src; |
| 35226 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35227 | flag_N = flag_X = flag_C = res >> 8; |
| 35228 | flag_NotZ = res & 0xFFFF; |
| 35229 | DREGu16((Opcode >> 9) & 7) = res; |
| 35230 | RET(4) |
| 35231 | } |
| 35232 | |
| 35233 | // ADDaD |
| 35234 | OPCODE(0xD048) |
| 35235 | { |
| 35236 | u32 adr, res; |
| 35237 | u32 src, dst; |
| 35238 | |
| 35239 | src = AREGu16((Opcode >> 0) & 7); |
| 35240 | dst = DREGu16((Opcode >> 9) & 7); |
| 35241 | res = dst + src; |
| 35242 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35243 | flag_N = flag_X = flag_C = res >> 8; |
| 35244 | flag_NotZ = res & 0xFFFF; |
| 35245 | DREGu16((Opcode >> 9) & 7) = res; |
| 35246 | RET(4) |
| 35247 | } |
| 35248 | |
| 35249 | // ADDaD |
| 35250 | OPCODE(0xD050) |
| 35251 | { |
| 35252 | u32 adr, res; |
| 35253 | u32 src, dst; |
| 35254 | |
| 35255 | adr = AREG((Opcode >> 0) & 7); |
| 35256 | PRE_IO |
| 35257 | READ_WORD_F(adr, src) |
| 35258 | dst = DREGu16((Opcode >> 9) & 7); |
| 35259 | res = dst + src; |
| 35260 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35261 | flag_N = flag_X = flag_C = res >> 8; |
| 35262 | flag_NotZ = res & 0xFFFF; |
| 35263 | DREGu16((Opcode >> 9) & 7) = res; |
| 35264 | POST_IO |
| 35265 | RET(8) |
| 35266 | } |
| 35267 | |
| 35268 | // ADDaD |
| 35269 | OPCODE(0xD058) |
| 35270 | { |
| 35271 | u32 adr, res; |
| 35272 | u32 src, dst; |
| 35273 | |
| 35274 | adr = AREG((Opcode >> 0) & 7); |
| 35275 | AREG((Opcode >> 0) & 7) += 2; |
| 35276 | PRE_IO |
| 35277 | READ_WORD_F(adr, src) |
| 35278 | dst = DREGu16((Opcode >> 9) & 7); |
| 35279 | res = dst + src; |
| 35280 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35281 | flag_N = flag_X = flag_C = res >> 8; |
| 35282 | flag_NotZ = res & 0xFFFF; |
| 35283 | DREGu16((Opcode >> 9) & 7) = res; |
| 35284 | POST_IO |
| 35285 | RET(8) |
| 35286 | } |
| 35287 | |
| 35288 | // ADDaD |
| 35289 | OPCODE(0xD060) |
| 35290 | { |
| 35291 | u32 adr, res; |
| 35292 | u32 src, dst; |
| 35293 | |
| 35294 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 35295 | AREG((Opcode >> 0) & 7) = adr; |
| 35296 | PRE_IO |
| 35297 | READ_WORD_F(adr, src) |
| 35298 | dst = DREGu16((Opcode >> 9) & 7); |
| 35299 | res = dst + src; |
| 35300 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35301 | flag_N = flag_X = flag_C = res >> 8; |
| 35302 | flag_NotZ = res & 0xFFFF; |
| 35303 | DREGu16((Opcode >> 9) & 7) = res; |
| 35304 | POST_IO |
| 35305 | RET(10) |
| 35306 | } |
| 35307 | |
| 35308 | // ADDaD |
| 35309 | OPCODE(0xD068) |
| 35310 | { |
| 35311 | u32 adr, res; |
| 35312 | u32 src, dst; |
| 35313 | |
| 35314 | FETCH_SWORD(adr); |
| 35315 | adr += AREG((Opcode >> 0) & 7); |
| 35316 | PRE_IO |
| 35317 | READ_WORD_F(adr, src) |
| 35318 | dst = DREGu16((Opcode >> 9) & 7); |
| 35319 | res = dst + src; |
| 35320 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35321 | flag_N = flag_X = flag_C = res >> 8; |
| 35322 | flag_NotZ = res & 0xFFFF; |
| 35323 | DREGu16((Opcode >> 9) & 7) = res; |
| 35324 | POST_IO |
| 35325 | RET(12) |
| 35326 | } |
| 35327 | |
| 35328 | // ADDaD |
| 35329 | OPCODE(0xD070) |
| 35330 | { |
| 35331 | u32 adr, res; |
| 35332 | u32 src, dst; |
| 35333 | |
| 35334 | adr = AREG((Opcode >> 0) & 7); |
| 35335 | DECODE_EXT_WORD |
| 35336 | PRE_IO |
| 35337 | READ_WORD_F(adr, src) |
| 35338 | dst = DREGu16((Opcode >> 9) & 7); |
| 35339 | res = dst + src; |
| 35340 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35341 | flag_N = flag_X = flag_C = res >> 8; |
| 35342 | flag_NotZ = res & 0xFFFF; |
| 35343 | DREGu16((Opcode >> 9) & 7) = res; |
| 35344 | POST_IO |
| 35345 | RET(14) |
| 35346 | } |
| 35347 | |
| 35348 | // ADDaD |
| 35349 | OPCODE(0xD078) |
| 35350 | { |
| 35351 | u32 adr, res; |
| 35352 | u32 src, dst; |
| 35353 | |
| 35354 | FETCH_SWORD(adr); |
| 35355 | PRE_IO |
| 35356 | READ_WORD_F(adr, src) |
| 35357 | dst = DREGu16((Opcode >> 9) & 7); |
| 35358 | res = dst + src; |
| 35359 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35360 | flag_N = flag_X = flag_C = res >> 8; |
| 35361 | flag_NotZ = res & 0xFFFF; |
| 35362 | DREGu16((Opcode >> 9) & 7) = res; |
| 35363 | POST_IO |
| 35364 | RET(12) |
| 35365 | } |
| 35366 | |
| 35367 | // ADDaD |
| 35368 | OPCODE(0xD079) |
| 35369 | { |
| 35370 | u32 adr, res; |
| 35371 | u32 src, dst; |
| 35372 | |
| 35373 | FETCH_LONG(adr); |
| 35374 | PRE_IO |
| 35375 | READ_WORD_F(adr, src) |
| 35376 | dst = DREGu16((Opcode >> 9) & 7); |
| 35377 | res = dst + src; |
| 35378 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35379 | flag_N = flag_X = flag_C = res >> 8; |
| 35380 | flag_NotZ = res & 0xFFFF; |
| 35381 | DREGu16((Opcode >> 9) & 7) = res; |
| 35382 | POST_IO |
| 35383 | RET(16) |
| 35384 | } |
| 35385 | |
| 35386 | // ADDaD |
| 35387 | OPCODE(0xD07A) |
| 35388 | { |
| 35389 | u32 adr, res; |
| 35390 | u32 src, dst; |
| 35391 | |
| 35392 | adr = GET_SWORD + GET_PC; |
| 35393 | PC++; |
| 35394 | PRE_IO |
| 35395 | READ_WORD_F(adr, src) |
| 35396 | dst = DREGu16((Opcode >> 9) & 7); |
| 35397 | res = dst + src; |
| 35398 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35399 | flag_N = flag_X = flag_C = res >> 8; |
| 35400 | flag_NotZ = res & 0xFFFF; |
| 35401 | DREGu16((Opcode >> 9) & 7) = res; |
| 35402 | POST_IO |
| 35403 | RET(12) |
| 35404 | } |
| 35405 | |
| 35406 | // ADDaD |
| 35407 | OPCODE(0xD07B) |
| 35408 | { |
| 35409 | u32 adr, res; |
| 35410 | u32 src, dst; |
| 35411 | |
| 35412 | adr = GET_PC; |
| 35413 | DECODE_EXT_WORD |
| 35414 | PRE_IO |
| 35415 | READ_WORD_F(adr, src) |
| 35416 | dst = DREGu16((Opcode >> 9) & 7); |
| 35417 | res = dst + src; |
| 35418 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35419 | flag_N = flag_X = flag_C = res >> 8; |
| 35420 | flag_NotZ = res & 0xFFFF; |
| 35421 | DREGu16((Opcode >> 9) & 7) = res; |
| 35422 | POST_IO |
| 35423 | RET(14) |
| 35424 | } |
| 35425 | |
| 35426 | // ADDaD |
| 35427 | OPCODE(0xD07C) |
| 35428 | { |
| 35429 | u32 adr, res; |
| 35430 | u32 src, dst; |
| 35431 | |
| 35432 | FETCH_WORD(src); |
| 35433 | dst = DREGu16((Opcode >> 9) & 7); |
| 35434 | res = dst + src; |
| 35435 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35436 | flag_N = flag_X = flag_C = res >> 8; |
| 35437 | flag_NotZ = res & 0xFFFF; |
| 35438 | DREGu16((Opcode >> 9) & 7) = res; |
| 35439 | RET(8) |
| 35440 | } |
| 35441 | |
| 35442 | // ADDaD |
| 35443 | OPCODE(0xD05F) |
| 35444 | { |
| 35445 | u32 adr, res; |
| 35446 | u32 src, dst; |
| 35447 | |
| 35448 | adr = AREG(7); |
| 35449 | AREG(7) += 2; |
| 35450 | PRE_IO |
| 35451 | READ_WORD_F(adr, src) |
| 35452 | dst = DREGu16((Opcode >> 9) & 7); |
| 35453 | res = dst + src; |
| 35454 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35455 | flag_N = flag_X = flag_C = res >> 8; |
| 35456 | flag_NotZ = res & 0xFFFF; |
| 35457 | DREGu16((Opcode >> 9) & 7) = res; |
| 35458 | POST_IO |
| 35459 | RET(8) |
| 35460 | } |
| 35461 | |
| 35462 | // ADDaD |
| 35463 | OPCODE(0xD067) |
| 35464 | { |
| 35465 | u32 adr, res; |
| 35466 | u32 src, dst; |
| 35467 | |
| 35468 | adr = AREG(7) - 2; |
| 35469 | AREG(7) = adr; |
| 35470 | PRE_IO |
| 35471 | READ_WORD_F(adr, src) |
| 35472 | dst = DREGu16((Opcode >> 9) & 7); |
| 35473 | res = dst + src; |
| 35474 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35475 | flag_N = flag_X = flag_C = res >> 8; |
| 35476 | flag_NotZ = res & 0xFFFF; |
| 35477 | DREGu16((Opcode >> 9) & 7) = res; |
| 35478 | POST_IO |
| 35479 | RET(10) |
| 35480 | } |
| 35481 | |
| 35482 | // ADDaD |
| 35483 | OPCODE(0xD080) |
| 35484 | { |
| 35485 | u32 adr, res; |
| 35486 | u32 src, dst; |
| 35487 | |
| 35488 | src = DREGu32((Opcode >> 0) & 7); |
| 35489 | dst = DREGu32((Opcode >> 9) & 7); |
| 35490 | res = dst + src; |
| 35491 | flag_NotZ = res; |
| 35492 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35493 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35494 | flag_N = res >> 24; |
| 35495 | DREGu32((Opcode >> 9) & 7) = res; |
| 35496 | RET(8) |
| 35497 | } |
| 35498 | |
| 35499 | // ADDaD |
| 35500 | OPCODE(0xD088) |
| 35501 | { |
| 35502 | u32 adr, res; |
| 35503 | u32 src, dst; |
| 35504 | |
| 35505 | src = AREGu32((Opcode >> 0) & 7); |
| 35506 | dst = DREGu32((Opcode >> 9) & 7); |
| 35507 | res = dst + src; |
| 35508 | flag_NotZ = res; |
| 35509 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35510 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35511 | flag_N = res >> 24; |
| 35512 | DREGu32((Opcode >> 9) & 7) = res; |
| 35513 | RET(8) |
| 35514 | } |
| 35515 | |
| 35516 | // ADDaD |
| 35517 | OPCODE(0xD090) |
| 35518 | { |
| 35519 | u32 adr, res; |
| 35520 | u32 src, dst; |
| 35521 | |
| 35522 | adr = AREG((Opcode >> 0) & 7); |
| 35523 | PRE_IO |
| 35524 | READ_LONG_F(adr, src) |
| 35525 | dst = DREGu32((Opcode >> 9) & 7); |
| 35526 | res = dst + src; |
| 35527 | flag_NotZ = res; |
| 35528 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35529 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35530 | flag_N = res >> 24; |
| 35531 | DREGu32((Opcode >> 9) & 7) = res; |
| 35532 | POST_IO |
| 35533 | RET(14) |
| 35534 | } |
| 35535 | |
| 35536 | // ADDaD |
| 35537 | OPCODE(0xD098) |
| 35538 | { |
| 35539 | u32 adr, res; |
| 35540 | u32 src, dst; |
| 35541 | |
| 35542 | adr = AREG((Opcode >> 0) & 7); |
| 35543 | AREG((Opcode >> 0) & 7) += 4; |
| 35544 | PRE_IO |
| 35545 | READ_LONG_F(adr, src) |
| 35546 | dst = DREGu32((Opcode >> 9) & 7); |
| 35547 | res = dst + src; |
| 35548 | flag_NotZ = res; |
| 35549 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35550 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35551 | flag_N = res >> 24; |
| 35552 | DREGu32((Opcode >> 9) & 7) = res; |
| 35553 | POST_IO |
| 35554 | RET(14) |
| 35555 | } |
| 35556 | |
| 35557 | // ADDaD |
| 35558 | OPCODE(0xD0A0) |
| 35559 | { |
| 35560 | u32 adr, res; |
| 35561 | u32 src, dst; |
| 35562 | |
| 35563 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 35564 | AREG((Opcode >> 0) & 7) = adr; |
| 35565 | PRE_IO |
| 35566 | READ_LONG_F(adr, src) |
| 35567 | dst = DREGu32((Opcode >> 9) & 7); |
| 35568 | res = dst + src; |
| 35569 | flag_NotZ = res; |
| 35570 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35571 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35572 | flag_N = res >> 24; |
| 35573 | DREGu32((Opcode >> 9) & 7) = res; |
| 35574 | POST_IO |
| 35575 | RET(16) |
| 35576 | } |
| 35577 | |
| 35578 | // ADDaD |
| 35579 | OPCODE(0xD0A8) |
| 35580 | { |
| 35581 | u32 adr, res; |
| 35582 | u32 src, dst; |
| 35583 | |
| 35584 | FETCH_SWORD(adr); |
| 35585 | adr += AREG((Opcode >> 0) & 7); |
| 35586 | PRE_IO |
| 35587 | READ_LONG_F(adr, src) |
| 35588 | dst = DREGu32((Opcode >> 9) & 7); |
| 35589 | res = dst + src; |
| 35590 | flag_NotZ = res; |
| 35591 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35592 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35593 | flag_N = res >> 24; |
| 35594 | DREGu32((Opcode >> 9) & 7) = res; |
| 35595 | POST_IO |
| 35596 | RET(18) |
| 35597 | } |
| 35598 | |
| 35599 | // ADDaD |
| 35600 | OPCODE(0xD0B0) |
| 35601 | { |
| 35602 | u32 adr, res; |
| 35603 | u32 src, dst; |
| 35604 | |
| 35605 | adr = AREG((Opcode >> 0) & 7); |
| 35606 | DECODE_EXT_WORD |
| 35607 | PRE_IO |
| 35608 | READ_LONG_F(adr, src) |
| 35609 | dst = DREGu32((Opcode >> 9) & 7); |
| 35610 | res = dst + src; |
| 35611 | flag_NotZ = res; |
| 35612 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35613 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35614 | flag_N = res >> 24; |
| 35615 | DREGu32((Opcode >> 9) & 7) = res; |
| 35616 | POST_IO |
| 35617 | RET(20) |
| 35618 | } |
| 35619 | |
| 35620 | // ADDaD |
| 35621 | OPCODE(0xD0B8) |
| 35622 | { |
| 35623 | u32 adr, res; |
| 35624 | u32 src, dst; |
| 35625 | |
| 35626 | FETCH_SWORD(adr); |
| 35627 | PRE_IO |
| 35628 | READ_LONG_F(adr, src) |
| 35629 | dst = DREGu32((Opcode >> 9) & 7); |
| 35630 | res = dst + src; |
| 35631 | flag_NotZ = res; |
| 35632 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35633 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35634 | flag_N = res >> 24; |
| 35635 | DREGu32((Opcode >> 9) & 7) = res; |
| 35636 | POST_IO |
| 35637 | RET(18) |
| 35638 | } |
| 35639 | |
| 35640 | // ADDaD |
| 35641 | OPCODE(0xD0B9) |
| 35642 | { |
| 35643 | u32 adr, res; |
| 35644 | u32 src, dst; |
| 35645 | |
| 35646 | FETCH_LONG(adr); |
| 35647 | PRE_IO |
| 35648 | READ_LONG_F(adr, src) |
| 35649 | dst = DREGu32((Opcode >> 9) & 7); |
| 35650 | res = dst + src; |
| 35651 | flag_NotZ = res; |
| 35652 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35653 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35654 | flag_N = res >> 24; |
| 35655 | DREGu32((Opcode >> 9) & 7) = res; |
| 35656 | POST_IO |
| 35657 | RET(22) |
| 35658 | } |
| 35659 | |
| 35660 | // ADDaD |
| 35661 | OPCODE(0xD0BA) |
| 35662 | { |
| 35663 | u32 adr, res; |
| 35664 | u32 src, dst; |
| 35665 | |
| 35666 | adr = GET_SWORD + GET_PC; |
| 35667 | PC++; |
| 35668 | PRE_IO |
| 35669 | READ_LONG_F(adr, src) |
| 35670 | dst = DREGu32((Opcode >> 9) & 7); |
| 35671 | res = dst + src; |
| 35672 | flag_NotZ = res; |
| 35673 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35674 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35675 | flag_N = res >> 24; |
| 35676 | DREGu32((Opcode >> 9) & 7) = res; |
| 35677 | POST_IO |
| 35678 | RET(18) |
| 35679 | } |
| 35680 | |
| 35681 | // ADDaD |
| 35682 | OPCODE(0xD0BB) |
| 35683 | { |
| 35684 | u32 adr, res; |
| 35685 | u32 src, dst; |
| 35686 | |
| 35687 | adr = GET_PC; |
| 35688 | DECODE_EXT_WORD |
| 35689 | PRE_IO |
| 35690 | READ_LONG_F(adr, src) |
| 35691 | dst = DREGu32((Opcode >> 9) & 7); |
| 35692 | res = dst + src; |
| 35693 | flag_NotZ = res; |
| 35694 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35695 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35696 | flag_N = res >> 24; |
| 35697 | DREGu32((Opcode >> 9) & 7) = res; |
| 35698 | POST_IO |
| 35699 | RET(20) |
| 35700 | } |
| 35701 | |
| 35702 | // ADDaD |
| 35703 | OPCODE(0xD0BC) |
| 35704 | { |
| 35705 | u32 adr, res; |
| 35706 | u32 src, dst; |
| 35707 | |
| 35708 | FETCH_LONG(src); |
| 35709 | dst = DREGu32((Opcode >> 9) & 7); |
| 35710 | res = dst + src; |
| 35711 | flag_NotZ = res; |
| 35712 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35713 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35714 | flag_N = res >> 24; |
| 35715 | DREGu32((Opcode >> 9) & 7) = res; |
| 35716 | RET(16) |
| 35717 | } |
| 35718 | |
| 35719 | // ADDaD |
| 35720 | OPCODE(0xD09F) |
| 35721 | { |
| 35722 | u32 adr, res; |
| 35723 | u32 src, dst; |
| 35724 | |
| 35725 | adr = AREG(7); |
| 35726 | AREG(7) += 4; |
| 35727 | PRE_IO |
| 35728 | READ_LONG_F(adr, src) |
| 35729 | dst = DREGu32((Opcode >> 9) & 7); |
| 35730 | res = dst + src; |
| 35731 | flag_NotZ = res; |
| 35732 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35733 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35734 | flag_N = res >> 24; |
| 35735 | DREGu32((Opcode >> 9) & 7) = res; |
| 35736 | POST_IO |
| 35737 | RET(14) |
| 35738 | } |
| 35739 | |
| 35740 | // ADDaD |
| 35741 | OPCODE(0xD0A7) |
| 35742 | { |
| 35743 | u32 adr, res; |
| 35744 | u32 src, dst; |
| 35745 | |
| 35746 | adr = AREG(7) - 4; |
| 35747 | AREG(7) = adr; |
| 35748 | PRE_IO |
| 35749 | READ_LONG_F(adr, src) |
| 35750 | dst = DREGu32((Opcode >> 9) & 7); |
| 35751 | res = dst + src; |
| 35752 | flag_NotZ = res; |
| 35753 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 35754 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 35755 | flag_N = res >> 24; |
| 35756 | DREGu32((Opcode >> 9) & 7) = res; |
| 35757 | POST_IO |
| 35758 | RET(16) |
| 35759 | } |
| 35760 | |
| 35761 | // ADDDa |
| 35762 | OPCODE(0xD110) |
| 35763 | { |
| 35764 | u32 adr, res; |
| 35765 | u32 src, dst; |
| 35766 | |
| 35767 | src = DREGu8((Opcode >> 9) & 7); |
| 35768 | adr = AREG((Opcode >> 0) & 7); |
| 35769 | PRE_IO |
| 35770 | READ_BYTE_F(adr, dst) |
| 35771 | res = dst + src; |
| 35772 | flag_N = flag_X = flag_C = res; |
| 35773 | flag_V = (src ^ res) & (dst ^ res); |
| 35774 | flag_NotZ = res & 0xFF; |
| 35775 | WRITE_BYTE_F(adr, res) |
| 35776 | POST_IO |
| 35777 | RET(12) |
| 35778 | } |
| 35779 | |
| 35780 | // ADDDa |
| 35781 | OPCODE(0xD118) |
| 35782 | { |
| 35783 | u32 adr, res; |
| 35784 | u32 src, dst; |
| 35785 | |
| 35786 | src = DREGu8((Opcode >> 9) & 7); |
| 35787 | adr = AREG((Opcode >> 0) & 7); |
| 35788 | AREG((Opcode >> 0) & 7) += 1; |
| 35789 | PRE_IO |
| 35790 | READ_BYTE_F(adr, dst) |
| 35791 | res = dst + src; |
| 35792 | flag_N = flag_X = flag_C = res; |
| 35793 | flag_V = (src ^ res) & (dst ^ res); |
| 35794 | flag_NotZ = res & 0xFF; |
| 35795 | WRITE_BYTE_F(adr, res) |
| 35796 | POST_IO |
| 35797 | RET(12) |
| 35798 | } |
| 35799 | |
| 35800 | // ADDDa |
| 35801 | OPCODE(0xD120) |
| 35802 | { |
| 35803 | u32 adr, res; |
| 35804 | u32 src, dst; |
| 35805 | |
| 35806 | src = DREGu8((Opcode >> 9) & 7); |
| 35807 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 35808 | AREG((Opcode >> 0) & 7) = adr; |
| 35809 | PRE_IO |
| 35810 | READ_BYTE_F(adr, dst) |
| 35811 | res = dst + src; |
| 35812 | flag_N = flag_X = flag_C = res; |
| 35813 | flag_V = (src ^ res) & (dst ^ res); |
| 35814 | flag_NotZ = res & 0xFF; |
| 35815 | WRITE_BYTE_F(adr, res) |
| 35816 | POST_IO |
| 35817 | RET(14) |
| 35818 | } |
| 35819 | |
| 35820 | // ADDDa |
| 35821 | OPCODE(0xD128) |
| 35822 | { |
| 35823 | u32 adr, res; |
| 35824 | u32 src, dst; |
| 35825 | |
| 35826 | src = DREGu8((Opcode >> 9) & 7); |
| 35827 | FETCH_SWORD(adr); |
| 35828 | adr += AREG((Opcode >> 0) & 7); |
| 35829 | PRE_IO |
| 35830 | READ_BYTE_F(adr, dst) |
| 35831 | res = dst + src; |
| 35832 | flag_N = flag_X = flag_C = res; |
| 35833 | flag_V = (src ^ res) & (dst ^ res); |
| 35834 | flag_NotZ = res & 0xFF; |
| 35835 | WRITE_BYTE_F(adr, res) |
| 35836 | POST_IO |
| 35837 | RET(16) |
| 35838 | } |
| 35839 | |
| 35840 | // ADDDa |
| 35841 | OPCODE(0xD130) |
| 35842 | { |
| 35843 | u32 adr, res; |
| 35844 | u32 src, dst; |
| 35845 | |
| 35846 | src = DREGu8((Opcode >> 9) & 7); |
| 35847 | adr = AREG((Opcode >> 0) & 7); |
| 35848 | DECODE_EXT_WORD |
| 35849 | PRE_IO |
| 35850 | READ_BYTE_F(adr, dst) |
| 35851 | res = dst + src; |
| 35852 | flag_N = flag_X = flag_C = res; |
| 35853 | flag_V = (src ^ res) & (dst ^ res); |
| 35854 | flag_NotZ = res & 0xFF; |
| 35855 | WRITE_BYTE_F(adr, res) |
| 35856 | POST_IO |
| 35857 | RET(18) |
| 35858 | } |
| 35859 | |
| 35860 | // ADDDa |
| 35861 | OPCODE(0xD138) |
| 35862 | { |
| 35863 | u32 adr, res; |
| 35864 | u32 src, dst; |
| 35865 | |
| 35866 | src = DREGu8((Opcode >> 9) & 7); |
| 35867 | FETCH_SWORD(adr); |
| 35868 | PRE_IO |
| 35869 | READ_BYTE_F(adr, dst) |
| 35870 | res = dst + src; |
| 35871 | flag_N = flag_X = flag_C = res; |
| 35872 | flag_V = (src ^ res) & (dst ^ res); |
| 35873 | flag_NotZ = res & 0xFF; |
| 35874 | WRITE_BYTE_F(adr, res) |
| 35875 | POST_IO |
| 35876 | RET(16) |
| 35877 | } |
| 35878 | |
| 35879 | // ADDDa |
| 35880 | OPCODE(0xD139) |
| 35881 | { |
| 35882 | u32 adr, res; |
| 35883 | u32 src, dst; |
| 35884 | |
| 35885 | src = DREGu8((Opcode >> 9) & 7); |
| 35886 | FETCH_LONG(adr); |
| 35887 | PRE_IO |
| 35888 | READ_BYTE_F(adr, dst) |
| 35889 | res = dst + src; |
| 35890 | flag_N = flag_X = flag_C = res; |
| 35891 | flag_V = (src ^ res) & (dst ^ res); |
| 35892 | flag_NotZ = res & 0xFF; |
| 35893 | WRITE_BYTE_F(adr, res) |
| 35894 | POST_IO |
| 35895 | RET(20) |
| 35896 | } |
| 35897 | |
| 35898 | // ADDDa |
| 35899 | OPCODE(0xD11F) |
| 35900 | { |
| 35901 | u32 adr, res; |
| 35902 | u32 src, dst; |
| 35903 | |
| 35904 | src = DREGu8((Opcode >> 9) & 7); |
| 35905 | adr = AREG(7); |
| 35906 | AREG(7) += 2; |
| 35907 | PRE_IO |
| 35908 | READ_BYTE_F(adr, dst) |
| 35909 | res = dst + src; |
| 35910 | flag_N = flag_X = flag_C = res; |
| 35911 | flag_V = (src ^ res) & (dst ^ res); |
| 35912 | flag_NotZ = res & 0xFF; |
| 35913 | WRITE_BYTE_F(adr, res) |
| 35914 | POST_IO |
| 35915 | RET(12) |
| 35916 | } |
| 35917 | |
| 35918 | // ADDDa |
| 35919 | OPCODE(0xD127) |
| 35920 | { |
| 35921 | u32 adr, res; |
| 35922 | u32 src, dst; |
| 35923 | |
| 35924 | src = DREGu8((Opcode >> 9) & 7); |
| 35925 | adr = AREG(7) - 2; |
| 35926 | AREG(7) = adr; |
| 35927 | PRE_IO |
| 35928 | READ_BYTE_F(adr, dst) |
| 35929 | res = dst + src; |
| 35930 | flag_N = flag_X = flag_C = res; |
| 35931 | flag_V = (src ^ res) & (dst ^ res); |
| 35932 | flag_NotZ = res & 0xFF; |
| 35933 | WRITE_BYTE_F(adr, res) |
| 35934 | POST_IO |
| 35935 | RET(14) |
| 35936 | } |
| 35937 | |
| 35938 | // ADDDa |
| 35939 | OPCODE(0xD150) |
| 35940 | { |
| 35941 | u32 adr, res; |
| 35942 | u32 src, dst; |
| 35943 | |
| 35944 | src = DREGu16((Opcode >> 9) & 7); |
| 35945 | adr = AREG((Opcode >> 0) & 7); |
| 35946 | PRE_IO |
| 35947 | READ_WORD_F(adr, dst) |
| 35948 | res = dst + src; |
| 35949 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35950 | flag_N = flag_X = flag_C = res >> 8; |
| 35951 | flag_NotZ = res & 0xFFFF; |
| 35952 | WRITE_WORD_F(adr, res) |
| 35953 | POST_IO |
| 35954 | RET(12) |
| 35955 | } |
| 35956 | |
| 35957 | // ADDDa |
| 35958 | OPCODE(0xD158) |
| 35959 | { |
| 35960 | u32 adr, res; |
| 35961 | u32 src, dst; |
| 35962 | |
| 35963 | src = DREGu16((Opcode >> 9) & 7); |
| 35964 | adr = AREG((Opcode >> 0) & 7); |
| 35965 | AREG((Opcode >> 0) & 7) += 2; |
| 35966 | PRE_IO |
| 35967 | READ_WORD_F(adr, dst) |
| 35968 | res = dst + src; |
| 35969 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35970 | flag_N = flag_X = flag_C = res >> 8; |
| 35971 | flag_NotZ = res & 0xFFFF; |
| 35972 | WRITE_WORD_F(adr, res) |
| 35973 | POST_IO |
| 35974 | RET(12) |
| 35975 | } |
| 35976 | |
| 35977 | // ADDDa |
| 35978 | OPCODE(0xD160) |
| 35979 | { |
| 35980 | u32 adr, res; |
| 35981 | u32 src, dst; |
| 35982 | |
| 35983 | src = DREGu16((Opcode >> 9) & 7); |
| 35984 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 35985 | AREG((Opcode >> 0) & 7) = adr; |
| 35986 | PRE_IO |
| 35987 | READ_WORD_F(adr, dst) |
| 35988 | res = dst + src; |
| 35989 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 35990 | flag_N = flag_X = flag_C = res >> 8; |
| 35991 | flag_NotZ = res & 0xFFFF; |
| 35992 | WRITE_WORD_F(adr, res) |
| 35993 | POST_IO |
| 35994 | RET(14) |
| 35995 | } |
| 35996 | |
| 35997 | // ADDDa |
| 35998 | OPCODE(0xD168) |
| 35999 | { |
| 36000 | u32 adr, res; |
| 36001 | u32 src, dst; |
| 36002 | |
| 36003 | src = DREGu16((Opcode >> 9) & 7); |
| 36004 | FETCH_SWORD(adr); |
| 36005 | adr += AREG((Opcode >> 0) & 7); |
| 36006 | PRE_IO |
| 36007 | READ_WORD_F(adr, dst) |
| 36008 | res = dst + src; |
| 36009 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36010 | flag_N = flag_X = flag_C = res >> 8; |
| 36011 | flag_NotZ = res & 0xFFFF; |
| 36012 | WRITE_WORD_F(adr, res) |
| 36013 | POST_IO |
| 36014 | RET(16) |
| 36015 | } |
| 36016 | |
| 36017 | // ADDDa |
| 36018 | OPCODE(0xD170) |
| 36019 | { |
| 36020 | u32 adr, res; |
| 36021 | u32 src, dst; |
| 36022 | |
| 36023 | src = DREGu16((Opcode >> 9) & 7); |
| 36024 | adr = AREG((Opcode >> 0) & 7); |
| 36025 | DECODE_EXT_WORD |
| 36026 | PRE_IO |
| 36027 | READ_WORD_F(adr, dst) |
| 36028 | res = dst + src; |
| 36029 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36030 | flag_N = flag_X = flag_C = res >> 8; |
| 36031 | flag_NotZ = res & 0xFFFF; |
| 36032 | WRITE_WORD_F(adr, res) |
| 36033 | POST_IO |
| 36034 | RET(18) |
| 36035 | } |
| 36036 | |
| 36037 | // ADDDa |
| 36038 | OPCODE(0xD178) |
| 36039 | { |
| 36040 | u32 adr, res; |
| 36041 | u32 src, dst; |
| 36042 | |
| 36043 | src = DREGu16((Opcode >> 9) & 7); |
| 36044 | FETCH_SWORD(adr); |
| 36045 | PRE_IO |
| 36046 | READ_WORD_F(adr, dst) |
| 36047 | res = dst + src; |
| 36048 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36049 | flag_N = flag_X = flag_C = res >> 8; |
| 36050 | flag_NotZ = res & 0xFFFF; |
| 36051 | WRITE_WORD_F(adr, res) |
| 36052 | POST_IO |
| 36053 | RET(16) |
| 36054 | } |
| 36055 | |
| 36056 | // ADDDa |
| 36057 | OPCODE(0xD179) |
| 36058 | { |
| 36059 | u32 adr, res; |
| 36060 | u32 src, dst; |
| 36061 | |
| 36062 | src = DREGu16((Opcode >> 9) & 7); |
| 36063 | FETCH_LONG(adr); |
| 36064 | PRE_IO |
| 36065 | READ_WORD_F(adr, dst) |
| 36066 | res = dst + src; |
| 36067 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36068 | flag_N = flag_X = flag_C = res >> 8; |
| 36069 | flag_NotZ = res & 0xFFFF; |
| 36070 | WRITE_WORD_F(adr, res) |
| 36071 | POST_IO |
| 36072 | RET(20) |
| 36073 | } |
| 36074 | |
| 36075 | // ADDDa |
| 36076 | OPCODE(0xD15F) |
| 36077 | { |
| 36078 | u32 adr, res; |
| 36079 | u32 src, dst; |
| 36080 | |
| 36081 | src = DREGu16((Opcode >> 9) & 7); |
| 36082 | adr = AREG(7); |
| 36083 | AREG(7) += 2; |
| 36084 | PRE_IO |
| 36085 | READ_WORD_F(adr, dst) |
| 36086 | res = dst + src; |
| 36087 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36088 | flag_N = flag_X = flag_C = res >> 8; |
| 36089 | flag_NotZ = res & 0xFFFF; |
| 36090 | WRITE_WORD_F(adr, res) |
| 36091 | POST_IO |
| 36092 | RET(12) |
| 36093 | } |
| 36094 | |
| 36095 | // ADDDa |
| 36096 | OPCODE(0xD167) |
| 36097 | { |
| 36098 | u32 adr, res; |
| 36099 | u32 src, dst; |
| 36100 | |
| 36101 | src = DREGu16((Opcode >> 9) & 7); |
| 36102 | adr = AREG(7) - 2; |
| 36103 | AREG(7) = adr; |
| 36104 | PRE_IO |
| 36105 | READ_WORD_F(adr, dst) |
| 36106 | res = dst + src; |
| 36107 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36108 | flag_N = flag_X = flag_C = res >> 8; |
| 36109 | flag_NotZ = res & 0xFFFF; |
| 36110 | WRITE_WORD_F(adr, res) |
| 36111 | POST_IO |
| 36112 | RET(14) |
| 36113 | } |
| 36114 | |
| 36115 | // ADDDa |
| 36116 | OPCODE(0xD190) |
| 36117 | { |
| 36118 | u32 adr, res; |
| 36119 | u32 src, dst; |
| 36120 | |
| 36121 | src = DREGu32((Opcode >> 9) & 7); |
| 36122 | adr = AREG((Opcode >> 0) & 7); |
| 36123 | PRE_IO |
| 36124 | READ_LONG_F(adr, dst) |
| 36125 | res = dst + src; |
| 36126 | flag_NotZ = res; |
| 36127 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36128 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36129 | flag_N = res >> 24; |
| 36130 | WRITE_LONG_F(adr, res) |
| 36131 | POST_IO |
| 36132 | RET(20) |
| 36133 | } |
| 36134 | |
| 36135 | // ADDDa |
| 36136 | OPCODE(0xD198) |
| 36137 | { |
| 36138 | u32 adr, res; |
| 36139 | u32 src, dst; |
| 36140 | |
| 36141 | src = DREGu32((Opcode >> 9) & 7); |
| 36142 | adr = AREG((Opcode >> 0) & 7); |
| 36143 | AREG((Opcode >> 0) & 7) += 4; |
| 36144 | PRE_IO |
| 36145 | READ_LONG_F(adr, dst) |
| 36146 | res = dst + src; |
| 36147 | flag_NotZ = res; |
| 36148 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36149 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36150 | flag_N = res >> 24; |
| 36151 | WRITE_LONG_F(adr, res) |
| 36152 | POST_IO |
| 36153 | RET(20) |
| 36154 | } |
| 36155 | |
| 36156 | // ADDDa |
| 36157 | OPCODE(0xD1A0) |
| 36158 | { |
| 36159 | u32 adr, res; |
| 36160 | u32 src, dst; |
| 36161 | |
| 36162 | src = DREGu32((Opcode >> 9) & 7); |
| 36163 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 36164 | AREG((Opcode >> 0) & 7) = adr; |
| 36165 | PRE_IO |
| 36166 | READ_LONG_F(adr, dst) |
| 36167 | res = dst + src; |
| 36168 | flag_NotZ = res; |
| 36169 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36170 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36171 | flag_N = res >> 24; |
| 36172 | WRITE_LONG_F(adr, res) |
| 36173 | POST_IO |
| 36174 | RET(22) |
| 36175 | } |
| 36176 | |
| 36177 | // ADDDa |
| 36178 | OPCODE(0xD1A8) |
| 36179 | { |
| 36180 | u32 adr, res; |
| 36181 | u32 src, dst; |
| 36182 | |
| 36183 | src = DREGu32((Opcode >> 9) & 7); |
| 36184 | FETCH_SWORD(adr); |
| 36185 | adr += AREG((Opcode >> 0) & 7); |
| 36186 | PRE_IO |
| 36187 | READ_LONG_F(adr, dst) |
| 36188 | res = dst + src; |
| 36189 | flag_NotZ = res; |
| 36190 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36191 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36192 | flag_N = res >> 24; |
| 36193 | WRITE_LONG_F(adr, res) |
| 36194 | POST_IO |
| 36195 | RET(24) |
| 36196 | } |
| 36197 | |
| 36198 | // ADDDa |
| 36199 | OPCODE(0xD1B0) |
| 36200 | { |
| 36201 | u32 adr, res; |
| 36202 | u32 src, dst; |
| 36203 | |
| 36204 | src = DREGu32((Opcode >> 9) & 7); |
| 36205 | adr = AREG((Opcode >> 0) & 7); |
| 36206 | DECODE_EXT_WORD |
| 36207 | PRE_IO |
| 36208 | READ_LONG_F(adr, dst) |
| 36209 | res = dst + src; |
| 36210 | flag_NotZ = res; |
| 36211 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36212 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36213 | flag_N = res >> 24; |
| 36214 | WRITE_LONG_F(adr, res) |
| 36215 | POST_IO |
| 36216 | RET(26) |
| 36217 | } |
| 36218 | |
| 36219 | // ADDDa |
| 36220 | OPCODE(0xD1B8) |
| 36221 | { |
| 36222 | u32 adr, res; |
| 36223 | u32 src, dst; |
| 36224 | |
| 36225 | src = DREGu32((Opcode >> 9) & 7); |
| 36226 | FETCH_SWORD(adr); |
| 36227 | PRE_IO |
| 36228 | READ_LONG_F(adr, dst) |
| 36229 | res = dst + src; |
| 36230 | flag_NotZ = res; |
| 36231 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36232 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36233 | flag_N = res >> 24; |
| 36234 | WRITE_LONG_F(adr, res) |
| 36235 | POST_IO |
| 36236 | RET(24) |
| 36237 | } |
| 36238 | |
| 36239 | // ADDDa |
| 36240 | OPCODE(0xD1B9) |
| 36241 | { |
| 36242 | u32 adr, res; |
| 36243 | u32 src, dst; |
| 36244 | |
| 36245 | src = DREGu32((Opcode >> 9) & 7); |
| 36246 | FETCH_LONG(adr); |
| 36247 | PRE_IO |
| 36248 | READ_LONG_F(adr, dst) |
| 36249 | res = dst + src; |
| 36250 | flag_NotZ = res; |
| 36251 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36252 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36253 | flag_N = res >> 24; |
| 36254 | WRITE_LONG_F(adr, res) |
| 36255 | POST_IO |
| 36256 | RET(28) |
| 36257 | } |
| 36258 | |
| 36259 | // ADDDa |
| 36260 | OPCODE(0xD19F) |
| 36261 | { |
| 36262 | u32 adr, res; |
| 36263 | u32 src, dst; |
| 36264 | |
| 36265 | src = DREGu32((Opcode >> 9) & 7); |
| 36266 | adr = AREG(7); |
| 36267 | AREG(7) += 4; |
| 36268 | PRE_IO |
| 36269 | READ_LONG_F(adr, dst) |
| 36270 | res = dst + src; |
| 36271 | flag_NotZ = res; |
| 36272 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36273 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36274 | flag_N = res >> 24; |
| 36275 | WRITE_LONG_F(adr, res) |
| 36276 | POST_IO |
| 36277 | RET(20) |
| 36278 | } |
| 36279 | |
| 36280 | // ADDDa |
| 36281 | OPCODE(0xD1A7) |
| 36282 | { |
| 36283 | u32 adr, res; |
| 36284 | u32 src, dst; |
| 36285 | |
| 36286 | src = DREGu32((Opcode >> 9) & 7); |
| 36287 | adr = AREG(7) - 4; |
| 36288 | AREG(7) = adr; |
| 36289 | PRE_IO |
| 36290 | READ_LONG_F(adr, dst) |
| 36291 | res = dst + src; |
| 36292 | flag_NotZ = res; |
| 36293 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36294 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36295 | flag_N = res >> 24; |
| 36296 | WRITE_LONG_F(adr, res) |
| 36297 | POST_IO |
| 36298 | RET(22) |
| 36299 | } |
| 36300 | |
| 36301 | // ADDX |
| 36302 | OPCODE(0xD100) |
| 36303 | { |
| 36304 | u32 adr, res; |
| 36305 | u32 src, dst; |
| 36306 | |
| 36307 | src = DREGu8((Opcode >> 0) & 7); |
| 36308 | dst = DREGu8((Opcode >> 9) & 7); |
| 36309 | res = dst + src + ((flag_X >> 8) & 1); |
| 36310 | flag_N = flag_X = flag_C = res; |
| 36311 | flag_V = (src ^ res) & (dst ^ res); |
| 36312 | flag_NotZ |= res & 0xFF; |
| 36313 | DREGu8((Opcode >> 9) & 7) = res; |
| 36314 | RET(4) |
| 36315 | } |
| 36316 | |
| 36317 | // ADDX |
| 36318 | OPCODE(0xD140) |
| 36319 | { |
| 36320 | u32 adr, res; |
| 36321 | u32 src, dst; |
| 36322 | |
| 36323 | src = DREGu16((Opcode >> 0) & 7); |
| 36324 | dst = DREGu16((Opcode >> 9) & 7); |
| 36325 | res = dst + src + ((flag_X >> 8) & 1); |
| 36326 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36327 | flag_N = flag_X = flag_C = res >> 8; |
| 36328 | flag_NotZ |= res & 0xFFFF; |
| 36329 | DREGu16((Opcode >> 9) & 7) = res; |
| 36330 | RET(4) |
| 36331 | } |
| 36332 | |
| 36333 | // ADDX |
| 36334 | OPCODE(0xD180) |
| 36335 | { |
| 36336 | u32 adr, res; |
| 36337 | u32 src, dst; |
| 36338 | |
| 36339 | src = DREGu32((Opcode >> 0) & 7); |
| 36340 | dst = DREGu32((Opcode >> 9) & 7); |
| 36341 | res = dst + src + ((flag_X >> 8) & 1); |
| 36342 | flag_NotZ |= res; |
| 36343 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36344 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36345 | flag_N = res >> 24; |
| 36346 | DREGu32((Opcode >> 9) & 7) = res; |
| 36347 | RET(8) |
| 36348 | } |
| 36349 | |
| 36350 | // ADDXM |
| 36351 | OPCODE(0xD108) |
| 36352 | { |
| 36353 | u32 adr, res; |
| 36354 | u32 src, dst; |
| 36355 | |
| 36356 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 36357 | AREG((Opcode >> 0) & 7) = adr; |
| 36358 | PRE_IO |
| 36359 | READ_BYTE_F(adr, src) |
| 36360 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 36361 | AREG((Opcode >> 9) & 7) = adr; |
| 36362 | READ_BYTE_F(adr, dst) |
| 36363 | res = dst + src + ((flag_X >> 8) & 1); |
| 36364 | flag_N = flag_X = flag_C = res; |
| 36365 | flag_V = (src ^ res) & (dst ^ res); |
| 36366 | flag_NotZ |= res & 0xFF; |
| 36367 | WRITE_BYTE_F(adr, res) |
| 36368 | POST_IO |
| 36369 | RET(18) |
| 36370 | } |
| 36371 | |
| 36372 | // ADDXM |
| 36373 | OPCODE(0xD148) |
| 36374 | { |
| 36375 | u32 adr, res; |
| 36376 | u32 src, dst; |
| 36377 | |
| 36378 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 36379 | AREG((Opcode >> 0) & 7) = adr; |
| 36380 | PRE_IO |
| 36381 | READ_WORD_F(adr, src) |
| 36382 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 36383 | AREG((Opcode >> 9) & 7) = adr; |
| 36384 | READ_WORD_F(adr, dst) |
| 36385 | res = dst + src + ((flag_X >> 8) & 1); |
| 36386 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36387 | flag_N = flag_X = flag_C = res >> 8; |
| 36388 | flag_NotZ |= res & 0xFFFF; |
| 36389 | WRITE_WORD_F(adr, res) |
| 36390 | POST_IO |
| 36391 | RET(18) |
| 36392 | } |
| 36393 | |
| 36394 | // ADDXM |
| 36395 | OPCODE(0xD188) |
| 36396 | { |
| 36397 | u32 adr, res; |
| 36398 | u32 src, dst; |
| 36399 | |
| 36400 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 36401 | AREG((Opcode >> 0) & 7) = adr; |
| 36402 | PRE_IO |
| 36403 | READ_LONG_F(adr, src) |
| 36404 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 36405 | AREG((Opcode >> 9) & 7) = adr; |
| 36406 | READ_LONG_F(adr, dst) |
| 36407 | res = dst + src + ((flag_X >> 8) & 1); |
| 36408 | flag_NotZ |= res; |
| 36409 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36410 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36411 | flag_N = res >> 24; |
| 36412 | WRITE_LONG_F(adr, res) |
| 36413 | POST_IO |
| 36414 | RET(30) |
| 36415 | } |
| 36416 | |
| 36417 | // ADDX7M |
| 36418 | OPCODE(0xD10F) |
| 36419 | { |
| 36420 | u32 adr, res; |
| 36421 | u32 src, dst; |
| 36422 | |
| 36423 | adr = AREG(7) - 2; |
| 36424 | AREG(7) = adr; |
| 36425 | PRE_IO |
| 36426 | READ_BYTE_F(adr, src) |
| 36427 | adr = AREG((Opcode >> 9) & 7) - 1; |
| 36428 | AREG((Opcode >> 9) & 7) = adr; |
| 36429 | READ_BYTE_F(adr, dst) |
| 36430 | res = dst + src + ((flag_X >> 8) & 1); |
| 36431 | flag_N = flag_X = flag_C = res; |
| 36432 | flag_V = (src ^ res) & (dst ^ res); |
| 36433 | flag_NotZ |= res & 0xFF; |
| 36434 | WRITE_BYTE_F(adr, res) |
| 36435 | POST_IO |
| 36436 | RET(18) |
| 36437 | } |
| 36438 | |
| 36439 | // ADDX7M |
| 36440 | OPCODE(0xD14F) |
| 36441 | { |
| 36442 | u32 adr, res; |
| 36443 | u32 src, dst; |
| 36444 | |
| 36445 | adr = AREG(7) - 2; |
| 36446 | AREG(7) = adr; |
| 36447 | PRE_IO |
| 36448 | READ_WORD_F(adr, src) |
| 36449 | adr = AREG((Opcode >> 9) & 7) - 2; |
| 36450 | AREG((Opcode >> 9) & 7) = adr; |
| 36451 | READ_WORD_F(adr, dst) |
| 36452 | res = dst + src + ((flag_X >> 8) & 1); |
| 36453 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36454 | flag_N = flag_X = flag_C = res >> 8; |
| 36455 | flag_NotZ |= res & 0xFFFF; |
| 36456 | WRITE_WORD_F(adr, res) |
| 36457 | POST_IO |
| 36458 | RET(18) |
| 36459 | } |
| 36460 | |
| 36461 | // ADDX7M |
| 36462 | OPCODE(0xD18F) |
| 36463 | { |
| 36464 | u32 adr, res; |
| 36465 | u32 src, dst; |
| 36466 | |
| 36467 | adr = AREG(7) - 4; |
| 36468 | AREG(7) = adr; |
| 36469 | PRE_IO |
| 36470 | READ_LONG_F(adr, src) |
| 36471 | adr = AREG((Opcode >> 9) & 7) - 4; |
| 36472 | AREG((Opcode >> 9) & 7) = adr; |
| 36473 | READ_LONG_F(adr, dst) |
| 36474 | res = dst + src + ((flag_X >> 8) & 1); |
| 36475 | flag_NotZ |= res; |
| 36476 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36477 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36478 | flag_N = res >> 24; |
| 36479 | WRITE_LONG_F(adr, res) |
| 36480 | POST_IO |
| 36481 | RET(30) |
| 36482 | } |
| 36483 | |
| 36484 | // ADDXM7 |
| 36485 | OPCODE(0xDF08) |
| 36486 | { |
| 36487 | u32 adr, res; |
| 36488 | u32 src, dst; |
| 36489 | |
| 36490 | adr = AREG((Opcode >> 0) & 7) - 1; |
| 36491 | AREG((Opcode >> 0) & 7) = adr; |
| 36492 | PRE_IO |
| 36493 | READ_BYTE_F(adr, src) |
| 36494 | adr = AREG(7) - 2; |
| 36495 | AREG(7) = adr; |
| 36496 | READ_BYTE_F(adr, dst) |
| 36497 | res = dst + src + ((flag_X >> 8) & 1); |
| 36498 | flag_N = flag_X = flag_C = res; |
| 36499 | flag_V = (src ^ res) & (dst ^ res); |
| 36500 | flag_NotZ |= res & 0xFF; |
| 36501 | WRITE_BYTE_F(adr, res) |
| 36502 | POST_IO |
| 36503 | RET(18) |
| 36504 | } |
| 36505 | |
| 36506 | // ADDXM7 |
| 36507 | OPCODE(0xDF48) |
| 36508 | { |
| 36509 | u32 adr, res; |
| 36510 | u32 src, dst; |
| 36511 | |
| 36512 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 36513 | AREG((Opcode >> 0) & 7) = adr; |
| 36514 | PRE_IO |
| 36515 | READ_WORD_F(adr, src) |
| 36516 | adr = AREG(7) - 2; |
| 36517 | AREG(7) = adr; |
| 36518 | READ_WORD_F(adr, dst) |
| 36519 | res = dst + src + ((flag_X >> 8) & 1); |
| 36520 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36521 | flag_N = flag_X = flag_C = res >> 8; |
| 36522 | flag_NotZ |= res & 0xFFFF; |
| 36523 | WRITE_WORD_F(adr, res) |
| 36524 | POST_IO |
| 36525 | RET(18) |
| 36526 | } |
| 36527 | |
| 36528 | // ADDXM7 |
| 36529 | OPCODE(0xDF88) |
| 36530 | { |
| 36531 | u32 adr, res; |
| 36532 | u32 src, dst; |
| 36533 | |
| 36534 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 36535 | AREG((Opcode >> 0) & 7) = adr; |
| 36536 | PRE_IO |
| 36537 | READ_LONG_F(adr, src) |
| 36538 | adr = AREG(7) - 4; |
| 36539 | AREG(7) = adr; |
| 36540 | READ_LONG_F(adr, dst) |
| 36541 | res = dst + src + ((flag_X >> 8) & 1); |
| 36542 | flag_NotZ |= res; |
| 36543 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36544 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36545 | flag_N = res >> 24; |
| 36546 | WRITE_LONG_F(adr, res) |
| 36547 | POST_IO |
| 36548 | RET(30) |
| 36549 | } |
| 36550 | |
| 36551 | // ADDX7M7 |
| 36552 | OPCODE(0xDF0F) |
| 36553 | { |
| 36554 | u32 adr, res; |
| 36555 | u32 src, dst; |
| 36556 | |
| 36557 | adr = AREG(7) - 2; |
| 36558 | AREG(7) = adr; |
| 36559 | PRE_IO |
| 36560 | READ_BYTE_F(adr, src) |
| 36561 | adr = AREG(7) - 2; |
| 36562 | AREG(7) = adr; |
| 36563 | READ_BYTE_F(adr, dst) |
| 36564 | res = dst + src + ((flag_X >> 8) & 1); |
| 36565 | flag_N = flag_X = flag_C = res; |
| 36566 | flag_V = (src ^ res) & (dst ^ res); |
| 36567 | flag_NotZ |= res & 0xFF; |
| 36568 | WRITE_BYTE_F(adr, res) |
| 36569 | POST_IO |
| 36570 | RET(18) |
| 36571 | } |
| 36572 | |
| 36573 | // ADDX7M7 |
| 36574 | OPCODE(0xDF4F) |
| 36575 | { |
| 36576 | u32 adr, res; |
| 36577 | u32 src, dst; |
| 36578 | |
| 36579 | adr = AREG(7) - 2; |
| 36580 | AREG(7) = adr; |
| 36581 | PRE_IO |
| 36582 | READ_WORD_F(adr, src) |
| 36583 | adr = AREG(7) - 2; |
| 36584 | AREG(7) = adr; |
| 36585 | READ_WORD_F(adr, dst) |
| 36586 | res = dst + src + ((flag_X >> 8) & 1); |
| 36587 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
| 36588 | flag_N = flag_X = flag_C = res >> 8; |
| 36589 | flag_NotZ |= res & 0xFFFF; |
| 36590 | WRITE_WORD_F(adr, res) |
| 36591 | POST_IO |
| 36592 | RET(18) |
| 36593 | } |
| 36594 | |
| 36595 | // ADDX7M7 |
| 36596 | OPCODE(0xDF8F) |
| 36597 | { |
| 36598 | u32 adr, res; |
| 36599 | u32 src, dst; |
| 36600 | |
| 36601 | adr = AREG(7) - 4; |
| 36602 | AREG(7) = adr; |
| 36603 | PRE_IO |
| 36604 | READ_LONG_F(adr, src) |
| 36605 | adr = AREG(7) - 4; |
| 36606 | AREG(7) = adr; |
| 36607 | READ_LONG_F(adr, dst) |
| 36608 | res = dst + src + ((flag_X >> 8) & 1); |
| 36609 | flag_NotZ |= res; |
| 36610 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
| 36611 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
| 36612 | flag_N = res >> 24; |
| 36613 | WRITE_LONG_F(adr, res) |
| 36614 | POST_IO |
| 36615 | RET(30) |
| 36616 | } |
| 36617 | |
| 36618 | // ADDA |
| 36619 | OPCODE(0xD0C0) |
| 36620 | { |
| 36621 | u32 adr, res; |
| 36622 | u32 src, dst; |
| 36623 | |
| 36624 | src = (s32)DREGs16((Opcode >> 0) & 7); |
| 36625 | dst = AREGu32((Opcode >> 9) & 7); |
| 36626 | res = dst + src; |
| 36627 | AREG((Opcode >> 9) & 7) = res; |
| 36628 | RET(8) |
| 36629 | } |
| 36630 | |
| 36631 | // ADDA |
| 36632 | OPCODE(0xD0C8) |
| 36633 | { |
| 36634 | u32 adr, res; |
| 36635 | u32 src, dst; |
| 36636 | |
| 36637 | src = (s32)AREGs16((Opcode >> 0) & 7); |
| 36638 | dst = AREGu32((Opcode >> 9) & 7); |
| 36639 | res = dst + src; |
| 36640 | AREG((Opcode >> 9) & 7) = res; |
| 36641 | RET(8) |
| 36642 | } |
| 36643 | |
| 36644 | // ADDA |
| 36645 | OPCODE(0xD0D0) |
| 36646 | { |
| 36647 | u32 adr, res; |
| 36648 | u32 src, dst; |
| 36649 | |
| 36650 | adr = AREG((Opcode >> 0) & 7); |
| 36651 | PRE_IO |
| 36652 | READSX_WORD_F(adr, src) |
| 36653 | dst = AREGu32((Opcode >> 9) & 7); |
| 36654 | res = dst + src; |
| 36655 | AREG((Opcode >> 9) & 7) = res; |
| 36656 | POST_IO |
| 36657 | #ifdef USE_CYCLONE_TIMING |
| 36658 | RET(12) |
| 36659 | #else |
| 36660 | RET(10) |
| 36661 | #endif |
| 36662 | } |
| 36663 | |
| 36664 | // ADDA |
| 36665 | OPCODE(0xD0D8) |
| 36666 | { |
| 36667 | u32 adr, res; |
| 36668 | u32 src, dst; |
| 36669 | |
| 36670 | adr = AREG((Opcode >> 0) & 7); |
| 36671 | AREG((Opcode >> 0) & 7) += 2; |
| 36672 | PRE_IO |
| 36673 | READSX_WORD_F(adr, src) |
| 36674 | dst = AREGu32((Opcode >> 9) & 7); |
| 36675 | res = dst + src; |
| 36676 | AREG((Opcode >> 9) & 7) = res; |
| 36677 | POST_IO |
| 36678 | #ifdef USE_CYCLONE_TIMING |
| 36679 | RET(12) |
| 36680 | #else |
| 36681 | RET(10) |
| 36682 | #endif |
| 36683 | } |
| 36684 | |
| 36685 | // ADDA |
| 36686 | OPCODE(0xD0E0) |
| 36687 | { |
| 36688 | u32 adr, res; |
| 36689 | u32 src, dst; |
| 36690 | |
| 36691 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 36692 | AREG((Opcode >> 0) & 7) = adr; |
| 36693 | PRE_IO |
| 36694 | READSX_WORD_F(adr, src) |
| 36695 | dst = AREGu32((Opcode >> 9) & 7); |
| 36696 | res = dst + src; |
| 36697 | AREG((Opcode >> 9) & 7) = res; |
| 36698 | POST_IO |
| 36699 | #ifdef USE_CYCLONE_TIMING |
| 36700 | RET(14) |
| 36701 | #else |
| 36702 | RET(12) |
| 36703 | #endif |
| 36704 | } |
| 36705 | |
| 36706 | // ADDA |
| 36707 | OPCODE(0xD0E8) |
| 36708 | { |
| 36709 | u32 adr, res; |
| 36710 | u32 src, dst; |
| 36711 | |
| 36712 | FETCH_SWORD(adr); |
| 36713 | adr += AREG((Opcode >> 0) & 7); |
| 36714 | PRE_IO |
| 36715 | READSX_WORD_F(adr, src) |
| 36716 | dst = AREGu32((Opcode >> 9) & 7); |
| 36717 | res = dst + src; |
| 36718 | AREG((Opcode >> 9) & 7) = res; |
| 36719 | POST_IO |
| 36720 | #ifdef USE_CYCLONE_TIMING |
| 36721 | RET(16) |
| 36722 | #else |
| 36723 | RET(14) |
| 36724 | #endif |
| 36725 | } |
| 36726 | |
| 36727 | // ADDA |
| 36728 | OPCODE(0xD0F0) |
| 36729 | { |
| 36730 | u32 adr, res; |
| 36731 | u32 src, dst; |
| 36732 | |
| 36733 | adr = AREG((Opcode >> 0) & 7); |
| 36734 | DECODE_EXT_WORD |
| 36735 | PRE_IO |
| 36736 | READSX_WORD_F(adr, src) |
| 36737 | dst = AREGu32((Opcode >> 9) & 7); |
| 36738 | res = dst + src; |
| 36739 | AREG((Opcode >> 9) & 7) = res; |
| 36740 | POST_IO |
| 36741 | #ifdef USE_CYCLONE_TIMING |
| 36742 | RET(18) |
| 36743 | #else |
| 36744 | RET(16) |
| 36745 | #endif |
| 36746 | } |
| 36747 | |
| 36748 | // ADDA |
| 36749 | OPCODE(0xD0F8) |
| 36750 | { |
| 36751 | u32 adr, res; |
| 36752 | u32 src, dst; |
| 36753 | |
| 36754 | FETCH_SWORD(adr); |
| 36755 | PRE_IO |
| 36756 | READSX_WORD_F(adr, src) |
| 36757 | dst = AREGu32((Opcode >> 9) & 7); |
| 36758 | res = dst + src; |
| 36759 | AREG((Opcode >> 9) & 7) = res; |
| 36760 | POST_IO |
| 36761 | #ifdef USE_CYCLONE_TIMING |
| 36762 | RET(16) |
| 36763 | #else |
| 36764 | RET(14) |
| 36765 | #endif |
| 36766 | } |
| 36767 | |
| 36768 | // ADDA |
| 36769 | OPCODE(0xD0F9) |
| 36770 | { |
| 36771 | u32 adr, res; |
| 36772 | u32 src, dst; |
| 36773 | |
| 36774 | FETCH_LONG(adr); |
| 36775 | PRE_IO |
| 36776 | READSX_WORD_F(adr, src) |
| 36777 | dst = AREGu32((Opcode >> 9) & 7); |
| 36778 | res = dst + src; |
| 36779 | AREG((Opcode >> 9) & 7) = res; |
| 36780 | POST_IO |
| 36781 | #ifdef USE_CYCLONE_TIMING |
| 36782 | RET(20) |
| 36783 | #else |
| 36784 | RET(18) |
| 36785 | #endif |
| 36786 | } |
| 36787 | |
| 36788 | // ADDA |
| 36789 | OPCODE(0xD0FA) |
| 36790 | { |
| 36791 | u32 adr, res; |
| 36792 | u32 src, dst; |
| 36793 | |
| 36794 | adr = GET_SWORD + GET_PC; |
| 36795 | PC++; |
| 36796 | PRE_IO |
| 36797 | READSX_WORD_F(adr, src) |
| 36798 | dst = AREGu32((Opcode >> 9) & 7); |
| 36799 | res = dst + src; |
| 36800 | AREG((Opcode >> 9) & 7) = res; |
| 36801 | POST_IO |
| 36802 | #ifdef USE_CYCLONE_TIMING |
| 36803 | RET(16) |
| 36804 | #else |
| 36805 | RET(14) |
| 36806 | #endif |
| 36807 | } |
| 36808 | |
| 36809 | // ADDA |
| 36810 | OPCODE(0xD0FB) |
| 36811 | { |
| 36812 | u32 adr, res; |
| 36813 | u32 src, dst; |
| 36814 | |
| 36815 | adr = GET_PC; |
| 36816 | DECODE_EXT_WORD |
| 36817 | PRE_IO |
| 36818 | READSX_WORD_F(adr, src) |
| 36819 | dst = AREGu32((Opcode >> 9) & 7); |
| 36820 | res = dst + src; |
| 36821 | AREG((Opcode >> 9) & 7) = res; |
| 36822 | POST_IO |
| 36823 | #ifdef USE_CYCLONE_TIMING |
| 36824 | RET(18) |
| 36825 | #else |
| 36826 | RET(16) |
| 36827 | #endif |
| 36828 | } |
| 36829 | |
| 36830 | // ADDA |
| 36831 | OPCODE(0xD0FC) |
| 36832 | { |
| 36833 | u32 adr, res; |
| 36834 | u32 src, dst; |
| 36835 | |
| 36836 | FETCH_SWORD(src); |
| 36837 | dst = AREGu32((Opcode >> 9) & 7); |
| 36838 | res = dst + src; |
| 36839 | AREG((Opcode >> 9) & 7) = res; |
| 36840 | RET(12) |
| 36841 | } |
| 36842 | |
| 36843 | // ADDA |
| 36844 | OPCODE(0xD0DF) |
| 36845 | { |
| 36846 | u32 adr, res; |
| 36847 | u32 src, dst; |
| 36848 | |
| 36849 | adr = AREG(7); |
| 36850 | AREG(7) += 2; |
| 36851 | PRE_IO |
| 36852 | READSX_WORD_F(adr, src) |
| 36853 | dst = AREGu32((Opcode >> 9) & 7); |
| 36854 | res = dst + src; |
| 36855 | AREG((Opcode >> 9) & 7) = res; |
| 36856 | POST_IO |
| 36857 | #ifdef USE_CYCLONE_TIMING |
| 36858 | RET(12) |
| 36859 | #else |
| 36860 | RET(10) |
| 36861 | #endif |
| 36862 | } |
| 36863 | |
| 36864 | // ADDA |
| 36865 | OPCODE(0xD0E7) |
| 36866 | { |
| 36867 | u32 adr, res; |
| 36868 | u32 src, dst; |
| 36869 | |
| 36870 | adr = AREG(7) - 2; |
| 36871 | AREG(7) = adr; |
| 36872 | PRE_IO |
| 36873 | READSX_WORD_F(adr, src) |
| 36874 | dst = AREGu32((Opcode >> 9) & 7); |
| 36875 | res = dst + src; |
| 36876 | AREG((Opcode >> 9) & 7) = res; |
| 36877 | POST_IO |
| 36878 | #ifdef USE_CYCLONE_TIMING |
| 36879 | RET(14) |
| 36880 | #else |
| 36881 | RET(12) |
| 36882 | #endif |
| 36883 | } |
| 36884 | |
| 36885 | // ADDA |
| 36886 | OPCODE(0xD1C0) |
| 36887 | { |
| 36888 | u32 adr, res; |
| 36889 | u32 src, dst; |
| 36890 | |
| 36891 | src = (s32)DREGs32((Opcode >> 0) & 7); |
| 36892 | dst = AREGu32((Opcode >> 9) & 7); |
| 36893 | res = dst + src; |
| 36894 | AREG((Opcode >> 9) & 7) = res; |
| 36895 | #ifdef USE_CYCLONE_TIMING |
| 36896 | RET(8) |
| 36897 | #else |
| 36898 | RET(6) |
| 36899 | #endif |
| 36900 | } |
| 36901 | |
| 36902 | // ADDA |
| 36903 | OPCODE(0xD1C8) |
| 36904 | { |
| 36905 | u32 adr, res; |
| 36906 | u32 src, dst; |
| 36907 | |
| 36908 | src = (s32)AREGs32((Opcode >> 0) & 7); |
| 36909 | dst = AREGu32((Opcode >> 9) & 7); |
| 36910 | res = dst + src; |
| 36911 | AREG((Opcode >> 9) & 7) = res; |
| 36912 | #ifdef USE_CYCLONE_TIMING |
| 36913 | RET(8) |
| 36914 | #else |
| 36915 | RET(6) |
| 36916 | #endif |
| 36917 | } |
| 36918 | |
| 36919 | // ADDA |
| 36920 | OPCODE(0xD1D0) |
| 36921 | { |
| 36922 | u32 adr, res; |
| 36923 | u32 src, dst; |
| 36924 | |
| 36925 | adr = AREG((Opcode >> 0) & 7); |
| 36926 | PRE_IO |
| 36927 | READSX_LONG_F(adr, src) |
| 36928 | dst = AREGu32((Opcode >> 9) & 7); |
| 36929 | res = dst + src; |
| 36930 | AREG((Opcode >> 9) & 7) = res; |
| 36931 | POST_IO |
| 36932 | RET(14) |
| 36933 | } |
| 36934 | |
| 36935 | // ADDA |
| 36936 | OPCODE(0xD1D8) |
| 36937 | { |
| 36938 | u32 adr, res; |
| 36939 | u32 src, dst; |
| 36940 | |
| 36941 | adr = AREG((Opcode >> 0) & 7); |
| 36942 | AREG((Opcode >> 0) & 7) += 4; |
| 36943 | PRE_IO |
| 36944 | READSX_LONG_F(adr, src) |
| 36945 | dst = AREGu32((Opcode >> 9) & 7); |
| 36946 | res = dst + src; |
| 36947 | AREG((Opcode >> 9) & 7) = res; |
| 36948 | POST_IO |
| 36949 | RET(14) |
| 36950 | } |
| 36951 | |
| 36952 | // ADDA |
| 36953 | OPCODE(0xD1E0) |
| 36954 | { |
| 36955 | u32 adr, res; |
| 36956 | u32 src, dst; |
| 36957 | |
| 36958 | adr = AREG((Opcode >> 0) & 7) - 4; |
| 36959 | AREG((Opcode >> 0) & 7) = adr; |
| 36960 | PRE_IO |
| 36961 | READSX_LONG_F(adr, src) |
| 36962 | dst = AREGu32((Opcode >> 9) & 7); |
| 36963 | res = dst + src; |
| 36964 | AREG((Opcode >> 9) & 7) = res; |
| 36965 | POST_IO |
| 36966 | RET(16) |
| 36967 | } |
| 36968 | |
| 36969 | // ADDA |
| 36970 | OPCODE(0xD1E8) |
| 36971 | { |
| 36972 | u32 adr, res; |
| 36973 | u32 src, dst; |
| 36974 | |
| 36975 | FETCH_SWORD(adr); |
| 36976 | adr += AREG((Opcode >> 0) & 7); |
| 36977 | PRE_IO |
| 36978 | READSX_LONG_F(adr, src) |
| 36979 | dst = AREGu32((Opcode >> 9) & 7); |
| 36980 | res = dst + src; |
| 36981 | AREG((Opcode >> 9) & 7) = res; |
| 36982 | POST_IO |
| 36983 | RET(18) |
| 36984 | } |
| 36985 | |
| 36986 | // ADDA |
| 36987 | OPCODE(0xD1F0) |
| 36988 | { |
| 36989 | u32 adr, res; |
| 36990 | u32 src, dst; |
| 36991 | |
| 36992 | adr = AREG((Opcode >> 0) & 7); |
| 36993 | DECODE_EXT_WORD |
| 36994 | PRE_IO |
| 36995 | READSX_LONG_F(adr, src) |
| 36996 | dst = AREGu32((Opcode >> 9) & 7); |
| 36997 | res = dst + src; |
| 36998 | AREG((Opcode >> 9) & 7) = res; |
| 36999 | POST_IO |
| 37000 | RET(20) |
| 37001 | } |
| 37002 | |
| 37003 | // ADDA |
| 37004 | OPCODE(0xD1F8) |
| 37005 | { |
| 37006 | u32 adr, res; |
| 37007 | u32 src, dst; |
| 37008 | |
| 37009 | FETCH_SWORD(adr); |
| 37010 | PRE_IO |
| 37011 | READSX_LONG_F(adr, src) |
| 37012 | dst = AREGu32((Opcode >> 9) & 7); |
| 37013 | res = dst + src; |
| 37014 | AREG((Opcode >> 9) & 7) = res; |
| 37015 | POST_IO |
| 37016 | RET(18) |
| 37017 | } |
| 37018 | |
| 37019 | // ADDA |
| 37020 | OPCODE(0xD1F9) |
| 37021 | { |
| 37022 | u32 adr, res; |
| 37023 | u32 src, dst; |
| 37024 | |
| 37025 | FETCH_LONG(adr); |
| 37026 | PRE_IO |
| 37027 | READSX_LONG_F(adr, src) |
| 37028 | dst = AREGu32((Opcode >> 9) & 7); |
| 37029 | res = dst + src; |
| 37030 | AREG((Opcode >> 9) & 7) = res; |
| 37031 | POST_IO |
| 37032 | RET(22) |
| 37033 | } |
| 37034 | |
| 37035 | // ADDA |
| 37036 | OPCODE(0xD1FA) |
| 37037 | { |
| 37038 | u32 adr, res; |
| 37039 | u32 src, dst; |
| 37040 | |
| 37041 | adr = GET_SWORD + GET_PC; |
| 37042 | PC++; |
| 37043 | PRE_IO |
| 37044 | READSX_LONG_F(adr, src) |
| 37045 | dst = AREGu32((Opcode >> 9) & 7); |
| 37046 | res = dst + src; |
| 37047 | AREG((Opcode >> 9) & 7) = res; |
| 37048 | POST_IO |
| 37049 | RET(18) |
| 37050 | } |
| 37051 | |
| 37052 | // ADDA |
| 37053 | OPCODE(0xD1FB) |
| 37054 | { |
| 37055 | u32 adr, res; |
| 37056 | u32 src, dst; |
| 37057 | |
| 37058 | adr = GET_PC; |
| 37059 | DECODE_EXT_WORD |
| 37060 | PRE_IO |
| 37061 | READSX_LONG_F(adr, src) |
| 37062 | dst = AREGu32((Opcode >> 9) & 7); |
| 37063 | res = dst + src; |
| 37064 | AREG((Opcode >> 9) & 7) = res; |
| 37065 | POST_IO |
| 37066 | RET(20) |
| 37067 | } |
| 37068 | |
| 37069 | // ADDA |
| 37070 | OPCODE(0xD1FC) |
| 37071 | { |
| 37072 | u32 adr, res; |
| 37073 | u32 src, dst; |
| 37074 | |
| 37075 | FETCH_LONG(src); |
| 37076 | dst = AREGu32((Opcode >> 9) & 7); |
| 37077 | res = dst + src; |
| 37078 | AREG((Opcode >> 9) & 7) = res; |
| 37079 | #ifdef USE_CYCLONE_TIMING |
| 37080 | RET(16) |
| 37081 | #else |
| 37082 | RET(14) |
| 37083 | #endif |
| 37084 | } |
| 37085 | |
| 37086 | // ADDA |
| 37087 | OPCODE(0xD1DF) |
| 37088 | { |
| 37089 | u32 adr, res; |
| 37090 | u32 src, dst; |
| 37091 | |
| 37092 | adr = AREG(7); |
| 37093 | AREG(7) += 4; |
| 37094 | PRE_IO |
| 37095 | READSX_LONG_F(adr, src) |
| 37096 | dst = AREGu32((Opcode >> 9) & 7); |
| 37097 | res = dst + src; |
| 37098 | AREG((Opcode >> 9) & 7) = res; |
| 37099 | POST_IO |
| 37100 | RET(14) |
| 37101 | } |
| 37102 | |
| 37103 | // ADDA |
| 37104 | OPCODE(0xD1E7) |
| 37105 | { |
| 37106 | u32 adr, res; |
| 37107 | u32 src, dst; |
| 37108 | |
| 37109 | adr = AREG(7) - 4; |
| 37110 | AREG(7) = adr; |
| 37111 | PRE_IO |
| 37112 | READSX_LONG_F(adr, src) |
| 37113 | dst = AREGu32((Opcode >> 9) & 7); |
| 37114 | res = dst + src; |
| 37115 | AREG((Opcode >> 9) & 7) = res; |
| 37116 | POST_IO |
| 37117 | RET(16) |
| 37118 | } |
| 37119 | |
| 37120 | // ASRk |
| 37121 | OPCODE(0xE000) |
| 37122 | { |
| 37123 | u32 adr, res; |
| 37124 | u32 src, dst; |
| 37125 | |
| 37126 | u32 sft; |
| 37127 | |
| 37128 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37129 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37130 | src = (s32)DREGs8((Opcode >> 0) & 7); |
| 37131 | flag_V = 0; |
| 37132 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37133 | res = ((s32)src) >> sft; |
| 37134 | flag_N = res >> 0; |
| 37135 | flag_NotZ = res; |
| 37136 | DREGu8((Opcode >> 0) & 7) = res; |
| 37137 | RET(6) |
| 37138 | } |
| 37139 | |
| 37140 | // ASRk |
| 37141 | OPCODE(0xE040) |
| 37142 | { |
| 37143 | u32 adr, res; |
| 37144 | u32 src, dst; |
| 37145 | |
| 37146 | u32 sft; |
| 37147 | |
| 37148 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37149 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37150 | src = (s32)DREGs16((Opcode >> 0) & 7); |
| 37151 | flag_V = 0; |
| 37152 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37153 | res = ((s32)src) >> sft; |
| 37154 | flag_N = res >> 8; |
| 37155 | flag_NotZ = res; |
| 37156 | DREGu16((Opcode >> 0) & 7) = res; |
| 37157 | RET(6) |
| 37158 | } |
| 37159 | |
| 37160 | // ASRk |
| 37161 | OPCODE(0xE080) |
| 37162 | { |
| 37163 | u32 adr, res; |
| 37164 | u32 src, dst; |
| 37165 | |
| 37166 | u32 sft; |
| 37167 | |
| 37168 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37169 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37170 | src = (s32)DREGs32((Opcode >> 0) & 7); |
| 37171 | flag_V = 0; |
| 37172 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37173 | res = ((s32)src) >> sft; |
| 37174 | flag_N = res >> 24; |
| 37175 | flag_NotZ = res; |
| 37176 | DREGu32((Opcode >> 0) & 7) = res; |
| 37177 | RET(8) |
| 37178 | } |
| 37179 | |
| 37180 | // LSRk |
| 37181 | OPCODE(0xE008) |
| 37182 | { |
| 37183 | u32 adr, res; |
| 37184 | u32 src, dst; |
| 37185 | |
| 37186 | u32 sft; |
| 37187 | |
| 37188 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37189 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37190 | src = DREGu8((Opcode >> 0) & 7); |
| 37191 | flag_N = flag_V = 0; |
| 37192 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37193 | res = src >> sft; |
| 37194 | flag_NotZ = res; |
| 37195 | DREGu8((Opcode >> 0) & 7) = res; |
| 37196 | RET(6) |
| 37197 | } |
| 37198 | |
| 37199 | // LSRk |
| 37200 | OPCODE(0xE048) |
| 37201 | { |
| 37202 | u32 adr, res; |
| 37203 | u32 src, dst; |
| 37204 | |
| 37205 | u32 sft; |
| 37206 | |
| 37207 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37208 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37209 | src = DREGu16((Opcode >> 0) & 7); |
| 37210 | flag_N = flag_V = 0; |
| 37211 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37212 | res = src >> sft; |
| 37213 | flag_NotZ = res; |
| 37214 | DREGu16((Opcode >> 0) & 7) = res; |
| 37215 | RET(6) |
| 37216 | } |
| 37217 | |
| 37218 | // LSRk |
| 37219 | OPCODE(0xE088) |
| 37220 | { |
| 37221 | u32 adr, res; |
| 37222 | u32 src, dst; |
| 37223 | |
| 37224 | u32 sft; |
| 37225 | |
| 37226 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37227 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37228 | src = DREGu32((Opcode >> 0) & 7); |
| 37229 | flag_N = flag_V = 0; |
| 37230 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37231 | res = src >> sft; |
| 37232 | flag_NotZ = res; |
| 37233 | DREGu32((Opcode >> 0) & 7) = res; |
| 37234 | RET(8) |
| 37235 | } |
| 37236 | |
| 37237 | // ROXRk |
| 37238 | OPCODE(0xE010) |
| 37239 | { |
| 37240 | u32 adr, res; |
| 37241 | u32 src, dst; |
| 37242 | |
| 37243 | u32 sft; |
| 37244 | |
| 37245 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37246 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37247 | src = DREGu8((Opcode >> 0) & 7); |
| 37248 | src |= (flag_X & M68K_SR_X) << 0; |
| 37249 | res = (src >> sft) | (src << (9 - sft)); |
| 37250 | flag_X = flag_C = res >> 0; |
| 37251 | flag_V = 0; |
| 37252 | flag_N = res >> 0; |
| 37253 | flag_NotZ = res & 0x000000FF; |
| 37254 | DREGu8((Opcode >> 0) & 7) = res; |
| 37255 | RET(6) |
| 37256 | } |
| 37257 | |
| 37258 | // ROXRk |
| 37259 | OPCODE(0xE050) |
| 37260 | { |
| 37261 | u32 adr, res; |
| 37262 | u32 src, dst; |
| 37263 | |
| 37264 | u32 sft; |
| 37265 | |
| 37266 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37267 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37268 | src = DREGu16((Opcode >> 0) & 7); |
| 37269 | src |= (flag_X & M68K_SR_X) << 8; |
| 37270 | res = (src >> sft) | (src << (17 - sft)); |
| 37271 | flag_X = flag_C = res >> 8; |
| 37272 | flag_V = 0; |
| 37273 | flag_N = res >> 8; |
| 37274 | flag_NotZ = res & 0x0000FFFF; |
| 37275 | DREGu16((Opcode >> 0) & 7) = res; |
| 37276 | RET(6) |
| 37277 | } |
| 37278 | |
| 37279 | // ROXRk |
| 37280 | OPCODE(0xE090) |
| 37281 | { |
| 37282 | u32 adr, res; |
| 37283 | u32 src, dst; |
| 37284 | |
| 37285 | u32 sft; |
| 37286 | |
| 37287 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37288 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37289 | src = DREGu32((Opcode >> 0) & 7); |
| 37290 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37291 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
| 37292 | else res = (src >> sft) | (src << (33 - sft)) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + sft))); |
| 37293 | flag_X = flag_C; |
| 37294 | flag_V = 0; |
| 37295 | flag_N = res >> 24; |
| 37296 | flag_NotZ = res; |
| 37297 | DREGu32((Opcode >> 0) & 7) = res; |
| 37298 | RET(8) |
| 37299 | } |
| 37300 | |
| 37301 | // RORk |
| 37302 | OPCODE(0xE018) |
| 37303 | { |
| 37304 | u32 adr, res; |
| 37305 | u32 src, dst; |
| 37306 | |
| 37307 | u32 sft; |
| 37308 | |
| 37309 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37310 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37311 | src = DREGu8((Opcode >> 0) & 7); |
| 37312 | flag_V = 0; |
| 37313 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37314 | res = (src >> sft) | (src << (8 - sft)); |
| 37315 | flag_N = res >> 0; |
| 37316 | flag_NotZ = res & 0x000000FF; |
| 37317 | DREGu8((Opcode >> 0) & 7) = res; |
| 37318 | RET(6) |
| 37319 | } |
| 37320 | |
| 37321 | // RORk |
| 37322 | OPCODE(0xE058) |
| 37323 | { |
| 37324 | u32 adr, res; |
| 37325 | u32 src, dst; |
| 37326 | |
| 37327 | u32 sft; |
| 37328 | |
| 37329 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37330 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37331 | src = DREGu16((Opcode >> 0) & 7); |
| 37332 | flag_V = 0; |
| 37333 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37334 | res = (src >> sft) | (src << (16 - sft)); |
| 37335 | flag_N = res >> 8; |
| 37336 | flag_NotZ = res & 0x0000FFFF; |
| 37337 | DREGu16((Opcode >> 0) & 7) = res; |
| 37338 | RET(6) |
| 37339 | } |
| 37340 | |
| 37341 | // RORk |
| 37342 | OPCODE(0xE098) |
| 37343 | { |
| 37344 | u32 adr, res; |
| 37345 | u32 src, dst; |
| 37346 | |
| 37347 | u32 sft; |
| 37348 | |
| 37349 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37350 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37351 | src = DREGu32((Opcode >> 0) & 7); |
| 37352 | flag_V = 0; |
| 37353 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37354 | res = (src >> sft) | (src << (32 - sft)); |
| 37355 | flag_N = res >> 24; |
| 37356 | flag_NotZ = res; |
| 37357 | DREGu32((Opcode >> 0) & 7) = res; |
| 37358 | RET(8) |
| 37359 | } |
| 37360 | |
| 37361 | // ASLk |
| 37362 | OPCODE(0xE100) |
| 37363 | { |
| 37364 | u32 adr, res; |
| 37365 | u32 src, dst; |
| 37366 | |
| 37367 | u32 sft; |
| 37368 | |
| 37369 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37370 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37371 | src = DREGu8((Opcode >> 0) & 7); |
| 37372 | if (sft < 8) |
| 37373 | { |
| 37374 | flag_X = flag_C = src << (0 + sft); |
| 37375 | res = src << sft; |
| 37376 | flag_N = res >> 0; |
| 37377 | flag_NotZ = res & 0x000000FF; |
| 37378 | DREGu8((Opcode >> 0) & 7) = res; |
| 37379 | flag_V = 0; |
| 37380 | if ((sft > 7) && (src)) flag_V = M68K_SR_V; |
| 37381 | else |
| 37382 | { |
| 37383 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
| 37384 | src &= msk; |
| 37385 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
| 37386 | } |
| 37387 | RET(6) |
| 37388 | } |
| 37389 | |
| 37390 | if (src) flag_V = M68K_SR_V; |
| 37391 | else flag_V = 0; |
| 37392 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 37393 | res = 0; |
| 37394 | DREGu8((Opcode >> 0) & 7) = res; |
| 37395 | flag_N = 0; |
| 37396 | flag_NotZ = 0; |
| 37397 | RET(6) |
| 37398 | } |
| 37399 | |
| 37400 | // ASLk |
| 37401 | OPCODE(0xE140) |
| 37402 | { |
| 37403 | u32 adr, res; |
| 37404 | u32 src, dst; |
| 37405 | |
| 37406 | u32 sft; |
| 37407 | |
| 37408 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37409 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37410 | src = DREGu16((Opcode >> 0) & 7); |
| 37411 | flag_X = flag_C = src >> (8 - sft); |
| 37412 | res = src << sft; |
| 37413 | flag_N = res >> 8; |
| 37414 | flag_NotZ = res & 0x0000FFFF; |
| 37415 | DREGu16((Opcode >> 0) & 7) = res; |
| 37416 | flag_V = 0; |
| 37417 | { |
| 37418 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
| 37419 | src &= msk; |
| 37420 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
| 37421 | } |
| 37422 | RET(6) |
| 37423 | } |
| 37424 | |
| 37425 | // ASLk |
| 37426 | OPCODE(0xE180) |
| 37427 | { |
| 37428 | u32 adr, res; |
| 37429 | u32 src, dst; |
| 37430 | |
| 37431 | u32 sft; |
| 37432 | |
| 37433 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37434 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37435 | src = DREGu32((Opcode >> 0) & 7); |
| 37436 | flag_X = flag_C = src >> (24 - sft); |
| 37437 | res = src << sft; |
| 37438 | flag_N = res >> 24; |
| 37439 | flag_NotZ = res & 0xFFFFFFFF; |
| 37440 | DREGu32((Opcode >> 0) & 7) = res; |
| 37441 | flag_V = 0; |
| 37442 | { |
| 37443 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
| 37444 | src &= msk; |
| 37445 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
| 37446 | } |
| 37447 | RET(8) |
| 37448 | } |
| 37449 | |
| 37450 | // LSLk |
| 37451 | OPCODE(0xE108) |
| 37452 | { |
| 37453 | u32 adr, res; |
| 37454 | u32 src, dst; |
| 37455 | |
| 37456 | u32 sft; |
| 37457 | |
| 37458 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37459 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37460 | src = DREGu8((Opcode >> 0) & 7); |
| 37461 | flag_V = 0; |
| 37462 | flag_X = flag_C = src << (0 + sft); |
| 37463 | res = src << sft; |
| 37464 | flag_N = res >> 0; |
| 37465 | flag_NotZ = res & 0x000000FF; |
| 37466 | DREGu8((Opcode >> 0) & 7) = res; |
| 37467 | RET(6) |
| 37468 | } |
| 37469 | |
| 37470 | // LSLk |
| 37471 | OPCODE(0xE148) |
| 37472 | { |
| 37473 | u32 adr, res; |
| 37474 | u32 src, dst; |
| 37475 | |
| 37476 | u32 sft; |
| 37477 | |
| 37478 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37479 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37480 | src = DREGu16((Opcode >> 0) & 7); |
| 37481 | flag_V = 0; |
| 37482 | flag_X = flag_C = src >> (8 - sft); |
| 37483 | res = src << sft; |
| 37484 | flag_N = res >> 8; |
| 37485 | flag_NotZ = res & 0x0000FFFF; |
| 37486 | DREGu16((Opcode >> 0) & 7) = res; |
| 37487 | RET(6) |
| 37488 | } |
| 37489 | |
| 37490 | // LSLk |
| 37491 | OPCODE(0xE188) |
| 37492 | { |
| 37493 | u32 adr, res; |
| 37494 | u32 src, dst; |
| 37495 | |
| 37496 | u32 sft; |
| 37497 | |
| 37498 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37499 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37500 | src = DREGu32((Opcode >> 0) & 7); |
| 37501 | flag_V = 0; |
| 37502 | flag_X = flag_C = src >> (24 - sft); |
| 37503 | res = src << sft; |
| 37504 | flag_N = res >> 24; |
| 37505 | flag_NotZ = res & 0xFFFFFFFF; |
| 37506 | DREGu32((Opcode >> 0) & 7) = res; |
| 37507 | RET(8) |
| 37508 | } |
| 37509 | |
| 37510 | // ROXLk |
| 37511 | OPCODE(0xE110) |
| 37512 | { |
| 37513 | u32 adr, res; |
| 37514 | u32 src, dst; |
| 37515 | |
| 37516 | u32 sft; |
| 37517 | |
| 37518 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37519 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37520 | src = DREGu8((Opcode >> 0) & 7); |
| 37521 | src |= (flag_X & M68K_SR_X) << 0; |
| 37522 | res = (src << sft) | (src >> (9 - sft)); |
| 37523 | flag_X = flag_C = res >> 0; |
| 37524 | flag_V = 0; |
| 37525 | flag_N = res >> 0; |
| 37526 | flag_NotZ = res & 0x000000FF; |
| 37527 | DREGu8((Opcode >> 0) & 7) = res; |
| 37528 | RET(6) |
| 37529 | } |
| 37530 | |
| 37531 | // ROXLk |
| 37532 | OPCODE(0xE150) |
| 37533 | { |
| 37534 | u32 adr, res; |
| 37535 | u32 src, dst; |
| 37536 | |
| 37537 | u32 sft; |
| 37538 | |
| 37539 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37540 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37541 | src = DREGu16((Opcode >> 0) & 7); |
| 37542 | src |= (flag_X & M68K_SR_X) << 8; |
| 37543 | res = (src << sft) | (src >> (17 - sft)); |
| 37544 | flag_X = flag_C = res >> 8; |
| 37545 | flag_V = 0; |
| 37546 | flag_N = res >> 8; |
| 37547 | flag_NotZ = res & 0x0000FFFF; |
| 37548 | DREGu16((Opcode >> 0) & 7) = res; |
| 37549 | RET(6) |
| 37550 | } |
| 37551 | |
| 37552 | // ROXLk |
| 37553 | OPCODE(0xE190) |
| 37554 | { |
| 37555 | u32 adr, res; |
| 37556 | u32 src, dst; |
| 37557 | |
| 37558 | u32 sft; |
| 37559 | |
| 37560 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37561 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37562 | src = DREGu32((Opcode >> 0) & 7); |
| 37563 | flag_C = src >> ((32 - M68K_SR_C_SFT) - sft); |
| 37564 | if (sft == 1) res = (src << 1) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - 1)); |
| 37565 | else res = (src << sft) | (src >> (33 - sft)) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - sft)); |
| 37566 | flag_X = flag_C; |
| 37567 | flag_V = 0; |
| 37568 | flag_N = res >> 24; |
| 37569 | flag_NotZ = res; |
| 37570 | DREGu32((Opcode >> 0) & 7) = res; |
| 37571 | RET(8) |
| 37572 | } |
| 37573 | |
| 37574 | // ROLk |
| 37575 | OPCODE(0xE118) |
| 37576 | { |
| 37577 | u32 adr, res; |
| 37578 | u32 src, dst; |
| 37579 | |
| 37580 | u32 sft; |
| 37581 | |
| 37582 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37583 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37584 | src = DREGu8((Opcode >> 0) & 7); |
| 37585 | flag_V = 0; |
| 37586 | flag_C = src << (0 + sft); |
| 37587 | res = (src << sft) | (src >> (8 - sft)); |
| 37588 | flag_N = res >> 0; |
| 37589 | flag_NotZ = res & 0x000000FF; |
| 37590 | DREGu8((Opcode >> 0) & 7) = res; |
| 37591 | RET(6) |
| 37592 | } |
| 37593 | |
| 37594 | // ROLk |
| 37595 | OPCODE(0xE158) |
| 37596 | { |
| 37597 | u32 adr, res; |
| 37598 | u32 src, dst; |
| 37599 | |
| 37600 | u32 sft; |
| 37601 | |
| 37602 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37603 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37604 | src = DREGu16((Opcode >> 0) & 7); |
| 37605 | flag_V = 0; |
| 37606 | flag_C = src >> (8 - sft); |
| 37607 | res = (src << sft) | (src >> (16 - sft)); |
| 37608 | flag_N = res >> 8; |
| 37609 | flag_NotZ = res & 0x0000FFFF; |
| 37610 | DREGu16((Opcode >> 0) & 7) = res; |
| 37611 | RET(6) |
| 37612 | } |
| 37613 | |
| 37614 | // ROLk |
| 37615 | OPCODE(0xE198) |
| 37616 | { |
| 37617 | u32 adr, res; |
| 37618 | u32 src, dst; |
| 37619 | |
| 37620 | u32 sft; |
| 37621 | |
| 37622 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
| 37623 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37624 | src = DREGu32((Opcode >> 0) & 7); |
| 37625 | flag_V = 0; |
| 37626 | flag_C = src >> (24 - sft); |
| 37627 | res = (src << sft) | (src >> (32 - sft)); |
| 37628 | flag_N = res >> 24; |
| 37629 | flag_NotZ = res; |
| 37630 | DREGu32((Opcode >> 0) & 7) = res; |
| 37631 | RET(8) |
| 37632 | } |
| 37633 | |
| 37634 | // ASRD |
| 37635 | OPCODE(0xE020) |
| 37636 | { |
| 37637 | u32 adr, res; |
| 37638 | u32 src, dst; |
| 37639 | |
| 37640 | u32 sft; |
| 37641 | |
| 37642 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 37643 | src = (s32)DREGs8((Opcode >> 0) & 7); |
| 37644 | if (sft) |
| 37645 | { |
| 37646 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37647 | if (sft < 8) |
| 37648 | { |
| 37649 | flag_V = 0; |
| 37650 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37651 | res = ((s32)src) >> sft; |
| 37652 | flag_N = res >> 0; |
| 37653 | flag_NotZ = res; |
| 37654 | DREGu8((Opcode >> 0) & 7) = res; |
| 37655 | RET(6) |
| 37656 | } |
| 37657 | |
| 37658 | if (src & (1 << 7)) |
| 37659 | { |
| 37660 | flag_N = M68K_SR_N; |
| 37661 | flag_NotZ = 1; |
| 37662 | flag_V = 0; |
| 37663 | flag_C = M68K_SR_C; |
| 37664 | flag_X = M68K_SR_X; |
| 37665 | res = 0x000000FF; |
| 37666 | DREGu8((Opcode >> 0) & 7) = res; |
| 37667 | RET(6) |
| 37668 | } |
| 37669 | |
| 37670 | flag_N = 0; |
| 37671 | flag_NotZ = 0; |
| 37672 | flag_V = 0; |
| 37673 | flag_C = 0; |
| 37674 | flag_X = 0; |
| 37675 | res = 0; |
| 37676 | DREGu8((Opcode >> 0) & 7) = res; |
| 37677 | RET(6) |
| 37678 | } |
| 37679 | |
| 37680 | flag_V = 0; |
| 37681 | flag_C = 0; |
| 37682 | flag_N = src >> 0; |
| 37683 | flag_NotZ = src; |
| 37684 | RET(6) |
| 37685 | } |
| 37686 | |
| 37687 | // ASRD |
| 37688 | OPCODE(0xE060) |
| 37689 | { |
| 37690 | u32 adr, res; |
| 37691 | u32 src, dst; |
| 37692 | |
| 37693 | u32 sft; |
| 37694 | |
| 37695 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 37696 | src = (s32)DREGs16((Opcode >> 0) & 7); |
| 37697 | if (sft) |
| 37698 | { |
| 37699 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37700 | if (sft < 16) |
| 37701 | { |
| 37702 | flag_V = 0; |
| 37703 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
| 37704 | res = ((s32)src) >> sft; |
| 37705 | flag_N = res >> 8; |
| 37706 | flag_NotZ = res; |
| 37707 | DREGu16((Opcode >> 0) & 7) = res; |
| 37708 | RET(6) |
| 37709 | } |
| 37710 | |
| 37711 | if (src & (1 << 15)) |
| 37712 | { |
| 37713 | flag_N = M68K_SR_N; |
| 37714 | flag_NotZ = 1; |
| 37715 | flag_V = 0; |
| 37716 | flag_C = M68K_SR_C; |
| 37717 | flag_X = M68K_SR_X; |
| 37718 | res = 0x0000FFFF; |
| 37719 | DREGu16((Opcode >> 0) & 7) = res; |
| 37720 | RET(6) |
| 37721 | } |
| 37722 | |
| 37723 | flag_N = 0; |
| 37724 | flag_NotZ = 0; |
| 37725 | flag_V = 0; |
| 37726 | flag_C = 0; |
| 37727 | flag_X = 0; |
| 37728 | res = 0; |
| 37729 | DREGu16((Opcode >> 0) & 7) = res; |
| 37730 | RET(6) |
| 37731 | } |
| 37732 | |
| 37733 | flag_V = 0; |
| 37734 | flag_C = 0; |
| 37735 | flag_N = src >> 8; |
| 37736 | flag_NotZ = src; |
| 37737 | RET(6) |
| 37738 | } |
| 37739 | |
| 37740 | // ASRD |
| 37741 | OPCODE(0xE0A0) |
| 37742 | { |
| 37743 | #ifdef USE_CYCLONE_TIMING |
| 37744 | #define CYC 8 |
| 37745 | #else |
| 37746 | #define CYC 6 |
| 37747 | #endif |
| 37748 | u32 adr, res; |
| 37749 | u32 src, dst; |
| 37750 | |
| 37751 | u32 sft; |
| 37752 | |
| 37753 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 37754 | src = (s32)DREGs32((Opcode >> 0) & 7); |
| 37755 | if (sft) |
| 37756 | { |
| 37757 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37758 | if (sft < 32) |
| 37759 | { |
| 37760 | flag_V = 0; |
| 37761 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
| 37762 | res = ((s32)src) >> sft; |
| 37763 | flag_N = res >> 24; |
| 37764 | flag_NotZ = res; |
| 37765 | DREGu32((Opcode >> 0) & 7) = res; |
| 37766 | RET(CYC) |
| 37767 | } |
| 37768 | |
| 37769 | if (src & (1 << 31)) |
| 37770 | { |
| 37771 | flag_N = M68K_SR_N; |
| 37772 | flag_NotZ = 1; |
| 37773 | flag_V = 0; |
| 37774 | flag_C = M68K_SR_C; |
| 37775 | flag_X = M68K_SR_X; |
| 37776 | res = 0xFFFFFFFF; |
| 37777 | DREGu32((Opcode >> 0) & 7) = res; |
| 37778 | RET(CYC) |
| 37779 | } |
| 37780 | |
| 37781 | flag_N = 0; |
| 37782 | flag_NotZ = 0; |
| 37783 | flag_V = 0; |
| 37784 | flag_C = 0; |
| 37785 | flag_X = 0; |
| 37786 | res = 0; |
| 37787 | DREGu32((Opcode >> 0) & 7) = res; |
| 37788 | RET(CYC) |
| 37789 | } |
| 37790 | |
| 37791 | flag_V = 0; |
| 37792 | flag_C = 0; |
| 37793 | flag_N = src >> 24; |
| 37794 | flag_NotZ = src; |
| 37795 | RET(CYC) |
| 37796 | #undef CYC |
| 37797 | } |
| 37798 | |
| 37799 | // LSRD |
| 37800 | OPCODE(0xE028) |
| 37801 | { |
| 37802 | u32 adr, res; |
| 37803 | u32 src, dst; |
| 37804 | |
| 37805 | u32 sft; |
| 37806 | |
| 37807 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 37808 | src = DREGu8((Opcode >> 0) & 7); |
| 37809 | if (sft) |
| 37810 | { |
| 37811 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37812 | if (sft <= 8) |
| 37813 | { |
| 37814 | flag_N = flag_V = 0; |
| 37815 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
| 37816 | res = src >> sft; |
| 37817 | flag_NotZ = res; |
| 37818 | DREGu8((Opcode >> 0) & 7) = res; |
| 37819 | RET(6) |
| 37820 | } |
| 37821 | |
| 37822 | flag_X = flag_C = 0; |
| 37823 | flag_N = 0; |
| 37824 | flag_NotZ = 0; |
| 37825 | flag_V = 0; |
| 37826 | res = 0; |
| 37827 | DREGu8((Opcode >> 0) & 7) = res; |
| 37828 | RET(6) |
| 37829 | } |
| 37830 | |
| 37831 | flag_V = 0; |
| 37832 | flag_C = 0; |
| 37833 | flag_N = src >> 0; |
| 37834 | flag_NotZ = src; |
| 37835 | RET(6) |
| 37836 | } |
| 37837 | |
| 37838 | // LSRD |
| 37839 | OPCODE(0xE068) |
| 37840 | { |
| 37841 | u32 adr, res; |
| 37842 | u32 src, dst; |
| 37843 | |
| 37844 | u32 sft; |
| 37845 | |
| 37846 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 37847 | src = DREGu16((Opcode >> 0) & 7); |
| 37848 | if (sft) |
| 37849 | { |
| 37850 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37851 | if (sft <= 16) |
| 37852 | { |
| 37853 | flag_N = flag_V = 0; |
| 37854 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
| 37855 | res = src >> sft; |
| 37856 | flag_NotZ = res; |
| 37857 | DREGu16((Opcode >> 0) & 7) = res; |
| 37858 | RET(6) |
| 37859 | } |
| 37860 | |
| 37861 | flag_X = flag_C = 0; |
| 37862 | flag_N = 0; |
| 37863 | flag_NotZ = 0; |
| 37864 | flag_V = 0; |
| 37865 | res = 0; |
| 37866 | DREGu16((Opcode >> 0) & 7) = res; |
| 37867 | RET(6) |
| 37868 | } |
| 37869 | |
| 37870 | flag_V = 0; |
| 37871 | flag_C = 0; |
| 37872 | flag_N = src >> 8; |
| 37873 | flag_NotZ = src; |
| 37874 | RET(6) |
| 37875 | } |
| 37876 | |
| 37877 | // LSRD |
| 37878 | OPCODE(0xE0A8) |
| 37879 | { |
| 37880 | #ifdef USE_CYCLONE_TIMING |
| 37881 | #define CYC 8 |
| 37882 | #else |
| 37883 | #define CYC 6 |
| 37884 | #endif |
| 37885 | u32 adr, res; |
| 37886 | u32 src, dst; |
| 37887 | |
| 37888 | u32 sft; |
| 37889 | |
| 37890 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 37891 | src = DREGu32((Opcode >> 0) & 7); |
| 37892 | if (sft) |
| 37893 | { |
| 37894 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37895 | if (sft < 32) |
| 37896 | { |
| 37897 | flag_N = flag_V = 0; |
| 37898 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
| 37899 | res = src >> sft; |
| 37900 | flag_NotZ = res; |
| 37901 | DREGu32((Opcode >> 0) & 7) = res; |
| 37902 | RET(CYC) |
| 37903 | } |
| 37904 | |
| 37905 | if (sft == 32) flag_C = src >> (31 - M68K_SR_C_SFT); |
| 37906 | else flag_C = 0; |
| 37907 | flag_X = flag_C; |
| 37908 | flag_N = 0; |
| 37909 | flag_NotZ = 0; |
| 37910 | flag_V = 0; |
| 37911 | res = 0; |
| 37912 | DREGu32((Opcode >> 0) & 7) = res; |
| 37913 | RET(CYC) |
| 37914 | } |
| 37915 | |
| 37916 | flag_V = 0; |
| 37917 | flag_C = 0; |
| 37918 | flag_N = src >> 24; |
| 37919 | flag_NotZ = src; |
| 37920 | RET(CYC) |
| 37921 | #undef CYC |
| 37922 | } |
| 37923 | |
| 37924 | // ROXRD |
| 37925 | OPCODE(0xE030) |
| 37926 | { |
| 37927 | u32 adr, res; |
| 37928 | u32 src, dst; |
| 37929 | |
| 37930 | u32 sft; |
| 37931 | |
| 37932 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 37933 | src = DREGu8((Opcode >> 0) & 7); |
| 37934 | if (sft) |
| 37935 | { |
| 37936 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37937 | sft %= 9; |
| 37938 | |
| 37939 | src |= (flag_X & M68K_SR_X) << 0; |
| 37940 | res = (src >> sft) | (src << (9 - sft)); |
| 37941 | flag_X = flag_C = res >> 0; |
| 37942 | flag_V = 0; |
| 37943 | flag_N = res >> 0; |
| 37944 | flag_NotZ = res & 0x000000FF; |
| 37945 | DREGu8((Opcode >> 0) & 7) = res; |
| 37946 | RET(6) |
| 37947 | } |
| 37948 | |
| 37949 | flag_V = 0; |
| 37950 | flag_C = flag_X; |
| 37951 | flag_N = src >> 0; |
| 37952 | flag_NotZ = src; |
| 37953 | RET(6) |
| 37954 | } |
| 37955 | |
| 37956 | // ROXRD |
| 37957 | OPCODE(0xE070) |
| 37958 | { |
| 37959 | u32 adr, res; |
| 37960 | u32 src, dst; |
| 37961 | |
| 37962 | u32 sft; |
| 37963 | |
| 37964 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 37965 | src = DREGu16((Opcode >> 0) & 7); |
| 37966 | if (sft) |
| 37967 | { |
| 37968 | m68kcontext.io_cycle_counter -= sft * 2; |
| 37969 | sft %= 17; |
| 37970 | |
| 37971 | src |= (flag_X & M68K_SR_X) << 8; |
| 37972 | res = (src >> sft) | (src << (17 - sft)); |
| 37973 | flag_X = flag_C = res >> 8; |
| 37974 | flag_V = 0; |
| 37975 | flag_N = res >> 8; |
| 37976 | flag_NotZ = res & 0x0000FFFF; |
| 37977 | DREGu16((Opcode >> 0) & 7) = res; |
| 37978 | RET(6) |
| 37979 | } |
| 37980 | |
| 37981 | flag_V = 0; |
| 37982 | flag_C = flag_X; |
| 37983 | flag_N = src >> 8; |
| 37984 | flag_NotZ = src; |
| 37985 | RET(6) |
| 37986 | } |
| 37987 | |
| 37988 | // ROXRD |
| 37989 | OPCODE(0xE0B0) |
| 37990 | { |
| 37991 | #ifdef USE_CYCLONE_TIMING |
| 37992 | #define CYC 8 |
| 37993 | #else |
| 37994 | #define CYC 6 |
| 37995 | #endif |
| 37996 | u32 adr, res; |
| 37997 | u32 src, dst; |
| 37998 | |
| 37999 | u32 sft; |
| 38000 | |
| 38001 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38002 | src = DREGu32((Opcode >> 0) & 7); |
| 38003 | if (sft) |
| 38004 | { |
| 38005 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38006 | sft %= 33; |
| 38007 | |
| 38008 | if (sft != 0) |
| 38009 | { |
| 38010 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
| 38011 | else res = (src >> sft) | (src << (33 - sft)) | (((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))) >> (sft - 1)); |
| 38012 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
| 38013 | } |
| 38014 | else res = src; |
| 38015 | flag_C = flag_X; |
| 38016 | flag_V = 0; |
| 38017 | flag_N = res >> 24; |
| 38018 | flag_NotZ = res; |
| 38019 | DREGu32((Opcode >> 0) & 7) = res; |
| 38020 | RET(CYC) |
| 38021 | } |
| 38022 | |
| 38023 | flag_V = 0; |
| 38024 | flag_C = flag_X; |
| 38025 | flag_N = src >> 24; |
| 38026 | flag_NotZ = src; |
| 38027 | RET(CYC) |
| 38028 | #undef CYC |
| 38029 | } |
| 38030 | |
| 38031 | // RORD |
| 38032 | OPCODE(0xE038) |
| 38033 | { |
| 38034 | u32 adr, res; |
| 38035 | u32 src, dst; |
| 38036 | |
| 38037 | u32 sft; |
| 38038 | |
| 38039 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38040 | src = DREGu8((Opcode >> 0) & 7); |
| 38041 | if (sft) |
| 38042 | { |
| 38043 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38044 | sft &= 0x07; |
| 38045 | |
| 38046 | flag_C = src << (M68K_SR_C_SFT - ((sft - 1) & 7)); |
| 38047 | res = (src >> sft) | (src << (8 - sft)); |
| 38048 | flag_V = 0; |
| 38049 | flag_N = res >> 0; |
| 38050 | flag_NotZ = res & 0x000000FF; |
| 38051 | DREGu8((Opcode >> 0) & 7) = res; |
| 38052 | RET(6) |
| 38053 | } |
| 38054 | |
| 38055 | flag_V = 0; |
| 38056 | flag_C = 0; |
| 38057 | flag_N = src >> 0; |
| 38058 | flag_NotZ = src; |
| 38059 | RET(6) |
| 38060 | } |
| 38061 | |
| 38062 | // RORD |
| 38063 | OPCODE(0xE078) |
| 38064 | { |
| 38065 | u32 adr, res; |
| 38066 | u32 src, dst; |
| 38067 | |
| 38068 | u32 sft; |
| 38069 | |
| 38070 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38071 | src = DREGu16((Opcode >> 0) & 7); |
| 38072 | if (sft) |
| 38073 | { |
| 38074 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38075 | sft &= 0x0F; |
| 38076 | |
| 38077 | flag_C = (src >> ((sft - 1) & 15)) << M68K_SR_C_SFT; |
| 38078 | res = (src >> sft) | (src << (16 - sft)); |
| 38079 | flag_V = 0; |
| 38080 | flag_N = res >> 8; |
| 38081 | flag_NotZ = res & 0x0000FFFF; |
| 38082 | DREGu16((Opcode >> 0) & 7) = res; |
| 38083 | RET(6) |
| 38084 | } |
| 38085 | |
| 38086 | flag_V = 0; |
| 38087 | flag_C = 0; |
| 38088 | flag_N = src >> 8; |
| 38089 | flag_NotZ = src; |
| 38090 | RET(6) |
| 38091 | } |
| 38092 | |
| 38093 | // RORD |
| 38094 | OPCODE(0xE0B8) |
| 38095 | { |
| 38096 | #ifdef USE_CYCLONE_TIMING |
| 38097 | #define CYC 8 |
| 38098 | #else |
| 38099 | #define CYC 6 |
| 38100 | #endif |
| 38101 | u32 adr, res; |
| 38102 | u32 src, dst; |
| 38103 | |
| 38104 | u32 sft; |
| 38105 | |
| 38106 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38107 | src = DREGu32((Opcode >> 0) & 7); |
| 38108 | if (sft) |
| 38109 | { |
| 38110 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38111 | sft &= 0x1F; |
| 38112 | |
| 38113 | flag_C = (src >> ((sft - 1) & 31)) << M68K_SR_C_SFT; |
| 38114 | res = (src >> sft) | (src << (32 - sft)); |
| 38115 | flag_V = 0; |
| 38116 | flag_N = res >> 24; |
| 38117 | flag_NotZ = res; |
| 38118 | DREGu32((Opcode >> 0) & 7) = res; |
| 38119 | RET(CYC) |
| 38120 | } |
| 38121 | |
| 38122 | flag_V = 0; |
| 38123 | flag_C = 0; |
| 38124 | flag_N = src >> 24; |
| 38125 | flag_NotZ = src; |
| 38126 | RET(CYC) |
| 38127 | #undef CYC |
| 38128 | } |
| 38129 | |
| 38130 | // ASLD |
| 38131 | OPCODE(0xE120) |
| 38132 | { |
| 38133 | u32 adr, res; |
| 38134 | u32 src, dst; |
| 38135 | |
| 38136 | u32 sft; |
| 38137 | |
| 38138 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38139 | src = DREGu8((Opcode >> 0) & 7); |
| 38140 | if (sft) |
| 38141 | { |
| 38142 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38143 | if (sft < 8) |
| 38144 | { |
| 38145 | flag_X = flag_C = (src << sft) >> 0; |
| 38146 | res = (src << sft) & 0x000000FF; |
| 38147 | flag_N = res >> 0; |
| 38148 | flag_NotZ = res; |
| 38149 | DREGu8((Opcode >> 0) & 7) = res; |
| 38150 | flag_V = 0; |
| 38151 | { |
| 38152 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
| 38153 | src &= msk; |
| 38154 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
| 38155 | } |
| 38156 | RET(6) |
| 38157 | } |
| 38158 | |
| 38159 | if (sft == 256) flag_C = src << M68K_SR_C_SFT; |
| 38160 | else flag_C = 0; |
| 38161 | flag_X = flag_C; |
| 38162 | if (src) flag_V = M68K_SR_V; |
| 38163 | else flag_V = 0; |
| 38164 | res = 0; |
| 38165 | DREGu8((Opcode >> 0) & 7) = res; |
| 38166 | flag_N = 0; |
| 38167 | flag_NotZ = 0; |
| 38168 | RET(6) |
| 38169 | } |
| 38170 | |
| 38171 | flag_V = 0; |
| 38172 | flag_C = 0; |
| 38173 | flag_N = src >> 0; |
| 38174 | flag_NotZ = src; |
| 38175 | RET(6) |
| 38176 | } |
| 38177 | |
| 38178 | // ASLD |
| 38179 | OPCODE(0xE160) |
| 38180 | { |
| 38181 | u32 adr, res; |
| 38182 | u32 src, dst; |
| 38183 | |
| 38184 | u32 sft; |
| 38185 | |
| 38186 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38187 | src = DREGu16((Opcode >> 0) & 7); |
| 38188 | if (sft) |
| 38189 | { |
| 38190 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38191 | if (sft < 16) |
| 38192 | { |
| 38193 | flag_X = flag_C = (src << sft) >> 8; |
| 38194 | res = (src << sft) & 0x0000FFFF; |
| 38195 | flag_N = res >> 8; |
| 38196 | flag_NotZ = res; |
| 38197 | DREGu16((Opcode >> 0) & 7) = res; |
| 38198 | flag_V = 0; |
| 38199 | { |
| 38200 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
| 38201 | src &= msk; |
| 38202 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
| 38203 | } |
| 38204 | RET(6) |
| 38205 | } |
| 38206 | |
| 38207 | if (sft == 65536) flag_C = src << M68K_SR_C_SFT; |
| 38208 | else flag_C = 0; |
| 38209 | flag_X = flag_C; |
| 38210 | if (src) flag_V = M68K_SR_V; |
| 38211 | else flag_V = 0; |
| 38212 | res = 0; |
| 38213 | DREGu16((Opcode >> 0) & 7) = res; |
| 38214 | flag_N = 0; |
| 38215 | flag_NotZ = 0; |
| 38216 | RET(6) |
| 38217 | } |
| 38218 | |
| 38219 | flag_V = 0; |
| 38220 | flag_C = 0; |
| 38221 | flag_N = src >> 8; |
| 38222 | flag_NotZ = src; |
| 38223 | RET(6) |
| 38224 | } |
| 38225 | |
| 38226 | // ASLD |
| 38227 | OPCODE(0xE1A0) |
| 38228 | { |
| 38229 | #ifdef USE_CYCLONE_TIMING |
| 38230 | #define CYC 8 |
| 38231 | #else |
| 38232 | #define CYC 6 |
| 38233 | #endif |
| 38234 | u32 adr, res; |
| 38235 | u32 src, dst; |
| 38236 | |
| 38237 | u32 sft; |
| 38238 | |
| 38239 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38240 | src = DREGu32((Opcode >> 0) & 7); |
| 38241 | if (sft) |
| 38242 | { |
| 38243 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38244 | if (sft < 32) |
| 38245 | { |
| 38246 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
| 38247 | res = src << sft; |
| 38248 | flag_N = res >> 24; |
| 38249 | flag_NotZ = res; |
| 38250 | DREGu32((Opcode >> 0) & 7) = res; |
| 38251 | flag_V = 0; |
| 38252 | { |
| 38253 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
| 38254 | src &= msk; |
| 38255 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
| 38256 | } |
| 38257 | RET(CYC) |
| 38258 | } |
| 38259 | |
| 38260 | if (sft == 0) flag_C = src << M68K_SR_C_SFT; |
| 38261 | else flag_C = 0; |
| 38262 | flag_X = flag_C; |
| 38263 | if (src) flag_V = M68K_SR_V; |
| 38264 | else flag_V = 0; |
| 38265 | res = 0; |
| 38266 | DREGu32((Opcode >> 0) & 7) = res; |
| 38267 | flag_N = 0; |
| 38268 | flag_NotZ = 0; |
| 38269 | RET(CYC) |
| 38270 | } |
| 38271 | |
| 38272 | flag_V = 0; |
| 38273 | flag_C = 0; |
| 38274 | flag_N = src >> 24; |
| 38275 | flag_NotZ = src; |
| 38276 | RET(CYC) |
| 38277 | #undef CYC |
| 38278 | } |
| 38279 | |
| 38280 | // LSLD |
| 38281 | OPCODE(0xE128) |
| 38282 | { |
| 38283 | u32 adr, res; |
| 38284 | u32 src, dst; |
| 38285 | |
| 38286 | u32 sft; |
| 38287 | |
| 38288 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38289 | src = DREGu8((Opcode >> 0) & 7); |
| 38290 | if (sft) |
| 38291 | { |
| 38292 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38293 | if (sft <= 8) |
| 38294 | { |
| 38295 | flag_X = flag_C = (src << sft) >> 0; |
| 38296 | res = (src << sft) & 0x000000FF; |
| 38297 | flag_V = 0; |
| 38298 | flag_N = res >> 0; |
| 38299 | flag_NotZ = res; |
| 38300 | DREGu8((Opcode >> 0) & 7) = res; |
| 38301 | RET(6) |
| 38302 | } |
| 38303 | |
| 38304 | flag_X = flag_C = 0; |
| 38305 | flag_N = 0; |
| 38306 | flag_NotZ = 0; |
| 38307 | flag_V = 0; |
| 38308 | res = 0; |
| 38309 | DREGu8((Opcode >> 0) & 7) = res; |
| 38310 | RET(6) |
| 38311 | } |
| 38312 | |
| 38313 | flag_V = 0; |
| 38314 | flag_C = 0; |
| 38315 | flag_N = src >> 0; |
| 38316 | flag_NotZ = src; |
| 38317 | RET(6) |
| 38318 | } |
| 38319 | |
| 38320 | // LSLD |
| 38321 | OPCODE(0xE168) |
| 38322 | { |
| 38323 | u32 adr, res; |
| 38324 | u32 src, dst; |
| 38325 | |
| 38326 | u32 sft; |
| 38327 | |
| 38328 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38329 | src = DREGu16((Opcode >> 0) & 7); |
| 38330 | if (sft) |
| 38331 | { |
| 38332 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38333 | if (sft <= 16) |
| 38334 | { |
| 38335 | flag_X = flag_C = (src << sft) >> 8; |
| 38336 | res = (src << sft) & 0x0000FFFF; |
| 38337 | flag_V = 0; |
| 38338 | flag_N = res >> 8; |
| 38339 | flag_NotZ = res; |
| 38340 | DREGu16((Opcode >> 0) & 7) = res; |
| 38341 | RET(6) |
| 38342 | } |
| 38343 | |
| 38344 | flag_X = flag_C = 0; |
| 38345 | flag_N = 0; |
| 38346 | flag_NotZ = 0; |
| 38347 | flag_V = 0; |
| 38348 | res = 0; |
| 38349 | DREGu16((Opcode >> 0) & 7) = res; |
| 38350 | RET(6) |
| 38351 | } |
| 38352 | |
| 38353 | flag_V = 0; |
| 38354 | flag_C = 0; |
| 38355 | flag_N = src >> 8; |
| 38356 | flag_NotZ = src; |
| 38357 | RET(6) |
| 38358 | } |
| 38359 | |
| 38360 | // LSLD |
| 38361 | OPCODE(0xE1A8) |
| 38362 | { |
| 38363 | #ifdef USE_CYCLONE_TIMING |
| 38364 | #define CYC 8 |
| 38365 | #else |
| 38366 | #define CYC 6 |
| 38367 | #endif |
| 38368 | u32 adr, res; |
| 38369 | u32 src, dst; |
| 38370 | |
| 38371 | u32 sft; |
| 38372 | |
| 38373 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38374 | src = DREGu32((Opcode >> 0) & 7); |
| 38375 | if (sft) |
| 38376 | { |
| 38377 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38378 | if (sft < 32) |
| 38379 | { |
| 38380 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
| 38381 | res = src << sft; |
| 38382 | flag_V = 0; |
| 38383 | flag_N = res >> 24; |
| 38384 | flag_NotZ = res; |
| 38385 | DREGu32((Opcode >> 0) & 7) = res; |
| 38386 | RET(CYC) |
| 38387 | } |
| 38388 | |
| 38389 | if (sft == 32) flag_C = src << M68K_SR_C_SFT; |
| 38390 | else flag_C = 0; |
| 38391 | flag_X = flag_C; |
| 38392 | flag_N = 0; |
| 38393 | flag_NotZ = 0; |
| 38394 | flag_V = 0; |
| 38395 | res = 0; |
| 38396 | DREGu32((Opcode >> 0) & 7) = res; |
| 38397 | RET(CYC) |
| 38398 | } |
| 38399 | |
| 38400 | flag_V = 0; |
| 38401 | flag_C = 0; |
| 38402 | flag_N = src >> 24; |
| 38403 | flag_NotZ = src; |
| 38404 | RET(CYC) |
| 38405 | #undef CYC |
| 38406 | } |
| 38407 | |
| 38408 | // ROXLD |
| 38409 | OPCODE(0xE130) |
| 38410 | { |
| 38411 | u32 adr, res; |
| 38412 | u32 src, dst; |
| 38413 | |
| 38414 | u32 sft; |
| 38415 | |
| 38416 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38417 | src = DREGu8((Opcode >> 0) & 7); |
| 38418 | if (sft) |
| 38419 | { |
| 38420 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38421 | sft %= 9; |
| 38422 | |
| 38423 | src |= (flag_X & M68K_SR_X) << 0; |
| 38424 | res = (src << sft) | (src >> (9 - sft)); |
| 38425 | flag_X = flag_C = res >> 0; |
| 38426 | flag_V = 0; |
| 38427 | flag_N = res >> 0; |
| 38428 | flag_NotZ = res & 0x000000FF; |
| 38429 | DREGu8((Opcode >> 0) & 7) = res; |
| 38430 | RET(6) |
| 38431 | } |
| 38432 | |
| 38433 | flag_V = 0; |
| 38434 | flag_C = flag_X; |
| 38435 | flag_N = src >> 0; |
| 38436 | flag_NotZ = src; |
| 38437 | RET(6) |
| 38438 | } |
| 38439 | |
| 38440 | // ROXLD |
| 38441 | OPCODE(0xE170) |
| 38442 | { |
| 38443 | u32 adr, res; |
| 38444 | u32 src, dst; |
| 38445 | |
| 38446 | u32 sft; |
| 38447 | |
| 38448 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38449 | src = DREGu16((Opcode >> 0) & 7); |
| 38450 | if (sft) |
| 38451 | { |
| 38452 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38453 | sft %= 17; |
| 38454 | |
| 38455 | src |= (flag_X & M68K_SR_X) << 8; |
| 38456 | res = (src << sft) | (src >> (17 - sft)); |
| 38457 | flag_X = flag_C = res >> 8; |
| 38458 | flag_V = 0; |
| 38459 | flag_N = res >> 8; |
| 38460 | flag_NotZ = res & 0x0000FFFF; |
| 38461 | DREGu16((Opcode >> 0) & 7) = res; |
| 38462 | RET(6) |
| 38463 | } |
| 38464 | |
| 38465 | flag_V = 0; |
| 38466 | flag_C = flag_X; |
| 38467 | flag_N = src >> 8; |
| 38468 | flag_NotZ = src; |
| 38469 | RET(6) |
| 38470 | } |
| 38471 | |
| 38472 | // ROXLD |
| 38473 | OPCODE(0xE1B0) |
| 38474 | { |
| 38475 | #ifdef USE_CYCLONE_TIMING |
| 38476 | #define CYC 8 |
| 38477 | #else |
| 38478 | #define CYC 6 |
| 38479 | #endif |
| 38480 | u32 adr, res; |
| 38481 | u32 src, dst; |
| 38482 | |
| 38483 | u32 sft; |
| 38484 | |
| 38485 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38486 | src = DREGu32((Opcode >> 0) & 7); |
| 38487 | if (sft) |
| 38488 | { |
| 38489 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38490 | sft %= 33; |
| 38491 | |
| 38492 | if (sft != 0) |
| 38493 | { |
| 38494 | if (sft == 1) res = (src << 1) | ((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1); |
| 38495 | else res = (src << sft) | (src >> (33 - sft)) | (((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1) << (sft - 1)); |
| 38496 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
| 38497 | } |
| 38498 | else res = src; |
| 38499 | flag_C = flag_X; |
| 38500 | flag_V = 0; |
| 38501 | flag_N = res >> 24; |
| 38502 | flag_NotZ = res; |
| 38503 | DREGu32((Opcode >> 0) & 7) = res; |
| 38504 | RET(CYC) |
| 38505 | } |
| 38506 | |
| 38507 | flag_V = 0; |
| 38508 | flag_C = flag_X; |
| 38509 | flag_N = src >> 24; |
| 38510 | flag_NotZ = src; |
| 38511 | RET(CYC) |
| 38512 | #undef CYC |
| 38513 | } |
| 38514 | |
| 38515 | // ROLD |
| 38516 | OPCODE(0xE138) |
| 38517 | { |
| 38518 | u32 adr, res; |
| 38519 | u32 src, dst; |
| 38520 | |
| 38521 | u32 sft; |
| 38522 | |
| 38523 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38524 | src = DREGu8((Opcode >> 0) & 7); |
| 38525 | if (sft) |
| 38526 | { |
| 38527 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38528 | if (sft &= 0x07) |
| 38529 | { |
| 38530 | flag_C = (src << sft) >> 0; |
| 38531 | res = ((src << sft) | (src >> (8 - sft))) & 0x000000FF; |
| 38532 | flag_V = 0; |
| 38533 | flag_N = res >> 0; |
| 38534 | flag_NotZ = res; |
| 38535 | DREGu8((Opcode >> 0) & 7) = res; |
| 38536 | RET(6) |
| 38537 | } |
| 38538 | |
| 38539 | flag_V = 0; |
| 38540 | flag_C = src << M68K_SR_C_SFT; |
| 38541 | flag_N = src >> 0; |
| 38542 | flag_NotZ = src; |
| 38543 | RET(6) |
| 38544 | } |
| 38545 | |
| 38546 | flag_V = 0; |
| 38547 | flag_C = 0; |
| 38548 | flag_N = src >> 0; |
| 38549 | flag_NotZ = src; |
| 38550 | RET(6) |
| 38551 | } |
| 38552 | |
| 38553 | // ROLD |
| 38554 | OPCODE(0xE178) |
| 38555 | { |
| 38556 | u32 adr, res; |
| 38557 | u32 src, dst; |
| 38558 | |
| 38559 | u32 sft; |
| 38560 | |
| 38561 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38562 | src = DREGu16((Opcode >> 0) & 7); |
| 38563 | if (sft) |
| 38564 | { |
| 38565 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38566 | if (sft &= 0x0F) |
| 38567 | { |
| 38568 | flag_C = (src << sft) >> 8; |
| 38569 | res = ((src << sft) | (src >> (16 - sft))) & 0x0000FFFF; |
| 38570 | flag_V = 0; |
| 38571 | flag_N = res >> 8; |
| 38572 | flag_NotZ = res; |
| 38573 | DREGu16((Opcode >> 0) & 7) = res; |
| 38574 | RET(6) |
| 38575 | } |
| 38576 | |
| 38577 | flag_V = 0; |
| 38578 | flag_C = src << M68K_SR_C_SFT; |
| 38579 | flag_N = src >> 8; |
| 38580 | flag_NotZ = src; |
| 38581 | RET(6) |
| 38582 | } |
| 38583 | |
| 38584 | flag_V = 0; |
| 38585 | flag_C = 0; |
| 38586 | flag_N = src >> 8; |
| 38587 | flag_NotZ = src; |
| 38588 | RET(6) |
| 38589 | } |
| 38590 | |
| 38591 | // ROLD |
| 38592 | OPCODE(0xE1B8) |
| 38593 | { |
| 38594 | #ifdef USE_CYCLONE_TIMING |
| 38595 | #define CYC 8 |
| 38596 | #else |
| 38597 | #define CYC 6 |
| 38598 | #endif |
| 38599 | u32 adr, res; |
| 38600 | u32 src, dst; |
| 38601 | |
| 38602 | u32 sft; |
| 38603 | |
| 38604 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
| 38605 | src = DREGu32((Opcode >> 0) & 7); |
| 38606 | if (sft) |
| 38607 | { |
| 38608 | m68kcontext.io_cycle_counter -= sft * 2; |
| 38609 | if (sft &= 0x1F) |
| 38610 | { |
| 38611 | flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
| 38612 | res = (src << sft) | (src >> (32 - sft)); |
| 38613 | flag_V = 0; |
| 38614 | flag_N = res >> 24; |
| 38615 | flag_NotZ = res; |
| 38616 | DREGu32((Opcode >> 0) & 7) = res; |
| 38617 | RET(CYC) |
| 38618 | } |
| 38619 | |
| 38620 | flag_V = 0; |
| 38621 | flag_C = src << M68K_SR_C_SFT; |
| 38622 | flag_N = src >> 24; |
| 38623 | flag_NotZ = src; |
| 38624 | RET(CYC) |
| 38625 | } |
| 38626 | |
| 38627 | flag_V = 0; |
| 38628 | flag_C = 0; |
| 38629 | flag_N = src >> 24; |
| 38630 | flag_NotZ = src; |
| 38631 | RET(CYC) |
| 38632 | #undef CYC |
| 38633 | } |
| 38634 | |
| 38635 | // ASR |
| 38636 | OPCODE(0xE0D0) |
| 38637 | { |
| 38638 | u32 adr, res; |
| 38639 | u32 src, dst; |
| 38640 | |
| 38641 | adr = AREG((Opcode >> 0) & 7); |
| 38642 | PRE_IO |
| 38643 | READ_WORD_F(adr, src) |
| 38644 | flag_V = 0; |
| 38645 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38646 | res = (src >> 1) | (src & (1 << 15)); |
| 38647 | flag_N = res >> 8; |
| 38648 | flag_NotZ = res; |
| 38649 | WRITE_WORD_F(adr, res) |
| 38650 | POST_IO |
| 38651 | RET(12) |
| 38652 | } |
| 38653 | |
| 38654 | // ASR |
| 38655 | OPCODE(0xE0D8) |
| 38656 | { |
| 38657 | u32 adr, res; |
| 38658 | u32 src, dst; |
| 38659 | |
| 38660 | adr = AREG((Opcode >> 0) & 7); |
| 38661 | AREG((Opcode >> 0) & 7) += 2; |
| 38662 | PRE_IO |
| 38663 | READ_WORD_F(adr, src) |
| 38664 | flag_V = 0; |
| 38665 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38666 | res = (src >> 1) | (src & (1 << 15)); |
| 38667 | flag_N = res >> 8; |
| 38668 | flag_NotZ = res; |
| 38669 | WRITE_WORD_F(adr, res) |
| 38670 | POST_IO |
| 38671 | RET(12) |
| 38672 | } |
| 38673 | |
| 38674 | // ASR |
| 38675 | OPCODE(0xE0E0) |
| 38676 | { |
| 38677 | u32 adr, res; |
| 38678 | u32 src, dst; |
| 38679 | |
| 38680 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 38681 | AREG((Opcode >> 0) & 7) = adr; |
| 38682 | PRE_IO |
| 38683 | READ_WORD_F(adr, src) |
| 38684 | flag_V = 0; |
| 38685 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38686 | res = (src >> 1) | (src & (1 << 15)); |
| 38687 | flag_N = res >> 8; |
| 38688 | flag_NotZ = res; |
| 38689 | WRITE_WORD_F(adr, res) |
| 38690 | POST_IO |
| 38691 | RET(14) |
| 38692 | } |
| 38693 | |
| 38694 | // ASR |
| 38695 | OPCODE(0xE0E8) |
| 38696 | { |
| 38697 | u32 adr, res; |
| 38698 | u32 src, dst; |
| 38699 | |
| 38700 | FETCH_SWORD(adr); |
| 38701 | adr += AREG((Opcode >> 0) & 7); |
| 38702 | PRE_IO |
| 38703 | READ_WORD_F(adr, src) |
| 38704 | flag_V = 0; |
| 38705 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38706 | res = (src >> 1) | (src & (1 << 15)); |
| 38707 | flag_N = res >> 8; |
| 38708 | flag_NotZ = res; |
| 38709 | WRITE_WORD_F(adr, res) |
| 38710 | POST_IO |
| 38711 | RET(16) |
| 38712 | } |
| 38713 | |
| 38714 | // ASR |
| 38715 | OPCODE(0xE0F0) |
| 38716 | { |
| 38717 | u32 adr, res; |
| 38718 | u32 src, dst; |
| 38719 | |
| 38720 | adr = AREG((Opcode >> 0) & 7); |
| 38721 | DECODE_EXT_WORD |
| 38722 | PRE_IO |
| 38723 | READ_WORD_F(adr, src) |
| 38724 | flag_V = 0; |
| 38725 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38726 | res = (src >> 1) | (src & (1 << 15)); |
| 38727 | flag_N = res >> 8; |
| 38728 | flag_NotZ = res; |
| 38729 | WRITE_WORD_F(adr, res) |
| 38730 | POST_IO |
| 38731 | RET(18) |
| 38732 | } |
| 38733 | |
| 38734 | // ASR |
| 38735 | OPCODE(0xE0F8) |
| 38736 | { |
| 38737 | u32 adr, res; |
| 38738 | u32 src, dst; |
| 38739 | |
| 38740 | FETCH_SWORD(adr); |
| 38741 | PRE_IO |
| 38742 | READ_WORD_F(adr, src) |
| 38743 | flag_V = 0; |
| 38744 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38745 | res = (src >> 1) | (src & (1 << 15)); |
| 38746 | flag_N = res >> 8; |
| 38747 | flag_NotZ = res; |
| 38748 | WRITE_WORD_F(adr, res) |
| 38749 | POST_IO |
| 38750 | RET(16) |
| 38751 | } |
| 38752 | |
| 38753 | // ASR |
| 38754 | OPCODE(0xE0F9) |
| 38755 | { |
| 38756 | u32 adr, res; |
| 38757 | u32 src, dst; |
| 38758 | |
| 38759 | FETCH_LONG(adr); |
| 38760 | PRE_IO |
| 38761 | READ_WORD_F(adr, src) |
| 38762 | flag_V = 0; |
| 38763 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38764 | res = (src >> 1) | (src & (1 << 15)); |
| 38765 | flag_N = res >> 8; |
| 38766 | flag_NotZ = res; |
| 38767 | WRITE_WORD_F(adr, res) |
| 38768 | POST_IO |
| 38769 | RET(20) |
| 38770 | } |
| 38771 | |
| 38772 | // ASR |
| 38773 | OPCODE(0xE0DF) |
| 38774 | { |
| 38775 | u32 adr, res; |
| 38776 | u32 src, dst; |
| 38777 | |
| 38778 | adr = AREG(7); |
| 38779 | AREG(7) += 2; |
| 38780 | PRE_IO |
| 38781 | READ_WORD_F(adr, src) |
| 38782 | flag_V = 0; |
| 38783 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38784 | res = (src >> 1) | (src & (1 << 15)); |
| 38785 | flag_N = res >> 8; |
| 38786 | flag_NotZ = res; |
| 38787 | WRITE_WORD_F(adr, res) |
| 38788 | POST_IO |
| 38789 | RET(12) |
| 38790 | } |
| 38791 | |
| 38792 | // ASR |
| 38793 | OPCODE(0xE0E7) |
| 38794 | { |
| 38795 | u32 adr, res; |
| 38796 | u32 src, dst; |
| 38797 | |
| 38798 | adr = AREG(7) - 2; |
| 38799 | AREG(7) = adr; |
| 38800 | PRE_IO |
| 38801 | READ_WORD_F(adr, src) |
| 38802 | flag_V = 0; |
| 38803 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38804 | res = (src >> 1) | (src & (1 << 15)); |
| 38805 | flag_N = res >> 8; |
| 38806 | flag_NotZ = res; |
| 38807 | WRITE_WORD_F(adr, res) |
| 38808 | POST_IO |
| 38809 | RET(14) |
| 38810 | } |
| 38811 | |
| 38812 | // LSR |
| 38813 | OPCODE(0xE2D0) |
| 38814 | { |
| 38815 | u32 adr, res; |
| 38816 | u32 src, dst; |
| 38817 | |
| 38818 | adr = AREG((Opcode >> 0) & 7); |
| 38819 | PRE_IO |
| 38820 | READ_WORD_F(adr, src) |
| 38821 | flag_N = flag_V = 0; |
| 38822 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38823 | res = src >> 1; |
| 38824 | flag_NotZ = res; |
| 38825 | WRITE_WORD_F(adr, res) |
| 38826 | POST_IO |
| 38827 | RET(12) |
| 38828 | } |
| 38829 | |
| 38830 | // LSR |
| 38831 | OPCODE(0xE2D8) |
| 38832 | { |
| 38833 | u32 adr, res; |
| 38834 | u32 src, dst; |
| 38835 | |
| 38836 | adr = AREG((Opcode >> 0) & 7); |
| 38837 | AREG((Opcode >> 0) & 7) += 2; |
| 38838 | PRE_IO |
| 38839 | READ_WORD_F(adr, src) |
| 38840 | flag_N = flag_V = 0; |
| 38841 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38842 | res = src >> 1; |
| 38843 | flag_NotZ = res; |
| 38844 | WRITE_WORD_F(adr, res) |
| 38845 | POST_IO |
| 38846 | RET(12) |
| 38847 | } |
| 38848 | |
| 38849 | // LSR |
| 38850 | OPCODE(0xE2E0) |
| 38851 | { |
| 38852 | u32 adr, res; |
| 38853 | u32 src, dst; |
| 38854 | |
| 38855 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 38856 | AREG((Opcode >> 0) & 7) = adr; |
| 38857 | PRE_IO |
| 38858 | READ_WORD_F(adr, src) |
| 38859 | flag_N = flag_V = 0; |
| 38860 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38861 | res = src >> 1; |
| 38862 | flag_NotZ = res; |
| 38863 | WRITE_WORD_F(adr, res) |
| 38864 | POST_IO |
| 38865 | RET(14) |
| 38866 | } |
| 38867 | |
| 38868 | // LSR |
| 38869 | OPCODE(0xE2E8) |
| 38870 | { |
| 38871 | u32 adr, res; |
| 38872 | u32 src, dst; |
| 38873 | |
| 38874 | FETCH_SWORD(adr); |
| 38875 | adr += AREG((Opcode >> 0) & 7); |
| 38876 | PRE_IO |
| 38877 | READ_WORD_F(adr, src) |
| 38878 | flag_N = flag_V = 0; |
| 38879 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38880 | res = src >> 1; |
| 38881 | flag_NotZ = res; |
| 38882 | WRITE_WORD_F(adr, res) |
| 38883 | POST_IO |
| 38884 | RET(16) |
| 38885 | } |
| 38886 | |
| 38887 | // LSR |
| 38888 | OPCODE(0xE2F0) |
| 38889 | { |
| 38890 | u32 adr, res; |
| 38891 | u32 src, dst; |
| 38892 | |
| 38893 | adr = AREG((Opcode >> 0) & 7); |
| 38894 | DECODE_EXT_WORD |
| 38895 | PRE_IO |
| 38896 | READ_WORD_F(adr, src) |
| 38897 | flag_N = flag_V = 0; |
| 38898 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38899 | res = src >> 1; |
| 38900 | flag_NotZ = res; |
| 38901 | WRITE_WORD_F(adr, res) |
| 38902 | POST_IO |
| 38903 | RET(18) |
| 38904 | } |
| 38905 | |
| 38906 | // LSR |
| 38907 | OPCODE(0xE2F8) |
| 38908 | { |
| 38909 | u32 adr, res; |
| 38910 | u32 src, dst; |
| 38911 | |
| 38912 | FETCH_SWORD(adr); |
| 38913 | PRE_IO |
| 38914 | READ_WORD_F(adr, src) |
| 38915 | flag_N = flag_V = 0; |
| 38916 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38917 | res = src >> 1; |
| 38918 | flag_NotZ = res; |
| 38919 | WRITE_WORD_F(adr, res) |
| 38920 | POST_IO |
| 38921 | RET(16) |
| 38922 | } |
| 38923 | |
| 38924 | // LSR |
| 38925 | OPCODE(0xE2F9) |
| 38926 | { |
| 38927 | u32 adr, res; |
| 38928 | u32 src, dst; |
| 38929 | |
| 38930 | FETCH_LONG(adr); |
| 38931 | PRE_IO |
| 38932 | READ_WORD_F(adr, src) |
| 38933 | flag_N = flag_V = 0; |
| 38934 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38935 | res = src >> 1; |
| 38936 | flag_NotZ = res; |
| 38937 | WRITE_WORD_F(adr, res) |
| 38938 | POST_IO |
| 38939 | RET(20) |
| 38940 | } |
| 38941 | |
| 38942 | // LSR |
| 38943 | OPCODE(0xE2DF) |
| 38944 | { |
| 38945 | u32 adr, res; |
| 38946 | u32 src, dst; |
| 38947 | |
| 38948 | adr = AREG(7); |
| 38949 | AREG(7) += 2; |
| 38950 | PRE_IO |
| 38951 | READ_WORD_F(adr, src) |
| 38952 | flag_N = flag_V = 0; |
| 38953 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38954 | res = src >> 1; |
| 38955 | flag_NotZ = res; |
| 38956 | WRITE_WORD_F(adr, res) |
| 38957 | POST_IO |
| 38958 | RET(12) |
| 38959 | } |
| 38960 | |
| 38961 | // LSR |
| 38962 | OPCODE(0xE2E7) |
| 38963 | { |
| 38964 | u32 adr, res; |
| 38965 | u32 src, dst; |
| 38966 | |
| 38967 | adr = AREG(7) - 2; |
| 38968 | AREG(7) = adr; |
| 38969 | PRE_IO |
| 38970 | READ_WORD_F(adr, src) |
| 38971 | flag_N = flag_V = 0; |
| 38972 | flag_X = flag_C = src << M68K_SR_C_SFT; |
| 38973 | res = src >> 1; |
| 38974 | flag_NotZ = res; |
| 38975 | WRITE_WORD_F(adr, res) |
| 38976 | POST_IO |
| 38977 | RET(14) |
| 38978 | } |
| 38979 | |
| 38980 | // ROXR |
| 38981 | OPCODE(0xE4D0) |
| 38982 | { |
| 38983 | u32 adr, res; |
| 38984 | u32 src, dst; |
| 38985 | |
| 38986 | adr = AREG((Opcode >> 0) & 7); |
| 38987 | PRE_IO |
| 38988 | READ_WORD_F(adr, src) |
| 38989 | flag_V = 0; |
| 38990 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 38991 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 38992 | flag_N = res >> 8; |
| 38993 | flag_NotZ = res; |
| 38994 | WRITE_WORD_F(adr, res) |
| 38995 | POST_IO |
| 38996 | RET(12) |
| 38997 | } |
| 38998 | |
| 38999 | // ROXR |
| 39000 | OPCODE(0xE4D8) |
| 39001 | { |
| 39002 | u32 adr, res; |
| 39003 | u32 src, dst; |
| 39004 | |
| 39005 | adr = AREG((Opcode >> 0) & 7); |
| 39006 | AREG((Opcode >> 0) & 7) += 2; |
| 39007 | PRE_IO |
| 39008 | READ_WORD_F(adr, src) |
| 39009 | flag_V = 0; |
| 39010 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 39011 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 39012 | flag_N = res >> 8; |
| 39013 | flag_NotZ = res; |
| 39014 | WRITE_WORD_F(adr, res) |
| 39015 | POST_IO |
| 39016 | RET(12) |
| 39017 | } |
| 39018 | |
| 39019 | // ROXR |
| 39020 | OPCODE(0xE4E0) |
| 39021 | { |
| 39022 | u32 adr, res; |
| 39023 | u32 src, dst; |
| 39024 | |
| 39025 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 39026 | AREG((Opcode >> 0) & 7) = adr; |
| 39027 | PRE_IO |
| 39028 | READ_WORD_F(adr, src) |
| 39029 | flag_V = 0; |
| 39030 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 39031 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 39032 | flag_N = res >> 8; |
| 39033 | flag_NotZ = res; |
| 39034 | WRITE_WORD_F(adr, res) |
| 39035 | POST_IO |
| 39036 | RET(14) |
| 39037 | } |
| 39038 | |
| 39039 | // ROXR |
| 39040 | OPCODE(0xE4E8) |
| 39041 | { |
| 39042 | u32 adr, res; |
| 39043 | u32 src, dst; |
| 39044 | |
| 39045 | FETCH_SWORD(adr); |
| 39046 | adr += AREG((Opcode >> 0) & 7); |
| 39047 | PRE_IO |
| 39048 | READ_WORD_F(adr, src) |
| 39049 | flag_V = 0; |
| 39050 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 39051 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 39052 | flag_N = res >> 8; |
| 39053 | flag_NotZ = res; |
| 39054 | WRITE_WORD_F(adr, res) |
| 39055 | POST_IO |
| 39056 | RET(16) |
| 39057 | } |
| 39058 | |
| 39059 | // ROXR |
| 39060 | OPCODE(0xE4F0) |
| 39061 | { |
| 39062 | u32 adr, res; |
| 39063 | u32 src, dst; |
| 39064 | |
| 39065 | adr = AREG((Opcode >> 0) & 7); |
| 39066 | DECODE_EXT_WORD |
| 39067 | PRE_IO |
| 39068 | READ_WORD_F(adr, src) |
| 39069 | flag_V = 0; |
| 39070 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 39071 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 39072 | flag_N = res >> 8; |
| 39073 | flag_NotZ = res; |
| 39074 | WRITE_WORD_F(adr, res) |
| 39075 | POST_IO |
| 39076 | RET(18) |
| 39077 | } |
| 39078 | |
| 39079 | // ROXR |
| 39080 | OPCODE(0xE4F8) |
| 39081 | { |
| 39082 | u32 adr, res; |
| 39083 | u32 src, dst; |
| 39084 | |
| 39085 | FETCH_SWORD(adr); |
| 39086 | PRE_IO |
| 39087 | READ_WORD_F(adr, src) |
| 39088 | flag_V = 0; |
| 39089 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 39090 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 39091 | flag_N = res >> 8; |
| 39092 | flag_NotZ = res; |
| 39093 | WRITE_WORD_F(adr, res) |
| 39094 | POST_IO |
| 39095 | RET(16) |
| 39096 | } |
| 39097 | |
| 39098 | // ROXR |
| 39099 | OPCODE(0xE4F9) |
| 39100 | { |
| 39101 | u32 adr, res; |
| 39102 | u32 src, dst; |
| 39103 | |
| 39104 | FETCH_LONG(adr); |
| 39105 | PRE_IO |
| 39106 | READ_WORD_F(adr, src) |
| 39107 | flag_V = 0; |
| 39108 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 39109 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 39110 | flag_N = res >> 8; |
| 39111 | flag_NotZ = res; |
| 39112 | WRITE_WORD_F(adr, res) |
| 39113 | POST_IO |
| 39114 | RET(20) |
| 39115 | } |
| 39116 | |
| 39117 | // ROXR |
| 39118 | OPCODE(0xE4DF) |
| 39119 | { |
| 39120 | u32 adr, res; |
| 39121 | u32 src, dst; |
| 39122 | |
| 39123 | adr = AREG(7); |
| 39124 | AREG(7) += 2; |
| 39125 | PRE_IO |
| 39126 | READ_WORD_F(adr, src) |
| 39127 | flag_V = 0; |
| 39128 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 39129 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 39130 | flag_N = res >> 8; |
| 39131 | flag_NotZ = res; |
| 39132 | WRITE_WORD_F(adr, res) |
| 39133 | POST_IO |
| 39134 | RET(12) |
| 39135 | } |
| 39136 | |
| 39137 | // ROXR |
| 39138 | OPCODE(0xE4E7) |
| 39139 | { |
| 39140 | u32 adr, res; |
| 39141 | u32 src, dst; |
| 39142 | |
| 39143 | adr = AREG(7) - 2; |
| 39144 | AREG(7) = adr; |
| 39145 | PRE_IO |
| 39146 | READ_WORD_F(adr, src) |
| 39147 | flag_V = 0; |
| 39148 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
| 39149 | flag_C = flag_X = src << M68K_SR_C_SFT; |
| 39150 | flag_N = res >> 8; |
| 39151 | flag_NotZ = res; |
| 39152 | WRITE_WORD_F(adr, res) |
| 39153 | POST_IO |
| 39154 | RET(14) |
| 39155 | } |
| 39156 | |
| 39157 | // ROR |
| 39158 | OPCODE(0xE6D0) |
| 39159 | { |
| 39160 | u32 adr, res; |
| 39161 | u32 src, dst; |
| 39162 | |
| 39163 | adr = AREG((Opcode >> 0) & 7); |
| 39164 | PRE_IO |
| 39165 | READ_WORD_F(adr, src) |
| 39166 | flag_V = 0; |
| 39167 | flag_C = src << M68K_SR_C_SFT; |
| 39168 | res = (src >> 1) | (src << 15); |
| 39169 | flag_N = res >> 8; |
| 39170 | flag_NotZ = res & 0x0000FFFF; |
| 39171 | WRITE_WORD_F(adr, res) |
| 39172 | POST_IO |
| 39173 | RET(12) |
| 39174 | } |
| 39175 | |
| 39176 | // ROR |
| 39177 | OPCODE(0xE6D8) |
| 39178 | { |
| 39179 | u32 adr, res; |
| 39180 | u32 src, dst; |
| 39181 | |
| 39182 | adr = AREG((Opcode >> 0) & 7); |
| 39183 | AREG((Opcode >> 0) & 7) += 2; |
| 39184 | PRE_IO |
| 39185 | READ_WORD_F(adr, src) |
| 39186 | flag_V = 0; |
| 39187 | flag_C = src << M68K_SR_C_SFT; |
| 39188 | res = (src >> 1) | (src << 15); |
| 39189 | flag_N = res >> 8; |
| 39190 | flag_NotZ = res & 0x0000FFFF; |
| 39191 | WRITE_WORD_F(adr, res) |
| 39192 | POST_IO |
| 39193 | RET(12) |
| 39194 | } |
| 39195 | |
| 39196 | // ROR |
| 39197 | OPCODE(0xE6E0) |
| 39198 | { |
| 39199 | u32 adr, res; |
| 39200 | u32 src, dst; |
| 39201 | |
| 39202 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 39203 | AREG((Opcode >> 0) & 7) = adr; |
| 39204 | PRE_IO |
| 39205 | READ_WORD_F(adr, src) |
| 39206 | flag_V = 0; |
| 39207 | flag_C = src << M68K_SR_C_SFT; |
| 39208 | res = (src >> 1) | (src << 15); |
| 39209 | flag_N = res >> 8; |
| 39210 | flag_NotZ = res & 0x0000FFFF; |
| 39211 | WRITE_WORD_F(adr, res) |
| 39212 | POST_IO |
| 39213 | RET(14) |
| 39214 | } |
| 39215 | |
| 39216 | // ROR |
| 39217 | OPCODE(0xE6E8) |
| 39218 | { |
| 39219 | u32 adr, res; |
| 39220 | u32 src, dst; |
| 39221 | |
| 39222 | FETCH_SWORD(adr); |
| 39223 | adr += AREG((Opcode >> 0) & 7); |
| 39224 | PRE_IO |
| 39225 | READ_WORD_F(adr, src) |
| 39226 | flag_V = 0; |
| 39227 | flag_C = src << M68K_SR_C_SFT; |
| 39228 | res = (src >> 1) | (src << 15); |
| 39229 | flag_N = res >> 8; |
| 39230 | flag_NotZ = res & 0x0000FFFF; |
| 39231 | WRITE_WORD_F(adr, res) |
| 39232 | POST_IO |
| 39233 | RET(16) |
| 39234 | } |
| 39235 | |
| 39236 | // ROR |
| 39237 | OPCODE(0xE6F0) |
| 39238 | { |
| 39239 | u32 adr, res; |
| 39240 | u32 src, dst; |
| 39241 | |
| 39242 | adr = AREG((Opcode >> 0) & 7); |
| 39243 | DECODE_EXT_WORD |
| 39244 | PRE_IO |
| 39245 | READ_WORD_F(adr, src) |
| 39246 | flag_V = 0; |
| 39247 | flag_C = src << M68K_SR_C_SFT; |
| 39248 | res = (src >> 1) | (src << 15); |
| 39249 | flag_N = res >> 8; |
| 39250 | flag_NotZ = res & 0x0000FFFF; |
| 39251 | WRITE_WORD_F(adr, res) |
| 39252 | POST_IO |
| 39253 | RET(18) |
| 39254 | } |
| 39255 | |
| 39256 | // ROR |
| 39257 | OPCODE(0xE6F8) |
| 39258 | { |
| 39259 | u32 adr, res; |
| 39260 | u32 src, dst; |
| 39261 | |
| 39262 | FETCH_SWORD(adr); |
| 39263 | PRE_IO |
| 39264 | READ_WORD_F(adr, src) |
| 39265 | flag_V = 0; |
| 39266 | flag_C = src << M68K_SR_C_SFT; |
| 39267 | res = (src >> 1) | (src << 15); |
| 39268 | flag_N = res >> 8; |
| 39269 | flag_NotZ = res & 0x0000FFFF; |
| 39270 | WRITE_WORD_F(adr, res) |
| 39271 | POST_IO |
| 39272 | RET(16) |
| 39273 | } |
| 39274 | |
| 39275 | // ROR |
| 39276 | OPCODE(0xE6F9) |
| 39277 | { |
| 39278 | u32 adr, res; |
| 39279 | u32 src, dst; |
| 39280 | |
| 39281 | FETCH_LONG(adr); |
| 39282 | PRE_IO |
| 39283 | READ_WORD_F(adr, src) |
| 39284 | flag_V = 0; |
| 39285 | flag_C = src << M68K_SR_C_SFT; |
| 39286 | res = (src >> 1) | (src << 15); |
| 39287 | flag_N = res >> 8; |
| 39288 | flag_NotZ = res & 0x0000FFFF; |
| 39289 | WRITE_WORD_F(adr, res) |
| 39290 | POST_IO |
| 39291 | RET(20) |
| 39292 | } |
| 39293 | |
| 39294 | // ROR |
| 39295 | OPCODE(0xE6DF) |
| 39296 | { |
| 39297 | u32 adr, res; |
| 39298 | u32 src, dst; |
| 39299 | |
| 39300 | adr = AREG(7); |
| 39301 | AREG(7) += 2; |
| 39302 | PRE_IO |
| 39303 | READ_WORD_F(adr, src) |
| 39304 | flag_V = 0; |
| 39305 | flag_C = src << M68K_SR_C_SFT; |
| 39306 | res = (src >> 1) | (src << 15); |
| 39307 | flag_N = res >> 8; |
| 39308 | flag_NotZ = res & 0x0000FFFF; |
| 39309 | WRITE_WORD_F(adr, res) |
| 39310 | POST_IO |
| 39311 | RET(12) |
| 39312 | } |
| 39313 | |
| 39314 | // ROR |
| 39315 | OPCODE(0xE6E7) |
| 39316 | { |
| 39317 | u32 adr, res; |
| 39318 | u32 src, dst; |
| 39319 | |
| 39320 | adr = AREG(7) - 2; |
| 39321 | AREG(7) = adr; |
| 39322 | PRE_IO |
| 39323 | READ_WORD_F(adr, src) |
| 39324 | flag_V = 0; |
| 39325 | flag_C = src << M68K_SR_C_SFT; |
| 39326 | res = (src >> 1) | (src << 15); |
| 39327 | flag_N = res >> 8; |
| 39328 | flag_NotZ = res & 0x0000FFFF; |
| 39329 | WRITE_WORD_F(adr, res) |
| 39330 | POST_IO |
| 39331 | RET(14) |
| 39332 | } |
| 39333 | |
| 39334 | // ASL |
| 39335 | OPCODE(0xE1D0) |
| 39336 | { |
| 39337 | u32 adr, res; |
| 39338 | u32 src, dst; |
| 39339 | |
| 39340 | adr = AREG((Opcode >> 0) & 7); |
| 39341 | PRE_IO |
| 39342 | READ_WORD_F(adr, src) |
| 39343 | flag_X = flag_C = src >> 7; |
| 39344 | res = src << 1; |
| 39345 | flag_V = (src ^ res) >> 8; |
| 39346 | flag_N = res >> 8; |
| 39347 | flag_NotZ = res & 0x0000FFFF; |
| 39348 | WRITE_WORD_F(adr, res) |
| 39349 | POST_IO |
| 39350 | RET(12) |
| 39351 | } |
| 39352 | |
| 39353 | // ASL |
| 39354 | OPCODE(0xE1D8) |
| 39355 | { |
| 39356 | u32 adr, res; |
| 39357 | u32 src, dst; |
| 39358 | |
| 39359 | adr = AREG((Opcode >> 0) & 7); |
| 39360 | AREG((Opcode >> 0) & 7) += 2; |
| 39361 | PRE_IO |
| 39362 | READ_WORD_F(adr, src) |
| 39363 | flag_X = flag_C = src >> 7; |
| 39364 | res = src << 1; |
| 39365 | flag_V = (src ^ res) >> 8; |
| 39366 | flag_N = res >> 8; |
| 39367 | flag_NotZ = res & 0x0000FFFF; |
| 39368 | WRITE_WORD_F(adr, res) |
| 39369 | POST_IO |
| 39370 | RET(12) |
| 39371 | } |
| 39372 | |
| 39373 | // ASL |
| 39374 | OPCODE(0xE1E0) |
| 39375 | { |
| 39376 | u32 adr, res; |
| 39377 | u32 src, dst; |
| 39378 | |
| 39379 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 39380 | AREG((Opcode >> 0) & 7) = adr; |
| 39381 | PRE_IO |
| 39382 | READ_WORD_F(adr, src) |
| 39383 | flag_X = flag_C = src >> 7; |
| 39384 | res = src << 1; |
| 39385 | flag_V = (src ^ res) >> 8; |
| 39386 | flag_N = res >> 8; |
| 39387 | flag_NotZ = res & 0x0000FFFF; |
| 39388 | WRITE_WORD_F(adr, res) |
| 39389 | POST_IO |
| 39390 | RET(14) |
| 39391 | } |
| 39392 | |
| 39393 | // ASL |
| 39394 | OPCODE(0xE1E8) |
| 39395 | { |
| 39396 | u32 adr, res; |
| 39397 | u32 src, dst; |
| 39398 | |
| 39399 | FETCH_SWORD(adr); |
| 39400 | adr += AREG((Opcode >> 0) & 7); |
| 39401 | PRE_IO |
| 39402 | READ_WORD_F(adr, src) |
| 39403 | flag_X = flag_C = src >> 7; |
| 39404 | res = src << 1; |
| 39405 | flag_V = (src ^ res) >> 8; |
| 39406 | flag_N = res >> 8; |
| 39407 | flag_NotZ = res & 0x0000FFFF; |
| 39408 | WRITE_WORD_F(adr, res) |
| 39409 | POST_IO |
| 39410 | RET(16) |
| 39411 | } |
| 39412 | |
| 39413 | // ASL |
| 39414 | OPCODE(0xE1F0) |
| 39415 | { |
| 39416 | u32 adr, res; |
| 39417 | u32 src, dst; |
| 39418 | |
| 39419 | adr = AREG((Opcode >> 0) & 7); |
| 39420 | DECODE_EXT_WORD |
| 39421 | PRE_IO |
| 39422 | READ_WORD_F(adr, src) |
| 39423 | flag_X = flag_C = src >> 7; |
| 39424 | res = src << 1; |
| 39425 | flag_V = (src ^ res) >> 8; |
| 39426 | flag_N = res >> 8; |
| 39427 | flag_NotZ = res & 0x0000FFFF; |
| 39428 | WRITE_WORD_F(adr, res) |
| 39429 | POST_IO |
| 39430 | RET(18) |
| 39431 | } |
| 39432 | |
| 39433 | // ASL |
| 39434 | OPCODE(0xE1F8) |
| 39435 | { |
| 39436 | u32 adr, res; |
| 39437 | u32 src, dst; |
| 39438 | |
| 39439 | FETCH_SWORD(adr); |
| 39440 | PRE_IO |
| 39441 | READ_WORD_F(adr, src) |
| 39442 | flag_X = flag_C = src >> 7; |
| 39443 | res = src << 1; |
| 39444 | flag_V = (src ^ res) >> 8; |
| 39445 | flag_N = res >> 8; |
| 39446 | flag_NotZ = res & 0x0000FFFF; |
| 39447 | WRITE_WORD_F(adr, res) |
| 39448 | POST_IO |
| 39449 | RET(16) |
| 39450 | } |
| 39451 | |
| 39452 | // ASL |
| 39453 | OPCODE(0xE1F9) |
| 39454 | { |
| 39455 | u32 adr, res; |
| 39456 | u32 src, dst; |
| 39457 | |
| 39458 | FETCH_LONG(adr); |
| 39459 | PRE_IO |
| 39460 | READ_WORD_F(adr, src) |
| 39461 | flag_X = flag_C = src >> 7; |
| 39462 | res = src << 1; |
| 39463 | flag_V = (src ^ res) >> 8; |
| 39464 | flag_N = res >> 8; |
| 39465 | flag_NotZ = res & 0x0000FFFF; |
| 39466 | WRITE_WORD_F(adr, res) |
| 39467 | POST_IO |
| 39468 | RET(20) |
| 39469 | } |
| 39470 | |
| 39471 | // ASL |
| 39472 | OPCODE(0xE1DF) |
| 39473 | { |
| 39474 | u32 adr, res; |
| 39475 | u32 src, dst; |
| 39476 | |
| 39477 | adr = AREG(7); |
| 39478 | AREG(7) += 2; |
| 39479 | PRE_IO |
| 39480 | READ_WORD_F(adr, src) |
| 39481 | flag_X = flag_C = src >> 7; |
| 39482 | res = src << 1; |
| 39483 | flag_V = (src ^ res) >> 8; |
| 39484 | flag_N = res >> 8; |
| 39485 | flag_NotZ = res & 0x0000FFFF; |
| 39486 | WRITE_WORD_F(adr, res) |
| 39487 | POST_IO |
| 39488 | RET(12) |
| 39489 | } |
| 39490 | |
| 39491 | // ASL |
| 39492 | OPCODE(0xE1E7) |
| 39493 | { |
| 39494 | u32 adr, res; |
| 39495 | u32 src, dst; |
| 39496 | |
| 39497 | adr = AREG(7) - 2; |
| 39498 | AREG(7) = adr; |
| 39499 | PRE_IO |
| 39500 | READ_WORD_F(adr, src) |
| 39501 | flag_X = flag_C = src >> 7; |
| 39502 | res = src << 1; |
| 39503 | flag_V = (src ^ res) >> 8; |
| 39504 | flag_N = res >> 8; |
| 39505 | flag_NotZ = res & 0x0000FFFF; |
| 39506 | WRITE_WORD_F(adr, res) |
| 39507 | POST_IO |
| 39508 | RET(14) |
| 39509 | } |
| 39510 | |
| 39511 | // LSL |
| 39512 | OPCODE(0xE3D0) |
| 39513 | { |
| 39514 | u32 adr, res; |
| 39515 | u32 src, dst; |
| 39516 | |
| 39517 | adr = AREG((Opcode >> 0) & 7); |
| 39518 | PRE_IO |
| 39519 | READ_WORD_F(adr, src) |
| 39520 | flag_V = 0; |
| 39521 | flag_X = flag_C = src >> 7; |
| 39522 | res = src << 1; |
| 39523 | flag_N = res >> 8; |
| 39524 | flag_NotZ = res & 0x0000FFFF; |
| 39525 | WRITE_WORD_F(adr, res) |
| 39526 | POST_IO |
| 39527 | RET(12) |
| 39528 | } |
| 39529 | |
| 39530 | // LSL |
| 39531 | OPCODE(0xE3D8) |
| 39532 | { |
| 39533 | u32 adr, res; |
| 39534 | u32 src, dst; |
| 39535 | |
| 39536 | adr = AREG((Opcode >> 0) & 7); |
| 39537 | AREG((Opcode >> 0) & 7) += 2; |
| 39538 | PRE_IO |
| 39539 | READ_WORD_F(adr, src) |
| 39540 | flag_V = 0; |
| 39541 | flag_X = flag_C = src >> 7; |
| 39542 | res = src << 1; |
| 39543 | flag_N = res >> 8; |
| 39544 | flag_NotZ = res & 0x0000FFFF; |
| 39545 | WRITE_WORD_F(adr, res) |
| 39546 | POST_IO |
| 39547 | RET(12) |
| 39548 | } |
| 39549 | |
| 39550 | // LSL |
| 39551 | OPCODE(0xE3E0) |
| 39552 | { |
| 39553 | u32 adr, res; |
| 39554 | u32 src, dst; |
| 39555 | |
| 39556 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 39557 | AREG((Opcode >> 0) & 7) = adr; |
| 39558 | PRE_IO |
| 39559 | READ_WORD_F(adr, src) |
| 39560 | flag_V = 0; |
| 39561 | flag_X = flag_C = src >> 7; |
| 39562 | res = src << 1; |
| 39563 | flag_N = res >> 8; |
| 39564 | flag_NotZ = res & 0x0000FFFF; |
| 39565 | WRITE_WORD_F(adr, res) |
| 39566 | POST_IO |
| 39567 | RET(14) |
| 39568 | } |
| 39569 | |
| 39570 | // LSL |
| 39571 | OPCODE(0xE3E8) |
| 39572 | { |
| 39573 | u32 adr, res; |
| 39574 | u32 src, dst; |
| 39575 | |
| 39576 | FETCH_SWORD(adr); |
| 39577 | adr += AREG((Opcode >> 0) & 7); |
| 39578 | PRE_IO |
| 39579 | READ_WORD_F(adr, src) |
| 39580 | flag_V = 0; |
| 39581 | flag_X = flag_C = src >> 7; |
| 39582 | res = src << 1; |
| 39583 | flag_N = res >> 8; |
| 39584 | flag_NotZ = res & 0x0000FFFF; |
| 39585 | WRITE_WORD_F(adr, res) |
| 39586 | POST_IO |
| 39587 | RET(16) |
| 39588 | } |
| 39589 | |
| 39590 | // LSL |
| 39591 | OPCODE(0xE3F0) |
| 39592 | { |
| 39593 | u32 adr, res; |
| 39594 | u32 src, dst; |
| 39595 | |
| 39596 | adr = AREG((Opcode >> 0) & 7); |
| 39597 | DECODE_EXT_WORD |
| 39598 | PRE_IO |
| 39599 | READ_WORD_F(adr, src) |
| 39600 | flag_V = 0; |
| 39601 | flag_X = flag_C = src >> 7; |
| 39602 | res = src << 1; |
| 39603 | flag_N = res >> 8; |
| 39604 | flag_NotZ = res & 0x0000FFFF; |
| 39605 | WRITE_WORD_F(adr, res) |
| 39606 | POST_IO |
| 39607 | RET(18) |
| 39608 | } |
| 39609 | |
| 39610 | // LSL |
| 39611 | OPCODE(0xE3F8) |
| 39612 | { |
| 39613 | u32 adr, res; |
| 39614 | u32 src, dst; |
| 39615 | |
| 39616 | FETCH_SWORD(adr); |
| 39617 | PRE_IO |
| 39618 | READ_WORD_F(adr, src) |
| 39619 | flag_V = 0; |
| 39620 | flag_X = flag_C = src >> 7; |
| 39621 | res = src << 1; |
| 39622 | flag_N = res >> 8; |
| 39623 | flag_NotZ = res & 0x0000FFFF; |
| 39624 | WRITE_WORD_F(adr, res) |
| 39625 | POST_IO |
| 39626 | RET(16) |
| 39627 | } |
| 39628 | |
| 39629 | // LSL |
| 39630 | OPCODE(0xE3F9) |
| 39631 | { |
| 39632 | u32 adr, res; |
| 39633 | u32 src, dst; |
| 39634 | |
| 39635 | FETCH_LONG(adr); |
| 39636 | PRE_IO |
| 39637 | READ_WORD_F(adr, src) |
| 39638 | flag_V = 0; |
| 39639 | flag_X = flag_C = src >> 7; |
| 39640 | res = src << 1; |
| 39641 | flag_N = res >> 8; |
| 39642 | flag_NotZ = res & 0x0000FFFF; |
| 39643 | WRITE_WORD_F(adr, res) |
| 39644 | POST_IO |
| 39645 | RET(20) |
| 39646 | } |
| 39647 | |
| 39648 | // LSL |
| 39649 | OPCODE(0xE3DF) |
| 39650 | { |
| 39651 | u32 adr, res; |
| 39652 | u32 src, dst; |
| 39653 | |
| 39654 | adr = AREG(7); |
| 39655 | AREG(7) += 2; |
| 39656 | PRE_IO |
| 39657 | READ_WORD_F(adr, src) |
| 39658 | flag_V = 0; |
| 39659 | flag_X = flag_C = src >> 7; |
| 39660 | res = src << 1; |
| 39661 | flag_N = res >> 8; |
| 39662 | flag_NotZ = res & 0x0000FFFF; |
| 39663 | WRITE_WORD_F(adr, res) |
| 39664 | POST_IO |
| 39665 | RET(12) |
| 39666 | } |
| 39667 | |
| 39668 | // LSL |
| 39669 | OPCODE(0xE3E7) |
| 39670 | { |
| 39671 | u32 adr, res; |
| 39672 | u32 src, dst; |
| 39673 | |
| 39674 | adr = AREG(7) - 2; |
| 39675 | AREG(7) = adr; |
| 39676 | PRE_IO |
| 39677 | READ_WORD_F(adr, src) |
| 39678 | flag_V = 0; |
| 39679 | flag_X = flag_C = src >> 7; |
| 39680 | res = src << 1; |
| 39681 | flag_N = res >> 8; |
| 39682 | flag_NotZ = res & 0x0000FFFF; |
| 39683 | WRITE_WORD_F(adr, res) |
| 39684 | POST_IO |
| 39685 | RET(14) |
| 39686 | } |
| 39687 | |
| 39688 | // ROXL |
| 39689 | OPCODE(0xE5D0) |
| 39690 | { |
| 39691 | u32 adr, res; |
| 39692 | u32 src, dst; |
| 39693 | |
| 39694 | adr = AREG((Opcode >> 0) & 7); |
| 39695 | PRE_IO |
| 39696 | READ_WORD_F(adr, src) |
| 39697 | flag_V = 0; |
| 39698 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39699 | flag_X = flag_C = src >> 7; |
| 39700 | flag_N = res >> 8; |
| 39701 | flag_NotZ = res & 0x0000FFFF; |
| 39702 | WRITE_WORD_F(adr, res) |
| 39703 | POST_IO |
| 39704 | RET(12) |
| 39705 | } |
| 39706 | |
| 39707 | // ROXL |
| 39708 | OPCODE(0xE5D8) |
| 39709 | { |
| 39710 | u32 adr, res; |
| 39711 | u32 src, dst; |
| 39712 | |
| 39713 | adr = AREG((Opcode >> 0) & 7); |
| 39714 | AREG((Opcode >> 0) & 7) += 2; |
| 39715 | PRE_IO |
| 39716 | READ_WORD_F(adr, src) |
| 39717 | flag_V = 0; |
| 39718 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39719 | flag_X = flag_C = src >> 7; |
| 39720 | flag_N = res >> 8; |
| 39721 | flag_NotZ = res & 0x0000FFFF; |
| 39722 | WRITE_WORD_F(adr, res) |
| 39723 | POST_IO |
| 39724 | RET(12) |
| 39725 | } |
| 39726 | |
| 39727 | // ROXL |
| 39728 | OPCODE(0xE5E0) |
| 39729 | { |
| 39730 | u32 adr, res; |
| 39731 | u32 src, dst; |
| 39732 | |
| 39733 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 39734 | AREG((Opcode >> 0) & 7) = adr; |
| 39735 | PRE_IO |
| 39736 | READ_WORD_F(adr, src) |
| 39737 | flag_V = 0; |
| 39738 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39739 | flag_X = flag_C = src >> 7; |
| 39740 | flag_N = res >> 8; |
| 39741 | flag_NotZ = res & 0x0000FFFF; |
| 39742 | WRITE_WORD_F(adr, res) |
| 39743 | POST_IO |
| 39744 | RET(14) |
| 39745 | } |
| 39746 | |
| 39747 | // ROXL |
| 39748 | OPCODE(0xE5E8) |
| 39749 | { |
| 39750 | u32 adr, res; |
| 39751 | u32 src, dst; |
| 39752 | |
| 39753 | FETCH_SWORD(adr); |
| 39754 | adr += AREG((Opcode >> 0) & 7); |
| 39755 | PRE_IO |
| 39756 | READ_WORD_F(adr, src) |
| 39757 | flag_V = 0; |
| 39758 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39759 | flag_X = flag_C = src >> 7; |
| 39760 | flag_N = res >> 8; |
| 39761 | flag_NotZ = res & 0x0000FFFF; |
| 39762 | WRITE_WORD_F(adr, res) |
| 39763 | POST_IO |
| 39764 | RET(16) |
| 39765 | } |
| 39766 | |
| 39767 | // ROXL |
| 39768 | OPCODE(0xE5F0) |
| 39769 | { |
| 39770 | u32 adr, res; |
| 39771 | u32 src, dst; |
| 39772 | |
| 39773 | adr = AREG((Opcode >> 0) & 7); |
| 39774 | DECODE_EXT_WORD |
| 39775 | PRE_IO |
| 39776 | READ_WORD_F(adr, src) |
| 39777 | flag_V = 0; |
| 39778 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39779 | flag_X = flag_C = src >> 7; |
| 39780 | flag_N = res >> 8; |
| 39781 | flag_NotZ = res & 0x0000FFFF; |
| 39782 | WRITE_WORD_F(adr, res) |
| 39783 | POST_IO |
| 39784 | RET(18) |
| 39785 | } |
| 39786 | |
| 39787 | // ROXL |
| 39788 | OPCODE(0xE5F8) |
| 39789 | { |
| 39790 | u32 adr, res; |
| 39791 | u32 src, dst; |
| 39792 | |
| 39793 | FETCH_SWORD(adr); |
| 39794 | PRE_IO |
| 39795 | READ_WORD_F(adr, src) |
| 39796 | flag_V = 0; |
| 39797 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39798 | flag_X = flag_C = src >> 7; |
| 39799 | flag_N = res >> 8; |
| 39800 | flag_NotZ = res & 0x0000FFFF; |
| 39801 | WRITE_WORD_F(adr, res) |
| 39802 | POST_IO |
| 39803 | RET(16) |
| 39804 | } |
| 39805 | |
| 39806 | // ROXL |
| 39807 | OPCODE(0xE5F9) |
| 39808 | { |
| 39809 | u32 adr, res; |
| 39810 | u32 src, dst; |
| 39811 | |
| 39812 | FETCH_LONG(adr); |
| 39813 | PRE_IO |
| 39814 | READ_WORD_F(adr, src) |
| 39815 | flag_V = 0; |
| 39816 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39817 | flag_X = flag_C = src >> 7; |
| 39818 | flag_N = res >> 8; |
| 39819 | flag_NotZ = res & 0x0000FFFF; |
| 39820 | WRITE_WORD_F(adr, res) |
| 39821 | POST_IO |
| 39822 | RET(20) |
| 39823 | } |
| 39824 | |
| 39825 | // ROXL |
| 39826 | OPCODE(0xE5DF) |
| 39827 | { |
| 39828 | u32 adr, res; |
| 39829 | u32 src, dst; |
| 39830 | |
| 39831 | adr = AREG(7); |
| 39832 | AREG(7) += 2; |
| 39833 | PRE_IO |
| 39834 | READ_WORD_F(adr, src) |
| 39835 | flag_V = 0; |
| 39836 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39837 | flag_X = flag_C = src >> 7; |
| 39838 | flag_N = res >> 8; |
| 39839 | flag_NotZ = res & 0x0000FFFF; |
| 39840 | WRITE_WORD_F(adr, res) |
| 39841 | POST_IO |
| 39842 | RET(12) |
| 39843 | } |
| 39844 | |
| 39845 | // ROXL |
| 39846 | OPCODE(0xE5E7) |
| 39847 | { |
| 39848 | u32 adr, res; |
| 39849 | u32 src, dst; |
| 39850 | |
| 39851 | adr = AREG(7) - 2; |
| 39852 | AREG(7) = adr; |
| 39853 | PRE_IO |
| 39854 | READ_WORD_F(adr, src) |
| 39855 | flag_V = 0; |
| 39856 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
| 39857 | flag_X = flag_C = src >> 7; |
| 39858 | flag_N = res >> 8; |
| 39859 | flag_NotZ = res & 0x0000FFFF; |
| 39860 | WRITE_WORD_F(adr, res) |
| 39861 | POST_IO |
| 39862 | RET(14) |
| 39863 | } |
| 39864 | |
| 39865 | // ROL |
| 39866 | OPCODE(0xE7D0) |
| 39867 | { |
| 39868 | u32 adr, res; |
| 39869 | u32 src, dst; |
| 39870 | |
| 39871 | adr = AREG((Opcode >> 0) & 7); |
| 39872 | PRE_IO |
| 39873 | READ_WORD_F(adr, src) |
| 39874 | flag_V = 0; |
| 39875 | flag_C = src >> 7; |
| 39876 | res = (src << 1) | (src >> 15); |
| 39877 | flag_N = res >> 8; |
| 39878 | flag_NotZ = res & 0x0000FFFF; |
| 39879 | WRITE_WORD_F(adr, res) |
| 39880 | POST_IO |
| 39881 | RET(12) |
| 39882 | } |
| 39883 | |
| 39884 | // ROL |
| 39885 | OPCODE(0xE7D8) |
| 39886 | { |
| 39887 | u32 adr, res; |
| 39888 | u32 src, dst; |
| 39889 | |
| 39890 | adr = AREG((Opcode >> 0) & 7); |
| 39891 | AREG((Opcode >> 0) & 7) += 2; |
| 39892 | PRE_IO |
| 39893 | READ_WORD_F(adr, src) |
| 39894 | flag_V = 0; |
| 39895 | flag_C = src >> 7; |
| 39896 | res = (src << 1) | (src >> 15); |
| 39897 | flag_N = res >> 8; |
| 39898 | flag_NotZ = res & 0x0000FFFF; |
| 39899 | WRITE_WORD_F(adr, res) |
| 39900 | POST_IO |
| 39901 | RET(12) |
| 39902 | } |
| 39903 | |
| 39904 | // ROL |
| 39905 | OPCODE(0xE7E0) |
| 39906 | { |
| 39907 | u32 adr, res; |
| 39908 | u32 src, dst; |
| 39909 | |
| 39910 | adr = AREG((Opcode >> 0) & 7) - 2; |
| 39911 | AREG((Opcode >> 0) & 7) = adr; |
| 39912 | PRE_IO |
| 39913 | READ_WORD_F(adr, src) |
| 39914 | flag_V = 0; |
| 39915 | flag_C = src >> 7; |
| 39916 | res = (src << 1) | (src >> 15); |
| 39917 | flag_N = res >> 8; |
| 39918 | flag_NotZ = res & 0x0000FFFF; |
| 39919 | WRITE_WORD_F(adr, res) |
| 39920 | POST_IO |
| 39921 | RET(14) |
| 39922 | } |
| 39923 | |
| 39924 | // ROL |
| 39925 | OPCODE(0xE7E8) |
| 39926 | { |
| 39927 | u32 adr, res; |
| 39928 | u32 src, dst; |
| 39929 | |
| 39930 | FETCH_SWORD(adr); |
| 39931 | adr += AREG((Opcode >> 0) & 7); |
| 39932 | PRE_IO |
| 39933 | READ_WORD_F(adr, src) |
| 39934 | flag_V = 0; |
| 39935 | flag_C = src >> 7; |
| 39936 | res = (src << 1) | (src >> 15); |
| 39937 | flag_N = res >> 8; |
| 39938 | flag_NotZ = res & 0x0000FFFF; |
| 39939 | WRITE_WORD_F(adr, res) |
| 39940 | POST_IO |
| 39941 | RET(16) |
| 39942 | } |
| 39943 | |
| 39944 | // ROL |
| 39945 | OPCODE(0xE7F0) |
| 39946 | { |
| 39947 | u32 adr, res; |
| 39948 | u32 src, dst; |
| 39949 | |
| 39950 | adr = AREG((Opcode >> 0) & 7); |
| 39951 | DECODE_EXT_WORD |
| 39952 | PRE_IO |
| 39953 | READ_WORD_F(adr, src) |
| 39954 | flag_V = 0; |
| 39955 | flag_C = src >> 7; |
| 39956 | res = (src << 1) | (src >> 15); |
| 39957 | flag_N = res >> 8; |
| 39958 | flag_NotZ = res & 0x0000FFFF; |
| 39959 | WRITE_WORD_F(adr, res) |
| 39960 | POST_IO |
| 39961 | RET(18) |
| 39962 | } |
| 39963 | |
| 39964 | // ROL |
| 39965 | OPCODE(0xE7F8) |
| 39966 | { |
| 39967 | u32 adr, res; |
| 39968 | u32 src, dst; |
| 39969 | |
| 39970 | FETCH_SWORD(adr); |
| 39971 | PRE_IO |
| 39972 | READ_WORD_F(adr, src) |
| 39973 | flag_V = 0; |
| 39974 | flag_C = src >> 7; |
| 39975 | res = (src << 1) | (src >> 15); |
| 39976 | flag_N = res >> 8; |
| 39977 | flag_NotZ = res & 0x0000FFFF; |
| 39978 | WRITE_WORD_F(adr, res) |
| 39979 | POST_IO |
| 39980 | RET(16) |
| 39981 | } |
| 39982 | |
| 39983 | // ROL |
| 39984 | OPCODE(0xE7F9) |
| 39985 | { |
| 39986 | u32 adr, res; |
| 39987 | u32 src, dst; |
| 39988 | |
| 39989 | FETCH_LONG(adr); |
| 39990 | PRE_IO |
| 39991 | READ_WORD_F(adr, src) |
| 39992 | flag_V = 0; |
| 39993 | flag_C = src >> 7; |
| 39994 | res = (src << 1) | (src >> 15); |
| 39995 | flag_N = res >> 8; |
| 39996 | flag_NotZ = res & 0x0000FFFF; |
| 39997 | WRITE_WORD_F(adr, res) |
| 39998 | POST_IO |
| 39999 | RET(20) |
| 40000 | } |
| 40001 | |
| 40002 | // ROL |
| 40003 | OPCODE(0xE7DF) |
| 40004 | { |
| 40005 | u32 adr, res; |
| 40006 | u32 src, dst; |
| 40007 | |
| 40008 | adr = AREG(7); |
| 40009 | AREG(7) += 2; |
| 40010 | PRE_IO |
| 40011 | READ_WORD_F(adr, src) |
| 40012 | flag_V = 0; |
| 40013 | flag_C = src >> 7; |
| 40014 | res = (src << 1) | (src >> 15); |
| 40015 | flag_N = res >> 8; |
| 40016 | flag_NotZ = res & 0x0000FFFF; |
| 40017 | WRITE_WORD_F(adr, res) |
| 40018 | POST_IO |
| 40019 | RET(12) |
| 40020 | } |
| 40021 | |
| 40022 | // ROL |
| 40023 | OPCODE(0xE7E7) |
| 40024 | { |
| 40025 | u32 adr, res; |
| 40026 | u32 src, dst; |
| 40027 | |
| 40028 | adr = AREG(7) - 2; |
| 40029 | AREG(7) = adr; |
| 40030 | PRE_IO |
| 40031 | READ_WORD_F(adr, src) |
| 40032 | flag_V = 0; |
| 40033 | flag_C = src >> 7; |
| 40034 | res = (src << 1) | (src >> 15); |
| 40035 | flag_N = res >> 8; |
| 40036 | flag_NotZ = res & 0x0000FFFF; |
| 40037 | WRITE_WORD_F(adr, res) |
| 40038 | POST_IO |
| 40039 | RET(14) |
| 40040 | } |
| 40041 | |
| 40042 | #ifdef PICODRIVE_HACK |
| 40043 | #if 0 |
| 40044 | #define UPDATE_IDLE_COUNT { \ |
| 40045 | extern int idle_hit_counter; \ |
| 40046 | idle_hit_counter++; \ |
| 40047 | } |
| 40048 | #else |
| 40049 | #define UPDATE_IDLE_COUNT |
| 40050 | #endif |
| 40051 | |
| 40052 | // BRA |
| 40053 | OPCODE(0x6001_idle) |
| 40054 | { |
| 40055 | #ifdef FAMEC_CHECK_BRANCHES |
| 40056 | u32 newPC = GET_PC; |
| 40057 | s8 offs=Opcode; |
| 40058 | newPC += offs; |
| 40059 | SET_PC(newPC); |
| 40060 | CHECK_BRANCH_EXCEPTION(offs) |
| 40061 | #else |
| 40062 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 40063 | #endif |
| 40064 | UPDATE_IDLE_COUNT |
| 40065 | RET0() |
| 40066 | } |
| 40067 | |
| 40068 | // BCC |
| 40069 | OPCODE(0x6601_idle) |
| 40070 | { |
| 40071 | if (flag_NotZ) |
| 40072 | { |
| 40073 | UPDATE_IDLE_COUNT |
| 40074 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 40075 | //if (idle_hit) |
| 40076 | RET0() |
| 40077 | } |
| 40078 | RET(8) |
| 40079 | } |
| 40080 | |
| 40081 | OPCODE(0x6701_idle) |
| 40082 | { |
| 40083 | if (!flag_NotZ) |
| 40084 | { |
| 40085 | UPDATE_IDLE_COUNT |
| 40086 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
| 40087 | //if (idle_hit) |
| 40088 | RET0() |
| 40089 | } |
| 40090 | RET(8) |
| 40091 | } |
| 40092 | |
| 40093 | |
| 40094 | extern int SekIsIdleReady(void); |
| 40095 | extern int SekIsIdleCode(unsigned short *dst, int bytes); |
| 40096 | extern int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx); |
| 40097 | |
| 40098 | OPCODE(idle_detector_bcc8) |
| 40099 | { |
| 40100 | int frame_count, cond_true, bytes, ret, newop; |
| 40101 | u16 *dest_pc; |
| 40102 | |
| 40103 | dest_pc = PC + (((s8)(Opcode & 0xFE)) >> 1); |
| 40104 | |
| 40105 | if (!SekIsIdleReady()) |
| 40106 | goto end; |
| 40107 | |
| 40108 | bytes = 0 - (s8)(Opcode & 0xFE) - 2; |
| 40109 | ret = SekIsIdleCode(dest_pc, bytes); |
| 40110 | newop = (Opcode & 0xfe) | 0x7100; |
| 40111 | if (!ret) newop |= 0x200; |
| 40112 | if ( Opcode & 0x0100) newop |= 0x400; // beq |
| 40113 | if (!(Opcode & 0x0f00)) newop |= 0xc00; // bra |
| 40114 | |
| 40115 | ret = SekRegisterIdlePatch(GET_PC - 2, Opcode, newop, &m68kcontext); |
| 40116 | switch (ret) |
| 40117 | { |
| 40118 | case 0: PC[-1] = newop; break; |
| 40119 | case 1: break; |
| 40120 | case 2: JumpTable[Opcode] = (Opcode & 0x0f00) ? |
| 40121 | ((Opcode & 0x0100) ? CAST_OP(0x6701) : CAST_OP(0x6601)) : |
| 40122 | CAST_OP(0x6001); break; |
| 40123 | } |
| 40124 | |
| 40125 | end: |
| 40126 | if ((Opcode & 0xff00) == 0x6000) cond_true = 1; |
| 40127 | else cond_true = (Opcode & 0x0100) ? !flag_NotZ : flag_NotZ; // beq? |
| 40128 | if (cond_true) |
| 40129 | { |
| 40130 | PC = dest_pc; |
| 40131 | m68kcontext.io_cycle_counter -= 2; |
| 40132 | } |
| 40133 | RET(8) |
| 40134 | } |
| 40135 | |
| 40136 | #endif // PICODRIVE_HACK |