[picodrive.git] / cpu / sh2 / mame / sh2pico.c

#include "../sh2.h"

// MAME types
typedef signed char  INT8;
typedef signed short INT16;
typedef signed int   INT32;
typedef unsigned int   UINT32;
typedef unsigned short UINT16;
typedef unsigned char  UINT8;

#define RB(a) p32x_sh2_read8(a,sh2)
#define RW(a) p32x_sh2_read16(a,sh2)
#define RL(a) p32x_sh2_read32(a,sh2)
#define WB(a,d) p32x_sh2_write8(a,d,sh2)
#define WW(a,d) p32x_sh2_write16(a,d,sh2)
#define WL(a,d) p32x_sh2_write32(a,d,sh2)

// some stuff from sh2comn.h
#define T	0x00000001
#define S	0x00000002
#define I	0x000000f0
#define Q	0x00000100
#define M	0x00000200

#define AM	0xc7ffffff

#define FLAGS	(M|Q|I|S|T)

#define Rn	((opcode>>8)&15)
#define Rm	((opcode>>4)&15)

#define sh2_icount sh2->icount

#ifdef SH2_STATS
static SH2 sh2_stats;
static unsigned int op_refs[0x10000];
# define LRN  1
# define LRM  2
# define LRNM (LRN|LRM)
# define rlog(rnm) {   \
  int op = opcode;     \
  if ((rnm) & LRN) {   \
    op &= ~0x0f00;     \
    sh2_stats.r[Rn]++; \
  }                    \
  if ((rnm) & LRM) {   \
    op &= ~0x00f0;     \
    sh2_stats.r[Rm]++; \
  }                    \
  op_refs[op]++;       \
}
# define rlog1(x) sh2_stats.r[x]++
# define rlog2(x1,x2) sh2_stats.r[x1]++; sh2_stats.r[x2]++
#else
# define rlog(x)
# define rlog1(...)
# define rlog2(...)
#endif

#include "sh2.c"

#ifndef DRC_SH2

void sh2_execute(SH2 *sh2_, int cycles)
{
	sh2 = sh2_;
	sh2->cycles_aim += cycles;
	sh2->icount = cycles = sh2->cycles_aim - sh2->cycles_done;

	if (sh2->icount <= 0)
		return;

	do
	{
		UINT32 opcode;

		/* FIXME: Darxide doesn't like this */
		if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
		{
			int level = sh2->pending_level;
			int vector = sh2->irq_callback(sh2, level);
			sh2_do_irq(sh2, level, vector);
			sh2->test_irq = 0;
		}

		if (sh2->delay)
		{
			sh2->ppc = sh2->delay;
			opcode = RW(sh2->delay);
			sh2->pc -= 2;
		}
		else
		{
			sh2->ppc = sh2->pc;
			opcode = RW(sh2->pc);
		}

		sh2->delay = 0;
		sh2->pc += 2;

		switch (opcode & ( 15 << 12))
		{
		case  0<<12: op0000(opcode); break;
		case  1<<12: op0001(opcode); break;
		case  2<<12: op0010(opcode); break;
		case  3<<12: op0011(opcode); break;
		case  4<<12: op0100(opcode); break;
		case  5<<12: op0101(opcode); break;
		case  6<<12: op0110(opcode); break;
		case  7<<12: op0111(opcode); break;
		case  8<<12: op1000(opcode); break;
		case  9<<12: op1001(opcode); break;
		case 10<<12: op1010(opcode); break;
		case 11<<12: op1011(opcode); break;
		case 12<<12: op1100(opcode); break;
		case 13<<12: op1101(opcode); break;
		case 14<<12: op1110(opcode); break;
		default: op1111(opcode); break;
		}

		sh2->icount--;
	}
	while (sh2->icount > 0 || sh2->delay);	/* can't interrupt before delay */

	sh2->cycles_done += cycles - sh2->icount;
}

#else // DRC_SH2

#ifdef __i386__
#define REGPARM(x) __attribute__((regparm(x)))
#else
#define REGPARM(x)
#endif

// drc debug
void REGPARM(2) sh2_do_op(SH2 *sh2_, int opcode)
{
	sh2 = sh2_;
	sh2->pc += 2;

	switch (opcode & ( 15 << 12))
	{
		case  0<<12: op0000(opcode); break;
		case  1<<12: op0001(opcode); break;
		case  2<<12: op0010(opcode); break;
		case  3<<12: op0011(opcode); break;
		case  4<<12: op0100(opcode); break;
		case  5<<12: op0101(opcode); break;
		case  6<<12: op0110(opcode); break;
		case  7<<12: op0111(opcode); break;
		case  8<<12: op1000(opcode); break;
		case  9<<12: op1001(opcode); break;
		case 10<<12: op1010(opcode); break;
		case 11<<12: op1011(opcode); break;
		case 12<<12: op1100(opcode); break;
		case 13<<12: op1101(opcode); break;
		case 14<<12: op1110(opcode); break;
		default: op1111(opcode); break;
	}
}

#endif

#ifdef SH2_STATS
#include <stdio.h>
#include <string.h>
#include "sh2dasm.h"

void sh2_dump_stats(void)
{
	static const char *rnames[] = {
		"R0", "R1", "R2",  "R3",  "R4",  "R5",  "R6",  "R7",
		"R8", "R9", "R10", "R11", "R12", "R13", "R14", "SP",
		"PC", "", "PR", "SR", "GBR", "VBR", "MACH", "MACL"
	};
	long long total;
	char buff[64];
	int u, i;

	// dump reg usage
	total = 0;
	for (i = 0; i < 24; i++)
		total += sh2_stats.r[i];

	for (i = 0; i < 24; i++) {
		if (i == 16 || i == 17 || i == 19)
			continue;
		printf("r %6.3f%% %-4s %9d\n", (double)sh2_stats.r[i] * 100.0 / total,
			rnames[i], sh2_stats.r[i]);
	}

	memset(&sh2_stats, 0, sizeof(sh2_stats));

	// dump ops
	printf("\n");
	total = 0;
	for (i = 0; i < 0x10000; i++)
		total += op_refs[i];

	for (u = 0; u < 16; u++) {
		int max = 0, op = 0;
		for (i = 0; i < 0x10000; i++) {
			if (op_refs[i] > max) {
				max = op_refs[i];
				op = i;
			}
		}
		DasmSH2(buff, 0, op);
		printf("i %6.3f%% %9d %s\n", (double)op_refs[op] * 100.0 / total,
			op_refs[op], buff);
		op_refs[op] = 0;
	}
	memset(op_refs, 0, sizeof(op_refs));
}
#endif
Commit	Line	Data
	1	#include "../sh2.h"
	2
	3	// MAME types
	4	typedef signed char INT8;
	5	typedef signed short INT16;
	6	typedef signed int INT32;
	7	typedef unsigned int UINT32;
	8	typedef unsigned short UINT16;
	9	typedef unsigned char UINT8;
	10
	11	#define RB(a) p32x_sh2_read8(a,sh2)
	12	#define RW(a) p32x_sh2_read16(a,sh2)
	13	#define RL(a) p32x_sh2_read32(a,sh2)
	14	#define WB(a,d) p32x_sh2_write8(a,d,sh2)
	15	#define WW(a,d) p32x_sh2_write16(a,d,sh2)
	16	#define WL(a,d) p32x_sh2_write32(a,d,sh2)
	17
	18	// some stuff from sh2comn.h
	19	#define T 0x00000001
	20	#define S 0x00000002
	21	#define I 0x000000f0
	22	#define Q 0x00000100
	23	#define M 0x00000200
	24
	25	#define AM 0xc7ffffff
	26
	27	#define FLAGS (M\|Q\|I\|S\|T)
	28
	29	#define Rn ((opcode>>8)&15)
	30	#define Rm ((opcode>>4)&15)
	31
	32	#define sh2_icount sh2->icount
	33
	34	#ifdef SH2_STATS
	35	static SH2 sh2_stats;
	36	static unsigned int op_refs[0x10000];
	37	# define LRN 1
	38	# define LRM 2
	39	# define LRNM (LRN\|LRM)
	40	# define rlog(rnm) { \
	41	int op = opcode; \
	42	if ((rnm) & LRN) { \
	43	op &= ~0x0f00; \
	44	sh2_stats.r[Rn]++; \
	45	} \
	46	if ((rnm) & LRM) { \
	47	op &= ~0x00f0; \
	48	sh2_stats.r[Rm]++; \
	49	} \
	50	op_refs[op]++; \
	51	}
	52	# define rlog1(x) sh2_stats.r[x]++
	53	# define rlog2(x1,x2) sh2_stats.r[x1]++; sh2_stats.r[x2]++
	54	#else
	55	# define rlog(x)
	56	# define rlog1(...)
	57	# define rlog2(...)
	58	#endif
	59
	60	#include "sh2.c"
	61
	62	#ifndef DRC_SH2
	63
	64	void sh2_execute(SH2 *sh2_, int cycles)
	65	{
	66	sh2 = sh2_;
	67	sh2->cycles_aim += cycles;
	68	sh2->icount = cycles = sh2->cycles_aim - sh2->cycles_done;
	69
	70	if (sh2->icount <= 0)
	71	return;
	72
	73	do
	74	{
	75	UINT32 opcode;
	76
	77	/* FIXME: Darxide doesn't like this */
	78	if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
	79	{
	80	int level = sh2->pending_level;
	81	int vector = sh2->irq_callback(sh2, level);
	82	sh2_do_irq(sh2, level, vector);
	83	sh2->test_irq = 0;
	84	}
	85
	86	if (sh2->delay)
	87	{
	88	sh2->ppc = sh2->delay;
	89	opcode = RW(sh2->delay);
	90	sh2->pc -= 2;
	91	}
	92	else
	93	{
	94	sh2->ppc = sh2->pc;
	95	opcode = RW(sh2->pc);
	96	}
	97
	98	sh2->delay = 0;
	99	sh2->pc += 2;
	100
	101	switch (opcode & ( 15 << 12))
	102	{
	103	case 0<<12: op0000(opcode); break;
	104	case 1<<12: op0001(opcode); break;
	105	case 2<<12: op0010(opcode); break;
	106	case 3<<12: op0011(opcode); break;
	107	case 4<<12: op0100(opcode); break;
	108	case 5<<12: op0101(opcode); break;
	109	case 6<<12: op0110(opcode); break;
	110	case 7<<12: op0111(opcode); break;
	111	case 8<<12: op1000(opcode); break;
	112	case 9<<12: op1001(opcode); break;
	113	case 10<<12: op1010(opcode); break;
	114	case 11<<12: op1011(opcode); break;
	115	case 12<<12: op1100(opcode); break;
	116	case 13<<12: op1101(opcode); break;
	117	case 14<<12: op1110(opcode); break;
	118	default: op1111(opcode); break;
	119	}
	120
	121	sh2->icount--;
	122	}
	123	while (sh2->icount > 0 \|\| sh2->delay); /* can't interrupt before delay */
	124
	125	sh2->cycles_done += cycles - sh2->icount;
	126	}
	127
	128	#else // DRC_SH2
	129
	130	#ifdef __i386__
	131	#define REGPARM(x) __attribute__((regparm(x)))
	132	#else
	133	#define REGPARM(x)
	134	#endif
	135
	136	// drc debug
	137	void REGPARM(2) sh2_do_op(SH2 *sh2_, int opcode)
	138	{
	139	sh2 = sh2_;
	140	sh2->pc += 2;
	141
	142	switch (opcode & ( 15 << 12))
	143	{
	144	case 0<<12: op0000(opcode); break;
	145	case 1<<12: op0001(opcode); break;
	146	case 2<<12: op0010(opcode); break;
	147	case 3<<12: op0011(opcode); break;
	148	case 4<<12: op0100(opcode); break;
	149	case 5<<12: op0101(opcode); break;
	150	case 6<<12: op0110(opcode); break;
	151	case 7<<12: op0111(opcode); break;
	152	case 8<<12: op1000(opcode); break;
	153	case 9<<12: op1001(opcode); break;
	154	case 10<<12: op1010(opcode); break;
	155	case 11<<12: op1011(opcode); break;
	156	case 12<<12: op1100(opcode); break;
	157	case 13<<12: op1101(opcode); break;
	158	case 14<<12: op1110(opcode); break;
	159	default: op1111(opcode); break;
	160	}
	161	}
	162
	163	#endif
	164
	165	#ifdef SH2_STATS
	166	#include <stdio.h>
	167	#include <string.h>
	168	#include "sh2dasm.h"
	169
	170	void sh2_dump_stats(void)
	171	{
	172	static const char *rnames[] = {
	173	"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
	174	"R8", "R9", "R10", "R11", "R12", "R13", "R14", "SP",
	175	"PC", "", "PR", "SR", "GBR", "VBR", "MACH", "MACL"
	176	};
	177	long long total;
	178	char buff[64];
	179	int u, i;
	180
	181	// dump reg usage
	182	total = 0;
	183	for (i = 0; i < 24; i++)
	184	total += sh2_stats.r[i];
	185
	186	for (i = 0; i < 24; i++) {
	187	if (i == 16 \|\| i == 17 \|\| i == 19)
	188	continue;
	189	printf("r %6.3f%% %-4s %9d\n", (double)sh2_stats.r[i] * 100.0 / total,
	190	rnames[i], sh2_stats.r[i]);
	191	}
	192
	193	memset(&sh2_stats, 0, sizeof(sh2_stats));
	194
	195	// dump ops
	196	printf("\n");
	197	total = 0;
	198	for (i = 0; i < 0x10000; i++)
	199	total += op_refs[i];
	200
	201	for (u = 0; u < 16; u++) {
	202	int max = 0, op = 0;
	203	for (i = 0; i < 0x10000; i++) {
	204	if (op_refs[i] > max) {
	205	max = op_refs[i];
	206	op = i;
	207	}
	208	}
	209	DasmSH2(buff, 0, op);
	210	printf("i %6.3f%% %9d %s\n", (double)op_refs[op] * 100.0 / total,
	211	op_refs[op], buff);
	212	op_refs[op] = 0;
	213	}
	214	memset(op_refs, 0, sizeof(op_refs));
	215	}
	216	#endif
	217