some new cpu debug code
[picodrive.git] / cpu / sh2 / sh2.c
... / ...
CommitLineData
1/*
2 * PicoDrive
3 * (C) notaz, 2009,2010
4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
8#include <string.h>
9#include <stddef.h>
10
11#include "sh2.h"
12#include "../debug.h"
13#include "compiler.h"
14
15#define I 0xf0
16
17int sh2_init(SH2 *sh2, int is_slave, SH2 *other_sh2)
18{
19 int ret = 0;
20
21 memset(sh2, 0, offsetof(SH2, mult_m68k_to_sh2));
22 sh2->is_slave = is_slave;
23 sh2->other_sh2 = other_sh2;
24 pdb_register_cpu(sh2, PDBCT_SH2, is_slave ? "ssh2" : "msh2");
25#ifdef DRC_SH2
26 ret = sh2_drc_init(sh2);
27#endif
28 return ret;
29}
30
31void sh2_finish(SH2 *sh2)
32{
33#ifdef DRC_SH2
34 sh2_drc_finish(sh2);
35#endif
36}
37
38void sh2_reset(SH2 *sh2)
39{
40 sh2->pc = p32x_sh2_read32(0, sh2);
41 sh2->r[15] = p32x_sh2_read32(4, sh2);
42 sh2->sr = I;
43 sh2->vbr = 0;
44 sh2->pending_int_irq = 0;
45}
46
47void sh2_do_irq(SH2 *sh2, int level, int vector)
48{
49 sh2->sr &= 0x3f3;
50
51 sh2->r[15] -= 4;
52 p32x_sh2_write32(sh2->r[15], sh2->sr, sh2); /* push SR onto stack */
53 sh2->r[15] -= 4;
54 p32x_sh2_write32(sh2->r[15], sh2->pc, sh2); /* push PC onto stack */
55
56 /* set I flags in SR */
57 sh2->sr = (sh2->sr & ~I) | (level << 4);
58
59 /* fetch PC */
60 sh2->pc = p32x_sh2_read32(sh2->vbr + vector * 4, sh2);
61
62 /* 13 cycles at best */
63 sh2->icount -= 13;
64}
65
66int sh2_irl_irq(SH2 *sh2, int level, int nested_call)
67{
68 int taken;
69
70 sh2->pending_irl = level;
71 if (level < sh2->pending_int_irq)
72 level = sh2->pending_int_irq;
73 sh2->pending_level = level;
74
75 taken = (level > ((sh2->sr >> 4) & 0x0f));
76 if (taken) {
77 if (!nested_call) {
78 // not in memhandler, so handle this now (recompiler friendly)
79 // do this to avoid missing irqs that other SH2 might clear
80 int vector = sh2->irq_callback(sh2, level);
81 sh2_do_irq(sh2, level, vector);
82 sh2->m68krcycles_done += C_SH2_TO_M68K(*sh2, 13);
83 }
84 else
85 sh2->test_irq = 1;
86 }
87 return taken;
88}
89
90void sh2_internal_irq(SH2 *sh2, int level, int vector)
91{
92 // FIXME: multiple internal irqs not handled..
93 // assuming internal irqs never clear until accepted
94 sh2->pending_int_irq = level;
95 sh2->pending_int_vector = vector;
96 if (level > sh2->pending_level)
97 sh2->pending_level = level;
98
99 sh2->test_irq = 1;
100}
101
102#define SH2_REG_SIZE (offsetof(SH2, macl) + sizeof(sh2->macl))
103
104void sh2_pack(const SH2 *sh2, unsigned char *buff)
105{
106 unsigned int *p;
107
108 memcpy(buff, sh2, SH2_REG_SIZE);
109 p = (void *)(buff + SH2_REG_SIZE);
110
111 p[0] = sh2->pending_int_irq;
112 p[1] = sh2->pending_int_vector;
113}
114
115void sh2_unpack(SH2 *sh2, const unsigned char *buff)
116{
117 unsigned int *p;
118
119 memcpy(sh2, buff, SH2_REG_SIZE);
120 p = (void *)(buff + SH2_REG_SIZE);
121
122 sh2->pending_int_irq = p[0];
123 sh2->pending_int_vector = p[1];
124 sh2->test_irq = 1;
125}
126
127#ifdef DRC_CMP
128
129/* trace/compare */
130#include <stdio.h>
131#include <stdlib.h>
132#include <pico/memory.h>
133#undef _USE_CZ80 // HACK
134#include <pico/pico_int.h>
135#include <pico/debug.h>
136
137static SH2 sh2ref[2];
138static unsigned int mem_val;
139
140static unsigned int local_read32(SH2 *sh2, u32 a)
141{
142 const sh2_memmap *sh2_map = sh2->read16_map;
143 u16 *pd;
144 uptr p;
145
146 sh2_map += (a >> 25);
147 p = sh2_map->addr;
148 if (!map_flag_set(p)) {
149 pd = (u16 *)((p << 1) + ((a & sh2_map->mask) & ~1));
150 return (pd[0] << 16) | pd[1];
151 }
152
153 if ((a & 0xfffff000) == 0xc0000000) {
154 // data array
155 pd = (u16 *)sh2->data_array + (a & 0xfff) / 2;
156 return (pd[0] << 16) | pd[1];
157 }
158 if ((a & 0xdfffffc0) == 0x4000) {
159 pd = &Pico32x.regs[(a & 0x3f) / 2];
160 return (pd[0] << 16) | pd[1];
161 }
162 if ((a & 0xdffffe00) == 0x4200) {
163 pd = &Pico32xMem->pal[(a & 0x1ff) / 2];
164 return (pd[0] << 16) | pd[1];
165 }
166
167 return 0;
168}
169
170void do_sh2_trace(SH2 *current, int cycles)
171{
172 static int current_slave = -1;
173 static u32 current_m68k_pc;
174 SH2 *sh2o = &sh2ref[current->is_slave];
175 u32 *regs_a = (void *)current;
176 u32 *regs_o = (void *)sh2o;
177 unsigned char v;
178 u32 val;
179 int i;
180
181 if (SekPc != current_m68k_pc) {
182 current_m68k_pc = SekPc;
183 tl_write_uint(CTL_M68KPC, current_m68k_pc);
184 }
185
186 if (current->is_slave != current_slave) {
187 current_slave = current->is_slave;
188 v = CTL_MASTERSLAVE | current->is_slave;
189 tl_write(&v, sizeof(v));
190 }
191
192 for (i = 0; i < offsetof(SH2, read8_map) / 4; i++) {
193 if (i == 17) // ppc
194 continue;
195 if (regs_a[i] != regs_o[i]) {
196 tl_write_uint(CTL_SH2_R + i, regs_a[i]);
197 regs_o[i] = regs_a[i];
198 }
199 }
200
201 if (current->ea != sh2o->ea) {
202 tl_write_uint(CTL_EA, current->ea);
203 sh2o->ea = current->ea;
204 }
205 val = local_read32(current, current->ea);
206 if (mem_val != val) {
207 tl_write_uint(CTL_EAVAL, val);
208 mem_val = val;
209 }
210 tl_write_uint(CTL_CYCLES, cycles);
211}
212
213static const char *regnames[] = {
214 "r0", "r1", "r2", "r3",
215 "r4", "r5", "r6", "r7",
216 "r8", "r9", "r10", "r11",
217 "r12", "r13", "r14", "r15",
218 "pc", "ppc", "pr", "sr",
219 "gbr", "vbr", "mach","macl",
220};
221
222static void dump_regs(SH2 *sh2)
223{
224 char csh2;
225 int i;
226
227 csh2 = sh2->is_slave ? 's' : 'm';
228 for (i = 0; i < 16/2; i++)
229 printf("%csh2 r%d: %08x r%02d: %08x\n", csh2,
230 i, sh2->r[i], i+8, sh2->r[i+8]);
231 printf("%csh2 PC: %08x , %08x\n", csh2, sh2->pc, sh2->ppc);
232 printf("%csh2 SR: %03x PR: %08x\n", csh2, sh2->sr, sh2->pr);
233}
234
235void do_sh2_cmp(SH2 *current)
236{
237 static int current_slave;
238 static u32 current_val;
239 SH2 *sh2o = &sh2ref[current->is_slave];
240 u32 *regs_a = (void *)current;
241 u32 *regs_o = (void *)sh2o;
242 unsigned char code;
243 int cycles_o = 666;
244 u32 sr, val;
245 int bad = 0;
246 int cycles;
247 int i, ret;
248
249 sh2ref[1].is_slave = 1;
250
251 while (1) {
252 ret = tl_read(&code, 1);
253 if (ret <= 0)
254 break;
255 if (code == CTL_CYCLES) {
256 tl_read(&cycles_o, 4);
257 break;
258 }
259
260 switch (code) {
261 case CTL_MASTERSLAVE:
262 case CTL_MASTERSLAVE + 1:
263 current_slave = code & 1;
264 break;
265 case CTL_EA:
266 tl_read_uint(&sh2o->ea);
267 break;
268 case CTL_EAVAL:
269 tl_read_uint(&current_val);
270 break;
271 case CTL_M68KPC:
272 tl_read_uint(&val);
273 if (SekPc != val) {
274 printf("m68k: %08x %08x\n", SekPc, val);
275 bad = 1;
276 }
277 break;
278 default:
279 if (CTL_SH2_R <= code && code < CTL_SH2_R +
280 offsetof(SH2, read8_map) / 4)
281 {
282 tl_read_uint(regs_o + code - CTL_SH2_R);
283 }
284 else
285 {
286 printf("wrong code: %02x\n", code);
287 goto end;
288 }
289 break;
290 }
291 }
292
293 if (ret <= 0) {
294 printf("EOF?\n");
295 goto end;
296 }
297
298 if (current->is_slave != current_slave) {
299 printf("bad slave: %d %d\n", current->is_slave,
300 current_slave);
301 bad = 1;
302 }
303
304 for (i = 0; i < offsetof(SH2, read8_map) / 4; i++) {
305 if (i == 17 || i == 19) // ppc, sr
306 continue;
307 if (regs_a[i] != regs_o[i]) {
308 printf("bad %4s: %08x %08x\n",
309 regnames[i], regs_a[i], regs_o[i]);
310 bad = 1;
311 }
312 }
313
314 sr = current->sr & 0x3f3;
315 cycles = (signed int)current->sr >> 12;
316
317 if (sr != sh2o->sr) {
318 printf("bad SR: %03x %03x\n", sr, sh2o->sr);
319 bad = 1;
320 }
321
322 if (cycles != cycles_o) {
323 printf("bad cycles: %d %d\n", cycles, cycles_o);
324 bad = 1;
325 }
326
327 val = local_read32(current, sh2o->ea);
328 if (val != current_val) {
329 printf("bad val @%08x: %08x %08x\n", sh2o->ea, val, current_val);
330 bad = 1;
331 }
332
333 if (!bad) {
334 sh2o->ppc = current->pc;
335 return;
336 }
337
338end:
339 printf("--\n");
340 dump_regs(sh2o);
341 if (current->is_slave != current_slave)
342 dump_regs(&sh2ref[current->is_slave ^ 1]);
343 PDebugDumpMem();
344 exit(1);
345}
346
347#endif // DRC_CMP