lightrec: Only sync register cache before savestate if using dynarec
[pcsx_rearmed.git] / deps / lightning / check / alu_add.tst
... / ...
CommitLineData
1#include "alu.inc"
2
3.code
4 prolog
5
6#define ADD(N, I0, I1, V) ALU(N, , add, I0, I1, V)
7
8 ADD(0, 0x7fffffff, 1, 0x80000000)
9 ADD(1, 1, 0x7fffffff, 0x80000000)
10 ADD(2, 0x80000000, 1, 0x80000001)
11 ADD(3, 1, 0x80000000, 0x80000001)
12 ADD(4, 0x7fffffff, 0x80000000, 0xffffffff)
13 ADD(5, 0x80000000, 0x7fffffff, 0xffffffff)
14 ADD(6, 0x7fffffff, 0, 0x7fffffff)
15 ADD(7, 0, 0x7fffffff, 0x7fffffff)
16#if __WORDSIZE == 32
17 ADD(8, 0x7fffffff, 0xffffffff, 0x7ffffffe)
18 ADD(9, 0xffffffff, 0x7fffffff, 0x7ffffffe)
19 ADD(10, 0xffffffff, 0xffffffff, 0xfffffffe)
20#else
21 ADD(8, 0x7fffffff, 0xffffffff, 0x17ffffffe)
22 ADD(9, 0xffffffff, 0x7fffffff, 0x17ffffffe)
23 ADD(10, 0xffffffff, 0xffffffff, 0x1fffffffe)
24 ADD(11, 0x7fffffffffffffff, 1, 0x8000000000000000)
25 ADD(12, 1, 0x7fffffffffffffff, 0x8000000000000000)
26 ADD(13, 0x8000000000000000, 1, 0x8000000000000001)
27 ADD(14, 1, 0x8000000000000000, 0x8000000000000001)
28 ADD(15, 0x7fffffffffffffff, 0x8000000000000000, 0xffffffffffffffff)
29 ADD(16, 0x8000000000000000, 0x7fffffffffffffff, 0xffffffffffffffff)
30 ADD(17, 0x7fffffffffffffff, 0xffffffffffffffff, 0x7ffffffffffffffe)
31 ADD(18, 0x7fffffffffffffff, 0x7fffffffffffffff, 0xfffffffffffffffe)
32 ADD(19, 0xffffffffffffffff, 0xffffffffffffffff, 0xfffffffffffffffe)
33#endif
34
35#undef ADD
36#define ADD(N, T, I0, I1, V) FOP(N, T, add, I0, I1, V)
37 ADD(0, _f, -0.5, 0.5, 0.0)
38 ADD(1, _f, 0.25, 0.75, 1.0)
39 ADD(0, _d, -0.5, 0.5, 0.0)
40 ADD(1, _d, 0.25, 0.75, 1.0)
41
42 prepare
43 pushargi ok
44 ellipsis
45 finishi @printf
46 ret
47 epilog