notaz.gp2x.de / pcsx_rearmed.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
Merge pull request #562 from gameblabla/cdrom_fixes_libretro_precautions
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / backends / psx / emu_if.h
... / ...
CommitLineData
1#ifndef __EMU_IF_H__
2#define __EMU_IF_H__
3
4#include "../../new_dynarec.h"
5#include "../../../r3000a.h"
6
7extern char invalid_code[0x100000];
8
9/* weird stuff */
10#define EAX 0
11#define ECX 1
12
13/* same as psxRegs */
14extern int reg[];
15
16/* same as psxRegs.GPR.n.* */
17extern int hi, lo;
18
19/* same as psxRegs.CP0.n.* */
20extern int reg_cop0[];
21#define Status psxRegs.CP0.n.Status
22#define Cause psxRegs.CP0.n.Cause
23#define EPC psxRegs.CP0.n.EPC
24#define BadVAddr psxRegs.CP0.n.BadVAddr
25#define Context psxRegs.CP0.n.Context
26#define EntryHi psxRegs.CP0.n.EntryHi
27#define Count psxRegs.cycle // psxRegs.CP0.n.Count
28
29/* COP2/GTE */
30enum gte_opcodes {
31 GTE_RTPS = 0x01,
32 GTE_NCLIP = 0x06,
33 GTE_OP = 0x0c,
34 GTE_DPCS = 0x10,
35 GTE_INTPL = 0x11,
36 GTE_MVMVA = 0x12,
37 GTE_NCDS = 0x13,
38 GTE_CDP = 0x14,
39 GTE_NCDT = 0x16,
40 GTE_NCCS = 0x1b,
41 GTE_CC = 0x1c,
42 GTE_NCS = 0x1e,
43 GTE_NCT = 0x20,
44 GTE_SQR = 0x28,
45 GTE_DCPL = 0x29,
46 GTE_DPCT = 0x2a,
47 GTE_AVSZ3 = 0x2d,
48 GTE_AVSZ4 = 0x2e,
49 GTE_RTPT = 0x30,
50 GTE_GPF = 0x3d,
51 GTE_GPL = 0x3e,
52 GTE_NCCT = 0x3f,
53};
54
55extern int reg_cop2d[], reg_cop2c[];
56extern void *gte_handlers[64];
57extern void *gte_handlers_nf[64];
58extern const char *gte_regnames[64];
59extern const char gte_cycletab[64];
60extern const uint64_t gte_reg_reads[64];
61extern const uint64_t gte_reg_writes[64];
62
63/* dummy */
64extern int FCR0, FCR31;
65
66/* mem */
67extern void *mem_rtab;
68extern void *mem_wtab;
69
70void jump_handler_read8(u32 addr, u32 *table, u32 cycles);
71void jump_handler_read16(u32 addr, u32 *table, u32 cycles);
72void jump_handler_read32(u32 addr, u32 *table, u32 cycles);
73void jump_handler_write8(u32 addr, u32 data, u32 cycles, u32 *table);
74void jump_handler_write16(u32 addr, u32 data, u32 cycles, u32 *table);
75void jump_handler_write32(u32 addr, u32 data, u32 cycles, u32 *table);
76void jump_handler_write_h(u32 addr, u32 data, u32 cycles, void *handler);
77void jump_handle_swl(u32 addr, u32 data, u32 cycles);
78void jump_handle_swr(u32 addr, u32 data, u32 cycles);
79void rcnt0_read_count_m0(u32 addr, u32, u32 cycles);
80void rcnt0_read_count_m1(u32 addr, u32, u32 cycles);
81void rcnt1_read_count_m0(u32 addr, u32, u32 cycles);
82void rcnt1_read_count_m1(u32 addr, u32, u32 cycles);
83void rcnt2_read_count_m0(u32 addr, u32, u32 cycles);
84void rcnt2_read_count_m1(u32 addr, u32, u32 cycles);
85
86extern unsigned int address;
87extern void *psxH_ptr;
88extern void *zeromem_ptr;
89extern void *scratch_buf_ptr;
90
91// same as invalid_code, just a region for ram write checks (inclusive)
92extern u32 inv_code_start, inv_code_end;
93
94/* cycles/irqs */
95extern u32 next_interupt;
96extern int pending_exception;
97
98/* called by drc */
99void pcsx_mtc0(u32 reg, u32 val);
100void pcsx_mtc0_ds(u32 reg, u32 val);
101
102/* misc */
103extern const void (*psxHLEt[8])();
104
105extern void SysPrintf(const char *fmt, ...);
106
107#ifdef RAM_FIXED
108#define rdram ((u_int)0x80000000)
109#else
110#define rdram ((u_int)psxM)
111#endif
112
113#endif /* __EMU_IF_H__ */
ARM optimized PCSX fork