[pcsx_rearmed.git] / libpcsxcore / new_dynarec / emu_if.h

#include "new_dynarec.h"
#include "../r3000a.h"

extern int dynarec_local[];

/* COP2/GTE */
enum gte_opcodes {
	GTE_RTPS	= 0x01,
	GTE_NCLIP	= 0x06,
	GTE_OP		= 0x0c,
	GTE_DPCS	= 0x10,
	GTE_INTPL	= 0x11,
	GTE_MVMVA	= 0x12,
	GTE_NCDS	= 0x13,
	GTE_CDP		= 0x14,
	GTE_NCDT	= 0x16,
	GTE_NCCS	= 0x1b,
	GTE_CC		= 0x1c,
	GTE_NCS		= 0x1e,
	GTE_NCT		= 0x20,
	GTE_SQR		= 0x28,
	GTE_DCPL	= 0x29,
	GTE_DPCT	= 0x2a,
	GTE_AVSZ3	= 0x2d,
	GTE_AVSZ4	= 0x2e,
	GTE_RTPT	= 0x30,
	GTE_GPF		= 0x3d,
	GTE_GPL		= 0x3e,
	GTE_NCCT	= 0x3f,
};

extern void *gte_handlers[64];
extern void *gte_handlers_nf[64];
extern const char *gte_regnames[64];
extern const uint64_t gte_reg_reads[64];
extern const uint64_t gte_reg_writes[64];

/* mem */
extern void *mem_rtab;
extern void *mem_wtab;

void jump_handler_read8(u32 addr, u32 *table, u32 cycles);
void jump_handler_read16(u32 addr, u32 *table, u32 cycles);
void jump_handler_read32(u32 addr, u32 *table, u32 cycles);
void jump_handler_write8(u32 addr, u32 data, u32 cycles, u32 *table);
void jump_handler_write16(u32 addr, u32 data, u32 cycles, u32 *table);
void jump_handler_write32(u32 addr, u32 data, u32 cycles, u32 *table);
void jump_handler_write_h(u32 addr, u32 data, u32 cycles, void *handler);
void jump_handle_swl(u32 addr, u32 data, u32 cycles);
void jump_handle_swr(u32 addr, u32 data, u32 cycles);
u32  rcnt0_read_count_m0(u32 addr, u32, u32 cycles);
u32  rcnt0_read_count_m1(u32 addr, u32, u32 cycles);
u32  rcnt1_read_count_m0(u32 addr, u32, u32 cycles);
u32  rcnt1_read_count_m1(u32 addr, u32, u32 cycles);
u32  rcnt2_read_count_m0(u32 addr, u32, u32 cycles);
u32  rcnt2_read_count_m1(u32 addr, u32, u32 cycles);

extern unsigned int address;
extern unsigned int hack_addr;
extern void *psxH_ptr;
extern void *zeromem_ptr;
extern void *scratch_buf_ptr;

// same as invalid_code, just a region for ram write checks (inclusive)
// (psx/guest address range)
extern u32 inv_code_start, inv_code_end;

/* cycles/irqs */
extern u32 next_interupt;

/* called by drc */
struct psxRegisters;
void pcsx_mtc0(struct psxRegisters *regs, u32 reg, u32 val);
void pcsx_mtc0_ds(struct psxRegisters *regs, u32 reg, u32 val);

/* misc */
extern void SysPrintf(const char *fmt, ...);
Commit	Line	Data
	1	#include "new_dynarec.h"
	2	#include "../r3000a.h"
	3
	4	extern int dynarec_local[];
	5
	6	/* COP2/GTE */
	7	enum gte_opcodes {
	8	GTE_RTPS = 0x01,
	9	GTE_NCLIP = 0x06,
	10	GTE_OP = 0x0c,
	11	GTE_DPCS = 0x10,
	12	GTE_INTPL = 0x11,
	13	GTE_MVMVA = 0x12,
	14	GTE_NCDS = 0x13,
	15	GTE_CDP = 0x14,
	16	GTE_NCDT = 0x16,
	17	GTE_NCCS = 0x1b,
	18	GTE_CC = 0x1c,
	19	GTE_NCS = 0x1e,
	20	GTE_NCT = 0x20,
	21	GTE_SQR = 0x28,
	22	GTE_DCPL = 0x29,
	23	GTE_DPCT = 0x2a,
	24	GTE_AVSZ3 = 0x2d,
	25	GTE_AVSZ4 = 0x2e,
	26	GTE_RTPT = 0x30,
	27	GTE_GPF = 0x3d,
	28	GTE_GPL = 0x3e,
	29	GTE_NCCT = 0x3f,
	30	};
	31
	32	extern void *gte_handlers[64];
	33	extern void *gte_handlers_nf[64];
	34	extern const char *gte_regnames[64];
	35	extern const uint64_t gte_reg_reads[64];
	36	extern const uint64_t gte_reg_writes[64];
	37
	38	/* mem */
	39	extern void *mem_rtab;
	40	extern void *mem_wtab;
	41
	42	void jump_handler_read8(u32 addr, u32 *table, u32 cycles);
	43	void jump_handler_read16(u32 addr, u32 *table, u32 cycles);
	44	void jump_handler_read32(u32 addr, u32 *table, u32 cycles);
	45	void jump_handler_write8(u32 addr, u32 data, u32 cycles, u32 *table);
	46	void jump_handler_write16(u32 addr, u32 data, u32 cycles, u32 *table);
	47	void jump_handler_write32(u32 addr, u32 data, u32 cycles, u32 *table);
	48	void jump_handler_write_h(u32 addr, u32 data, u32 cycles, void *handler);
	49	void jump_handle_swl(u32 addr, u32 data, u32 cycles);
	50	void jump_handle_swr(u32 addr, u32 data, u32 cycles);
	51	u32 rcnt0_read_count_m0(u32 addr, u32, u32 cycles);
	52	u32 rcnt0_read_count_m1(u32 addr, u32, u32 cycles);
	53	u32 rcnt1_read_count_m0(u32 addr, u32, u32 cycles);
	54	u32 rcnt1_read_count_m1(u32 addr, u32, u32 cycles);
	55	u32 rcnt2_read_count_m0(u32 addr, u32, u32 cycles);
	56	u32 rcnt2_read_count_m1(u32 addr, u32, u32 cycles);
	57
	58	extern unsigned int address;
	59	extern unsigned int hack_addr;
	60	extern void *psxH_ptr;
	61	extern void *zeromem_ptr;
	62	extern void *scratch_buf_ptr;
	63
	64	// same as invalid_code, just a region for ram write checks (inclusive)
	65	// (psx/guest address range)
	66	extern u32 inv_code_start, inv_code_end;
	67
	68	/* cycles/irqs */
	69	extern u32 next_interupt;
	70
	71	/* called by drc */
	72	struct psxRegisters;
	73	void pcsx_mtc0(struct psxRegisters *regs, u32 reg, u32 val);
	74	void pcsx_mtc0_ds(struct psxRegisters *regs, u32 reg, u32 val);
	75
	76	/* misc */
	77	extern void SysPrintf(const char *fmt, ...);
	78