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platform ps2, handle audio similar to psp
[picodrive.git] / memory.c
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1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006-2009 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include "pico_int.h"\r
11#include "memory.h"\r
12\r
13#include "sound/ym2612.h"\r
14#include "sound/sn76496.h"\r
15\r
16extern unsigned int lastSSRamWrite; // used by serial eeprom code\r
17\r
18unsigned long m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
19unsigned long m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
20unsigned long m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
21unsigned long m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
22\r
23static void xmap_set(unsigned long *map, int shift, int start_addr, int end_addr,\r
24 const void *func_or_mh, int is_func)\r
25{\r
26 unsigned long addr = (unsigned long)func_or_mh;\r
27 int mask = (1 << shift) - 1;\r
28 int i;\r
29\r
30 if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {\r
31 elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",\r
32 start_addr, end_addr);\r
33 return;\r
34 }\r
35\r
36 if (addr & 1) {\r
37 elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);\r
38 return;\r
39 }\r
40\r
41 if (!is_func)\r
42 addr -= start_addr;\r
43\r
44 for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r
45 map[i] = addr >> 1;\r
46 if (is_func)\r
47 map[i] |= 1 << (sizeof(addr) * 8 - 1);\r
48 }\r
49}\r
50\r
51void z80_map_set(unsigned long *map, int start_addr, int end_addr,\r
52 const void *func_or_mh, int is_func)\r
53{\r
54 xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r
55}\r
56\r
57void cpu68k_map_set(unsigned long *map, int start_addr, int end_addr,\r
58 const void *func_or_mh, int is_func)\r
59{\r
60 xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r
61}\r
62\r
63// more specialized/optimized function (does same as above)\r
64void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)\r
65{\r
66 unsigned long *r8map, *r16map, *w8map, *w16map;\r
67 unsigned long addr = (unsigned long)ptr;\r
68 int shift = M68K_MEM_SHIFT;\r
69 int i;\r
70\r
71 if (!is_sub) {\r
72 r8map = m68k_read8_map;\r
73 r16map = m68k_read16_map;\r
74 w8map = m68k_write8_map;\r
75 w16map = m68k_write16_map;\r
76 } else {\r
77 r8map = s68k_read8_map;\r
78 r16map = s68k_read16_map;\r
79 w8map = s68k_write8_map;\r
80 w16map = s68k_write16_map;\r
81 }\r
82\r
83 addr -= start_addr;\r
84 addr >>= 1;\r
85 for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
86 r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;\r
87}\r
88\r
89static u32 m68k_unmapped_read8(u32 a)\r
90{\r
91 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r
92 return 0; // assume pulldown, as if MegaCD2 was attached\r
93}\r
94\r
95static u32 m68k_unmapped_read16(u32 a)\r
96{\r
97 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);\r
98 return 0;\r
99}\r
100\r
101static void m68k_unmapped_write8(u32 a, u32 d)\r
102{\r
103 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r
104}\r
105\r
106static void m68k_unmapped_write16(u32 a, u32 d)\r
107{\r
108 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
109}\r
110\r
111void m68k_map_unmap(int start_addr, int end_addr)\r
112{\r
113 unsigned long addr;\r
114 int shift = M68K_MEM_SHIFT;\r
115 int i;\r
116\r
117 addr = (unsigned long)m68k_unmapped_read8;\r
118 for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
119 m68k_read8_map[i] = (addr >> 1) | (1 << 31);\r
120\r
121 addr = (unsigned long)m68k_unmapped_read16;\r
122 for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
123 m68k_read16_map[i] = (addr >> 1) | (1 << 31);\r
124\r
125 addr = (unsigned long)m68k_unmapped_write8;\r
126 for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
127 m68k_write8_map[i] = (addr >> 1) | (1 << 31);\r
128\r
129 addr = (unsigned long)m68k_unmapped_write16;\r
130 for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
131 m68k_write16_map[i] = (addr >> 1) | (1 << 31);\r
132}\r
133\r
134MAKE_68K_READ8(m68k_read8, m68k_read8_map)\r
135MAKE_68K_READ16(m68k_read16, m68k_read16_map)\r
136MAKE_68K_READ32(m68k_read32, m68k_read16_map)\r
137MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)\r
138MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)\r
139MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)\r
140\r
141// -----------------------------------------------------------------\r
142\r
143static u32 ym2612_read_local_68k(void);\r
144static int ym2612_write_local(u32 a, u32 d, int is_from_z80);\r
145static void z80_mem_setup(void);\r
146\r
147#ifdef _ASM_MEMORY_C\r
148u32 PicoRead8_sram(u32 a);\r
149u32 PicoRead16_sram(u32 a);\r
150#endif\r
151\r
152#ifdef EMU_CORE_DEBUG\r
153u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
154int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
155extern unsigned int ppop;\r
156#endif\r
157\r
158#ifdef IO_STATS\r
159void log_io(unsigned int addr, int bits, int rw);\r
160#elif defined(_MSC_VER)\r
161#define log_io\r
162#else\r
163#define log_io(...)\r
164#endif\r
165\r
166#if defined(EMU_C68K)\r
167void cyclone_crashed(u32 pc, struct Cyclone *context)\r
168{\r
169 elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x\n",\r
170 context == &PicoCpuCM68k ? 'm' : 's', pc);\r
171 context->membase = (u32)Pico.rom;\r
172 context->pc = (u32)Pico.rom + Pico.romsize;\r
173}\r
174#endif\r
175\r
176// -----------------------------------------------------------------\r
177// memmap helpers\r
178\r
179#ifndef _ASM_MEMORY_C\r
180static\r
181#endif\r
182int PadRead(int i)\r
183{\r
184 int pad,value,data_reg;\r
185 pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
186 data_reg=Pico.ioports[i+1];\r
187\r
188 // orr the bits, which are set as output\r
189 value = data_reg&(Pico.ioports[i+4]|0x80);\r
190\r
191 if (PicoOpt & POPT_6BTN_PAD)\r
192 {\r
193 int phase = Pico.m.padTHPhase[i];\r
194\r
195 if(phase == 2 && !(data_reg&0x40)) { // TH\r
196 value|=(pad&0xc0)>>2; // ?0SA 0000\r
197 return value;\r
198 } else if(phase == 3) {\r
199 if(data_reg&0x40)\r
200 value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
201 else\r
202 value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
203 return value;\r
204 }\r
205 }\r
206\r
207 if(data_reg&0x40) // TH\r
208 value|=(pad&0x3f); // ?1CB RLDU\r
209 else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
210\r
211 return value; // will mirror later\r
212}\r
213\r
214#ifndef _ASM_MEMORY_C\r
215\r
216static u32 io_ports_read(u32 a)\r
217{\r
218 u32 d;\r
219 a = (a>>1) & 0xf;\r
220 switch (a) {\r
221 case 0: d = Pico.m.hardware; break; // Hardware value (Version register)\r
222 case 1: d = PadRead(0); break;\r
223 case 2: d = PadRead(1); break;\r
224 default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r
225 }\r
226 return d;\r
227}\r
228\r
229static void NOINLINE io_ports_write(u32 a, u32 d)\r
230{\r
231 a = (a>>1) & 0xf;\r
232\r
233 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
234 if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD))\r
235 {\r
236 Pico.m.padDelay[a - 1] = 0;\r
237 if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r
238 Pico.m.padTHPhase[a - 1]++;\r
239 }\r
240\r
241 // certain IO ports can be used as RAM\r
242 Pico.ioports[a] = d;\r
243}\r
244\r
245#endif // _ASM_MEMORY_C\r
246\r
247void NOINLINE ctl_write_z80busreq(u32 d)\r
248{\r
249 d&=1; d^=1;\r
250 elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);\r
251 if (d ^ Pico.m.z80Run)\r
252 {\r
253 if (d)\r
254 {\r
255 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r
256 }\r
257 else\r
258 {\r
259 z80stopCycle = SekCyclesDone();\r
260 if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)\r
261 PicoSyncZ80(z80stopCycle);\r
262 }\r
263 Pico.m.z80Run = d;\r
264 }\r
265}\r
266\r
267void NOINLINE ctl_write_z80reset(u32 d)\r
268{\r
269 d&=1; d^=1;\r
270 elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);\r
271 if (d ^ Pico.m.z80_reset)\r
272 {\r
273 if (d)\r
274 {\r
275 if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)\r
276 PicoSyncZ80(SekCyclesDone());\r
277 YM2612ResetChip();\r
278 timers_reset();\r
279 }\r
280 else\r
281 {\r
282 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r
283 z80_reset();\r
284 }\r
285 Pico.m.z80_reset = d;\r
286 }\r
287}\r
288\r
289// -----------------------------------------------------------------\r
290\r
291#ifndef _ASM_MEMORY_C\r
292\r
293// cart (save) RAM area (usually 0x200000 - ...)\r
294static u32 PicoRead8_sram(u32 a)\r
295{\r
296 u32 d;\r
297 if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
298 {\r
299 if (SRam.flags & SRF_EEPROM) {\r
300 d = EEPROM_read();\r
301 if (!(a & 1))\r
302 d >>= 8;\r
303 } else\r
304 d = *(u8 *)(SRam.data - SRam.start + a);\r
305 elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
306 return d;\r
307 }\r
308\r
309 // XXX: this is banking unfriendly\r
310 if (a < Pico.romsize)\r
311 return Pico.rom[a ^ 1];\r
312 \r
313 return m68k_unmapped_read8(a);\r
314}\r
315\r
316static u32 PicoRead16_sram(u32 a)\r
317{\r
318 u32 d;\r
319 if (SRam.end >= a && a >= SRam.start && (Pico.m.sram_reg & SRR_MAPPED))\r
320 {\r
321 if (SRam.flags & SRF_EEPROM)\r
322 d = EEPROM_read();\r
323 else {\r
324 u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
325 d = pm[0] << 8;\r
326 d |= pm[1];\r
327 }\r
328 elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
329 return d;\r
330 }\r
331\r
332 if (a < Pico.romsize)\r
333 return *(u16 *)(Pico.rom + a);\r
334\r
335 return m68k_unmapped_read16(a);\r
336}\r
337\r
338#endif // _ASM_MEMORY_C\r
339\r
340static void PicoWrite8_sram(u32 a, u32 d)\r
341{\r
342 if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
343 m68k_unmapped_write8(a, d);\r
344 return;\r
345 }\r
346\r
347 elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);\r
348 if (SRam.flags & SRF_EEPROM)\r
349 {\r
350 EEPROM_write8(a, d);\r
351 }\r
352 else {\r
353 u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
354 if (*pm != (u8)d) {\r
355 SRam.changed = 1;\r
356 *pm = (u8)d;\r
357 }\r
358 }\r
359}\r
360\r
361static void PicoWrite16_sram(u32 a, u32 d)\r
362{\r
363 if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
364 m68k_unmapped_write16(a, d);\r
365 return;\r
366 }\r
367\r
368 elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);\r
369 if (SRam.flags & SRF_EEPROM)\r
370 {\r
371 EEPROM_write16(d);\r
372 }\r
373 else {\r
374 // XXX: hardware could easily use MSB too..\r
375 u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
376 if (*pm != (u8)d) {\r
377 SRam.changed = 1;\r
378 *pm = (u8)d;\r
379 }\r
380 }\r
381}\r
382\r
383// z80 area (0xa00000 - 0xa0ffff)\r
384// TODO: verify mirrors VDP and bank reg (bank area mirroring verified)\r
385static u32 PicoRead8_z80(u32 a)\r
386{\r
387 u32 d = 0xff;\r
388 if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r
389 elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);\r
390 // open bus. Pulled down if MegaCD2 is attached.\r
391 return 0;\r
392 }\r
393\r
394 if ((a & 0x4000) == 0x0000)\r
395 d = Pico.zram[a & 0x1fff];\r
396 else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff\r
397 d = ym2612_read_local_68k(); \r
398 else\r
399 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r
400 return d;\r
401}\r
402\r
403static u32 PicoRead16_z80(u32 a)\r
404{\r
405 u32 d = PicoRead8_z80(a);\r
406 return d | (d << 8);\r
407}\r
408\r
409static void PicoWrite8_z80(u32 a, u32 d)\r
410{\r
411 if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r
412 // verified on real hw\r
413 elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);\r
414 return;\r
415 }\r
416\r
417 if ((a & 0x4000) == 0x0000) { // z80 RAM\r
418 SekCyclesBurn(2); // hack\r
419 Pico.zram[a & 0x1fff] = (u8)d;\r
420 return;\r
421 }\r
422 if ((a & 0x6000) == 0x4000) { // FM Sound\r
423 if (PicoOpt & POPT_EN_FM)\r
424 emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;\r
425 return;\r
426 }\r
427 // TODO: probably other VDP access too? Maybe more mirrors?\r
428 if ((a & 0x7ff9) == 0x7f11) { // PSG Sound\r
429 if (PicoOpt & POPT_EN_PSG)\r
430 SN76496Write(d);\r
431 return;\r
432 }\r
433 if ((a & 0x7f00) == 0x6000) // Z80 BANK register\r
434 {\r
435 Pico.m.z80_bank68k >>= 1;\r
436 Pico.m.z80_bank68k |= d << 8;\r
437 Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r
438 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);\r
439 return;\r
440 }\r
441 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);\r
442}\r
443\r
444static void PicoWrite16_z80(u32 a, u32 d)\r
445{\r
446 // for RAM, only most significant byte is sent\r
447 // TODO: verify remaining accesses\r
448 PicoWrite8_z80(a, d >> 8);\r
449}\r
450\r
451#ifndef _ASM_MEMORY_C\r
452\r
453// IO/control area (0xa10000 - 0xa1ffff)\r
454u32 PicoRead8_io(u32 a)\r
455{\r
456 u32 d;\r
457\r
458 if ((a & 0xffe0) == 0x0000) { // I/O ports\r
459 d = io_ports_read(a);\r
460 goto end;\r
461 }\r
462\r
463 // faking open bus (MegaCD pulldowns don't work here curiously)\r
464 d = Pico.m.rotate++;\r
465 d ^= d << 6;\r
466\r
467 if ((a & 0xfc00) == 0x1000) {\r
468 // bit8 seems to be readable in this range\r
469 if (!(a & 1))\r
470 d &= ~0x01;\r
471\r
472 if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)\r
473 d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r
474 elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
475 }\r
476 goto end;\r
477 }\r
478\r
479 if (!(PicoOpt & POPT_DIS_32X)) {\r
480 d = PicoRead8_32x(a);\r
481 goto end;\r
482 }\r
483\r
484 d = m68k_unmapped_read8(a);\r
485end:\r
486 return d;\r
487}\r
488\r
489u32 PicoRead16_io(u32 a)\r
490{\r
491 u32 d;\r
492\r
493 if ((a & 0xffe0) == 0x0000) { // I/O ports\r
494 d = io_ports_read(a);\r
495 d |= d << 8;\r
496 goto end;\r
497 }\r
498\r
499 // faking open bus\r
500 d = (Pico.m.rotate += 0x41);\r
501 d ^= (d << 5) ^ (d << 8);\r
502\r
503 // bit8 seems to be readable in this range\r
504 if ((a & 0xfc00) == 0x1000) {\r
505 d &= ~0x0100;\r
506\r
507 if ((a & 0xff00) == 0x1100) { // z80 busreq\r
508 d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r
509 elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
510 }\r
511 goto end;\r
512 }\r
513\r
514 if (!(PicoOpt & POPT_DIS_32X)) {\r
515 d = PicoRead16_32x(a);\r
516 goto end;\r
517 }\r
518\r
519 d = m68k_unmapped_read16(a);\r
520end:\r
521 return d;\r
522}\r
523\r
524void PicoWrite8_io(u32 a, u32 d)\r
525{\r
526 if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)\r
527 io_ports_write(a, d);\r
528 return;\r
529 }\r
530 if ((a & 0xff01) == 0x1100) { // z80 busreq\r
531 ctl_write_z80busreq(d);\r
532 return;\r
533 }\r
534 if ((a & 0xff01) == 0x1200) { // z80 reset\r
535 ctl_write_z80reset(d);\r
536 return;\r
537 }\r
538 if (a == 0xa130f1) { // sram access register\r
539 elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
540 Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r
541 Pico.m.sram_reg |= (u8)(d & 3);\r
542 return;\r
543 }\r
544 if (!(PicoOpt & POPT_DIS_32X)) {\r
545 PicoWrite8_32x(a, d);\r
546 return;\r
547 }\r
548\r
549 m68k_unmapped_write8(a, d);\r
550}\r
551\r
552void PicoWrite16_io(u32 a, u32 d)\r
553{\r
554 if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)\r
555 io_ports_write(a, d);\r
556 return;\r
557 }\r
558 if ((a & 0xff00) == 0x1100) { // z80 busreq\r
559 ctl_write_z80busreq(d >> 8);\r
560 return;\r
561 }\r
562 if ((a & 0xff00) == 0x1200) { // z80 reset\r
563 ctl_write_z80reset(d >> 8);\r
564 return;\r
565 }\r
566 if (a == 0xa130f0) { // sram access register\r
567 elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
568 Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);\r
569 Pico.m.sram_reg |= (u8)(d & 3);\r
570 return;\r
571 }\r
572 if (!(PicoOpt & POPT_DIS_32X)) {\r
573 PicoWrite16_32x(a, d);\r
574 return;\r
575 }\r
576 m68k_unmapped_write16(a, d);\r
577}\r
578\r
579#endif // _ASM_MEMORY_C\r
580\r
581// VDP area (0xc00000 - 0xdfffff)\r
582// TODO: verify if lower byte goes to PSG on word writes\r
583static u32 PicoRead8_vdp(u32 a)\r
584{\r
585 if ((a & 0x00e0) == 0x0000)\r
586 return PicoVideoRead8(a);\r
587\r
588 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r
589 return 0;\r
590}\r
591\r
592static u32 PicoRead16_vdp(u32 a)\r
593{\r
594 if ((a & 0x00e0) == 0x0000)\r
595 return PicoVideoRead(a);\r
596\r
597 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r
598 return 0;\r
599}\r
600\r
601static void PicoWrite8_vdp(u32 a, u32 d)\r
602{\r
603 if ((a & 0x00f9) == 0x0011) { // PSG Sound\r
604 if (PicoOpt & POPT_EN_PSG)\r
605 SN76496Write(d);\r
606 return;\r
607 }\r
608 if ((a & 0x00e0) == 0x0000) {\r
609 d &= 0xff;\r
610 PicoVideoWrite(a, d | (d << 8));\r
611 return;\r
612 }\r
613\r
614 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);\r
615}\r
616\r
617static void PicoWrite16_vdp(u32 a, u32 d)\r
618{\r
619 if ((a & 0x00f9) == 0x0010) { // PSG Sound\r
620 if (PicoOpt & POPT_EN_PSG)\r
621 SN76496Write(d);\r
622 return;\r
623 }\r
624 if ((a & 0x00e0) == 0x0000) {\r
625 PicoVideoWrite(a, d);\r
626 return;\r
627 }\r
628\r
629 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
630}\r
631\r
632// -----------------------------------------------------------------\r
633\r
634#ifdef EMU_M68K\r
635static void m68k_mem_setup(void);\r
636#endif\r
637\r
638PICO_INTERNAL void PicoMemSetup(void)\r
639{\r
640 int mask, rs, a;\r
641\r
642 // setup the memory map\r
643 cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);\r
644 cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);\r
645 cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);\r
646 cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);\r
647\r
648 // ROM\r
649 // align to bank size. We know ROM loader allocated enough for this\r
650 mask = (1 << M68K_MEM_SHIFT) - 1;\r
651 rs = (Pico.romsize + mask) & ~mask;\r
652 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);\r
653 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);\r
654\r
655 // Common case of on-cart (save) RAM, usually at 0x200000-...\r
656 if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {\r
657 rs = SRam.end - SRam.start;\r
658 rs = (rs + mask) & ~mask;\r
659 if (SRam.start + rs >= 0x1000000)\r
660 rs = 0x1000000 - SRam.start;\r
661 cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);\r
662 cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);\r
663 cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);\r
664 cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);\r
665 }\r
666\r
667 // Z80 region\r
668 cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);\r
669 cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);\r
670 cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);\r
671 cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);\r
672\r
673 // IO/control region\r
674 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);\r
675 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);\r
676 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);\r
677 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);\r
678\r
679 // VDP region\r
680 for (a = 0xc00000; a < 0xe00000; a += 0x010000) {\r
681 if ((a & 0xe700e0) != 0xc00000)\r
682 continue;\r
683 cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);\r
684 cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);\r
685 cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);\r
686 cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);\r
687 }\r
688\r
689 // RAM and it's mirrors\r
690 for (a = 0xe00000; a < 0x1000000; a += 0x010000) {\r
691 cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);\r
692 cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);\r
693 cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);\r
694 cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);\r
695 }\r
696\r
697 // Setup memory callbacks:\r
698#ifdef EMU_C68K\r
699 PicoCpuCM68k.read8 = (void *)m68k_read8_map;\r
700 PicoCpuCM68k.read16 = (void *)m68k_read16_map;\r
701 PicoCpuCM68k.read32 = (void *)m68k_read16_map;\r
702 PicoCpuCM68k.write8 = (void *)m68k_write8_map;\r
703 PicoCpuCM68k.write16 = (void *)m68k_write16_map;\r
704 PicoCpuCM68k.write32 = (void *)m68k_write16_map;\r
705 PicoCpuCM68k.checkpc = NULL; /* unused */\r
706 PicoCpuCM68k.fetch8 = NULL;\r
707 PicoCpuCM68k.fetch16 = NULL;\r
708 PicoCpuCM68k.fetch32 = NULL;\r
709#endif\r
710#ifdef EMU_F68K\r
711 PicoCpuFM68k.read_byte = m68k_read8;\r
712 PicoCpuFM68k.read_word = m68k_read16;\r
713 PicoCpuFM68k.read_long = m68k_read32;\r
714 PicoCpuFM68k.write_byte = m68k_write8;\r
715 PicoCpuFM68k.write_word = m68k_write16;\r
716 PicoCpuFM68k.write_long = m68k_write32;\r
717\r
718 // setup FAME fetchmap\r
719 {\r
720 int i;\r
721 // by default, point everything to first 64k of ROM\r
722 for (i = 0; i < M68K_FETCHBANK1; i++)\r
723 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
724 // now real ROM\r
725 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
726 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
727 // .. and RAM\r
728 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
729 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
730 }\r
731#endif\r
732#ifdef EMU_M68K\r
733 m68k_mem_setup();\r
734#endif\r
735\r
736 z80_mem_setup();\r
737}\r
738\r
739#ifdef EMU_M68K\r
740unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r
741unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r
742unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r
743void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r
744void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r
745void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r
746\r
747/* it appears that Musashi doesn't always mask the unused bits */\r
748unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r
749unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r
750unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r
751void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r
752void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r
753void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r
754\r
755static void m68k_mem_setup(void)\r
756{\r
757 pm68k_read_memory_8 = m68k_read8;\r
758 pm68k_read_memory_16 = m68k_read16;\r
759 pm68k_read_memory_32 = m68k_read32;\r
760 pm68k_write_memory_8 = m68k_write8;\r
761 pm68k_write_memory_16 = m68k_write16;\r
762 pm68k_write_memory_32 = m68k_write32;\r
763}\r
764#endif // EMU_M68K\r
765\r
766\r
767// -----------------------------------------------------------------\r
768\r
769static int get_scanline(int is_from_z80)\r
770{\r
771 if (is_from_z80) {\r
772 int cycles = z80_cyclesDone();\r
773 while (cycles - z80_scanline_cycles >= 228)\r
774 z80_scanline++, z80_scanline_cycles += 228;\r
775 return z80_scanline;\r
776 }\r
777\r
778 return Pico.m.scanline;\r
779}\r
780\r
781/* probably should not be in this file, but it's near related code here */\r
782void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)\r
783{\r
784 int xcycles = z80_cycles << 8;\r
785\r
786 /* check for overflows */\r
787 if ((mode_old & 4) && xcycles > timer_a_next_oflow)\r
788 ym2612.OPN.ST.status |= 1;\r
789\r
790 if ((mode_old & 8) && xcycles > timer_b_next_oflow)\r
791 ym2612.OPN.ST.status |= 2;\r
792\r
793 /* update timer a */\r
794 if (mode_old & 1)\r
795 while (xcycles > timer_a_next_oflow)\r
796 timer_a_next_oflow += timer_a_step;\r
797\r
798 if ((mode_old ^ mode_new) & 1) // turning on/off\r
799 {\r
800 if (mode_old & 1)\r
801 timer_a_next_oflow = TIMER_NO_OFLOW;\r
802 else\r
803 timer_a_next_oflow = xcycles + timer_a_step;\r
804 }\r
805 if (mode_new & 1)\r
806 elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);\r
807\r
808 /* update timer b */\r
809 if (mode_old & 2)\r
810 while (xcycles > timer_b_next_oflow)\r
811 timer_b_next_oflow += timer_b_step;\r
812\r
813 if ((mode_old ^ mode_new) & 2)\r
814 {\r
815 if (mode_old & 2)\r
816 timer_b_next_oflow = TIMER_NO_OFLOW;\r
817 else\r
818 timer_b_next_oflow = xcycles + timer_b_step;\r
819 }\r
820 if (mode_new & 2)\r
821 elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);\r
822}\r
823\r
824// ym2612 DAC and timer I/O handlers for z80\r
825static int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r
826{\r
827 int addr;\r
828\r
829 a &= 3;\r
830 if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */\r
831 {\r
832 int scanline = get_scanline(is_from_z80);\r
833 //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r
834 ym2612.dacout = ((int)d - 0x80) << 6;\r
835 if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)\r
836 PsndDoDAC(scanline);\r
837 return 0;\r
838 }\r
839\r
840 switch (a)\r
841 {\r
842 case 0: /* address port 0 */\r
843 ym2612.OPN.ST.address = d;\r
844 ym2612.addr_A1 = 0;\r
845#ifdef __GP2X__\r
846 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
847#endif\r
848 return 0;\r
849\r
850 case 1: /* data port 0 */\r
851 if (ym2612.addr_A1 != 0)\r
852 return 0;\r
853\r
854 addr = ym2612.OPN.ST.address;\r
855 ym2612.REGS[addr] = d;\r
856\r
857 switch (addr)\r
858 {\r
859 case 0x24: // timer A High 8\r
860 case 0x25: { // timer A Low 2\r
861 int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))\r
862 : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));\r
863 if (ym2612.OPN.ST.TA != TAnew)\r
864 {\r
865 //elprintf(EL_STATUS, "timer a set %i", TAnew);\r
866 ym2612.OPN.ST.TA = TAnew;\r
867 //ym2612.OPN.ST.TAC = (1024-TAnew)*18;\r
868 //ym2612.OPN.ST.TAT = 0;\r
869 timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
870 if (ym2612.OPN.ST.mode & 1) {\r
871 // this is not right, should really be done on overflow only\r
872 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
873 timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
874 }\r
875 elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
876 }\r
877 return 0;\r
878 }\r
879 case 0x26: // timer B\r
880 if (ym2612.OPN.ST.TB != d) {\r
881 //elprintf(EL_STATUS, "timer b set %i", d);\r
882 ym2612.OPN.ST.TB = d;\r
883 //ym2612.OPN.ST.TBC = (256-d) * 288;\r
884 //ym2612.OPN.ST.TBT = 0;\r
885 timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
886 if (ym2612.OPN.ST.mode & 2) {\r
887 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
888 timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
889 }\r
890 elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
891 }\r
892 return 0;\r
893 case 0x27: { /* mode, timer control */\r
894 int old_mode = ym2612.OPN.ST.mode;\r
895 int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
896 ym2612.OPN.ST.mode = d;\r
897\r
898 elprintf(EL_YMTIMER, "st mode %02x", d);\r
899 ym2612_sync_timers(cycles, old_mode, d);\r
900\r
901 /* reset Timer a flag */\r
902 if (d & 0x10)\r
903 ym2612.OPN.ST.status &= ~1;\r
904\r
905 /* reset Timer b flag */\r
906 if (d & 0x20)\r
907 ym2612.OPN.ST.status &= ~2;\r
908\r
909 if ((d ^ old_mode) & 0xc0) {\r
910#ifdef __GP2X__\r
911 if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
912#endif\r
913 return 1;\r
914 }\r
915 return 0;\r
916 }\r
917 case 0x2b: { /* DAC Sel (YM2612) */\r
918 int scanline = get_scanline(is_from_z80);\r
919 ym2612.dacen = d & 0x80;\r
920 if (d & 0x80) PsndDacLine = scanline;\r
921#ifdef __GP2X__\r
922 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r
923#endif\r
924 return 0;\r
925 }\r
926 }\r
927 break;\r
928\r
929 case 2: /* address port 1 */\r
930 ym2612.OPN.ST.address = d;\r
931 ym2612.addr_A1 = 1;\r
932#ifdef __GP2X__\r
933 if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r
934#endif\r
935 return 0;\r
936\r
937 case 3: /* data port 1 */\r
938 if (ym2612.addr_A1 != 1)\r
939 return 0;\r
940\r
941 addr = ym2612.OPN.ST.address | 0x100;\r
942 ym2612.REGS[addr] = d;\r
943 break;\r
944 }\r
945\r
946#ifdef __GP2X__\r
947 if (PicoOpt & POPT_EXT_FM)\r
948 return YM2612Write_940(a, d, get_scanline(is_from_z80));\r
949#endif\r
950 return YM2612Write_(a, d);\r
951}\r
952\r
953\r
954#define ym2612_read_local() \\r
955 if (xcycles >= timer_a_next_oflow) \\r
956 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \\r
957 if (xcycles >= timer_b_next_oflow) \\r
958 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r
959\r
960static u32 MEMH_FUNC ym2612_read_local_z80(void)\r
961{\r
962 int xcycles = z80_cyclesDone() << 8;\r
963\r
964 ym2612_read_local();\r
965\r
966 elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
967 timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
968 return ym2612.OPN.ST.status;\r
969}\r
970\r
971static u32 ym2612_read_local_68k(void)\r
972{\r
973 int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r
974\r
975 ym2612_read_local();\r
976\r
977 elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r
978 timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r
979 return ym2612.OPN.ST.status;\r
980}\r
981\r
982void ym2612_pack_state(void)\r
983{\r
984 // timers are saved as tick counts, in 16.16 int format\r
985 int tac, tat = 0, tbc, tbt = 0;\r
986 tac = 1024 - ym2612.OPN.ST.TA;\r
987 tbc = 256 - ym2612.OPN.ST.TB;\r
988 if (timer_a_next_oflow != TIMER_NO_OFLOW)\r
989 tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);\r
990 if (timer_b_next_oflow != TIMER_NO_OFLOW)\r
991 tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);\r
992 elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);\r
993 elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);\r
994\r
995#ifdef __GP2X__\r
996 if (PicoOpt & POPT_EXT_FM)\r
997 YM2612PicoStateSave2_940(tat, tbt);\r
998 else\r
999#endif\r
1000 YM2612PicoStateSave2(tat, tbt);\r
1001}\r
1002\r
1003void ym2612_unpack_state(void)\r
1004{\r
1005 int i, ret, tac, tat, tbc, tbt;\r
1006 YM2612PicoStateLoad();\r
1007\r
1008 // feed all the registers and update internal state\r
1009 for (i = 0x20; i < 0xA0; i++) {\r
1010 ym2612_write_local(0, i, 0);\r
1011 ym2612_write_local(1, ym2612.REGS[i], 0);\r
1012 }\r
1013 for (i = 0x30; i < 0xA0; i++) {\r
1014 ym2612_write_local(2, i, 0);\r
1015 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
1016 }\r
1017 for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards\r
1018 ym2612_write_local(2, i, 0);\r
1019 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
1020 ym2612_write_local(0, i, 0);\r
1021 ym2612_write_local(1, ym2612.REGS[i], 0);\r
1022 }\r
1023 for (i = 0xB0; i < 0xB8; i++) {\r
1024 ym2612_write_local(0, i, 0);\r
1025 ym2612_write_local(1, ym2612.REGS[i], 0);\r
1026 ym2612_write_local(2, i, 0);\r
1027 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r
1028 }\r
1029\r
1030#ifdef __GP2X__\r
1031 if (PicoOpt & POPT_EXT_FM)\r
1032 ret = YM2612PicoStateLoad2_940(&tat, &tbt);\r
1033 else\r
1034#endif\r
1035 ret = YM2612PicoStateLoad2(&tat, &tbt);\r
1036 if (ret != 0) {\r
1037 elprintf(EL_STATUS, "old ym2612 state");\r
1038 return; // no saved timers\r
1039 }\r
1040\r
1041 tac = (1024 - ym2612.OPN.ST.TA) << 16;\r
1042 tbc = (256 - ym2612.OPN.ST.TB) << 16;\r
1043 if (ym2612.OPN.ST.mode & 1)\r
1044 timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);\r
1045 else\r
1046 timer_a_next_oflow = TIMER_NO_OFLOW;\r
1047 if (ym2612.OPN.ST.mode & 2)\r
1048 timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);\r
1049 else\r
1050 timer_b_next_oflow = TIMER_NO_OFLOW;\r
1051 elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);\r
1052 elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
1053}\r
1054\r
1055// -----------------------------------------------------------------\r
1056// z80 memhandlers\r
1057\r
1058static unsigned char MEMH_FUNC z80_md_vdp_read(unsigned short a)\r
1059{\r
1060 // TODO?\r
1061 elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);\r
1062 return 0xff;\r
1063}\r
1064\r
1065static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)\r
1066{\r
1067 unsigned int addr68k;\r
1068 unsigned char ret;\r
1069\r
1070 addr68k = Pico.m.z80_bank68k<<15;\r
1071 addr68k += a & 0x7fff;\r
1072\r
1073 ret = m68k_read8(addr68k);\r
1074\r
1075 elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
1076 return ret;\r
1077}\r
1078\r
1079static void MEMH_FUNC z80_md_ym2612_write(unsigned int a, unsigned char data)\r
1080{\r
1081 if (PicoOpt & POPT_EN_FM)\r
1082 emustatus |= ym2612_write_local(a, data, 1) & 1;\r
1083}\r
1084\r
1085static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)\r
1086{\r
1087 // TODO: allow full VDP access\r
1088 if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17\r
1089 {\r
1090 if (PicoOpt & POPT_EN_PSG)\r
1091 SN76496Write(data);\r
1092 return;\r
1093 }\r
1094\r
1095 if ((a>>8) == 0x60)\r
1096 {\r
1097 Pico.m.z80_bank68k >>= 1;\r
1098 Pico.m.z80_bank68k |= data << 8;\r
1099 Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r
1100 return;\r
1101 }\r
1102\r
1103 elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
1104}\r
1105\r
1106static void MEMH_FUNC z80_md_bank_write(unsigned int a, unsigned char data)\r
1107{\r
1108 unsigned int addr68k;\r
1109\r
1110 addr68k = Pico.m.z80_bank68k << 15;\r
1111 addr68k += a & 0x7fff;\r
1112\r
1113 elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
1114 m68k_write8(addr68k, data);\r
1115}\r
1116\r
1117// -----------------------------------------------------------------\r
1118\r
1119static unsigned char z80_md_in(unsigned short p)\r
1120{\r
1121 elprintf(EL_ANOMALY, "Z80 port %04x read", p);\r
1122 return 0xff;\r
1123}\r
1124\r
1125static void z80_md_out(unsigned short p, unsigned char d)\r
1126{\r
1127 elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);\r
1128}\r
1129\r
1130static void z80_mem_setup(void)\r
1131{\r
1132 z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);\r
1133 z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);\r
1134 z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);\r
1135 z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);\r
1136 z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);\r
1137\r
1138 z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);\r
1139 z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);\r
1140 z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);\r
1141 z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);\r
1142 z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);\r
1143\r
1144#ifdef _USE_DRZ80\r
1145 drZ80.z80_in = z80_md_in;\r
1146 drZ80.z80_out = z80_md_out;\r
1147#endif\r
1148#ifdef _USE_CZ80\r
1149 Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r
1150 Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror\r
1151 Cz80_Set_INPort(&CZ80, z80_md_in);\r
1152 Cz80_Set_OUTPort(&CZ80, z80_md_out);\r
1153#endif\r
1154}\r
1155\r
fast MegaDrive/MegaCD/32X emulator