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platform ps2, handle audio similar to psp
[picodrive.git] / musashi / m68kdasm.c
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1/* ======================================================================== */\r
2/* ========================= LICENSING & COPYRIGHT ======================== */\r
3/* ======================================================================== */\r
4/*\r
5 * MUSASHI\r
6 * Version 3.31\r
7 *\r
8 * A portable Motorola M680x0 processor emulation engine.\r
9 * Copyright 1998-2007 Karl Stenerud. All rights reserved.\r
10 *\r
11 * This code may be freely used for non-commercial purposes as long as this\r
12 * copyright notice remains unaltered in the source code and any binary files\r
13 * containing this code in compiled form.\r
14 *\r
15 * All other lisencing terms must be negotiated with the author\r
16 * (Karl Stenerud).\r
17 *\r
18 * The latest version of this code can be obtained at:\r
19 * http://kstenerud.cjb.net\r
20 */\r
21\r
22\r
23\r
24/* ======================================================================== */\r
25/* ================================ INCLUDES ============================== */\r
26/* ======================================================================== */\r
27\r
28#include <stdlib.h>\r
29#include <stdio.h>\r
30#include <string.h>\r
31#include "m68k.h"\r
32\r
33#ifndef DECL_SPEC\r
34#define DECL_SPEC\r
35#endif\r
36\r
37/* ======================================================================== */\r
38/* ============================ GENERAL DEFINES =========================== */\r
39/* ======================================================================== */\r
40\r
41/* unsigned int and int must be at least 32 bits wide */\r
42#undef uint\r
43#define uint unsigned int\r
44\r
45/* Bit Isolation Functions */\r
46#define BIT_0(A) ((A) & 0x00000001)\r
47#define BIT_1(A) ((A) & 0x00000002)\r
48#define BIT_2(A) ((A) & 0x00000004)\r
49#define BIT_3(A) ((A) & 0x00000008)\r
50#define BIT_4(A) ((A) & 0x00000010)\r
51#define BIT_5(A) ((A) & 0x00000020)\r
52#define BIT_6(A) ((A) & 0x00000040)\r
53#define BIT_7(A) ((A) & 0x00000080)\r
54#define BIT_8(A) ((A) & 0x00000100)\r
55#define BIT_9(A) ((A) & 0x00000200)\r
56#define BIT_A(A) ((A) & 0x00000400)\r
57#define BIT_B(A) ((A) & 0x00000800)\r
58#define BIT_C(A) ((A) & 0x00001000)\r
59#define BIT_D(A) ((A) & 0x00002000)\r
60#define BIT_E(A) ((A) & 0x00004000)\r
61#define BIT_F(A) ((A) & 0x00008000)\r
62#define BIT_10(A) ((A) & 0x00010000)\r
63#define BIT_11(A) ((A) & 0x00020000)\r
64#define BIT_12(A) ((A) & 0x00040000)\r
65#define BIT_13(A) ((A) & 0x00080000)\r
66#define BIT_14(A) ((A) & 0x00100000)\r
67#define BIT_15(A) ((A) & 0x00200000)\r
68#define BIT_16(A) ((A) & 0x00400000)\r
69#define BIT_17(A) ((A) & 0x00800000)\r
70#define BIT_18(A) ((A) & 0x01000000)\r
71#define BIT_19(A) ((A) & 0x02000000)\r
72#define BIT_1A(A) ((A) & 0x04000000)\r
73#define BIT_1B(A) ((A) & 0x08000000)\r
74#define BIT_1C(A) ((A) & 0x10000000)\r
75#define BIT_1D(A) ((A) & 0x20000000)\r
76#define BIT_1E(A) ((A) & 0x40000000)\r
77#define BIT_1F(A) ((A) & 0x80000000)\r
78\r
79/* These are the CPU types understood by this disassembler */\r
80#define TYPE_68000 1\r
81#define TYPE_68008 2\r
82#define TYPE_68010 4\r
83#define TYPE_68020 8\r
84#define TYPE_68030 16\r
85#define TYPE_68040 32\r
86\r
87#define M68000_ONLY (TYPE_68000 | TYPE_68008)\r
88\r
89#define M68010_ONLY TYPE_68010\r
90#define M68010_LESS (TYPE_68000 | TYPE_68008 | TYPE_68010)\r
91#define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040)\r
92\r
93#define M68020_ONLY TYPE_68020\r
94#define M68020_LESS (TYPE_68010 | TYPE_68020)\r
95#define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040)\r
96\r
97#define M68030_ONLY TYPE_68030\r
98#define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030)\r
99#define M68030_PLUS (TYPE_68030 | TYPE_68040)\r
100\r
101#define M68040_PLUS TYPE_68040\r
102\r
103\r
104/* Extension word formats */\r
105#define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff)\r
106#define EXT_FULL(A) BIT_8(A)\r
107#define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0)\r
108#define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A))\r
109#define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A))\r
110#define EXT_INDEX_REGISTER(A) (((A)>>12)&7)\r
111#define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3)\r
112#define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)\r
113#define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)\r
114#define EXT_INDEX_SCALE(A) (((A)>>9)&3)\r
115#define EXT_INDEX_LONG(A) BIT_B(A)\r
116#define EXT_INDEX_AR(A) BIT_F(A)\r
117#define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10)\r
118#define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20)\r
119#define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30)\r
120#define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)\r
121#define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44)\r
122#define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44)\r
123\r
124\r
125/* Opcode flags */\r
126#if M68K_COMPILE_FOR_MAME == OPT_ON\r
127#define SET_OPCODE_FLAGS(x) g_opcode_type = x;\r
128#define COMBINE_OPCODE_FLAGS(x) ((x) | g_opcode_type | DASMFLAG_SUPPORTED)\r
129#else\r
130#define SET_OPCODE_FLAGS(x)\r
131#define COMBINE_OPCODE_FLAGS(x) (x)\r
132#endif\r
133\r
134\r
135/* ======================================================================== */\r
136/* =============================== PROTOTYPES ============================= */\r
137/* ======================================================================== */\r
138\r
139/* Read data at the PC and increment PC */\r
140uint read_imm_8(void);\r
141uint read_imm_16(void);\r
142uint read_imm_32(void);\r
143\r
144/* Read data at the PC but don't imcrement the PC */\r
145uint peek_imm_8(void);\r
146uint peek_imm_16(void);\r
147uint peek_imm_32(void);\r
148\r
149/* make signed integers 100% portably */\r
150static int make_int_8(int value);\r
151static int make_int_16(int value);\r
152\r
153/* make a string of a hex value */\r
154static char* make_signed_hex_str_8(uint val);\r
155static char* make_signed_hex_str_16(uint val);\r
156static char* make_signed_hex_str_32(uint val);\r
157\r
158/* make string of ea mode */\r
159static char* get_ea_mode_str(uint instruction, uint size);\r
160\r
161char* get_ea_mode_str_8(uint instruction);\r
162char* get_ea_mode_str_16(uint instruction);\r
163char* get_ea_mode_str_32(uint instruction);\r
164\r
165/* make string of immediate value */\r
166static char* get_imm_str_s(uint size);\r
167static char* get_imm_str_u(uint size);\r
168\r
169char* get_imm_str_s8(void);\r
170char* get_imm_str_s16(void);\r
171char* get_imm_str_s32(void);\r
172\r
173/* Stuff to build the opcode handler jump table */\r
174static void build_opcode_table(void);\r
175static int valid_ea(uint opcode, uint mask);\r
176static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);\r
177\r
178/* used to build opcode handler jump table */\r
179typedef struct\r
180{\r
181 void (*opcode_handler)(void); /* handler function */\r
182 uint mask; /* mask on opcode */\r
183 uint match; /* what to match after masking */\r
184 uint ea_mask; /* what ea modes are allowed */\r
185} opcode_struct;\r
186\r
187\r
188\r
189/* ======================================================================== */\r
190/* ================================= DATA ================================= */\r
191/* ======================================================================== */\r
192\r
193/* Opcode handler jump table */\r
194static void (*g_instruction_table[0x10000])(void);\r
195/* Flag if disassembler initialized */\r
196static int g_initialized = 0;\r
197\r
198/* Address mask to simulate address lines */\r
199static unsigned int g_address_mask = 0xffffffff;\r
200\r
201static char g_dasm_str[100]; /* string to hold disassembly */\r
202static char g_helper_str[100]; /* string to hold helpful info */\r
203static uint g_cpu_pc; /* program counter */\r
204static uint g_cpu_ir; /* instruction register */\r
205static uint g_cpu_type;\r
206static uint g_opcode_type;\r
207static const unsigned char* g_rawop;\r
208static uint g_rawbasepc;\r
209\r
210/* used by ops like asr, ror, addq, etc */\r
211static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};\r
212\r
213static uint g_5bit_data_table[32] =\r
214{\r
215 32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\r
216 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31\r
217};\r
218\r
219static const char* g_cc[16] =\r
220{"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"};\r
221\r
222static const char* g_cpcc[64] =\r
223{/* 000 001 010 011 100 101 110 111 */\r
224 "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */\r
225 "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */\r
226 "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */\r
227 "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */\r
228 "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */\r
229 "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */\r
230 "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */\r
231 "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */\r
232};\r
233\r
234\r
235/* ======================================================================== */\r
236/* =========================== UTILITY FUNCTIONS ========================== */\r
237/* ======================================================================== */\r
238\r
239#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \\r
240 if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \\r
241 { \\r
242 if((g_cpu_ir & 0xf000) == 0xf000) \\r
243 d68000_1111(); \\r
244 else d68000_illegal(); \\r
245 return; \\r
246 }\r
247\r
248static uint dasm_read_imm_8(uint advance)\r
249{\r
250 uint result;\r
251 if (g_rawop)\r
252 result = g_rawop[g_cpu_pc + 1 - g_rawbasepc];\r
253 else\r
254 result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff; // 0xff ???\r
255 g_cpu_pc += advance;\r
256 return result;\r
257}\r
258\r
259static uint dasm_read_imm_16(uint advance)\r
260{\r
261 uint result;\r
262 if (g_rawop)\r
263 result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) |\r
264 g_rawop[g_cpu_pc + 1 - g_rawbasepc];\r
265 else\r
266 result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff; // 0xff ???\r
267 g_cpu_pc += advance;\r
268 return result;\r
269}\r
270\r
271static uint dasm_read_imm_32(uint advance)\r
272{\r
273 uint result;\r
274 if (g_rawop)\r
275 result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) |\r
276 (g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) |\r
277 (g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |\r
278 g_rawop[g_cpu_pc + 3 - g_rawbasepc];\r
279 else\r
280 result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask) & 0xffff; // 0xff ???\r
281 g_cpu_pc += advance;\r
282 return result;\r
283}\r
284\r
285#define read_imm_8() dasm_read_imm_8(2)\r
286#define read_imm_16() dasm_read_imm_16(2)\r
287#define read_imm_32() dasm_read_imm_32(4)\r
288\r
289#define peek_imm_8() dasm_read_imm_8(0)\r
290#define peek_imm_16() dasm_read_imm_16(0)\r
291#define peek_imm_32() dasm_read_imm_32(0)\r
292\r
293/* Fake a split interface */\r
294#define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)\r
295#define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)\r
296#define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)\r
297\r
298#define get_imm_str_s8() get_imm_str_s(0)\r
299#define get_imm_str_s16() get_imm_str_s(1)\r
300#define get_imm_str_s32() get_imm_str_s(2)\r
301\r
302#define get_imm_str_u8() get_imm_str_u(0)\r
303#define get_imm_str_u16() get_imm_str_u(1)\r
304#define get_imm_str_u32() get_imm_str_u(2)\r
305\r
306\r
307/* 100% portable signed int generators */\r
308static int make_int_8(int value)\r
309{\r
310 return (value & 0x80) ? value | ~0xff : value & 0xff;\r
311}\r
312\r
313static int make_int_16(int value)\r
314{\r
315 return (value & 0x8000) ? value | ~0xffff : value & 0xffff;\r
316}\r
317\r
318\r
319/* Get string representation of hex values */\r
320static char* make_signed_hex_str_8(uint val)\r
321{\r
322 static char str[20];\r
323\r
324 val &= 0xff;\r
325\r
326 if(val == 0x80)\r
327 sprintf(str, "-$80");\r
328 else if(val & 0x80)\r
329 sprintf(str, "-$%x", (0-val) & 0x7f);\r
330 else\r
331 sprintf(str, "$%x", val & 0x7f);\r
332\r
333 return str;\r
334}\r
335\r
336static char* make_signed_hex_str_16(uint val)\r
337{\r
338 static char str[20];\r
339\r
340 val &= 0xffff;\r
341\r
342 if(val == 0x8000)\r
343 sprintf(str, "-$8000");\r
344 else if(val & 0x8000)\r
345 sprintf(str, "-$%x", (0-val) & 0x7fff);\r
346 else\r
347 sprintf(str, "$%x", val & 0x7fff);\r
348\r
349 return str;\r
350}\r
351\r
352static char* make_signed_hex_str_32(uint val)\r
353{\r
354 static char str[20];\r
355\r
356 val &= 0xffffffff;\r
357\r
358 if(val == 0x80000000)\r
359 sprintf(str, "-$80000000");\r
360 else if(val & 0x80000000)\r
361 sprintf(str, "-$%x", (0-val) & 0x7fffffff);\r
362 else\r
363 sprintf(str, "$%x", val & 0x7fffffff);\r
364\r
365 return str;\r
366}\r
367\r
368\r
369/* make string of immediate value */\r
370static char* get_imm_str_s(uint size)\r
371{\r
372 static char str[15];\r
373 if(size == 0)\r
374 sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));\r
375 else if(size == 1)\r
376 sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16()));\r
377 else\r
378 sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32()));\r
379 return str;\r
380}\r
381\r
382static char* get_imm_str_u(uint size)\r
383{\r
384 static char str[15];\r
385 if(size == 0)\r
386 sprintf(str, "#$%x", read_imm_8() & 0xff);\r
387 else if(size == 1)\r
388 sprintf(str, "#$%x", read_imm_16() & 0xffff);\r
389 else\r
390 sprintf(str, "#$%x", read_imm_32() & 0xffffffff);\r
391 return str;\r
392}\r
393\r
394/* Make string of effective address mode */\r
395static char* get_ea_mode_str(uint instruction, uint size)\r
396{\r
397 static char b1[64];\r
398 static char b2[64];\r
399 static char* mode = b2;\r
400 uint extension;\r
401 uint base;\r
402 uint outer;\r
403 char base_reg[4];\r
404 char index_reg[8];\r
405 uint preindex;\r
406 uint postindex;\r
407 uint comma = 0;\r
408 uint temp_value;\r
409 char invalid_mode = 0;\r
410\r
411 /* Switch buffers so we don't clobber on a double-call to this function */\r
412 mode = mode == b1 ? b2 : b1;\r
413\r
414 switch(instruction & 0x3f)\r
415 {\r
416 case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:\r
417 /* data register direct */\r
418 sprintf(mode, "D%d", instruction&7);\r
419 break;\r
420 case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:\r
421 /* address register direct */\r
422 sprintf(mode, "A%d", instruction&7);\r
423 break;\r
424 case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:\r
425 /* address register indirect */\r
426 sprintf(mode, "(A%d)", instruction&7);\r
427 break;\r
428 case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:\r
429 /* address register indirect with postincrement */\r
430 sprintf(mode, "(A%d)+", instruction&7);\r
431 break;\r
432 case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:\r
433 /* address register indirect with predecrement */\r
434 sprintf(mode, "-(A%d)", instruction&7);\r
435 break;\r
436 case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:\r
437 /* address register indirect with displacement*/\r
438 sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);\r
439 break;\r
440 case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:\r
441 /* address register indirect with index */\r
442 extension = read_imm_16();\r
443\r
444 if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))\r
445 {\r
446 invalid_mode = 1;\r
447 break;\r
448 }\r
449\r
450 if(EXT_FULL(extension))\r
451 {\r
452 if(g_cpu_type & M68010_LESS)\r
453 {\r
454 invalid_mode = 1;\r
455 break;\r
456 }\r
457\r
458 if(EXT_EFFECTIVE_ZERO(extension))\r
459 {\r
460 strcpy(mode, "0");\r
461 break;\r
462 }\r
463\r
464 base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;\r
465 outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;\r
466 if(EXT_BASE_REGISTER_PRESENT(extension))\r
467 sprintf(base_reg, "A%d", instruction&7);\r
468 else\r
469 *base_reg = 0;\r
470 if(EXT_INDEX_REGISTER_PRESENT(extension))\r
471 {\r
472 sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r
473 if(EXT_INDEX_SCALE(extension))\r
474 sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));\r
475 }\r
476 else\r
477 *index_reg = 0;\r
478 preindex = (extension&7) > 0 && (extension&7) < 4;\r
479 postindex = (extension&7) > 4;\r
480\r
481 strcpy(mode, "(");\r
482 if(preindex || postindex)\r
483 strcat(mode, "[");\r
484 if(base)\r
485 {\r
486 strcat(mode, make_signed_hex_str_16(base));\r
487 comma = 1;\r
488 }\r
489 if(*base_reg)\r
490 {\r
491 if(comma)\r
492 strcat(mode, ",");\r
493 strcat(mode, base_reg);\r
494 comma = 1;\r
495 }\r
496 if(postindex)\r
497 {\r
498 strcat(mode, "]");\r
499 comma = 1;\r
500 }\r
501 if(*index_reg)\r
502 {\r
503 if(comma)\r
504 strcat(mode, ",");\r
505 strcat(mode, index_reg);\r
506 comma = 1;\r
507 }\r
508 if(preindex)\r
509 {\r
510 strcat(mode, "]");\r
511 comma = 1;\r
512 }\r
513 if(outer)\r
514 {\r
515 if(comma)\r
516 strcat(mode, ",");\r
517 strcat(mode, make_signed_hex_str_16(outer));\r
518 }\r
519 strcat(mode, ")");\r
520 break;\r
521 }\r
522\r
523 if(EXT_8BIT_DISPLACEMENT(extension) == 0)\r
524 sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r
525 else\r
526 sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r
527 if(EXT_INDEX_SCALE(extension))\r
528 sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));\r
529 strcat(mode, ")");\r
530 break;\r
531 case 0x38:\r
532 /* absolute short address */\r
533 sprintf(mode, "$%x.w", read_imm_16());\r
534 break;\r
535 case 0x39:\r
536 /* absolute long address */\r
537 sprintf(mode, "$%x.l", read_imm_32());\r
538 break;\r
539 case 0x3a:\r
540 /* program counter with displacement */\r
541 temp_value = read_imm_16();\r
542 sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value));\r
543 sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff);\r
544 break;\r
545 case 0x3b:\r
546 /* program counter with index */\r
547 extension = read_imm_16();\r
548\r
549 if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))\r
550 {\r
551 invalid_mode = 1;\r
552 break;\r
553 }\r
554\r
555 if(EXT_FULL(extension))\r
556 {\r
557 if(g_cpu_type & M68010_LESS)\r
558 {\r
559 invalid_mode = 1;\r
560 break;\r
561 }\r
562\r
563 if(EXT_EFFECTIVE_ZERO(extension))\r
564 {\r
565 strcpy(mode, "0");\r
566 break;\r
567 }\r
568 base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;\r
569 outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;\r
570 if(EXT_BASE_REGISTER_PRESENT(extension))\r
571 strcpy(base_reg, "PC");\r
572 else\r
573 *base_reg = 0;\r
574 if(EXT_INDEX_REGISTER_PRESENT(extension))\r
575 {\r
576 sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r
577 if(EXT_INDEX_SCALE(extension))\r
578 sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));\r
579 }\r
580 else\r
581 *index_reg = 0;\r
582 preindex = (extension&7) > 0 && (extension&7) < 4;\r
583 postindex = (extension&7) > 4;\r
584\r
585 strcpy(mode, "(");\r
586 if(preindex || postindex)\r
587 strcat(mode, "[");\r
588 if(base)\r
589 {\r
590 strcat(mode, make_signed_hex_str_16(base));\r
591 comma = 1;\r
592 }\r
593 if(*base_reg)\r
594 {\r
595 if(comma)\r
596 strcat(mode, ",");\r
597 strcat(mode, base_reg);\r
598 comma = 1;\r
599 }\r
600 if(postindex)\r
601 {\r
602 strcat(mode, "]");\r
603 comma = 1;\r
604 }\r
605 if(*index_reg)\r
606 {\r
607 if(comma)\r
608 strcat(mode, ",");\r
609 strcat(mode, index_reg);\r
610 comma = 1;\r
611 }\r
612 if(preindex)\r
613 {\r
614 strcat(mode, "]");\r
615 comma = 1;\r
616 }\r
617 if(outer)\r
618 {\r
619 if(comma)\r
620 strcat(mode, ",");\r
621 strcat(mode, make_signed_hex_str_16(outer));\r
622 }\r
623 strcat(mode, ")");\r
624 break;\r
625 }\r
626\r
627 if(EXT_8BIT_DISPLACEMENT(extension) == 0)\r
628 sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r
629 else\r
630 sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r
631 if(EXT_INDEX_SCALE(extension))\r
632 sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));\r
633 strcat(mode, ")");\r
634 break;\r
635 case 0x3c:\r
636 /* Immediate */\r
637 sprintf(mode, "%s", get_imm_str_u(size));\r
638 break;\r
639 default:\r
640 invalid_mode = 1;\r
641 }\r
642\r
643 if(invalid_mode)\r
644 sprintf(mode, "INVALID %x", instruction & 0x3f);\r
645\r
646 return mode;\r
647}\r
648\r
649\r
650\r
651/* ======================================================================== */\r
652/* ========================= INSTRUCTION HANDLERS ========================= */\r
653/* ======================================================================== */\r
654/* Instruction handler function names follow this convention:\r
655 *\r
656 * d68000_NAME_EXTENSIONS(void)\r
657 * where NAME is the name of the opcode it handles and EXTENSIONS are any\r
658 * extensions for special instances of that opcode.\r
659 *\r
660 * Examples:\r
661 * d68000_add_er_8(): add opcode, from effective address to register,\r
662 * size = byte\r
663 *\r
664 * d68000_asr_s_8(): arithmetic shift right, static count, size = byte\r
665 *\r
666 *\r
667 * Common extensions:\r
668 * 8 : size = byte\r
669 * 16 : size = word\r
670 * 32 : size = long\r
671 * rr : register to register\r
672 * mm : memory to memory\r
673 * r : register\r
674 * s : static\r
675 * er : effective address -> register\r
676 * re : register -> effective address\r
677 * ea : using effective address mode of operation\r
678 * d : data register direct\r
679 * a : address register direct\r
680 * ai : address register indirect\r
681 * pi : address register indirect with postincrement\r
682 * pd : address register indirect with predecrement\r
683 * di : address register indirect with displacement\r
684 * ix : address register indirect with index\r
685 * aw : absolute word\r
686 * al : absolute long\r
687 */\r
688\r
689static void d68000_illegal(void)\r
690{\r
691 sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir);\r
692}\r
693\r
694static void d68000_1010(void)\r
695{\r
696 sprintf(g_dasm_str, "dc.w $%04x; opcode 1010", g_cpu_ir);\r
697}\r
698\r
699\r
700static void d68000_1111(void)\r
701{\r
702 sprintf(g_dasm_str, "dc.w $%04x; opcode 1111", g_cpu_ir);\r
703}\r
704\r
705\r
706static void d68000_abcd_rr(void)\r
707{\r
708 sprintf(g_dasm_str, "abcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
709}\r
710\r
711\r
712static void d68000_abcd_mm(void)\r
713{\r
714 sprintf(g_dasm_str, "abcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
715}\r
716\r
717static void d68000_add_er_8(void)\r
718{\r
719 sprintf(g_dasm_str, "add.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r
720}\r
721\r
722\r
723static void d68000_add_er_16(void)\r
724{\r
725 sprintf(g_dasm_str, "add.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
726}\r
727\r
728static void d68000_add_er_32(void)\r
729{\r
730 sprintf(g_dasm_str, "add.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
731}\r
732\r
733static void d68000_add_re_8(void)\r
734{\r
735 sprintf(g_dasm_str, "add.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
736}\r
737\r
738static void d68000_add_re_16(void)\r
739{\r
740 sprintf(g_dasm_str, "add.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r
741}\r
742\r
743static void d68000_add_re_32(void)\r
744{\r
745 sprintf(g_dasm_str, "add.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r
746}\r
747\r
748static void d68000_adda_16(void)\r
749{\r
750 sprintf(g_dasm_str, "adda.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
751}\r
752\r
753static void d68000_adda_32(void)\r
754{\r
755 sprintf(g_dasm_str, "adda.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
756}\r
757\r
758static void d68000_addi_8(void)\r
759{\r
760 char* str = get_imm_str_s8();\r
761 sprintf(g_dasm_str, "addi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
762}\r
763\r
764static void d68000_addi_16(void)\r
765{\r
766 char* str = get_imm_str_s16();\r
767 sprintf(g_dasm_str, "addi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r
768}\r
769\r
770static void d68000_addi_32(void)\r
771{\r
772 char* str = get_imm_str_s32();\r
773 sprintf(g_dasm_str, "addi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r
774}\r
775\r
776static void d68000_addq_8(void)\r
777{\r
778 sprintf(g_dasm_str, "addq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));\r
779}\r
780\r
781static void d68000_addq_16(void)\r
782{\r
783 sprintf(g_dasm_str, "addq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));\r
784}\r
785\r
786static void d68000_addq_32(void)\r
787{\r
788 sprintf(g_dasm_str, "addq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));\r
789}\r
790\r
791static void d68000_addx_rr_8(void)\r
792{\r
793 sprintf(g_dasm_str, "addx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
794}\r
795\r
796static void d68000_addx_rr_16(void)\r
797{\r
798 sprintf(g_dasm_str, "addx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
799}\r
800\r
801static void d68000_addx_rr_32(void)\r
802{\r
803 sprintf(g_dasm_str, "addx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
804}\r
805\r
806static void d68000_addx_mm_8(void)\r
807{\r
808 sprintf(g_dasm_str, "addx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
809}\r
810\r
811static void d68000_addx_mm_16(void)\r
812{\r
813 sprintf(g_dasm_str, "addx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
814}\r
815\r
816static void d68000_addx_mm_32(void)\r
817{\r
818 sprintf(g_dasm_str, "addx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
819}\r
820\r
821static void d68000_and_er_8(void)\r
822{\r
823 sprintf(g_dasm_str, "and.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r
824}\r
825\r
826static void d68000_and_er_16(void)\r
827{\r
828 sprintf(g_dasm_str, "and.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
829}\r
830\r
831static void d68000_and_er_32(void)\r
832{\r
833 sprintf(g_dasm_str, "and.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
834}\r
835\r
836static void d68000_and_re_8(void)\r
837{\r
838 sprintf(g_dasm_str, "and.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
839}\r
840\r
841static void d68000_and_re_16(void)\r
842{\r
843 sprintf(g_dasm_str, "and.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r
844}\r
845\r
846static void d68000_and_re_32(void)\r
847{\r
848 sprintf(g_dasm_str, "and.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r
849}\r
850\r
851static void d68000_andi_8(void)\r
852{\r
853 char* str = get_imm_str_u8();\r
854 sprintf(g_dasm_str, "andi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
855}\r
856\r
857static void d68000_andi_16(void)\r
858{\r
859 char* str = get_imm_str_u16();\r
860 sprintf(g_dasm_str, "andi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r
861}\r
862\r
863static void d68000_andi_32(void)\r
864{\r
865 char* str = get_imm_str_u32();\r
866 sprintf(g_dasm_str, "andi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r
867}\r
868\r
869static void d68000_andi_to_ccr(void)\r
870{\r
871 sprintf(g_dasm_str, "andi %s, CCR", get_imm_str_u8());\r
872}\r
873\r
874static void d68000_andi_to_sr(void)\r
875{\r
876 sprintf(g_dasm_str, "andi %s, SR", get_imm_str_u16());\r
877}\r
878\r
879static void d68000_asr_s_8(void)\r
880{\r
881 sprintf(g_dasm_str, "asr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
882}\r
883\r
884static void d68000_asr_s_16(void)\r
885{\r
886 sprintf(g_dasm_str, "asr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
887}\r
888\r
889static void d68000_asr_s_32(void)\r
890{\r
891 sprintf(g_dasm_str, "asr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
892}\r
893\r
894static void d68000_asr_r_8(void)\r
895{\r
896 sprintf(g_dasm_str, "asr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
897}\r
898\r
899static void d68000_asr_r_16(void)\r
900{\r
901 sprintf(g_dasm_str, "asr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
902}\r
903\r
904static void d68000_asr_r_32(void)\r
905{\r
906 sprintf(g_dasm_str, "asr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
907}\r
908\r
909static void d68000_asr_ea(void)\r
910{\r
911 sprintf(g_dasm_str, "asr.w %s", get_ea_mode_str_16(g_cpu_ir));\r
912}\r
913\r
914static void d68000_asl_s_8(void)\r
915{\r
916 sprintf(g_dasm_str, "asl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
917}\r
918\r
919static void d68000_asl_s_16(void)\r
920{\r
921 sprintf(g_dasm_str, "asl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
922}\r
923\r
924static void d68000_asl_s_32(void)\r
925{\r
926 sprintf(g_dasm_str, "asl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
927}\r
928\r
929static void d68000_asl_r_8(void)\r
930{\r
931 sprintf(g_dasm_str, "asl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
932}\r
933\r
934static void d68000_asl_r_16(void)\r
935{\r
936 sprintf(g_dasm_str, "asl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
937}\r
938\r
939static void d68000_asl_r_32(void)\r
940{\r
941 sprintf(g_dasm_str, "asl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
942}\r
943\r
944static void d68000_asl_ea(void)\r
945{\r
946 sprintf(g_dasm_str, "asl.w %s", get_ea_mode_str_16(g_cpu_ir));\r
947}\r
948\r
949static void d68000_bcc_8(void)\r
950{\r
951 uint temp_pc = g_cpu_pc;\r
952 sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));\r
953}\r
954\r
955static void d68000_bcc_16(void)\r
956{\r
957 uint temp_pc = g_cpu_pc;\r
958 sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));\r
959}\r
960\r
961static void d68020_bcc_32(void)\r
962{\r
963 uint temp_pc = g_cpu_pc;\r
964 LIMIT_CPU_TYPES(M68020_PLUS);\r
965 sprintf(g_dasm_str, "b%-2s $%x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());\r
966}\r
967\r
968static void d68000_bchg_r(void)\r
969{\r
970 sprintf(g_dasm_str, "bchg D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
971}\r
972\r
973static void d68000_bchg_s(void)\r
974{\r
975 char* str = get_imm_str_u8();\r
976 sprintf(g_dasm_str, "bchg %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
977}\r
978\r
979static void d68000_bclr_r(void)\r
980{\r
981 sprintf(g_dasm_str, "bclr D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
982}\r
983\r
984static void d68000_bclr_s(void)\r
985{\r
986 char* str = get_imm_str_u8();\r
987 sprintf(g_dasm_str, "bclr %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
988}\r
989\r
990static void d68010_bkpt(void)\r
991{\r
992 LIMIT_CPU_TYPES(M68010_PLUS);\r
993 sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7);\r
994}\r
995\r
996static void d68020_bfchg(void)\r
997{\r
998 uint extension;\r
999 char offset[3];\r
1000 char width[3];\r
1001\r
1002 LIMIT_CPU_TYPES(M68020_PLUS);\r
1003\r
1004 extension = read_imm_16();\r
1005\r
1006 if(BIT_B(extension))\r
1007 sprintf(offset, "D%d", (extension>>6)&7);\r
1008 else\r
1009 sprintf(offset, "%d", (extension>>6)&31);\r
1010 if(BIT_5(extension))\r
1011 sprintf(width, "D%d", extension&7);\r
1012 else\r
1013 sprintf(width, "%d", g_5bit_data_table[extension&31]);\r
1014 sprintf(g_dasm_str, "bfchg %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);\r
1015}\r
1016\r
1017static void d68020_bfclr(void)\r
1018{\r
1019 uint extension;\r
1020 char offset[3];\r
1021 char width[3];\r
1022\r
1023 LIMIT_CPU_TYPES(M68020_PLUS);\r
1024\r
1025 extension = read_imm_16();\r
1026\r
1027 if(BIT_B(extension))\r
1028 sprintf(offset, "D%d", (extension>>6)&7);\r
1029 else\r
1030 sprintf(offset, "%d", (extension>>6)&31);\r
1031 if(BIT_5(extension))\r
1032 sprintf(width, "D%d", extension&7);\r
1033 else\r
1034 sprintf(width, "%d", g_5bit_data_table[extension&31]);\r
1035 sprintf(g_dasm_str, "bfclr %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);\r
1036}\r
1037\r
1038static void d68020_bfexts(void)\r
1039{\r
1040 uint extension;\r
1041 char offset[3];\r
1042 char width[3];\r
1043\r
1044 LIMIT_CPU_TYPES(M68020_PLUS);\r
1045\r
1046 extension = read_imm_16();\r
1047\r
1048 if(BIT_B(extension))\r
1049 sprintf(offset, "D%d", (extension>>6)&7);\r
1050 else\r
1051 sprintf(offset, "%d", (extension>>6)&31);\r
1052 if(BIT_5(extension))\r
1053 sprintf(width, "D%d", extension&7);\r
1054 else\r
1055 sprintf(width, "%d", g_5bit_data_table[extension&31]);\r
1056 sprintf(g_dasm_str, "bfexts D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);\r
1057}\r
1058\r
1059static void d68020_bfextu(void)\r
1060{\r
1061 uint extension;\r
1062 char offset[3];\r
1063 char width[3];\r
1064\r
1065 LIMIT_CPU_TYPES(M68020_PLUS);\r
1066\r
1067 extension = read_imm_16();\r
1068\r
1069 if(BIT_B(extension))\r
1070 sprintf(offset, "D%d", (extension>>6)&7);\r
1071 else\r
1072 sprintf(offset, "%d", (extension>>6)&31);\r
1073 if(BIT_5(extension))\r
1074 sprintf(width, "D%d", extension&7);\r
1075 else\r
1076 sprintf(width, "%d", g_5bit_data_table[extension&31]);\r
1077 sprintf(g_dasm_str, "bfextu D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);\r
1078}\r
1079\r
1080static void d68020_bfffo(void)\r
1081{\r
1082 uint extension;\r
1083 char offset[3];\r
1084 char width[3];\r
1085\r
1086 LIMIT_CPU_TYPES(M68020_PLUS);\r
1087\r
1088 extension = read_imm_16();\r
1089\r
1090 if(BIT_B(extension))\r
1091 sprintf(offset, "D%d", (extension>>6)&7);\r
1092 else\r
1093 sprintf(offset, "%d", (extension>>6)&31);\r
1094 if(BIT_5(extension))\r
1095 sprintf(width, "D%d", extension&7);\r
1096 else\r
1097 sprintf(width, "%d", g_5bit_data_table[extension&31]);\r
1098 sprintf(g_dasm_str, "bfffo D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);\r
1099}\r
1100\r
1101static void d68020_bfins(void)\r
1102{\r
1103 uint extension;\r
1104 char offset[3];\r
1105 char width[3];\r
1106\r
1107 LIMIT_CPU_TYPES(M68020_PLUS);\r
1108\r
1109 extension = read_imm_16();\r
1110\r
1111 if(BIT_B(extension))\r
1112 sprintf(offset, "D%d", (extension>>6)&7);\r
1113 else\r
1114 sprintf(offset, "%d", (extension>>6)&31);\r
1115 if(BIT_5(extension))\r
1116 sprintf(width, "D%d", extension&7);\r
1117 else\r
1118 sprintf(width, "%d", g_5bit_data_table[extension&31]);\r
1119 sprintf(g_dasm_str, "bfins D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);\r
1120}\r
1121\r
1122static void d68020_bfset(void)\r
1123{\r
1124 uint extension;\r
1125 char offset[3];\r
1126 char width[3];\r
1127\r
1128 LIMIT_CPU_TYPES(M68020_PLUS);\r
1129\r
1130 extension = read_imm_16();\r
1131\r
1132 if(BIT_B(extension))\r
1133 sprintf(offset, "D%d", (extension>>6)&7);\r
1134 else\r
1135 sprintf(offset, "%d", (extension>>6)&31);\r
1136 if(BIT_5(extension))\r
1137 sprintf(width, "D%d", extension&7);\r
1138 else\r
1139 sprintf(width, "%d", g_5bit_data_table[extension&31]);\r
1140 sprintf(g_dasm_str, "bfset %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);\r
1141}\r
1142\r
1143static void d68020_bftst(void)\r
1144{\r
1145 uint extension;\r
1146 char offset[3];\r
1147 char width[3];\r
1148\r
1149 LIMIT_CPU_TYPES(M68020_PLUS);\r
1150\r
1151 extension = read_imm_16();\r
1152\r
1153 if(BIT_B(extension))\r
1154 sprintf(offset, "D%d", (extension>>6)&7);\r
1155 else\r
1156 sprintf(offset, "%d", (extension>>6)&31);\r
1157 if(BIT_5(extension))\r
1158 sprintf(width, "D%d", extension&7);\r
1159 else\r
1160 sprintf(width, "%d", g_5bit_data_table[extension&31]);\r
1161 sprintf(g_dasm_str, "bftst %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);\r
1162}\r
1163\r
1164static void d68000_bra_8(void)\r
1165{\r
1166 uint temp_pc = g_cpu_pc;\r
1167 sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_8(g_cpu_ir));\r
1168}\r
1169\r
1170static void d68000_bra_16(void)\r
1171{\r
1172 uint temp_pc = g_cpu_pc;\r
1173 sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_16(read_imm_16()));\r
1174}\r
1175\r
1176static void d68020_bra_32(void)\r
1177{\r
1178 uint temp_pc = g_cpu_pc;\r
1179 LIMIT_CPU_TYPES(M68020_PLUS);\r
1180 sprintf(g_dasm_str, "bra $%x; (2+)", temp_pc + read_imm_32());\r
1181}\r
1182\r
1183static void d68000_bset_r(void)\r
1184{\r
1185 sprintf(g_dasm_str, "bset D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
1186}\r
1187\r
1188static void d68000_bset_s(void)\r
1189{\r
1190 char* str = get_imm_str_u8();\r
1191 sprintf(g_dasm_str, "bset %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
1192}\r
1193\r
1194static void d68000_bsr_8(void)\r
1195{\r
1196 uint temp_pc = g_cpu_pc;\r
1197 sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_8(g_cpu_ir));\r
1198 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
1199}\r
1200\r
1201static void d68000_bsr_16(void)\r
1202{\r
1203 uint temp_pc = g_cpu_pc;\r
1204 sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_16(read_imm_16()));\r
1205 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
1206}\r
1207\r
1208static void d68020_bsr_32(void)\r
1209{\r
1210 uint temp_pc = g_cpu_pc;\r
1211 LIMIT_CPU_TYPES(M68020_PLUS);\r
1212 sprintf(g_dasm_str, "bsr $%x; (2+)", temp_pc + read_imm_32());\r
1213 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
1214}\r
1215\r
1216static void d68000_btst_r(void)\r
1217{\r
1218 sprintf(g_dasm_str, "btst D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
1219}\r
1220\r
1221static void d68000_btst_s(void)\r
1222{\r
1223 char* str = get_imm_str_u8();\r
1224 sprintf(g_dasm_str, "btst %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
1225}\r
1226\r
1227static void d68020_callm(void)\r
1228{\r
1229 char* str;\r
1230 LIMIT_CPU_TYPES(M68020_ONLY);\r
1231 str = get_imm_str_u8();\r
1232\r
1233 sprintf(g_dasm_str, "callm %s, %s; (2)", str, get_ea_mode_str_8(g_cpu_ir));\r
1234}\r
1235\r
1236static void d68020_cas_8(void)\r
1237{\r
1238 uint extension;\r
1239 LIMIT_CPU_TYPES(M68020_PLUS);\r
1240 extension = read_imm_16();\r
1241 sprintf(g_dasm_str, "cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir));\r
1242}\r
1243\r
1244static void d68020_cas_16(void)\r
1245{\r
1246 uint extension;\r
1247 LIMIT_CPU_TYPES(M68020_PLUS);\r
1248 extension = read_imm_16();\r
1249 sprintf(g_dasm_str, "cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir));\r
1250}\r
1251\r
1252static void d68020_cas_32(void)\r
1253{\r
1254 uint extension;\r
1255 LIMIT_CPU_TYPES(M68020_PLUS);\r
1256 extension = read_imm_16();\r
1257 sprintf(g_dasm_str, "cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir));\r
1258}\r
1259\r
1260static void d68020_cas2_16(void)\r
1261{\r
1262/* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2)\r
1263f e d c b a 9 8 7 6 5 4 3 2 1 0\r
1264 DARn1 0 0 0 Du1 0 0 0 Dc1\r
1265 DARn2 0 0 0 Du2 0 0 0 Dc2\r
1266*/\r
1267\r
1268 uint extension;\r
1269 LIMIT_CPU_TYPES(M68020_PLUS);\r
1270 extension = read_imm_32();\r
1271 sprintf(g_dasm_str, "cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",\r
1272 (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,\r
1273 BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,\r
1274 BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r
1275}\r
1276\r
1277static void d68020_cas2_32(void)\r
1278{\r
1279 uint extension;\r
1280 LIMIT_CPU_TYPES(M68020_PLUS);\r
1281 extension = read_imm_32();\r
1282 sprintf(g_dasm_str, "cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",\r
1283 (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,\r
1284 BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,\r
1285 BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r
1286}\r
1287\r
1288static void d68000_chk_16(void)\r
1289{\r
1290 sprintf(g_dasm_str, "chk.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1291 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
1292}\r
1293\r
1294static void d68020_chk_32(void)\r
1295{\r
1296 LIMIT_CPU_TYPES(M68020_PLUS);\r
1297 sprintf(g_dasm_str, "chk.l %s, D%d; (2+)", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1298 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
1299}\r
1300\r
1301static void d68020_chk2_cmp2_8(void)\r
1302{\r
1303 uint extension;\r
1304 LIMIT_CPU_TYPES(M68020_PLUS);\r
1305 extension = read_imm_16();\r
1306 sprintf(g_dasm_str, "%s.b %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r
1307}\r
1308\r
1309static void d68020_chk2_cmp2_16(void)\r
1310{\r
1311 uint extension;\r
1312 LIMIT_CPU_TYPES(M68020_PLUS);\r
1313 extension = read_imm_16();\r
1314 sprintf(g_dasm_str, "%s.w %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r
1315}\r
1316\r
1317static void d68020_chk2_cmp2_32(void)\r
1318{\r
1319 uint extension;\r
1320 LIMIT_CPU_TYPES(M68020_PLUS);\r
1321 extension = read_imm_16();\r
1322 sprintf(g_dasm_str, "%s.l %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r
1323}\r
1324\r
1325static void d68040_cinv(void)\r
1326{\r
1327 LIMIT_CPU_TYPES(M68040_PLUS);\r
1328 switch((g_cpu_ir>>3)&3)\r
1329 {\r
1330 case 0:\r
1331 sprintf(g_dasm_str, "cinv (illegal scope); (4)");\r
1332 break;\r
1333 case 1:\r
1334 sprintf(g_dasm_str, "cinvl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);\r
1335 break;\r
1336 case 2:\r
1337 sprintf(g_dasm_str, "cinvp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);\r
1338 break;\r
1339 case 3:\r
1340 sprintf(g_dasm_str, "cinva %d; (4)", (g_cpu_ir>>6)&3);\r
1341 break;\r
1342 }\r
1343}\r
1344\r
1345static void d68000_clr_8(void)\r
1346{\r
1347 sprintf(g_dasm_str, "clr.b %s", get_ea_mode_str_8(g_cpu_ir));\r
1348}\r
1349\r
1350static void d68000_clr_16(void)\r
1351{\r
1352 sprintf(g_dasm_str, "clr.w %s", get_ea_mode_str_16(g_cpu_ir));\r
1353}\r
1354\r
1355static void d68000_clr_32(void)\r
1356{\r
1357 sprintf(g_dasm_str, "clr.l %s", get_ea_mode_str_32(g_cpu_ir));\r
1358}\r
1359\r
1360static void d68000_cmp_8(void)\r
1361{\r
1362 sprintf(g_dasm_str, "cmp.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1363}\r
1364\r
1365static void d68000_cmp_16(void)\r
1366{\r
1367 sprintf(g_dasm_str, "cmp.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1368}\r
1369\r
1370static void d68000_cmp_32(void)\r
1371{\r
1372 sprintf(g_dasm_str, "cmp.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1373}\r
1374\r
1375static void d68000_cmpa_16(void)\r
1376{\r
1377 sprintf(g_dasm_str, "cmpa.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1378}\r
1379\r
1380static void d68000_cmpa_32(void)\r
1381{\r
1382 sprintf(g_dasm_str, "cmpa.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1383}\r
1384\r
1385static void d68000_cmpi_8(void)\r
1386{\r
1387 char* str = get_imm_str_s8();\r
1388 sprintf(g_dasm_str, "cmpi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
1389}\r
1390\r
1391static void d68020_cmpi_pcdi_8(void)\r
1392{\r
1393 char* str;\r
1394 LIMIT_CPU_TYPES(M68010_PLUS);\r
1395 str = get_imm_str_s8();\r
1396 sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));\r
1397}\r
1398\r
1399static void d68020_cmpi_pcix_8(void)\r
1400{\r
1401 char* str;\r
1402 LIMIT_CPU_TYPES(M68010_PLUS);\r
1403 str = get_imm_str_s8();\r
1404 sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));\r
1405}\r
1406\r
1407static void d68000_cmpi_16(void)\r
1408{\r
1409 char* str;\r
1410 str = get_imm_str_s16();\r
1411 sprintf(g_dasm_str, "cmpi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r
1412}\r
1413\r
1414static void d68020_cmpi_pcdi_16(void)\r
1415{\r
1416 char* str;\r
1417 LIMIT_CPU_TYPES(M68010_PLUS);\r
1418 str = get_imm_str_s16();\r
1419 sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));\r
1420}\r
1421\r
1422static void d68020_cmpi_pcix_16(void)\r
1423{\r
1424 char* str;\r
1425 LIMIT_CPU_TYPES(M68010_PLUS);\r
1426 str = get_imm_str_s16();\r
1427 sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));\r
1428}\r
1429\r
1430static void d68000_cmpi_32(void)\r
1431{\r
1432 char* str;\r
1433 str = get_imm_str_s32();\r
1434 sprintf(g_dasm_str, "cmpi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r
1435}\r
1436\r
1437static void d68020_cmpi_pcdi_32(void)\r
1438{\r
1439 char* str;\r
1440 LIMIT_CPU_TYPES(M68010_PLUS);\r
1441 str = get_imm_str_s32();\r
1442 sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));\r
1443}\r
1444\r
1445static void d68020_cmpi_pcix_32(void)\r
1446{\r
1447 char* str;\r
1448 LIMIT_CPU_TYPES(M68010_PLUS);\r
1449 str = get_imm_str_s32();\r
1450 sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));\r
1451}\r
1452\r
1453static void d68000_cmpm_8(void)\r
1454{\r
1455 sprintf(g_dasm_str, "cmpm.b (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
1456}\r
1457\r
1458static void d68000_cmpm_16(void)\r
1459{\r
1460 sprintf(g_dasm_str, "cmpm.w (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
1461}\r
1462\r
1463static void d68000_cmpm_32(void)\r
1464{\r
1465 sprintf(g_dasm_str, "cmpm.l (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
1466}\r
1467\r
1468static void d68020_cpbcc_16(void)\r
1469{\r
1470 uint extension;\r
1471 uint new_pc = g_cpu_pc;\r
1472 LIMIT_CPU_TYPES(M68020_PLUS);\r
1473 extension = read_imm_16();\r
1474 new_pc += make_int_16(read_imm_16());\r
1475 sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);\r
1476}\r
1477\r
1478static void d68020_cpbcc_32(void)\r
1479{\r
1480 uint extension;\r
1481 uint new_pc = g_cpu_pc;\r
1482 LIMIT_CPU_TYPES(M68020_PLUS);\r
1483 extension = read_imm_16();\r
1484 new_pc += read_imm_32();\r
1485 sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);\r
1486}\r
1487\r
1488static void d68020_cpdbcc(void)\r
1489{\r
1490 uint extension1;\r
1491 uint extension2;\r
1492 uint new_pc = g_cpu_pc;\r
1493 LIMIT_CPU_TYPES(M68020_PLUS);\r
1494 extension1 = read_imm_16();\r
1495 extension2 = read_imm_16();\r
1496 new_pc += make_int_16(read_imm_16());\r
1497 sprintf(g_dasm_str, "%ddb%-4s D%d,%s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], g_cpu_ir&7, get_imm_str_s16(), new_pc, extension2);\r
1498}\r
1499\r
1500static void d68020_cpgen(void)\r
1501{\r
1502 LIMIT_CPU_TYPES(M68020_PLUS);\r
1503 sprintf(g_dasm_str, "%dgen %s; (2-3)", (g_cpu_ir>>9)&7, get_imm_str_u32());\r
1504}\r
1505\r
1506static void d68020_cprestore(void)\r
1507{\r
1508 LIMIT_CPU_TYPES(M68020_PLUS);\r
1509 sprintf(g_dasm_str, "%drestore %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
1510}\r
1511\r
1512static void d68020_cpsave(void)\r
1513{\r
1514 LIMIT_CPU_TYPES(M68020_PLUS);\r
1515 sprintf(g_dasm_str, "%dsave %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
1516}\r
1517\r
1518static void d68020_cpscc(void)\r
1519{\r
1520 uint extension1;\r
1521 uint extension2;\r
1522 LIMIT_CPU_TYPES(M68020_PLUS);\r
1523 extension1 = read_imm_16();\r
1524 extension2 = read_imm_16();\r
1525 sprintf(g_dasm_str, "%ds%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_ea_mode_str_8(g_cpu_ir), extension2);\r
1526}\r
1527\r
1528static void d68020_cptrapcc_0(void)\r
1529{\r
1530 uint extension1;\r
1531 uint extension2;\r
1532 LIMIT_CPU_TYPES(M68020_PLUS);\r
1533 extension1 = read_imm_16();\r
1534 extension2 = read_imm_16();\r
1535 sprintf(g_dasm_str, "%dtrap%-4s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], extension2);\r
1536}\r
1537\r
1538static void d68020_cptrapcc_16(void)\r
1539{\r
1540 uint extension1;\r
1541 uint extension2;\r
1542 LIMIT_CPU_TYPES(M68020_PLUS);\r
1543 extension1 = read_imm_16();\r
1544 extension2 = read_imm_16();\r
1545 sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u16(), extension2);\r
1546}\r
1547\r
1548static void d68020_cptrapcc_32(void)\r
1549{\r
1550 uint extension1;\r
1551 uint extension2;\r
1552 LIMIT_CPU_TYPES(M68020_PLUS);\r
1553 extension1 = read_imm_16();\r
1554 extension2 = read_imm_16();\r
1555 sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u32(), extension2);\r
1556}\r
1557\r
1558static void d68040_cpush(void)\r
1559{\r
1560 LIMIT_CPU_TYPES(M68040_PLUS);\r
1561 switch((g_cpu_ir>>3)&3)\r
1562 {\r
1563 case 0:\r
1564 sprintf(g_dasm_str, "cpush (illegal scope); (4)");\r
1565 break;\r
1566 case 1:\r
1567 sprintf(g_dasm_str, "cpushl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);\r
1568 break;\r
1569 case 2:\r
1570 sprintf(g_dasm_str, "cpushp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);\r
1571 break;\r
1572 case 3:\r
1573 sprintf(g_dasm_str, "cpusha %d; (4)", (g_cpu_ir>>6)&3);\r
1574 break;\r
1575 }\r
1576}\r
1577\r
1578static void d68000_dbra(void)\r
1579{\r
1580 uint temp_pc = g_cpu_pc;\r
1581 sprintf(g_dasm_str, "dbra D%d, $%x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));\r
1582 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
1583}\r
1584\r
1585static void d68000_dbcc(void)\r
1586{\r
1587 uint temp_pc = g_cpu_pc;\r
1588 sprintf(g_dasm_str, "db%-2s D%d, $%x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));\r
1589 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
1590}\r
1591\r
1592static void d68000_divs(void)\r
1593{\r
1594 sprintf(g_dasm_str, "divs.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1595}\r
1596\r
1597static void d68000_divu(void)\r
1598{\r
1599 sprintf(g_dasm_str, "divu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1600}\r
1601\r
1602static void d68020_divl(void)\r
1603{\r
1604 uint extension;\r
1605 LIMIT_CPU_TYPES(M68020_PLUS);\r
1606 extension = read_imm_16();\r
1607\r
1608 if(BIT_A(extension))\r
1609 sprintf(g_dasm_str, "div%c.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);\r
1610 else if((extension&7) == ((extension>>12)&7))\r
1611 sprintf(g_dasm_str, "div%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);\r
1612 else\r
1613 sprintf(g_dasm_str, "div%cl.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);\r
1614}\r
1615\r
1616static void d68000_eor_8(void)\r
1617{\r
1618 sprintf(g_dasm_str, "eor.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
1619}\r
1620\r
1621static void d68000_eor_16(void)\r
1622{\r
1623 sprintf(g_dasm_str, "eor.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r
1624}\r
1625\r
1626static void d68000_eor_32(void)\r
1627{\r
1628 sprintf(g_dasm_str, "eor.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r
1629}\r
1630\r
1631static void d68000_eori_8(void)\r
1632{\r
1633 char* str = get_imm_str_u8();\r
1634 sprintf(g_dasm_str, "eori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
1635}\r
1636\r
1637static void d68000_eori_16(void)\r
1638{\r
1639 char* str = get_imm_str_u16();\r
1640 sprintf(g_dasm_str, "eori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r
1641}\r
1642\r
1643static void d68000_eori_32(void)\r
1644{\r
1645 char* str = get_imm_str_u32();\r
1646 sprintf(g_dasm_str, "eori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r
1647}\r
1648\r
1649static void d68000_eori_to_ccr(void)\r
1650{\r
1651 sprintf(g_dasm_str, "eori %s, CCR", get_imm_str_u8());\r
1652}\r
1653\r
1654static void d68000_eori_to_sr(void)\r
1655{\r
1656 sprintf(g_dasm_str, "eori %s, SR", get_imm_str_u16());\r
1657}\r
1658\r
1659static void d68000_exg_dd(void)\r
1660{\r
1661 sprintf(g_dasm_str, "exg D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1662}\r
1663\r
1664static void d68000_exg_aa(void)\r
1665{\r
1666 sprintf(g_dasm_str, "exg A%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1667}\r
1668\r
1669static void d68000_exg_da(void)\r
1670{\r
1671 sprintf(g_dasm_str, "exg D%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1672}\r
1673\r
1674static void d68000_ext_16(void)\r
1675{\r
1676 sprintf(g_dasm_str, "ext.w D%d", g_cpu_ir&7);\r
1677}\r
1678\r
1679static void d68000_ext_32(void)\r
1680{\r
1681 sprintf(g_dasm_str, "ext.l D%d", g_cpu_ir&7);\r
1682}\r
1683\r
1684static void d68020_extb_32(void)\r
1685{\r
1686 LIMIT_CPU_TYPES(M68020_PLUS);\r
1687 sprintf(g_dasm_str, "extb.l D%d; (2+)", g_cpu_ir&7);\r
1688}\r
1689\r
1690static void d68040_fpu(void)\r
1691{\r
1692 char float_data_format[8][3] =\r
1693 {\r
1694 ".l", ".s", ".x", ".p", ".w", ".d", ".b", ".?"\r
1695 };\r
1696\r
1697 char mnemonic[40];\r
1698 uint w2, src, dst_reg;\r
1699 LIMIT_CPU_TYPES(M68040_PLUS);\r
1700 w2 = read_imm_16();\r
1701\r
1702 src = (w2 >> 10) & 0x7;\r
1703 dst_reg = (w2 >> 7) & 0x7;\r
1704\r
1705 switch ((w2 >> 13) & 0x7)\r
1706 {\r
1707 case 0x0:\r
1708 case 0x2:\r
1709 {\r
1710 switch(w2 & 0x7f)\r
1711 {\r
1712 case 0x00: sprintf(mnemonic, "fmove"); break;\r
1713 case 0x01: sprintf(mnemonic, "fint"); break;\r
1714 case 0x02: sprintf(mnemonic, "fsinh"); break;\r
1715 case 0x03: sprintf(mnemonic, "fintrz"); break;\r
1716 case 0x04: sprintf(mnemonic, "fsqrt"); break;\r
1717 case 0x06: sprintf(mnemonic, "flognp1"); break;\r
1718 case 0x08: sprintf(mnemonic, "fetoxm1"); break;\r
1719 case 0x09: sprintf(mnemonic, "ftanh1"); break;\r
1720 case 0x0a: sprintf(mnemonic, "fatan"); break;\r
1721 case 0x0c: sprintf(mnemonic, "fasin"); break;\r
1722 case 0x0d: sprintf(mnemonic, "fatanh"); break;\r
1723 case 0x0e: sprintf(mnemonic, "fsin"); break;\r
1724 case 0x0f: sprintf(mnemonic, "ftan"); break;\r
1725 case 0x10: sprintf(mnemonic, "fetox"); break;\r
1726 case 0x11: sprintf(mnemonic, "ftwotox"); break;\r
1727 case 0x12: sprintf(mnemonic, "ftentox"); break;\r
1728 case 0x14: sprintf(mnemonic, "flogn"); break;\r
1729 case 0x15: sprintf(mnemonic, "flog10"); break;\r
1730 case 0x16: sprintf(mnemonic, "flog2"); break;\r
1731 case 0x18: sprintf(mnemonic, "fabs"); break;\r
1732 case 0x19: sprintf(mnemonic, "fcosh"); break;\r
1733 case 0x1a: sprintf(mnemonic, "fneg"); break;\r
1734 case 0x1c: sprintf(mnemonic, "facos"); break;\r
1735 case 0x1d: sprintf(mnemonic, "fcos"); break;\r
1736 case 0x1e: sprintf(mnemonic, "fgetexp"); break;\r
1737 case 0x1f: sprintf(mnemonic, "fgetman"); break;\r
1738 case 0x20: sprintf(mnemonic, "fdiv"); break;\r
1739 case 0x21: sprintf(mnemonic, "fmod"); break;\r
1740 case 0x22: sprintf(mnemonic, "fadd"); break;\r
1741 case 0x23: sprintf(mnemonic, "fmul"); break;\r
1742 case 0x24: sprintf(mnemonic, "fsgldiv"); break;\r
1743 case 0x25: sprintf(mnemonic, "frem"); break;\r
1744 case 0x26: sprintf(mnemonic, "fscale"); break;\r
1745 case 0x27: sprintf(mnemonic, "fsglmul"); break;\r
1746 case 0x28: sprintf(mnemonic, "fsub"); break;\r
1747 case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:\r
1748 sprintf(mnemonic, "fsincos"); break;\r
1749 case 0x38: sprintf(mnemonic, "fcmp"); break;\r
1750 case 0x3a: sprintf(mnemonic, "ftst"); break;\r
1751 case 0x41: sprintf(mnemonic, "fssqrt"); break;\r
1752 case 0x45: sprintf(mnemonic, "fdsqrt"); break;\r
1753 case 0x58: sprintf(mnemonic, "fsabs"); break;\r
1754 case 0x5a: sprintf(mnemonic, "fsneg"); break;\r
1755 case 0x5c: sprintf(mnemonic, "fdabs"); break;\r
1756 case 0x5e: sprintf(mnemonic, "fdneg"); break;\r
1757 case 0x60: sprintf(mnemonic, "fsdiv"); break;\r
1758 case 0x62: sprintf(mnemonic, "fsadd"); break;\r
1759 case 0x63: sprintf(mnemonic, "fsmul"); break;\r
1760 case 0x64: sprintf(mnemonic, "fddiv"); break;\r
1761 case 0x66: sprintf(mnemonic, "fdadd"); break;\r
1762 case 0x67: sprintf(mnemonic, "fdmul"); break;\r
1763 case 0x68: sprintf(mnemonic, "fssub"); break;\r
1764 case 0x6c: sprintf(mnemonic, "fdsub"); break;\r
1765\r
1766 default: sprintf(mnemonic, "FPU (?)"); break;\r
1767 }\r
1768\r
1769 if (w2 & 0x4000)\r
1770 {\r
1771 sprintf(g_dasm_str, "%s%s %s, FP%d", mnemonic, float_data_format[src], get_ea_mode_str_32(g_cpu_ir), dst_reg);\r
1772 }\r
1773 else\r
1774 {\r
1775 sprintf(g_dasm_str, "%s.x FP%d, FP%d", mnemonic, src, dst_reg);\r
1776 }\r
1777 break;\r
1778 }\r
1779\r
1780 case 0x3:\r
1781 {\r
1782 sprintf(g_dasm_str, "fmove /todo");\r
1783 break;\r
1784 }\r
1785\r
1786 case 0x4:\r
1787 case 0x5:\r
1788 {\r
1789 sprintf(g_dasm_str, "fmove /todo");\r
1790 break;\r
1791 }\r
1792\r
1793 case 0x6:\r
1794 case 0x7:\r
1795 {\r
1796 sprintf(g_dasm_str, "fmovem /todo");\r
1797 break;\r
1798 }\r
1799\r
1800 default:\r
1801 {\r
1802 sprintf(g_dasm_str, "FPU (?) ");\r
1803 break;\r
1804 }\r
1805 }\r
1806}\r
1807\r
1808static void d68000_jmp(void)\r
1809{\r
1810 sprintf(g_dasm_str, "jmp %s", get_ea_mode_str_32(g_cpu_ir));\r
1811}\r
1812\r
1813static void d68000_jsr(void)\r
1814{\r
1815 sprintf(g_dasm_str, "jsr %s", get_ea_mode_str_32(g_cpu_ir));\r
1816 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
1817}\r
1818\r
1819static void d68000_lea(void)\r
1820{\r
1821 sprintf(g_dasm_str, "lea %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1822}\r
1823\r
1824static void d68000_link_16(void)\r
1825{\r
1826 sprintf(g_dasm_str, "link A%d, %s", g_cpu_ir&7, get_imm_str_s16());\r
1827}\r
1828\r
1829static void d68020_link_32(void)\r
1830{\r
1831 LIMIT_CPU_TYPES(M68020_PLUS);\r
1832 sprintf(g_dasm_str, "link A%d, %s; (2+)", g_cpu_ir&7, get_imm_str_s32());\r
1833}\r
1834\r
1835static void d68000_lsr_s_8(void)\r
1836{\r
1837 sprintf(g_dasm_str, "lsr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
1838}\r
1839\r
1840static void d68000_lsr_s_16(void)\r
1841{\r
1842 sprintf(g_dasm_str, "lsr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
1843}\r
1844\r
1845static void d68000_lsr_s_32(void)\r
1846{\r
1847 sprintf(g_dasm_str, "lsr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
1848}\r
1849\r
1850static void d68000_lsr_r_8(void)\r
1851{\r
1852 sprintf(g_dasm_str, "lsr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1853}\r
1854\r
1855static void d68000_lsr_r_16(void)\r
1856{\r
1857 sprintf(g_dasm_str, "lsr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1858}\r
1859\r
1860static void d68000_lsr_r_32(void)\r
1861{\r
1862 sprintf(g_dasm_str, "lsr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1863}\r
1864\r
1865static void d68000_lsr_ea(void)\r
1866{\r
1867 sprintf(g_dasm_str, "lsr.w %s", get_ea_mode_str_32(g_cpu_ir));\r
1868}\r
1869\r
1870static void d68000_lsl_s_8(void)\r
1871{\r
1872 sprintf(g_dasm_str, "lsl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
1873}\r
1874\r
1875static void d68000_lsl_s_16(void)\r
1876{\r
1877 sprintf(g_dasm_str, "lsl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
1878}\r
1879\r
1880static void d68000_lsl_s_32(void)\r
1881{\r
1882 sprintf(g_dasm_str, "lsl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
1883}\r
1884\r
1885static void d68000_lsl_r_8(void)\r
1886{\r
1887 sprintf(g_dasm_str, "lsl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1888}\r
1889\r
1890static void d68000_lsl_r_16(void)\r
1891{\r
1892 sprintf(g_dasm_str, "lsl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1893}\r
1894\r
1895static void d68000_lsl_r_32(void)\r
1896{\r
1897 sprintf(g_dasm_str, "lsl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
1898}\r
1899\r
1900static void d68000_lsl_ea(void)\r
1901{\r
1902 sprintf(g_dasm_str, "lsl.w %s", get_ea_mode_str_32(g_cpu_ir));\r
1903}\r
1904\r
1905static void d68000_move_8(void)\r
1906{\r
1907 char* str = get_ea_mode_str_8(g_cpu_ir);\r
1908 sprintf(g_dasm_str, "move.b %s, %s", str, get_ea_mode_str_8(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));\r
1909}\r
1910\r
1911static void d68000_move_16(void)\r
1912{\r
1913 char* str = get_ea_mode_str_16(g_cpu_ir);\r
1914 sprintf(g_dasm_str, "move.w %s, %s", str, get_ea_mode_str_16(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));\r
1915}\r
1916\r
1917static void d68000_move_32(void)\r
1918{\r
1919 char* str = get_ea_mode_str_32(g_cpu_ir);\r
1920 sprintf(g_dasm_str, "move.l %s, %s", str, get_ea_mode_str_32(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));\r
1921}\r
1922\r
1923static void d68000_movea_16(void)\r
1924{\r
1925 sprintf(g_dasm_str, "movea.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1926}\r
1927\r
1928static void d68000_movea_32(void)\r
1929{\r
1930 sprintf(g_dasm_str, "movea.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
1931}\r
1932\r
1933static void d68000_move_to_ccr(void)\r
1934{\r
1935 sprintf(g_dasm_str, "move %s, CCR", get_ea_mode_str_8(g_cpu_ir));\r
1936}\r
1937\r
1938static void d68010_move_fr_ccr(void)\r
1939{\r
1940 LIMIT_CPU_TYPES(M68010_PLUS);\r
1941 sprintf(g_dasm_str, "move CCR, %s; (1+)", get_ea_mode_str_8(g_cpu_ir));\r
1942}\r
1943\r
1944static void d68000_move_fr_sr(void)\r
1945{\r
1946 sprintf(g_dasm_str, "move SR, %s", get_ea_mode_str_16(g_cpu_ir));\r
1947}\r
1948\r
1949static void d68000_move_to_sr(void)\r
1950{\r
1951 sprintf(g_dasm_str, "move %s, SR", get_ea_mode_str_16(g_cpu_ir));\r
1952}\r
1953\r
1954static void d68000_move_fr_usp(void)\r
1955{\r
1956 sprintf(g_dasm_str, "move USP, A%d", g_cpu_ir&7);\r
1957}\r
1958\r
1959static void d68000_move_to_usp(void)\r
1960{\r
1961 sprintf(g_dasm_str, "move A%d, USP", g_cpu_ir&7);\r
1962}\r
1963\r
1964static void d68010_movec(void)\r
1965{\r
1966 uint extension;\r
1967 const char* reg_name;\r
1968 const char* processor;\r
1969 LIMIT_CPU_TYPES(M68010_PLUS);\r
1970 extension = read_imm_16();\r
1971\r
1972 switch(extension & 0xfff)\r
1973 {\r
1974 case 0x000:\r
1975 reg_name = "SFC";\r
1976 processor = "1+";\r
1977 break;\r
1978 case 0x001:\r
1979 reg_name = "DFC";\r
1980 processor = "1+";\r
1981 break;\r
1982 case 0x800:\r
1983 reg_name = "USP";\r
1984 processor = "1+";\r
1985 break;\r
1986 case 0x801:\r
1987 reg_name = "VBR";\r
1988 processor = "1+";\r
1989 break;\r
1990 case 0x002:\r
1991 reg_name = "CACR";\r
1992 processor = "2+";\r
1993 break;\r
1994 case 0x802:\r
1995 reg_name = "CAAR";\r
1996 processor = "2,3";\r
1997 break;\r
1998 case 0x803:\r
1999 reg_name = "MSP";\r
2000 processor = "2+";\r
2001 break;\r
2002 case 0x804:\r
2003 reg_name = "ISP";\r
2004 processor = "2+";\r
2005 break;\r
2006 case 0x003:\r
2007 reg_name = "TC";\r
2008 processor = "4+";\r
2009 break;\r
2010 case 0x004:\r
2011 reg_name = "ITT0";\r
2012 processor = "4+";\r
2013 break;\r
2014 case 0x005:\r
2015 reg_name = "ITT1";\r
2016 processor = "4+";\r
2017 break;\r
2018 case 0x006:\r
2019 reg_name = "DTT0";\r
2020 processor = "4+";\r
2021 break;\r
2022 case 0x007:\r
2023 reg_name = "DTT1";\r
2024 processor = "4+";\r
2025 break;\r
2026 case 0x805:\r
2027 reg_name = "MMUSR";\r
2028 processor = "4+";\r
2029 break;\r
2030 case 0x806:\r
2031 reg_name = "URP";\r
2032 processor = "4+";\r
2033 break;\r
2034 case 0x807:\r
2035 reg_name = "SRP";\r
2036 processor = "4+";\r
2037 break;\r
2038 default:\r
2039 reg_name = make_signed_hex_str_16(extension & 0xfff);\r
2040 processor = "?";\r
2041 }\r
2042\r
2043 if(BIT_0(g_cpu_ir))\r
2044 sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor);\r
2045 else\r
2046 sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor);\r
2047}\r
2048\r
2049static void d68000_movem_pd_16(void)\r
2050{\r
2051 uint data = read_imm_16();\r
2052 char buffer[40];\r
2053 uint first;\r
2054 uint run_length;\r
2055 uint i;\r
2056\r
2057 buffer[0] = 0;\r
2058 for(i=0;i<8;i++)\r
2059 {\r
2060 if(data&(1<<(15-i)))\r
2061 {\r
2062 first = i;\r
2063 run_length = 0;\r
2064 while(i<7 && (data&(1<<(15-(i+1)))))\r
2065 {\r
2066 i++;\r
2067 run_length++;\r
2068 }\r
2069 if(buffer[0] != 0)\r
2070 strcat(buffer, "/");\r
2071 sprintf(buffer+strlen(buffer), "D%d", first);\r
2072 if(run_length > 0)\r
2073 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r
2074 }\r
2075 }\r
2076 for(i=0;i<8;i++)\r
2077 {\r
2078 if(data&(1<<(7-i)))\r
2079 {\r
2080 first = i;\r
2081 run_length = 0;\r
2082 while(i<7 && (data&(1<<(7-(i+1)))))\r
2083 {\r
2084 i++;\r
2085 run_length++;\r
2086 }\r
2087 if(buffer[0] != 0)\r
2088 strcat(buffer, "/");\r
2089 sprintf(buffer+strlen(buffer), "A%d", first);\r
2090 if(run_length > 0)\r
2091 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r
2092 }\r
2093 }\r
2094 sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));\r
2095}\r
2096\r
2097static void d68000_movem_pd_32(void)\r
2098{\r
2099 uint data = read_imm_16();\r
2100 char buffer[40];\r
2101 uint first;\r
2102 uint run_length;\r
2103 uint i;\r
2104\r
2105 buffer[0] = 0;\r
2106 for(i=0;i<8;i++)\r
2107 {\r
2108 if(data&(1<<(15-i)))\r
2109 {\r
2110 first = i;\r
2111 run_length = 0;\r
2112 while(i<7 && (data&(1<<(15-(i+1)))))\r
2113 {\r
2114 i++;\r
2115 run_length++;\r
2116 }\r
2117 if(buffer[0] != 0)\r
2118 strcat(buffer, "/");\r
2119 sprintf(buffer+strlen(buffer), "D%d", first);\r
2120 if(run_length > 0)\r
2121 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r
2122 }\r
2123 }\r
2124 for(i=0;i<8;i++)\r
2125 {\r
2126 if(data&(1<<(7-i)))\r
2127 {\r
2128 first = i;\r
2129 run_length = 0;\r
2130 while(i<7 && (data&(1<<(7-(i+1)))))\r
2131 {\r
2132 i++;\r
2133 run_length++;\r
2134 }\r
2135 if(buffer[0] != 0)\r
2136 strcat(buffer, "/");\r
2137 sprintf(buffer+strlen(buffer), "A%d", first);\r
2138 if(run_length > 0)\r
2139 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r
2140 }\r
2141 }\r
2142 sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));\r
2143}\r
2144\r
2145static void d68000_movem_er_16(void)\r
2146{\r
2147 uint data = read_imm_16();\r
2148 char buffer[40];\r
2149 uint first;\r
2150 uint run_length;\r
2151 uint i;\r
2152\r
2153 buffer[0] = 0;\r
2154 for(i=0;i<8;i++)\r
2155 {\r
2156 if(data&(1<<i))\r
2157 {\r
2158 first = i;\r
2159 run_length = 0;\r
2160 while(i<7 && (data&(1<<(i+1))))\r
2161 {\r
2162 i++;\r
2163 run_length++;\r
2164 }\r
2165 if(buffer[0] != 0)\r
2166 strcat(buffer, "/");\r
2167 sprintf(buffer+strlen(buffer), "D%d", first);\r
2168 if(run_length > 0)\r
2169 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r
2170 }\r
2171 }\r
2172 for(i=0;i<8;i++)\r
2173 {\r
2174 if(data&(1<<(i+8)))\r
2175 {\r
2176 first = i;\r
2177 run_length = 0;\r
2178 while(i<7 && (data&(1<<(i+8+1))))\r
2179 {\r
2180 i++;\r
2181 run_length++;\r
2182 }\r
2183 if(buffer[0] != 0)\r
2184 strcat(buffer, "/");\r
2185 sprintf(buffer+strlen(buffer), "A%d", first);\r
2186 if(run_length > 0)\r
2187 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r
2188 }\r
2189 }\r
2190 sprintf(g_dasm_str, "movem.w %s, %s", get_ea_mode_str_16(g_cpu_ir), buffer);\r
2191}\r
2192\r
2193static void d68000_movem_er_32(void)\r
2194{\r
2195 uint data = read_imm_16();\r
2196 char buffer[40];\r
2197 uint first;\r
2198 uint run_length;\r
2199 uint i;\r
2200\r
2201 buffer[0] = 0;\r
2202 for(i=0;i<8;i++)\r
2203 {\r
2204 if(data&(1<<i))\r
2205 {\r
2206 first = i;\r
2207 run_length = 0;\r
2208 while(i<7 && (data&(1<<(i+1))))\r
2209 {\r
2210 i++;\r
2211 run_length++;\r
2212 }\r
2213 if(buffer[0] != 0)\r
2214 strcat(buffer, "/");\r
2215 sprintf(buffer+strlen(buffer), "D%d", first);\r
2216 if(run_length > 0)\r
2217 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r
2218 }\r
2219 }\r
2220 for(i=0;i<8;i++)\r
2221 {\r
2222 if(data&(1<<(i+8)))\r
2223 {\r
2224 first = i;\r
2225 run_length = 0;\r
2226 while(i<7 && (data&(1<<(i+8+1))))\r
2227 {\r
2228 i++;\r
2229 run_length++;\r
2230 }\r
2231 if(buffer[0] != 0)\r
2232 strcat(buffer, "/");\r
2233 sprintf(buffer+strlen(buffer), "A%d", first);\r
2234 if(run_length > 0)\r
2235 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r
2236 }\r
2237 }\r
2238 sprintf(g_dasm_str, "movem.l %s, %s", get_ea_mode_str_32(g_cpu_ir), buffer);\r
2239}\r
2240\r
2241static void d68000_movem_re_16(void)\r
2242{\r
2243 uint data = read_imm_16();\r
2244 char buffer[40];\r
2245 uint first;\r
2246 uint run_length;\r
2247 uint i;\r
2248\r
2249 buffer[0] = 0;\r
2250 for(i=0;i<8;i++)\r
2251 {\r
2252 if(data&(1<<i))\r
2253 {\r
2254 first = i;\r
2255 run_length = 0;\r
2256 while(i<7 && (data&(1<<(i+1))))\r
2257 {\r
2258 i++;\r
2259 run_length++;\r
2260 }\r
2261 if(buffer[0] != 0)\r
2262 strcat(buffer, "/");\r
2263 sprintf(buffer+strlen(buffer), "D%d", first);\r
2264 if(run_length > 0)\r
2265 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r
2266 }\r
2267 }\r
2268 for(i=0;i<8;i++)\r
2269 {\r
2270 if(data&(1<<(i+8)))\r
2271 {\r
2272 first = i;\r
2273 run_length = 0;\r
2274 while(i<7 && (data&(1<<(i+8+1))))\r
2275 {\r
2276 i++;\r
2277 run_length++;\r
2278 }\r
2279 if(buffer[0] != 0)\r
2280 strcat(buffer, "/");\r
2281 sprintf(buffer+strlen(buffer), "A%d", first);\r
2282 if(run_length > 0)\r
2283 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r
2284 }\r
2285 }\r
2286 sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));\r
2287}\r
2288\r
2289static void d68000_movem_re_32(void)\r
2290{\r
2291 uint data = read_imm_16();\r
2292 char buffer[40];\r
2293 uint first;\r
2294 uint run_length;\r
2295 uint i;\r
2296\r
2297 buffer[0] = 0;\r
2298 for(i=0;i<8;i++)\r
2299 {\r
2300 if(data&(1<<i))\r
2301 {\r
2302 first = i;\r
2303 run_length = 0;\r
2304 while(i<7 && (data&(1<<(i+1))))\r
2305 {\r
2306 i++;\r
2307 run_length++;\r
2308 }\r
2309 if(buffer[0] != 0)\r
2310 strcat(buffer, "/");\r
2311 sprintf(buffer+strlen(buffer), "D%d", first);\r
2312 if(run_length > 0)\r
2313 sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r
2314 }\r
2315 }\r
2316 for(i=0;i<8;i++)\r
2317 {\r
2318 if(data&(1<<(i+8)))\r
2319 {\r
2320 first = i;\r
2321 run_length = 0;\r
2322 while(i<7 && (data&(1<<(i+8+1))))\r
2323 {\r
2324 i++;\r
2325 run_length++;\r
2326 }\r
2327 if(buffer[0] != 0)\r
2328 strcat(buffer, "/");\r
2329 sprintf(buffer+strlen(buffer), "A%d", first);\r
2330 if(run_length > 0)\r
2331 sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r
2332 }\r
2333 }\r
2334 sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));\r
2335}\r
2336\r
2337static void d68000_movep_re_16(void)\r
2338{\r
2339 sprintf(g_dasm_str, "movep.w D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);\r
2340}\r
2341\r
2342static void d68000_movep_re_32(void)\r
2343{\r
2344 sprintf(g_dasm_str, "movep.l D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);\r
2345}\r
2346\r
2347static void d68000_movep_er_16(void)\r
2348{\r
2349 sprintf(g_dasm_str, "movep.w ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2350}\r
2351\r
2352static void d68000_movep_er_32(void)\r
2353{\r
2354 sprintf(g_dasm_str, "movep.l ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2355}\r
2356\r
2357static void d68010_moves_8(void)\r
2358{\r
2359 uint extension;\r
2360 LIMIT_CPU_TYPES(M68010_PLUS);\r
2361 extension = read_imm_16();\r
2362 if(BIT_B(extension))\r
2363 sprintf(g_dasm_str, "moves.b %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir));\r
2364 else\r
2365 sprintf(g_dasm_str, "moves.b %s, %c%d; (1+)", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r
2366}\r
2367\r
2368static void d68010_moves_16(void)\r
2369{\r
2370 uint extension;\r
2371 LIMIT_CPU_TYPES(M68010_PLUS);\r
2372 extension = read_imm_16();\r
2373 if(BIT_B(extension))\r
2374 sprintf(g_dasm_str, "moves.w %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_16(g_cpu_ir));\r
2375 else\r
2376 sprintf(g_dasm_str, "moves.w %s, %c%d; (1+)", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r
2377}\r
2378\r
2379static void d68010_moves_32(void)\r
2380{\r
2381 uint extension;\r
2382 LIMIT_CPU_TYPES(M68010_PLUS);\r
2383 extension = read_imm_16();\r
2384 if(BIT_B(extension))\r
2385 sprintf(g_dasm_str, "moves.l %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_32(g_cpu_ir));\r
2386 else\r
2387 sprintf(g_dasm_str, "moves.l %s, %c%d; (1+)", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r
2388}\r
2389\r
2390static void d68000_moveq(void)\r
2391{\r
2392 sprintf(g_dasm_str, "moveq #%s, D%d", make_signed_hex_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2393}\r
2394\r
2395static void d68040_move16_pi_pi(void)\r
2396{\r
2397 LIMIT_CPU_TYPES(M68040_PLUS);\r
2398 sprintf(g_dasm_str, "move16 (A%d)+, (A%d)+; (4)", g_cpu_ir&7, (read_imm_16()>>12)&7);\r
2399}\r
2400\r
2401static void d68040_move16_pi_al(void)\r
2402{\r
2403 LIMIT_CPU_TYPES(M68040_PLUS);\r
2404 sprintf(g_dasm_str, "move16 (A%d)+, %s; (4)", g_cpu_ir&7, get_imm_str_u32());\r
2405}\r
2406\r
2407static void d68040_move16_al_pi(void)\r
2408{\r
2409 LIMIT_CPU_TYPES(M68040_PLUS);\r
2410 sprintf(g_dasm_str, "move16 %s, (A%d)+; (4)", get_imm_str_u32(), g_cpu_ir&7);\r
2411}\r
2412\r
2413static void d68040_move16_ai_al(void)\r
2414{\r
2415 LIMIT_CPU_TYPES(M68040_PLUS);\r
2416 sprintf(g_dasm_str, "move16 (A%d), %s; (4)", g_cpu_ir&7, get_imm_str_u32());\r
2417}\r
2418\r
2419static void d68040_move16_al_ai(void)\r
2420{\r
2421 LIMIT_CPU_TYPES(M68040_PLUS);\r
2422 sprintf(g_dasm_str, "move16 %s, (A%d); (4)", get_imm_str_u32(), g_cpu_ir&7);\r
2423}\r
2424\r
2425static void d68000_muls(void)\r
2426{\r
2427 sprintf(g_dasm_str, "muls.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2428}\r
2429\r
2430static void d68000_mulu(void)\r
2431{\r
2432 sprintf(g_dasm_str, "mulu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2433}\r
2434\r
2435static void d68020_mull(void)\r
2436{\r
2437 uint extension;\r
2438 LIMIT_CPU_TYPES(M68020_PLUS);\r
2439 extension = read_imm_16();\r
2440\r
2441 if(BIT_A(extension))\r
2442 sprintf(g_dasm_str, "mul%c.l %s, D%d-D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);\r
2443 else\r
2444 sprintf(g_dasm_str, "mul%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);\r
2445}\r
2446\r
2447static void d68000_nbcd(void)\r
2448{\r
2449 sprintf(g_dasm_str, "nbcd %s", get_ea_mode_str_8(g_cpu_ir));\r
2450}\r
2451\r
2452static void d68000_neg_8(void)\r
2453{\r
2454 sprintf(g_dasm_str, "neg.b %s", get_ea_mode_str_8(g_cpu_ir));\r
2455}\r
2456\r
2457static void d68000_neg_16(void)\r
2458{\r
2459 sprintf(g_dasm_str, "neg.w %s", get_ea_mode_str_16(g_cpu_ir));\r
2460}\r
2461\r
2462static void d68000_neg_32(void)\r
2463{\r
2464 sprintf(g_dasm_str, "neg.l %s", get_ea_mode_str_32(g_cpu_ir));\r
2465}\r
2466\r
2467static void d68000_negx_8(void)\r
2468{\r
2469 sprintf(g_dasm_str, "negx.b %s", get_ea_mode_str_8(g_cpu_ir));\r
2470}\r
2471\r
2472static void d68000_negx_16(void)\r
2473{\r
2474 sprintf(g_dasm_str, "negx.w %s", get_ea_mode_str_16(g_cpu_ir));\r
2475}\r
2476\r
2477static void d68000_negx_32(void)\r
2478{\r
2479 sprintf(g_dasm_str, "negx.l %s", get_ea_mode_str_32(g_cpu_ir));\r
2480}\r
2481\r
2482static void d68000_nop(void)\r
2483{\r
2484 sprintf(g_dasm_str, "nop");\r
2485}\r
2486\r
2487static void d68000_not_8(void)\r
2488{\r
2489 sprintf(g_dasm_str, "not.b %s", get_ea_mode_str_8(g_cpu_ir));\r
2490}\r
2491\r
2492static void d68000_not_16(void)\r
2493{\r
2494 sprintf(g_dasm_str, "not.w %s", get_ea_mode_str_16(g_cpu_ir));\r
2495}\r
2496\r
2497static void d68000_not_32(void)\r
2498{\r
2499 sprintf(g_dasm_str, "not.l %s", get_ea_mode_str_32(g_cpu_ir));\r
2500}\r
2501\r
2502static void d68000_or_er_8(void)\r
2503{\r
2504 sprintf(g_dasm_str, "or.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2505}\r
2506\r
2507static void d68000_or_er_16(void)\r
2508{\r
2509 sprintf(g_dasm_str, "or.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2510}\r
2511\r
2512static void d68000_or_er_32(void)\r
2513{\r
2514 sprintf(g_dasm_str, "or.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2515}\r
2516\r
2517static void d68000_or_re_8(void)\r
2518{\r
2519 sprintf(g_dasm_str, "or.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
2520}\r
2521\r
2522static void d68000_or_re_16(void)\r
2523{\r
2524 sprintf(g_dasm_str, "or.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r
2525}\r
2526\r
2527static void d68000_or_re_32(void)\r
2528{\r
2529 sprintf(g_dasm_str, "or.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r
2530}\r
2531\r
2532static void d68000_ori_8(void)\r
2533{\r
2534 char* str = get_imm_str_u8();\r
2535 sprintf(g_dasm_str, "ori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
2536}\r
2537\r
2538static void d68000_ori_16(void)\r
2539{\r
2540 char* str = get_imm_str_u16();\r
2541 sprintf(g_dasm_str, "ori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r
2542}\r
2543\r
2544static void d68000_ori_32(void)\r
2545{\r
2546 char* str = get_imm_str_u32();\r
2547 sprintf(g_dasm_str, "ori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r
2548}\r
2549\r
2550static void d68000_ori_to_ccr(void)\r
2551{\r
2552 sprintf(g_dasm_str, "ori %s, CCR", get_imm_str_u8());\r
2553}\r
2554\r
2555static void d68000_ori_to_sr(void)\r
2556{\r
2557 sprintf(g_dasm_str, "ori %s, SR", get_imm_str_u16());\r
2558}\r
2559\r
2560static void d68020_pack_rr(void)\r
2561{\r
2562 LIMIT_CPU_TYPES(M68020_PLUS);\r
2563 sprintf(g_dasm_str, "pack D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());\r
2564}\r
2565\r
2566static void d68020_pack_mm(void)\r
2567{\r
2568 LIMIT_CPU_TYPES(M68020_PLUS);\r
2569 sprintf(g_dasm_str, "pack -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());\r
2570}\r
2571\r
2572static void d68000_pea(void)\r
2573{\r
2574 sprintf(g_dasm_str, "pea %s", get_ea_mode_str_32(g_cpu_ir));\r
2575}\r
2576\r
2577static void d68040_pflush(void)\r
2578{\r
2579 LIMIT_CPU_TYPES(M68040_PLUS);\r
2580\r
2581 if (g_cpu_ir & 0x10)\r
2582 {\r
2583 sprintf(g_dasm_str, "pflusha%s", (g_cpu_ir & 8) ? "" : "n");\r
2584 }\r
2585 else\r
2586 {\r
2587 sprintf(g_dasm_str, "pflush%s(A%d)", (g_cpu_ir & 8) ? "" : "n", g_cpu_ir & 7);\r
2588 }\r
2589}\r
2590\r
2591static void d68000_reset(void)\r
2592{\r
2593 sprintf(g_dasm_str, "reset");\r
2594}\r
2595\r
2596static void d68000_ror_s_8(void)\r
2597{\r
2598 sprintf(g_dasm_str, "ror.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2599}\r
2600\r
2601static void d68000_ror_s_16(void)\r
2602{\r
2603 sprintf(g_dasm_str, "ror.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7],g_cpu_ir&7);\r
2604}\r
2605\r
2606static void d68000_ror_s_32(void)\r
2607{\r
2608 sprintf(g_dasm_str, "ror.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2609}\r
2610\r
2611static void d68000_ror_r_8(void)\r
2612{\r
2613 sprintf(g_dasm_str, "ror.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2614}\r
2615\r
2616static void d68000_ror_r_16(void)\r
2617{\r
2618 sprintf(g_dasm_str, "ror.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2619}\r
2620\r
2621static void d68000_ror_r_32(void)\r
2622{\r
2623 sprintf(g_dasm_str, "ror.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2624}\r
2625\r
2626static void d68000_ror_ea(void)\r
2627{\r
2628 sprintf(g_dasm_str, "ror.w %s", get_ea_mode_str_32(g_cpu_ir));\r
2629}\r
2630\r
2631static void d68000_rol_s_8(void)\r
2632{\r
2633 sprintf(g_dasm_str, "rol.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2634}\r
2635\r
2636static void d68000_rol_s_16(void)\r
2637{\r
2638 sprintf(g_dasm_str, "rol.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2639}\r
2640\r
2641static void d68000_rol_s_32(void)\r
2642{\r
2643 sprintf(g_dasm_str, "rol.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2644}\r
2645\r
2646static void d68000_rol_r_8(void)\r
2647{\r
2648 sprintf(g_dasm_str, "rol.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2649}\r
2650\r
2651static void d68000_rol_r_16(void)\r
2652{\r
2653 sprintf(g_dasm_str, "rol.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2654}\r
2655\r
2656static void d68000_rol_r_32(void)\r
2657{\r
2658 sprintf(g_dasm_str, "rol.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2659}\r
2660\r
2661static void d68000_rol_ea(void)\r
2662{\r
2663 sprintf(g_dasm_str, "rol.w %s", get_ea_mode_str_32(g_cpu_ir));\r
2664}\r
2665\r
2666static void d68000_roxr_s_8(void)\r
2667{\r
2668 sprintf(g_dasm_str, "roxr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2669}\r
2670\r
2671static void d68000_roxr_s_16(void)\r
2672{\r
2673 sprintf(g_dasm_str, "roxr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2674}\r
2675\r
2676\r
2677static void d68000_roxr_s_32(void)\r
2678{\r
2679 sprintf(g_dasm_str, "roxr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2680}\r
2681\r
2682static void d68000_roxr_r_8(void)\r
2683{\r
2684 sprintf(g_dasm_str, "roxr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2685}\r
2686\r
2687static void d68000_roxr_r_16(void)\r
2688{\r
2689 sprintf(g_dasm_str, "roxr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2690}\r
2691\r
2692static void d68000_roxr_r_32(void)\r
2693{\r
2694 sprintf(g_dasm_str, "roxr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2695}\r
2696\r
2697static void d68000_roxr_ea(void)\r
2698{\r
2699 sprintf(g_dasm_str, "roxr.w %s", get_ea_mode_str_32(g_cpu_ir));\r
2700}\r
2701\r
2702static void d68000_roxl_s_8(void)\r
2703{\r
2704 sprintf(g_dasm_str, "roxl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2705}\r
2706\r
2707static void d68000_roxl_s_16(void)\r
2708{\r
2709 sprintf(g_dasm_str, "roxl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2710}\r
2711\r
2712static void d68000_roxl_s_32(void)\r
2713{\r
2714 sprintf(g_dasm_str, "roxl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r
2715}\r
2716\r
2717static void d68000_roxl_r_8(void)\r
2718{\r
2719 sprintf(g_dasm_str, "roxl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2720}\r
2721\r
2722static void d68000_roxl_r_16(void)\r
2723{\r
2724 sprintf(g_dasm_str, "roxl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2725}\r
2726\r
2727static void d68000_roxl_r_32(void)\r
2728{\r
2729 sprintf(g_dasm_str, "roxl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r
2730}\r
2731\r
2732static void d68000_roxl_ea(void)\r
2733{\r
2734 sprintf(g_dasm_str, "roxl.w %s", get_ea_mode_str_32(g_cpu_ir));\r
2735}\r
2736\r
2737static void d68010_rtd(void)\r
2738{\r
2739 LIMIT_CPU_TYPES(M68010_PLUS);\r
2740 sprintf(g_dasm_str, "rtd %s; (1+)", get_imm_str_s16());\r
2741 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r
2742}\r
2743\r
2744static void d68000_rte(void)\r
2745{\r
2746 sprintf(g_dasm_str, "rte");\r
2747 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r
2748}\r
2749\r
2750static void d68020_rtm(void)\r
2751{\r
2752 LIMIT_CPU_TYPES(M68020_ONLY);\r
2753 sprintf(g_dasm_str, "rtm %c%d; (2+)", BIT_3(g_cpu_ir) ? 'A' : 'D', g_cpu_ir&7);\r
2754 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r
2755}\r
2756\r
2757static void d68000_rtr(void)\r
2758{\r
2759 sprintf(g_dasm_str, "rtr");\r
2760 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r
2761}\r
2762\r
2763static void d68000_rts(void)\r
2764{\r
2765 sprintf(g_dasm_str, "rts");\r
2766 SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r
2767}\r
2768\r
2769static void d68000_sbcd_rr(void)\r
2770{\r
2771 sprintf(g_dasm_str, "sbcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2772}\r
2773\r
2774static void d68000_sbcd_mm(void)\r
2775{\r
2776 sprintf(g_dasm_str, "sbcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2777}\r
2778\r
2779static void d68000_scc(void)\r
2780{\r
2781 sprintf(g_dasm_str, "s%-2s %s", g_cc[(g_cpu_ir>>8)&0xf], get_ea_mode_str_8(g_cpu_ir));\r
2782}\r
2783\r
2784static void d68000_stop(void)\r
2785{\r
2786 sprintf(g_dasm_str, "stop %s", get_imm_str_s16());\r
2787}\r
2788\r
2789static void d68000_sub_er_8(void)\r
2790{\r
2791 sprintf(g_dasm_str, "sub.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2792}\r
2793\r
2794static void d68000_sub_er_16(void)\r
2795{\r
2796 sprintf(g_dasm_str, "sub.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2797}\r
2798\r
2799static void d68000_sub_er_32(void)\r
2800{\r
2801 sprintf(g_dasm_str, "sub.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2802}\r
2803\r
2804static void d68000_sub_re_8(void)\r
2805{\r
2806 sprintf(g_dasm_str, "sub.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r
2807}\r
2808\r
2809static void d68000_sub_re_16(void)\r
2810{\r
2811 sprintf(g_dasm_str, "sub.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r
2812}\r
2813\r
2814static void d68000_sub_re_32(void)\r
2815{\r
2816 sprintf(g_dasm_str, "sub.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r
2817}\r
2818\r
2819static void d68000_suba_16(void)\r
2820{\r
2821 sprintf(g_dasm_str, "suba.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2822}\r
2823\r
2824static void d68000_suba_32(void)\r
2825{\r
2826 sprintf(g_dasm_str, "suba.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r
2827}\r
2828\r
2829static void d68000_subi_8(void)\r
2830{\r
2831 char* str = get_imm_str_s8();\r
2832 sprintf(g_dasm_str, "subi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r
2833}\r
2834\r
2835static void d68000_subi_16(void)\r
2836{\r
2837 char* str = get_imm_str_s16();\r
2838 sprintf(g_dasm_str, "subi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r
2839}\r
2840\r
2841static void d68000_subi_32(void)\r
2842{\r
2843 char* str = get_imm_str_s32();\r
2844 sprintf(g_dasm_str, "subi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r
2845}\r
2846\r
2847static void d68000_subq_8(void)\r
2848{\r
2849 sprintf(g_dasm_str, "subq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));\r
2850}\r
2851\r
2852static void d68000_subq_16(void)\r
2853{\r
2854 sprintf(g_dasm_str, "subq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));\r
2855}\r
2856\r
2857static void d68000_subq_32(void)\r
2858{\r
2859 sprintf(g_dasm_str, "subq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));\r
2860}\r
2861\r
2862static void d68000_subx_rr_8(void)\r
2863{\r
2864 sprintf(g_dasm_str, "subx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2865}\r
2866\r
2867static void d68000_subx_rr_16(void)\r
2868{\r
2869 sprintf(g_dasm_str, "subx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2870}\r
2871\r
2872static void d68000_subx_rr_32(void)\r
2873{\r
2874 sprintf(g_dasm_str, "subx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2875}\r
2876\r
2877static void d68000_subx_mm_8(void)\r
2878{\r
2879 sprintf(g_dasm_str, "subx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2880}\r
2881\r
2882static void d68000_subx_mm_16(void)\r
2883{\r
2884 sprintf(g_dasm_str, "subx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2885}\r
2886\r
2887static void d68000_subx_mm_32(void)\r
2888{\r
2889 sprintf(g_dasm_str, "subx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r
2890}\r
2891\r
2892static void d68000_swap(void)\r
2893{\r
2894 sprintf(g_dasm_str, "swap D%d", g_cpu_ir&7);\r
2895}\r
2896\r
2897static void d68000_tas(void)\r
2898{\r
2899 sprintf(g_dasm_str, "tas %s", get_ea_mode_str_8(g_cpu_ir));\r
2900}\r
2901\r
2902static void d68000_trap(void)\r
2903{\r
2904 sprintf(g_dasm_str, "trap #$%x", g_cpu_ir&0xf);\r
2905}\r
2906\r
2907static void d68020_trapcc_0(void)\r
2908{\r
2909 LIMIT_CPU_TYPES(M68020_PLUS);\r
2910 sprintf(g_dasm_str, "trap%-2s; (2+)", g_cc[(g_cpu_ir>>8)&0xf]);\r
2911 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
2912}\r
2913\r
2914static void d68020_trapcc_16(void)\r
2915{\r
2916 LIMIT_CPU_TYPES(M68020_PLUS);\r
2917 sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u16());\r
2918 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
2919}\r
2920\r
2921static void d68020_trapcc_32(void)\r
2922{\r
2923 LIMIT_CPU_TYPES(M68020_PLUS);\r
2924 sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u32());\r
2925 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
2926}\r
2927\r
2928static void d68000_trapv(void)\r
2929{\r
2930 sprintf(g_dasm_str, "trapv");\r
2931 SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r
2932}\r
2933\r
2934static void d68000_tst_8(void)\r
2935{\r
2936 sprintf(g_dasm_str, "tst.b %s", get_ea_mode_str_8(g_cpu_ir));\r
2937}\r
2938\r
2939static void d68020_tst_pcdi_8(void)\r
2940{\r
2941 LIMIT_CPU_TYPES(M68020_PLUS);\r
2942 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));\r
2943}\r
2944\r
2945static void d68020_tst_pcix_8(void)\r
2946{\r
2947 LIMIT_CPU_TYPES(M68020_PLUS);\r
2948 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));\r
2949}\r
2950\r
2951static void d68020_tst_i_8(void)\r
2952{\r
2953 LIMIT_CPU_TYPES(M68020_PLUS);\r
2954 sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));\r
2955}\r
2956\r
2957static void d68000_tst_16(void)\r
2958{\r
2959 sprintf(g_dasm_str, "tst.w %s", get_ea_mode_str_16(g_cpu_ir));\r
2960}\r
2961\r
2962static void d68020_tst_a_16(void)\r
2963{\r
2964 LIMIT_CPU_TYPES(M68020_PLUS);\r
2965 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));\r
2966}\r
2967\r
2968static void d68020_tst_pcdi_16(void)\r
2969{\r
2970 LIMIT_CPU_TYPES(M68020_PLUS);\r
2971 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));\r
2972}\r
2973\r
2974static void d68020_tst_pcix_16(void)\r
2975{\r
2976 LIMIT_CPU_TYPES(M68020_PLUS);\r
2977 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));\r
2978}\r
2979\r
2980static void d68020_tst_i_16(void)\r
2981{\r
2982 LIMIT_CPU_TYPES(M68020_PLUS);\r
2983 sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));\r
2984}\r
2985\r
2986static void d68000_tst_32(void)\r
2987{\r
2988 sprintf(g_dasm_str, "tst.l %s", get_ea_mode_str_32(g_cpu_ir));\r
2989}\r
2990\r
2991static void d68020_tst_a_32(void)\r
2992{\r
2993 LIMIT_CPU_TYPES(M68020_PLUS);\r
2994 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));\r
2995}\r
2996\r
2997static void d68020_tst_pcdi_32(void)\r
2998{\r
2999 LIMIT_CPU_TYPES(M68020_PLUS);\r
3000 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));\r
3001}\r
3002\r
3003static void d68020_tst_pcix_32(void)\r
3004{\r
3005 LIMIT_CPU_TYPES(M68020_PLUS);\r
3006 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));\r
3007}\r
3008\r
3009static void d68020_tst_i_32(void)\r
3010{\r
3011 LIMIT_CPU_TYPES(M68020_PLUS);\r
3012 sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));\r
3013}\r
3014\r
3015static void d68000_unlk(void)\r
3016{\r
3017 sprintf(g_dasm_str, "unlk A%d", g_cpu_ir&7);\r
3018}\r
3019\r
3020static void d68020_unpk_rr(void)\r
3021{\r
3022 LIMIT_CPU_TYPES(M68020_PLUS);\r
3023 sprintf(g_dasm_str, "unpk D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());\r
3024}\r
3025\r
3026static void d68020_unpk_mm(void)\r
3027{\r
3028 LIMIT_CPU_TYPES(M68020_PLUS);\r
3029 sprintf(g_dasm_str, "unpk -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());\r
3030}\r
3031\r
3032\r
3033\r
3034/* ======================================================================== */\r
3035/* ======================= INSTRUCTION TABLE BUILDER ====================== */\r
3036/* ======================================================================== */\r
3037\r
3038/* EA Masks:\r
3039800 = data register direct\r
3040400 = address register direct\r
3041200 = address register indirect\r
3042100 = ARI postincrement\r
3043 80 = ARI pre-decrement\r
3044 40 = ARI displacement\r
3045 20 = ARI index\r
3046 10 = absolute short\r
3047 8 = absolute long\r
3048 4 = immediate / sr\r
3049 2 = pc displacement\r
3050 1 = pc idx\r
3051*/\r
3052\r
3053static opcode_struct g_opcode_info[] =\r
3054{\r
3055/* opcode handler mask match ea mask */\r
3056 {d68000_1010 , 0xf000, 0xa000, 0x000},\r
3057 {d68000_1111 , 0xf000, 0xf000, 0x000},\r
3058 {d68000_abcd_rr , 0xf1f8, 0xc100, 0x000},\r
3059 {d68000_abcd_mm , 0xf1f8, 0xc108, 0x000},\r
3060 {d68000_add_er_8 , 0xf1c0, 0xd000, 0xbff},\r
3061 {d68000_add_er_16 , 0xf1c0, 0xd040, 0xfff},\r
3062 {d68000_add_er_32 , 0xf1c0, 0xd080, 0xfff},\r
3063 {d68000_add_re_8 , 0xf1c0, 0xd100, 0x3f8},\r
3064 {d68000_add_re_16 , 0xf1c0, 0xd140, 0x3f8},\r
3065 {d68000_add_re_32 , 0xf1c0, 0xd180, 0x3f8},\r
3066 {d68000_adda_16 , 0xf1c0, 0xd0c0, 0xfff},\r
3067 {d68000_adda_32 , 0xf1c0, 0xd1c0, 0xfff},\r
3068 {d68000_addi_8 , 0xffc0, 0x0600, 0xbf8},\r
3069 {d68000_addi_16 , 0xffc0, 0x0640, 0xbf8},\r
3070 {d68000_addi_32 , 0xffc0, 0x0680, 0xbf8},\r
3071 {d68000_addq_8 , 0xf1c0, 0x5000, 0xbf8},\r
3072 {d68000_addq_16 , 0xf1c0, 0x5040, 0xff8},\r
3073 {d68000_addq_32 , 0xf1c0, 0x5080, 0xff8},\r
3074 {d68000_addx_rr_8 , 0xf1f8, 0xd100, 0x000},\r
3075 {d68000_addx_rr_16 , 0xf1f8, 0xd140, 0x000},\r
3076 {d68000_addx_rr_32 , 0xf1f8, 0xd180, 0x000},\r
3077 {d68000_addx_mm_8 , 0xf1f8, 0xd108, 0x000},\r
3078 {d68000_addx_mm_16 , 0xf1f8, 0xd148, 0x000},\r
3079 {d68000_addx_mm_32 , 0xf1f8, 0xd188, 0x000},\r
3080 {d68000_and_er_8 , 0xf1c0, 0xc000, 0xbff},\r
3081 {d68000_and_er_16 , 0xf1c0, 0xc040, 0xbff},\r
3082 {d68000_and_er_32 , 0xf1c0, 0xc080, 0xbff},\r
3083 {d68000_and_re_8 , 0xf1c0, 0xc100, 0x3f8},\r
3084 {d68000_and_re_16 , 0xf1c0, 0xc140, 0x3f8},\r
3085 {d68000_and_re_32 , 0xf1c0, 0xc180, 0x3f8},\r
3086 {d68000_andi_to_ccr , 0xffff, 0x023c, 0x000},\r
3087 {d68000_andi_to_sr , 0xffff, 0x027c, 0x000},\r
3088 {d68000_andi_8 , 0xffc0, 0x0200, 0xbf8},\r
3089 {d68000_andi_16 , 0xffc0, 0x0240, 0xbf8},\r
3090 {d68000_andi_32 , 0xffc0, 0x0280, 0xbf8},\r
3091 {d68000_asr_s_8 , 0xf1f8, 0xe000, 0x000},\r
3092 {d68000_asr_s_16 , 0xf1f8, 0xe040, 0x000},\r
3093 {d68000_asr_s_32 , 0xf1f8, 0xe080, 0x000},\r
3094 {d68000_asr_r_8 , 0xf1f8, 0xe020, 0x000},\r
3095 {d68000_asr_r_16 , 0xf1f8, 0xe060, 0x000},\r
3096 {d68000_asr_r_32 , 0xf1f8, 0xe0a0, 0x000},\r
3097 {d68000_asr_ea , 0xffc0, 0xe0c0, 0x3f8},\r
3098 {d68000_asl_s_8 , 0xf1f8, 0xe100, 0x000},\r
3099 {d68000_asl_s_16 , 0xf1f8, 0xe140, 0x000},\r
3100 {d68000_asl_s_32 , 0xf1f8, 0xe180, 0x000},\r
3101 {d68000_asl_r_8 , 0xf1f8, 0xe120, 0x000},\r
3102 {d68000_asl_r_16 , 0xf1f8, 0xe160, 0x000},\r
3103 {d68000_asl_r_32 , 0xf1f8, 0xe1a0, 0x000},\r
3104 {d68000_asl_ea , 0xffc0, 0xe1c0, 0x3f8},\r
3105 {d68000_bcc_8 , 0xf000, 0x6000, 0x000},\r
3106 {d68000_bcc_16 , 0xf0ff, 0x6000, 0x000},\r
3107 {d68020_bcc_32 , 0xf0ff, 0x60ff, 0x000},\r
3108 {d68000_bchg_r , 0xf1c0, 0x0140, 0xbf8},\r
3109 {d68000_bchg_s , 0xffc0, 0x0840, 0xbf8},\r
3110 {d68000_bclr_r , 0xf1c0, 0x0180, 0xbf8},\r
3111 {d68000_bclr_s , 0xffc0, 0x0880, 0xbf8},\r
3112 {d68020_bfchg , 0xffc0, 0xeac0, 0xa78},\r
3113 {d68020_bfclr , 0xffc0, 0xecc0, 0xa78},\r
3114 {d68020_bfexts , 0xffc0, 0xebc0, 0xa7b},\r
3115 {d68020_bfextu , 0xffc0, 0xe9c0, 0xa7b},\r
3116 {d68020_bfffo , 0xffc0, 0xedc0, 0xa7b},\r
3117 {d68020_bfins , 0xffc0, 0xefc0, 0xa78},\r
3118 {d68020_bfset , 0xffc0, 0xeec0, 0xa78},\r
3119 {d68020_bftst , 0xffc0, 0xe8c0, 0xa7b},\r
3120 {d68010_bkpt , 0xfff8, 0x4848, 0x000},\r
3121 {d68000_bra_8 , 0xff00, 0x6000, 0x000},\r
3122 {d68000_bra_16 , 0xffff, 0x6000, 0x000},\r
3123 {d68020_bra_32 , 0xffff, 0x60ff, 0x000},\r
3124 {d68000_bset_r , 0xf1c0, 0x01c0, 0xbf8},\r
3125 {d68000_bset_s , 0xffc0, 0x08c0, 0xbf8},\r
3126 {d68000_bsr_8 , 0xff00, 0x6100, 0x000},\r
3127 {d68000_bsr_16 , 0xffff, 0x6100, 0x000},\r
3128 {d68020_bsr_32 , 0xffff, 0x61ff, 0x000},\r
3129 {d68000_btst_r , 0xf1c0, 0x0100, 0xbff},\r
3130 {d68000_btst_s , 0xffc0, 0x0800, 0xbfb},\r
3131 {d68020_callm , 0xffc0, 0x06c0, 0x27b},\r
3132 {d68020_cas_8 , 0xffc0, 0x0ac0, 0x3f8},\r
3133 {d68020_cas_16 , 0xffc0, 0x0cc0, 0x3f8},\r
3134 {d68020_cas_32 , 0xffc0, 0x0ec0, 0x3f8},\r
3135 {d68020_cas2_16 , 0xffff, 0x0cfc, 0x000},\r
3136 {d68020_cas2_32 , 0xffff, 0x0efc, 0x000},\r
3137 {d68000_chk_16 , 0xf1c0, 0x4180, 0xbff},\r
3138 {d68020_chk_32 , 0xf1c0, 0x4100, 0xbff},\r
3139 {d68020_chk2_cmp2_8 , 0xffc0, 0x00c0, 0x27b},\r
3140 {d68020_chk2_cmp2_16 , 0xffc0, 0x02c0, 0x27b},\r
3141 {d68020_chk2_cmp2_32 , 0xffc0, 0x04c0, 0x27b},\r
3142 {d68040_cinv , 0xff20, 0xf400, 0x000},\r
3143 {d68000_clr_8 , 0xffc0, 0x4200, 0xbf8},\r
3144 {d68000_clr_16 , 0xffc0, 0x4240, 0xbf8},\r
3145 {d68000_clr_32 , 0xffc0, 0x4280, 0xbf8},\r
3146 {d68000_cmp_8 , 0xf1c0, 0xb000, 0xbff},\r
3147 {d68000_cmp_16 , 0xf1c0, 0xb040, 0xfff},\r
3148 {d68000_cmp_32 , 0xf1c0, 0xb080, 0xfff},\r
3149 {d68000_cmpa_16 , 0xf1c0, 0xb0c0, 0xfff},\r
3150 {d68000_cmpa_32 , 0xf1c0, 0xb1c0, 0xfff},\r
3151 {d68000_cmpi_8 , 0xffc0, 0x0c00, 0xbf8},\r
3152 {d68020_cmpi_pcdi_8 , 0xffff, 0x0c3a, 0x000},\r
3153 {d68020_cmpi_pcix_8 , 0xffff, 0x0c3b, 0x000},\r
3154 {d68000_cmpi_16 , 0xffc0, 0x0c40, 0xbf8},\r
3155 {d68020_cmpi_pcdi_16 , 0xffff, 0x0c7a, 0x000},\r
3156 {d68020_cmpi_pcix_16 , 0xffff, 0x0c7b, 0x000},\r
3157 {d68000_cmpi_32 , 0xffc0, 0x0c80, 0xbf8},\r
3158 {d68020_cmpi_pcdi_32 , 0xffff, 0x0cba, 0x000},\r
3159 {d68020_cmpi_pcix_32 , 0xffff, 0x0cbb, 0x000},\r
3160 {d68000_cmpm_8 , 0xf1f8, 0xb108, 0x000},\r
3161 {d68000_cmpm_16 , 0xf1f8, 0xb148, 0x000},\r
3162 {d68000_cmpm_32 , 0xf1f8, 0xb188, 0x000},\r
3163 {d68020_cpbcc_16 , 0xf1c0, 0xf080, 0x000},\r
3164 {d68020_cpbcc_32 , 0xf1c0, 0xf0c0, 0x000},\r
3165 {d68020_cpdbcc , 0xf1f8, 0xf048, 0x000},\r
3166 {d68020_cpgen , 0xf1c0, 0xf000, 0x000},\r
3167 {d68020_cprestore , 0xf1c0, 0xf140, 0x37f},\r
3168 {d68020_cpsave , 0xf1c0, 0xf100, 0x2f8},\r
3169 {d68020_cpscc , 0xf1c0, 0xf040, 0xbf8},\r
3170 {d68020_cptrapcc_0 , 0xf1ff, 0xf07c, 0x000},\r
3171 {d68020_cptrapcc_16 , 0xf1ff, 0xf07a, 0x000},\r
3172 {d68020_cptrapcc_32 , 0xf1ff, 0xf07b, 0x000},\r
3173 {d68040_cpush , 0xff20, 0xf420, 0x000},\r
3174 {d68000_dbcc , 0xf0f8, 0x50c8, 0x000},\r
3175 {d68000_dbra , 0xfff8, 0x51c8, 0x000},\r
3176 {d68000_divs , 0xf1c0, 0x81c0, 0xbff},\r
3177 {d68000_divu , 0xf1c0, 0x80c0, 0xbff},\r
3178 {d68020_divl , 0xffc0, 0x4c40, 0xbff},\r
3179 {d68000_eor_8 , 0xf1c0, 0xb100, 0xbf8},\r
3180 {d68000_eor_16 , 0xf1c0, 0xb140, 0xbf8},\r
3181 {d68000_eor_32 , 0xf1c0, 0xb180, 0xbf8},\r
3182 {d68000_eori_to_ccr , 0xffff, 0x0a3c, 0x000},\r
3183 {d68000_eori_to_sr , 0xffff, 0x0a7c, 0x000},\r
3184 {d68000_eori_8 , 0xffc0, 0x0a00, 0xbf8},\r
3185 {d68000_eori_16 , 0xffc0, 0x0a40, 0xbf8},\r
3186 {d68000_eori_32 , 0xffc0, 0x0a80, 0xbf8},\r
3187 {d68000_exg_dd , 0xf1f8, 0xc140, 0x000},\r
3188 {d68000_exg_aa , 0xf1f8, 0xc148, 0x000},\r
3189 {d68000_exg_da , 0xf1f8, 0xc188, 0x000},\r
3190 {d68020_extb_32 , 0xfff8, 0x49c0, 0x000},\r
3191 {d68000_ext_16 , 0xfff8, 0x4880, 0x000},\r
3192 {d68000_ext_32 , 0xfff8, 0x48c0, 0x000},\r
3193 {d68040_fpu , 0xffc0, 0xf200, 0x000},\r
3194 {d68000_illegal , 0xffff, 0x4afc, 0x000},\r
3195 {d68000_jmp , 0xffc0, 0x4ec0, 0x27b},\r
3196 {d68000_jsr , 0xffc0, 0x4e80, 0x27b},\r
3197 {d68000_lea , 0xf1c0, 0x41c0, 0x27b},\r
3198 {d68000_link_16 , 0xfff8, 0x4e50, 0x000},\r
3199 {d68020_link_32 , 0xfff8, 0x4808, 0x000},\r
3200 {d68000_lsr_s_8 , 0xf1f8, 0xe008, 0x000},\r
3201 {d68000_lsr_s_16 , 0xf1f8, 0xe048, 0x000},\r
3202 {d68000_lsr_s_32 , 0xf1f8, 0xe088, 0x000},\r
3203 {d68000_lsr_r_8 , 0xf1f8, 0xe028, 0x000},\r
3204 {d68000_lsr_r_16 , 0xf1f8, 0xe068, 0x000},\r
3205 {d68000_lsr_r_32 , 0xf1f8, 0xe0a8, 0x000},\r
3206 {d68000_lsr_ea , 0xffc0, 0xe2c0, 0x3f8},\r
3207 {d68000_lsl_s_8 , 0xf1f8, 0xe108, 0x000},\r
3208 {d68000_lsl_s_16 , 0xf1f8, 0xe148, 0x000},\r
3209 {d68000_lsl_s_32 , 0xf1f8, 0xe188, 0x000},\r
3210 {d68000_lsl_r_8 , 0xf1f8, 0xe128, 0x000},\r
3211 {d68000_lsl_r_16 , 0xf1f8, 0xe168, 0x000},\r
3212 {d68000_lsl_r_32 , 0xf1f8, 0xe1a8, 0x000},\r
3213 {d68000_lsl_ea , 0xffc0, 0xe3c0, 0x3f8},\r
3214 {d68000_move_8 , 0xf000, 0x1000, 0xbff},\r
3215 {d68000_move_16 , 0xf000, 0x3000, 0xfff},\r
3216 {d68000_move_32 , 0xf000, 0x2000, 0xfff},\r
3217 {d68000_movea_16 , 0xf1c0, 0x3040, 0xfff},\r
3218 {d68000_movea_32 , 0xf1c0, 0x2040, 0xfff},\r
3219 {d68000_move_to_ccr , 0xffc0, 0x44c0, 0xbff},\r
3220 {d68010_move_fr_ccr , 0xffc0, 0x42c0, 0xbf8},\r
3221 {d68000_move_to_sr , 0xffc0, 0x46c0, 0xbff},\r
3222 {d68000_move_fr_sr , 0xffc0, 0x40c0, 0xbf8},\r
3223 {d68000_move_to_usp , 0xfff8, 0x4e60, 0x000},\r
3224 {d68000_move_fr_usp , 0xfff8, 0x4e68, 0x000},\r
3225 {d68010_movec , 0xfffe, 0x4e7a, 0x000},\r
3226 {d68000_movem_pd_16 , 0xfff8, 0x48a0, 0x000},\r
3227 {d68000_movem_pd_32 , 0xfff8, 0x48e0, 0x000},\r
3228 {d68000_movem_re_16 , 0xffc0, 0x4880, 0x2f8},\r
3229 {d68000_movem_re_32 , 0xffc0, 0x48c0, 0x2f8},\r
3230 {d68000_movem_er_16 , 0xffc0, 0x4c80, 0x37b},\r
3231 {d68000_movem_er_32 , 0xffc0, 0x4cc0, 0x37b},\r
3232 {d68000_movep_er_16 , 0xf1f8, 0x0108, 0x000},\r
3233 {d68000_movep_er_32 , 0xf1f8, 0x0148, 0x000},\r
3234 {d68000_movep_re_16 , 0xf1f8, 0x0188, 0x000},\r
3235 {d68000_movep_re_32 , 0xf1f8, 0x01c8, 0x000},\r
3236 {d68010_moves_8 , 0xffc0, 0x0e00, 0x3f8},\r
3237 {d68010_moves_16 , 0xffc0, 0x0e40, 0x3f8},\r
3238 {d68010_moves_32 , 0xffc0, 0x0e80, 0x3f8},\r
3239 {d68000_moveq , 0xf100, 0x7000, 0x000},\r
3240 {d68040_move16_pi_pi , 0xfff8, 0xf620, 0x000},\r
3241 {d68040_move16_pi_al , 0xfff8, 0xf600, 0x000},\r
3242 {d68040_move16_al_pi , 0xfff8, 0xf608, 0x000},\r
3243 {d68040_move16_ai_al , 0xfff8, 0xf610, 0x000},\r
3244 {d68040_move16_al_ai , 0xfff8, 0xf618, 0x000},\r
3245 {d68000_muls , 0xf1c0, 0xc1c0, 0xbff},\r
3246 {d68000_mulu , 0xf1c0, 0xc0c0, 0xbff},\r
3247 {d68020_mull , 0xffc0, 0x4c00, 0xbff},\r
3248 {d68000_nbcd , 0xffc0, 0x4800, 0xbf8},\r
3249 {d68000_neg_8 , 0xffc0, 0x4400, 0xbf8},\r
3250 {d68000_neg_16 , 0xffc0, 0x4440, 0xbf8},\r
3251 {d68000_neg_32 , 0xffc0, 0x4480, 0xbf8},\r
3252 {d68000_negx_8 , 0xffc0, 0x4000, 0xbf8},\r
3253 {d68000_negx_16 , 0xffc0, 0x4040, 0xbf8},\r
3254 {d68000_negx_32 , 0xffc0, 0x4080, 0xbf8},\r
3255 {d68000_nop , 0xffff, 0x4e71, 0x000},\r
3256 {d68000_not_8 , 0xffc0, 0x4600, 0xbf8},\r
3257 {d68000_not_16 , 0xffc0, 0x4640, 0xbf8},\r
3258 {d68000_not_32 , 0xffc0, 0x4680, 0xbf8},\r
3259 {d68000_or_er_8 , 0xf1c0, 0x8000, 0xbff},\r
3260 {d68000_or_er_16 , 0xf1c0, 0x8040, 0xbff},\r
3261 {d68000_or_er_32 , 0xf1c0, 0x8080, 0xbff},\r
3262 {d68000_or_re_8 , 0xf1c0, 0x8100, 0x3f8},\r
3263 {d68000_or_re_16 , 0xf1c0, 0x8140, 0x3f8},\r
3264 {d68000_or_re_32 , 0xf1c0, 0x8180, 0x3f8},\r
3265 {d68000_ori_to_ccr , 0xffff, 0x003c, 0x000},\r
3266 {d68000_ori_to_sr , 0xffff, 0x007c, 0x000},\r
3267 {d68000_ori_8 , 0xffc0, 0x0000, 0xbf8},\r
3268 {d68000_ori_16 , 0xffc0, 0x0040, 0xbf8},\r
3269 {d68000_ori_32 , 0xffc0, 0x0080, 0xbf8},\r
3270 {d68020_pack_rr , 0xf1f8, 0x8140, 0x000},\r
3271 {d68020_pack_mm , 0xf1f8, 0x8148, 0x000},\r
3272 {d68000_pea , 0xffc0, 0x4840, 0x27b},\r
3273 {d68040_pflush , 0xffe0, 0xf500, 0x000},\r
3274 {d68000_reset , 0xffff, 0x4e70, 0x000},\r
3275 {d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000},\r
3276 {d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000},\r
3277 {d68000_ror_s_32 , 0xf1f8, 0xe098, 0x000},\r
3278 {d68000_ror_r_8 , 0xf1f8, 0xe038, 0x000},\r
3279 {d68000_ror_r_16 , 0xf1f8, 0xe078, 0x000},\r
3280 {d68000_ror_r_32 , 0xf1f8, 0xe0b8, 0x000},\r
3281 {d68000_ror_ea , 0xffc0, 0xe6c0, 0x3f8},\r
3282 {d68000_rol_s_8 , 0xf1f8, 0xe118, 0x000},\r
3283 {d68000_rol_s_16 , 0xf1f8, 0xe158, 0x000},\r
3284 {d68000_rol_s_32 , 0xf1f8, 0xe198, 0x000},\r
3285 {d68000_rol_r_8 , 0xf1f8, 0xe138, 0x000},\r
3286 {d68000_rol_r_16 , 0xf1f8, 0xe178, 0x000},\r
3287 {d68000_rol_r_32 , 0xf1f8, 0xe1b8, 0x000},\r
3288 {d68000_rol_ea , 0xffc0, 0xe7c0, 0x3f8},\r
3289 {d68000_roxr_s_8 , 0xf1f8, 0xe010, 0x000},\r
3290 {d68000_roxr_s_16 , 0xf1f8, 0xe050, 0x000},\r
3291 {d68000_roxr_s_32 , 0xf1f8, 0xe090, 0x000},\r
3292 {d68000_roxr_r_8 , 0xf1f8, 0xe030, 0x000},\r
3293 {d68000_roxr_r_16 , 0xf1f8, 0xe070, 0x000},\r
3294 {d68000_roxr_r_32 , 0xf1f8, 0xe0b0, 0x000},\r
3295 {d68000_roxr_ea , 0xffc0, 0xe4c0, 0x3f8},\r
3296 {d68000_roxl_s_8 , 0xf1f8, 0xe110, 0x000},\r
3297 {d68000_roxl_s_16 , 0xf1f8, 0xe150, 0x000},\r
3298 {d68000_roxl_s_32 , 0xf1f8, 0xe190, 0x000},\r
3299 {d68000_roxl_r_8 , 0xf1f8, 0xe130, 0x000},\r
3300 {d68000_roxl_r_16 , 0xf1f8, 0xe170, 0x000},\r
3301 {d68000_roxl_r_32 , 0xf1f8, 0xe1b0, 0x000},\r
3302 {d68000_roxl_ea , 0xffc0, 0xe5c0, 0x3f8},\r
3303 {d68010_rtd , 0xffff, 0x4e74, 0x000},\r
3304 {d68000_rte , 0xffff, 0x4e73, 0x000},\r
3305 {d68020_rtm , 0xfff0, 0x06c0, 0x000},\r
3306 {d68000_rtr , 0xffff, 0x4e77, 0x000},\r
3307 {d68000_rts , 0xffff, 0x4e75, 0x000},\r
3308 {d68000_sbcd_rr , 0xf1f8, 0x8100, 0x000},\r
3309 {d68000_sbcd_mm , 0xf1f8, 0x8108, 0x000},\r
3310 {d68000_scc , 0xf0c0, 0x50c0, 0xbf8},\r
3311 {d68000_stop , 0xffff, 0x4e72, 0x000},\r
3312 {d68000_sub_er_8 , 0xf1c0, 0x9000, 0xbff},\r
3313 {d68000_sub_er_16 , 0xf1c0, 0x9040, 0xfff},\r
3314 {d68000_sub_er_32 , 0xf1c0, 0x9080, 0xfff},\r
3315 {d68000_sub_re_8 , 0xf1c0, 0x9100, 0x3f8},\r
3316 {d68000_sub_re_16 , 0xf1c0, 0x9140, 0x3f8},\r
3317 {d68000_sub_re_32 , 0xf1c0, 0x9180, 0x3f8},\r
3318 {d68000_suba_16 , 0xf1c0, 0x90c0, 0xfff},\r
3319 {d68000_suba_32 , 0xf1c0, 0x91c0, 0xfff},\r
3320 {d68000_subi_8 , 0xffc0, 0x0400, 0xbf8},\r
3321 {d68000_subi_16 , 0xffc0, 0x0440, 0xbf8},\r
3322 {d68000_subi_32 , 0xffc0, 0x0480, 0xbf8},\r
3323 {d68000_subq_8 , 0xf1c0, 0x5100, 0xbf8},\r
3324 {d68000_subq_16 , 0xf1c0, 0x5140, 0xff8},\r
3325 {d68000_subq_32 , 0xf1c0, 0x5180, 0xff8},\r
3326 {d68000_subx_rr_8 , 0xf1f8, 0x9100, 0x000},\r
3327 {d68000_subx_rr_16 , 0xf1f8, 0x9140, 0x000},\r
3328 {d68000_subx_rr_32 , 0xf1f8, 0x9180, 0x000},\r
3329 {d68000_subx_mm_8 , 0xf1f8, 0x9108, 0x000},\r
3330 {d68000_subx_mm_16 , 0xf1f8, 0x9148, 0x000},\r
3331 {d68000_subx_mm_32 , 0xf1f8, 0x9188, 0x000},\r
3332 {d68000_swap , 0xfff8, 0x4840, 0x000},\r
3333 {d68000_tas , 0xffc0, 0x4ac0, 0xbf8},\r
3334 {d68000_trap , 0xfff0, 0x4e40, 0x000},\r
3335 {d68020_trapcc_0 , 0xf0ff, 0x50fc, 0x000},\r
3336 {d68020_trapcc_16 , 0xf0ff, 0x50fa, 0x000},\r
3337 {d68020_trapcc_32 , 0xf0ff, 0x50fb, 0x000},\r
3338 {d68000_trapv , 0xffff, 0x4e76, 0x000},\r
3339 {d68000_tst_8 , 0xffc0, 0x4a00, 0xbf8},\r
3340 {d68020_tst_pcdi_8 , 0xffff, 0x4a3a, 0x000},\r
3341 {d68020_tst_pcix_8 , 0xffff, 0x4a3b, 0x000},\r
3342 {d68020_tst_i_8 , 0xffff, 0x4a3c, 0x000},\r
3343 {d68000_tst_16 , 0xffc0, 0x4a40, 0xbf8},\r
3344 {d68020_tst_a_16 , 0xfff8, 0x4a48, 0x000},\r
3345 {d68020_tst_pcdi_16 , 0xffff, 0x4a7a, 0x000},\r
3346 {d68020_tst_pcix_16 , 0xffff, 0x4a7b, 0x000},\r
3347 {d68020_tst_i_16 , 0xffff, 0x4a7c, 0x000},\r
3348 {d68000_tst_32 , 0xffc0, 0x4a80, 0xbf8},\r
3349 {d68020_tst_a_32 , 0xfff8, 0x4a88, 0x000},\r
3350 {d68020_tst_pcdi_32 , 0xffff, 0x4aba, 0x000},\r
3351 {d68020_tst_pcix_32 , 0xffff, 0x4abb, 0x000},\r
3352 {d68020_tst_i_32 , 0xffff, 0x4abc, 0x000},\r
3353 {d68000_unlk , 0xfff8, 0x4e58, 0x000},\r
3354 {d68020_unpk_rr , 0xf1f8, 0x8180, 0x000},\r
3355 {d68020_unpk_mm , 0xf1f8, 0x8188, 0x000},\r
3356 {0, 0, 0, 0}\r
3357};\r
3358\r
3359/* Check if opcode is using a valid ea mode */\r
3360static int valid_ea(uint opcode, uint mask)\r
3361{\r
3362 if(mask == 0)\r
3363 return 1;\r
3364\r
3365 switch(opcode & 0x3f)\r
3366 {\r
3367 case 0x00: case 0x01: case 0x02: case 0x03:\r
3368 case 0x04: case 0x05: case 0x06: case 0x07:\r
3369 return (mask & 0x800) != 0;\r
3370 case 0x08: case 0x09: case 0x0a: case 0x0b:\r
3371 case 0x0c: case 0x0d: case 0x0e: case 0x0f:\r
3372 return (mask & 0x400) != 0;\r
3373 case 0x10: case 0x11: case 0x12: case 0x13:\r
3374 case 0x14: case 0x15: case 0x16: case 0x17:\r
3375 return (mask & 0x200) != 0;\r
3376 case 0x18: case 0x19: case 0x1a: case 0x1b:\r
3377 case 0x1c: case 0x1d: case 0x1e: case 0x1f:\r
3378 return (mask & 0x100) != 0;\r
3379 case 0x20: case 0x21: case 0x22: case 0x23:\r
3380 case 0x24: case 0x25: case 0x26: case 0x27:\r
3381 return (mask & 0x080) != 0;\r
3382 case 0x28: case 0x29: case 0x2a: case 0x2b:\r
3383 case 0x2c: case 0x2d: case 0x2e: case 0x2f:\r
3384 return (mask & 0x040) != 0;\r
3385 case 0x30: case 0x31: case 0x32: case 0x33:\r
3386 case 0x34: case 0x35: case 0x36: case 0x37:\r
3387 return (mask & 0x020) != 0;\r
3388 case 0x38:\r
3389 return (mask & 0x010) != 0;\r
3390 case 0x39:\r
3391 return (mask & 0x008) != 0;\r
3392 case 0x3a:\r
3393 return (mask & 0x002) != 0;\r
3394 case 0x3b:\r
3395 return (mask & 0x001) != 0;\r
3396 case 0x3c:\r
3397 return (mask & 0x004) != 0;\r
3398 }\r
3399 return 0;\r
3400\r
3401}\r
3402\r
3403/* Used by qsort */\r
3404static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr)\r
3405{\r
3406 uint a = ((const opcode_struct*)aptr)->mask;\r
3407 uint b = ((const opcode_struct*)bptr)->mask;\r
3408\r
3409 a = ((a & 0xAAAA) >> 1) + (a & 0x5555);\r
3410 a = ((a & 0xCCCC) >> 2) + (a & 0x3333);\r
3411 a = ((a & 0xF0F0) >> 4) + (a & 0x0F0F);\r
3412 a = ((a & 0xFF00) >> 8) + (a & 0x00FF);\r
3413\r
3414 b = ((b & 0xAAAA) >> 1) + (b & 0x5555);\r
3415 b = ((b & 0xCCCC) >> 2) + (b & 0x3333);\r
3416 b = ((b & 0xF0F0) >> 4) + (b & 0x0F0F);\r
3417 b = ((b & 0xFF00) >> 8) + (b & 0x00FF);\r
3418\r
3419 return b - a; /* reversed to get greatest to least sorting */\r
3420}\r
3421\r
3422/* build the opcode handler jump table */\r
3423static void build_opcode_table(void)\r
3424{\r
3425 uint i;\r
3426 uint opcode;\r
3427 opcode_struct* ostruct;\r
3428 uint opcode_info_length = 0;\r
3429\r
3430 for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)\r
3431 opcode_info_length++;\r
3432\r
3433 qsort((void *)g_opcode_info, opcode_info_length, sizeof(g_opcode_info[0]), compare_nof_true_bits);\r
3434\r
3435 for(i=0;i<0x10000;i++)\r
3436 {\r
3437 g_instruction_table[i] = d68000_illegal; /* default to illegal */\r
3438 opcode = i;\r
3439 /* search through opcode info for a match */\r
3440 for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)\r
3441 {\r
3442 /* match opcode mask and allowed ea modes */\r
3443 if((opcode & ostruct->mask) == ostruct->match)\r
3444 {\r
3445 /* Handle destination ea for move instructions */\r
3446 if((ostruct->opcode_handler == d68000_move_8 ||\r
3447 ostruct->opcode_handler == d68000_move_16 ||\r
3448 ostruct->opcode_handler == d68000_move_32) &&\r
3449 !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8))\r
3450 continue;\r
3451 if(valid_ea(opcode, ostruct->ea_mask))\r
3452 {\r
3453 g_instruction_table[i] = ostruct->opcode_handler;\r
3454 break;\r
3455 }\r
3456 }\r
3457 }\r
3458 }\r
3459}\r
3460\r
3461\r
3462\r
3463/* ======================================================================== */\r
3464/* ================================= API ================================== */\r
3465/* ======================================================================== */\r
3466\r
3467/* Disasemble one instruction at pc and store in str_buff */\r
3468unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type)\r
3469{\r
3470 if(!g_initialized)\r
3471 {\r
3472 build_opcode_table();\r
3473 g_initialized = 1;\r
3474 }\r
3475 switch(cpu_type)\r
3476 {\r
3477 case M68K_CPU_TYPE_68000:\r
3478 g_cpu_type = TYPE_68000;\r
3479 g_address_mask = 0x00ffffff;\r
3480 break;\r
3481 case M68K_CPU_TYPE_68008:\r
3482 g_cpu_type = TYPE_68008;\r
3483 g_address_mask = 0x003fffff;\r
3484 break;\r
3485 case M68K_CPU_TYPE_68010:\r
3486 g_cpu_type = TYPE_68010;\r
3487 g_address_mask = 0x00ffffff;\r
3488 break;\r
3489 case M68K_CPU_TYPE_68EC020:\r
3490 g_cpu_type = TYPE_68020;\r
3491 g_address_mask = 0x00ffffff;\r
3492 break;\r
3493 case M68K_CPU_TYPE_68020:\r
3494 g_cpu_type = TYPE_68020;\r
3495 g_address_mask = 0xffffffff;\r
3496 break;\r
3497 case M68K_CPU_TYPE_68030:\r
3498 g_cpu_type = TYPE_68030;\r
3499 g_address_mask = 0xffffffff;\r
3500 break;\r
3501 case M68K_CPU_TYPE_68040:\r
3502 g_cpu_type = TYPE_68040;\r
3503 g_address_mask = 0xffffffff;\r
3504 break;\r
3505 default:\r
3506 return 0;\r
3507 }\r
3508\r
3509 g_cpu_pc = pc;\r
3510 g_helper_str[0] = 0;\r
3511 g_cpu_ir = read_imm_16();\r
3512 g_opcode_type = 0;\r
3513 g_instruction_table[g_cpu_ir]();\r
3514 sprintf(str_buff, "%s%s", g_dasm_str, g_helper_str);\r
3515 return COMBINE_OPCODE_FLAGS(g_cpu_pc - pc);\r
3516}\r
3517\r
3518char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type)\r
3519{\r
3520 static char buff[100];\r
3521 buff[0] = 0;\r
3522 m68k_disassemble(buff, pc, cpu_type);\r
3523 return buff;\r
3524}\r
3525\r
3526unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigned char* opdata, const unsigned char* argdata, unsigned int cpu_type)\r
3527{\r
3528 unsigned int result;\r
3529\r
3530 g_rawop = opdata;\r
3531 g_rawbasepc = pc;\r
3532 result = m68k_disassemble(str_buff, pc, cpu_type);\r
3533 g_rawop = NULL;\r
3534 return result;\r
3535}\r
3536\r
3537/* Check if the instruction is a valid one */\r
3538unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type)\r
3539{\r
3540 if(!g_initialized)\r
3541 {\r
3542 build_opcode_table();\r
3543 g_initialized = 1;\r
3544 }\r
3545\r
3546 instruction &= 0xffff;\r
3547 if(g_instruction_table[instruction] == d68000_illegal)\r
3548 return 0;\r
3549\r
3550 switch(cpu_type)\r
3551 {\r
3552 case M68K_CPU_TYPE_68000:\r
3553 case M68K_CPU_TYPE_68008:\r
3554 if(g_instruction_table[instruction] == d68010_bkpt)\r
3555 return 0;\r
3556 if(g_instruction_table[instruction] == d68010_move_fr_ccr)\r
3557 return 0;\r
3558 if(g_instruction_table[instruction] == d68010_movec)\r
3559 return 0;\r
3560 if(g_instruction_table[instruction] == d68010_moves_8)\r
3561 return 0;\r
3562 if(g_instruction_table[instruction] == d68010_moves_16)\r
3563 return 0;\r
3564 if(g_instruction_table[instruction] == d68010_moves_32)\r
3565 return 0;\r
3566 if(g_instruction_table[instruction] == d68010_rtd)\r
3567 return 0;\r
3568 case M68K_CPU_TYPE_68010:\r
3569 if(g_instruction_table[instruction] == d68020_bcc_32)\r
3570 return 0;\r
3571 if(g_instruction_table[instruction] == d68020_bfchg)\r
3572 return 0;\r
3573 if(g_instruction_table[instruction] == d68020_bfclr)\r
3574 return 0;\r
3575 if(g_instruction_table[instruction] == d68020_bfexts)\r
3576 return 0;\r
3577 if(g_instruction_table[instruction] == d68020_bfextu)\r
3578 return 0;\r
3579 if(g_instruction_table[instruction] == d68020_bfffo)\r
3580 return 0;\r
3581 if(g_instruction_table[instruction] == d68020_bfins)\r
3582 return 0;\r
3583 if(g_instruction_table[instruction] == d68020_bfset)\r
3584 return 0;\r
3585 if(g_instruction_table[instruction] == d68020_bftst)\r
3586 return 0;\r
3587 if(g_instruction_table[instruction] == d68020_bra_32)\r
3588 return 0;\r
3589 if(g_instruction_table[instruction] == d68020_bsr_32)\r
3590 return 0;\r
3591 if(g_instruction_table[instruction] == d68020_callm)\r
3592 return 0;\r
3593 if(g_instruction_table[instruction] == d68020_cas_8)\r
3594 return 0;\r
3595 if(g_instruction_table[instruction] == d68020_cas_16)\r
3596 return 0;\r
3597 if(g_instruction_table[instruction] == d68020_cas_32)\r
3598 return 0;\r
3599 if(g_instruction_table[instruction] == d68020_cas2_16)\r
3600 return 0;\r
3601 if(g_instruction_table[instruction] == d68020_cas2_32)\r
3602 return 0;\r
3603 if(g_instruction_table[instruction] == d68020_chk_32)\r
3604 return 0;\r
3605 if(g_instruction_table[instruction] == d68020_chk2_cmp2_8)\r
3606 return 0;\r
3607 if(g_instruction_table[instruction] == d68020_chk2_cmp2_16)\r
3608 return 0;\r
3609 if(g_instruction_table[instruction] == d68020_chk2_cmp2_32)\r
3610 return 0;\r
3611 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_8)\r
3612 return 0;\r
3613 if(g_instruction_table[instruction] == d68020_cmpi_pcix_8)\r
3614 return 0;\r
3615 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_16)\r
3616 return 0;\r
3617 if(g_instruction_table[instruction] == d68020_cmpi_pcix_16)\r
3618 return 0;\r
3619 if(g_instruction_table[instruction] == d68020_cmpi_pcdi_32)\r
3620 return 0;\r
3621 if(g_instruction_table[instruction] == d68020_cmpi_pcix_32)\r
3622 return 0;\r
3623 if(g_instruction_table[instruction] == d68020_cpbcc_16)\r
3624 return 0;\r
3625 if(g_instruction_table[instruction] == d68020_cpbcc_32)\r
3626 return 0;\r
3627 if(g_instruction_table[instruction] == d68020_cpdbcc)\r
3628 return 0;\r
3629 if(g_instruction_table[instruction] == d68020_cpgen)\r
3630 return 0;\r
3631 if(g_instruction_table[instruction] == d68020_cprestore)\r
3632 return 0;\r
3633 if(g_instruction_table[instruction] == d68020_cpsave)\r
3634 return 0;\r
3635 if(g_instruction_table[instruction] == d68020_cpscc)\r
3636 return 0;\r
3637 if(g_instruction_table[instruction] == d68020_cptrapcc_0)\r
3638 return 0;\r
3639 if(g_instruction_table[instruction] == d68020_cptrapcc_16)\r
3640 return 0;\r
3641 if(g_instruction_table[instruction] == d68020_cptrapcc_32)\r
3642 return 0;\r
3643 if(g_instruction_table[instruction] == d68020_divl)\r
3644 return 0;\r
3645 if(g_instruction_table[instruction] == d68020_extb_32)\r
3646 return 0;\r
3647 if(g_instruction_table[instruction] == d68020_link_32)\r
3648 return 0;\r
3649 if(g_instruction_table[instruction] == d68020_mull)\r
3650 return 0;\r
3651 if(g_instruction_table[instruction] == d68020_pack_rr)\r
3652 return 0;\r
3653 if(g_instruction_table[instruction] == d68020_pack_mm)\r
3654 return 0;\r
3655 if(g_instruction_table[instruction] == d68020_rtm)\r
3656 return 0;\r
3657 if(g_instruction_table[instruction] == d68020_trapcc_0)\r
3658 return 0;\r
3659 if(g_instruction_table[instruction] == d68020_trapcc_16)\r
3660 return 0;\r
3661 if(g_instruction_table[instruction] == d68020_trapcc_32)\r
3662 return 0;\r
3663 if(g_instruction_table[instruction] == d68020_tst_pcdi_8)\r
3664 return 0;\r
3665 if(g_instruction_table[instruction] == d68020_tst_pcix_8)\r
3666 return 0;\r
3667 if(g_instruction_table[instruction] == d68020_tst_i_8)\r
3668 return 0;\r
3669 if(g_instruction_table[instruction] == d68020_tst_a_16)\r
3670 return 0;\r
3671 if(g_instruction_table[instruction] == d68020_tst_pcdi_16)\r
3672 return 0;\r
3673 if(g_instruction_table[instruction] == d68020_tst_pcix_16)\r
3674 return 0;\r
3675 if(g_instruction_table[instruction] == d68020_tst_i_16)\r
3676 return 0;\r
3677 if(g_instruction_table[instruction] == d68020_tst_a_32)\r
3678 return 0;\r
3679 if(g_instruction_table[instruction] == d68020_tst_pcdi_32)\r
3680 return 0;\r
3681 if(g_instruction_table[instruction] == d68020_tst_pcix_32)\r
3682 return 0;\r
3683 if(g_instruction_table[instruction] == d68020_tst_i_32)\r
3684 return 0;\r
3685 if(g_instruction_table[instruction] == d68020_unpk_rr)\r
3686 return 0;\r
3687 if(g_instruction_table[instruction] == d68020_unpk_mm)\r
3688 return 0;\r
3689 case M68K_CPU_TYPE_68EC020:\r
3690 case M68K_CPU_TYPE_68020:\r
3691 case M68K_CPU_TYPE_68030:\r
3692 if(g_instruction_table[instruction] == d68040_cinv)\r
3693 return 0;\r
3694 if(g_instruction_table[instruction] == d68040_cpush)\r
3695 return 0;\r
3696 if(g_instruction_table[instruction] == d68040_move16_pi_pi)\r
3697 return 0;\r
3698 if(g_instruction_table[instruction] == d68040_move16_pi_al)\r
3699 return 0;\r
3700 if(g_instruction_table[instruction] == d68040_move16_al_pi)\r
3701 return 0;\r
3702 if(g_instruction_table[instruction] == d68040_move16_ai_al)\r
3703 return 0;\r
3704 if(g_instruction_table[instruction] == d68040_move16_al_ai)\r
3705 return 0;\r
3706 if(g_instruction_table[instruction] == d68040_pflush)\r
3707 return 0;\r
3708 case M68K_CPU_TYPE_68040:\r
3709 if(g_instruction_table[instruction] == d68020_cpbcc_16)\r
3710 return 0;\r
3711 if(g_instruction_table[instruction] == d68020_cpbcc_32)\r
3712 return 0;\r
3713 if(g_instruction_table[instruction] == d68020_cpdbcc)\r
3714 return 0;\r
3715 if(g_instruction_table[instruction] == d68020_cpgen)\r
3716 return 0;\r
3717 if(g_instruction_table[instruction] == d68020_cprestore)\r
3718 return 0;\r
3719 if(g_instruction_table[instruction] == d68020_cpsave)\r
3720 return 0;\r
3721 if(g_instruction_table[instruction] == d68020_cpscc)\r
3722 return 0;\r
3723 if(g_instruction_table[instruction] == d68020_cptrapcc_0)\r
3724 return 0;\r
3725 if(g_instruction_table[instruction] == d68020_cptrapcc_16)\r
3726 return 0;\r
3727 if(g_instruction_table[instruction] == d68020_cptrapcc_32)\r
3728 return 0;\r
3729 }\r
3730 if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&\r
3731 (g_instruction_table[instruction] == d68020_callm ||\r
3732 g_instruction_table[instruction] == d68020_rtm))\r
3733 return 0;\r
3734\r
3735 return 1;\r
3736}\r
3737\r
3738\r
3739\r
3740/* ======================================================================== */\r
3741/* ============================== END OF FILE ============================= */\r
3742/* ======================================================================== */\r
fast MegaDrive/MegaCD/32X emulator