| | 1 | #include "../pico_int.h" |
| | 2 | #include "../memory.h" |
| | 3 | |
| | 4 | #if 0 |
| | 5 | #undef ash2_end_run |
| | 6 | #undef SekEndRun |
| | 7 | #define ash2_end_run(x) |
| | 8 | #define SekEndRun(x) |
| | 9 | #endif |
| | 10 | |
| | 11 | static const char str_mars[] = "MARS"; |
| | 12 | |
| | 13 | struct Pico32xMem *Pico32xMem; |
| | 14 | |
| | 15 | static void bank_switch(int b); |
| | 16 | |
| | 17 | // poll detection |
| | 18 | #define POLL_THRESHOLD 6 |
| | 19 | |
| | 20 | struct poll_det { |
| | 21 | u32 addr, cycles, cyc_max; |
| | 22 | int cnt, flag; |
| | 23 | }; |
| | 24 | static struct poll_det m68k_poll, sh2_poll[2]; |
| | 25 | |
| | 26 | static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 cycles, int is_vdp) |
| | 27 | { |
| | 28 | int ret = 0, flag = pd->flag; |
| | 29 | |
| | 30 | if (is_vdp) |
| | 31 | flag <<= 3; |
| | 32 | |
| | 33 | if (a - 2 <= pd->addr && pd->addr <= a + 2 && cycles - pd->cycles <= pd->cyc_max) { |
| | 34 | pd->cnt++; |
| | 35 | if (pd->cnt > POLL_THRESHOLD) { |
| | 36 | if (!(Pico32x.emu_flags & flag)) { |
| | 37 | elprintf(EL_32X, "%s poll addr %08x, cyc %u", |
| | 38 | flag & (P32XF_68KPOLL|P32XF_68KVPOLL) ? "m68k" : |
| | 39 | (flag & (P32XF_MSH2POLL|P32XF_MSH2VPOLL) ? "msh2" : "ssh2"), a, cycles - pd->cycles); |
| | 40 | ret = 1; |
| | 41 | } |
| | 42 | Pico32x.emu_flags |= flag; |
| | 43 | } |
| | 44 | } |
| | 45 | else { |
| | 46 | pd->cnt = 0; |
| | 47 | pd->addr = a; |
| | 48 | } |
| | 49 | pd->cycles = cycles; |
| | 50 | |
| | 51 | return ret; |
| | 52 | } |
| | 53 | |
| | 54 | static int p32x_poll_undetect(struct poll_det *pd, int is_vdp) |
| | 55 | { |
| | 56 | int ret = 0, flag = pd->flag; |
| | 57 | if (is_vdp) |
| | 58 | flag <<= 3; // VDP only |
| | 59 | else |
| | 60 | flag |= flag << 3; // both |
| | 61 | if (Pico32x.emu_flags & flag) { |
| | 62 | elprintf(EL_32X, "poll %02x -> %02x", Pico32x.emu_flags, Pico32x.emu_flags & ~flag); |
| | 63 | ret = 1; |
| | 64 | } |
| | 65 | Pico32x.emu_flags &= ~flag; |
| | 66 | pd->addr = pd->cnt = 0; |
| | 67 | return ret; |
| | 68 | } |
| | 69 | |
| | 70 | void p32x_poll_event(int cpu_mask, int is_vdp) |
| | 71 | { |
| | 72 | if (cpu_mask & 1) |
| | 73 | p32x_poll_undetect(&sh2_poll[0], is_vdp); |
| | 74 | if (cpu_mask & 2) |
| | 75 | p32x_poll_undetect(&sh2_poll[1], is_vdp); |
| | 76 | } |
| | 77 | |
| | 78 | // SH2 faking |
| | 79 | //#define FAKE_SH2 |
| | 80 | int p32x_csum_faked; |
| | 81 | #ifdef FAKE_SH2 |
| | 82 | static const u16 comm_fakevals[] = { |
| | 83 | 0x4d5f, 0x4f4b, // M_OK |
| | 84 | 0x535f, 0x4f4b, // S_OK |
| | 85 | 0x4D41, 0x5346, // MASF - Brutal Unleashed |
| | 86 | 0x5331, 0x4d31, // Darxide |
| | 87 | 0x5332, 0x4d32, |
| | 88 | 0x5333, 0x4d33, |
| | 89 | 0x0000, 0x0000, // eq for doom |
| | 90 | 0x0002, // Mortal Kombat |
| | 91 | // 0, // pad |
| | 92 | }; |
| | 93 | |
| | 94 | static u32 sh2_comm_faker(u32 a) |
| | 95 | { |
| | 96 | static int f = 0; |
| | 97 | if (a == 0x28 && !p32x_csum_faked) { |
| | 98 | p32x_csum_faked = 1; |
| | 99 | return *(unsigned short *)(Pico.rom + 0x18e); |
| | 100 | } |
| | 101 | if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0])) |
| | 102 | f = 0; |
| | 103 | return comm_fakevals[f++]; |
| | 104 | } |
| | 105 | #endif |
| | 106 | |
| | 107 | // DMAC handling |
| | 108 | static struct { |
| | 109 | unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count |
| | 110 | unsigned int chcr0; // chan ctl |
| | 111 | unsigned int sar1, dar1, tcr1; // same for chan 1 |
| | 112 | unsigned int chcr1; |
| | 113 | int pad[4]; |
| | 114 | unsigned int dmaor; |
| | 115 | } * dmac0; |
| | 116 | |
| | 117 | static void dma_68k2sh2_do(void) |
| | 118 | { |
| | 119 | unsigned short *dreqlen = &Pico32x.regs[0x10 / 2]; |
| | 120 | int i; |
| | 121 | |
| | 122 | if (dmac0->tcr0 != *dreqlen) |
| | 123 | elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen); |
| | 124 | |
| | 125 | // HACK: assume bus is busy and SH2 is halted |
| | 126 | // XXX: use different mechanism for this, not poll det |
| | 127 | Pico32x.emu_flags |= P32XF_MSH2POLL; // id ? P32XF_SSH2POLL : P32XF_MSH2POLL; |
| | 128 | |
| | 129 | for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) { |
| | 130 | extern void p32x_sh2_write16(u32 a, u32 d, int id); |
| | 131 | elprintf(EL_32X, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen); |
| | 132 | p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0); |
| | 133 | dmac0->dar0 += 2; |
| | 134 | dmac0->tcr0--; |
| | 135 | (*dreqlen)--; |
| | 136 | } |
| | 137 | |
| | 138 | Pico32x.dmac_ptr = 0; // HACK |
| | 139 | Pico32x.regs[6 / 2] &= ~P32XS_FULL; |
| | 140 | if (*dreqlen == 0) |
| | 141 | Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete |
| | 142 | if (dmac0->tcr0 == 0) { |
| | 143 | dmac0->chcr0 |= 2; // DMA has ended normally |
| | 144 | p32x_poll_undetect(&sh2_poll[0], 0); |
| | 145 | } |
| | 146 | } |
| | 147 | |
| | 148 | // ------------------------------------------------------------------ |
| | 149 | // 68k regs |
| | 150 | |
| | 151 | static u32 p32x_reg_read16(u32 a) |
| | 152 | { |
| | 153 | a &= 0x3e; |
| | 154 | |
| | 155 | if (a == 2) // INTM, INTS |
| | 156 | return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3); |
| | 157 | #if 0 |
| | 158 | if ((a & 0x30) == 0x20) |
| | 159 | return sh2_comm_faker(a); |
| | 160 | #else |
| | 161 | if ((a & 0x30) == 0x20) { |
| | 162 | // evil X-Men proto polls in a dbra loop and expects it to expire.. |
| | 163 | static u32 dr2 = 0; |
| | 164 | if (SekDar(2) != dr2) |
| | 165 | m68k_poll.cnt = 0; |
| | 166 | dr2 = SekDar(2); |
| | 167 | |
| | 168 | if (p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) { |
| | 169 | SekSetStop(1); |
| | 170 | SekEndTimeslice(16); |
| | 171 | } |
| | 172 | dr2 = SekDar(2); |
| | 173 | } |
| | 174 | #endif |
| | 175 | |
| | 176 | if ((a & 0x30) == 0x30) |
| | 177 | return p32x_pwm_read16(a); |
| | 178 | |
| | 179 | return Pico32x.regs[a / 2]; |
| | 180 | } |
| | 181 | |
| | 182 | static void p32x_reg_write8(u32 a, u32 d) |
| | 183 | { |
| | 184 | u16 *r = Pico32x.regs; |
| | 185 | a &= 0x3f; |
| | 186 | |
| | 187 | // for things like bset on comm port |
| | 188 | m68k_poll.cnt = 0; |
| | 189 | |
| | 190 | if (a == 1 && !(r[0] & 1)) { |
| | 191 | r[0] |= 1; |
| | 192 | Pico32xStartup(); |
| | 193 | return; |
| | 194 | } |
| | 195 | |
| | 196 | if (!(r[0] & 1)) |
| | 197 | return; |
| | 198 | |
| | 199 | switch (a) { |
| | 200 | case 0: // adapter ctl |
| | 201 | r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM); |
| | 202 | return; |
| | 203 | case 3: // irq ctl |
| | 204 | if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) { |
| | 205 | Pico32x.sh2irqi[0] |= P32XI_CMD; |
| | 206 | p32x_update_irls(); |
| | 207 | SekEndRun(16); |
| | 208 | } |
| | 209 | if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) { |
| | 210 | Pico32x.sh2irqi[1] |= P32XI_CMD; |
| | 211 | p32x_update_irls(); |
| | 212 | SekEndRun(16); |
| | 213 | } |
| | 214 | return; |
| | 215 | case 5: // bank |
| | 216 | d &= 7; |
| | 217 | if (r[4 / 2] != d) { |
| | 218 | r[4 / 2] = d; |
| | 219 | bank_switch(d); |
| | 220 | } |
| | 221 | return; |
| | 222 | case 7: // DREQ ctl |
| | 223 | r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_DMA|P32XS_RV)); |
| | 224 | return; |
| | 225 | case 0x1b: // TV |
| | 226 | r[0x1a / 2] = d; |
| | 227 | return; |
| | 228 | } |
| | 229 | |
| | 230 | if ((a & 0x30) == 0x20) { |
| | 231 | u8 *r8 = (u8 *)r; |
| | 232 | r8[a ^ 1] = d; |
| | 233 | p32x_poll_undetect(&sh2_poll[0], 0); |
| | 234 | p32x_poll_undetect(&sh2_poll[1], 0); |
| | 235 | // if some SH2 is busy waiting, it needs to see the result ASAP |
| | 236 | if (SekCyclesLeftNoMCD > 32) |
| | 237 | SekEndRun(32); |
| | 238 | return; |
| | 239 | } |
| | 240 | } |
| | 241 | |
| | 242 | static void p32x_reg_write16(u32 a, u32 d) |
| | 243 | { |
| | 244 | u16 *r = Pico32x.regs; |
| | 245 | a &= 0x3e; |
| | 246 | |
| | 247 | // for things like bset on comm port |
| | 248 | m68k_poll.cnt = 0; |
| | 249 | |
| | 250 | switch (a) { |
| | 251 | case 0x00: // adapter ctl |
| | 252 | r[0] = (r[0] & 0x83) | (d & P32XS_FM); |
| | 253 | return; |
| | 254 | case 0x10: // DREQ len |
| | 255 | r[a / 2] = d & ~3; |
| | 256 | return; |
| | 257 | case 0x12: // FIFO reg |
| | 258 | if (!(r[6 / 2] & P32XS_68S)) { |
| | 259 | elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?"); |
| | 260 | return; |
| | 261 | } |
| | 262 | if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) { |
| | 263 | Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d; |
| | 264 | if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) |
| | 265 | dma_68k2sh2_do(); |
| | 266 | if (Pico32x.dmac_ptr == DMAC_FIFO_LEN) |
| | 267 | r[6 / 2] |= P32XS_FULL; |
| | 268 | } |
| | 269 | break; |
| | 270 | } |
| | 271 | |
| | 272 | // DREQ src, dst |
| | 273 | if ((a & 0x38) == 0x08) { |
| | 274 | r[a / 2] = d; |
| | 275 | return; |
| | 276 | } |
| | 277 | // comm port |
| | 278 | else if ((a & 0x30) == 0x20 && r[a / 2] != d) { |
| | 279 | r[a / 2] = d; |
| | 280 | p32x_poll_undetect(&sh2_poll[0], 0); |
| | 281 | p32x_poll_undetect(&sh2_poll[1], 0); |
| | 282 | // same as for w8 |
| | 283 | if (SekCyclesLeftNoMCD > 32) |
| | 284 | SekEndRun(32); |
| | 285 | return; |
| | 286 | } |
| | 287 | // PWM |
| | 288 | else if ((a & 0x30) == 0x30) { |
| | 289 | p32x_pwm_write16(a, d); |
| | 290 | return; |
| | 291 | } |
| | 292 | |
| | 293 | p32x_reg_write8(a + 1, d); |
| | 294 | } |
| | 295 | |
| | 296 | // ------------------------------------------------------------------ |
| | 297 | // VDP regs |
| | 298 | static u32 p32x_vdp_read16(u32 a) |
| | 299 | { |
| | 300 | a &= 0x0e; |
| | 301 | |
| | 302 | return Pico32x.vdp_regs[a / 2]; |
| | 303 | } |
| | 304 | |
| | 305 | static void p32x_vdp_write8(u32 a, u32 d) |
| | 306 | { |
| | 307 | u16 *r = Pico32x.vdp_regs; |
| | 308 | a &= 0x0f; |
| | 309 | |
| | 310 | // for FEN checks between writes |
| | 311 | sh2_poll[0].cnt = 0; |
| | 312 | |
| | 313 | // TODO: verify what's writeable |
| | 314 | switch (a) { |
| | 315 | case 0x01: |
| | 316 | // priority inversion is handled in palette |
| | 317 | if ((r[0] ^ d) & P32XV_PRI) |
| | 318 | Pico32x.dirty_pal = 1; |
| | 319 | r[0] = (r[0] & P32XV_nPAL) | (d & 0xff); |
| | 320 | break; |
| | 321 | case 0x05: // fill len |
| | 322 | r[4 / 2] = d & 0xff; |
| | 323 | break; |
| | 324 | case 0x0b: |
| | 325 | d &= 1; |
| | 326 | Pico32x.pending_fb = d; |
| | 327 | // if we are blanking and FS bit is changing |
| | 328 | if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) { |
| | 329 | r[0x0a/2] ^= 1; |
| | 330 | Pico32xSwapDRAM(d ^ 1); |
| | 331 | elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS); |
| | 332 | } |
| | 333 | break; |
| | 334 | } |
| | 335 | } |
| | 336 | |
| | 337 | static void p32x_vdp_write16(u32 a, u32 d) |
| | 338 | { |
| | 339 | a &= 0x0e; |
| | 340 | if (a == 6) { // fill start |
| | 341 | Pico32x.vdp_regs[6 / 2] = d; |
| | 342 | return; |
| | 343 | } |
| | 344 | if (a == 8) { // fill data |
| | 345 | u16 *dram = Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; |
| | 346 | int len = Pico32x.vdp_regs[4 / 2] + 1; |
| | 347 | a = Pico32x.vdp_regs[6 / 2]; |
| | 348 | while (len--) { |
| | 349 | dram[a] = d; |
| | 350 | a = (a & 0xff00) | ((a + 1) & 0xff); |
| | 351 | } |
| | 352 | Pico32x.vdp_regs[6 / 2] = a; |
| | 353 | Pico32x.vdp_regs[8 / 2] = d; |
| | 354 | return; |
| | 355 | } |
| | 356 | |
| | 357 | p32x_vdp_write8(a | 1, d); |
| | 358 | } |
| | 359 | |
| | 360 | // ------------------------------------------------------------------ |
| | 361 | // SH2 regs |
| | 362 | |
| | 363 | static u32 p32x_sh2reg_read16(u32 a, int cpuid) |
| | 364 | { |
| | 365 | u16 *r = Pico32x.regs; |
| | 366 | a &= 0xfe; // ? |
| | 367 | |
| | 368 | switch (a) { |
| | 369 | case 0x00: // adapter/irq ctl |
| | 370 | return (r[0] & P32XS_FM) | Pico32x.sh2_regs[0] | Pico32x.sh2irq_mask[cpuid]; |
| | 371 | case 0x04: // H count (often as comm too) |
| | 372 | if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0)) |
| | 373 | ash2_end_run(8); |
| | 374 | return Pico32x.sh2_regs[4 / 2]; |
| | 375 | case 0x10: // DREQ len |
| | 376 | return r[a / 2]; |
| | 377 | } |
| | 378 | |
| | 379 | // DREQ src, dst |
| | 380 | if ((a & 0x38) == 0x08) |
| | 381 | return r[a / 2]; |
| | 382 | // comm port |
| | 383 | if ((a & 0x30) == 0x20) { |
| | 384 | if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0)) |
| | 385 | ash2_end_run(8); |
| | 386 | return r[a / 2]; |
| | 387 | } |
| | 388 | if ((a & 0x30) == 0x30) { |
| | 389 | sh2_poll[cpuid].cnt = 0; |
| | 390 | return p32x_pwm_read16(a); |
| | 391 | } |
| | 392 | |
| | 393 | return 0; |
| | 394 | } |
| | 395 | |
| | 396 | static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid) |
| | 397 | { |
| | 398 | a &= 0xff; |
| | 399 | switch (a) { |
| | 400 | case 0: // FM |
| | 401 | Pico32x.regs[0] &= ~P32XS_FM; |
| | 402 | Pico32x.regs[0] |= (d << 8) & P32XS_FM; |
| | 403 | return; |
| | 404 | case 1: // |
| | 405 | Pico32x.sh2irq_mask[cpuid] = d & 0x8f; |
| | 406 | Pico32x.sh2_regs[0] &= ~0x80; |
| | 407 | Pico32x.sh2_regs[0] |= d & 0x80; |
| | 408 | p32x_update_irls(); |
| | 409 | return; |
| | 410 | case 5: // H count |
| | 411 | Pico32x.sh2_regs[4 / 2] = d & 0xff; |
| | 412 | p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); |
| | 413 | return; |
| | 414 | } |
| | 415 | |
| | 416 | if ((a & 0x30) == 0x20) { |
| | 417 | u8 *r8 = (u8 *)Pico32x.regs; |
| | 418 | r8[a ^ 1] = d; |
| | 419 | if (p32x_poll_undetect(&m68k_poll, 0)) |
| | 420 | SekSetStop(0); |
| | 421 | p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); |
| | 422 | return; |
| | 423 | } |
| | 424 | } |
| | 425 | |
| | 426 | static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid) |
| | 427 | { |
| | 428 | a &= 0xfe; |
| | 429 | |
| | 430 | // comm |
| | 431 | if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) { |
| | 432 | Pico32x.regs[a / 2] = d; |
| | 433 | if (p32x_poll_undetect(&m68k_poll, 0)) |
| | 434 | SekSetStop(0); |
| | 435 | p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); |
| | 436 | return; |
| | 437 | } |
| | 438 | // PWM |
| | 439 | else if ((a & 0x30) == 0x30) { |
| | 440 | p32x_pwm_write16(a, d); |
| | 441 | return; |
| | 442 | } |
| | 443 | |
| | 444 | switch (a) { |
| | 445 | case 0: // FM |
| | 446 | Pico32x.regs[0] &= ~P32XS_FM; |
| | 447 | Pico32x.regs[0] |= d & P32XS_FM; |
| | 448 | break; |
| | 449 | case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls; |
| | 450 | case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls; |
| | 451 | case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls; |
| | 452 | case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls; |
| | 453 | case 0x1c: |
| | 454 | Pico32x.sh2irqs &= ~P32XI_PWM; |
| | 455 | p32x_timers_do(0); |
| | 456 | goto irls; |
| | 457 | } |
| | 458 | |
| | 459 | p32x_sh2reg_write8(a | 1, d, cpuid); |
| | 460 | return; |
| | 461 | |
| | 462 | irls: |
| | 463 | p32x_update_irls(); |
| | 464 | } |
| | 465 | |
| | 466 | // ------------------------------------------------------------------ |
| | 467 | // SH2 internal peripherals |
| | 468 | // we keep them in little endian format |
| | 469 | static u32 sh2_peripheral_read8(u32 a, int id) |
| | 470 | { |
| | 471 | u8 *r = (void *)Pico32xMem->sh2_peri_regs[id]; |
| | 472 | u32 d; |
| | 473 | |
| | 474 | a &= 0x1ff; |
| | 475 | d = PREG8(r, a); |
| | 476 | |
| | 477 | elprintf(EL_32X, "%csh2 peri r8 [%08x] %02x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); |
| | 478 | return d; |
| | 479 | } |
| | 480 | |
| | 481 | static u32 sh2_peripheral_read16(u32 a, int id) |
| | 482 | { |
| | 483 | u16 *r = (void *)Pico32xMem->sh2_peri_regs[id]; |
| | 484 | u32 d; |
| | 485 | |
| | 486 | a &= 0x1ff; |
| | 487 | d = r[(a / 2) ^ 1]; |
| | 488 | |
| | 489 | elprintf(EL_32X, "%csh2 peri r16 [%08x] %04x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); |
| | 490 | return d; |
| | 491 | } |
| | 492 | |
| | 493 | static u32 sh2_peripheral_read32(u32 a, int id) |
| | 494 | { |
| | 495 | u32 d; |
| | 496 | a &= 0x1fc; |
| | 497 | d = Pico32xMem->sh2_peri_regs[id][a / 4]; |
| | 498 | |
| | 499 | elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); |
| | 500 | return d; |
| | 501 | } |
| | 502 | |
| | 503 | static void sh2_peripheral_write8(u32 a, u32 d, int id) |
| | 504 | { |
| | 505 | u8 *r = (void *)Pico32xMem->sh2_peri_regs[id]; |
| | 506 | elprintf(EL_32X, "%csh2 peri w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); |
| | 507 | |
| | 508 | a &= 0x1ff; |
| | 509 | PREG8(r, a) = d; |
| | 510 | |
| | 511 | // X-men SCI hack |
| | 512 | if ((a == 2 && (d & 0x20)) || // transmiter enabled |
| | 513 | (a == 4 && !(d & 0x80))) { // valid data in TDR |
| | 514 | void *oregs = Pico32xMem->sh2_peri_regs[id ^ 1]; |
| | 515 | if ((PREG8(oregs, 2) & 0x50) == 0x50) { // receiver + irq enabled |
| | 516 | int level = PREG8(oregs, 0x60) >> 4; |
| | 517 | int vector = PREG8(oregs, 0x63) & 0x7f; |
| | 518 | elprintf(EL_32X, "%csh2 SCI recv irq (%d, %d)", (id ^ 1) ? 's' : 'm', level, vector); |
| | 519 | sh2_internal_irq(&sh2s[id ^ 1], level, vector); |
| | 520 | } |
| | 521 | } |
| | 522 | } |
| | 523 | |
| | 524 | static void sh2_peripheral_write16(u32 a, u32 d, int id) |
| | 525 | { |
| | 526 | u16 *r = (void *)Pico32xMem->sh2_peri_regs[id]; |
| | 527 | elprintf(EL_32X, "%csh2 peri w16 [%08x] %04x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); |
| | 528 | |
| | 529 | a &= 0x1ff; |
| | 530 | |
| | 531 | // evil WDT |
| | 532 | if (a == 0x80) { |
| | 533 | if ((d & 0xff00) == 0xa500) { // WTCSR |
| | 534 | PREG8(r, 0x80) = d; |
| | 535 | p32x_timers_recalc(); |
| | 536 | } |
| | 537 | if ((d & 0xff00) == 0x5a00) // WTCNT |
| | 538 | PREG8(r, 0x81) = d; |
| | 539 | return; |
| | 540 | } |
| | 541 | |
| | 542 | r[(a / 2) ^ 1] = d; |
| | 543 | } |
| | 544 | |
| | 545 | static void sh2_peripheral_write32(u32 a, u32 d, int id) |
| | 546 | { |
| | 547 | u32 *r = Pico32xMem->sh2_peri_regs[id]; |
| | 548 | elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); |
| | 549 | |
| | 550 | a &= 0x1fc; |
| | 551 | r[a / 4] = d; |
| | 552 | |
| | 553 | switch (a) { |
| | 554 | // division unit (TODO: verify): |
| | 555 | case 0x104: // DVDNT: divident L, starts divide |
| | 556 | elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]); |
| | 557 | if (r[0x100 / 4]) { |
| | 558 | signed int divisor = r[0x100 / 4]; |
| | 559 | r[0x118 / 4] = r[0x110 / 4] = (signed int)d % divisor; |
| | 560 | r[0x104 / 4] = r[0x11c / 4] = r[0x114 / 4] = (signed int)d / divisor; |
| | 561 | } |
| | 562 | break; |
| | 563 | case 0x114: |
| | 564 | elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x", |
| | 565 | id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id)); |
| | 566 | if (r[0x100 / 4]) { |
| | 567 | signed long long divident = (signed long long)r[0x110 / 4] << 32 | d; |
| | 568 | signed int divisor = r[0x100 / 4]; |
| | 569 | // XXX: undocumented mirroring to 0x118,0x11c? |
| | 570 | r[0x118 / 4] = r[0x110 / 4] = divident % divisor; |
| | 571 | r[0x11c / 4] = r[0x114 / 4] = divident / divisor; |
| | 572 | } |
| | 573 | break; |
| | 574 | } |
| | 575 | |
| | 576 | if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) { |
| | 577 | elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x", |
| | 578 | dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id)); |
| | 579 | dmac0->tcr0 &= 0xffffff; |
| | 580 | |
| | 581 | // HACK: assume 68k starts writing soon and end the timeslice |
| | 582 | ash2_end_run(16); |
| | 583 | |
| | 584 | // DREQ is only sent after first 4 words are written. |
| | 585 | // we do multiple of 4 words to avoid messing up alignment |
| | 586 | if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) { |
| | 587 | elprintf(EL_32X, "68k -> sh2 DMA"); |
| | 588 | dma_68k2sh2_do(); |
| | 589 | } |
| | 590 | } |
| | 591 | } |
| | 592 | |
| | 593 | // ------------------------------------------------------------------ |
| | 594 | // default 32x handlers |
| | 595 | u32 PicoRead8_32x(u32 a) |
| | 596 | { |
| | 597 | u32 d = 0; |
| | 598 | if ((a & 0xffc0) == 0x5100) { // a15100 |
| | 599 | d = p32x_reg_read16(a); |
| | 600 | goto out_16to8; |
| | 601 | } |
| | 602 | |
| | 603 | if (!(Pico32x.regs[0] & 1)) |
| | 604 | goto no_vdp; |
| | 605 | |
| | 606 | if ((a & 0xfff0) == 0x5180) { // a15180 |
| | 607 | d = p32x_vdp_read16(a); |
| | 608 | goto out_16to8; |
| | 609 | } |
| | 610 | |
| | 611 | if ((a & 0xfe00) == 0x5200) { // a15200 |
| | 612 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
| | 613 | goto out_16to8; |
| | 614 | } |
| | 615 | |
| | 616 | no_vdp: |
| | 617 | if ((a & 0xfffc) == 0x30ec) { // a130ec |
| | 618 | d = str_mars[a & 3]; |
| | 619 | goto out; |
| | 620 | } |
| | 621 | |
| | 622 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc); |
| | 623 | return d; |
| | 624 | |
| | 625 | out_16to8: |
| | 626 | if (a & 1) |
| | 627 | d &= 0xff; |
| | 628 | else |
| | 629 | d >>= 8; |
| | 630 | |
| | 631 | out: |
| | 632 | elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc); |
| | 633 | return d; |
| | 634 | } |
| | 635 | |
| | 636 | u32 PicoRead16_32x(u32 a) |
| | 637 | { |
| | 638 | u32 d = 0; |
| | 639 | if ((a & 0xffc0) == 0x5100) { // a15100 |
| | 640 | d = p32x_reg_read16(a); |
| | 641 | goto out; |
| | 642 | } |
| | 643 | |
| | 644 | if (!(Pico32x.regs[0] & 1)) |
| | 645 | goto no_vdp; |
| | 646 | |
| | 647 | if ((a & 0xfff0) == 0x5180) { // a15180 |
| | 648 | d = p32x_vdp_read16(a); |
| | 649 | goto out; |
| | 650 | } |
| | 651 | |
| | 652 | if ((a & 0xfe00) == 0x5200) { // a15200 |
| | 653 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
| | 654 | goto out; |
| | 655 | } |
| | 656 | |
| | 657 | no_vdp: |
| | 658 | if ((a & 0xfffc) == 0x30ec) { // a130ec |
| | 659 | d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S'; |
| | 660 | goto out; |
| | 661 | } |
| | 662 | |
| | 663 | elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc); |
| | 664 | return d; |
| | 665 | |
| | 666 | out: |
| | 667 | elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc); |
| | 668 | return d; |
| | 669 | } |
| | 670 | |
| | 671 | void PicoWrite8_32x(u32 a, u32 d) |
| | 672 | { |
| | 673 | if ((a & 0xfc00) == 0x5000) |
| | 674 | elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
| | 675 | |
| | 676 | if ((a & 0xffc0) == 0x5100) { // a15100 |
| | 677 | p32x_reg_write8(a, d); |
| | 678 | return; |
| | 679 | } |
| | 680 | |
| | 681 | if (!(Pico32x.regs[0] & 1)) |
| | 682 | goto no_vdp; |
| | 683 | |
| | 684 | if ((a & 0xfff0) == 0x5180) { // a15180 |
| | 685 | p32x_vdp_write8(a, d); |
| | 686 | return; |
| | 687 | } |
| | 688 | |
| | 689 | // TODO: verify |
| | 690 | if ((a & 0xfe00) == 0x5200) { // a15200 |
| | 691 | elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
| | 692 | ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d; |
| | 693 | Pico32x.dirty_pal = 1; |
| | 694 | return; |
| | 695 | } |
| | 696 | |
| | 697 | no_vdp: |
| | 698 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
| | 699 | } |
| | 700 | |
| | 701 | void PicoWrite16_32x(u32 a, u32 d) |
| | 702 | { |
| | 703 | if ((a & 0xfc00) == 0x5000) |
| | 704 | elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
| | 705 | |
| | 706 | if ((a & 0xffc0) == 0x5100) { // a15100 |
| | 707 | p32x_reg_write16(a, d); |
| | 708 | return; |
| | 709 | } |
| | 710 | |
| | 711 | if (!(Pico32x.regs[0] & 1)) |
| | 712 | goto no_vdp; |
| | 713 | |
| | 714 | if ((a & 0xfff0) == 0x5180) { // a15180 |
| | 715 | p32x_vdp_write16(a, d); |
| | 716 | return; |
| | 717 | } |
| | 718 | |
| | 719 | if ((a & 0xfe00) == 0x5200) { // a15200 |
| | 720 | Pico32xMem->pal[(a & 0x1ff) / 2] = d; |
| | 721 | Pico32x.dirty_pal = 1; |
| | 722 | return; |
| | 723 | } |
| | 724 | |
| | 725 | no_vdp: |
| | 726 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
| | 727 | } |
| | 728 | |
| | 729 | // hint vector is writeable |
| | 730 | static void PicoWrite8_hint(u32 a, u32 d) |
| | 731 | { |
| | 732 | if ((a & 0xfffc) == 0x0070) { |
| | 733 | Pico32xMem->m68k_rom[a ^ 1] = d; |
| | 734 | return; |
| | 735 | } |
| | 736 | |
| | 737 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); |
| | 738 | } |
| | 739 | |
| | 740 | static void PicoWrite16_hint(u32 a, u32 d) |
| | 741 | { |
| | 742 | if ((a & 0xfffc) == 0x0070) { |
| | 743 | ((u16 *)Pico32xMem->m68k_rom)[a/2] = d; |
| | 744 | return; |
| | 745 | } |
| | 746 | |
| | 747 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); |
| | 748 | } |
| | 749 | |
| | 750 | void Pico32xSwapDRAM(int b) |
| | 751 | { |
| | 752 | cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
| | 753 | cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
| | 754 | cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
| | 755 | cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); |
| | 756 | } |
| | 757 | |
| | 758 | static void bank_switch(int b) |
| | 759 | { |
| | 760 | unsigned int rs, bank; |
| | 761 | |
| | 762 | bank = b << 20; |
| | 763 | if (bank >= Pico.romsize) { |
| | 764 | elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank); |
| | 765 | return; |
| | 766 | } |
| | 767 | |
| | 768 | // 32X ROM (unbanked, XXX: consider mirroring?) |
| | 769 | rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK; |
| | 770 | rs -= bank; |
| | 771 | if (rs > 0x100000) |
| | 772 | rs = 0x100000; |
| | 773 | cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0); |
| | 774 | cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0); |
| | 775 | |
| | 776 | elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank); |
| | 777 | } |
| | 778 | |
| | 779 | // ----------------------------------------------------------------- |
| | 780 | // SH2 |
| | 781 | // ----------------------------------------------------------------- |
| | 782 | |
| | 783 | u32 p32x_sh2_read8(u32 a, int id) |
| | 784 | { |
| | 785 | u32 d = 0; |
| | 786 | |
| | 787 | if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m)) |
| | 788 | return Pico32xMem->sh2_rom_m[a ^ 1]; |
| | 789 | if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s)) |
| | 790 | return Pico32xMem->sh2_rom_s[a ^ 1]; |
| | 791 | |
| | 792 | if ((a & 0xdffc0000) == 0x06000000) |
| | 793 | return Pico32xMem->sdram[(a & 0x3ffff) ^ 1]; |
| | 794 | |
| | 795 | if ((a & 0xdfc00000) == 0x02000000) |
| | 796 | if ((a & 0x003fffff) < Pico.romsize) |
| | 797 | return Pico.rom[(a & 0x3fffff) ^ 1]; |
| | 798 | |
| | 799 | if ((a & ~0xfff) == 0xc0000000) |
| | 800 | return Pico32xMem->data_array[id][(a & 0xfff) ^ 1]; |
| | 801 | |
| | 802 | if ((a & 0xdffc0000) == 0x04000000) { |
| | 803 | /* XXX: overwrite readable as normal? */ |
| | 804 | u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; |
| | 805 | return dram[(a & 0x1ffff) ^ 1]; |
| | 806 | } |
| | 807 | |
| | 808 | if ((a & 0xdfffff00) == 0x4000) { |
| | 809 | d = p32x_sh2reg_read16(a, id); |
| | 810 | goto out_16to8; |
| | 811 | } |
| | 812 | |
| | 813 | if ((a & 0xdfffff00) == 0x4100) { |
| | 814 | d = p32x_vdp_read16(a); |
| | 815 | if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1)) |
| | 816 | ash2_end_run(8); |
| | 817 | goto out_16to8; |
| | 818 | } |
| | 819 | |
| | 820 | if ((a & 0xdfffff00) == 0x4200) { |
| | 821 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
| | 822 | goto out_16to8; |
| | 823 | } |
| | 824 | |
| | 825 | if ((a & 0xfffffe00) == 0xfffffe00) |
| | 826 | return sh2_peripheral_read8(a, id); |
| | 827 | |
| | 828 | elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x", |
| | 829 | id ? 's' : 'm', a, d, sh2_pc(id)); |
| | 830 | return d; |
| | 831 | |
| | 832 | out_16to8: |
| | 833 | if (a & 1) |
| | 834 | d &= 0xff; |
| | 835 | else |
| | 836 | d >>= 8; |
| | 837 | |
| | 838 | elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x", |
| | 839 | id ? 's' : 'm', a, d, sh2_pc(id)); |
| | 840 | return d; |
| | 841 | } |
| | 842 | |
| | 843 | u32 p32x_sh2_read16(u32 a, int id) |
| | 844 | { |
| | 845 | u32 d = 0; |
| | 846 | |
| | 847 | if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m)) |
| | 848 | return *(u16 *)(Pico32xMem->sh2_rom_m + a); |
| | 849 | if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s)) |
| | 850 | return *(u16 *)(Pico32xMem->sh2_rom_s + a); |
| | 851 | |
| | 852 | if ((a & 0xdffc0000) == 0x06000000) |
| | 853 | return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2]; |
| | 854 | |
| | 855 | if ((a & 0xdfc00000) == 0x02000000) |
| | 856 | if ((a & 0x003fffff) < Pico.romsize) |
| | 857 | return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2]; |
| | 858 | |
| | 859 | if ((a & ~0xfff) == 0xc0000000) |
| | 860 | return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2]; |
| | 861 | |
| | 862 | if ((a & 0xdffe0000) == 0x04000000) |
| | 863 | return Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2]; |
| | 864 | |
| | 865 | if ((a & 0xdfffff00) == 0x4000) { |
| | 866 | d = p32x_sh2reg_read16(a, id); |
| | 867 | if (!(EL_LOGMASK & EL_PWM) && (a & 0x30) == 0x30) // hide PWM |
| | 868 | return d; |
| | 869 | goto out; |
| | 870 | } |
| | 871 | |
| | 872 | if ((a & 0xdfffff00) == 0x4100) { |
| | 873 | d = p32x_vdp_read16(a); |
| | 874 | if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1)) |
| | 875 | ash2_end_run(8); |
| | 876 | goto out; |
| | 877 | } |
| | 878 | |
| | 879 | if ((a & 0xdfffff00) == 0x4200) { |
| | 880 | d = Pico32xMem->pal[(a & 0x1ff) / 2]; |
| | 881 | goto out; |
| | 882 | } |
| | 883 | |
| | 884 | if ((a & 0xfffffe00) == 0xfffffe00) |
| | 885 | return sh2_peripheral_read16(a, id); |
| | 886 | |
| | 887 | elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x", |
| | 888 | id ? 's' : 'm', a, d, sh2_pc(id)); |
| | 889 | return d; |
| | 890 | |
| | 891 | out: |
| | 892 | elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x", |
| | 893 | id ? 's' : 'm', a, d, sh2_pc(id)); |
| | 894 | return d; |
| | 895 | } |
| | 896 | |
| | 897 | u32 p32x_sh2_read32(u32 a, int id) |
| | 898 | { |
| | 899 | if ((a & 0xfffffe00) == 0xfffffe00) |
| | 900 | return sh2_peripheral_read32(a, id); |
| | 901 | |
| | 902 | // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc()); |
| | 903 | return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id); |
| | 904 | } |
| | 905 | |
| | 906 | void p32x_sh2_write8(u32 a, u32 d, int id) |
| | 907 | { |
| | 908 | if ((a & 0xdffffc00) == 0x4000) |
| | 909 | elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x", |
| | 910 | id ? 's' : 'm', a, d & 0xff, sh2_pc(id)); |
| | 911 | |
| | 912 | if ((a & 0xdffc0000) == 0x06000000) { |
| | 913 | Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d; |
| | 914 | return; |
| | 915 | } |
| | 916 | |
| | 917 | if ((a & 0xdffc0000) == 0x04000000) { |
| | 918 | u8 *dram; |
| | 919 | if (!(a & 0x20000) || d) { |
| | 920 | dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; |
| | 921 | dram[(a & 0x1ffff) ^ 1] = d; |
| | 922 | } |
| | 923 | return; |
| | 924 | } |
| | 925 | |
| | 926 | if ((a & ~0xfff) == 0xc0000000) { |
| | 927 | Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d; |
| | 928 | return; |
| | 929 | } |
| | 930 | |
| | 931 | if ((a & 0xdfffff00) == 0x4100) { |
| | 932 | p32x_vdp_write8(a, d); |
| | 933 | return; |
| | 934 | } |
| | 935 | |
| | 936 | if ((a & 0xdfffff00) == 0x4000) { |
| | 937 | p32x_sh2reg_write8(a, d, id); |
| | 938 | return; |
| | 939 | } |
| | 940 | |
| | 941 | if ((a & 0xfffffe00) == 0xfffffe00) { |
| | 942 | sh2_peripheral_write8(a, d, id); |
| | 943 | return; |
| | 944 | } |
| | 945 | |
| | 946 | elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x", |
| | 947 | id ? 's' : 'm', a, d & 0xff, sh2_pc(id)); |
| | 948 | } |
| | 949 | |
| | 950 | void p32x_sh2_write16(u32 a, u32 d, int id) |
| | 951 | { |
| | 952 | if ((a & 0xdffffc00) == 0x4000 && ((EL_LOGMASK & EL_PWM) || (a & 0x30) != 0x30)) // hide PWM |
| | 953 | elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x", |
| | 954 | id ? 's' : 'm', a, d & 0xffff, sh2_pc(id)); |
| | 955 | |
| | 956 | // ignore "Associative purge space" |
| | 957 | if ((a & 0xf8000000) == 0x40000000) |
| | 958 | return; |
| | 959 | |
| | 960 | if ((a & 0xdffc0000) == 0x06000000) { |
| | 961 | ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d; |
| | 962 | return; |
| | 963 | } |
| | 964 | |
| | 965 | if ((a & ~0xfff) == 0xc0000000) { |
| | 966 | ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d; |
| | 967 | return; |
| | 968 | } |
| | 969 | |
| | 970 | if ((a & 0xdffc0000) == 0x04000000) { |
| | 971 | u16 *pd = &Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2]; |
| | 972 | if (!(a & 0x20000)) { |
| | 973 | *pd = d; |
| | 974 | return; |
| | 975 | } |
| | 976 | // overwrite |
| | 977 | if (!(d & 0xff00)) d |= *pd & 0xff00; |
| | 978 | if (!(d & 0x00ff)) d |= *pd & 0x00ff; |
| | 979 | *pd = d; |
| | 980 | return; |
| | 981 | } |
| | 982 | |
| | 983 | if ((a & 0xdfffff00) == 0x4100) { |
| | 984 | sh2_poll[id].cnt = 0; // for poll before VDP accesses |
| | 985 | p32x_vdp_write16(a, d); |
| | 986 | return; |
| | 987 | } |
| | 988 | |
| | 989 | if ((a & 0xdffffe00) == 0x4200) { |
| | 990 | Pico32xMem->pal[(a & 0x1ff) / 2] = d; |
| | 991 | Pico32x.dirty_pal = 1; |
| | 992 | return; |
| | 993 | } |
| | 994 | |
| | 995 | if ((a & 0xdfffff00) == 0x4000) { |
| | 996 | p32x_sh2reg_write16(a, d, id); |
| | 997 | return; |
| | 998 | } |
| | 999 | |
| | 1000 | if ((a & 0xfffffe00) == 0xfffffe00) { |
| | 1001 | sh2_peripheral_write16(a, d, id); |
| | 1002 | return; |
| | 1003 | } |
| | 1004 | |
| | 1005 | elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x", |
| | 1006 | id ? 's' : 'm', a, d & 0xffff, sh2_pc(id)); |
| | 1007 | } |
| | 1008 | |
| | 1009 | void p32x_sh2_write32(u32 a, u32 d, int id) |
| | 1010 | { |
| | 1011 | if ((a & 0xfffffe00) == 0xfffffe00) { |
| | 1012 | sh2_peripheral_write32(a, d, id); |
| | 1013 | return; |
| | 1014 | } |
| | 1015 | |
| | 1016 | p32x_sh2_write16(a, d >> 16, id); |
| | 1017 | p32x_sh2_write16(a + 2, d, id); |
| | 1018 | } |
| | 1019 | |
| | 1020 | #define HWSWAP(x) (((x) << 16) | ((x) >> 16)) |
| | 1021 | void PicoMemSetup32x(void) |
| | 1022 | { |
| | 1023 | unsigned short *ps; |
| | 1024 | unsigned int *pl; |
| | 1025 | unsigned int rs; |
| | 1026 | int i; |
| | 1027 | |
| | 1028 | Pico32xMem = calloc(1, sizeof(*Pico32xMem)); |
| | 1029 | if (Pico32xMem == NULL) { |
| | 1030 | elprintf(EL_STATUS, "OOM"); |
| | 1031 | return; |
| | 1032 | } |
| | 1033 | |
| | 1034 | dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4]; |
| | 1035 | |
| | 1036 | // generate 68k ROM |
| | 1037 | ps = (unsigned short *)Pico32xMem->m68k_rom; |
| | 1038 | pl = (unsigned int *)Pico32xMem->m68k_rom; |
| | 1039 | for (i = 1; i < 0xc0/4; i++) |
| | 1040 | pl[i] = HWSWAP(0x880200 + (i - 1) * 6); |
| | 1041 | |
| | 1042 | // fill with nops |
| | 1043 | for (i = 0xc0/2; i < 0x100/2; i++) |
| | 1044 | ps[i] = 0x4e71; |
| | 1045 | |
| | 1046 | #if 0 |
| | 1047 | ps[0xc0/2] = 0x46fc; |
| | 1048 | ps[0xc2/2] = 0x2700; // move #0x2700,sr |
| | 1049 | ps[0xfe/2] = 0x60fe; // jump to self |
| | 1050 | #else |
| | 1051 | ps[0xfe/2] = 0x4e75; // rts |
| | 1052 | #endif |
| | 1053 | |
| | 1054 | // fill remaining mem with ROM |
| | 1055 | memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100); |
| | 1056 | |
| | 1057 | // 32X ROM |
| | 1058 | // TODO: move |
| | 1059 | { |
| | 1060 | FILE *f = fopen("32X_M_BIOS.BIN", "rb"); |
| | 1061 | int i; |
| | 1062 | if (f == NULL) { |
| | 1063 | printf("missing 32X_M_BIOS.BIN\n"); |
| | 1064 | exit(1); |
| | 1065 | } |
| | 1066 | fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f); |
| | 1067 | fclose(f); |
| | 1068 | f = fopen("32X_S_BIOS.BIN", "rb"); |
| | 1069 | if (f == NULL) { |
| | 1070 | printf("missing 32X_S_BIOS.BIN\n"); |
| | 1071 | exit(1); |
| | 1072 | } |
| | 1073 | fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f); |
| | 1074 | fclose(f); |
| | 1075 | // byteswap |
| | 1076 | for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) { |
| | 1077 | int t = Pico32xMem->sh2_rom_m[i]; |
| | 1078 | Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1]; |
| | 1079 | Pico32xMem->sh2_rom_m[i + 1] = t; |
| | 1080 | } |
| | 1081 | for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) { |
| | 1082 | int t = Pico32xMem->sh2_rom_s[i]; |
| | 1083 | Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1]; |
| | 1084 | Pico32xMem->sh2_rom_s[i + 1] = t; |
| | 1085 | } |
| | 1086 | } |
| | 1087 | |
| | 1088 | // cartridge area becomes unmapped |
| | 1089 | // XXX: we take the easy way and don't unmap ROM, |
| | 1090 | // so that we can avoid handling the RV bit. |
| | 1091 | // m68k_map_unmap(0x000000, 0x3fffff); |
| | 1092 | |
| | 1093 | // MD ROM area |
| | 1094 | rs = sizeof(Pico32xMem->m68k_rom); |
| | 1095 | cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0); |
| | 1096 | cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0); |
| | 1097 | cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify |
| | 1098 | cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1); |
| | 1099 | |
| | 1100 | // DRAM area |
| | 1101 | Pico32xSwapDRAM(1); |
| | 1102 | |
| | 1103 | // 32X ROM (unbanked, XXX: consider mirroring?) |
| | 1104 | rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK; |
| | 1105 | if (rs > 0x80000) |
| | 1106 | rs = 0x80000; |
| | 1107 | cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0); |
| | 1108 | cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0); |
| | 1109 | |
| | 1110 | // 32X ROM (banked) |
| | 1111 | bank_switch(0); |
| | 1112 | |
| | 1113 | // setup poll detector |
| | 1114 | m68k_poll.flag = P32XF_68KPOLL; |
| | 1115 | m68k_poll.cyc_max = 64; |
| | 1116 | sh2_poll[0].flag = P32XF_MSH2POLL; |
| | 1117 | sh2_poll[0].cyc_max = 21; |
| | 1118 | sh2_poll[1].flag = P32XF_SSH2POLL; |
| | 1119 | sh2_poll[1].cyc_max = 16; |
| | 1120 | } |
| | 1121 | |
notaz.gp2x.de / picodrive.git / blame_incremental