| 1 | /* |
| 2 | * PicoDrive |
| 3 | * (C) notaz, 2007,2013 |
| 4 | * |
| 5 | * This work is licensed under the terms of MAME license. |
| 6 | * See COPYING file in the top-level directory. |
| 7 | */ |
| 8 | |
| 9 | #include "../pico_int.h" |
| 10 | #include "../sound/ym2612.h" |
| 11 | |
| 12 | extern unsigned char formatted_bram[4*0x10]; |
| 13 | |
| 14 | static unsigned int mcd_m68k_cycle_mult; |
| 15 | static unsigned int mcd_m68k_cycle_base; |
| 16 | static unsigned int mcd_s68k_cycle_base; |
| 17 | |
| 18 | void (*PicoMCDopenTray)(void) = NULL; |
| 19 | void (*PicoMCDcloseTray)(void) = NULL; |
| 20 | |
| 21 | |
| 22 | PICO_INTERNAL void PicoInitMCD(void) |
| 23 | { |
| 24 | SekInitS68k(); |
| 25 | } |
| 26 | |
| 27 | PICO_INTERNAL void PicoExitMCD(void) |
| 28 | { |
| 29 | } |
| 30 | |
| 31 | PICO_INTERNAL void PicoPowerMCD(void) |
| 32 | { |
| 33 | int fmt_size; |
| 34 | SekCycleCntS68k = SekCycleAimS68k = 0; |
| 35 | |
| 36 | fmt_size = sizeof(formatted_bram); |
| 37 | memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram)); |
| 38 | memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M)); |
| 39 | memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); |
| 40 | memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); |
| 41 | memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, |
| 42 | formatted_bram, fmt_size); |
| 43 | memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs)); |
| 44 | memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm)); |
| 45 | memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m)); |
| 46 | |
| 47 | cdc_init(); |
| 48 | gfx_init(); |
| 49 | |
| 50 | // cold reset state (tested) |
| 51 | Pico_mcd->m.state_flags = PCD_ST_S68K_RST; |
| 52 | Pico_mcd->m.busreq = 2; // busreq on, s68k in reset |
| 53 | Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access |
| 54 | memset(Pico_mcd->bios + 0x70, 0xff, 4); |
| 55 | } |
| 56 | |
| 57 | void pcd_soft_reset(void) |
| 58 | { |
| 59 | elprintf(EL_CD, "cd: soft reset"); |
| 60 | |
| 61 | Pico_mcd->m.s68k_pend_ints = 0; |
| 62 | cdc_reset(); |
| 63 | cdd_reset(); |
| 64 | #ifdef _ASM_CD_MEMORY_C |
| 65 | //PicoMemResetCDdecode(1); // don't have to call this in 2M mode |
| 66 | #endif |
| 67 | |
| 68 | memset(&Pico_mcd->s68k_regs[0x38], 0, 9); |
| 69 | Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum |
| 70 | |
| 71 | pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75); |
| 72 | |
| 73 | // TODO: test if register state/timers change |
| 74 | } |
| 75 | |
| 76 | PICO_INTERNAL int PicoResetMCD(void) |
| 77 | { |
| 78 | // reset button doesn't affect MCD hardware |
| 79 | |
| 80 | // use SRam.data for RAM cart |
| 81 | if (PicoOpt & POPT_EN_MCD_RAMCART) { |
| 82 | if (SRam.data == NULL) |
| 83 | SRam.data = calloc(1, 0x12000); |
| 84 | } |
| 85 | else if (SRam.data != NULL) { |
| 86 | free(SRam.data); |
| 87 | SRam.data = NULL; |
| 88 | } |
| 89 | SRam.start = SRam.end = 0; // unused |
| 90 | |
| 91 | return 0; |
| 92 | } |
| 93 | |
| 94 | static void SekRunM68kOnce(void) |
| 95 | { |
| 96 | int cyc_do; |
| 97 | pevt_log_m68k_o(EVT_RUN_START); |
| 98 | |
| 99 | if ((cyc_do = SekCycleAim - SekCycleCnt) > 0) { |
| 100 | SekCycleCnt += cyc_do; |
| 101 | |
| 102 | #if defined(EMU_C68K) |
| 103 | PicoCpuCM68k.cycles = cyc_do; |
| 104 | CycloneRun(&PicoCpuCM68k); |
| 105 | SekCycleCnt -= PicoCpuCM68k.cycles; |
| 106 | #elif defined(EMU_M68K) |
| 107 | SekCycleCnt += m68k_execute(cyc_do) - cyc_do; |
| 108 | #elif defined(EMU_F68K) |
| 109 | SekCycleCnt += fm68k_emulate(cyc_do, 0) - cyc_do; |
| 110 | #endif |
| 111 | } |
| 112 | |
| 113 | SekCyclesLeft = 0; |
| 114 | |
| 115 | SekTrace(0); |
| 116 | pevt_log_m68k_o(EVT_RUN_END); |
| 117 | } |
| 118 | |
| 119 | static void SekRunS68k(unsigned int to) |
| 120 | { |
| 121 | int cyc_do; |
| 122 | |
| 123 | SekCycleAimS68k = to; |
| 124 | if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0) |
| 125 | return; |
| 126 | |
| 127 | if (SekShouldInterrupt()) |
| 128 | Pico_mcd->m.s68k_poll_a = 0; |
| 129 | |
| 130 | SekCycleCntS68k += cyc_do; |
| 131 | #if defined(EMU_C68K) |
| 132 | PicoCpuCS68k.cycles = cyc_do; |
| 133 | CycloneRun(&PicoCpuCS68k); |
| 134 | SekCycleCntS68k -= PicoCpuCS68k.cycles; |
| 135 | #elif defined(EMU_M68K) |
| 136 | m68k_set_context(&PicoCpuMS68k); |
| 137 | SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do; |
| 138 | m68k_set_context(&PicoCpuMM68k); |
| 139 | #elif defined(EMU_F68K) |
| 140 | g_m68kcontext = &PicoCpuFS68k; |
| 141 | SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do; |
| 142 | g_m68kcontext = &PicoCpuFM68k; |
| 143 | #endif |
| 144 | } |
| 145 | |
| 146 | static void pcd_set_cycle_mult(void) |
| 147 | { |
| 148 | // ~1.63 for NTSC, ~1.645 for PAL |
| 149 | if (Pico.m.pal) |
| 150 | mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*312*488)); |
| 151 | else |
| 152 | mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1; |
| 153 | } |
| 154 | |
| 155 | unsigned int pcd_cycles_m68k_to_s68k(unsigned int c) |
| 156 | { |
| 157 | return (long long)c * mcd_m68k_cycle_mult >> 16; |
| 158 | } |
| 159 | |
| 160 | /* events */ |
| 161 | static void pcd_cdc_event(unsigned int now) |
| 162 | { |
| 163 | // 75Hz CDC update |
| 164 | cdd_update(); |
| 165 | |
| 166 | /* check if a new CDD command has been processed */ |
| 167 | if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0)) |
| 168 | { |
| 169 | /* reset CDD command wait flag */ |
| 170 | Pico_mcd->s68k_regs[0x4b] = 0xf0; |
| 171 | |
| 172 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) { |
| 173 | elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4"); |
| 174 | SekInterruptS68k(4); |
| 175 | } |
| 176 | } |
| 177 | |
| 178 | pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75); |
| 179 | } |
| 180 | |
| 181 | static void pcd_int3_timer_event(unsigned int now) |
| 182 | { |
| 183 | if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) { |
| 184 | elprintf(EL_INTS|EL_CD, "s68k: timer irq 3"); |
| 185 | SekInterruptS68k(3); |
| 186 | } |
| 187 | |
| 188 | if (Pico_mcd->s68k_regs[0x31] != 0) |
| 189 | pcd_event_schedule(now, PCD_EVENT_TIMER3, |
| 190 | Pico_mcd->s68k_regs[0x31] * 384); |
| 191 | } |
| 192 | |
| 193 | static void pcd_dma_event(unsigned int now) |
| 194 | { |
| 195 | cdc_dma_update(); |
| 196 | } |
| 197 | |
| 198 | typedef void (event_cb)(unsigned int now); |
| 199 | |
| 200 | /* times are in s68k (12.5MHz) cycles */ |
| 201 | unsigned int pcd_event_times[PCD_EVENT_COUNT]; |
| 202 | static unsigned int event_time_next; |
| 203 | static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = { |
| 204 | pcd_cdc_event, |
| 205 | pcd_int3_timer_event, |
| 206 | gfx_update, |
| 207 | pcd_dma_event, |
| 208 | }; |
| 209 | |
| 210 | void pcd_event_schedule(unsigned int now, enum pcd_event event, int after) |
| 211 | { |
| 212 | unsigned int when; |
| 213 | |
| 214 | when = now + after; |
| 215 | if (when == 0) { |
| 216 | // event cancelled |
| 217 | pcd_event_times[event] = 0; |
| 218 | return; |
| 219 | } |
| 220 | |
| 221 | when |= 1; |
| 222 | |
| 223 | elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when); |
| 224 | pcd_event_times[event] = when; |
| 225 | |
| 226 | if (event_time_next == 0 || CYCLES_GT(event_time_next, when)) |
| 227 | event_time_next = when; |
| 228 | } |
| 229 | |
| 230 | void pcd_event_schedule_s68k(enum pcd_event event, int after) |
| 231 | { |
| 232 | if (SekCyclesLeftS68k > after) |
| 233 | SekEndRunS68k(after); |
| 234 | |
| 235 | pcd_event_schedule(SekCyclesDoneS68k(), event, after); |
| 236 | } |
| 237 | |
| 238 | static void pcd_run_events(unsigned int until) |
| 239 | { |
| 240 | int oldest, oldest_diff, time; |
| 241 | int i, diff; |
| 242 | |
| 243 | while (1) { |
| 244 | oldest = -1, oldest_diff = 0x7fffffff; |
| 245 | |
| 246 | for (i = 0; i < PCD_EVENT_COUNT; i++) { |
| 247 | if (pcd_event_times[i]) { |
| 248 | diff = pcd_event_times[i] - until; |
| 249 | if (diff < oldest_diff) { |
| 250 | oldest_diff = diff; |
| 251 | oldest = i; |
| 252 | } |
| 253 | } |
| 254 | } |
| 255 | |
| 256 | if (oldest_diff <= 0) { |
| 257 | time = pcd_event_times[oldest]; |
| 258 | pcd_event_times[oldest] = 0; |
| 259 | elprintf(EL_CD, "cd: run event #%d %u", oldest, time); |
| 260 | pcd_event_cbs[oldest](time); |
| 261 | } |
| 262 | else if (oldest_diff < 0x7fffffff) { |
| 263 | event_time_next = pcd_event_times[oldest]; |
| 264 | break; |
| 265 | } |
| 266 | else { |
| 267 | event_time_next = 0; |
| 268 | break; |
| 269 | } |
| 270 | } |
| 271 | |
| 272 | if (oldest != -1) |
| 273 | elprintf(EL_CD, "cd: next event #%d at %u", |
| 274 | oldest, event_time_next); |
| 275 | } |
| 276 | |
| 277 | int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync) |
| 278 | { |
| 279 | #define now SekCycleCntS68k |
| 280 | unsigned int s68k_target; |
| 281 | unsigned int target; |
| 282 | |
| 283 | target = m68k_target - mcd_m68k_cycle_base; |
| 284 | s68k_target = mcd_s68k_cycle_base + |
| 285 | ((unsigned long long)target * mcd_m68k_cycle_mult >> 16); |
| 286 | |
| 287 | elprintf(EL_CD, "s68k sync to %u, %u->%u", |
| 288 | m68k_target, now, s68k_target); |
| 289 | |
| 290 | if (Pico_mcd->m.busreq != 1) { /* busreq/reset */ |
| 291 | SekCycleCntS68k = SekCycleAimS68k = s68k_target; |
| 292 | pcd_run_events(m68k_target); |
| 293 | return 0; |
| 294 | } |
| 295 | |
| 296 | while (CYCLES_GT(s68k_target, now)) { |
| 297 | if (event_time_next && CYCLES_GE(now, event_time_next)) |
| 298 | pcd_run_events(now); |
| 299 | |
| 300 | target = s68k_target; |
| 301 | if (event_time_next && CYCLES_GT(target, event_time_next)) |
| 302 | target = event_time_next; |
| 303 | |
| 304 | SekRunS68k(target); |
| 305 | if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0) |
| 306 | break; |
| 307 | } |
| 308 | |
| 309 | return s68k_target - now; |
| 310 | #undef now |
| 311 | } |
| 312 | |
| 313 | #define pcd_run_cpus_normal pcd_run_cpus |
| 314 | //#define pcd_run_cpus_lockstep pcd_run_cpus |
| 315 | |
| 316 | static void SekSyncM68k(void); |
| 317 | |
| 318 | void pcd_run_cpus_normal(int m68k_cycles) |
| 319 | { |
| 320 | SekCycleAim += m68k_cycles; |
| 321 | if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12) |
| 322 | Pico_mcd->m.m68k_poll_cnt = 0; |
| 323 | else if (Pico_mcd->m.m68k_poll_cnt >= 16) { |
| 324 | int s68k_left = pcd_sync_s68k(SekCycleAim, 1); |
| 325 | if (s68k_left <= 0) { |
| 326 | elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x", |
| 327 | Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc); |
| 328 | SekCycleCnt = SekCycleAim; |
| 329 | return; |
| 330 | } |
| 331 | SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16); |
| 332 | } |
| 333 | |
| 334 | while (CYCLES_GT(SekCycleAim, SekCycleCnt)) { |
| 335 | SekRunM68kOnce(); |
| 336 | if (Pico_mcd->m.need_sync) { |
| 337 | Pico_mcd->m.need_sync = 0; |
| 338 | pcd_sync_s68k(SekCycleCnt, 0); |
| 339 | } |
| 340 | } |
| 341 | } |
| 342 | |
| 343 | void pcd_run_cpus_lockstep(int m68k_cycles) |
| 344 | { |
| 345 | unsigned int target = SekCycleAim + m68k_cycles; |
| 346 | do { |
| 347 | SekCycleAim += 8; |
| 348 | SekSyncM68k(); |
| 349 | pcd_sync_s68k(SekCycleAim, 0); |
| 350 | } while (CYCLES_GT(target, SekCycleAim)); |
| 351 | |
| 352 | SekCycleAim = target; |
| 353 | } |
| 354 | |
| 355 | #define PICO_CD |
| 356 | #define CPUS_RUN(m68k_cycles) \ |
| 357 | pcd_run_cpus(m68k_cycles) |
| 358 | |
| 359 | #include "../pico_cmn.c" |
| 360 | |
| 361 | |
| 362 | void pcd_prepare_frame(void) |
| 363 | { |
| 364 | pcd_set_cycle_mult(); |
| 365 | |
| 366 | // need this because we can't have direct mapping between |
| 367 | // master<->slave cycle counters because of overflows |
| 368 | mcd_m68k_cycle_base = SekCycleAim; |
| 369 | mcd_s68k_cycle_base = SekCycleAimS68k; |
| 370 | } |
| 371 | |
| 372 | PICO_INTERNAL void PicoFrameMCD(void) |
| 373 | { |
| 374 | PicoFrameStart(); |
| 375 | |
| 376 | pcd_prepare_frame(); |
| 377 | PicoFrameHints(); |
| 378 | } |
| 379 | |
| 380 | void pcd_state_loaded(void) |
| 381 | { |
| 382 | unsigned int cycles; |
| 383 | int diff; |
| 384 | |
| 385 | pcd_set_cycle_mult(); |
| 386 | pcd_state_loaded_mem(); |
| 387 | |
| 388 | memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf)); |
| 389 | Pico_mcd->pcm_mixbuf_dirty = 0; |
| 390 | Pico_mcd->pcm_mixpos = 0; |
| 391 | Pico_mcd->pcm_regs_dirty = 1; |
| 392 | |
| 393 | // old savestates.. |
| 394 | cycles = pcd_cycles_m68k_to_s68k(SekCycleAim); |
| 395 | diff = cycles - SekCycleAimS68k; |
| 396 | if (diff < -1000 || diff > 1000) { |
| 397 | SekCycleCntS68k = SekCycleAimS68k = cycles; |
| 398 | } |
| 399 | if (pcd_event_times[PCD_EVENT_CDC] == 0) { |
| 400 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75); |
| 401 | |
| 402 | if (Pico_mcd->s68k_regs[0x31]) |
| 403 | pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3, |
| 404 | Pico_mcd->s68k_regs[0x31] * 384); |
| 405 | } |
| 406 | |
| 407 | diff = cycles - Pico_mcd->pcm.update_cycles; |
| 408 | if ((unsigned int)diff > 12500000/50) |
| 409 | Pico_mcd->pcm.update_cycles = cycles; |
| 410 | |
| 411 | // reschedule |
| 412 | event_time_next = 0; |
| 413 | pcd_run_events(SekCycleCntS68k); |
| 414 | } |
| 415 | |
| 416 | // vim:shiftwidth=2:ts=2:expandtab |