[picodrive.git] / pico / cd / mcd.c

/*
 * PicoDrive
 * (C) notaz, 2007,2013
 *
 * This work is licensed under the terms of MAME license.
 * See COPYING file in the top-level directory.
 */

#include "../pico_int.h"
#include "../sound/ym2612.h"

extern unsigned char formatted_bram[4*0x10];

static unsigned int mcd_m68k_cycle_mult;
static unsigned int mcd_m68k_cycle_base;
static unsigned int mcd_s68k_cycle_base;

void (*PicoMCDopenTray)(void) = NULL;
void (*PicoMCDcloseTray)(void) = NULL;


PICO_INTERNAL void PicoInitMCD(void)
{
  SekInitS68k();
}

PICO_INTERNAL void PicoExitMCD(void)
{
}

PICO_INTERNAL void PicoPowerMCD(void)
{
  SekCycleCntS68k = SekCycleAimS68k = 0;

  int fmt_size = sizeof(formatted_bram);
  memset(Pico_mcd->prg_ram,    0, sizeof(Pico_mcd->prg_ram));
  memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
  memset(Pico_mcd->pcm_ram,    0, sizeof(Pico_mcd->pcm_ram));
  memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
  memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
    formatted_bram, fmt_size);
  memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
  memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
  memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));

  cdc_init();
  gfx_init();

  // cold reset state (tested)
  Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
  Pico_mcd->m.busreq = 2;     // busreq on, s68k in reset
  Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
  memset(Pico_mcd->bios + 0x70, 0xff, 4);
}

void pcd_soft_reset(void)
{
  elprintf(EL_CD, "cd: soft reset");

  Pico_mcd->m.s68k_pend_ints = 0;
  cdc_reset();
  cdd_reset();
#ifdef _ASM_CD_MEMORY_C
  //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
#endif

  memset(&Pico_mcd->s68k_regs[0x38], 0, 9);
  Pico_mcd->s68k_regs[0x38+9] = 0x0f;  // default checksum

  pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);

  // TODO: test if register state/timers change
}

PICO_INTERNAL int PicoResetMCD(void)
{
  // reset button doesn't affect MCD hardware

  // use SRam.data for RAM cart
  if (PicoOpt & POPT_EN_MCD_RAMCART) {
    if (SRam.data == NULL)
      SRam.data = calloc(1, 0x12000);
  }
  else if (SRam.data != NULL) {
    free(SRam.data);
    SRam.data = NULL;
  }
  SRam.start = SRam.end = 0; // unused

  return 0;
}

static void SekRunM68kOnce(void)
{
  int cyc_do;
  pevt_log_m68k_o(EVT_RUN_START);

  if ((cyc_do = SekCycleAim - SekCycleCnt) > 0) {
    SekCycleCnt += cyc_do;

#if defined(EMU_C68K)
    PicoCpuCM68k.cycles = cyc_do;
    CycloneRun(&PicoCpuCM68k);
    SekCycleCnt -= PicoCpuCM68k.cycles;
#elif defined(EMU_M68K)
    SekCycleCnt += m68k_execute(cyc_do) - cyc_do;
#elif defined(EMU_F68K)
    SekCycleCnt += fm68k_emulate(cyc_do, 0) - cyc_do;
#endif
  }

  SekCyclesLeft = 0;

  SekTrace(0);
  pevt_log_m68k_o(EVT_RUN_END);
}

static void SekRunS68k(unsigned int to)
{
  int cyc_do;

  SekCycleAimS68k = to;
  if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
    return;

  if (SekShouldInterrupt())
    Pico_mcd->m.s68k_poll_a = 0;

  SekCycleCntS68k += cyc_do;
#if defined(EMU_C68K)
  PicoCpuCS68k.cycles = cyc_do;
  CycloneRun(&PicoCpuCS68k);
  SekCycleCntS68k -= PicoCpuCS68k.cycles;
#elif defined(EMU_M68K)
  m68k_set_context(&PicoCpuMS68k);
  SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
  m68k_set_context(&PicoCpuMM68k);
#elif defined(EMU_F68K)
  g_m68kcontext = &PicoCpuFS68k;
  SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do;
  g_m68kcontext = &PicoCpuFM68k;
#endif
}

static void pcd_set_cycle_mult(void)
{
  // ~1.63 for NTSC, ~1.645 for PAL
  if (Pico.m.pal)
    mcd_m68k_cycle_mult = ((12500000ull << 16) / (50*313*488));
  else
    mcd_m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
}

unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
{
  return (long long)c * mcd_m68k_cycle_mult >> 16;
}

/* events */
static void pcd_cdc_event(unsigned int now)
{
  // 75Hz CDC update
  cdd_update();

  /* check if a new CDD command has been processed */
  if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0))
  {
    /* reset CDD command wait flag */
    Pico_mcd->s68k_regs[0x4b] = 0xf0;

    if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {
      elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4");
      SekInterruptS68k(4);
    }
  }

  pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
}

static void pcd_int3_timer_event(unsigned int now)
{
  if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
    elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
    SekInterruptS68k(3);
  }

  if (Pico_mcd->s68k_regs[0x31] != 0)
    pcd_event_schedule(now, PCD_EVENT_TIMER3,
      Pico_mcd->s68k_regs[0x31] * 384);
}

static void pcd_dma_event(unsigned int now)
{
  cdc_dma_update();
}

typedef void (event_cb)(unsigned int now);

/* times are in s68k (12.5MHz) cycles */
unsigned int pcd_event_times[PCD_EVENT_COUNT];
static unsigned int event_time_next;
static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
  [PCD_EVENT_CDC]      = pcd_cdc_event,
  [PCD_EVENT_TIMER3]   = pcd_int3_timer_event,
  [PCD_EVENT_GFX]      = gfx_update,
  [PCD_EVENT_DMA]      = pcd_dma_event,
};

void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
{
  unsigned int when;

  when = now + after;
  if (when == 0) {
    // event cancelled
    pcd_event_times[event] = 0;
    return;
  }

  when |= 1;

  elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
  pcd_event_times[event] = when;

  if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
    event_time_next = when;
}

void pcd_event_schedule_s68k(enum pcd_event event, int after)
{
  if (SekCyclesLeftS68k > after)
    SekEndRunS68k(after);

  pcd_event_schedule(SekCyclesDoneS68k(), event, after);
}

static void pcd_run_events(unsigned int until)
{
  int oldest, oldest_diff, time;
  int i, diff;

  while (1) {
    oldest = -1, oldest_diff = 0x7fffffff;

    for (i = 0; i < PCD_EVENT_COUNT; i++) {
      if (pcd_event_times[i]) {
        diff = pcd_event_times[i] - until;
        if (diff < oldest_diff) {
          oldest_diff = diff;
          oldest = i;
        }
      }
    }

    if (oldest_diff <= 0) {
      time = pcd_event_times[oldest];
      pcd_event_times[oldest] = 0;
      elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
      pcd_event_cbs[oldest](time);
    }
    else if (oldest_diff < 0x7fffffff) {
      event_time_next = pcd_event_times[oldest];
      break;
    }
    else {
      event_time_next = 0;
      break;
    }
  }

  if (oldest != -1)
    elprintf(EL_CD, "cd: next event #%d at %u",
      oldest, event_time_next);
}

int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
{
  #define now SekCycleCntS68k
  unsigned int s68k_target;
  unsigned int target;

  target = m68k_target - mcd_m68k_cycle_base;
  s68k_target = mcd_s68k_cycle_base +
    ((unsigned long long)target * mcd_m68k_cycle_mult >> 16);

  elprintf(EL_CD, "s68k sync to %u, %u->%u",
    m68k_target, now, s68k_target);

  if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
    SekCycleCntS68k = SekCycleAimS68k = s68k_target;
    pcd_run_events(m68k_target);
    return 0;
  }

  while (CYCLES_GT(s68k_target, now)) {
    if (event_time_next && CYCLES_GE(now, event_time_next))
      pcd_run_events(now);

    target = s68k_target;
    if (event_time_next && CYCLES_GT(target, event_time_next))
      target = event_time_next;

    SekRunS68k(target);
    if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
      break;
  }

  return s68k_target - now;
  #undef now
}

#define pcd_run_cpus_normal pcd_run_cpus
//#define pcd_run_cpus_lockstep pcd_run_cpus

static void SekSyncM68k(void);

void pcd_run_cpus_normal(int m68k_cycles)
{
  SekCycleAim += m68k_cycles;
  if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
    Pico_mcd->m.m68k_poll_cnt = 0;
  else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
    int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
    if (s68k_left <= 0) {
      elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
        Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
      SekCycleCnt = SekCycleAim;
      return;
    }
    SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
  }

  while (CYCLES_GT(SekCycleAim, SekCycleCnt)) {
    SekRunM68kOnce();
    if (Pico_mcd->m.need_sync) {
      Pico_mcd->m.need_sync = 0;
      pcd_sync_s68k(SekCycleCnt, 0);
    }
  }
}

void pcd_run_cpus_lockstep(int m68k_cycles)
{
  unsigned int target = SekCycleAim + m68k_cycles;
  do {
    SekCycleAim += 8;
    SekSyncM68k();
    pcd_sync_s68k(SekCycleAim, 0);
  } while (CYCLES_GT(target, SekCycleAim));

  SekCycleAim = target;
}

#define PICO_CD
#define CPUS_RUN(m68k_cycles) \
  pcd_run_cpus(m68k_cycles)

#include "../pico_cmn.c"


void pcd_prepare_frame(void)
{
  pcd_set_cycle_mult();

  // need this because we can't have direct mapping between
  // master<->slave cycle counters because of overflows
  mcd_m68k_cycle_base = SekCycleAim;
  mcd_s68k_cycle_base = SekCycleAimS68k;
}

PICO_INTERNAL void PicoFrameMCD(void)
{
  PicoFrameStart();

  pcd_prepare_frame();
  PicoFrameHints();
}

void pcd_state_loaded(void)
{
  unsigned int cycles;
  int diff;

  pcd_set_cycle_mult();
  pcd_state_loaded_mem();

  memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
  Pico_mcd->pcm_mixbuf_dirty = 0;
  Pico_mcd->pcm_mixpos = 0;
  Pico_mcd->pcm_regs_dirty = 1;

  // old savestates..
  cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
  diff = cycles - SekCycleAimS68k;
  if (diff < -1000 || diff > 1000) {
    SekCycleCntS68k = SekCycleAimS68k = cycles;
  }
  if (pcd_event_times[PCD_EVENT_CDC] == 0) {
    pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);

    if (Pico_mcd->s68k_regs[0x31])
      pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
        Pico_mcd->s68k_regs[0x31] * 384);
  }

  diff = cycles - Pico_mcd->pcm.update_cycles;
  if ((unsigned int)diff > 12500000/50)
    Pico_mcd->pcm.update_cycles = cycles;

  // reschedule
  event_time_next = 0;
  pcd_run_events(SekCycleCntS68k);
}

// vim:shiftwidth=2:ts=2:expandtab
Commit	Line	Data
	1	/*
	2	* PicoDrive
	3	* (C) notaz, 2007,2013
	4	*
	5	* This work is licensed under the terms of MAME license.
	6	* See COPYING file in the top-level directory.
	7	*/
	8
	9	#include "../pico_int.h"
	10	#include "../sound/ym2612.h"
	11
	12	extern unsigned char formatted_bram[4*0x10];
	13
	14	static unsigned int mcd_m68k_cycle_mult;
	15	static unsigned int mcd_m68k_cycle_base;
	16	static unsigned int mcd_s68k_cycle_base;
	17
	18	void (*PicoMCDopenTray)(void) = NULL;
	19	void (*PicoMCDcloseTray)(void) = NULL;
	20
	21
	22	PICO_INTERNAL void PicoInitMCD(void)
	23	{
	24	SekInitS68k();
	25	}
	26
	27	PICO_INTERNAL void PicoExitMCD(void)
	28	{
	29	}
	30
	31	PICO_INTERNAL void PicoPowerMCD(void)
	32	{
	33	SekCycleCntS68k = SekCycleAimS68k = 0;
	34
	35	int fmt_size = sizeof(formatted_bram);
	36	memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
	37	memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
	38	memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
	39	memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
	40	memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
	41	formatted_bram, fmt_size);
	42	memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
	43	memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
	44	memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
	45
	46	cdc_init();
	47	gfx_init();
	48
	49	// cold reset state (tested)
	50	Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
	51	Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
	52	Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
	53	memset(Pico_mcd->bios + 0x70, 0xff, 4);
	54	}
	55
	56	void pcd_soft_reset(void)
	57	{
	58	elprintf(EL_CD, "cd: soft reset");
	59
	60	Pico_mcd->m.s68k_pend_ints = 0;
	61	cdc_reset();
	62	cdd_reset();
	63	#ifdef _ASM_CD_MEMORY_C
	64	//PicoMemResetCDdecode(1); // don't have to call this in 2M mode
	65	#endif
	66
	67	memset(&Pico_mcd->s68k_regs[0x38], 0, 9);
	68	Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum
	69
	70	pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
	71
	72	// TODO: test if register state/timers change
	73	}
	74
	75	PICO_INTERNAL int PicoResetMCD(void)
	76	{
	77	// reset button doesn't affect MCD hardware
	78
	79	// use SRam.data for RAM cart
	80	if (PicoOpt & POPT_EN_MCD_RAMCART) {
	81	if (SRam.data == NULL)
	82	SRam.data = calloc(1, 0x12000);
	83	}
	84	else if (SRam.data != NULL) {
	85	free(SRam.data);
	86	SRam.data = NULL;
	87	}
	88	SRam.start = SRam.end = 0; // unused
	89
	90	return 0;
	91	}
	92
	93	static void SekRunM68kOnce(void)
	94	{
	95	int cyc_do;
	96	pevt_log_m68k_o(EVT_RUN_START);
	97
	98	if ((cyc_do = SekCycleAim - SekCycleCnt) > 0) {
	99	SekCycleCnt += cyc_do;
	100
	101	#if defined(EMU_C68K)
	102	PicoCpuCM68k.cycles = cyc_do;
	103	CycloneRun(&PicoCpuCM68k);
	104	SekCycleCnt -= PicoCpuCM68k.cycles;
	105	#elif defined(EMU_M68K)
	106	SekCycleCnt += m68k_execute(cyc_do) - cyc_do;
	107	#elif defined(EMU_F68K)
	108	SekCycleCnt += fm68k_emulate(cyc_do, 0) - cyc_do;
	109	#endif
	110	}
	111
	112	SekCyclesLeft = 0;
	113
	114	SekTrace(0);
	115	pevt_log_m68k_o(EVT_RUN_END);
	116	}
	117
	118	static void SekRunS68k(unsigned int to)
	119	{
	120	int cyc_do;
	121
	122	SekCycleAimS68k = to;
	123	if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
	124	return;
	125
	126	if (SekShouldInterrupt())
	127	Pico_mcd->m.s68k_poll_a = 0;
	128
	129	SekCycleCntS68k += cyc_do;
	130	#if defined(EMU_C68K)
	131	PicoCpuCS68k.cycles = cyc_do;
	132	CycloneRun(&PicoCpuCS68k);
	133	SekCycleCntS68k -= PicoCpuCS68k.cycles;
	134	#elif defined(EMU_M68K)
	135	m68k_set_context(&PicoCpuMS68k);
	136	SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
	137	m68k_set_context(&PicoCpuMM68k);
	138	#elif defined(EMU_F68K)
	139	g_m68kcontext = &PicoCpuFS68k;
	140	SekCycleCntS68k += fm68k_emulate(cyc_do, 0) - cyc_do;
	141	g_m68kcontext = &PicoCpuFM68k;
	142	#endif
	143	}
	144
	145	static void pcd_set_cycle_mult(void)
	146	{
	147	// ~1.63 for NTSC, ~1.645 for PAL
	148	if (Pico.m.pal)
	149	mcd_m68k_cycle_mult = ((12500000ull << 16) / (50313488));
	150	else
	151	mcd_m68k_cycle_mult = ((12500000ull << 16) / (60262488)) + 1;
	152	}
	153
	154	unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
	155	{
	156	return (long long)c * mcd_m68k_cycle_mult >> 16;
	157	}
	158
	159	/* events */
	160	static void pcd_cdc_event(unsigned int now)
	161	{
	162	// 75Hz CDC update
	163	cdd_update();
	164
	165	/* check if a new CDD command has been processed */
	166	if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0))
	167	{
	168	/* reset CDD command wait flag */
	169	Pico_mcd->s68k_regs[0x4b] = 0xf0;
	170
	171	if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {
	172	elprintf(EL_INTS\|EL_CD, "s68k: cdd irq 4");
	173	SekInterruptS68k(4);
	174	}
	175	}
	176
	177	pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
	178	}
	179
	180	static void pcd_int3_timer_event(unsigned int now)
	181	{
	182	if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
	183	elprintf(EL_INTS\|EL_CD, "s68k: timer irq 3");
	184	SekInterruptS68k(3);
	185	}
	186
	187	if (Pico_mcd->s68k_regs[0x31] != 0)
	188	pcd_event_schedule(now, PCD_EVENT_TIMER3,
	189	Pico_mcd->s68k_regs[0x31] * 384);
	190	}
	191
	192	static void pcd_dma_event(unsigned int now)
	193	{
	194	cdc_dma_update();
	195	}
	196
	197	typedef void (event_cb)(unsigned int now);
	198
	199	/* times are in s68k (12.5MHz) cycles */
	200	unsigned int pcd_event_times[PCD_EVENT_COUNT];
	201	static unsigned int event_time_next;
	202	static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
	203	[PCD_EVENT_CDC] = pcd_cdc_event,
	204	[PCD_EVENT_TIMER3] = pcd_int3_timer_event,
	205	[PCD_EVENT_GFX] = gfx_update,
	206	[PCD_EVENT_DMA] = pcd_dma_event,
	207	};
	208
	209	void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
	210	{
	211	unsigned int when;
	212
	213	when = now + after;
	214	if (when == 0) {
	215	// event cancelled
	216	pcd_event_times[event] = 0;
	217	return;
	218	}
	219
	220	when \|= 1;
	221
	222	elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
	223	pcd_event_times[event] = when;
	224
	225	if (event_time_next == 0 \|\| CYCLES_GT(event_time_next, when))
	226	event_time_next = when;
	227	}
	228
	229	void pcd_event_schedule_s68k(enum pcd_event event, int after)
	230	{
	231	if (SekCyclesLeftS68k > after)
	232	SekEndRunS68k(after);
	233
	234	pcd_event_schedule(SekCyclesDoneS68k(), event, after);
	235	}
	236
	237	static void pcd_run_events(unsigned int until)
	238	{
	239	int oldest, oldest_diff, time;
	240	int i, diff;
	241
	242	while (1) {
	243	oldest = -1, oldest_diff = 0x7fffffff;
	244
	245	for (i = 0; i < PCD_EVENT_COUNT; i++) {
	246	if (pcd_event_times[i]) {
	247	diff = pcd_event_times[i] - until;
	248	if (diff < oldest_diff) {
	249	oldest_diff = diff;
	250	oldest = i;
	251	}
	252	}
	253	}
	254
	255	if (oldest_diff <= 0) {
	256	time = pcd_event_times[oldest];
	257	pcd_event_times[oldest] = 0;
	258	elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
	259	pcd_event_cbs[oldest](time);
	260	}
	261	else if (oldest_diff < 0x7fffffff) {
	262	event_time_next = pcd_event_times[oldest];
	263	break;
	264	}
	265	else {
	266	event_time_next = 0;
	267	break;
	268	}
	269	}
	270
	271	if (oldest != -1)
	272	elprintf(EL_CD, "cd: next event #%d at %u",
	273	oldest, event_time_next);
	274	}
	275
	276	int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
	277	{
	278	#define now SekCycleCntS68k
	279	unsigned int s68k_target;
	280	unsigned int target;
	281
	282	target = m68k_target - mcd_m68k_cycle_base;
	283	s68k_target = mcd_s68k_cycle_base +
	284	((unsigned long long)target * mcd_m68k_cycle_mult >> 16);
	285
	286	elprintf(EL_CD, "s68k sync to %u, %u->%u",
	287	m68k_target, now, s68k_target);
	288
	289	if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
	290	SekCycleCntS68k = SekCycleAimS68k = s68k_target;
	291	pcd_run_events(m68k_target);
	292	return 0;
	293	}
	294
	295	while (CYCLES_GT(s68k_target, now)) {
	296	if (event_time_next && CYCLES_GE(now, event_time_next))
	297	pcd_run_events(now);
	298
	299	target = s68k_target;
	300	if (event_time_next && CYCLES_GT(target, event_time_next))
	301	target = event_time_next;
	302
	303	SekRunS68k(target);
	304	if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
	305	break;
	306	}
	307
	308	return s68k_target - now;
	309	#undef now
	310	}
	311
	312	#define pcd_run_cpus_normal pcd_run_cpus
	313	//#define pcd_run_cpus_lockstep pcd_run_cpus
	314
	315	static void SekSyncM68k(void);
	316
	317	void pcd_run_cpus_normal(int m68k_cycles)
	318	{
	319	SekCycleAim += m68k_cycles;
	320	if (SekShouldInterrupt() \|\| Pico_mcd->m.m68k_poll_cnt < 12)
	321	Pico_mcd->m.m68k_poll_cnt = 0;
	322	else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
	323	int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
	324	if (s68k_left <= 0) {
	325	elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
	326	Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
	327	SekCycleCnt = SekCycleAim;
	328	return;
	329	}
	330	SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
	331	}
	332
	333	while (CYCLES_GT(SekCycleAim, SekCycleCnt)) {
	334	SekRunM68kOnce();
	335	if (Pico_mcd->m.need_sync) {
	336	Pico_mcd->m.need_sync = 0;
	337	pcd_sync_s68k(SekCycleCnt, 0);
	338	}
	339	}
	340	}
	341
	342	void pcd_run_cpus_lockstep(int m68k_cycles)
	343	{
	344	unsigned int target = SekCycleAim + m68k_cycles;
	345	do {
	346	SekCycleAim += 8;
	347	SekSyncM68k();
	348	pcd_sync_s68k(SekCycleAim, 0);
	349	} while (CYCLES_GT(target, SekCycleAim));
	350
	351	SekCycleAim = target;
	352	}
	353
	354	#define PICO_CD
	355	#define CPUS_RUN(m68k_cycles) \
	356	pcd_run_cpus(m68k_cycles)
	357
	358	#include "../pico_cmn.c"
	359
	360
	361	void pcd_prepare_frame(void)
	362	{
	363	pcd_set_cycle_mult();
	364
	365	// need this because we can't have direct mapping between
	366	// master<->slave cycle counters because of overflows
	367	mcd_m68k_cycle_base = SekCycleAim;
	368	mcd_s68k_cycle_base = SekCycleAimS68k;
	369	}
	370
	371	PICO_INTERNAL void PicoFrameMCD(void)
	372	{
	373	PicoFrameStart();
	374
	375	pcd_prepare_frame();
	376	PicoFrameHints();
	377	}
	378
	379	void pcd_state_loaded(void)
	380	{
	381	unsigned int cycles;
	382	int diff;
	383
	384	pcd_set_cycle_mult();
	385	pcd_state_loaded_mem();
	386
	387	memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
	388	Pico_mcd->pcm_mixbuf_dirty = 0;
	389	Pico_mcd->pcm_mixpos = 0;
	390	Pico_mcd->pcm_regs_dirty = 1;
	391
	392	// old savestates..
	393	cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
	394	diff = cycles - SekCycleAimS68k;
	395	if (diff < -1000 \|\| diff > 1000) {
	396	SekCycleCntS68k = SekCycleAimS68k = cycles;
	397	}
	398	if (pcd_event_times[PCD_EVENT_CDC] == 0) {
	399	pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
	400
	401	if (Pico_mcd->s68k_regs[0x31])
	402	pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
	403	Pico_mcd->s68k_regs[0x31] * 384);
	404	}
	405
	406	diff = cycles - Pico_mcd->pcm.update_cycles;
	407	if ((unsigned int)diff > 12500000/50)
	408	Pico_mcd->pcm.update_cycles = cycles;
	409
	410	// reschedule
	411	event_time_next = 0;
	412	pcd_run_events(SekCycleCntS68k);
	413	}
	414
	415	// vim:shiftwidth=2:ts=2:expandtab