[picodrive.git] / pico / cd / mcd.c

/*
 * PicoDrive
 * (C) notaz, 2007,2013
 * (C) irixxxx, 2019-2024
 *
 * This work is licensed under the terms of MAME license.
 * See COPYING file in the top-level directory.
 */

#include "../pico_int.h"
#include "../sound/ym2612.h"
#include "megasd.h"

extern unsigned char formatted_bram[4*0x10];

static unsigned int mcd_m68k_cycle_mult;
static unsigned int mcd_s68k_cycle_mult;
static unsigned int mcd_m68k_cycle_base;
static unsigned int mcd_s68k_cycle_base;

mcd_state *Pico_mcd;

PICO_INTERNAL void PicoCreateMCD(unsigned char *bios_data, int bios_size)
{
  if (!Pico_mcd) {
    Pico_mcd = plat_mmap(0x05000000, sizeof(mcd_state), 0, 0);
    if (Pico_mcd == NULL) {
      elprintf(EL_STATUS, "OOM");
      return;
    }
  }
  memset(Pico_mcd, 0, sizeof(mcd_state));

  if (bios_data && bios_size > 0) {
    if (bios_size > sizeof(Pico_mcd->bios))
      bios_size = sizeof(Pico_mcd->bios);
    memcpy(Pico_mcd->bios, bios_data, bios_size);
  }
}

PICO_INTERNAL void PicoInitMCD(void)
{
  SekInitS68k();
}

PICO_INTERNAL void PicoExitMCD(void)
{
  cdd_unload();
  if (Pico_mcd) {
    plat_munmap(Pico_mcd, sizeof(mcd_state));
    Pico_mcd = NULL;
  }
}

PICO_INTERNAL void PicoPowerMCD(void)
{
  int fmt_size;

  SekResetS68k();
  SekCycleCntS68k = SekCycleAimS68k = 0;

  fmt_size = sizeof(formatted_bram);
  memset(Pico_mcd->prg_ram,    0, sizeof(Pico_mcd->prg_ram));
  memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
  memset(Pico_mcd->pcm_ram,    0, sizeof(Pico_mcd->pcm_ram));
  memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
  memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
    formatted_bram, fmt_size);
  memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
  memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
  memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));

  cdc_init();
  gfx_init();

  // cold reset state (tested)
  Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
  Pico_mcd->m.busreq = 2;     // busreq on, s68k in reset
  Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
  if (Pico.romsize == 0) // no HINT vector from gate array for MSU
    memset(Pico_mcd->bios + 0x70, 0xff, 4);
  pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);

  cdc_reset();
  cdd_reset();
}

void pcd_soft_reset(void)
{
  elprintf(EL_CD, "cd: soft reset");

  Pico_mcd->m.s68k_pend_ints = 0;
  cdc_reset();
  cdd_reset();
#ifdef _ASM_CD_MEMORY_C
  //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
#endif

  memset(&Pico_mcd->s68k_regs[0x38], 0, 9);
  Pico_mcd->s68k_regs[0x38+9] = 0x0f;  // default checksum

  pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);

  // TODO: test if register state/timers change
}

PICO_INTERNAL int PicoResetMCD(void)
{
  // reset button doesn't affect MCD hardware

  // use Pico.sv.data for RAM cart
  if (Pico.romsize == 0) {
    if (PicoIn.opt & POPT_EN_MCD_RAMCART) {
      if (Pico.sv.data == NULL)
        Pico.sv.data = calloc(1, 0x12000);
    }
    else if (Pico.sv.data != NULL) {
      free(Pico.sv.data);
      Pico.sv.data = NULL;
    }
    Pico.sv.start = Pico.sv.end = 0; // unused
  }

  return 0;
}

static void SekRunS68k(unsigned int to)
{
  int cyc_do;

  SekCycleAimS68k = to;
  if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
    return;

  pprof_start(s68k);
  SekCycleCntS68k += cyc_do;
#if defined(EMU_C68K)
  PicoCpuCS68k.cycles = cyc_do;
  CycloneRun(&PicoCpuCS68k);
  SekCycleCntS68k -= PicoCpuCS68k.cycles;
#elif defined(EMU_M68K)
  m68k_set_context(&PicoCpuMS68k);
  SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
  m68k_set_context(&PicoCpuMM68k);
#elif defined(EMU_F68K)
  SekCycleCntS68k += fm68k_emulate(&PicoCpuFS68k, cyc_do, 0) - cyc_do;
#endif
  SekCyclesLeftS68k = 0;
  pprof_end(s68k);
}

void PicoMCDPrepare(void)
{
  // 12500000/(osc/7), ~1.63 for NTSC, ~1.645 for PAL
#define DIV_ROUND(x,y) ((x)+(y)/2) / (y) // round to nearest, x/y+0.5 -> (x+y/2)/y
  unsigned int osc = (Pico.m.pal ? OSC_PAL : OSC_NTSC);
  mcd_m68k_cycle_mult = DIV_ROUND(7 * 12500000ull << 16, osc);
  mcd_s68k_cycle_mult = DIV_ROUND(1ull * osc << 16, 7 * 12500000);
}

unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
{
  return (long long)c * mcd_m68k_cycle_mult >> 16;
}

/* events */
static void pcd_cdc_event(unsigned int now)
{
  int audio = Pico_mcd->s68k_regs[0x36] & 0x1;

  // 75Hz CDC update
  cdd_update();

  // main 68k cycles since frame start
  int cycles = 1LL*(now-mcd_s68k_cycle_base) * mcd_s68k_cycle_mult >> 16;
  // samples@rate since frame start
  int samples = 1LL * cycles_68k_to_z80(cycles) * Pico.snd.clkz_mult >> 20;
  // samples@44100Hz since frame start
  samples = samples * Pico.snd.cdda_mult >> 16;
  if (samples < 2352/4) // save offset to 1st used sample for state saving
    Pico_mcd->m.cdda_lba_offset = 2352/4 - samples;

  /* if audio just turned on, store start offset for sound */
  audio &= !(Pico_mcd->s68k_regs[0x36] & 0x1);
  if (audio) {
    Pico_mcd->m.cdda_lba_offset = 0; // starting with full lba
    Pico_mcd->cdda_frame_offs = samples;
  }

  /* check if a new CDD command has been processed */
  if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0))
  {
    /* reset CDD command wait flag */
    Pico_mcd->s68k_regs[0x4b] = 0xf0;
  }

  if ((Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) && (Pico_mcd->s68k_regs[0x37] & 4)) {
    elprintf(EL_INTS|EL_CD, "s68k: cdd irq 4");
    pcd_irq_s68k(4, 1);
  }

  msd_update();

  pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
}

static void pcd_int3_timer_event(unsigned int now)
{
  if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
    elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
    pcd_irq_s68k(3, 1);
  }

  if (Pico_mcd->s68k_regs[0x31] != 0)
    pcd_event_schedule(now, PCD_EVENT_TIMER3,
      (Pico_mcd->s68k_regs[0x31]+1) * 384);
}

static void pcd_dma_event(unsigned int now)
{
  cdc_dma_update();
}

typedef void (event_cb)(unsigned int now);

/* times are in s68k (12.5MHz) cycles */
unsigned int pcd_event_times[PCD_EVENT_COUNT];
static unsigned int event_time_next;
static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
  pcd_cdc_event,            // PCD_EVENT_CDC
  pcd_int3_timer_event,     // PCD_EVENT_TIMER3
  gfx_update,               // PCD_EVENT_GFX
  pcd_dma_event,            // PCD_EVENT_DMA
};

void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
{
  unsigned int when;

  if ((now|after) == 0) {
    // event cancelled
    pcd_event_times[event] = 0;
    return;
  }

  when = now + after;
  when |= 1;

  elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
  pcd_event_times[event] = when;

  if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
    event_time_next = when;
}

void pcd_event_schedule_s68k(enum pcd_event event, int after)
{
  SekEndRunS68k(after);

  pcd_event_schedule(SekCyclesDoneS68k(), event, after);
}

static void pcd_run_events(unsigned int until)
{
  int oldest, oldest_diff, time;
  int i, diff;

  while (1) {
    oldest = -1, oldest_diff = 0x7fffffff;

    for (i = 0; i < PCD_EVENT_COUNT; i++) {
      if (pcd_event_times[i]) {
        diff = pcd_event_times[i] - until;
        if (diff < oldest_diff) {
          oldest_diff = diff;
          oldest = i;
        }
      }
    }

    if (oldest_diff <= 0) {
      time = pcd_event_times[oldest];
      pcd_event_times[oldest] = 0;
      elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
      pcd_event_cbs[oldest](time);
    }
    else if (oldest_diff < 0x7fffffff) {
      event_time_next = pcd_event_times[oldest];
      break;
    }
    else {
      event_time_next = 0;
      break;
    }
  }

  if (oldest != -1)
    elprintf(EL_CD, "cd: next event #%d at %u",
      oldest, event_time_next);
}

void pcd_irq_s68k(int irq, int state)
{
  if (state) {
    SekInterruptS68k(irq);
    Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
    Pico_mcd->m.s68k_poll_cnt = 0;
  } else
    SekInterruptClearS68k(irq);
}

int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
{
  #define now SekCycleCntS68k
  unsigned int s68k_target;
  unsigned int target;

  target = m68k_target - mcd_m68k_cycle_base;
  s68k_target = mcd_s68k_cycle_base +
    ((unsigned long long)target * mcd_m68k_cycle_mult >> 16);

  elprintf(EL_CD, "s68k sync to %u, %u->%u",
    m68k_target, now, s68k_target);

  if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
    SekCycleCntS68k = SekCycleAimS68k = s68k_target;
    pcd_run_events(s68k_target);
    return 0;
  }

  while (CYCLES_GT(s68k_target, now)) {
    if (event_time_next && CYCLES_GE(now, event_time_next))
      pcd_run_events(now);

    target = s68k_target;
    if (event_time_next && CYCLES_GT(target, event_time_next))
      target = event_time_next;

    if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP))
      SekCycleCntS68k = SekCycleAimS68k = target;
    else
      SekRunS68k(target);

    if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
      break;
  }

  return s68k_target - now;
  #undef now
}

#define pcd_run_cpus_normal pcd_run_cpus
//#define pcd_run_cpus_lockstep pcd_run_cpus

static void SekAimM68k(int cyc, int mult);
static int SekSyncM68k(int once);

void pcd_run_cpus_normal(int m68k_cycles)
{
  SekAimM68k(m68k_cycles, 0x108);

  while (CYCLES_GT(Pico.t.m68c_aim, Pico.t.m68c_cnt)) {
    if (SekShouldInterrupt()) {
      Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
      Pico_mcd->m.m68k_poll_cnt = 0;
    }

#ifdef USE_POLL_DETECT
    if (Pico_mcd->m.state_flags & PCD_ST_M68K_POLL) {
      int s68k_left;
      // main CPU is polling, (wake and) run sub only
      if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) {
        Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP);
        Pico_mcd->m.s68k_poll_cnt = 0;
      }
      s68k_left = pcd_sync_s68k(Pico.t.m68c_aim, 1);

      Pico.t.m68c_cnt = Pico.t.m68c_aim;
      if (s68k_left > 0)
        Pico.t.m68c_cnt -= ((long long)s68k_left * mcd_s68k_cycle_mult >> 16);
      if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) {
        // slave has stopped, wake master to avoid lockups
        Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
        Pico_mcd->m.m68k_poll_cnt = 0;
      }

      elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
        Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
    } else
#endif
    {
      SekSyncM68k(1);
      // make sure sub doesn't get too far out of sync with main
      if (!(Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) &&
          pcd_cycles_m68k_to_s68k(Pico.t.m68c_aim - mcd_m68k_cycle_base) >
                           5000 + SekCycleAimS68k - mcd_s68k_cycle_base)
        pcd_sync_s68k(Pico.t.m68c_cnt, 0);
    }
    if (Pico_mcd->m.state_flags & PCD_ST_S68K_SYNC) {
      Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SYNC;
      pcd_sync_s68k(Pico.t.m68c_cnt, 0);
    }
  }
}

void pcd_run_cpus_lockstep(int m68k_cycles)
{
  unsigned int target = Pico.t.m68c_aim + m68k_cycles;

  while (CYCLES_GT(target, Pico.t.m68c_aim)) {
    int cycles = target - Pico.t.m68c_aim;
    if (cycles > 8) cycles = 8;
    SekAimM68k(cycles, 0x108);
    SekSyncM68k(1);
    pcd_sync_s68k(Pico.t.m68c_cnt, 0);
  }
}

#define PICO_CD
#define CPUS_RUN(m68k_cycles) \
  pcd_run_cpus(m68k_cycles)

#include "../pico_cmn.c"


void pcd_prepare_frame(void)
{
  // need this because we can't have direct mapping between
  // master<->slave cycle counters because of overflows
  mcd_m68k_cycle_base = Pico.t.m68c_aim;
  mcd_s68k_cycle_base = SekCycleAimS68k;
}

PICO_INTERNAL void PicoFrameMCD(void)
{
  PicoFrameStart();

  pcd_prepare_frame();
  PicoFrameHints();
}

void pcd_state_loaded(void)
{
  unsigned int cycles;

  pcd_state_loaded_mem();

  memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
  Pico_mcd->pcm_mixbuf_dirty = 0;
  Pico_mcd->pcm_mixpos = 0;
  Pico_mcd->pcm_regs_dirty = 1;

  // old savestates..
  cycles = pcd_cycles_m68k_to_s68k(Pico.t.m68c_aim);
  if (CYCLES_GE(cycles - SekCycleAimS68k, 12500000/60)) {
    SekCycleCntS68k = SekCycleAimS68k = cycles;
  }
  if (pcd_event_times[PCD_EVENT_CDC] == 0) {
    pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);

    if (Pico_mcd->s68k_regs[0x31])
      pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
        (Pico_mcd->s68k_regs[0x31]+1) * 384);
  }

  if (CYCLES_GE(cycles - Pico_mcd->pcm.update_cycles, 12500000/50))
    Pico_mcd->pcm.update_cycles = cycles;

  if (Pico_mcd->m.need_sync) {
    Pico_mcd->m.state_flags |= PCD_ST_S68K_SYNC;
    Pico_mcd->m.need_sync = 0;
  }

  // reschedule
  event_time_next = 0;
  pcd_run_events(SekCycleCntS68k);

  // msd
  msd_load();
}

// vim:shiftwidth=2:ts=2:expandtab
Commit	Line	Data
	1	/*
	2	* PicoDrive
	3	* (C) notaz, 2007,2013
	4	* (C) irixxxx, 2019-2024
	5	*
	6	* This work is licensed under the terms of MAME license.
	7	* See COPYING file in the top-level directory.
	8	*/
	9
	10	#include "../pico_int.h"
	11	#include "../sound/ym2612.h"
	12	#include "megasd.h"
	13
	14	extern unsigned char formatted_bram[4*0x10];
	15
	16	static unsigned int mcd_m68k_cycle_mult;
	17	static unsigned int mcd_s68k_cycle_mult;
	18	static unsigned int mcd_m68k_cycle_base;
	19	static unsigned int mcd_s68k_cycle_base;
	20
	21	mcd_state *Pico_mcd;
	22
	23	PICO_INTERNAL void PicoCreateMCD(unsigned char *bios_data, int bios_size)
	24	{
	25	if (!Pico_mcd) {
	26	Pico_mcd = plat_mmap(0x05000000, sizeof(mcd_state), 0, 0);
	27	if (Pico_mcd == NULL) {
	28	elprintf(EL_STATUS, "OOM");
	29	return;
	30	}
	31	}
	32	memset(Pico_mcd, 0, sizeof(mcd_state));
	33
	34	if (bios_data && bios_size > 0) {
	35	if (bios_size > sizeof(Pico_mcd->bios))
	36	bios_size = sizeof(Pico_mcd->bios);
	37	memcpy(Pico_mcd->bios, bios_data, bios_size);
	38	}
	39	}
	40
	41	PICO_INTERNAL void PicoInitMCD(void)
	42	{
	43	SekInitS68k();
	44	}
	45
	46	PICO_INTERNAL void PicoExitMCD(void)
	47	{
	48	cdd_unload();
	49	if (Pico_mcd) {
	50	plat_munmap(Pico_mcd, sizeof(mcd_state));
	51	Pico_mcd = NULL;
	52	}
	53	}
	54
	55	PICO_INTERNAL void PicoPowerMCD(void)
	56	{
	57	int fmt_size;
	58
	59	SekResetS68k();
	60	SekCycleCntS68k = SekCycleAimS68k = 0;
	61
	62	fmt_size = sizeof(formatted_bram);
	63	memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
	64	memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
	65	memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
	66	memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
	67	memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
	68	formatted_bram, fmt_size);
	69	memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
	70	memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
	71	memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
	72
	73	cdc_init();
	74	gfx_init();
	75
	76	// cold reset state (tested)
	77	Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
	78	Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
	79	Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
	80	if (Pico.romsize == 0) // no HINT vector from gate array for MSU
	81	memset(Pico_mcd->bios + 0x70, 0xff, 4);
	82	pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
	83
	84	cdc_reset();
	85	cdd_reset();
	86	}
	87
	88	void pcd_soft_reset(void)
	89	{
	90	elprintf(EL_CD, "cd: soft reset");
	91
	92	Pico_mcd->m.s68k_pend_ints = 0;
	93	cdc_reset();
	94	cdd_reset();
	95	#ifdef _ASM_CD_MEMORY_C
	96	//PicoMemResetCDdecode(1); // don't have to call this in 2M mode
	97	#endif
	98
	99	memset(&Pico_mcd->s68k_regs[0x38], 0, 9);
	100	Pico_mcd->s68k_regs[0x38+9] = 0x0f; // default checksum
	101
	102	pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
	103
	104	// TODO: test if register state/timers change
	105	}
	106
	107	PICO_INTERNAL int PicoResetMCD(void)
	108	{
	109	// reset button doesn't affect MCD hardware
	110
	111	// use Pico.sv.data for RAM cart
	112	if (Pico.romsize == 0) {
	113	if (PicoIn.opt & POPT_EN_MCD_RAMCART) {
	114	if (Pico.sv.data == NULL)
	115	Pico.sv.data = calloc(1, 0x12000);
	116	}
	117	else if (Pico.sv.data != NULL) {
	118	free(Pico.sv.data);
	119	Pico.sv.data = NULL;
	120	}
	121	Pico.sv.start = Pico.sv.end = 0; // unused
	122	}
	123
	124	return 0;
	125	}
	126
	127	static void SekRunS68k(unsigned int to)
	128	{
	129	int cyc_do;
	130
	131	SekCycleAimS68k = to;
	132	if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
	133	return;
	134
	135	pprof_start(s68k);
	136	SekCycleCntS68k += cyc_do;
	137	#if defined(EMU_C68K)
	138	PicoCpuCS68k.cycles = cyc_do;
	139	CycloneRun(&PicoCpuCS68k);
	140	SekCycleCntS68k -= PicoCpuCS68k.cycles;
	141	#elif defined(EMU_M68K)
	142	m68k_set_context(&PicoCpuMS68k);
	143	SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
	144	m68k_set_context(&PicoCpuMM68k);
	145	#elif defined(EMU_F68K)
	146	SekCycleCntS68k += fm68k_emulate(&PicoCpuFS68k, cyc_do, 0) - cyc_do;
	147	#endif
	148	SekCyclesLeftS68k = 0;
	149	pprof_end(s68k);
	150	}
	151
	152	void PicoMCDPrepare(void)
	153	{
	154	// 12500000/(osc/7), ~1.63 for NTSC, ~1.645 for PAL
	155	#define DIV_ROUND(x,y) ((x)+(y)/2) / (y) // round to nearest, x/y+0.5 -> (x+y/2)/y
	156	unsigned int osc = (Pico.m.pal ? OSC_PAL : OSC_NTSC);
	157	mcd_m68k_cycle_mult = DIV_ROUND(7 * 12500000ull << 16, osc);
	158	mcd_s68k_cycle_mult = DIV_ROUND(1ull * osc << 16, 7 * 12500000);
	159	}
	160
	161	unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
	162	{
	163	return (long long)c * mcd_m68k_cycle_mult >> 16;
	164	}
	165
	166	/* events */
	167	static void pcd_cdc_event(unsigned int now)
	168	{
	169	int audio = Pico_mcd->s68k_regs[0x36] & 0x1;
	170
	171	// 75Hz CDC update
	172	cdd_update();
	173
	174	// main 68k cycles since frame start
	175	int cycles = 1LL(now-mcd_s68k_cycle_base) mcd_s68k_cycle_mult >> 16;
	176	// samples@rate since frame start
	177	int samples = 1LL * cycles_68k_to_z80(cycles) * Pico.snd.clkz_mult >> 20;
	178	// samples@44100Hz since frame start
	179	samples = samples * Pico.snd.cdda_mult >> 16;
	180	if (samples < 2352/4) // save offset to 1st used sample for state saving
	181	Pico_mcd->m.cdda_lba_offset = 2352/4 - samples;
	182
	183	/* if audio just turned on, store start offset for sound */
	184	audio &= !(Pico_mcd->s68k_regs[0x36] & 0x1);
	185	if (audio) {
	186	Pico_mcd->m.cdda_lba_offset = 0; // starting with full lba
	187	Pico_mcd->cdda_frame_offs = samples;
	188	}
	189
	190	/* check if a new CDD command has been processed */
	191	if (!(Pico_mcd->s68k_regs[0x4b] & 0xf0))
	192	{
	193	/* reset CDD command wait flag */
	194	Pico_mcd->s68k_regs[0x4b] = 0xf0;
	195	}
	196
	197	if ((Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) && (Pico_mcd->s68k_regs[0x37] & 4)) {
	198	elprintf(EL_INTS\|EL_CD, "s68k: cdd irq 4");
	199	pcd_irq_s68k(4, 1);
	200	}
	201
	202	msd_update();
	203
	204	pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
	205	}
	206
	207	static void pcd_int3_timer_event(unsigned int now)
	208	{
	209	if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
	210	elprintf(EL_INTS\|EL_CD, "s68k: timer irq 3");
	211	pcd_irq_s68k(3, 1);
	212	}
	213
	214	if (Pico_mcd->s68k_regs[0x31] != 0)
	215	pcd_event_schedule(now, PCD_EVENT_TIMER3,
	216	(Pico_mcd->s68k_regs[0x31]+1) * 384);
	217	}
	218
	219	static void pcd_dma_event(unsigned int now)
	220	{
	221	cdc_dma_update();
	222	}
	223
	224	typedef void (event_cb)(unsigned int now);
	225
	226	/* times are in s68k (12.5MHz) cycles */
	227	unsigned int pcd_event_times[PCD_EVENT_COUNT];
	228	static unsigned int event_time_next;
	229	static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
	230	pcd_cdc_event, // PCD_EVENT_CDC
	231	pcd_int3_timer_event, // PCD_EVENT_TIMER3
	232	gfx_update, // PCD_EVENT_GFX
	233	pcd_dma_event, // PCD_EVENT_DMA
	234	};
	235
	236	void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
	237	{
	238	unsigned int when;
	239
	240	if ((now\|after) == 0) {
	241	// event cancelled
	242	pcd_event_times[event] = 0;
	243	return;
	244	}
	245
	246	when = now + after;
	247	when \|= 1;
	248
	249	elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
	250	pcd_event_times[event] = when;
	251
	252	if (event_time_next == 0 \|\| CYCLES_GT(event_time_next, when))
	253	event_time_next = when;
	254	}
	255
	256	void pcd_event_schedule_s68k(enum pcd_event event, int after)
	257	{
	258	SekEndRunS68k(after);
	259
	260	pcd_event_schedule(SekCyclesDoneS68k(), event, after);
	261	}
	262
	263	static void pcd_run_events(unsigned int until)
	264	{
	265	int oldest, oldest_diff, time;
	266	int i, diff;
	267
	268	while (1) {
	269	oldest = -1, oldest_diff = 0x7fffffff;
	270
	271	for (i = 0; i < PCD_EVENT_COUNT; i++) {
	272	if (pcd_event_times[i]) {
	273	diff = pcd_event_times[i] - until;
	274	if (diff < oldest_diff) {
	275	oldest_diff = diff;
	276	oldest = i;
	277	}
	278	}
	279	}
	280
	281	if (oldest_diff <= 0) {
	282	time = pcd_event_times[oldest];
	283	pcd_event_times[oldest] = 0;
	284	elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
	285	pcd_event_cbs[oldest](time);
	286	}
	287	else if (oldest_diff < 0x7fffffff) {
	288	event_time_next = pcd_event_times[oldest];
	289	break;
	290	}
	291	else {
	292	event_time_next = 0;
	293	break;
	294	}
	295	}
	296
	297	if (oldest != -1)
	298	elprintf(EL_CD, "cd: next event #%d at %u",
	299	oldest, event_time_next);
	300	}
	301
	302	void pcd_irq_s68k(int irq, int state)
	303	{
	304	if (state) {
	305	SekInterruptS68k(irq);
	306	Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;
	307	Pico_mcd->m.s68k_poll_cnt = 0;
	308	} else
	309	SekInterruptClearS68k(irq);
	310	}
	311
	312	int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
	313	{
	314	#define now SekCycleCntS68k
	315	unsigned int s68k_target;
	316	unsigned int target;
	317
	318	target = m68k_target - mcd_m68k_cycle_base;
	319	s68k_target = mcd_s68k_cycle_base +
	320	((unsigned long long)target * mcd_m68k_cycle_mult >> 16);
	321
	322	elprintf(EL_CD, "s68k sync to %u, %u->%u",
	323	m68k_target, now, s68k_target);
	324
	325	if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
	326	SekCycleCntS68k = SekCycleAimS68k = s68k_target;
	327	pcd_run_events(s68k_target);
	328	return 0;
	329	}
	330
	331	while (CYCLES_GT(s68k_target, now)) {
	332	if (event_time_next && CYCLES_GE(now, event_time_next))
	333	pcd_run_events(now);
	334
	335	target = s68k_target;
	336	if (event_time_next && CYCLES_GT(target, event_time_next))
	337	target = event_time_next;
	338
	339	if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL\|PCD_ST_S68K_SLEEP))
	340	SekCycleCntS68k = SekCycleAimS68k = target;
	341	else
	342	SekRunS68k(target);
	343
	344	if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
	345	break;
	346	}
	347
	348	return s68k_target - now;
	349	#undef now
	350	}
	351
	352	#define pcd_run_cpus_normal pcd_run_cpus
	353	//#define pcd_run_cpus_lockstep pcd_run_cpus
	354
	355	static void SekAimM68k(int cyc, int mult);
	356	static int SekSyncM68k(int once);
	357
	358	void pcd_run_cpus_normal(int m68k_cycles)
	359	{
	360	SekAimM68k(m68k_cycles, 0x108);
	361
	362	while (CYCLES_GT(Pico.t.m68c_aim, Pico.t.m68c_cnt)) {
	363	if (SekShouldInterrupt()) {
	364	Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
	365	Pico_mcd->m.m68k_poll_cnt = 0;
	366	}
	367
	368	#ifdef USE_POLL_DETECT
	369	if (Pico_mcd->m.state_flags & PCD_ST_M68K_POLL) {
	370	int s68k_left;
	371	// main CPU is polling, (wake and) run sub only
	372	if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL\|PCD_ST_S68K_SLEEP)) {
	373	Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL\|PCD_ST_S68K_SLEEP);
	374	Pico_mcd->m.s68k_poll_cnt = 0;
	375	}
	376	s68k_left = pcd_sync_s68k(Pico.t.m68c_aim, 1);
	377
	378	Pico.t.m68c_cnt = Pico.t.m68c_aim;
	379	if (s68k_left > 0)
	380	Pico.t.m68c_cnt -= ((long long)s68k_left * mcd_s68k_cycle_mult >> 16);
	381	if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL\|PCD_ST_S68K_SLEEP)) {
	382	// slave has stopped, wake master to avoid lockups
	383	Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
	384	Pico_mcd->m.m68k_poll_cnt = 0;
	385	}
	386
	387	elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
	388	Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
	389	} else
	390	#endif
	391	{
	392	SekSyncM68k(1);
	393	// make sure sub doesn't get too far out of sync with main
	394	if (!(Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL\|PCD_ST_S68K_SLEEP)) &&
	395	pcd_cycles_m68k_to_s68k(Pico.t.m68c_aim - mcd_m68k_cycle_base) >
	396	5000 + SekCycleAimS68k - mcd_s68k_cycle_base)
	397	pcd_sync_s68k(Pico.t.m68c_cnt, 0);
	398	}
	399	if (Pico_mcd->m.state_flags & PCD_ST_S68K_SYNC) {
	400	Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SYNC;
	401	pcd_sync_s68k(Pico.t.m68c_cnt, 0);
	402	}
	403	}
	404	}
	405
	406	void pcd_run_cpus_lockstep(int m68k_cycles)
	407	{
	408	unsigned int target = Pico.t.m68c_aim + m68k_cycles;
	409
	410	while (CYCLES_GT(target, Pico.t.m68c_aim)) {
	411	int cycles = target - Pico.t.m68c_aim;
	412	if (cycles > 8) cycles = 8;
	413	SekAimM68k(cycles, 0x108);
	414	SekSyncM68k(1);
	415	pcd_sync_s68k(Pico.t.m68c_cnt, 0);
	416	}
	417	}
	418
	419	#define PICO_CD
	420	#define CPUS_RUN(m68k_cycles) \
	421	pcd_run_cpus(m68k_cycles)
	422
	423	#include "../pico_cmn.c"
	424
	425
	426	void pcd_prepare_frame(void)
	427	{
	428	// need this because we can't have direct mapping between
	429	// master<->slave cycle counters because of overflows
	430	mcd_m68k_cycle_base = Pico.t.m68c_aim;
	431	mcd_s68k_cycle_base = SekCycleAimS68k;
	432	}
	433
	434	PICO_INTERNAL void PicoFrameMCD(void)
	435	{
	436	PicoFrameStart();
	437
	438	pcd_prepare_frame();
	439	PicoFrameHints();
	440	}
	441
	442	void pcd_state_loaded(void)
	443	{
	444	unsigned int cycles;
	445
	446	pcd_state_loaded_mem();
	447
	448	memset(Pico_mcd->pcm_mixbuf, 0, sizeof(Pico_mcd->pcm_mixbuf));
	449	Pico_mcd->pcm_mixbuf_dirty = 0;
	450	Pico_mcd->pcm_mixpos = 0;
	451	Pico_mcd->pcm_regs_dirty = 1;
	452
	453	// old savestates..
	454	cycles = pcd_cycles_m68k_to_s68k(Pico.t.m68c_aim);
	455	if (CYCLES_GE(cycles - SekCycleAimS68k, 12500000/60)) {
	456	SekCycleCntS68k = SekCycleAimS68k = cycles;
	457	}
	458	if (pcd_event_times[PCD_EVENT_CDC] == 0) {
	459	pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
	460
	461	if (Pico_mcd->s68k_regs[0x31])
	462	pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
	463	(Pico_mcd->s68k_regs[0x31]+1) * 384);
	464	}
	465
	466	if (CYCLES_GE(cycles - Pico_mcd->pcm.update_cycles, 12500000/50))
	467	Pico_mcd->pcm.update_cycles = cycles;
	468
	469	if (Pico_mcd->m.need_sync) {
	470	Pico_mcd->m.state_flags \|= PCD_ST_S68K_SYNC;
	471	Pico_mcd->m.need_sync = 0;
	472	}
	473
	474	// reschedule
	475	event_time_next = 0;
	476	pcd_run_events(SekCycleCntS68k);
	477
	478	// msd
	479	msd_load();
	480	}
	481
	482	// vim:shiftwidth=2:ts=2:expandtab