[picodrive.git] / pico / cd / memory.c

/*\r
 * Memory I/O handlers for Sega/Mega CD.\r
 * (C) notaz, 2007-2009\r
 *\r
 * This work is licensed under the terms of MAME license.\r
 * See COPYING file in the top-level directory.\r
 */\r
\r
#include "../pico_int.h"\r
#include "../memory.h"\r
\r
#include "gfx_cd.h"\r
#include "pcm.h"\r
\r
uptr s68k_read8_map  [0x1000000 >> M68K_MEM_SHIFT];\r
uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
\r
MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r
MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r
MAKE_68K_READ32(s68k_read32, s68k_read16_map)\r
MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)\r
MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)\r
MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r
\r
// -----------------------------------------------------------------\r
\r
// provided by ASM code:\r
#ifdef _ASM_CD_MEMORY_C\r
u32 PicoReadM68k8_io(u32 a);\r
u32 PicoReadM68k16_io(u32 a);\r
void PicoWriteM68k8_io(u32 a, u32 d);\r
void PicoWriteM68k16_io(u32 a, u32 d);\r
\r
u32 PicoReadS68k8_pr(u32 a);\r
u32 PicoReadS68k16_pr(u32 a);\r
void PicoWriteS68k8_pr(u32 a, u32 d);\r
void PicoWriteS68k16_pr(u32 a, u32 d);\r
\r
u32 PicoReadM68k8_cell0(u32 a);\r
u32 PicoReadM68k8_cell1(u32 a);\r
u32 PicoReadM68k16_cell0(u32 a);\r
u32 PicoReadM68k16_cell1(u32 a);\r
void PicoWriteM68k8_cell0(u32 a, u32 d);\r
void PicoWriteM68k8_cell1(u32 a, u32 d);\r
void PicoWriteM68k16_cell0(u32 a, u32 d);\r
void PicoWriteM68k16_cell1(u32 a, u32 d);\r
\r
u32 PicoReadS68k8_dec0(u32 a);\r
u32 PicoReadS68k8_dec1(u32 a);\r
u32 PicoReadS68k16_dec0(u32 a);\r
u32 PicoReadS68k16_dec1(u32 a);\r
void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r
void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r
void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r
void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r
void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r
void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r
void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r
void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r
void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r
void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r
void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r
void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r
#endif\r
\r
static void remap_prg_window(void);\r
static void remap_word_ram(int r3);\r
\r
// poller detection\r
#define POLL_LIMIT 16\r
#define POLL_CYCLES 124\r
unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
\r
void m68k_comm_check(u32 a)\r
{\r
  pcd_sync_s68k(SekCyclesDone());\r
  /*if (Pico_mcd->m.m68k_comm_dirty & (1 << a/2)) {\r
    Pico_mcd->m.m68k_comm_dirty &= ~(1 << a/2);\r
    Pico_mcd->m.m68k_poll_a = Pico_mcd->m.m68k_poll_cnt = 0;\r
    return;\r
  }\r
  if (a != Pico_mcd->m.m68k_poll_a) {\r
    Pico_mcd->m.m68k_poll_a = a;\r
    Pico_mcd->m.m68k_poll_cnt = 0;\r
    return;\r
  }\r
  if (++Pico_mcd->m.m68k_poll_cnt > 5)\r
    SekCyclesBurnRun(122);\r
\r
  elprintf(EL_CDPOLL, "m68k poll [%02x] %d %u", a,\r
    Pico_mcd->m.m68k_poll_cnt, SekCyclesDone());*/\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
static u32 m68k_reg_read16(u32 a)\r
{\r
  u32 d=0;\r
  a &= 0x3e;\r
\r
  switch (a) {\r
    case 0:\r
      d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
      goto end;\r
    case 2:\r
      m68k_comm_check(a);\r
      d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
      elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
      goto end;\r
    case 4:\r
      d = Pico_mcd->s68k_regs[4]<<8;\r
      goto end;\r
    case 6:\r
      d = *(u16 *)(Pico_mcd->bios + 0x72);\r
      goto end;\r
    case 8:\r
      d = Read_CDC_Host(0);\r
      goto end;\r
    case 0xA:\r
      elprintf(EL_UIO, "m68k FIXME: reserved read");\r
      goto end;\r
    case 0xC: // 384 cycle stopwatch timer\r
      // ugh..\r
      d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r
      d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r
      d &= 0x0fff;\r
      elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r
      goto end;\r
  }\r
\r
  if (a < 0x30) {\r
    // comm flag/cmd/status (0xE-0x2F)\r
    m68k_comm_check(a);\r
    d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
    goto end;\r
  }\r
\r
  elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
\r
end:\r
\r
  return d;\r
}\r
#endif\r
\r
#ifndef _ASM_CD_MEMORY_C\r
static\r
#endif\r
void m68k_reg_write8(u32 a, u32 d)\r
{\r
  u32 dold;\r
  a &= 0x3f;\r
\r
  Pico_mcd->m.m68k_poll_a = 0;\r
\r
  switch (a) {\r
    case 0:\r
      d &= 1;\r
      if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
      return;\r
    case 1:\r
      d &= 3;\r
          elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);\r
      if (d == Pico_mcd->m.busreq)\r
        return;\r
      pcd_sync_s68k(SekCyclesDone());\r
\r
      if ((Pico_mcd->m.busreq ^ d) & 1) {\r
        elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
        if (!(d & 1))\r
          d |= 2; // verified: reset also gives bus\r
        else {\r
          elprintf(EL_CDREGS, "m68k: resetting s68k");\r
          SekResetS68k();\r
        }\r
      }\r
      if ((Pico_mcd->m.busreq ^ d) & 2) {\r
        elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r
        remap_prg_window();\r
      }\r
      Pico_mcd->m.busreq = d;\r
      return;\r
    case 2:\r
      elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);\r
      Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
      return;\r
    case 3:\r
      dold = Pico_mcd->s68k_regs[3];\r
      elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
      //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
      //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
      //                                             ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
      if (dold & 4) {   // 1M mode\r
        d ^= 2;         // writing 0 to DMNA actually sets it, 1 does nothing\r
      } else {\r
	if ((d ^ dold) & d & 2) { // DMNA is being set\r
          dold &= ~1;   // return word RAM to s68k\r
          /* Silpheed hack: bset(w3), r3, btst, bne, r3 */\r
          SekEndRun(20+16+10+12+16);\r
        }\r
      }\r
      Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);\r
      if ((d ^ dold) & 0xc0) {\r
        elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
        remap_prg_window();\r
      }\r
#ifdef USE_POLL_DETECT\r
      if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
        SekSetStopS68k(0); s68k_poll_adclk = 0;\r
        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
      }\r
#endif\r
      return;\r
    case 6:\r
      Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
      return;\r
    case 7:\r
      Pico_mcd->bios[0x72] = d;\r
      elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r
        ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r
      return;\r
    case 0xf:\r
      d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
    case 0xe:\r
      if (d != Pico_mcd->s68k_regs[0xe]) {\r
        pcd_sync_s68k(SekCyclesDone());\r
        Pico_mcd->s68k_regs[0xe] = d;\r
      }\r
#ifdef USE_POLL_DETECT\r
      if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
        SekSetStopS68k(0); s68k_poll_adclk = 0;\r
        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
      }\r
#endif\r
      return;\r
  }\r
\r
  if ((a&0xf0) == 0x10) {\r
      Pico_mcd->s68k_regs[a] = d;\r
#ifdef USE_POLL_DETECT\r
      if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
        SekSetStopS68k(0); s68k_poll_adclk = 0;\r
        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
      }\r
#endif\r
      return;\r
  }\r
\r
  elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
static\r
#endif\r
u32 s68k_poll_detect(u32 a, u32 d)\r
{\r
#ifdef USE_POLL_DETECT\r
  // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
  if (SekIsStoppedS68k()) return d;\r
  // polling detection\r
  if (a == (s68k_poll_adclk&0xff)) {\r
    unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
    if (clkdiff <= POLL_CYCLES) {\r
      s68k_poll_cnt++;\r
      //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
      if (s68k_poll_cnt > POLL_LIMIT) {\r
        SekSetStopS68k(1);\r
        elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
      }\r
      s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
      return d;\r
    }\r
  }\r
  s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
  s68k_poll_cnt = 0;\r
#endif\r
  return d;\r
}\r
\r
#define READ_FONT_DATA(basemask) \\r
{ \\r
      unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
      unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f;   \\r
      if (fnt & (basemask << 0)) d  = col1      ; else d  = col0;       \\r
      if (fnt & (basemask << 1)) d |= col1 <<  4; else d |= col0 <<  4; \\r
      if (fnt & (basemask << 2)) d |= col1 <<  8; else d |= col0 <<  8; \\r
      if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
}\r
\r
\r
#ifndef _ASM_CD_MEMORY_C\r
static\r
#endif\r
u32 s68k_reg_read16(u32 a)\r
{\r
  u32 d=0;\r
\r
  switch (a) {\r
    case 0:\r
      return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
    case 2:\r
      d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
      elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
      return s68k_poll_detect(a, d);\r
    case 6:\r
      return CDC_Read_Reg();\r
    case 8:\r
      return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
    case 0xC:\r
      d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r
      d /= 384;\r
      d &= 0x0fff;\r
      elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r
      return d;\r
    case 0x30:\r
      elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
      return Pico_mcd->s68k_regs[31];\r
    case 0x34: // fader\r
      return 0; // no busy bit\r
    case 0x50: // font data (check: Lunar 2, Silpheed)\r
      READ_FONT_DATA(0x00100000);\r
      return d;\r
    case 0x52:\r
      READ_FONT_DATA(0x00010000);\r
      return d;\r
    case 0x54:\r
      READ_FONT_DATA(0x10000000);\r
      return d;\r
    case 0x56:\r
      READ_FONT_DATA(0x01000000);\r
      return d;\r
  }\r
\r
  d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
\r
  if (a >= 0x0e && a < 0x30)\r
    return s68k_poll_detect(a, d);\r
\r
  return d;\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
static\r
#endif\r
void s68k_reg_write8(u32 a, u32 d)\r
{\r
  // Warning: d might have upper bits set\r
  switch (a) {\r
    case 2:\r
      return; // only m68k can change WP\r
    case 3: {\r
      int dold = Pico_mcd->s68k_regs[3];\r
      elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r
      d &= 0x1d;\r
      d |= dold & 0xc2;\r
      if (d & 4)\r
      {\r
        if ((d ^ dold) & 0x1d) {\r
          d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
          remap_word_ram(d);\r
        }\r
        if (!(dold & 4)) {\r
          elprintf(EL_CDREG3, "wram mode 2M->1M");\r
          wram_2M_to_1M(Pico_mcd->word_ram2M);\r
        }\r
      }\r
      else\r
      {\r
        if (dold & 4) {\r
          elprintf(EL_CDREG3, "wram mode 1M->2M");\r
          if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
            d &= ~3;\r
            d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
          }\r
          wram_1M_to_2M(Pico_mcd->word_ram2M);\r
          remap_word_ram(d);\r
        }\r
        // s68k can only set RET, writing 0 has no effect\r
        else if ((dold ^ d) & d & 1) {   // RET being set\r
          SekEndRunS68k(20+16+10+12+16); // see DMNA case\r
        } else\r
          d |= dold & 1;\r
        if (d & 1)\r
          d &= ~2;                       // DMNA clears\r
      }\r
      break;\r
    }\r
    case 4:\r
      elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r
      Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
      return;\r
    case 5:\r
      //dprintf("s68k CDC reg addr: %x", d&0xf);\r
      break;\r
    case 7:\r
      CDC_Write_Reg(d);\r
      return;\r
    case 0xa:\r
      elprintf(EL_CDREGS, "s68k set CDC dma addr");\r
      break;\r
    case 0xc:\r
    case 0xd: // 384 cycle stopwatch timer\r
      elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r
      // does this also reset internal 384 cycle counter?\r
      Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r
      return;\r
    case 0xe:\r
      d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
      break;\r
    case 0x31: // 384 cycle int3 timer\r
      d &= 0xff;\r
      elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r
      Pico_mcd->s68k_regs[a] = (u8) d;\r
      if (d) // d or d+1??\r
        pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r
      else\r
        pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r
      break;\r
    case 0x33: // IRQ mask\r
      elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r
      d &= 0x7e;\r
      if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r
        if (Pico_mcd->s68k_regs[0x37] & 4)\r
          CDD_Export_Status();\r
      }\r
      break;\r
    case 0x34: // fader\r
      Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
      return;\r
    case 0x36:\r
      return; // d/m bit is unsetable\r
    case 0x37: {\r
      u32 d_old = Pico_mcd->s68k_regs[0x37];\r
      Pico_mcd->s68k_regs[0x37] = d&7;\r
      if ((d&4) && !(d_old&4)) {\r
        CDD_Export_Status();\r
      }\r
      return;\r
    }\r
    case 0x4b:\r
      Pico_mcd->s68k_regs[a] = (u8) d;\r
      CDD_Import_Command();\r
      return;\r
  }\r
\r
  if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
  {\r
    elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
    return;\r
  }\r
\r
  if (a < 0x30)\r
    Pico_mcd->m.m68k_comm_dirty |= (1 << a/2);\r
\r
  Pico_mcd->s68k_regs[a] = (u8) d;\r
}\r
\r
// -----------------------------------------------------------------\r
//                          Main 68k\r
// -----------------------------------------------------------------\r
\r
#ifndef _ASM_CD_MEMORY_C\r
#include "cell_map.c"\r
\r
// WORD RAM, cell aranged area (220000 - 23ffff)\r
static u32 PicoReadM68k8_cell0(u32 a)\r
{\r
  a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
  return Pico_mcd->word_ram1M[0][a ^ 1];\r
}\r
\r
static u32 PicoReadM68k8_cell1(u32 a)\r
{\r
  a = (a&3) | (cell_map(a >> 2) << 2);\r
  return Pico_mcd->word_ram1M[1][a ^ 1];\r
}\r
\r
static u32 PicoReadM68k16_cell0(u32 a)\r
{\r
  a = (a&2) | (cell_map(a >> 2) << 2);\r
  return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r
}\r
\r
static u32 PicoReadM68k16_cell1(u32 a)\r
{\r
  a = (a&2) | (cell_map(a >> 2) << 2);\r
  return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r
}\r
\r
static void PicoWriteM68k8_cell0(u32 a, u32 d)\r
{\r
  a = (a&3) | (cell_map(a >> 2) << 2);\r
  Pico_mcd->word_ram1M[0][a ^ 1] = d;\r
}\r
\r
static void PicoWriteM68k8_cell1(u32 a, u32 d)\r
{\r
  a = (a&3) | (cell_map(a >> 2) << 2);\r
  Pico_mcd->word_ram1M[1][a ^ 1] = d;\r
}\r
\r
static void PicoWriteM68k16_cell0(u32 a, u32 d)\r
{\r
  a = (a&3) | (cell_map(a >> 2) << 2);\r
  *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r
}\r
\r
static void PicoWriteM68k16_cell1(u32 a, u32 d)\r
{\r
  a = (a&3) | (cell_map(a >> 2) << 2);\r
  *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r
}\r
#endif\r
\r
// RAM cart (40000 - 7fffff, optional)\r
static u32 PicoReadM68k8_ramc(u32 a)\r
{\r
  u32 d = 0;\r
  if (a == 0x400001) {\r
    if (SRam.data != NULL)\r
      d = 3; // 64k cart\r
    return d;\r
  }\r
\r
  if ((a & 0xfe0000) == 0x600000) {\r
    if (SRam.data != NULL)\r
      d = SRam.data[((a >> 1) & 0xffff) + 0x2000];\r
    return d;\r
  }\r
\r
  if (a == 0x7fffff)\r
    return Pico_mcd->m.bcram_reg;\r
\r
  elprintf(EL_UIO, "m68k unmapped r8  [%06x] @%06x", a, SekPc);\r
  return d;\r
}\r
\r
static u32 PicoReadM68k16_ramc(u32 a)\r
{\r
  elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r
  return PicoReadM68k8_ramc(a + 1);\r
}\r
\r
static void PicoWriteM68k8_ramc(u32 a, u32 d)\r
{\r
  if ((a & 0xfe0000) == 0x600000) {\r
    if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {\r
      SRam.data[((a>>1) & 0xffff) + 0x2000] = d;\r
      SRam.changed = 1;\r
    }\r
    return;\r
  }\r
\r
  if (a == 0x7fffff) {\r
    Pico_mcd->m.bcram_reg = d;\r
    return;\r
  }\r
\r
  elprintf(EL_UIO, "m68k unmapped w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);\r
}\r
\r
static void PicoWriteM68k16_ramc(u32 a, u32 d)\r
{\r
  elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
  PicoWriteM68k8_ramc(a + 1, d);\r
}\r
\r
// IO/control/cd registers (a10000 - ...)\r
#ifndef _ASM_CD_MEMORY_C\r
static u32 PicoReadM68k8_io(u32 a)\r
{\r
  u32 d;\r
  if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
    d = m68k_reg_read16(a); // TODO: m68k_reg_read8\r
    if (!(a & 1))\r
      d >>= 8;\r
    d &= 0xff;\r
    elprintf(EL_CDREGS, "m68k_regs r8:  [%02x]   %02x @%06x", a & 0x3f, d, SekPc);\r
    return d;\r
  }\r
\r
  // fallback to default MD handler\r
  return PicoRead8_io(a);\r
}\r
\r
static u32 PicoReadM68k16_io(u32 a)\r
{\r
  u32 d;\r
  if ((a & 0xff00) == 0x2000) {\r
    d = m68k_reg_read16(a);\r
    elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);\r
    return d;\r
  }\r
\r
  return PicoRead16_io(a);\r
}\r
\r
static void PicoWriteM68k8_io(u32 a, u32 d)\r
{\r
  if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
    elprintf(EL_CDREGS, "m68k_regs w8:  [%02x]   %02x @%06x", a&0x3f, d, SekPc);\r
    m68k_reg_write8(a, d);\r
    return;\r
  }\r
\r
  PicoWrite16_io(a, d);\r
}\r
\r
static void PicoWriteM68k16_io(u32 a, u32 d)\r
{\r
  if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
    elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
/* TODO FIXME?\r
    if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
      Pico_mcd->s68k_regs[0xe] = d >> 8;\r
#ifdef USE_POLL_DETECT\r
      if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
        SekSetStopS68k(0); s68k_poll_adclk = 0;\r
        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
      }\r
#endif\r
      return;\r
    }\r
*/\r
    m68k_reg_write8(a,     d >> 8);\r
    m68k_reg_write8(a + 1, d & 0xff);\r
    return;\r
  }\r
\r
  PicoWrite16_io(a, d);\r
}\r
#endif\r
\r
// -----------------------------------------------------------------\r
//                           Sub 68k\r
// -----------------------------------------------------------------\r
\r
static u32 s68k_unmapped_read8(u32 a)\r
{\r
  elprintf(EL_UIO, "s68k unmapped r8  [%06x] @%06x", a, SekPc);\r
  return 0;\r
}\r
\r
static u32 s68k_unmapped_read16(u32 a)\r
{\r
  elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);\r
  return 0;\r
}\r
\r
static void s68k_unmapped_write8(u32 a, u32 d)\r
{\r
  elprintf(EL_UIO, "s68k unmapped w8  [%06x]   %02x @%06x", a, d & 0xff, SekPc);\r
}\r
\r
static void s68k_unmapped_write16(u32 a, u32 d)\r
{\r
  elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
}\r
\r
// PRG RAM protected range (000000 - 00ff00)?\r
// XXX verify: ff00 or 1fe00 max?\r
static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r
{\r
  if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
    Pico_mcd->prg_ram[a ^ 1] = d;\r
}\r
\r
static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r
{\r
  if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
    *(u16 *)(Pico_mcd->prg_ram + a) = d;\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
\r
// decode (080000 - 0bffff, in 1M mode)\r
static u32 PicoReadS68k8_dec0(u32 a)\r
{\r
  u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r
  if (a & 1)\r
    d &= 0x0f;\r
  else\r
    d >>= 4;\r
  return d;\r
}\r
\r
static u32 PicoReadS68k8_dec1(u32 a)\r
{\r
  u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r
  if (a & 1)\r
    d &= 0x0f;\r
  else\r
    d >>= 4;\r
  return d;\r
}\r
\r
static u32 PicoReadS68k16_dec0(u32 a)\r
{\r
  u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r
  d |= d << 4;\r
  d &= ~0xf0;\r
  return d;\r
}\r
\r
static u32 PicoReadS68k16_dec1(u32 a)\r
{\r
  u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r
  d |= d << 4;\r
  d &= ~0xf0;\r
  return d;\r
}\r
\r
/* check: jaguar xj 220 (draws entire world using decode) */\r
#define mk_decode_w8(bank)                                        \\r
static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d)            \\r
{                                                                 \\r
  u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
                                                                  \\r
  if (!(a & 1))                                                   \\r
    *pd = (*pd & 0x0f) | (d << 4);                                \\r
  else                                                            \\r
    *pd = (*pd & 0xf0) | (d & 0x0f);                              \\r
}                                                                 \\r
                                                                  \\r
static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d)            \\r
{                                                                 \\r
  u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
  u8 mask = (a & 1) ? 0x0f : 0xf0;                                \\r
                                                                  \\r
  if (!(*pd & mask) && (d & 0x0f)) /* underwrite */               \\r
    PicoWriteS68k8_dec_m0b##bank(a, d);                           \\r
}                                                                 \\r
                                                                  \\r
static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r
{                                                                 \\r
  if (d & 0x0f) /* overwrite */                                   \\r
    PicoWriteS68k8_dec_m0b##bank(a, d);                           \\r
}\r
\r
mk_decode_w8(0)\r
mk_decode_w8(1)\r
\r
#define mk_decode_w16(bank)                                       \\r
static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d)           \\r
{                                                                 \\r
  u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
                                                                  \\r
  d &= 0x0f0f;                                                    \\r
  *pd = d | (d >> 4);                                             \\r
}                                                                 \\r
                                                                  \\r
static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d)           \\r
{                                                                 \\r
  u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
                                                                  \\r
  d &= 0x0f0f; /* underwrite */                                   \\r
  if (!(*pd & 0xf0)) *pd |= d >> 4;                               \\r
  if (!(*pd & 0x0f)) *pd |= d;                                    \\r
}                                                                 \\r
                                                                  \\r
static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d)           \\r
{                                                                 \\r
  u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
                                                                  \\r
  d &= 0x0f0f; /* overwrite */                                    \\r
  d |= d >> 4;                                                    \\r
                                                                  \\r
  if (!(d & 0xf0)) d |= *pd & 0xf0;                               \\r
  if (!(d & 0x0f)) d |= *pd & 0x0f;                               \\r
  *pd = d;                                                        \\r
}\r
\r
mk_decode_w16(0)\r
mk_decode_w16(1)\r
\r
#endif\r
\r
// backup RAM (fe0000 - feffff)\r
static u32 PicoReadS68k8_bram(u32 a)\r
{\r
  return Pico_mcd->bram[(a>>1)&0x1fff];\r
}\r
\r
static u32 PicoReadS68k16_bram(u32 a)\r
{\r
  u32 d;\r
  elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
  a = (a >> 1) & 0x1fff;\r
  d = Pico_mcd->bram[a++];\r
  d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify\r
  return d;\r
}\r
\r
static void PicoWriteS68k8_bram(u32 a, u32 d)\r
{\r
  Pico_mcd->bram[(a >> 1) & 0x1fff] = d;\r
  SRam.changed = 1;\r
}\r
\r
static void PicoWriteS68k16_bram(u32 a, u32 d)\r
{\r
  elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
  a = (a >> 1) & 0x1fff;\r
  Pico_mcd->bram[a++] = d;\r
  Pico_mcd->bram[a++] = d >> 8; // TODO: verify..\r
  SRam.changed = 1;\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
\r
// PCM and registers (ff0000 - ffffff)\r
static u32 PicoReadS68k8_pr(u32 a)\r
{\r
  u32 d = 0;\r
\r
  // regs\r
  if ((a & 0xfe00) == 0x8000) {\r
    a &= 0x1ff;\r
    elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
    if (a >= 0x0e && a < 0x30) {\r
      d = Pico_mcd->s68k_regs[a];\r
      s68k_poll_detect(a, d);\r
      elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r
      return d;\r
    }\r
    else if (a >= 0x58 && a < 0x68)\r
         d = gfx_cd_read(a & ~1);\r
    else d = s68k_reg_read16(a & ~1);\r
    if (!(a & 1))\r
      d >>= 8;\r
    elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r
    return d & 0xff;\r
  }\r
\r
  // PCM\r
  // XXX: verify: probably odd addrs only?\r
  if ((a & 0x8000) == 0x0000) {\r
    a &= 0x7fff;\r
    if (a >= 0x2000)\r
      d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r
    else if (a >= 0x20) {\r
      a &= 0x1e;\r
      d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
      if (a & 2)\r
        d >>= 8;\r
    }\r
    return d & 0xff;\r
  }\r
\r
  return s68k_unmapped_read8(a);\r
}\r
\r
static u32 PicoReadS68k16_pr(u32 a)\r
{\r
  u32 d = 0;\r
\r
  // regs\r
  if ((a & 0xfe00) == 0x8000) {\r
    a &= 0x1fe;\r
    elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
    if (0x58 <= a && a < 0x68)\r
         d = gfx_cd_read(a);\r
    else d = s68k_reg_read16(a);\r
    elprintf(EL_CDREGS, "ret = %04x", d);\r
    return d;\r
  }\r
\r
  // PCM\r
  if ((a & 0x8000) == 0x0000) {\r
    //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
    a &= 0x7fff;\r
    if (a >= 0x2000)\r
      d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
    else if (a >= 0x20) {\r
      a &= 0x1e;\r
      d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
      if (a & 2) d >>= 8;\r
    }\r
    elprintf(EL_CDREGS, "ret = %04x", d);\r
    return d;\r
  }\r
\r
  return s68k_unmapped_read16(a);\r
}\r
\r
static void PicoWriteS68k8_pr(u32 a, u32 d)\r
{\r
  // regs\r
  if ((a & 0xfe00) == 0x8000) {\r
    a &= 0x1ff;\r
    elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
    if (0x58 <= a && a < 0x68)\r
         gfx_cd_write16(a&~1, (d<<8)|d);\r
    else s68k_reg_write8(a,d);\r
    return;\r
  }\r
\r
  // PCM\r
  if ((a & 0x8000) == 0x0000) {\r
    a &= 0x7fff;\r
    if (a >= 0x2000)\r
      Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
    else if (a < 0x12)\r
      pcm_write(a>>1, d);\r
    return;\r
  }\r
\r
  s68k_unmapped_write8(a, d);\r
}\r
\r
static void PicoWriteS68k16_pr(u32 a, u32 d)\r
{\r
  // regs\r
  if ((a & 0xfe00) == 0x8000) {\r
    a &= 0x1fe;\r
    elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
    if (a >= 0x58 && a < 0x68)\r
      gfx_cd_write16(a, d);\r
    else {\r
      if (a == 0xe) {\r
        // special case, 2 byte writes would be handled differently\r
        // TODO: verify\r
        Pico_mcd->s68k_regs[0xf] = d;\r
        return;\r
      }\r
      s68k_reg_write8(a,     d >> 8);\r
      s68k_reg_write8(a + 1, d & 0xff);\r
    }\r
    return;\r
  }\r
\r
  // PCM\r
  if ((a & 0x8000) == 0x0000) {\r
    a &= 0x7fff;\r
    if (a >= 0x2000)\r
      Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
    else if (a < 0x12)\r
      pcm_write(a>>1, d & 0xff);\r
    return;\r
  }\r
\r
  s68k_unmapped_write16(a, d);\r
}\r
\r
#endif\r
\r
static const void *m68k_cell_read8[]   = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r
static const void *m68k_cell_read16[]  = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r
static const void *m68k_cell_write8[]  = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r
static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r
\r
static const void *s68k_dec_read8[]   = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r
static const void *s68k_dec_read16[]  = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r
\r
static const void *s68k_dec_write8[2][4] = {\r
  { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r
  { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r
};\r
\r
static const void *s68k_dec_write16[2][4] = {\r
  { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r
  { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r
};\r
\r
// -----------------------------------------------------------------\r
\r
static void remap_prg_window(void)\r
{\r
  // PRG RAM\r
  if (Pico_mcd->m.busreq & 2) {\r
    void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];\r
    cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
  }\r
  else {\r
    m68k_map_unmap(0x020000, 0x03ffff);\r
  }\r
}\r
\r
static void remap_word_ram(int r3)\r
{\r
  void *bank;\r
\r
  // WORD RAM\r
  if (!(r3 & 4)) {\r
    // 2M mode. XXX: allowing access in all cases for simplicity\r
    bank = Pico_mcd->word_ram2M;\r
    cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r
    cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r
    // TODO: handle 0x0c0000\r
  }\r
  else {\r
    int b0 = r3 & 1;\r
    int m = (r3 & 0x18) >> 3;\r
    bank = Pico_mcd->word_ram1M[b0];\r
    cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r
    bank = Pico_mcd->word_ram1M[b0 ^ 1];\r
    cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r
    // "cell arrange" on m68k\r
    cpu68k_map_set(m68k_read8_map,   0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r
    cpu68k_map_set(m68k_read16_map,  0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r
    cpu68k_map_set(m68k_write8_map,  0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r
    cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r
    // "decode format" on s68k\r
    cpu68k_map_set(s68k_read8_map,   0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r
    cpu68k_map_set(s68k_read16_map,  0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r
    cpu68k_map_set(s68k_write8_map,  0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r
    cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r
  }\r
\r
#ifdef EMU_F68K\r
  // update fetchmap..\r
  int i;\r
  if (!(r3 & 4))\r
  {\r
    for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
      PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;\r
  }\r
  else\r
  {\r
    for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
      PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
    for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
      PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
  }\r
#endif\r
}\r
\r
void pcd_state_loaded_mem(void)\r
{\r
  int r3 = Pico_mcd->s68k_regs[3];\r
\r
  /* after load events */\r
  if (r3 & 4) // 1M mode?\r
    wram_2M_to_1M(Pico_mcd->word_ram2M);\r
  remap_word_ram(r3);\r
  remap_prg_window();\r
\r
  // restore hint vector\r
  *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r
}\r
\r
#ifdef EMU_M68K\r
static void m68k_mem_setup_cd(void);\r
#endif\r
\r
PICO_INTERNAL void PicoMemSetupCD(void)\r
{\r
  // setup default main68k map\r
  PicoMemSetup();\r
\r
  // main68k map (BIOS mapped by PicoMemSetup()):\r
  // RAM cart\r
  if (PicoOpt & POPT_EN_MCD_RAMCART) {\r
    cpu68k_map_set(m68k_read8_map,   0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);\r
    cpu68k_map_set(m68k_read16_map,  0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);\r
    cpu68k_map_set(m68k_write8_map,  0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);\r
    cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);\r
  }\r
\r
  // registers/IO:\r
  cpu68k_map_set(m68k_read8_map,   0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);\r
  cpu68k_map_set(m68k_read16_map,  0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);\r
  cpu68k_map_set(m68k_write8_map,  0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);\r
  cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);\r
\r
  // sub68k map\r
  cpu68k_map_set(s68k_read8_map,   0x000000, 0xffffff, s68k_unmapped_read8, 1);\r
  cpu68k_map_set(s68k_read16_map,  0x000000, 0xffffff, s68k_unmapped_read16, 1);\r
  cpu68k_map_set(s68k_write8_map,  0x000000, 0xffffff, s68k_unmapped_write8, 1);\r
  cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r
\r
  // PRG RAM\r
  cpu68k_map_set(s68k_read8_map,   0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
  cpu68k_map_set(s68k_read16_map,  0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
  cpu68k_map_set(s68k_write8_map,  0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
  cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
  cpu68k_map_set(s68k_write8_map,  0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);\r
  cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);\r
\r
  // BRAM\r
  cpu68k_map_set(s68k_read8_map,   0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r
  cpu68k_map_set(s68k_read16_map,  0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r
  cpu68k_map_set(s68k_write8_map,  0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r
  cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r
\r
  // PCM, regs\r
  cpu68k_map_set(s68k_read8_map,   0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r
  cpu68k_map_set(s68k_read16_map,  0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r
  cpu68k_map_set(s68k_write8_map,  0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r
  cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r
\r
  // RAMs\r
  remap_word_ram(1);\r
\r
#ifdef EMU_C68K\r
  // s68k\r
  PicoCpuCS68k.read8  = (void *)s68k_read8_map;\r
  PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r
  PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r
  PicoCpuCS68k.write8  = (void *)s68k_write8_map;\r
  PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r
  PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r
  PicoCpuCS68k.checkpc = NULL; /* unused */\r
  PicoCpuCS68k.fetch8  = NULL;\r
  PicoCpuCS68k.fetch16 = NULL;\r
  PicoCpuCS68k.fetch32 = NULL;\r
#endif\r
#ifdef EMU_F68K\r
  // s68k\r
  PicoCpuFS68k.read_byte  = s68k_read8;\r
  PicoCpuFS68k.read_word  = s68k_read16;\r
  PicoCpuFS68k.read_long  = s68k_read32;\r
  PicoCpuFS68k.write_byte = s68k_write8;\r
  PicoCpuFS68k.write_word = s68k_write16;\r
  PicoCpuFS68k.write_long = s68k_write32;\r
\r
  // setup FAME fetchmap\r
  {\r
    int i;\r
    // M68k\r
    // by default, point everything to fitst 64k of ROM (BIOS)\r
    for (i = 0; i < M68K_FETCHBANK1; i++)\r
      PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
    // now real ROM (BIOS)\r
    for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
      PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
    // .. and RAM\r
    for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
      PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
    // S68k\r
    // PRG RAM is default\r
    for (i = 0; i < M68K_FETCHBANK1; i++)\r
      PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
    // real PRG RAM\r
    for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
      PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r
    // WORD RAM 2M area\r
    for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
      PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r
    // remap_word_ram() will setup word ram for both\r
  }\r
#endif\r
#ifdef EMU_M68K\r
  m68k_mem_setup_cd();\r
#endif\r
\r
  // m68k_poll_addr = m68k_poll_cnt = 0;\r
  s68k_poll_adclk = s68k_poll_cnt = 0;\r
}\r
\r
\r
#ifdef EMU_M68K\r
u32  m68k_read8(u32 a);\r
u32  m68k_read16(u32 a);\r
u32  m68k_read32(u32 a);\r
void m68k_write8(u32 a, u8 d);\r
void m68k_write16(u32 a, u16 d);\r
void m68k_write32(u32 a, u32 d);\r
\r
static unsigned int PicoReadCD8w (unsigned int a) {\r
	return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);\r
}\r
static unsigned int PicoReadCD16w(unsigned int a) {\r
	return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);\r
}\r
static unsigned int PicoReadCD32w(unsigned int a) {\r
	return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);\r
}\r
static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
	if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);\r
}\r
static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
	if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);\r
}\r
static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
	if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r
}\r
\r
extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r
extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r
extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r
extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char  value);\r
extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r
extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int   value);\r
\r
static void m68k_mem_setup_cd(void)\r
{\r
  pm68k_read_memory_8  = PicoReadCD8w;\r
  pm68k_read_memory_16 = PicoReadCD16w;\r
  pm68k_read_memory_32 = PicoReadCD32w;\r
  pm68k_write_memory_8  = PicoWriteCD8w;\r
  pm68k_write_memory_16 = PicoWriteCD16w;\r
  pm68k_write_memory_32 = PicoWriteCD32w;\r
}\r
#endif // EMU_M68K\r
\r
// vim:shiftwidth=2:ts=2:expandtab\r