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based on hw tests busreq is affected by reset. Remove old hack too
[picodrive.git] / pico / cd / memory.c
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1// Memory I/O handlers for Sega/Mega CD.\r
2// Loosely based on Gens code.\r
3// (c) Copyright 2007, Grazvydas "notaz" Ignotas\r
4\r
5\r
6#include "../pico_int.h"\r
7\r
8#include "../sound/ym2612.h"\r
9#include "../sound/sn76496.h"\r
10\r
11#include "gfx_cd.h"\r
12#include "pcm.h"\r
13\r
14#ifndef UTYPES_DEFINED\r
15typedef unsigned char u8;\r
16typedef unsigned short u16;\r
17typedef unsigned int u32;\r
18#define UTYPES_DEFINED\r
19#endif\r
20\r
21#ifdef _MSC_VER\r
22#define rdprintf\r
23#define wrdprintf\r
24#define r3printf\r
25#else\r
26//#define rdprintf dprintf\r
27#define rdprintf(...)\r
28//#define wrdprintf dprintf\r
29#define wrdprintf(...)\r
30//#define r3printf elprintf\r
31#define r3printf(...)\r
32#endif\r
33\r
34#ifdef EMU_CORE_DEBUG\r
35extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];\r
36extern int lrp_cyc, lwp_cyc;\r
37#undef USE_POLL_DETECT\r
38#endif\r
39\r
40// -----------------------------------------------------------------\r
41\r
42// poller detection\r
43#define POLL_LIMIT 16\r
44#define POLL_CYCLES 124\r
45// int m68k_poll_addr, m68k_poll_cnt;\r
46unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
47\r
48#ifndef _ASM_CD_MEMORY_C\r
49static u32 m68k_reg_read16(u32 a)\r
50{\r
51 u32 d=0;\r
52 a &= 0x3e;\r
53 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);\r
54\r
55 switch (a) {\r
56 case 0:\r
57 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
58 goto end;\r
59 case 2:\r
60 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
61 r3printf(EL_STATUS, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
62 goto end;\r
63 case 4:\r
64 d = Pico_mcd->s68k_regs[4]<<8;\r
65 goto end;\r
66 case 6:\r
67 d = *(u16 *)(Pico_mcd->bios + 0x72);\r
68 goto end;\r
69 case 8:\r
70 d = Read_CDC_Host(0);\r
71 goto end;\r
72 case 0xA:\r
73 elprintf(EL_UIO, "m68k FIXME: reserved read");\r
74 goto end;\r
75 case 0xC:\r
76 d = Pico_mcd->m.timer_stopwatch >> 16;\r
77 dprintf("m68k stopwatch timer read (%04x)", d);\r
78 goto end;\r
79 }\r
80\r
81 if (a < 0x30) {\r
82 // comm flag/cmd/status (0xE-0x2F)\r
83 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
84 goto end;\r
85 }\r
86\r
87 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
88\r
89end:\r
90\r
91 return d;\r
92}\r
93#endif\r
94\r
95#ifndef _ASM_CD_MEMORY_C\r
96static\r
97#endif\r
98void m68k_reg_write8(u32 a, u32 d)\r
99{\r
100 a &= 0x3f;\r
101 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);\r
102\r
103 switch (a) {\r
104 case 0:\r
105 d &= 1;\r
106 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
107 return;\r
108 case 1:\r
109 d &= 3;\r
110 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
111 if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
112 if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);\r
113 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
114 SekResetS68k(); // S68k comes out of RESET or BRQ state\r
115 Pico_mcd->m.state_flags&=~1;\r
116 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
117 }\r
118 Pico_mcd->m.busreq = d;\r
119 return;\r
120 case 2:\r
121 dprintf("m68k: prg wp=%02x", d);\r
122 Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r
123 return;\r
124 case 3: {\r
125 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;\r
126 r3printf(EL_STATUS, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
127 d &= 0xc2;\r
128 if ((dold>>6) != ((d>>6)&3))\r
129 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
130 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
131 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
132 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
133 if (dold & 4) { // 1M mode\r
134 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
135 } else {\r
136 if ((d ^ dold) & d & 2) { // DMNA is being set\r
137 dold &= ~1; // return word RAM to s68k\r
138 /* Silpheed hack: bset(w3), r3, btst, bne, r3 */\r
139 SekEndRun(20+16+10+12+16);\r
140 }\r
141 }\r
142 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register\r
143#ifdef USE_POLL_DETECT\r
144 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
145 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
146 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
147 }\r
148#endif\r
149 return;\r
150 }\r
151 case 6:\r
152 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
153 return;\r
154 case 7:\r
155 Pico_mcd->bios[0x72] = d;\r
156 dprintf("hint vector set to %08x", PicoRead32(0x70));\r
157 return;\r
158 case 0xf:\r
159 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
160 case 0xe:\r
161 //dprintf("m68k: comm flag: %02x", d);\r
162 Pico_mcd->s68k_regs[0xe] = d;\r
163#ifdef USE_POLL_DETECT\r
164 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
165 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
166 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
167 }\r
168#endif\r
169 return;\r
170 }\r
171\r
172 if ((a&0xf0) == 0x10) {\r
173 Pico_mcd->s68k_regs[a] = d;\r
174#ifdef USE_POLL_DETECT\r
175 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
176 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
177 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
178 }\r
179#endif\r
180 return;\r
181 }\r
182\r
183 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
184}\r
185\r
186#ifndef _ASM_CD_MEMORY_C\r
187static\r
188#endif\r
189u32 s68k_poll_detect(u32 a, u32 d)\r
190{\r
191#ifdef USE_POLL_DETECT\r
192 // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
193 if (SekIsStoppedS68k()) return d;\r
194 // polling detection\r
195 if (a == (s68k_poll_adclk&0xff)) {\r
196 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
197 if (clkdiff <= POLL_CYCLES) {\r
198 s68k_poll_cnt++;\r
199 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
200 if (s68k_poll_cnt > POLL_LIMIT) {\r
201 SekSetStopS68k(1);\r
202 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
203 }\r
204 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
205 return d;\r
206 }\r
207 }\r
208 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
209 s68k_poll_cnt = 0;\r
210#endif\r
211 return d;\r
212}\r
213\r
214#define READ_FONT_DATA(basemask) \\r
215{ \\r
216 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r
217 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r
218 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r
219 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r
220 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r
221 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r
222}\r
223\r
224\r
225#ifndef _ASM_CD_MEMORY_C\r
226static\r
227#endif\r
228u32 s68k_reg_read16(u32 a)\r
229{\r
230 u32 d=0;\r
231\r
232 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);\r
233\r
234 switch (a) {\r
235 case 0:\r
236 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r
237 case 2:\r
238 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r
239 r3printf(EL_STATUS, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r
240 return s68k_poll_detect(a, d);\r
241 case 6:\r
242 return CDC_Read_Reg();\r
243 case 8:\r
244 return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
245 case 0xC:\r
246 d = Pico_mcd->m.timer_stopwatch >> 16;\r
247 dprintf("s68k stopwatch timer read (%04x)", d);\r
248 return d;\r
249 case 0x30:\r
250 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r
251 return Pico_mcd->s68k_regs[31];\r
252 case 0x34: // fader\r
253 return 0; // no busy bit\r
254 case 0x50: // font data (check: Lunar 2, Silpheed)\r
255 READ_FONT_DATA(0x00100000);\r
256 return d;\r
257 case 0x52:\r
258 READ_FONT_DATA(0x00010000);\r
259 return d;\r
260 case 0x54:\r
261 READ_FONT_DATA(0x10000000);\r
262 return d;\r
263 case 0x56:\r
264 READ_FONT_DATA(0x01000000);\r
265 return d;\r
266 }\r
267\r
268 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
269\r
270 if (a >= 0x0e && a < 0x30)\r
271 return s68k_poll_detect(a, d);\r
272\r
273 return d;\r
274}\r
275\r
276#ifndef _ASM_CD_MEMORY_C\r
277static\r
278#endif\r
279void s68k_reg_write8(u32 a, u32 d)\r
280{\r
281 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
282\r
283 // Warning: d might have upper bits set\r
284 switch (a) {\r
285 case 2:\r
286 return; // only m68k can change WP\r
287 case 3: {\r
288 int dold = Pico_mcd->s68k_regs[3];\r
289 r3printf(EL_STATUS, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r
290 d &= 0x1d;\r
291 d |= dold&0xc2;\r
292 if (d&4)\r
293 {\r
294 if ((d ^ dold) & 5) {\r
295 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
296 PicoMemResetCD(d);\r
297 }\r
298#ifdef _ASM_CD_MEMORY_C\r
299 if ((d ^ dold) & 0x1d)\r
300 PicoMemResetCDdecode(d);\r
301#endif\r
302 if (!(dold & 4)) {\r
303 r3printf(EL_STATUS, "wram mode 2M->1M");\r
304 wram_2M_to_1M(Pico_mcd->word_ram2M);\r
305 }\r
306 }\r
307 else\r
308 {\r
309 if (dold & 4) {\r
310 r3printf(EL_STATUS, "wram mode 1M->2M");\r
311 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
312 d &= ~3;\r
313 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
314 }\r
315 wram_1M_to_2M(Pico_mcd->word_ram2M);\r
316 PicoMemResetCD(d);\r
317 }\r
318 // s68k can only set RET, writing 0 has no effect\r
319 else if ((dold ^ d) & d & 1) { // RET being set\r
320 SekEndRunS68k(20+16+10+12+16); // see DMNA case\r
321 } else\r
322 d |= dold & 1;\r
323 if (d & 1)\r
324 d &= ~2; // DMNA clears\r
325 }\r
326 break;\r
327 }\r
328 case 4:\r
329 dprintf("s68k CDC dest: %x", d&7);\r
330 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r
331 return;\r
332 case 5:\r
333 //dprintf("s68k CDC reg addr: %x", d&0xf);\r
334 break;\r
335 case 7:\r
336 CDC_Write_Reg(d);\r
337 return;\r
338 case 0xa:\r
339 dprintf("s68k set CDC dma addr");\r
340 break;\r
341 case 0xc:\r
342 case 0xd:\r
343 dprintf("s68k set stopwatch timer");\r
344 Pico_mcd->m.timer_stopwatch = 0;\r
345 return;\r
346 case 0xe:\r
347 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
348 return;\r
349 case 0x31:\r
350 dprintf("s68k set int3 timer: %02x", d);\r
351 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
352 break;\r
353 case 0x33: // IRQ mask\r
354 dprintf("s68k irq mask: %02x", d);\r
355 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
356 CDD_Export_Status();\r
357 }\r
358 break;\r
359 case 0x34: // fader\r
360 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r
361 return;\r
362 case 0x36:\r
363 return; // d/m bit is unsetable\r
364 case 0x37: {\r
365 u32 d_old = Pico_mcd->s68k_regs[0x37];\r
366 Pico_mcd->s68k_regs[0x37] = d&7;\r
367 if ((d&4) && !(d_old&4)) {\r
368 CDD_Export_Status();\r
369 }\r
370 return;\r
371 }\r
372 case 0x4b:\r
373 Pico_mcd->s68k_regs[a] = (u8) d;\r
374 CDD_Import_Command();\r
375 return;\r
376 }\r
377\r
378 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
379 {\r
380 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
381 return;\r
382 }\r
383\r
384 Pico_mcd->s68k_regs[a] = (u8) d;\r
385}\r
386\r
387\r
388static u32 OtherRead16End(u32 a, int realsize)\r
389{\r
390 u32 d=0;\r
391\r
392#ifndef _ASM_CD_MEMORY_C\r
393 if ((a&0xffffc0)==0xa12000) {\r
394 d=m68k_reg_read16(a);\r
395 goto end;\r
396 }\r
397\r
398 if (a==0x400000) {\r
399 if (SRam.data != NULL) d=3; // 64k cart\r
400 goto end;\r
401 }\r
402\r
403 if ((a&0xfe0000)==0x600000) {\r
404 if (SRam.data != NULL) {\r
405 d=SRam.data[((a>>1)&0xffff)+0x2000];\r
406 if (realsize == 8) d|=d<<8;\r
407 }\r
408 goto end;\r
409 }\r
410\r
411 if (a==0x7ffffe) {\r
412 d=Pico_mcd->m.bcram_reg;\r
413 goto end;\r
414 }\r
415#endif\r
416\r
417 elprintf(EL_UIO, "m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);\r
418\r
419#ifndef _ASM_CD_MEMORY_C\r
420end:\r
421#endif\r
422 return d;\r
423}\r
424\r
425\r
426static void OtherWrite8End(u32 a, u32 d, int realsize)\r
427{\r
428#ifndef _ASM_CD_MEMORY_C\r
429 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }\r
430\r
431 if ((a&0xfe0000)==0x600000) {\r
432 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {\r
433 SRam.data[((a>>1)&0xffff)+0x2000]=d;\r
434 SRam.changed = 1;\r
435 }\r
436 return;\r
437 }\r
438\r
439 if (a==0x7fffff) {\r
440 Pico_mcd->m.bcram_reg=d;\r
441 return;\r
442 }\r
443#endif\r
444\r
445 elprintf(EL_UIO, "m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
446}\r
447\r
448#ifndef _ASM_CD_MEMORY_C\r
449#define _CD_MEMORY_C\r
450#undef _ASM_MEMORY_C\r
451#include "../memory_cmn.c"\r
452#include "cell_map.c"\r
453#endif\r
454\r
455\r
456// -----------------------------------------------------------------\r
457// Read Rom and read Ram\r
458\r
459#ifdef _ASM_CD_MEMORY_C\r
460u32 PicoReadM68k8(u32 a);\r
461#else\r
462u32 PicoReadM68k8(u32 a)\r
463{\r
464 u32 d=0;\r
465\r
466 a&=0xffffff;\r
467\r
468 switch (a >> 17)\r
469 {\r
470 case 0x00>>1: // BIOS: 000000 - 020000\r
471 d = *(u8 *)(Pico_mcd->bios+(a^1));\r
472 break;\r
473 case 0x02>>1: // prg RAM\r
474 if ((Pico_mcd->m.busreq&3)!=1) {\r
475 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
476 d = *(prg_bank+((a^1)&0x1ffff));\r
477 }\r
478 break;\r
479 case 0x20>>1: // word RAM: 200000 - 220000\r
480 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
481 a &= 0x1ffff;\r
482 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
483 int bank = Pico_mcd->s68k_regs[3]&1;\r
484 d = Pico_mcd->word_ram1M[bank][a^1];\r
485 } else {\r
486 // allow access in any mode, like Gens does\r
487 d = Pico_mcd->word_ram2M[a^1];\r
488 }\r
489 wrdprintf("ret = %02x", (u8)d);\r
490 break;\r
491 case 0x22>>1: // word RAM: 220000 - 240000\r
492 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);\r
493 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
494 int bank = Pico_mcd->s68k_regs[3]&1;\r
495 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
496 d = Pico_mcd->word_ram1M[bank][a^1];\r
497 } else {\r
498 // allow access in any mode, like Gens does\r
499 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
500 }\r
501 wrdprintf("ret = %02x", (u8)d);\r
502 break;\r
503 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
504 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
505 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
506 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
507 // VDP\r
508 if ((a&0xe700e0)==0xc00000)\r
509 d=PicoVideoRead8(a);\r
510 break;\r
511 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
512 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
513 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
514 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
515 // RAM:\r
516 d = *(u8 *)(Pico.ram+((a^1)&0xffff));\r
517 break;\r
518 default:\r
519 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram\r
520 if ((a&0xffffc0)==0xa12000)\r
521 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);\r
522\r
523 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;\r
524\r
525 if ((a&0xffffc0)==0xa12000)\r
526 rdprintf("ret = %02x", (u8)d);\r
527 break;\r
528 }\r
529\r
530\r
531 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
532#ifdef EMU_CORE_DEBUG\r
533 if (a>=Pico.romsize) {\r
534 lastread_a = a;\r
535 lastread_d[lrp_cyc++&15] = d;\r
536 }\r
537#endif\r
538 return d;\r
539}\r
540#endif\r
541\r
542\r
543#ifdef _ASM_CD_MEMORY_C\r
544u32 PicoReadM68k16(u32 a);\r
545#else\r
546static u32 PicoReadM68k16(u32 a)\r
547{\r
548 u32 d=0;\r
549\r
550 a&=0xfffffe;\r
551\r
552 switch (a >> 17)\r
553 {\r
554 case 0x00>>1: // BIOS: 000000 - 020000\r
555 d = *(u16 *)(Pico_mcd->bios+a);\r
556 break;\r
557 case 0x02>>1: // prg RAM\r
558 if ((Pico_mcd->m.busreq&3)!=1) {\r
559 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
560 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);\r
561 d = *(u16 *)(prg_bank+(a&0x1fffe));\r
562 wrdprintf("ret = %04x", d);\r
563 }\r
564 break;\r
565 case 0x20>>1: // word RAM: 200000 - 220000\r
566 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
567 a &= 0x1fffe;\r
568 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
569 int bank = Pico_mcd->s68k_regs[3]&1;\r
570 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
571 } else {\r
572 // allow access in any mode, like Gens does\r
573 d = *(u16 *)(Pico_mcd->word_ram2M+a);\r
574 }\r
575 wrdprintf("ret = %04x", d);\r
576 break;\r
577 case 0x22>>1: // word RAM: 220000 - 240000\r
578 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);\r
579 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
580 int bank = Pico_mcd->s68k_regs[3]&1;\r
581 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
582 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
583 } else {\r
584 // allow access in any mode, like Gens does\r
585 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
586 }\r
587 wrdprintf("ret = %04x", d);\r
588 break;\r
589 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
590 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
591 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
592 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
593 // VDP\r
594 if ((a&0xe700e0)==0xc00000)\r
595 d=PicoVideoRead(a);\r
596 break;\r
597 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
598 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
599 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
600 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:\r
601 // RAM:\r
602 d=*(u16 *)(Pico.ram+(a&0xfffe));\r
603 break;\r
604 default:\r
605 if ((a&0xffffc0)==0xa12000)\r
606 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
607\r
608 d = OtherRead16(a, 16);\r
609\r
610 if ((a&0xffffc0)==0xa12000)\r
611 rdprintf("ret = %04x", d);\r
612 break;\r
613 }\r
614\r
615\r
616 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
617#ifdef EMU_CORE_DEBUG\r
618 if (a>=Pico.romsize) {\r
619 lastread_a = a;\r
620 lastread_d[lrp_cyc++&15] = d;\r
621 }\r
622#endif\r
623 return d;\r
624}\r
625#endif\r
626\r
627\r
628#ifdef _ASM_CD_MEMORY_C\r
629u32 PicoReadM68k32(u32 a);\r
630#else\r
631static u32 PicoReadM68k32(u32 a)\r
632{\r
633 u32 d=0;\r
634\r
635 a&=0xfffffe;\r
636\r
637 switch (a >> 17)\r
638 {\r
639 case 0x00>>1: { // BIOS: 000000 - 020000\r
640 u16 *pm=(u16 *)(Pico_mcd->bios+a);\r
641 d = (pm[0]<<16)|pm[1];\r
642 break;\r
643 }\r
644 case 0x02>>1: // prg RAM\r
645 if ((Pico_mcd->m.busreq&3)!=1) {\r
646 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
647 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
648 d = (pm[0]<<16)|pm[1];\r
649 }\r
650 break;\r
651 case 0x20>>1: // word RAM: 200000 - 220000\r
652 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
653 a&=0x1fffe;\r
654 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
655 int bank = Pico_mcd->s68k_regs[3]&1;\r
656 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);\r
657 d = (pm[0]<<16)|pm[1];\r
658 } else {\r
659 // allow access in any mode, like Gens does\r
660 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);\r
661 d = (pm[0]<<16)|pm[1];\r
662 }\r
663 wrdprintf("ret = %08x", d);\r
664 break;\r
665 case 0x22>>1: // word RAM: 220000 - 240000\r
666 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);\r
667 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?\r
668 u32 a1, a2;\r
669 int bank = Pico_mcd->s68k_regs[3]&1;\r
670 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
671 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
672 else a2 = a1 + 2;\r
673 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;\r
674 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);\r
675 } else {\r
676 // allow access in any mode, like Gens does\r
677 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
678 d = (pm[0]<<16)|pm[1];\r
679 }\r
680 wrdprintf("ret = %08x", d);\r
681 break;\r
682 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:\r
683 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:\r
684 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:\r
685 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:\r
686 // VDP\r
687 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
688 break;\r
689 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:\r
690 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:\r
691 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:\r
692 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {\r
693 // RAM:\r
694 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
695 d = (pm[0]<<16)|pm[1];\r
696 break;\r
697 }\r
698 default:\r
699 if ((a&0xffffc0)==0xa12000)\r
700 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);\r
701\r
702 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
703\r
704 if ((a&0xffffc0)==0xa12000)\r
705 rdprintf("ret = %08x", d);\r
706 break;\r
707 }\r
708\r
709\r
710 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
711#ifdef EMU_CORE_DEBUG\r
712 if (a>=Pico.romsize) {\r
713 lastread_a = a;\r
714 lastread_d[lrp_cyc++&15] = d;\r
715 }\r
716#endif\r
717 return d;\r
718}\r
719#endif\r
720\r
721\r
722// -----------------------------------------------------------------\r
723\r
724#ifdef _ASM_CD_MEMORY_C\r
725void PicoWriteM68k8(u32 a,u8 d);\r
726#else\r
727void PicoWriteM68k8(u32 a,u8 d)\r
728{\r
729 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
730#ifdef EMU_CORE_DEBUG\r
731 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
732#endif\r
733\r
734 if ((a&0xe00000)==0xe00000) { // Ram\r
735 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;\r
736 return;\r
737 }\r
738\r
739 // prg RAM\r
740 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
741 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
742 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;\r
743 return;\r
744 }\r
745\r
746 a&=0xffffff;\r
747\r
748 // word RAM\r
749 if ((a&0xfc0000)==0x200000) {\r
750 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);\r
751 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
752 int bank = Pico_mcd->s68k_regs[3]&1;\r
753 if (a >= 0x220000)\r
754 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
755 else a &= 0x1ffff;\r
756 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;\r
757 } else {\r
758 // allow access in any mode, like Gens does\r
759 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
760 }\r
761 return;\r
762 }\r
763\r
764 if ((a&0xffffc0)==0xa12000) {\r
765 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r
766 m68k_reg_write8(a, d);\r
767 return;\r
768 }\r
769\r
770 OtherWrite8(a,d);\r
771}\r
772#endif\r
773\r
774\r
775#ifdef _ASM_CD_MEMORY_C\r
776void PicoWriteM68k16(u32 a,u16 d);\r
777#else\r
778static void PicoWriteM68k16(u32 a,u16 d)\r
779{\r
780 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
781#ifdef EMU_CORE_DEBUG\r
782 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
783#endif\r
784\r
785 if ((a&0xe00000)==0xe00000) { // Ram\r
786 *(u16 *)(Pico.ram+(a&0xfffe))=d;\r
787 return;\r
788 }\r
789\r
790 // prg RAM\r
791 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
792 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
793 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);\r
794 *(u16 *)(prg_bank+(a&0x1fffe))=d;\r
795 return;\r
796 }\r
797\r
798 a&=0xfffffe;\r
799\r
800 // word RAM\r
801 if ((a&0xfc0000)==0x200000) {\r
802 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);\r
803 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
804 int bank = Pico_mcd->s68k_regs[3]&1;\r
805 if (a >= 0x220000)\r
806 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged\r
807 else a &= 0x1fffe;\r
808 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;\r
809 } else {\r
810 // allow access in any mode, like Gens does\r
811 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
812 }\r
813 return;\r
814 }\r
815\r
816 // regs\r
817 if ((a&0xffffc0)==0xa12000) {\r
818 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
819 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
820 Pico_mcd->s68k_regs[0xe] = d >> 8;\r
821#ifdef USE_POLL_DETECT\r
822 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
823 SekSetStopS68k(0); s68k_poll_adclk = 0;\r
824 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
825 }\r
826#endif\r
827 return;\r
828 }\r
829 m68k_reg_write8(a, d>>8);\r
830 m68k_reg_write8(a+1,d&0xff);\r
831 return;\r
832 }\r
833\r
834 // VDP\r
835 if ((a&0xe700e0)==0xc00000) {\r
836 PicoVideoWrite(a,(u16)d);\r
837 return;\r
838 }\r
839\r
840 OtherWrite16(a,d);\r
841}\r
842#endif\r
843\r
844\r
845#ifdef _ASM_CD_MEMORY_C\r
846void PicoWriteM68k32(u32 a,u32 d);\r
847#else\r
848static void PicoWriteM68k32(u32 a,u32 d)\r
849{\r
850 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
851#ifdef EMU_CORE_DEBUG\r
852 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
853#endif\r
854\r
855 if ((a&0xe00000)==0xe00000)\r
856 {\r
857 // Ram:\r
858 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
859 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
860 return;\r
861 }\r
862\r
863 // prg RAM\r
864 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {\r
865 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];\r
866 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));\r
867 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
868 return;\r
869 }\r
870\r
871 a&=0xfffffe;\r
872\r
873 // word RAM\r
874 if ((a&0xfc0000)==0x200000) {\r
875 if (d != 0) // don't log clears\r
876 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);\r
877 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?\r
878 int bank = Pico_mcd->s68k_regs[3]&1;\r
879 if (a >= 0x220000) { // cell arranged\r
880 u32 a1, a2;\r
881 a1 = (a&2) | (cell_map(a >> 2) << 2);\r
882 if (a&2) a2 = cell_map((a+2) >> 2) << 2;\r
883 else a2 = a1 + 2;\r
884 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;\r
885 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;\r
886 } else {\r
887 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
888 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
889 }\r
890 } else {\r
891 // allow access in any mode, like Gens does\r
892 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
893 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
894 }\r
895 return;\r
896 }\r
897\r
898 if ((a&0xffffc0)==0xa12000) {\r
899 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);\r
900 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);\r
901 }\r
902\r
903 // VDP\r
904 if ((a&0xe700e0)==0xc00000)\r
905 {\r
906 PicoVideoWrite(a, (u16)(d>>16));\r
907 PicoVideoWrite(a+2,(u16)d);\r
908 return;\r
909 }\r
910\r
911 OtherWrite16(a, (u16)(d>>16));\r
912 OtherWrite16(a+2,(u16)d);\r
913}\r
914#endif\r
915\r
916\r
917// -----------------------------------------------------------------\r
918// S68k\r
919// -----------------------------------------------------------------\r
920\r
921#ifdef _ASM_CD_MEMORY_C\r
922u32 PicoReadS68k8(u32 a);\r
923#else\r
924static u32 PicoReadS68k8(u32 a)\r
925{\r
926 u32 d=0;\r
927\r
928#ifdef EMU_CORE_DEBUG\r
929 u32 ab=a&0xfffffe;\r
930#endif\r
931 a&=0xffffff;\r
932\r
933 // prg RAM\r
934 if (a < 0x80000) {\r
935 d = *(Pico_mcd->prg_ram+(a^1));\r
936 goto end;\r
937 }\r
938\r
939 // regs\r
940 if ((a&0xfffe00) == 0xff8000) {\r
941 a &= 0x1ff;\r
942 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
943 if (a >= 0x0e && a < 0x30) {\r
944 d = Pico_mcd->s68k_regs[a];\r
945 s68k_poll_detect(a, d);\r
946 rdprintf("ret = %02x", (u8)d);\r
947 goto end;\r
948 }\r
949 else if (a >= 0x58 && a < 0x68)\r
950 d = gfx_cd_read(a&~1);\r
951 else d = s68k_reg_read16(a&~1);\r
952 if ((a&1)==0) d>>=8;\r
953 rdprintf("ret = %02x", (u8)d);\r
954 goto end;\r
955 }\r
956\r
957 // word RAM (2M area)\r
958 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
959 // test: batman returns\r
960 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);\r
961 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
962 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
963 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
964 if (a&1) d &= 0x0f;\r
965 else d >>= 4;\r
966 } else {\r
967 // allow access in any mode, like Gens does\r
968 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];\r
969 }\r
970 wrdprintf("ret = %02x", (u8)d);\r
971 goto end;\r
972 }\r
973\r
974 // word RAM (1M area)\r
975 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
976 int bank;\r
977 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);\r
978// if (!(Pico_mcd->s68k_regs[3]&4))\r
979// dprintf("s68k_wram1M FIXME: wrong mode");\r
980 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
981 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];\r
982 wrdprintf("ret = %02x", (u8)d);\r
983 goto end;\r
984 }\r
985\r
986 // PCM\r
987 if ((a&0xff8000)==0xff0000) {\r
988 elprintf(EL_IO, "s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);\r
989 a &= 0x7fff;\r
990 if (a >= 0x2000)\r
991 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
992 else if (a >= 0x20) {\r
993 a &= 0x1e;\r
994 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
995 if (a & 2) d >>= 8;\r
996 }\r
997 elprintf(EL_IO, "ret = %02x", (u8)d);\r
998 goto end;\r
999 }\r
1000\r
1001 // bram\r
1002 if ((a&0xff0000)==0xfe0000) {\r
1003 d = Pico_mcd->bram[(a>>1)&0x1fff];\r
1004 goto end;\r
1005 }\r
1006\r
1007 elprintf(EL_UIO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
1008\r
1009 end:\r
1010\r
1011 elprintf(EL_IO, "s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
1012#ifdef EMU_CORE_DEBUG\r
1013 lastread_a = ab;\r
1014 lastread_d[lrp_cyc++&15] = d;\r
1015#endif\r
1016 return d;\r
1017}\r
1018#endif\r
1019\r
1020\r
1021#ifdef _ASM_CD_MEMORY_C\r
1022u32 PicoReadS68k16(u32 a);\r
1023#else\r
1024static u32 PicoReadS68k16(u32 a)\r
1025{\r
1026 u32 d=0;\r
1027\r
1028#ifdef EMU_CORE_DEBUG\r
1029 u32 ab=a&0xfffffe;\r
1030#endif\r
1031 a&=0xfffffe;\r
1032\r
1033 // prg RAM\r
1034 if (a < 0x80000) {\r
1035 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);\r
1036 d = *(u16 *)(Pico_mcd->prg_ram+a);\r
1037 wrdprintf("ret = %04x", d);\r
1038 goto end;\r
1039 }\r
1040\r
1041 // regs\r
1042 if ((a&0xfffe00) == 0xff8000) {\r
1043 a &= 0x1fe;\r
1044 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
1045 if (a >= 0x58 && a < 0x68)\r
1046 d = gfx_cd_read(a);\r
1047 else d = s68k_reg_read16(a);\r
1048 rdprintf("ret = %04x", d);\r
1049 goto end;\r
1050 }\r
1051\r
1052 // word RAM (2M area)\r
1053 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
1054 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);\r
1055 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
1056 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1057 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];\r
1058 d |= d << 4; d &= ~0xf0;\r
1059 } else {\r
1060 // allow access in any mode, like Gens does\r
1061 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1062 }\r
1063 wrdprintf("ret = %04x", d);\r
1064 goto end;\r
1065 }\r
1066\r
1067 // word RAM (1M area)\r
1068 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1069 int bank;\r
1070 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);\r
1071// if (!(Pico_mcd->s68k_regs[3]&4))\r
1072// dprintf("s68k_wram1M FIXME: wrong mode");\r
1073 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1074 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1075 wrdprintf("ret = %04x", d);\r
1076 goto end;\r
1077 }\r
1078\r
1079 // bram\r
1080 if ((a&0xff0000)==0xfe0000) {\r
1081 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r
1082 a = (a>>1)&0x1fff;\r
1083 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..\r
1084 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong\r
1085 dprintf("ret = %04x", d);\r
1086 goto end;\r
1087 }\r
1088\r
1089 // PCM\r
1090 if ((a&0xff8000)==0xff0000) {\r
1091 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r
1092 a &= 0x7fff;\r
1093 if (a >= 0x2000)\r
1094 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r
1095 else if (a >= 0x20) {\r
1096 a &= 0x1e;\r
1097 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1098 if (a & 2) d >>= 8;\r
1099 }\r
1100 dprintf("ret = %04x", d);\r
1101 goto end;\r
1102 }\r
1103\r
1104 elprintf(EL_UIO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1105\r
1106 end:\r
1107\r
1108 elprintf(EL_IO, "s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1109#ifdef EMU_CORE_DEBUG\r
1110 lastread_a = ab;\r
1111 lastread_d[lrp_cyc++&15] = d;\r
1112#endif\r
1113 return d;\r
1114}\r
1115#endif\r
1116\r
1117\r
1118#ifdef _ASM_CD_MEMORY_C\r
1119u32 PicoReadS68k32(u32 a);\r
1120#else\r
1121static u32 PicoReadS68k32(u32 a)\r
1122{\r
1123 u32 d=0;\r
1124\r
1125#ifdef EMU_CORE_DEBUG\r
1126 u32 ab=a&0xfffffe;\r
1127#endif\r
1128 a&=0xfffffe;\r
1129\r
1130 // prg RAM\r
1131 if (a < 0x80000) {\r
1132 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1133 d = (pm[0]<<16)|pm[1];\r
1134 goto end;\r
1135 }\r
1136\r
1137 // regs\r
1138 if ((a&0xfffe00) == 0xff8000) {\r
1139 a &= 0x1fe;\r
1140 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);\r
1141 if (a >= 0x58 && a < 0x68)\r
1142 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);\r
1143 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);\r
1144 rdprintf("ret = %08x", d);\r
1145 goto end;\r
1146 }\r
1147\r
1148 // word RAM (2M area)\r
1149 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
1150 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);\r
1151 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?\r
1152 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1153 a >>= 1;\r
1154 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;\r
1155 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];\r
1156 d |= d << 4; d &= 0x0f0f0f0f;\r
1157 } else {\r
1158 // allow access in any mode, like Gens does\r
1159 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];\r
1160 }\r
1161 wrdprintf("ret = %08x", d);\r
1162 goto end;\r
1163 }\r
1164\r
1165 // word RAM (1M area)\r
1166 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1167 int bank;\r
1168 u16 *pm;\r
1169 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);\r
1170// if (!(Pico_mcd->s68k_regs[3]&4))\r
1171// dprintf("s68k_wram1M FIXME: wrong mode");\r
1172 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1173 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];\r
1174 wrdprintf("ret = %08x", d);\r
1175 goto end;\r
1176 }\r
1177\r
1178 // PCM\r
1179 if ((a&0xff8000)==0xff0000) {\r
1180 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);\r
1181 a &= 0x7fff;\r
1182 if (a >= 0x2000) {\r
1183 a >>= 1;\r
1184 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;\r
1185 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];\r
1186 } else if (a >= 0x20) {\r
1187 a &= 0x1e;\r
1188 if (a & 2) {\r
1189 a >>= 2;\r
1190 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;\r
1191 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;\r
1192 } else {\r
1193 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r
1194 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE\r
1195 }\r
1196 }\r
1197 dprintf("ret = %08x", d);\r
1198 goto end;\r
1199 }\r
1200\r
1201 // bram\r
1202 if ((a&0xff0000)==0xfe0000) {\r
1203 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);\r
1204 a = (a>>1)&0x1fff;\r
1205 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..\r
1206 d|= Pico_mcd->bram[a++] << 24;\r
1207 d|= Pico_mcd->bram[a++];\r
1208 d|= Pico_mcd->bram[a++] << 8;\r
1209 dprintf("ret = %08x", d);\r
1210 goto end;\r
1211 }\r
1212\r
1213 elprintf(EL_UIO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1214\r
1215 end:\r
1216\r
1217 elprintf(EL_IO, "s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1218#ifdef EMU_CORE_DEBUG\r
1219 if (ab > 0x78) { // not vectors and stuff\r
1220 lastread_a = ab;\r
1221 lastread_d[lrp_cyc++&15] = d;\r
1222 }\r
1223#endif\r
1224 return d;\r
1225}\r
1226#endif\r
1227\r
1228\r
1229#ifndef _ASM_CD_MEMORY_C\r
1230/* check: jaguar xj 220 (draws entire world using decode) */\r
1231static void decode_write8(u32 a, u8 d, int r3)\r
1232{\r
1233 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
1234 u8 oldmask = (a&1) ? 0xf0 : 0x0f;\r
1235\r
1236 r3 &= 0x18;\r
1237 d &= 0x0f;\r
1238 if (!(a&1)) d <<= 4;\r
1239\r
1240 if (r3 == 8) {\r
1241 if ((!(*pd & (~oldmask))) && d) goto do_it;\r
1242 } else if (r3 > 8) {\r
1243 if (d) goto do_it;\r
1244 } else {\r
1245 goto do_it;\r
1246 }\r
1247\r
1248 return;\r
1249do_it:\r
1250 *pd = d | (*pd & oldmask);\r
1251}\r
1252\r
1253\r
1254static void decode_write16(u32 a, u16 d, int r3)\r
1255{\r
1256 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);\r
1257\r
1258 //if ((a & 0x3ffff) < 0x28000) return;\r
1259\r
1260 r3 &= 0x18;\r
1261 d &= 0x0f0f;\r
1262 d |= d >> 4;\r
1263\r
1264 if (r3 == 8) {\r
1265 u8 dold = *pd;\r
1266 if (!(dold & 0xf0)) dold |= d & 0xf0;\r
1267 if (!(dold & 0x0f)) dold |= d & 0x0f;\r
1268 *pd = dold;\r
1269 } else if (r3 > 8) {\r
1270 u8 dold = *pd;\r
1271 if (!(d & 0xf0)) d |= dold & 0xf0;\r
1272 if (!(d & 0x0f)) d |= dold & 0x0f;\r
1273 *pd = d;\r
1274 } else {\r
1275 *pd = d;\r
1276 }\r
1277}\r
1278#endif\r
1279\r
1280// -----------------------------------------------------------------\r
1281\r
1282#ifdef _ASM_CD_MEMORY_C\r
1283void PicoWriteS68k8(u32 a,u8 d);\r
1284#else\r
1285static void PicoWriteS68k8(u32 a,u8 d)\r
1286{\r
1287 elprintf(EL_IO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1288\r
1289 a&=0xffffff;\r
1290\r
1291#ifdef EMU_CORE_DEBUG\r
1292 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1293#endif\r
1294\r
1295 // prg RAM\r
1296 if (a < 0x80000) {\r
1297 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));\r
1298 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;\r
1299 return;\r
1300 }\r
1301\r
1302 // regs\r
1303 if ((a&0xfffe00) == 0xff8000) {\r
1304 a &= 0x1ff;\r
1305 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
1306 if (a >= 0x58 && a < 0x68)\r
1307 gfx_cd_write16(a&~1, (d<<8)|d);\r
1308 else s68k_reg_write8(a,d);\r
1309 return;\r
1310 }\r
1311\r
1312 // word RAM (2M area)\r
1313 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
1314 int r3 = Pico_mcd->s68k_regs[3];\r
1315 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
1316 if (r3 & 4) { // 1M decode mode?\r
1317 decode_write8(a, d, r3);\r
1318 } else {\r
1319 // allow access in any mode, like Gens does\r
1320 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;\r
1321 }\r
1322 return;\r
1323 }\r
1324\r
1325 // word RAM (1M area)\r
1326 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1327 // Wing Commander tries to write here in wrong mode\r
1328 int bank;\r
1329 if (d)\r
1330 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);\r
1331// if (!(Pico_mcd->s68k_regs[3]&4))\r
1332// dprintf("s68k_wram1M FIXME: wrong mode");\r
1333 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1334 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;\r
1335 return;\r
1336 }\r
1337\r
1338 // PCM\r
1339 if ((a&0xff8000)==0xff0000) {\r
1340 a &= 0x7fff;\r
1341 if (a >= 0x2000)\r
1342 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1343 else if (a < 0x12)\r
1344 pcm_write(a>>1, d);\r
1345 return;\r
1346 }\r
1347\r
1348 // bram\r
1349 if ((a&0xff0000)==0xfe0000) {\r
1350 Pico_mcd->bram[(a>>1)&0x1fff] = d;\r
1351 SRam.changed = 1;\r
1352 return;\r
1353 }\r
1354\r
1355 elprintf(EL_UIO, "s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);\r
1356}\r
1357#endif\r
1358\r
1359\r
1360#ifdef _ASM_CD_MEMORY_C\r
1361void PicoWriteS68k16(u32 a,u16 d);\r
1362#else\r
1363static void PicoWriteS68k16(u32 a,u16 d)\r
1364{\r
1365 elprintf(EL_IO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1366\r
1367 a&=0xfffffe;\r
1368\r
1369#ifdef EMU_CORE_DEBUG\r
1370 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1371#endif\r
1372\r
1373 // prg RAM\r
1374 if (a < 0x80000) {\r
1375 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
1376 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer\r
1377 *(u16 *)(Pico_mcd->prg_ram+a)=d;\r
1378 return;\r
1379 }\r
1380\r
1381 // regs\r
1382 if ((a&0xfffe00) == 0xff8000) {\r
1383 a &= 0x1fe;\r
1384 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
1385 if (a >= 0x58 && a < 0x68)\r
1386 gfx_cd_write16(a, d);\r
1387 else {\r
1388 if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
1389 Pico_mcd->s68k_regs[0xf] = d;\r
1390 return;\r
1391 }\r
1392 s68k_reg_write8(a, d>>8);\r
1393 s68k_reg_write8(a+1,d&0xff);\r
1394 }\r
1395 return;\r
1396 }\r
1397\r
1398 // word RAM (2M area)\r
1399 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
1400 int r3 = Pico_mcd->s68k_regs[3];\r
1401 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
1402 if (r3 & 4) { // 1M decode mode?\r
1403 decode_write16(a, d, r3);\r
1404 } else {\r
1405 // allow access in any mode, like Gens does\r
1406 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;\r
1407 }\r
1408 return;\r
1409 }\r
1410\r
1411 // word RAM (1M area)\r
1412 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1413 int bank;\r
1414 if (d)\r
1415 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
1416// if (!(Pico_mcd->s68k_regs[3]&4))\r
1417// dprintf("s68k_wram1M FIXME: wrong mode");\r
1418 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1419 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;\r
1420 return;\r
1421 }\r
1422\r
1423 // PCM\r
1424 if ((a&0xff8000)==0xff0000) {\r
1425 a &= 0x7fff;\r
1426 if (a >= 0x2000)\r
1427 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r
1428 else if (a < 0x12)\r
1429 pcm_write(a>>1, d & 0xff);\r
1430 return;\r
1431 }\r
1432\r
1433 // bram\r
1434 if ((a&0xff0000)==0xfe0000) {\r
1435 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r
1436 a = (a>>1)&0x1fff;\r
1437 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..\r
1438 Pico_mcd->bram[a++] = d >> 8;\r
1439 SRam.changed = 1;\r
1440 return;\r
1441 }\r
1442\r
1443 elprintf(EL_UIO, "s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);\r
1444}\r
1445#endif\r
1446\r
1447\r
1448#ifdef _ASM_CD_MEMORY_C\r
1449void PicoWriteS68k32(u32 a,u32 d);\r
1450#else\r
1451static void PicoWriteS68k32(u32 a,u32 d)\r
1452{\r
1453 elprintf(EL_IO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1454\r
1455 a&=0xfffffe;\r
1456\r
1457#ifdef EMU_CORE_DEBUG\r
1458 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
1459#endif\r
1460\r
1461 // prg RAM\r
1462 if (a < 0x80000) {\r
1463 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {\r
1464 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);\r
1465 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1466 }\r
1467 return;\r
1468 }\r
1469\r
1470 // regs\r
1471 if ((a&0xfffe00) == 0xff8000) {\r
1472 a &= 0x1fe;\r
1473 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
1474 if (a >= 0x58 && a < 0x68) {\r
1475 gfx_cd_write16(a, d>>16);\r
1476 gfx_cd_write16(a+2, d&0xffff);\r
1477 } else {\r
1478 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);\r
1479 s68k_reg_write8(a, d>>24);\r
1480 s68k_reg_write8(a+1,(d>>16)&0xff);\r
1481 s68k_reg_write8(a+2,(d>>8) &0xff);\r
1482 s68k_reg_write8(a+3, d &0xff);\r
1483 }\r
1484 return;\r
1485 }\r
1486\r
1487 // word RAM (2M area)\r
1488 if ((a&0xfc0000)==0x080000) { // 080000-0bffff\r
1489 int r3 = Pico_mcd->s68k_regs[3];\r
1490 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
1491 if (r3 & 4) { // 1M decode mode?\r
1492 decode_write16(a , d >> 16, r3);\r
1493 decode_write16(a+2, d , r3);\r
1494 } else {\r
1495 // allow access in any mode, like Gens does\r
1496 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1497 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1498 }\r
1499 return;\r
1500 }\r
1501\r
1502 // word RAM (1M area)\r
1503 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff\r
1504 int bank;\r
1505 u16 *pm;\r
1506 if (d)\r
1507 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
1508// if (!(Pico_mcd->s68k_regs[3]&4))\r
1509// dprintf("s68k_wram1M FIXME: wrong mode");\r
1510 bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1511 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1512 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
1513 return;\r
1514 }\r
1515\r
1516 // PCM\r
1517 if ((a&0xff8000)==0xff0000) {\r
1518 a &= 0x7fff;\r
1519 if (a >= 0x2000) {\r
1520 a >>= 1;\r
1521 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);\r
1522 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;\r
1523 } else if (a < 0x12) {\r
1524 a >>= 1;\r
1525 pcm_write(a, (d>>16) & 0xff);\r
1526 pcm_write(a+1, d & 0xff);\r
1527 }\r
1528 return;\r
1529 }\r
1530\r
1531 // bram\r
1532 if ((a&0xff0000)==0xfe0000) {\r
1533 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);\r
1534 a = (a>>1)&0x1fff;\r
1535 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?\r
1536 Pico_mcd->bram[a++] = d >> 24;\r
1537 Pico_mcd->bram[a++] = d;\r
1538 Pico_mcd->bram[a++] = d >> 8;\r
1539 SRam.changed = 1;\r
1540 return;\r
1541 }\r
1542\r
1543 elprintf(EL_UIO, "s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);\r
1544}\r
1545#endif\r
1546\r
1547\r
1548// -----------------------------------------------------------------\r
1549\r
1550\r
1551#ifdef EMU_C68K\r
1552static __inline int PicoMemBaseM68k(u32 pc)\r
1553{\r
1554 if ((pc&0xe00000)==0xe00000)\r
1555 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
1556\r
1557 if (pc < 0x20000)\r
1558 return (int)Pico_mcd->bios; // Program Counter in BIOS\r
1559\r
1560 if ((pc&0xfc0000)==0x200000)\r
1561 {\r
1562 if (!(Pico_mcd->s68k_regs[3]&4))\r
1563 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
1564 if (pc < 0x220000) {\r
1565 int bank = Pico_mcd->s68k_regs[3]&1;\r
1566 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
1567 }\r
1568 }\r
1569\r
1570 // Error - Program Counter is invalid\r
1571 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);\r
1572\r
1573 return (int)Pico_mcd->bios;\r
1574}\r
1575\r
1576\r
1577static u32 PicoCheckPcM68k(u32 pc)\r
1578{\r
1579 pc-=PicoCpuCM68k.membase; // Get real pc\r
1580 pc&=0xfffffe;\r
1581\r
1582 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);\r
1583\r
1584 return PicoCpuCM68k.membase+pc;\r
1585}\r
1586\r
1587\r
1588static __inline int PicoMemBaseS68k(u32 pc)\r
1589{\r
1590 if (pc < 0x80000) // PRG RAM\r
1591 return (int)Pico_mcd->prg_ram;\r
1592\r
1593 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
1594 return (int)Pico_mcd->word_ram2M - 0x080000;\r
1595\r
1596 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
1597 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1598 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
1599 }\r
1600\r
1601 // Error - Program Counter is invalid\r
1602 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);\r
1603\r
1604 return (int)Pico_mcd->prg_ram;\r
1605}\r
1606\r
1607\r
1608static u32 PicoCheckPcS68k(u32 pc)\r
1609{\r
1610 pc-=PicoCpuCS68k.membase; // Get real pc\r
1611 pc&=0xfffffe;\r
1612\r
1613 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);\r
1614\r
1615 return PicoCpuCS68k.membase+pc;\r
1616}\r
1617#endif\r
1618\r
1619#ifndef _ASM_CD_MEMORY_C\r
1620void PicoMemResetCD(int r3)\r
1621{\r
1622#ifdef EMU_F68K\r
1623 // update fetchmap..\r
1624 int i;\r
1625 if (!(r3 & 4))\r
1626 {\r
1627 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
1628 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
1629 }\r
1630 else\r
1631 {\r
1632 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
1633 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
1634 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
1635 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
1636 }\r
1637#endif\r
1638}\r
1639#endif\r
1640\r
1641#ifdef EMU_M68K\r
1642static void m68k_mem_setup_cd(void);\r
1643#endif\r
1644\r
1645PICO_INTERNAL void PicoMemSetupCD(void)\r
1646{\r
1647 // additional handlers for common code\r
1648 PicoRead16Hook = OtherRead16End;\r
1649 PicoWrite8Hook = OtherWrite8End;\r
1650\r
1651#ifdef EMU_C68K\r
1652 // Setup m68k memory callbacks:\r
1653 PicoCpuCM68k.checkpc=PicoCheckPcM68k;\r
1654 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;\r
1655 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;\r
1656 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;\r
1657 PicoCpuCM68k.write8 =PicoWriteM68k8;\r
1658 PicoCpuCM68k.write16=PicoWriteM68k16;\r
1659 PicoCpuCM68k.write32=PicoWriteM68k32;\r
1660 // s68k\r
1661 PicoCpuCS68k.checkpc=PicoCheckPcS68k;\r
1662 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;\r
1663 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;\r
1664 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;\r
1665 PicoCpuCS68k.write8 =PicoWriteS68k8;\r
1666 PicoCpuCS68k.write16=PicoWriteS68k16;\r
1667 PicoCpuCS68k.write32=PicoWriteS68k32;\r
1668#endif\r
1669#ifdef EMU_F68K\r
1670 // m68k\r
1671 PicoCpuFM68k.read_byte =PicoReadM68k8;\r
1672 PicoCpuFM68k.read_word =PicoReadM68k16;\r
1673 PicoCpuFM68k.read_long =PicoReadM68k32;\r
1674 PicoCpuFM68k.write_byte=PicoWriteM68k8;\r
1675 PicoCpuFM68k.write_word=PicoWriteM68k16;\r
1676 PicoCpuFM68k.write_long=PicoWriteM68k32;\r
1677 // s68k\r
1678 PicoCpuFS68k.read_byte =PicoReadS68k8;\r
1679 PicoCpuFS68k.read_word =PicoReadS68k16;\r
1680 PicoCpuFS68k.read_long =PicoReadS68k32;\r
1681 PicoCpuFS68k.write_byte=PicoWriteS68k8;\r
1682 PicoCpuFS68k.write_word=PicoWriteS68k16;\r
1683 PicoCpuFS68k.write_long=PicoWriteS68k32;\r
1684\r
1685 // setup FAME fetchmap\r
1686 {\r
1687 int i;\r
1688 // M68k\r
1689 // by default, point everything to fitst 64k of ROM (BIOS)\r
1690 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1691 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
1692 // now real ROM (BIOS)\r
1693 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
1694 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
1695 // .. and RAM\r
1696 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
1697 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
1698 // S68k\r
1699 // PRG RAM is default\r
1700 for (i = 0; i < M68K_FETCHBANK1; i++)\r
1701 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
1702 // real PRG RAM\r
1703 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
1704 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
1705 // WORD RAM 2M area\r
1706 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
1707 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
1708 // PicoMemResetCD() will setup word ram for both\r
1709 }\r
1710#endif\r
1711#ifdef EMU_M68K\r
1712 m68k_mem_setup_cd();\r
1713#endif\r
1714 z80_mem_setup();\r
1715\r
1716 // m68k_poll_addr = m68k_poll_cnt = 0;\r
1717 s68k_poll_adclk = s68k_poll_cnt = 0;\r
1718}\r
1719\r
1720\r
1721#ifdef EMU_M68K\r
1722static unsigned int PicoReadCD8w (unsigned int a) {\r
1723 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);\r
1724}\r
1725static unsigned int PicoReadCD16w(unsigned int a) {\r
1726 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);\r
1727}\r
1728static unsigned int PicoReadCD32w(unsigned int a) {\r
1729 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);\r
1730}\r
1731static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r
1732 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);\r
1733}\r
1734static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r
1735 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);\r
1736}\r
1737static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r
1738 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);\r
1739}\r
1740\r
1741// these are allowed to access RAM\r
1742static unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
1743{\r
1744 a&=0xffffff;\r
1745 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
1746 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
1747 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1748 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1749 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1750 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1751 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1752 }\r
1753 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
1754 } else {\r
1755 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
1756 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
1757 if((a&0xfc0000)==0x200000) { // word RAM\r
1758 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1759 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
1760 else if (a < 0x220000) {\r
1761 int bank = Pico_mcd->s68k_regs[3]&1;\r
1762 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
1763 }\r
1764 }\r
1765 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
1766 }\r
1767 return 0;//(u8) lastread_d;\r
1768}\r
1769static unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
1770{\r
1771 a&=0xffffff;\r
1772 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
1773 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
1774 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1775 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1776 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1777 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1778 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1779 }\r
1780 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
1781 } else {\r
1782 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
1783 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
1784 if((a&0xfc0000)==0x200000) { // word RAM\r
1785 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1786 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
1787 else if (a < 0x220000) {\r
1788 int bank = Pico_mcd->s68k_regs[3]&1;\r
1789 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1790 }\r
1791 }\r
1792 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
1793 }\r
1794 return 0;\r
1795}\r
1796static unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
1797{\r
1798 u16 *pm;\r
1799 a&=0xffffff;\r
1800 if(m68ki_cpu_p == &PicoCpuMS68k) {\r
1801 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
1802 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
1803 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1804 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
1805 int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
1806 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1807 return (pm[0]<<16)|pm[1];\r
1808 }\r
1809 elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
1810 } else {\r
1811 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
1812 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
1813 if((a&0xfc0000)==0x200000) { // word RAM\r
1814 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
1815 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
1816 else if (a < 0x220000) {\r
1817 int bank = Pico_mcd->s68k_regs[3]&1;\r
1818 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
1819 return (pm[0]<<16)|pm[1];\r
1820 }\r
1821 }\r
1822 elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
1823 }\r
1824 return 0;\r
1825}\r
1826\r
1827extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r
1828extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r
1829extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r
1830extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r
1831extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r
1832extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r
1833extern unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address);\r
1834extern unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address);\r
1835extern unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address);\r
1836\r
1837static void m68k_mem_setup_cd(void)\r
1838{\r
1839 pm68k_read_memory_8 = PicoReadCD8w;\r
1840 pm68k_read_memory_16 = PicoReadCD16w;\r
1841 pm68k_read_memory_32 = PicoReadCD32w;\r
1842 pm68k_write_memory_8 = PicoWriteCD8w;\r
1843 pm68k_write_memory_16 = PicoWriteCD16w;\r
1844 pm68k_write_memory_32 = PicoWriteCD32w;\r
1845 pm68k_read_memory_pcr_8 = m68k_read_pcrelative_CD8;\r
1846 pm68k_read_memory_pcr_16 = m68k_read_pcrelative_CD16;\r
1847 pm68k_read_memory_pcr_32 = m68k_read_pcrelative_CD32;\r
1848}\r
1849#endif // EMU_M68K\r
1850\r
fast MegaDrive/MegaCD/32X emulator