| 1 | // (c) Copyright 2007 notaz, All rights reserved. |
| 2 | |
| 3 | |
| 4 | #include "../pico_int.h" |
| 5 | #include "../sound/ym2612.h" |
| 6 | |
| 7 | extern unsigned char formatted_bram[4*0x10]; |
| 8 | extern unsigned int s68k_poll_adclk; |
| 9 | |
| 10 | void (*PicoMCDopenTray)(void) = NULL; |
| 11 | int (*PicoMCDcloseTray)(void) = NULL; |
| 12 | |
| 13 | |
| 14 | PICO_INTERNAL void PicoInitMCD(void) |
| 15 | { |
| 16 | SekInitS68k(); |
| 17 | Init_CD_Driver(); |
| 18 | } |
| 19 | |
| 20 | PICO_INTERNAL void PicoExitMCD(void) |
| 21 | { |
| 22 | End_CD_Driver(); |
| 23 | } |
| 24 | |
| 25 | PICO_INTERNAL void PicoPowerMCD(void) |
| 26 | { |
| 27 | int fmt_size = sizeof(formatted_bram); |
| 28 | memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram)); |
| 29 | memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M)); |
| 30 | memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram)); |
| 31 | memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram)); |
| 32 | memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size); |
| 33 | } |
| 34 | |
| 35 | PICO_INTERNAL int PicoResetMCD(void) |
| 36 | { |
| 37 | memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs)); |
| 38 | memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm)); |
| 39 | memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m)); |
| 40 | |
| 41 | *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6) |
| 42 | Pico_mcd->m.state_flags |= 1; // s68k reset pending |
| 43 | Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset |
| 44 | |
| 45 | Reset_CD(); |
| 46 | LC89510_Reset(); |
| 47 | gfx_cd_reset(); |
| 48 | PicoMemResetCD(1); |
| 49 | #ifdef _ASM_CD_MEMORY_C |
| 50 | //PicoMemResetCDdecode(1); // don't have to call this in 2M mode |
| 51 | #endif |
| 52 | |
| 53 | // use SRam.data for RAM cart |
| 54 | if (PicoOpt&POPT_EN_MCD_RAMCART) { |
| 55 | if (SRam.data == NULL) |
| 56 | SRam.data = calloc(1, 0x12000); |
| 57 | } |
| 58 | else if (SRam.data != NULL) { |
| 59 | free(SRam.data); |
| 60 | SRam.data = NULL; |
| 61 | } |
| 62 | SRam.start = SRam.end = 0; // unused |
| 63 | |
| 64 | return 0; |
| 65 | } |
| 66 | |
| 67 | static __inline void SekRunM68k(int cyc) |
| 68 | { |
| 69 | int cyc_do; |
| 70 | SekCycleAim+=cyc; |
| 71 | if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return; |
| 72 | #if defined(EMU_CORE_DEBUG) |
| 73 | SekCycleCnt+=CM_compareRun(cyc_do, 0); |
| 74 | #elif defined(EMU_C68K) |
| 75 | PicoCpuCM68k.cycles=cyc_do; |
| 76 | CycloneRun(&PicoCpuCM68k); |
| 77 | SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles; |
| 78 | #elif defined(EMU_M68K) |
| 79 | m68k_set_context(&PicoCpuMM68k); |
| 80 | SekCycleCnt+=m68k_execute(cyc_do); |
| 81 | #elif defined(EMU_F68K) |
| 82 | g_m68kcontext=&PicoCpuFM68k; |
| 83 | SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0); |
| 84 | #endif |
| 85 | } |
| 86 | |
| 87 | static __inline void SekRunS68k(int cyc) |
| 88 | { |
| 89 | int cyc_do; |
| 90 | SekCycleAimS68k+=cyc; |
| 91 | if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return; |
| 92 | #if defined(EMU_CORE_DEBUG) |
| 93 | SekCycleCntS68k+=CM_compareRun(cyc_do, 1); |
| 94 | #elif defined(EMU_C68K) |
| 95 | PicoCpuCS68k.cycles=cyc_do; |
| 96 | CycloneRun(&PicoCpuCS68k); |
| 97 | SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles; |
| 98 | #elif defined(EMU_M68K) |
| 99 | m68k_set_context(&PicoCpuMS68k); |
| 100 | SekCycleCntS68k+=m68k_execute(cyc_do); |
| 101 | #elif defined(EMU_F68K) |
| 102 | g_m68kcontext=&PicoCpuFS68k; |
| 103 | SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0); |
| 104 | #endif |
| 105 | } |
| 106 | |
| 107 | #define PS_STEP_M68K ((488<<16)/20) // ~24 |
| 108 | //#define PS_STEP_S68K 13 |
| 109 | |
| 110 | #if defined(_ASM_CD_PICO_C) |
| 111 | extern void SekRunPS(int cyc_m68k, int cyc_s68k); |
| 112 | #elif defined(EMU_F68K) |
| 113 | static __inline void SekRunPS(int cyc_m68k, int cyc_s68k) |
| 114 | { |
| 115 | SekCycleAim+=cyc_m68k; |
| 116 | SekCycleAimS68k+=cyc_s68k; |
| 117 | fm68k_emulate(0, 1, 0); |
| 118 | } |
| 119 | #else |
| 120 | static __inline void SekRunPS(int cyc_m68k, int cyc_s68k) |
| 121 | { |
| 122 | int cycn, cycn_s68k, cyc_do; |
| 123 | SekCycleAim+=cyc_m68k; |
| 124 | SekCycleAimS68k+=cyc_s68k; |
| 125 | |
| 126 | // fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k, |
| 127 | // SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline); |
| 128 | |
| 129 | /* loop 488 downto 0 in steps of PS_STEP */ |
| 130 | for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K) |
| 131 | { |
| 132 | cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16; |
| 133 | if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) { |
| 134 | #if defined(EMU_C68K) |
| 135 | PicoCpuCM68k.cycles = cyc_do; |
| 136 | CycloneRun(&PicoCpuCM68k); |
| 137 | SekCycleCnt += cyc_do - PicoCpuCM68k.cycles; |
| 138 | #elif defined(EMU_M68K) |
| 139 | m68k_set_context(&PicoCpuMM68k); |
| 140 | SekCycleCnt += m68k_execute(cyc_do); |
| 141 | #elif defined(EMU_F68K) |
| 142 | g_m68kcontext = &PicoCpuFM68k; |
| 143 | SekCycleCnt += fm68k_emulate(cyc_do, 0, 0); |
| 144 | #endif |
| 145 | } |
| 146 | if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) { |
| 147 | #if defined(EMU_C68K) |
| 148 | PicoCpuCS68k.cycles = cyc_do; |
| 149 | CycloneRun(&PicoCpuCS68k); |
| 150 | SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles; |
| 151 | #elif defined(EMU_M68K) |
| 152 | m68k_set_context(&PicoCpuMS68k); |
| 153 | SekCycleCntS68k += m68k_execute(cyc_do); |
| 154 | #elif defined(EMU_F68K) |
| 155 | g_m68kcontext = &PicoCpuFS68k; |
| 156 | SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0); |
| 157 | #endif |
| 158 | } |
| 159 | } |
| 160 | } |
| 161 | #endif |
| 162 | |
| 163 | |
| 164 | static __inline void check_cd_dma(void) |
| 165 | { |
| 166 | int ddx; |
| 167 | |
| 168 | if (!(Pico_mcd->scd.Status_CDC & 0x08)) return; |
| 169 | |
| 170 | ddx = Pico_mcd->s68k_regs[4] & 7; |
| 171 | if (ddx < 2) return; // invalid |
| 172 | if (ddx < 4) { |
| 173 | Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port |
| 174 | return; |
| 175 | } |
| 176 | if (ddx == 6) return; // invalid |
| 177 | |
| 178 | Update_CDC_TRansfer(ddx); // now go and do the actual transfer |
| 179 | } |
| 180 | |
| 181 | static __inline void update_chips(void) |
| 182 | { |
| 183 | int counter_timer, int3_set; |
| 184 | int counter75hz_lim = Pico.m.pal ? 2080 : 2096; |
| 185 | |
| 186 | // 75Hz CDC update |
| 187 | if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) { |
| 188 | Pico_mcd->m.counter75hz -= counter75hz_lim; |
| 189 | Check_CD_Command(); |
| 190 | } |
| 191 | |
| 192 | // update timers |
| 193 | counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708; |
| 194 | Pico_mcd->m.timer_stopwatch += counter_timer; |
| 195 | if ((int3_set = Pico_mcd->s68k_regs[0x31])) { |
| 196 | Pico_mcd->m.timer_int3 -= counter_timer; |
| 197 | if (Pico_mcd->m.timer_int3 < 0) { |
| 198 | if (Pico_mcd->s68k_regs[0x33] & (1<<3)) { |
| 199 | elprintf(EL_INTS, "s68k: timer irq 3"); |
| 200 | SekInterruptS68k(3); |
| 201 | Pico_mcd->m.timer_int3 += int3_set << 16; |
| 202 | } |
| 203 | // is this really what happens if irq3 is masked out? |
| 204 | Pico_mcd->m.timer_int3 &= 0xffffff; |
| 205 | } |
| 206 | } |
| 207 | |
| 208 | // update gfx chip |
| 209 | if (Pico_mcd->rot_comp.Reg_58 & 0x8000) |
| 210 | gfx_cd_update(); |
| 211 | |
| 212 | // delayed setting of DMNA bit (needed for Silpheed) |
| 213 | if (Pico_mcd->m.state_flags & 2) { |
| 214 | Pico_mcd->m.state_flags &= ~2; |
| 215 | if (!(Pico_mcd->s68k_regs[3] & 4)) { |
| 216 | Pico_mcd->s68k_regs[3] |= 2; |
| 217 | Pico_mcd->s68k_regs[3] &= ~1; |
| 218 | #ifdef USE_POLL_DETECT |
| 219 | if ((s68k_poll_adclk&0xfe) == 2) { |
| 220 | SekSetStopS68k(0); s68k_poll_adclk = 0; |
| 221 | } |
| 222 | #endif |
| 223 | } |
| 224 | } |
| 225 | } |
| 226 | |
| 227 | |
| 228 | #define PICO_CD |
| 229 | #include "../pico_cmn.c" |
| 230 | |
| 231 | |
| 232 | PICO_INTERNAL void PicoFrameMCD(void) |
| 233 | { |
| 234 | if (!(PicoOpt&POPT_ALT_RENDERER)) |
| 235 | PicoFrameStart(); |
| 236 | |
| 237 | PicoFrameHints(); |
| 238 | } |
| 239 | |
| 240 | |