fix operator spr change ARM code bugs
[picodrive.git] / pico / cd / sek.c
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1// (c) Copyright 2007 notaz, All rights reserved.
2
3
4#include "../pico_int.h"
5
6
7int SekCycleCntS68k=0; // cycles done in this frame
8int SekCycleAimS68k=0; // cycle aim
9
10
11/* context */
12// Cyclone 68000
13#ifdef EMU_C68K
14struct Cyclone PicoCpuCS68k;
15#endif
16// MUSASHI 68000
17#ifdef EMU_M68K
18m68ki_cpu_core PicoCpuMS68k;
19#endif
20// FAME 68000
21#ifdef EMU_F68K
22M68K_CONTEXT PicoCpuFS68k;
23#endif
24
25
26static int new_irq_level(int level)
27{
28 int level_new = 0, irqs;
29 Pico_mcd->m.s68k_pend_ints &= ~(1 << level);
30 irqs = Pico_mcd->m.s68k_pend_ints;
31 irqs &= Pico_mcd->s68k_regs[0x33];
32 while ((irqs >>= 1)) level_new++;
33
34 return level_new;
35}
36
37#ifdef EMU_C68K
38// interrupt acknowledgement
39static int SekIntAckS68k(int level)
40{
41 int level_new = new_irq_level(level);
42
43 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
44 PicoCpuCS68k.irq = level_new;
45 return CYCLONE_INT_ACK_AUTOVECTOR;
46}
47
48static void SekResetAckS68k(void)
49{
50 elprintf(EL_ANOMALY, "s68k: Reset encountered @ %06x", SekPcS68k);
51}
52
53static int SekUnrecognizedOpcodeS68k(void)
54{
55 unsigned int pc, op;
56 pc = SekPcS68k;
57 op = PicoCpuCS68k.read16(pc);
58 elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);
59 //exit(1);
60 return 0;
61}
62#endif
63
64#ifdef EMU_M68K
65static int SekIntAckMS68k(int level)
66{
67#ifndef EMU_CORE_DEBUG
68 int level_new = new_irq_level(level);
69 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
70 CPU_INT_LEVEL = level_new << 8;
71#else
72 CPU_INT_LEVEL = 0;
73#endif
74 return M68K_INT_ACK_AUTOVECTOR;
75}
76#endif
77
78#ifdef EMU_F68K
79static void SekIntAckFS68k(unsigned level)
80{
81 int level_new = new_irq_level(level);
82 elprintf(EL_INTS, "s68kACK %i -> %i", level, level_new);
83#ifndef EMU_CORE_DEBUG
84 PicoCpuFS68k.interrupts[0] = level_new;
85#else
86 {
87 extern int dbg_irq_level_sub;
88 dbg_irq_level_sub = level_new;
89 PicoCpuFS68k.interrupts[0] = 0;
90 }
91#endif
92}
93#endif
94
95
96PICO_INTERNAL void SekInitS68k(void)
97{
98#ifdef EMU_C68K
99// CycloneInit();
100 memset(&PicoCpuCS68k,0,sizeof(PicoCpuCS68k));
101 PicoCpuCS68k.IrqCallback=SekIntAckS68k;
102 PicoCpuCS68k.ResetCallback=SekResetAckS68k;
103 PicoCpuCS68k.UnrecognizedCallback=SekUnrecognizedOpcodeS68k;
104#endif
105#ifdef EMU_M68K
106 {
107 // Musashi is not very context friendly..
108 void *oldcontext = m68ki_cpu_p;
109 m68k_set_context(&PicoCpuMS68k);
110 m68k_set_cpu_type(M68K_CPU_TYPE_68000);
111 m68k_init();
112 m68k_set_int_ack_callback(SekIntAckMS68k);
113// m68k_pulse_reset(); // not yet, memmap is not set up
114 m68k_set_context(oldcontext);
115 }
116#endif
117#ifdef EMU_F68K
118 {
119 void *oldcontext = g_m68kcontext;
120 g_m68kcontext = &PicoCpuFS68k;
121 memset(&PicoCpuFS68k, 0, sizeof(PicoCpuFS68k));
122 fm68k_init();
123 PicoCpuFS68k.iack_handler = SekIntAckFS68k;
124 PicoCpuFS68k.sr = 0x2704; // Z flag
125 g_m68kcontext = oldcontext;
126 }
127#endif
128}
129
130// Reset the 68000:
131PICO_INTERNAL int SekResetS68k(void)
132{
133 if (Pico.rom==NULL) return 1;
134
135#ifdef EMU_C68K
136 PicoCpuCS68k.state_flags=0;
137 PicoCpuCS68k.osp=0;
138 PicoCpuCS68k.srh =0x27; // Supervisor mode
139 PicoCpuCS68k.flags=4; // Z set
140 PicoCpuCS68k.irq=0;
141 PicoCpuCS68k.a[7]=PicoCpuCS68k.read32(0); // Stack Pointer
142 PicoCpuCS68k.membase=0;
143 PicoCpuCS68k.pc=PicoCpuCS68k.checkpc(PicoCpuCS68k.read32(4)); // Program Counter
144#endif
145#ifdef EMU_M68K
146 {
147 void *oldcontext = m68ki_cpu_p;
148
149 m68k_set_context(&PicoCpuMS68k);
150 m68ki_cpu.sp[0]=0;
151 m68k_set_irq(0);
152 m68k_pulse_reset();
153 m68k_set_context(oldcontext);
154 }
155#endif
156#ifdef EMU_F68K
157 {
158 void *oldcontext = g_m68kcontext;
159 g_m68kcontext = &PicoCpuFS68k;
160 fm68k_reset();
161 g_m68kcontext = oldcontext;
162 }
163#endif
164
165 return 0;
166}
167
168PICO_INTERNAL int SekInterruptS68k(int irq)
169{
170 int irqs, real_irq = 1;
171 Pico_mcd->m.s68k_pend_ints |= 1 << irq;
172 irqs = Pico_mcd->m.s68k_pend_ints >> 1;
173 while ((irqs >>= 1)) real_irq++;
174
175#ifdef EMU_CORE_DEBUG
176 {
177 extern int dbg_irq_level_sub;
178 dbg_irq_level_sub=real_irq;
179 return 0;
180 }
181#endif
182#ifdef EMU_C68K
183 PicoCpuCS68k.irq=real_irq;
184#endif
185#ifdef EMU_M68K
186 void *oldcontext = m68ki_cpu_p;
187 m68k_set_context(&PicoCpuMS68k);
188 m68k_set_irq(real_irq);
189 m68k_set_context(oldcontext);
190#endif
191#ifdef EMU_F68K
192 PicoCpuFS68k.interrupts[0]=real_irq;
193#endif
194 return 0;
195}
196