| 1 | // This is part of Pico Library\r |
| 2 | \r |
| 3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
| 4 | // (c) Copyright 2006-2009 notaz, All rights reserved.\r |
| 5 | // Free for non-commercial use.\r |
| 6 | \r |
| 7 | // For commercial use, separate licencing terms must be obtained.\r |
| 8 | \r |
| 9 | \r |
| 10 | #include "pico_int.h"\r |
| 11 | #include "memory.h"\r |
| 12 | \r |
| 13 | #include "sound/ym2612.h"\r |
| 14 | #include "sound/sn76496.h"\r |
| 15 | \r |
| 16 | extern unsigned int lastSSRamWrite; // used by serial eeprom code\r |
| 17 | \r |
| 18 | unsigned long m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
| 19 | unsigned long m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r |
| 20 | unsigned long m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
| 21 | unsigned long m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r |
| 22 | \r |
| 23 | static void xmap_set(unsigned long *map, int shift, int start_addr, int end_addr,\r |
| 24 | void *func_or_mh, int is_func)\r |
| 25 | {\r |
| 26 | unsigned long addr = (unsigned long)func_or_mh;\r |
| 27 | int mask = (1 << shift) - 1;\r |
| 28 | int i;\r |
| 29 | \r |
| 30 | if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {\r |
| 31 | elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",\r |
| 32 | start_addr, end_addr);\r |
| 33 | return;\r |
| 34 | }\r |
| 35 | \r |
| 36 | if (addr & 1) {\r |
| 37 | elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);\r |
| 38 | return;\r |
| 39 | }\r |
| 40 | \r |
| 41 | if (!is_func)\r |
| 42 | addr -= start_addr;\r |
| 43 | \r |
| 44 | for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r |
| 45 | map[i] = addr >> 1;\r |
| 46 | if (is_func)\r |
| 47 | map[i] |= 1 << (sizeof(addr) * 8 - 1);\r |
| 48 | }\r |
| 49 | }\r |
| 50 | \r |
| 51 | void z80_map_set(unsigned long *map, int start_addr, int end_addr,\r |
| 52 | void *func_or_mh, int is_func)\r |
| 53 | {\r |
| 54 | xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r |
| 55 | }\r |
| 56 | \r |
| 57 | void cpu68k_map_set(unsigned long *map, int start_addr, int end_addr,\r |
| 58 | void *func_or_mh, int is_func)\r |
| 59 | {\r |
| 60 | xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r |
| 61 | }\r |
| 62 | \r |
| 63 | // more specialized/optimized function (does same as above)\r |
| 64 | void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)\r |
| 65 | {\r |
| 66 | unsigned long *r8map, *r16map, *w8map, *w16map;\r |
| 67 | unsigned long addr = (unsigned long)ptr;\r |
| 68 | int shift = M68K_MEM_SHIFT;\r |
| 69 | int i;\r |
| 70 | \r |
| 71 | if (!is_sub) {\r |
| 72 | r8map = m68k_read8_map;\r |
| 73 | r16map = m68k_read16_map;\r |
| 74 | w8map = m68k_write8_map;\r |
| 75 | w16map = m68k_write16_map;\r |
| 76 | } else {\r |
| 77 | r8map = s68k_read8_map;\r |
| 78 | r16map = s68k_read16_map;\r |
| 79 | w8map = s68k_write8_map;\r |
| 80 | w16map = s68k_write16_map;\r |
| 81 | }\r |
| 82 | \r |
| 83 | addr -= start_addr;\r |
| 84 | addr >>= 1;\r |
| 85 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
| 86 | r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;\r |
| 87 | }\r |
| 88 | \r |
| 89 | static u32 m68k_unmapped_read8(u32 a)\r |
| 90 | {\r |
| 91 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
| 92 | return 0; // assume pulldown, as if MegaCD2 was attached\r |
| 93 | }\r |
| 94 | \r |
| 95 | static u32 m68k_unmapped_read16(u32 a)\r |
| 96 | {\r |
| 97 | elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);\r |
| 98 | return 0;\r |
| 99 | }\r |
| 100 | \r |
| 101 | static void m68k_unmapped_write8(u32 a, u32 d)\r |
| 102 | {\r |
| 103 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
| 104 | }\r |
| 105 | \r |
| 106 | static void m68k_unmapped_write16(u32 a, u32 d)\r |
| 107 | {\r |
| 108 | elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
| 109 | }\r |
| 110 | \r |
| 111 | void m68k_map_unmap(int start_addr, int end_addr)\r |
| 112 | {\r |
| 113 | unsigned long addr;\r |
| 114 | int shift = M68K_MEM_SHIFT;\r |
| 115 | int i;\r |
| 116 | \r |
| 117 | addr = (unsigned long)m68k_unmapped_read8;\r |
| 118 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
| 119 | m68k_read8_map[i] = (addr >> 1) | (1 << 31);\r |
| 120 | \r |
| 121 | addr = (unsigned long)m68k_unmapped_read16;\r |
| 122 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
| 123 | m68k_read16_map[i] = (addr >> 1) | (1 << 31);\r |
| 124 | \r |
| 125 | addr = (unsigned long)m68k_unmapped_write8;\r |
| 126 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
| 127 | m68k_write8_map[i] = (addr >> 1) | (1 << 31);\r |
| 128 | \r |
| 129 | addr = (unsigned long)m68k_unmapped_write16;\r |
| 130 | for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r |
| 131 | m68k_write16_map[i] = (addr >> 1) | (1 << 31);\r |
| 132 | }\r |
| 133 | \r |
| 134 | MAKE_68K_READ8(m68k_read8, m68k_read8_map)\r |
| 135 | MAKE_68K_READ16(m68k_read16, m68k_read16_map)\r |
| 136 | MAKE_68K_READ32(m68k_read32, m68k_read16_map)\r |
| 137 | MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)\r |
| 138 | MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)\r |
| 139 | MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)\r |
| 140 | \r |
| 141 | // -----------------------------------------------------------------\r |
| 142 | \r |
| 143 | static u32 ym2612_read_local_68k(void);\r |
| 144 | static int ym2612_write_local(u32 a, u32 d, int is_from_z80);\r |
| 145 | static void z80_mem_setup(void);\r |
| 146 | \r |
| 147 | \r |
| 148 | #ifdef EMU_CORE_DEBUG\r |
| 149 | u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r |
| 150 | int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r |
| 151 | extern unsigned int ppop;\r |
| 152 | #endif\r |
| 153 | \r |
| 154 | #ifdef IO_STATS\r |
| 155 | void log_io(unsigned int addr, int bits, int rw);\r |
| 156 | #elif defined(_MSC_VER)\r |
| 157 | #define log_io\r |
| 158 | #else\r |
| 159 | #define log_io(...)\r |
| 160 | #endif\r |
| 161 | \r |
| 162 | #if defined(EMU_C68K)\r |
| 163 | static __inline int PicoMemBase(u32 pc)\r |
| 164 | {\r |
| 165 | int membase=0;\r |
| 166 | \r |
| 167 | if (pc<Pico.romsize+4)\r |
| 168 | {\r |
| 169 | membase=(int)Pico.rom; // Program Counter in Rom\r |
| 170 | }\r |
| 171 | else if ((pc&0xe00000)==0xe00000)\r |
| 172 | {\r |
| 173 | membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r |
| 174 | }\r |
| 175 | else\r |
| 176 | {\r |
| 177 | // Error - Program Counter is invalid\r |
| 178 | membase=(int)Pico.rom;\r |
| 179 | }\r |
| 180 | \r |
| 181 | return membase;\r |
| 182 | }\r |
| 183 | #endif\r |
| 184 | \r |
| 185 | \r |
| 186 | PICO_INTERNAL u32 PicoCheckPc(u32 pc)\r |
| 187 | {\r |
| 188 | u32 ret=0;\r |
| 189 | #if defined(EMU_C68K)\r |
| 190 | pc-=PicoCpuCM68k.membase; // Get real pc\r |
| 191 | // pc&=0xfffffe;\r |
| 192 | pc&=~1;\r |
| 193 | if ((pc<<8) == 0)\r |
| 194 | {\r |
| 195 | elprintf(EL_STATUS|EL_ANOMALY, "%i:%03i: game crash detected @ %06x\n",\r |
| 196 | Pico.m.frame_count, Pico.m.scanline, SekPc);\r |
| 197 | return (int)Pico.rom + Pico.romsize; // common crash condition, may happen with bad ROMs\r |
| 198 | }\r |
| 199 | \r |
| 200 | PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);\r |
| 201 | PicoCpuCM68k.membase-=pc&0xff000000;\r |
| 202 | \r |
| 203 | ret = PicoCpuCM68k.membase+pc;\r |
| 204 | #endif\r |
| 205 | return ret;\r |
| 206 | }\r |
| 207 | \r |
| 208 | \r |
| 209 | PICO_INTERNAL void PicoInitPc(u32 pc)\r |
| 210 | {\r |
| 211 | PicoCheckPc(pc);\r |
| 212 | }\r |
| 213 | \r |
| 214 | // -----------------------------------------------------------------\r |
| 215 | // memmap helpers\r |
| 216 | \r |
| 217 | static int PadRead(int i)\r |
| 218 | {\r |
| 219 | int pad,value,data_reg;\r |
| 220 | pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r |
| 221 | data_reg=Pico.ioports[i+1];\r |
| 222 | \r |
| 223 | // orr the bits, which are set as output\r |
| 224 | value = data_reg&(Pico.ioports[i+4]|0x80);\r |
| 225 | \r |
| 226 | if (PicoOpt & POPT_6BTN_PAD)\r |
| 227 | {\r |
| 228 | int phase = Pico.m.padTHPhase[i];\r |
| 229 | \r |
| 230 | if(phase == 2 && !(data_reg&0x40)) { // TH\r |
| 231 | value|=(pad&0xc0)>>2; // ?0SA 0000\r |
| 232 | return value;\r |
| 233 | } else if(phase == 3) {\r |
| 234 | if(data_reg&0x40)\r |
| 235 | value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r |
| 236 | else\r |
| 237 | value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r |
| 238 | return value;\r |
| 239 | }\r |
| 240 | }\r |
| 241 | \r |
| 242 | if(data_reg&0x40) // TH\r |
| 243 | value|=(pad&0x3f); // ?1CB RLDU\r |
| 244 | else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r |
| 245 | \r |
| 246 | return value; // will mirror later\r |
| 247 | }\r |
| 248 | \r |
| 249 | static u32 io_ports_read(u32 a)\r |
| 250 | {\r |
| 251 | u32 d;\r |
| 252 | a = (a>>1) & 0xf;\r |
| 253 | switch (a) {\r |
| 254 | case 0: d = Pico.m.hardware; break; // Hardware value (Version register)\r |
| 255 | case 1: d = PadRead(0); break;\r |
| 256 | case 2: d = PadRead(1); break;\r |
| 257 | default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r |
| 258 | }\r |
| 259 | return d;\r |
| 260 | }\r |
| 261 | \r |
| 262 | static void io_ports_write(u32 a, u32 d)\r |
| 263 | {\r |
| 264 | a = (a>>1) & 0xf;\r |
| 265 | \r |
| 266 | // 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r |
| 267 | if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD))\r |
| 268 | {\r |
| 269 | Pico.m.padDelay[a - 1] = 0;\r |
| 270 | if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r |
| 271 | Pico.m.padTHPhase[a - 1]++;\r |
| 272 | }\r |
| 273 | \r |
| 274 | // cartain IO ports can be used as RAM\r |
| 275 | Pico.ioports[a] = d;\r |
| 276 | }\r |
| 277 | \r |
| 278 | static void ctl_write_z80busreq(u32 d)\r |
| 279 | {\r |
| 280 | d&=1; d^=1;\r |
| 281 | elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);\r |
| 282 | if (d ^ Pico.m.z80Run)\r |
| 283 | {\r |
| 284 | if (d)\r |
| 285 | {\r |
| 286 | z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r |
| 287 | }\r |
| 288 | else\r |
| 289 | {\r |
| 290 | z80stopCycle = SekCyclesDone();\r |
| 291 | if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)\r |
| 292 | PicoSyncZ80(z80stopCycle);\r |
| 293 | }\r |
| 294 | Pico.m.z80Run = d;\r |
| 295 | }\r |
| 296 | }\r |
| 297 | \r |
| 298 | static void ctl_write_z80reset(u32 d)\r |
| 299 | {\r |
| 300 | d&=1; d^=1;\r |
| 301 | elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);\r |
| 302 | if (d ^ Pico.m.z80_reset)\r |
| 303 | {\r |
| 304 | if (d)\r |
| 305 | {\r |
| 306 | if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)\r |
| 307 | PicoSyncZ80(SekCyclesDone());\r |
| 308 | YM2612ResetChip();\r |
| 309 | timers_reset();\r |
| 310 | }\r |
| 311 | else\r |
| 312 | {\r |
| 313 | z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r |
| 314 | z80_reset();\r |
| 315 | }\r |
| 316 | Pico.m.z80_reset = d;\r |
| 317 | }\r |
| 318 | }\r |
| 319 | \r |
| 320 | \r |
| 321 | // for nonstandard reads\r |
| 322 | // TODO: mv to carthw\r |
| 323 | static u32 OtherRead16End(u32 a, int realsize)\r |
| 324 | {\r |
| 325 | u32 d=0;\r |
| 326 | \r |
| 327 | // 32x test\r |
| 328 | /*\r |
| 329 | if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA\r |
| 330 | else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS\r |
| 331 | else if (a == 0xa15100) { d = 0x0080; goto end; }\r |
| 332 | else\r |
| 333 | */\r |
| 334 | \r |
| 335 | // for games with simple protection devices, discovered by Haze\r |
| 336 | // some dumb detection is used, but that should be enough to make things work\r |
| 337 | if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r |
| 338 | if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r |
| 339 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
| 340 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
| 341 | }\r |
| 342 | else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r |
| 343 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
| 344 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
| 345 | else if (a == 0x400004) { d=0xaa<<8; goto end; }\r |
| 346 | else if (a == 0x400006) { d=0xf0<<8; goto end; }\r |
| 347 | }\r |
| 348 | else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r |
| 349 | if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r |
| 350 | else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r |
| 351 | // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r |
| 352 | }\r |
| 353 | else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r |
| 354 | if (a == 0x400000) { d=0x90<<8; goto end; }\r |
| 355 | else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r |
| 356 | // checks the result, which is of the above one. Left it just in case.\r |
| 357 | }\r |
| 358 | else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r |
| 359 | if (a == 0x400000) { d=0x55<<8; goto end; }\r |
| 360 | else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r |
| 361 | else if (a == 0x400002) { d=0x0f<<8; goto end; }\r |
| 362 | else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r |
| 363 | }\r |
| 364 | // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r |
| 365 | // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r |
| 366 | // @ 400004 which is expected @ 400006, so we really remember 2 values here\r |
| 367 | d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r |
| 368 | }\r |
| 369 | else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r |
| 370 | if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r |
| 371 | d=0x0c; goto end;\r |
| 372 | }\r |
| 373 | else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r |
| 374 | d=0x28; goto end; // does the check from RAM\r |
| 375 | }\r |
| 376 | else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r |
| 377 | d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r |
| 378 | }\r |
| 379 | else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r |
| 380 | d=0x0a; goto end;\r |
| 381 | }\r |
| 382 | }\r |
| 383 | else if (a == 0xa13002) { // Pocket Monsters (Unl)\r |
| 384 | d=0x01; goto end;\r |
| 385 | }\r |
| 386 | else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r |
| 387 | d=0x1f; goto end;\r |
| 388 | }\r |
| 389 | else if (a == 0x30fe02) {\r |
| 390 | // Virtua Racing - just for fun\r |
| 391 | // this seems to be some flag that SVP is ready or something similar\r |
| 392 | d=1; goto end;\r |
| 393 | }\r |
| 394 | \r |
| 395 | end:\r |
| 396 | elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);\r |
| 397 | return d;\r |
| 398 | }\r |
| 399 | \r |
| 400 | static void OtherWrite8End(u32 a,u32 d,int realsize)\r |
| 401 | {\r |
| 402 | #ifdef _ASM_MEMORY_C\r |
| 403 | // special ROM hardware (currently only banking and sram reg supported)\r |
| 404 | if((a&0xfffff1) == 0xA130F1) {\r |
| 405 | PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r |
| 406 | return;\r |
| 407 | }\r |
| 408 | #else\r |
| 409 | // sram access register\r |
| 410 | if(a == 0xA130F1) {\r |
| 411 | elprintf(EL_SRAMIO, "sram reg=%02x", d);\r |
| 412 | Pico.m.sram_status &= ~(SRS_MAPPED|SRS_READONLY);\r |
| 413 | Pico.m.sram_status |= (u8)(d&3);\r |
| 414 | return;\r |
| 415 | }\r |
| 416 | #endif\r |
| 417 | elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r |
| 418 | \r |
| 419 | // for games with simple protection devices, discovered by Haze\r |
| 420 | if ((a>>22) == 1)\r |
| 421 | Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r |
| 422 | }\r |
| 423 | \r |
| 424 | // -----------------------------------------------------------------\r |
| 425 | \r |
| 426 | // cart (save) RAM area (usually 0x200000 - ...)\r |
| 427 | static u32 PicoRead8_sram(u32 a)\r |
| 428 | {\r |
| 429 | int srs = Pico.m.sram_status;\r |
| 430 | u32 d;\r |
| 431 | if (SRam.end >= a && a >= SRam.start && (srs & (SRS_MAPPED|SRS_EEPROM)))\r |
| 432 | {\r |
| 433 | if (srs & SRS_EEPROM)\r |
| 434 | d = EEPROM_read();\r |
| 435 | else\r |
| 436 | d = *(u8 *)(SRam.data - SRam.start + a);\r |
| 437 | elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r |
| 438 | return d;\r |
| 439 | }\r |
| 440 | \r |
| 441 | if (a < Pico.romsize)\r |
| 442 | return Pico.rom[a ^ 1];\r |
| 443 | \r |
| 444 | return m68k_unmapped_read8(a);\r |
| 445 | }\r |
| 446 | \r |
| 447 | static u32 PicoRead16_sram(u32 a)\r |
| 448 | {\r |
| 449 | int srs = Pico.m.sram_status;\r |
| 450 | u32 d;\r |
| 451 | if (SRam.end >= a && a >= SRam.start && (srs & (SRS_MAPPED|SRS_EEPROM)))\r |
| 452 | {\r |
| 453 | if (srs & SRS_EEPROM) {\r |
| 454 | d = EEPROM_read();\r |
| 455 | d |= d << 8;\r |
| 456 | } else {\r |
| 457 | u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r |
| 458 | d = pm[0] << 8;\r |
| 459 | d |= pm[1];\r |
| 460 | }\r |
| 461 | elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r |
| 462 | return d;\r |
| 463 | }\r |
| 464 | \r |
| 465 | if (a < Pico.romsize)\r |
| 466 | return *(u16 *)(Pico.rom + a);\r |
| 467 | \r |
| 468 | return m68k_unmapped_read16(a);\r |
| 469 | }\r |
| 470 | \r |
| 471 | static void PicoWrite8_sram(u32 a, u32 d)\r |
| 472 | {\r |
| 473 | unsigned int srs = Pico.m.sram_status;\r |
| 474 | elprintf(EL_SRAMIO, "sram wX [%06x] %02x @ %06x", a, d & 0xffff, SekPc);\r |
| 475 | if (srs & SRS_EEPROM) // EEPROM write\r |
| 476 | {\r |
| 477 | // this diff must be at most 16 for NBA Jam to work\r |
| 478 | if (SekCyclesDoneT() - lastSSRamWrite < 16) {\r |
| 479 | // just update pending state\r |
| 480 | elprintf(EL_EEPROM, "eeprom: skip because cycles=%i",\r |
| 481 | SekCyclesDoneT() - lastSSRamWrite);\r |
| 482 | EEPROM_upd_pending(a, d);\r |
| 483 | } else {\r |
| 484 | EEPROM_write(srs >> 6); // execute pending\r |
| 485 | EEPROM_upd_pending(a, d);\r |
| 486 | if ((srs ^ Pico.m.sram_status) & 0xc0) // update time only if SDA/SCL changed\r |
| 487 | lastSSRamWrite = SekCyclesDoneT();\r |
| 488 | }\r |
| 489 | }\r |
| 490 | else if (!(srs & SRS_READONLY)) {\r |
| 491 | u8 *pm=(u8 *)(SRam.data - SRam.start + a);\r |
| 492 | if (*pm != (u8)d) {\r |
| 493 | SRam.changed = 1;\r |
| 494 | *pm = (u8)d;\r |
| 495 | }\r |
| 496 | }\r |
| 497 | }\r |
| 498 | \r |
| 499 | static void PicoWrite16_sram(u32 a, u32 d)\r |
| 500 | {\r |
| 501 | // XXX: hardware could easily use MSB too..\r |
| 502 | PicoWrite8_sram(a + 1, d);\r |
| 503 | }\r |
| 504 | \r |
| 505 | // z80 area (0xa00000 - 0xa0ffff)\r |
| 506 | // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)\r |
| 507 | static u32 PicoRead8_z80(u32 a)\r |
| 508 | {\r |
| 509 | u32 d = 0xff;\r |
| 510 | if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r |
| 511 | elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);\r |
| 512 | // open bus. Pulled down if MegaCD2 is attached.\r |
| 513 | return 0;\r |
| 514 | }\r |
| 515 | \r |
| 516 | if ((a & 0x4000) == 0x0000)\r |
| 517 | d = Pico.zram[a & 0x1fff];\r |
| 518 | else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff\r |
| 519 | d = ym2612_read_local_68k(); \r |
| 520 | else\r |
| 521 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
| 522 | return d;\r |
| 523 | }\r |
| 524 | \r |
| 525 | static u32 PicoRead16_z80(u32 a)\r |
| 526 | {\r |
| 527 | u32 d = PicoRead8_z80(a);\r |
| 528 | return d | (d << 8);\r |
| 529 | }\r |
| 530 | \r |
| 531 | static void PicoWrite8_z80(u32 a, u32 d)\r |
| 532 | {\r |
| 533 | if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r |
| 534 | // verified on real hw\r |
| 535 | elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);\r |
| 536 | return;\r |
| 537 | }\r |
| 538 | \r |
| 539 | if ((a & 0x4000) == 0x0000) { // z80 RAM\r |
| 540 | SekCyclesBurn(2); // hack\r |
| 541 | Pico.zram[a & 0x1fff] = (u8)d;\r |
| 542 | return;\r |
| 543 | }\r |
| 544 | if ((a & 0x6000) == 0x4000) { // FM Sound\r |
| 545 | if (PicoOpt & POPT_EN_FM)\r |
| 546 | emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;\r |
| 547 | return;\r |
| 548 | }\r |
| 549 | // TODO: probably other VDP access too? Maybe more mirrors?\r |
| 550 | if ((a & 0x7ff9) == 0x7f11) { // PSG Sound\r |
| 551 | if (PicoOpt & POPT_EN_PSG)\r |
| 552 | SN76496Write(d);\r |
| 553 | return;\r |
| 554 | }\r |
| 555 | #if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)\r |
| 556 | if ((a & 0x7f00) == 0x6000) // Z80 BANK register\r |
| 557 | {\r |
| 558 | Pico.m.z80_bank68k >>= 1;\r |
| 559 | Pico.m.z80_bank68k |= d << 8;\r |
| 560 | Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r |
| 561 | elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);\r |
| 562 | return;\r |
| 563 | }\r |
| 564 | #endif\r |
| 565 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);\r |
| 566 | }\r |
| 567 | \r |
| 568 | static void PicoWrite16_z80(u32 a, u32 d)\r |
| 569 | {\r |
| 570 | // for RAM, only most significant byte is sent\r |
| 571 | // TODO: verify remaining accesses\r |
| 572 | PicoWrite8_z80(a, d >> 8);\r |
| 573 | }\r |
| 574 | \r |
| 575 | // IO/control area (0xa10000 - 0xa1ffff)\r |
| 576 | u32 PicoRead8_io(u32 a)\r |
| 577 | {\r |
| 578 | u32 d;\r |
| 579 | \r |
| 580 | if ((a & 0xffe0) == 0x0000) { // I/O ports\r |
| 581 | d = io_ports_read(a);\r |
| 582 | goto end;\r |
| 583 | }\r |
| 584 | \r |
| 585 | // faking open bus (MegaCD pulldowns don't work here curiously)\r |
| 586 | d = Pico.m.rotate++;\r |
| 587 | d ^= d << 6;\r |
| 588 | \r |
| 589 | // bit8 seems to be readable in this range\r |
| 590 | if ((a & 0xfc01) == 0x1000)\r |
| 591 | d &= ~0x01;\r |
| 592 | \r |
| 593 | if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)\r |
| 594 | d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r |
| 595 | elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);\r |
| 596 | goto end;\r |
| 597 | }\r |
| 598 | \r |
| 599 | d = m68k_unmapped_read8(a);\r |
| 600 | end:\r |
| 601 | return d;\r |
| 602 | }\r |
| 603 | \r |
| 604 | u32 PicoRead16_io(u32 a)\r |
| 605 | {\r |
| 606 | u32 d;\r |
| 607 | \r |
| 608 | if ((a & 0xffe0) == 0x0000) { // I/O ports\r |
| 609 | d = io_ports_read(a);\r |
| 610 | goto end;\r |
| 611 | }\r |
| 612 | \r |
| 613 | // faking open bus\r |
| 614 | d = (Pico.m.rotate += 0x41);\r |
| 615 | d ^= (d << 5) ^ (d << 8);\r |
| 616 | \r |
| 617 | // bit8 seems to be readable in this range\r |
| 618 | if ((a & 0xfc00) == 0x1000)\r |
| 619 | d &= ~0x0100;\r |
| 620 | \r |
| 621 | if ((a & 0xff00) == 0x1100) { // z80 busreq\r |
| 622 | d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r |
| 623 | elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);\r |
| 624 | goto end;\r |
| 625 | }\r |
| 626 | \r |
| 627 | d = m68k_unmapped_read16(a);\r |
| 628 | end:\r |
| 629 | return d;\r |
| 630 | }\r |
| 631 | \r |
| 632 | void PicoWrite8_io(u32 a, u32 d)\r |
| 633 | {\r |
| 634 | if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)\r |
| 635 | io_ports_write(a, d);\r |
| 636 | return;\r |
| 637 | }\r |
| 638 | if ((a & 0xff01) == 0x1100) { // z80 busreq\r |
| 639 | ctl_write_z80busreq(d);\r |
| 640 | return;\r |
| 641 | }\r |
| 642 | if ((a & 0xff01) == 0x1200) { // z80 reset\r |
| 643 | ctl_write_z80reset(d);\r |
| 644 | return;\r |
| 645 | }\r |
| 646 | if (a == 0xa130f1) { // sram access register\r |
| 647 | elprintf(EL_SRAMIO, "sram reg=%02x", d);\r |
| 648 | Pico.m.sram_status &= ~(SRS_MAPPED|SRS_READONLY);\r |
| 649 | Pico.m.sram_status |= (u8)(d & 3);\r |
| 650 | return;\r |
| 651 | }\r |
| 652 | m68k_unmapped_write8(a, d);\r |
| 653 | }\r |
| 654 | \r |
| 655 | void PicoWrite16_io(u32 a, u32 d)\r |
| 656 | {\r |
| 657 | if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)\r |
| 658 | io_ports_write(a, d);\r |
| 659 | return;\r |
| 660 | }\r |
| 661 | if ((a & 0xff00) == 0x1100) { // z80 busreq\r |
| 662 | ctl_write_z80busreq(d >> 8);\r |
| 663 | return;\r |
| 664 | }\r |
| 665 | if ((a & 0xff00) == 0x1200) { // z80 reset\r |
| 666 | ctl_write_z80reset(d >> 8);\r |
| 667 | return;\r |
| 668 | }\r |
| 669 | if (a == 0xa130f0) { // sram access register\r |
| 670 | elprintf(EL_SRAMIO, "sram reg=%02x", d);\r |
| 671 | Pico.m.sram_status &= ~(SRS_MAPPED|SRS_READONLY);\r |
| 672 | Pico.m.sram_status |= (u8)(d & 3);\r |
| 673 | return;\r |
| 674 | }\r |
| 675 | m68k_unmapped_write16(a, d);\r |
| 676 | }\r |
| 677 | \r |
| 678 | // VDP area (0xc00000 - 0xdfffff)\r |
| 679 | // TODO: verify if lower byte goes to PSG on word writes\r |
| 680 | static u32 PicoRead8_vdp(u32 a)\r |
| 681 | {\r |
| 682 | if ((a & 0x00e0) == 0x0000)\r |
| 683 | return PicoVideoRead8(a);\r |
| 684 | \r |
| 685 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
| 686 | return 0;\r |
| 687 | }\r |
| 688 | \r |
| 689 | static u32 PicoRead16_vdp(u32 a)\r |
| 690 | {\r |
| 691 | if ((a & 0x00e0) == 0x0000)\r |
| 692 | return PicoVideoRead(a);\r |
| 693 | \r |
| 694 | elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);\r |
| 695 | return 0;\r |
| 696 | }\r |
| 697 | \r |
| 698 | static void PicoWrite8_vdp(u32 a, u32 d)\r |
| 699 | {\r |
| 700 | if ((a & 0x00f9) == 0x0011) { // PSG Sound\r |
| 701 | if (PicoOpt & POPT_EN_PSG)\r |
| 702 | SN76496Write(d);\r |
| 703 | return;\r |
| 704 | }\r |
| 705 | if ((a & 0x00e0) == 0x0000) {\r |
| 706 | d &= 0xff;\r |
| 707 | PicoVideoWrite(a, d | (d << 8));\r |
| 708 | return;\r |
| 709 | }\r |
| 710 | \r |
| 711 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
| 712 | }\r |
| 713 | \r |
| 714 | static void PicoWrite16_vdp(u32 a, u32 d)\r |
| 715 | {\r |
| 716 | if ((a & 0x00f9) == 0x0010) { // PSG Sound\r |
| 717 | if (PicoOpt & POPT_EN_PSG)\r |
| 718 | SN76496Write(d);\r |
| 719 | return;\r |
| 720 | }\r |
| 721 | if ((a & 0x00e0) == 0x0000) {\r |
| 722 | PicoVideoWrite(a, d);\r |
| 723 | return;\r |
| 724 | }\r |
| 725 | \r |
| 726 | elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
| 727 | }\r |
| 728 | \r |
| 729 | // -----------------------------------------------------------------\r |
| 730 | \r |
| 731 | // TODO: rm\r |
| 732 | static void OtherWrite16End(u32 a,u32 d,int realsize)\r |
| 733 | {\r |
| 734 | PicoWrite8Hook(a, d>>8, realsize);\r |
| 735 | PicoWrite8Hook(a+1,d&0xff, realsize);\r |
| 736 | }\r |
| 737 | \r |
| 738 | u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End;\r |
| 739 | void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End;\r |
| 740 | void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End;\r |
| 741 | \r |
| 742 | PICO_INTERNAL void PicoMemResetHooks(void)\r |
| 743 | {\r |
| 744 | // default unmapped/cart specific handlers\r |
| 745 | PicoRead16Hook = OtherRead16End;\r |
| 746 | PicoWrite8Hook = OtherWrite8End;\r |
| 747 | PicoWrite16Hook = OtherWrite16End;\r |
| 748 | }\r |
| 749 | \r |
| 750 | #ifdef EMU_M68K\r |
| 751 | static void m68k_mem_setup(void);\r |
| 752 | #endif\r |
| 753 | \r |
| 754 | PICO_INTERNAL void PicoMemSetup(void)\r |
| 755 | {\r |
| 756 | int mask, rs, a;\r |
| 757 | \r |
| 758 | // setup the memory map\r |
| 759 | cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);\r |
| 760 | cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);\r |
| 761 | cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);\r |
| 762 | cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);\r |
| 763 | \r |
| 764 | // ROM\r |
| 765 | // align to bank size. We know ROM loader allocated enough for this\r |
| 766 | mask = (1 << M68K_MEM_SHIFT) - 1;\r |
| 767 | rs = (Pico.romsize + mask) & ~mask;\r |
| 768 | cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);\r |
| 769 | cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);\r |
| 770 | \r |
| 771 | // Common case of on-cart (save) RAM, usually at 0x200000-...\r |
| 772 | rs = SRam.end - SRam.start;\r |
| 773 | if (rs > 0 && SRam.data != NULL) {\r |
| 774 | rs = (rs + mask) & ~mask;\r |
| 775 | if (SRam.start + rs >= 0x1000000)\r |
| 776 | rs = 0x1000000 - SRam.start;\r |
| 777 | cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);\r |
| 778 | cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);\r |
| 779 | cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);\r |
| 780 | cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);\r |
| 781 | }\r |
| 782 | \r |
| 783 | // Z80 region\r |
| 784 | cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);\r |
| 785 | cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);\r |
| 786 | cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);\r |
| 787 | cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);\r |
| 788 | \r |
| 789 | // IO/control region\r |
| 790 | cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);\r |
| 791 | cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);\r |
| 792 | cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);\r |
| 793 | cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);\r |
| 794 | \r |
| 795 | // VDP region\r |
| 796 | for (a = 0xc00000; a < 0xe00000; a += 0x010000) {\r |
| 797 | if ((a & 0xe700e0) != 0xc00000)\r |
| 798 | continue;\r |
| 799 | cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);\r |
| 800 | cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);\r |
| 801 | cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);\r |
| 802 | cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);\r |
| 803 | }\r |
| 804 | \r |
| 805 | // RAM and it's mirrors\r |
| 806 | for (a = 0xe00000; a < 0x1000000; a += 0x010000) {\r |
| 807 | cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);\r |
| 808 | cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);\r |
| 809 | cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);\r |
| 810 | cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);\r |
| 811 | }\r |
| 812 | \r |
| 813 | // Setup memory callbacks:\r |
| 814 | #ifdef EMU_C68K\r |
| 815 | PicoCpuCM68k.checkpc = PicoCheckPc;\r |
| 816 | PicoCpuCM68k.fetch8 = PicoCpuCM68k.read8 = m68k_read8;\r |
| 817 | PicoCpuCM68k.fetch16 = PicoCpuCM68k.read16 = m68k_read16;\r |
| 818 | PicoCpuCM68k.fetch32 = PicoCpuCM68k.read32 = m68k_read32;\r |
| 819 | PicoCpuCM68k.write8 = m68k_write8;\r |
| 820 | PicoCpuCM68k.write16 = m68k_write16;\r |
| 821 | PicoCpuCM68k.write32 = m68k_write32;\r |
| 822 | #endif\r |
| 823 | #ifdef EMU_F68K\r |
| 824 | PicoCpuFM68k.read_byte = m68k_read8;\r |
| 825 | PicoCpuFM68k.read_word = m68k_read16;\r |
| 826 | PicoCpuFM68k.read_long = m68k_read32;\r |
| 827 | PicoCpuFM68k.write_byte = m68k_write8;\r |
| 828 | PicoCpuFM68k.write_word = m68k_write16;\r |
| 829 | PicoCpuFM68k.write_long = m68k_write32;\r |
| 830 | \r |
| 831 | // setup FAME fetchmap\r |
| 832 | {\r |
| 833 | int i;\r |
| 834 | // by default, point everything to first 64k of ROM\r |
| 835 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
| 836 | PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r |
| 837 | // now real ROM\r |
| 838 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r |
| 839 | PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r |
| 840 | // .. and RAM\r |
| 841 | for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r |
| 842 | PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r |
| 843 | }\r |
| 844 | #endif\r |
| 845 | #ifdef EMU_M68K\r |
| 846 | m68k_mem_setup();\r |
| 847 | #endif\r |
| 848 | \r |
| 849 | z80_mem_setup();\r |
| 850 | }\r |
| 851 | \r |
| 852 | /* some nasty things below :( */\r |
| 853 | #ifdef EMU_M68K\r |
| 854 | unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r |
| 855 | unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r |
| 856 | unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r |
| 857 | void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r |
| 858 | void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r |
| 859 | void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r |
| 860 | unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL;\r |
| 861 | unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL;\r |
| 862 | unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL;\r |
| 863 | \r |
| 864 | // these are here for core debugging mode\r |
| 865 | static unsigned int m68k_read_8 (unsigned int a, int do_fake)\r |
| 866 | {\r |
| 867 | a&=0xffffff;\r |
| 868 | if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u8 *)(Pico.rom+(a^1)); // Rom\r |
| 869 | #ifdef EMU_CORE_DEBUG\r |
| 870 | if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r |
| 871 | #endif\r |
| 872 | return pm68k_read_memory_pcr_8(a);\r |
| 873 | }\r |
| 874 | static unsigned int m68k_read_16(unsigned int a, int do_fake)\r |
| 875 | {\r |
| 876 | a&=0xffffff;\r |
| 877 | if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r |
| 878 | #ifdef EMU_CORE_DEBUG\r |
| 879 | if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r |
| 880 | #endif\r |
| 881 | return pm68k_read_memory_pcr_16(a);\r |
| 882 | }\r |
| 883 | static unsigned int m68k_read_32(unsigned int a, int do_fake)\r |
| 884 | {\r |
| 885 | a&=0xffffff;\r |
| 886 | if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r |
| 887 | #ifdef EMU_CORE_DEBUG\r |
| 888 | if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r |
| 889 | #endif\r |
| 890 | return pm68k_read_memory_pcr_32(a);\r |
| 891 | }\r |
| 892 | \r |
| 893 | unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r |
| 894 | unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r |
| 895 | unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r |
| 896 | unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r |
| 897 | unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r |
| 898 | unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r |
| 899 | unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r |
| 900 | unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r |
| 901 | \r |
| 902 | static unsigned int m68k_read_memory_pcr_8(unsigned int a)\r |
| 903 | {\r |
| 904 | if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r |
| 905 | return 0;\r |
| 906 | }\r |
| 907 | \r |
| 908 | static unsigned int m68k_read_memory_pcr_16(unsigned int a)\r |
| 909 | {\r |
| 910 | if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r |
| 911 | return 0;\r |
| 912 | }\r |
| 913 | \r |
| 914 | static unsigned int m68k_read_memory_pcr_32(unsigned int a)\r |
| 915 | {\r |
| 916 | if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r |
| 917 | return 0;\r |
| 918 | }\r |
| 919 | \r |
| 920 | #ifdef EMU_CORE_DEBUG\r |
| 921 | // ROM only\r |
| 922 | unsigned int m68k_read_memory_8(unsigned int a)\r |
| 923 | {\r |
| 924 | u8 d;\r |
| 925 | if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r |
| 926 | d = *(u8 *) (Pico.rom+(a^1));\r |
| 927 | else d = (u8) lastread_d[lrp_mus++&15];\r |
| 928 | elprintf(EL_IO, "r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r |
| 929 | return d;\r |
| 930 | }\r |
| 931 | unsigned int m68k_read_memory_16(unsigned int a)\r |
| 932 | {\r |
| 933 | u16 d;\r |
| 934 | if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r |
| 935 | d = *(u16 *)(Pico.rom+(a&~1));\r |
| 936 | else d = (u16) lastread_d[lrp_mus++&15];\r |
| 937 | elprintf(EL_IO, "r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r |
| 938 | return d;\r |
| 939 | }\r |
| 940 | unsigned int m68k_read_memory_32(unsigned int a)\r |
| 941 | {\r |
| 942 | u32 d;\r |
| 943 | if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r |
| 944 | { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }\r |
| 945 | else if (a <= 0x78) d = m68k_read_32(a, 0);\r |
| 946 | else d = lastread_d[lrp_mus++&15];\r |
| 947 | elprintf(EL_IO, "r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r |
| 948 | return d;\r |
| 949 | }\r |
| 950 | \r |
| 951 | // ignore writes, Cyclone already done that\r |
| 952 | void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
| 953 | void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
| 954 | void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r |
| 955 | \r |
| 956 | #else // if !EMU_CORE_DEBUG\r |
| 957 | \r |
| 958 | /* it appears that Musashi doesn't always mask the unused bits */\r |
| 959 | unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r |
| 960 | unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r |
| 961 | unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r |
| 962 | void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r |
| 963 | void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r |
| 964 | void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r |
| 965 | #endif // !EMU_CORE_DEBUG\r |
| 966 | \r |
| 967 | static void m68k_mem_setup(void)\r |
| 968 | {\r |
| 969 | pm68k_read_memory_8 = m68k_read8;\r |
| 970 | pm68k_read_memory_16 = m68k_read16;\r |
| 971 | pm68k_read_memory_32 = m68k_read32;\r |
| 972 | pm68k_write_memory_8 = m68k_write8;\r |
| 973 | pm68k_write_memory_16 = m68k_write16;\r |
| 974 | pm68k_write_memory_32 = m68k_write32;\r |
| 975 | pm68k_read_memory_pcr_8 = m68k_read_memory_pcr_8;\r |
| 976 | pm68k_read_memory_pcr_16 = m68k_read_memory_pcr_16;\r |
| 977 | pm68k_read_memory_pcr_32 = m68k_read_memory_pcr_32;\r |
| 978 | }\r |
| 979 | #endif // EMU_M68K\r |
| 980 | \r |
| 981 | \r |
| 982 | // -----------------------------------------------------------------\r |
| 983 | \r |
| 984 | static int get_scanline(int is_from_z80)\r |
| 985 | {\r |
| 986 | if (is_from_z80) {\r |
| 987 | int cycles = z80_cyclesDone();\r |
| 988 | while (cycles - z80_scanline_cycles >= 228)\r |
| 989 | z80_scanline++, z80_scanline_cycles += 228;\r |
| 990 | return z80_scanline;\r |
| 991 | }\r |
| 992 | \r |
| 993 | return Pico.m.scanline;\r |
| 994 | }\r |
| 995 | \r |
| 996 | /* probably should not be in this file, but it's near related code here */\r |
| 997 | void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)\r |
| 998 | {\r |
| 999 | int xcycles = z80_cycles << 8;\r |
| 1000 | \r |
| 1001 | /* check for overflows */\r |
| 1002 | if ((mode_old & 4) && xcycles > timer_a_next_oflow)\r |
| 1003 | ym2612.OPN.ST.status |= 1;\r |
| 1004 | \r |
| 1005 | if ((mode_old & 8) && xcycles > timer_b_next_oflow)\r |
| 1006 | ym2612.OPN.ST.status |= 2;\r |
| 1007 | \r |
| 1008 | /* update timer a */\r |
| 1009 | if (mode_old & 1)\r |
| 1010 | while (xcycles > timer_a_next_oflow)\r |
| 1011 | timer_a_next_oflow += timer_a_step;\r |
| 1012 | \r |
| 1013 | if ((mode_old ^ mode_new) & 1) // turning on/off\r |
| 1014 | {\r |
| 1015 | if (mode_old & 1)\r |
| 1016 | timer_a_next_oflow = TIMER_NO_OFLOW;\r |
| 1017 | else\r |
| 1018 | timer_a_next_oflow = xcycles + timer_a_step;\r |
| 1019 | }\r |
| 1020 | if (mode_new & 1)\r |
| 1021 | elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);\r |
| 1022 | \r |
| 1023 | /* update timer b */\r |
| 1024 | if (mode_old & 2)\r |
| 1025 | while (xcycles > timer_b_next_oflow)\r |
| 1026 | timer_b_next_oflow += timer_b_step;\r |
| 1027 | \r |
| 1028 | if ((mode_old ^ mode_new) & 2)\r |
| 1029 | {\r |
| 1030 | if (mode_old & 2)\r |
| 1031 | timer_b_next_oflow = TIMER_NO_OFLOW;\r |
| 1032 | else\r |
| 1033 | timer_b_next_oflow = xcycles + timer_b_step;\r |
| 1034 | }\r |
| 1035 | if (mode_new & 2)\r |
| 1036 | elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);\r |
| 1037 | }\r |
| 1038 | \r |
| 1039 | // ym2612 DAC and timer I/O handlers for z80\r |
| 1040 | static int ym2612_write_local(u32 a, u32 d, int is_from_z80)\r |
| 1041 | {\r |
| 1042 | int addr;\r |
| 1043 | \r |
| 1044 | a &= 3;\r |
| 1045 | if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */\r |
| 1046 | {\r |
| 1047 | int scanline = get_scanline(is_from_z80);\r |
| 1048 | //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);\r |
| 1049 | ym2612.dacout = ((int)d - 0x80) << 6;\r |
| 1050 | if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)\r |
| 1051 | PsndDoDAC(scanline);\r |
| 1052 | return 0;\r |
| 1053 | }\r |
| 1054 | \r |
| 1055 | switch (a)\r |
| 1056 | {\r |
| 1057 | case 0: /* address port 0 */\r |
| 1058 | ym2612.OPN.ST.address = d;\r |
| 1059 | ym2612.addr_A1 = 0;\r |
| 1060 | #ifdef __GP2X__\r |
| 1061 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r |
| 1062 | #endif\r |
| 1063 | return 0;\r |
| 1064 | \r |
| 1065 | case 1: /* data port 0 */\r |
| 1066 | if (ym2612.addr_A1 != 0)\r |
| 1067 | return 0;\r |
| 1068 | \r |
| 1069 | addr = ym2612.OPN.ST.address;\r |
| 1070 | ym2612.REGS[addr] = d;\r |
| 1071 | \r |
| 1072 | switch (addr)\r |
| 1073 | {\r |
| 1074 | case 0x24: // timer A High 8\r |
| 1075 | case 0x25: { // timer A Low 2\r |
| 1076 | int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))\r |
| 1077 | : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));\r |
| 1078 | if (ym2612.OPN.ST.TA != TAnew)\r |
| 1079 | {\r |
| 1080 | //elprintf(EL_STATUS, "timer a set %i", TAnew);\r |
| 1081 | ym2612.OPN.ST.TA = TAnew;\r |
| 1082 | //ym2612.OPN.ST.TAC = (1024-TAnew)*18;\r |
| 1083 | //ym2612.OPN.ST.TAT = 0;\r |
| 1084 | timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r |
| 1085 | if (ym2612.OPN.ST.mode & 1) {\r |
| 1086 | // this is not right, should really be done on overflow only\r |
| 1087 | int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r |
| 1088 | timer_a_next_oflow = (cycles << 8) + timer_a_step;\r |
| 1089 | }\r |
| 1090 | elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r |
| 1091 | }\r |
| 1092 | return 0;\r |
| 1093 | }\r |
| 1094 | case 0x26: // timer B\r |
| 1095 | if (ym2612.OPN.ST.TB != d) {\r |
| 1096 | //elprintf(EL_STATUS, "timer b set %i", d);\r |
| 1097 | ym2612.OPN.ST.TB = d;\r |
| 1098 | //ym2612.OPN.ST.TBC = (256-d) * 288;\r |
| 1099 | //ym2612.OPN.ST.TBT = 0;\r |
| 1100 | timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r |
| 1101 | if (ym2612.OPN.ST.mode & 2) {\r |
| 1102 | int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r |
| 1103 | timer_b_next_oflow = (cycles << 8) + timer_b_step;\r |
| 1104 | }\r |
| 1105 | elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r |
| 1106 | }\r |
| 1107 | return 0;\r |
| 1108 | case 0x27: { /* mode, timer control */\r |
| 1109 | int old_mode = ym2612.OPN.ST.mode;\r |
| 1110 | int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r |
| 1111 | ym2612.OPN.ST.mode = d;\r |
| 1112 | \r |
| 1113 | elprintf(EL_YMTIMER, "st mode %02x", d);\r |
| 1114 | ym2612_sync_timers(cycles, old_mode, d);\r |
| 1115 | \r |
| 1116 | /* reset Timer a flag */\r |
| 1117 | if (d & 0x10)\r |
| 1118 | ym2612.OPN.ST.status &= ~1;\r |
| 1119 | \r |
| 1120 | /* reset Timer b flag */\r |
| 1121 | if (d & 0x20)\r |
| 1122 | ym2612.OPN.ST.status &= ~2;\r |
| 1123 | \r |
| 1124 | if ((d ^ old_mode) & 0xc0) {\r |
| 1125 | #ifdef __GP2X__\r |
| 1126 | if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));\r |
| 1127 | #endif\r |
| 1128 | return 1;\r |
| 1129 | }\r |
| 1130 | return 0;\r |
| 1131 | }\r |
| 1132 | case 0x2b: { /* DAC Sel (YM2612) */\r |
| 1133 | int scanline = get_scanline(is_from_z80);\r |
| 1134 | ym2612.dacen = d & 0x80;\r |
| 1135 | if (d & 0x80) PsndDacLine = scanline;\r |
| 1136 | #ifdef __GP2X__\r |
| 1137 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);\r |
| 1138 | #endif\r |
| 1139 | return 0;\r |
| 1140 | }\r |
| 1141 | }\r |
| 1142 | break;\r |
| 1143 | \r |
| 1144 | case 2: /* address port 1 */\r |
| 1145 | ym2612.OPN.ST.address = d;\r |
| 1146 | ym2612.addr_A1 = 1;\r |
| 1147 | #ifdef __GP2X__\r |
| 1148 | if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);\r |
| 1149 | #endif\r |
| 1150 | return 0;\r |
| 1151 | \r |
| 1152 | case 3: /* data port 1 */\r |
| 1153 | if (ym2612.addr_A1 != 1)\r |
| 1154 | return 0;\r |
| 1155 | \r |
| 1156 | addr = ym2612.OPN.ST.address | 0x100;\r |
| 1157 | ym2612.REGS[addr] = d;\r |
| 1158 | break;\r |
| 1159 | }\r |
| 1160 | \r |
| 1161 | #ifdef __GP2X__\r |
| 1162 | if (PicoOpt & POPT_EXT_FM)\r |
| 1163 | return YM2612Write_940(a, d, get_scanline(is_from_z80));\r |
| 1164 | #endif\r |
| 1165 | return YM2612Write_(a, d);\r |
| 1166 | }\r |
| 1167 | \r |
| 1168 | \r |
| 1169 | #define ym2612_read_local() \\r |
| 1170 | if (xcycles >= timer_a_next_oflow) \\r |
| 1171 | ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \\r |
| 1172 | if (xcycles >= timer_b_next_oflow) \\r |
| 1173 | ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r |
| 1174 | \r |
| 1175 | static u32 MEMH_FUNC ym2612_read_local_z80(void)\r |
| 1176 | {\r |
| 1177 | int xcycles = z80_cyclesDone() << 8;\r |
| 1178 | \r |
| 1179 | ym2612_read_local();\r |
| 1180 | \r |
| 1181 | elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r |
| 1182 | timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r |
| 1183 | return ym2612.OPN.ST.status;\r |
| 1184 | }\r |
| 1185 | \r |
| 1186 | static u32 ym2612_read_local_68k(void)\r |
| 1187 | {\r |
| 1188 | int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r |
| 1189 | \r |
| 1190 | ym2612_read_local();\r |
| 1191 | \r |
| 1192 | elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,\r |
| 1193 | timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);\r |
| 1194 | return ym2612.OPN.ST.status;\r |
| 1195 | }\r |
| 1196 | \r |
| 1197 | void ym2612_pack_state(void)\r |
| 1198 | {\r |
| 1199 | // timers are saved as tick counts, in 16.16 int format\r |
| 1200 | int tac, tat = 0, tbc, tbt = 0;\r |
| 1201 | tac = 1024 - ym2612.OPN.ST.TA;\r |
| 1202 | tbc = 256 - ym2612.OPN.ST.TB;\r |
| 1203 | if (timer_a_next_oflow != TIMER_NO_OFLOW)\r |
| 1204 | tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);\r |
| 1205 | if (timer_b_next_oflow != TIMER_NO_OFLOW)\r |
| 1206 | tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);\r |
| 1207 | elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);\r |
| 1208 | elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);\r |
| 1209 | \r |
| 1210 | #ifdef __GP2X__\r |
| 1211 | if (PicoOpt & POPT_EXT_FM)\r |
| 1212 | YM2612PicoStateSave2_940(tat, tbt);\r |
| 1213 | else\r |
| 1214 | #endif\r |
| 1215 | YM2612PicoStateSave2(tat, tbt);\r |
| 1216 | }\r |
| 1217 | \r |
| 1218 | void ym2612_unpack_state(void)\r |
| 1219 | {\r |
| 1220 | int i, ret, tac, tat, tbc, tbt;\r |
| 1221 | YM2612PicoStateLoad();\r |
| 1222 | \r |
| 1223 | // feed all the registers and update internal state\r |
| 1224 | for (i = 0x20; i < 0xA0; i++) {\r |
| 1225 | ym2612_write_local(0, i, 0);\r |
| 1226 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
| 1227 | }\r |
| 1228 | for (i = 0x30; i < 0xA0; i++) {\r |
| 1229 | ym2612_write_local(2, i, 0);\r |
| 1230 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
| 1231 | }\r |
| 1232 | for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards\r |
| 1233 | ym2612_write_local(2, i, 0);\r |
| 1234 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
| 1235 | ym2612_write_local(0, i, 0);\r |
| 1236 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
| 1237 | }\r |
| 1238 | for (i = 0xB0; i < 0xB8; i++) {\r |
| 1239 | ym2612_write_local(0, i, 0);\r |
| 1240 | ym2612_write_local(1, ym2612.REGS[i], 0);\r |
| 1241 | ym2612_write_local(2, i, 0);\r |
| 1242 | ym2612_write_local(3, ym2612.REGS[i|0x100], 0);\r |
| 1243 | }\r |
| 1244 | \r |
| 1245 | #ifdef __GP2X__\r |
| 1246 | if (PicoOpt & POPT_EXT_FM)\r |
| 1247 | ret = YM2612PicoStateLoad2_940(&tat, &tbt);\r |
| 1248 | else\r |
| 1249 | #endif\r |
| 1250 | ret = YM2612PicoStateLoad2(&tat, &tbt);\r |
| 1251 | if (ret != 0) {\r |
| 1252 | elprintf(EL_STATUS, "old ym2612 state");\r |
| 1253 | return; // no saved timers\r |
| 1254 | }\r |
| 1255 | \r |
| 1256 | tac = (1024 - ym2612.OPN.ST.TA) << 16;\r |
| 1257 | tbc = (256 - ym2612.OPN.ST.TB) << 16;\r |
| 1258 | if (ym2612.OPN.ST.mode & 1)\r |
| 1259 | timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);\r |
| 1260 | else\r |
| 1261 | timer_a_next_oflow = TIMER_NO_OFLOW;\r |
| 1262 | if (ym2612.OPN.ST.mode & 2)\r |
| 1263 | timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);\r |
| 1264 | else\r |
| 1265 | timer_b_next_oflow = TIMER_NO_OFLOW;\r |
| 1266 | elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);\r |
| 1267 | elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r |
| 1268 | }\r |
| 1269 | \r |
| 1270 | // -----------------------------------------------------------------\r |
| 1271 | // z80 memhandlers\r |
| 1272 | \r |
| 1273 | static unsigned char MEMH_FUNC z80_md_vdp_read(unsigned short a)\r |
| 1274 | {\r |
| 1275 | // TODO?\r |
| 1276 | elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);\r |
| 1277 | return 0xff;\r |
| 1278 | }\r |
| 1279 | \r |
| 1280 | static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)\r |
| 1281 | {\r |
| 1282 | extern unsigned int PicoReadM68k8(unsigned int a);\r |
| 1283 | unsigned int addr68k;\r |
| 1284 | unsigned char ret;\r |
| 1285 | \r |
| 1286 | addr68k = Pico.m.z80_bank68k<<15;\r |
| 1287 | addr68k += a & 0x7fff;\r |
| 1288 | \r |
| 1289 | if (addr68k < Pico.romsize) {\r |
| 1290 | ret = Pico.rom[addr68k^1];\r |
| 1291 | goto out;\r |
| 1292 | }\r |
| 1293 | \r |
| 1294 | ret = m68k_read8(addr68k);\r |
| 1295 | elprintf(EL_ANOMALY, "z80->68k upper read [%06x] %02x", addr68k, ret);\r |
| 1296 | \r |
| 1297 | out:\r |
| 1298 | elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r |
| 1299 | return ret;\r |
| 1300 | }\r |
| 1301 | \r |
| 1302 | static void MEMH_FUNC z80_md_ym2612_write(unsigned int a, unsigned char data)\r |
| 1303 | {\r |
| 1304 | if (PicoOpt & POPT_EN_FM)\r |
| 1305 | emustatus |= ym2612_write_local(a, data, 1) & 1;\r |
| 1306 | }\r |
| 1307 | \r |
| 1308 | static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)\r |
| 1309 | {\r |
| 1310 | // TODO: allow full VDP access\r |
| 1311 | if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17\r |
| 1312 | {\r |
| 1313 | if (PicoOpt & POPT_EN_PSG)\r |
| 1314 | SN76496Write(data);\r |
| 1315 | return;\r |
| 1316 | }\r |
| 1317 | \r |
| 1318 | if ((a>>8) == 0x60)\r |
| 1319 | {\r |
| 1320 | Pico.m.z80_bank68k >>= 1;\r |
| 1321 | Pico.m.z80_bank68k |= data << 8;\r |
| 1322 | Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one\r |
| 1323 | return;\r |
| 1324 | }\r |
| 1325 | \r |
| 1326 | elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r |
| 1327 | }\r |
| 1328 | \r |
| 1329 | static void MEMH_FUNC z80_md_bank_write(unsigned int a, unsigned char data)\r |
| 1330 | {\r |
| 1331 | extern void PicoWriteM68k8(unsigned int a, unsigned char d);\r |
| 1332 | unsigned int addr68k;\r |
| 1333 | \r |
| 1334 | addr68k = Pico.m.z80_bank68k << 15;\r |
| 1335 | addr68k += a & 0x7fff;\r |
| 1336 | \r |
| 1337 | elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r |
| 1338 | m68k_write8(addr68k, data);\r |
| 1339 | }\r |
| 1340 | \r |
| 1341 | // -----------------------------------------------------------------\r |
| 1342 | \r |
| 1343 | static unsigned char z80_md_in(unsigned short p)\r |
| 1344 | {\r |
| 1345 | elprintf(EL_ANOMALY, "Z80 port %04x read", p);\r |
| 1346 | return 0xff;\r |
| 1347 | }\r |
| 1348 | \r |
| 1349 | static void z80_md_out(unsigned short p, unsigned char d)\r |
| 1350 | {\r |
| 1351 | elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);\r |
| 1352 | }\r |
| 1353 | \r |
| 1354 | static void z80_mem_setup(void)\r |
| 1355 | {\r |
| 1356 | z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);\r |
| 1357 | z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);\r |
| 1358 | z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);\r |
| 1359 | z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);\r |
| 1360 | z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);\r |
| 1361 | \r |
| 1362 | z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);\r |
| 1363 | z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);\r |
| 1364 | z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);\r |
| 1365 | z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);\r |
| 1366 | z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);\r |
| 1367 | \r |
| 1368 | #ifdef _USE_DRZ80\r |
| 1369 | drZ80.z80_in = z80_md_in;\r |
| 1370 | drZ80.z80_out = z80_md_out;\r |
| 1371 | #endif\r |
| 1372 | #ifdef _USE_CZ80\r |
| 1373 | Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r |
| 1374 | Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror\r |
| 1375 | Cz80_Set_INPort(&CZ80, z80_md_in);\r |
| 1376 | Cz80_Set_OUTPort(&CZ80, z80_md_out);\r |
| 1377 | #endif\r |
| 1378 | }\r |
| 1379 | \r |