Cyclone interface for new mem system, minor tweaks
[picodrive.git] / pico / memory_arm.s
... / ...
CommitLineData
1@ vim:filetype=armasm\r
2\r
3@ memory handlers with banking support for SSF II - The New Challengers\r
4@ mostly based on Gens code\r
5\r
6@ (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas\r
7@ All Rights Reserved\r
8\r
9\r
10.include "port_config.s"\r
11\r
12.text\r
13.align 4\r
14\r
15@ default jump tables\r
16\r
17m_read8_def_table:\r
18 .long m_read8_rom0 @ 0x000000 - 0x07FFFF\r
19 .long m_read8_rom1 @ 0x080000 - 0x0FFFFF\r
20 .long m_read8_rom2 @ 0x100000 - 0x17FFFF\r
21 .long m_read8_rom3 @ 0x180000 - 0x1FFFFF\r
22 .long m_read8_rom4 @ 0x200000 - 0x27FFFF\r
23 .long m_read8_rom5 @ 0x280000 - 0x2FFFFF\r
24 .long m_read8_rom6 @ 0x300000 - 0x37FFFF\r
25 .long m_read8_rom7 @ 0x380000 - 0x3FFFFF\r
26 .long m_read8_rom8 @ 0x400000 - 0x47FFFF - for all those large ROM hacks\r
27 .long m_read8_rom9 @ 0x480000 - 0x4FFFFF\r
28 .long m_read8_romA @ 0x500000 - 0x57FFFF\r
29 .long m_read8_romB @ 0x580000 - 0x5FFFFF\r
30 .long m_read8_romC @ 0x600000 - 0x67FFFF\r
31 .long m_read8_romD @ 0x680000 - 0x6FFFFF\r
32 .long m_read8_romE @ 0x700000 - 0x77FFFF\r
33 .long m_read8_romF @ 0x780000 - 0x7FFFFF\r
34 .long m_read8_rom10 @ 0x800000 - 0x87FFFF\r
35 .long m_read8_rom11 @ 0x880000 - 0x8FFFFF\r
36 .long m_read8_rom12 @ 0x900000 - 0x97FFFF\r
37 .long m_read8_rom13 @ 0x980000 - 0x9FFFFF\r
38 .long m_read8_misc @ 0xA00000 - 0xA7FFFF\r
39 .long m_read_null @ 0xA80000 - 0xAFFFFF\r
40 .long m_read_null @ 0xB00000 - 0xB7FFFF\r
41 .long m_read_null @ 0xB80000 - 0xBFFFFF\r
42 .long m_read8_vdp @ 0xC00000 - 0xC7FFFF\r
43 .long m_read8_vdp @ 0xC80000 - 0xCFFFFF\r
44 .long m_read8_vdp @ 0xD00000 - 0xD7FFFF\r
45 .long m_read8_vdp @ 0xD80000 - 0xDFFFFF\r
46 .long m_read8_ram @ 0xE00000 - 0xE7FFFF\r
47 .long m_read8_ram @ 0xE80000 - 0xEFFFFF\r
48 .long m_read8_ram @ 0xF00000 - 0xF7FFFF\r
49 .long m_read8_ram @ 0xF80000 - 0xFFFFFF\r
50\r
51m_read16_def_table:\r
52 .long m_read16_rom0 @ 0x000000 - 0x07FFFF\r
53 .long m_read16_rom1 @ 0x080000 - 0x0FFFFF\r
54 .long m_read16_rom2 @ 0x100000 - 0x17FFFF\r
55 .long m_read16_rom3 @ 0x180000 - 0x1FFFFF\r
56 .long m_read16_rom4 @ 0x200000 - 0x27FFFF\r
57 .long m_read16_rom5 @ 0x280000 - 0x2FFFFF\r
58 .long m_read16_rom6 @ 0x300000 - 0x37FFFF\r
59 .long m_read16_rom7 @ 0x380000 - 0x3FFFFF\r
60 .long m_read16_rom8 @ 0x400000 - 0x47FFFF\r
61 .long m_read16_rom9 @ 0x480000 - 0x4FFFFF\r
62 .long m_read16_romA @ 0x500000 - 0x57FFFF\r
63 .long m_read16_romB @ 0x580000 - 0x5FFFFF\r
64 .long m_read16_romC @ 0x600000 - 0x67FFFF\r
65 .long m_read16_romD @ 0x680000 - 0x6FFFFF\r
66 .long m_read16_romE @ 0x700000 - 0x77FFFF\r
67 .long m_read16_romF @ 0x780000 - 0x7FFFFF\r
68 .long m_read16_rom10 @ 0x800000 - 0x87FFFF\r
69 .long m_read16_rom11 @ 0x880000 - 0x8FFFFF\r
70 .long m_read16_rom12 @ 0x900000 - 0x97FFFF\r
71 .long m_read16_rom13 @ 0x980000 - 0x9FFFFF\r
72 .long m_read16_misc @ 0xA00000 - 0xA7FFFF\r
73 .long m_read_null @ 0xA80000 - 0xAFFFFF\r
74 .long m_read_null @ 0xB00000 - 0xB7FFFF\r
75 .long m_read_null @ 0xB80000 - 0xBFFFFF\r
76 .long m_read16_vdp @ 0xC00000 - 0xC7FFFF\r
77 .long m_read16_vdp @ 0xC80000 - 0xCFFFFF\r
78 .long m_read16_vdp @ 0xD00000 - 0xD7FFFF\r
79 .long m_read16_vdp @ 0xD80000 - 0xDFFFFF\r
80 .long m_read16_ram @ 0xE00000 - 0xE7FFFF\r
81 .long m_read16_ram @ 0xE80000 - 0xEFFFFF\r
82 .long m_read16_ram @ 0xF00000 - 0xF7FFFF\r
83 .long m_read16_ram @ 0xF80000 - 0xFFFFFF\r
84\r
85m_read32_def_table:\r
86 .long m_read32_rom0 @ 0x000000 - 0x07FFFF\r
87 .long m_read32_rom1 @ 0x080000 - 0x0FFFFF\r
88 .long m_read32_rom2 @ 0x100000 - 0x17FFFF\r
89 .long m_read32_rom3 @ 0x180000 - 0x1FFFFF\r
90 .long m_read32_rom4 @ 0x200000 - 0x27FFFF\r
91 .long m_read32_rom5 @ 0x280000 - 0x2FFFFF\r
92 .long m_read32_rom6 @ 0x300000 - 0x37FFFF\r
93 .long m_read32_rom7 @ 0x380000 - 0x3FFFFF\r
94 .long m_read32_rom8 @ 0x400000 - 0x47FFFF\r
95 .long m_read32_rom9 @ 0x480000 - 0x4FFFFF\r
96 .long m_read32_romA @ 0x500000 - 0x57FFFF\r
97 .long m_read32_romB @ 0x580000 - 0x5FFFFF\r
98 .long m_read32_romC @ 0x600000 - 0x67FFFF\r
99 .long m_read32_romD @ 0x680000 - 0x6FFFFF\r
100 .long m_read32_romE @ 0x700000 - 0x77FFFF\r
101 .long m_read32_romF @ 0x780000 - 0x7FFFFF\r
102 .long m_read32_rom10 @ 0x800000 - 0x87FFFF\r
103 .long m_read32_rom11 @ 0x880000 - 0x8FFFFF\r
104 .long m_read32_rom12 @ 0x900000 - 0x97FFFF\r
105 .long m_read32_rom13 @ 0x980000 - 0x9FFFFF\r
106 .long m_read32_misc @ 0xA00000 - 0xA7FFFF\r
107 .long m_read_null @ 0xA80000 - 0xAFFFFF\r
108 .long m_read_null @ 0xB00000 - 0xB7FFFF\r
109 .long m_read_null @ 0xB80000 - 0xBFFFFF\r
110 .long m_read32_vdp @ 0xC00000 - 0xC7FFFF\r
111 .long m_read32_vdp @ 0xC80000 - 0xCFFFFF\r
112 .long m_read32_vdp @ 0xD00000 - 0xD7FFFF\r
113 .long m_read32_vdp @ 0xD80000 - 0xDFFFFF\r
114 .long m_read32_ram @ 0xE00000 - 0xE7FFFF\r
115 .long m_read32_ram @ 0xE80000 - 0xEFFFFF\r
116 .long m_read32_ram @ 0xF00000 - 0xF7FFFF\r
117 .long m_read32_ram @ 0xF80000 - 0xFFFFFF\r
118\r
119\r
120@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
121\r
122.bss\r
123.align 4\r
124@.section .bss, "brw"\r
125@.data\r
126\r
127@ used tables\r
128m_read8_table:\r
129 .skip 32*4\r
130\r
131m_read16_table:\r
132 .skip 32*4\r
133\r
134m_read32_table:\r
135 .skip 32*4\r
136\r
137\r
138@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
139\r
140.text\r
141.align 4\r
142\r
143.global PicoMemReset\r
144.global PicoRead8\r
145.global PicoRead16\r
146.global PicoRead32\r
147.global PicoWrite8\r
148.global PicoWriteRomHW_SSF2\r
149.global m_m68k_read8_misc\r
150.global m_m68k_write8_misc\r
151\r
152\r
153PicoMemReset:\r
154 ldr r12,=(Pico+0x22204)\r
155 ldr r12,[r12] @ romsize\r
156 add r12,r12,#0x80000\r
157 sub r12,r12,#1\r
158 mov r12,r12,lsr #19\r
159\r
160 ldr r0, =m_read8_table\r
161 ldr r1, =m_read8_def_table\r
162 mov r2, #32\r
1631:\r
164 ldr r3, [r1], #4\r
165 str r3, [r0], #4\r
166 subs r2, r2, #1\r
167 bne 1b\r
168\r
169 ldr r0, =m_read16_table\r
170 ldr r1, =m_read16_def_table\r
171 mov r2, #32\r
1721:\r
173 subs r2, r2, #1\r
174 ldr r3, [r1], #4\r
175 str r3, [r0], #4\r
176 bne 1b\r
177\r
178 ldr r0, =m_read32_table\r
179 ldr r1, =m_read32_def_table\r
180 mov r2, #32\r
1811:\r
182 subs r2, r2, #1\r
183 ldr r3, [r1], #4\r
184 str r3, [r0], #4\r
185 bne 1b\r
186\r
187 @ update memhandlers according to ROM size\r
188 ldr r1, =m_read8_above_rom\r
189 ldr r0, =m_read8_table\r
190 mov r2, #20\r
1911:\r
192 sub r2, r2, #1\r
193 cmp r2, r12\r
194 blt 2f\r
195 cmp r2, #4\r
196 beq 1b @ do not touch the SRAM area\r
197 str r1, [r0, r2, lsl #2]\r
198 b 1b\r
1992:\r
200 ldr r1, =m_read16_above_rom\r
201 ldr r0, =m_read16_table\r
202 mov r2, #20\r
2031:\r
204 sub r2, r2, #1\r
205 cmp r2, r12\r
206 blt 2f\r
207 cmp r2, #4\r
208 beq 1b\r
209 str r1, [r0, r2, lsl #2]\r
210 b 1b\r
2112:\r
212 ldr r1, =m_read32_above_rom\r
213 ldr r0, =m_read32_table\r
214 mov r2, #20\r
2151:\r
216 sub r2, r2, #1\r
217 cmp r2, r12\r
218 blt 2f\r
219 cmp r2, #4\r
220 beq 1b\r
221 str r1, [r0, r2, lsl #2]\r
222 b 1b\r
2232:\r
224 bx lr\r
225\r
226.pool\r
227\r
228@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
229\r
230PicoRead8: @ u32 a\r
231 ldr r2, =m_read8_table\r
232 bic r0, r0, #0xff000000\r
233 and r1, r0, #0x00f80000\r
234 ldr pc, [r2, r1, lsr #17]\r
235\r
236PicoRead16: @ u32 a\r
237 ldr r2, =m_read16_table\r
238 bic r0, r0, #0xff000000\r
239 and r1, r0, #0x00f80000\r
240 ldr pc, [r2, r1, lsr #17]\r
241\r
242PicoRead32: @ u32 a\r
243 ldr r2, =m_read32_table\r
244 bic r0, r0, #0xff000000\r
245 and r1, r0, #0x00f80000\r
246 ldr pc, [r2, r1, lsr #17]\r
247\r
248.pool\r
249\r
250@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
251\r
252m_read_null:\r
253 mov r0, #0\r
254 bx lr\r
255\r
256\r
257.macro m_read8_rom sect\r
258 ldr r1, =(Pico+0x22200)\r
259 bic r0, r0, #0xf80000\r
260 ldr r1, [r1]\r
261.if \sect\r
262 orr r0, r0, #0x080000*\sect\r
263.endif\r
264 eor r0, r0, #1\r
265 ldrb r0, [r1, r0]\r
266 bx lr\r
267.endm\r
268\r
269\r
270m_read8_rom0: @ 0x000000 - 0x07ffff\r
271 m_read8_rom 0\r
272\r
273m_read8_rom1: @ 0x080000 - 0x0fffff\r
274 m_read8_rom 1\r
275\r
276m_read8_rom2: @ 0x100000 - 0x17ffff\r
277 m_read8_rom 2\r
278\r
279m_read8_rom3: @ 0x180000 - 0x1fffff\r
280 m_read8_rom 3\r
281\r
282m_read8_rom4: @ 0x200000 - 0x27ffff, SRAM area\r
283 ldr r2, =(SRam)\r
284 ldr r3, =(Pico+0x22200)\r
285 ldr r1, [r2, #8] @ SRam.end\r
286 bic r0, r0, #0xf80000\r
287 orr r0, r0, #0x200000\r
288 cmp r0, r1\r
289 bgt m_read8_nosram\r
290 ldr r1, [r2, #4] @ SRam.start\r
291 cmp r0, r1\r
292 blt m_read8_nosram\r
293 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
294 tst r1, #5\r
295 bne SRAMRead\r
296m_read8_nosram:\r
297 ldr r1, [r3, #4] @ romsize\r
298 cmp r0, r1\r
299 movgt r0, #0\r
300 bxgt lr @ bad location\r
301 ldr r1, [r3]\r
302 eor r0, r0, #1\r
303 ldrb r0, [r1, r0]\r
304 bx lr\r
305\r
306m_read8_rom5: @ 0x280000 - 0x2fffff\r
307 m_read8_rom 5\r
308\r
309m_read8_rom6: @ 0x300000 - 0x37ffff\r
310 m_read8_rom 6\r
311\r
312m_read8_rom7: @ 0x380000 - 0x3fffff\r
313 m_read8_rom 7\r
314\r
315m_read8_rom8: @ 0x400000 - 0x47ffff\r
316 m_read8_rom 8\r
317\r
318m_read8_rom9: @ 0x480000 - 0x4fffff\r
319 m_read8_rom 9\r
320\r
321m_read8_romA: @ 0x500000 - 0x57ffff\r
322 m_read8_rom 0xA\r
323\r
324m_read8_romB: @ 0x580000 - 0x5fffff\r
325 m_read8_rom 0xB\r
326\r
327m_read8_romC: @ 0x600000 - 0x67ffff\r
328 m_read8_rom 0xC\r
329\r
330m_read8_romD: @ 0x680000 - 0x6fffff\r
331 m_read8_rom 0xD\r
332\r
333m_read8_romE: @ 0x700000 - 0x77ffff\r
334 m_read8_rom 0xE\r
335\r
336m_read8_romF: @ 0x780000 - 0x7fffff\r
337 m_read8_rom 0xF\r
338\r
339m_read8_rom10: @ 0x800000 - 0x87ffff\r
340 m_read8_rom 0x10\r
341\r
342m_read8_rom11: @ 0x880000 - 0x8fffff\r
343 m_read8_rom 0x11\r
344\r
345m_read8_rom12: @ 0x900000 - 0x97ffff\r
346 m_read8_rom 0x12\r
347\r
348m_read8_rom13: @ 0x980000 - 0x9fffff\r
349 m_read8_rom 0x13\r
350\r
351\r
352m_m68k_read8_misc:\r
353m_read8_misc:\r
354 bic r2, r0, #0x001f @ most commonly we get i/o port read,\r
355 cmp r2, #0xa10000 @ so check for it first\r
356 bne m_read8_misc2\r
357m_read8_misc_io:\r
358 ands r0, r0, #0x1e\r
359 beq m_read8_misc_hwreg\r
360 cmp r0, #4\r
361 movlt r0, #0\r
362 moveq r0, #1\r
363 ble PadRead\r
364 ldr r3, =(Pico+0x22000)\r
365 mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])\r
366 ldrb r0, [r3, r0]\r
367 bx lr\r
368\r
369m_read8_misc_hwreg:\r
370 ldr r3, =(Pico+0x22200)\r
371 ldrb r0, [r3, #0x0f] @ Pico.m.hardware\r
372 bx lr\r
373\r
374m_read8_misc2:\r
375 mov r2, #0xa10000 @ games also like to poll busreq,\r
376 orr r2, r2, #0x001100 @ so we'll try it now\r
377 cmp r0, r2\r
378 beq z80ReadBusReq\r
379\r
380 and r2, r0, #0xff0000 @ finally it might be\r
381 cmp r2, #0xa00000 @ z80 area\r
382 bne m_read8_misc3\r
383 tst r0, #0x4000\r
384 beq z80Read8 @ z80 RAM\r
385 and r2, r0, #0x6000\r
386 cmp r2, #0x4000\r
387 mvnne r0, #0\r
388 bxne lr @ invalid\r
389 b ym2612_read_local_68k\r
390\r
391m_read8_fake_ym2612:\r
392 ldr r3, =(Pico+0x22200)\r
393 ldrb r0, [r3, #8] @ Pico.m.rotate\r
394 add r1, r0, #1\r
395 strb r1, [r3, #8]\r
396 and r0, r0, #3\r
397 bx lr\r
398\r
399m_read8_misc3:\r
400 @ if everything else fails, use generic handler\r
401 stmfd sp!,{r0,lr}\r
402 bic r0, r0, #1\r
403 mov r1, #8\r
404 bl OtherRead16\r
405 ldmfd sp!,{r1,lr}\r
406 tst r1, #1\r
407 moveq r0, r0, lsr #8\r
408 bx lr\r
409\r
410\r
411m_read8_vdp:\r
412 tst r0, #0x70000\r
413 tsteq r0, #0x000e0\r
414 bxne lr @ invalid read\r
415 b PicoVideoRead8\r
416\r
417m_read8_ram:\r
418 ldr r1, =Pico\r
419 bic r0, r0, #0xff0000\r
420 eor r0, r0, #1\r
421 ldrb r0, [r1, r0]\r
422 bx lr\r
423\r
424m_read8_above_rom:\r
425 @ might still be SRam (Micro Machines, HardBall '95)\r
426 ldr r2, =(SRam)\r
427 ldr r3, =(Pico+0x22200)\r
428 ldr r1, [r2, #8] @ SRam.end\r
429 cmp r0, r1\r
430 bgt m_read8_ar_nosram\r
431 ldr r1, [r2, #4] @ SRam.start\r
432 cmp r0, r1\r
433 blt m_read8_ar_nosram\r
434 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
435 tst r1, #5\r
436 bne SRAMRead\r
437m_read8_ar_nosram:\r
438 ldr r2, =PicoRead16Hook\r
439 stmfd sp!,{r0,lr}\r
440 ldr r2, [r2]\r
441 bic r0, r0, #1\r
442 mov r1, #8\r
443 mov lr, pc\r
444 bx r2\r
445 ldmfd sp!,{r1,lr}\r
446 tst r1, #1\r
447 moveq r0, r0, lsr #8\r
448 bx lr\r
449\r
450.pool\r
451\r
452@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
453\r
454.macro m_read16_rom sect\r
455 ldr r1, =(Pico+0x22200)\r
456 bic r0, r0, #0xf80000\r
457 ldr r1, [r1]\r
458 bic r0, r0, #1\r
459.if \sect\r
460 orr r0, r0, #0x080000*\sect\r
461.endif\r
462 ldrh r0, [r1, r0]\r
463 bx lr\r
464.endm\r
465\r
466\r
467m_read16_rom0: @ 0x000000 - 0x07ffff\r
468 m_read16_rom 0\r
469\r
470m_read16_rom1: @ 0x080000 - 0x0fffff\r
471 m_read16_rom 1\r
472\r
473m_read16_rom2: @ 0x100000 - 0x17ffff\r
474 m_read16_rom 2\r
475\r
476m_read16_rom3: @ 0x180000 - 0x1fffff\r
477 m_read16_rom 3\r
478\r
479m_read16_rom4: @ 0x200000 - 0x27ffff, SRAM area (NBA Live 95)\r
480 ldr r2, =(SRam)\r
481 ldr r3, =(Pico+0x22200)\r
482 ldr r1, [r2, #8] @ SRam.end\r
483 bic r0, r0, #0xf80000\r
484 bic r0, r0, #1\r
485 orr r0, r0, #0x200000\r
486 cmp r0, r1\r
487 bgt m_read16_nosram\r
488 ldr r1, [r2, #4] @ SRam.start\r
489 cmp r0, r1\r
490 blt m_read16_nosram\r
491 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
492 tst r1, #5\r
493 beq m_read16_nosram\r
494 stmfd sp!,{lr}\r
495 bl SRAMRead16\r
496 ldmfd sp!,{pc}\r
497m_read16_nosram:\r
498 ldr r1, [r3, #4] @ romsize\r
499 cmp r0, r1\r
500 movgt r0, #0\r
501 bxgt lr @ bad location\r
502 ldr r1, [r3] @ 1ci\r
503 ldrh r0, [r1, r0]\r
504 bx lr\r
505\r
506m_read16_rom5: @ 0x280000 - 0x2fffff\r
507 m_read16_rom 5\r
508\r
509m_read16_rom6: @ 0x300000 - 0x37ffff\r
510 m_read16_rom 6\r
511\r
512m_read16_rom7: @ 0x380000 - 0x3fffff\r
513 m_read16_rom 7\r
514\r
515m_read16_rom8: @ 0x400000 - 0x47ffff\r
516 m_read16_rom 8\r
517\r
518m_read16_rom9: @ 0x480000 - 0x4fffff\r
519 m_read16_rom 9\r
520\r
521m_read16_romA: @ 0x500000 - 0x57ffff\r
522 m_read16_rom 0xA\r
523\r
524m_read16_romB: @ 0x580000 - 0x5fffff\r
525 m_read16_rom 0xB\r
526\r
527m_read16_romC: @ 0x600000 - 0x67ffff\r
528 m_read16_rom 0xC\r
529\r
530m_read16_romD: @ 0x680000 - 0x6fffff\r
531 m_read16_rom 0xD\r
532\r
533m_read16_romE: @ 0x700000 - 0x77ffff\r
534 m_read16_rom 0xE\r
535\r
536m_read16_romF: @ 0x780000 - 0x7fffff\r
537 m_read16_rom 0xF\r
538\r
539m_read16_rom10: @ 0x800000 - 0x87ffff\r
540 m_read16_rom 0x10\r
541\r
542m_read16_rom11: @ 0x880000 - 0x8fffff\r
543 m_read16_rom 0x11\r
544\r
545m_read16_rom12: @ 0x900000 - 0x97ffff\r
546 m_read16_rom 0x12\r
547\r
548m_read16_rom13: @ 0x980000 - 0x9fffff\r
549 m_read16_rom 0x13\r
550\r
551m_read16_misc:\r
552 bic r0, r0, #1\r
553 mov r1, #16\r
554 b OtherRead16\r
555\r
556m_read16_vdp:\r
557 tst r0, #0x70000 @ if ((a&0xe700e0)==0xc00000)\r
558 tsteq r0, #0x000e0\r
559 bxne lr @ invalid read\r
560 bic r0, r0, #1\r
561 b PicoVideoRead\r
562\r
563m_read16_ram:\r
564 ldr r1, =Pico\r
565 bic r0, r0, #0xff0000\r
566 bic r0, r0, #1\r
567 ldrh r0, [r1, r0]\r
568 bx lr\r
569\r
570m_read16_above_rom:\r
571 @ might still be SRam\r
572 ldr r2, =(SRam)\r
573 ldr r3, =(Pico+0x22200)\r
574 ldr r1, [r2, #8] @ SRam.end\r
575 bic r0, r0, #1\r
576 cmp r0, r1\r
577 bgt m_read16_ar_nosram\r
578 ldr r1, [r2, #4] @ SRam.start\r
579 cmp r0, r1\r
580 blt m_read16_ar_nosram\r
581 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
582 tst r1, #5\r
583 beq m_read16_ar_nosram\r
584 stmfd sp!,{lr}\r
585 bl SRAMRead16\r
586 ldmfd sp!,{pc}\r
587m_read16_ar_nosram:\r
588 ldr r2, =PicoRead16Hook\r
589 ldr r2, [r2]\r
590 mov r1, #16\r
591 bx r2\r
592\r
593.pool\r
594\r
595@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
596\r
597.macro m_read32_rom sect\r
598 ldr r1, =(Pico+0x22200)\r
599 bic r0, r0, #0xf80000\r
600 ldr r1, [r1]\r
601 bic r0, r0, #1\r
602.if \sect\r
603 orr r0, r0, #0x080000*\sect\r
604.endif\r
605 ldrh r0, [r1, r0]!\r
606 ldrh r1, [r1, #2] @ 1ci\r
607 orr r0, r1, r0, lsl #16\r
608 bx lr\r
609.endm\r
610\r
611\r
612m_read32_rom0: @ 0x000000 - 0x07ffff\r
613 m_read32_rom 0\r
614\r
615m_read32_rom1: @ 0x080000 - 0x0fffff\r
616 m_read32_rom 1\r
617\r
618m_read32_rom2: @ 0x100000 - 0x17ffff\r
619 m_read32_rom 2\r
620\r
621m_read32_rom3: @ 0x180000 - 0x1fffff\r
622 m_read32_rom 3\r
623\r
624m_read32_rom4: @ 0x200000 - 0x27ffff, SRAM area (does any game do long reads?)\r
625 ldr r2, =(SRam)\r
626 ldr r3, =(Pico+0x22200)\r
627 ldr r1, [r2, #8] @ SRam.end\r
628 bic r0, r0, #0xf80000\r
629 bic r0, r0, #1\r
630 orr r0, r0, #0x200000\r
631 cmp r0, r1\r
632 bgt m_read32_nosram\r
633 ldr r1, [r2, #4] @ SRam.start\r
634 cmp r0, r1\r
635 blt m_read32_nosram\r
636 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
637 tst r1, #5\r
638 beq m_read32_nosram\r
639 stmfd sp!,{r0,lr}\r
640 bl SRAMRead16\r
641 ldmfd sp!,{r1,lr}\r
642 stmfd sp!,{r0,lr}\r
643 add r0, r1, #2\r
644 bl SRAMRead16\r
645 ldmfd sp!,{r1,lr}\r
646 orr r0, r0, r1, lsl #16\r
647 bx lr\r
648m_read32_nosram:\r
649 ldr r1, [r3, #4] @ romsize\r
650 cmp r0, r1\r
651 movgt r0, #0\r
652 bxgt lr @ bad location\r
653 ldr r1, [r3] @ (1ci)\r
654 ldrh r0, [r1, r0]!\r
655 ldrh r1, [r1, #2] @ (2ci)\r
656 orr r0, r1, r0, lsl #16\r
657 bx lr\r
658\r
659m_read32_rom5: @ 0x280000 - 0x2fffff\r
660 m_read32_rom 5\r
661\r
662m_read32_rom6: @ 0x300000 - 0x37ffff\r
663 m_read32_rom 6\r
664\r
665m_read32_rom7: @ 0x380000 - 0x3fffff\r
666 m_read32_rom 7\r
667\r
668m_read32_rom8: @ 0x400000 - 0x47ffff\r
669 m_read32_rom 8\r
670\r
671m_read32_rom9: @ 0x480000 - 0x4fffff\r
672 m_read32_rom 9\r
673\r
674m_read32_romA: @ 0x500000 - 0x57ffff\r
675 m_read32_rom 0xA\r
676\r
677m_read32_romB: @ 0x580000 - 0x5fffff\r
678 m_read32_rom 0xB\r
679\r
680m_read32_romC: @ 0x600000 - 0x67ffff\r
681 m_read32_rom 0xC\r
682\r
683m_read32_romD: @ 0x680000 - 0x6fffff\r
684 m_read32_rom 0xD\r
685\r
686m_read32_romE: @ 0x700000 - 0x77ffff\r
687 m_read32_rom 0xE\r
688\r
689m_read32_romF: @ 0x780000 - 0x7fffff\r
690 m_read32_rom 0xF\r
691\r
692m_read32_rom10: @ 0x800000 - 0x87ffff\r
693 m_read32_rom 0x10\r
694\r
695m_read32_rom11: @ 0x880000 - 0x8fffff\r
696 m_read32_rom 0x11\r
697\r
698m_read32_rom12: @ 0x900000 - 0x97ffff\r
699 m_read32_rom 0x12\r
700\r
701m_read32_rom13: @ 0x980000 - 0x9fffff\r
702 m_read32_rom 0x13\r
703\r
704m_read32_misc:\r
705 bic r0, r0, #1\r
706 stmfd sp!,{r0,lr}\r
707 mov r1, #32\r
708 bl OtherRead16\r
709 mov r1, r0\r
710 ldmfd sp!,{r0}\r
711 stmfd sp!,{r1}\r
712 add r0, r0, #2\r
713 mov r1, #32\r
714 bl OtherRead16\r
715 ldmfd sp!,{r1,lr}\r
716 orr r0, r0, r1, lsl #16\r
717 bx lr\r
718\r
719m_read32_vdp:\r
720 tst r0, #0x70000\r
721 tsteq r0, #0x000e0\r
722 bxne lr @ invalid read\r
723 bic r0, r0, #1\r
724 add r1, r0, #2\r
725 stmfd sp!,{r1,lr}\r
726 bl PicoVideoRead\r
727 swp r0, r0, [sp]\r
728 bl PicoVideoRead\r
729 ldmfd sp!,{r1,lr}\r
730 orr r0, r0, r1, lsl #16\r
731 bx lr\r
732\r
733m_read32_ram:\r
734 ldr r1, =Pico\r
735 bic r0, r0, #0xff0000\r
736 bic r0, r0, #1\r
737 ldrh r0, [r1, r0]!\r
738 ldrh r1, [r1, #2] @ 2ci\r
739 orr r0, r1, r0, lsl #16\r
740 bx lr\r
741\r
742m_read32_above_rom:\r
743 ldr r2, =PicoRead16Hook\r
744 bic r0, r0, #1\r
745 ldr r2, [r2]\r
746 mov r1, #32\r
747 stmfd sp!,{r0,r2,lr}\r
748 mov lr, pc\r
749 bx r2\r
750 mov r1, r0\r
751 ldmfd sp!,{r0,r2}\r
752 stmfd sp!,{r1}\r
753 add r0, r0, #2\r
754 mov r1, #32\r
755 mov lr, pc\r
756 bx r2\r
757 ldmfd sp!,{r1,lr}\r
758 orr r0, r0, r1, lsl #16\r
759 bx lr\r
760\r
761.pool\r
762\r
763@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
764\r
765PicoWriteRomHW_SSF2: @ u32 a, u32 d\r
766 and r0, r0, #0xe\r
767 movs r0, r0, lsr #1\r
768 bne pwr_banking\r
769\r
770 @ sram register\r
771 ldr r2, =(Pico+0x22211) @ Pico.m.sram_reg\r
772 ldrb r0, [r2]\r
773 and r1, r1, #3\r
774 bic r0, r0, #3\r
775 orr r0, r0, r1\r
776 strb r0, [r2]\r
777 bx lr\r
778\r
779pwr_banking:\r
780 and r1, r1, #0x1f\r
781\r
782 ldr r3, =m_read8_def_table\r
783 ldr r2, =m_read8_table\r
784 ldr r12, [r3, r1, lsl #2]\r
785 str r12, [r2, r0, lsl #2]\r
786\r
787 ldr r3, =m_read16_def_table\r
788 ldr r2, =m_read16_table\r
789 ldr r12, [r3, r1, lsl #2]\r
790 str r12, [r2, r0, lsl #2]\r
791\r
792 ldr r3, =m_read32_def_table\r
793 ldr r2, =m_read32_table\r
794 ldr r12, [r3, r1, lsl #2]\r
795 str r12, [r2, r0, lsl #2]\r
796 \r
797 bx lr\r
798\r
799@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
800\r
801@ Here we only handle most often used locations,\r
802@ everything else is passed to generic handlers\r
803\r
804PicoWrite8: @ u32 a, u8 d\r
805 bic r0, r0, #0xff000000\r
806 and r2, r0, #0x00e00000\r
807 cmp r2, #0x00e00000 @ RAM?\r
808 ldr r3, =Pico\r
809 biceq r0, r0, #0x00ff0000\r
810 eoreq r0, r0, #1\r
811 streqb r1, [r3, r0]\r
812 bxeq lr\r
813\r
814m_m68k_write8_misc:\r
815 bic r2, r0, #0x1f @ most commonly we get i/o port write,\r
816 cmp r2, #0xa10000 @ so check for it first\r
817 bne m_write8_misc2\r
818m_write8_io:\r
819 ldr r2, =PicoOpt\r
820 and r0, r0, #0x1e\r
821 ldr r2, [r2]\r
822 ldr r3, =(Pico+0x22000) @ Pico.ioports\r
823 tst r2, #0x20 @ 6 button pad?\r
824 streqb r1, [r3, r0, lsr #1]\r
825 bxeq lr\r
826 cmp r0, #2\r
827 cmpne r0, #4\r
828 bne m_write8_io_done @ not likely to happen\r
829 add r2, r3, #0x200 @ Pico+0x22200\r
830 mov r12,#0\r
831 cmp r0, #2\r
832 streqb r12,[r2,#0x18]\r
833 strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0\r
834 tst r1, #0x40 @ TH\r
835 beq m_write8_io_done\r
836 ldrb r12,[r3, r0, lsr #1]\r
837 tst r12,#0x40\r
838 bne m_write8_io_done\r
839 cmp r0, #2\r
840 ldreqb r12,[r2,#0x0a]\r
841 ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase\r
842 add r12,r12,#1\r
843 streqb r12,[r2,#0x0a]\r
844 strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase\r
845m_write8_io_done:\r
846 strb r1, [r3, r0, lsr #1]\r
847 bx lr\r
848\r
849\r
850m_write8_misc2:\r
851 and r2, r0, #0xff0000\r
852 cmp r2, #0xa00000 @ z80 area?\r
853 bne m_write8_not_z80\r
854 tst r0, #0x4000\r
855 bne m_write8_z80_not_ram\r
856 ldr r3, =(Pico+0x20000) @ Pico.zram\r
857 add r2, r3, #0x02200 @ Pico+0x22200\r
858 ldrb r2, [r2, #9] @ Pico.m.z80Run\r
859 bic r0, r0, #0xff0000\r
860 bic r0, r0, #0x00e000\r
861 tst r2, #1\r
862 ldr r2, =SekCycleCnt\r
863 streqb r1, [r3, r0] @ zram\r
864 ldr r0, [r2]\r
865 add r0, r0, #2 @ hack?\r
866 str r0, [r2]\r
867 bx lr\r
868\r
869m_write8_z80_not_ram:\r
870 and r2, r0, #0x6000\r
871 cmp r2, #0x4000\r
872 bne m_write8_z80_not_ym2612\r
873 ldr r3, =PicoOpt\r
874 and r0, r0, #3\r
875 ldr r3, [r3]\r
876 mov r2, #0 @ is_from_z80 = 0\r
877 tst r3, #1\r
878 bxeq lr\r
879 stmfd sp!,{lr}\r
880 and r1, r1, #0xff\r
881 bl ym2612_write_local\r
882 ldr r2, =emustatus\r
883 ldmfd sp!,{lr}\r
884 ldr r1, [r2]\r
885 and r0, r0, #1\r
886 orr r1, r0, r1\r
887 str r1, [r2] @ emustatus|=ym2612_write_local(a&3, d);\r
888 bx lr\r
889\r
890m_write8_z80_not_ym2612: @ not too likely\r
891 mov r2, r0, lsl #17\r
892 bic r2, r2, #6<<17\r
893 mov r3, #0x7f00\r
894 orr r3, r3, #0x0011\r
895 cmp r3, r2, lsr #17 @ psg @ z80 area?\r
896 beq m_write8_psg\r
897 and r2, r0, #0x7f00\r
898 cmp r2, #0x6000 @ bank register?\r
899 bxne lr @ invalid write\r
900\r
901m_write8_z80_bank_reg:\r
902 ldr r3, =(Pico+0x22208) @ Pico.m\r
903 ldrh r2, [r3, #0x0a]\r
904 mov r1, r1, lsl #8\r
905 orr r2, r1, r2, lsr #1\r
906 bic r2, r2, #0xfe00\r
907 strh r2, [r3, #0x0a]\r
908 bx lr\r
909\r
910\r
911m_write8_not_z80:\r
912 and r2, r0, #0xe70000\r
913 cmp r2, #0xc00000 @ VDP area?\r
914 bne OtherWrite8 @ passthrough\r
915 and r2, r0, #0xf9\r
916 cmp r2, #0x11\r
917 bne OtherWrite8\r
918m_write8_psg:\r
919 ldr r2, =PicoOpt\r
920 and r0, r1, #0xff\r
921 ldr r2, [r2]\r
922 tst r2, #2\r
923 bxeq lr\r
924 b SN76496Write\r
925\r