based on hw tests busreq is affected by reset. Remove old hack too
[picodrive.git] / pico / memory_cmn.c
... / ...
CommitLineData
1// common code for Memory.c and cd/Memory.c
2// (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
3
4#ifndef UTYPES_DEFINED
5typedef unsigned char u8;
6typedef unsigned short u16;
7typedef unsigned int u32;
8#define UTYPES_DEFINED
9#endif
10
11
12#ifndef _ASM_MEMORY_C
13static
14#endif
15u8 z80Read8(u32 a)
16{
17 if(Pico.m.z80Run&1) return 0;
18
19 a&=0x1fff;
20
21 if (!(PicoOpt&POPT_EN_Z80))
22 {
23 // Z80 disabled, do some faking
24 static u8 zerosent = 0;
25 if(a == Pico.m.z80_lastaddr) { // probably polling something
26 u8 d = Pico.m.z80_fakeval;
27 if((d & 0xf) == 0xf && !zerosent) {
28 d = 0; zerosent = 1;
29 } else {
30 Pico.m.z80_fakeval++;
31 zerosent = 0;
32 }
33 return d;
34 } else {
35 Pico.m.z80_fakeval = 0;
36 }
37 }
38
39 Pico.m.z80_lastaddr = (u16) a;
40 return Pico.zram[a];
41}
42
43#ifndef _ASM_MEMORY_C
44static
45#endif
46u32 z80ReadBusReq(void)
47{
48 u32 d = (Pico.m.z80Run | Pico.m.z80_reset) & 1;
49 elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d|0x80, SekCyclesDone(), SekPc);
50 return d|0x80;
51}
52
53static void z80WriteBusReq(u32 d)
54{
55 d&=1; d^=1;
56 elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
57 if (d ^ Pico.m.z80Run)
58 {
59 if (d)
60 {
61 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
62 }
63 else
64 {
65 z80stopCycle = SekCyclesDone();
66 if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)
67 PicoSyncZ80(z80stopCycle);
68 }
69 Pico.m.z80Run=d;
70 }
71}
72
73static void z80WriteReset(u32 d)
74{
75 d&=1; d^=1;
76 elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
77 if (d ^ Pico.m.z80_reset)
78 {
79 if (d)
80 {
81 if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
82 PicoSyncZ80(SekCyclesDone());
83 }
84 else
85 {
86 z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
87 z80_reset();
88 }
89 YM2612ResetChip();
90 timers_reset();
91 Pico.m.z80_reset=d;
92 }
93}
94
95#ifndef _ASM_MEMORY_C
96static
97#endif
98u32 OtherRead16(u32 a, int realsize)
99{
100 u32 d=0;
101
102 if ((a&0xffffe0)==0xa10000) { // I/O ports
103 a=(a>>1)&0xf;
104 switch(a) {
105 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
106 case 1: d=PadRead(0); break;
107 case 2: d=PadRead(1); break;
108 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
109 }
110 d|=d<<8;
111 goto end;
112 }
113
114 // rotate fakes next fetched instruction for Time Killers
115 if (a==0xa11100) { // z80 busreq
116 d=(z80ReadBusReq()<<8)|Pico.m.rotate++;
117 goto end;
118 }
119
120 if ((a&0xff0000)==0xa00000)
121 {
122 if (Pico.m.z80Run&1)
123 elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
124 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
125 if ((a&0x6000)==0x4000) { d=ym2612_read_local_68k(); goto end; } // 0x4000-0x5fff
126
127 elprintf(EL_ANOMALY, "68k bad read [%06x]", a);
128 d=0xffff;
129 goto end;
130 }
131
132 d = PicoRead16Hook(a, realsize);
133
134end:
135 return d;
136}
137
138static void IoWrite8(u32 a, u32 d)
139{
140 a=(a>>1)&0xf;
141 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
142 if (PicoOpt&POPT_6BTN_PAD)
143 {
144 if (a==1) {
145 Pico.m.padDelay[0] = 0;
146 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
147 }
148 else if (a==2) {
149 Pico.m.padDelay[1] = 0;
150 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
151 }
152 }
153 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
154}
155
156#ifndef _ASM_CD_MEMORY_C
157static
158#endif
159void OtherWrite8(u32 a,u32 d)
160{
161#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
162 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
163 if ((a&0xff4000)==0xa00000) { // z80 RAM
164 SekCyclesBurn(2); // hack
165 if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)d;
166 else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
167 return;
168 }
169 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
170 if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
171#endif
172 if (a==0xa11100) { z80WriteBusReq(d); return; }
173 if (a==0xa11200) { z80WriteReset(d); return; }
174
175#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
176 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
177 {
178 Pico.m.z80_bank68k>>=1;
179 Pico.m.z80_bank68k|=(d&1)<<8;
180 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
181 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
182 return;
183 }
184#endif
185 if ((a&0xe700e0)==0xc00000) {
186 d&=0xff;
187 PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
188 return;
189 }
190
191 PicoWrite8Hook(a, d&0xff, 8);
192}
193
194
195#ifndef _ASM_CD_MEMORY_C
196static
197#endif
198void OtherWrite16(u32 a,u32 d)
199{
200 if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
201 if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
202 if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
203 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
204 if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
205 if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)(d>>8);
206 else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %04x @ %06x", a, d&0xffff, SekPc);
207 return;
208 }
209 if (a==0xa11200) { z80WriteReset(d>>8); return; }
210
211 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
212 {
213 Pico.m.z80_bank68k>>=1;
214 Pico.m.z80_bank68k|=(d&1)<<8;
215 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
216 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
217 return;
218 }
219
220#ifndef _CD_MEMORY_C
221 if (a >= SRam.start && a <= SRam.end) {
222 elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc);
223 if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled
224 u8 *pm=(u8 *)(SRam.data-SRam.start+a);
225 *pm++=d>>8;
226 *pm++=d;
227 SRam.changed = 1;
228 }
229 else
230 SRAMWrite(a, d);
231 return;
232 }
233#endif
234
235 PicoWrite16Hook(a, d&0xffff, 16);
236}
237