| 1 | // PicoDrive\r |
| 2 | \r |
| 3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
| 4 | // (c) Copyright 2006-2008 notaz, All rights reserved.\r |
| 5 | // Free for non-commercial use.\r |
| 6 | \r |
| 7 | // For commercial use, separate licencing terms must be obtained.\r |
| 8 | \r |
| 9 | \r |
| 10 | #include "pico_int.h"\r |
| 11 | #include "sound/ym2612.h"\r |
| 12 | \r |
| 13 | int PicoVer=0x0133;\r |
| 14 | struct Pico Pico;\r |
| 15 | int PicoOpt = 0;\r |
| 16 | int PicoSkipFrame = 0; // skip rendering frame?\r |
| 17 | int emustatus = 0; // rapid_ym2612, multi_ym_updates\r |
| 18 | int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r |
| 19 | int PicoPadInt[2]; // internal copy\r |
| 20 | int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r |
| 21 | int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r |
| 22 | int PicoAutoRgnOrder = 0;\r |
| 23 | struct PicoSRAM SRam = {0,};\r |
| 24 | \r |
| 25 | void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r |
| 26 | void (*PicoResetHook)(void) = NULL;\r |
| 27 | void (*PicoLineHook)(void) = NULL;\r |
| 28 | \r |
| 29 | // to be called once on emu init\r |
| 30 | void PicoInit(void)\r |
| 31 | {\r |
| 32 | // Blank space for state:\r |
| 33 | memset(&Pico,0,sizeof(Pico));\r |
| 34 | memset(&PicoPad,0,sizeof(PicoPad));\r |
| 35 | memset(&PicoPadInt,0,sizeof(PicoPadInt));\r |
| 36 | \r |
| 37 | // Init CPUs:\r |
| 38 | SekInit();\r |
| 39 | z80_init(); // init even if we aren't going to use it\r |
| 40 | \r |
| 41 | PicoInitMCD();\r |
| 42 | PicoSVPInit();\r |
| 43 | \r |
| 44 | SRam.data=0;\r |
| 45 | }\r |
| 46 | \r |
| 47 | // to be called once on emu exit\r |
| 48 | void PicoExit(void)\r |
| 49 | {\r |
| 50 | if (PicoAHW & PAHW_MCD)\r |
| 51 | PicoExitMCD();\r |
| 52 | PicoCartUnload();\r |
| 53 | z80_exit();\r |
| 54 | \r |
| 55 | if (SRam.data) free(SRam.data); SRam.data=0;\r |
| 56 | }\r |
| 57 | \r |
| 58 | void PicoPower(void)\r |
| 59 | {\r |
| 60 | unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r |
| 61 | \r |
| 62 | Pico.m.frame_count = 0;\r |
| 63 | \r |
| 64 | // clear all memory of the emulated machine\r |
| 65 | memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r |
| 66 | \r |
| 67 | memset(&Pico.video,0,sizeof(Pico.video));\r |
| 68 | memset(&Pico.m,0,sizeof(Pico.m));\r |
| 69 | \r |
| 70 | Pico.video.pending_ints=0;\r |
| 71 | z80_reset();\r |
| 72 | \r |
| 73 | // default VDP register values (based on Fusion)\r |
| 74 | Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r |
| 75 | Pico.video.reg[0xc] = 0x81;\r |
| 76 | Pico.video.reg[0xf] = 0x02;\r |
| 77 | \r |
| 78 | if (PicoAHW & PAHW_MCD)\r |
| 79 | PicoPowerMCD();\r |
| 80 | \r |
| 81 | Pico.m.sram_reg=sram_reg;\r |
| 82 | PicoReset();\r |
| 83 | }\r |
| 84 | \r |
| 85 | PICO_INTERNAL void PicoDetectRegion(void)\r |
| 86 | {\r |
| 87 | int support=0, hw=0, i;\r |
| 88 | unsigned char pal=0;\r |
| 89 | \r |
| 90 | if (PicoRegionOverride)\r |
| 91 | {\r |
| 92 | support = PicoRegionOverride;\r |
| 93 | }\r |
| 94 | else\r |
| 95 | {\r |
| 96 | // Read cartridge region data:\r |
| 97 | int region=PicoRead32(0x1f0);\r |
| 98 | \r |
| 99 | for (i=0;i<4;i++)\r |
| 100 | {\r |
| 101 | int c=0;\r |
| 102 | \r |
| 103 | c=region>>(i<<3); c&=0xff;\r |
| 104 | if (c<=' ') continue;\r |
| 105 | \r |
| 106 | if (c=='J') support|=1;\r |
| 107 | else if (c=='U') support|=4;\r |
| 108 | else if (c=='E') support|=8;\r |
| 109 | else if (c=='j') {support|=1; break; }\r |
| 110 | else if (c=='u') {support|=4; break; }\r |
| 111 | else if (c=='e') {support|=8; break; }\r |
| 112 | else\r |
| 113 | {\r |
| 114 | // New style code:\r |
| 115 | char s[2]={0,0};\r |
| 116 | s[0]=(char)c;\r |
| 117 | support|=strtol(s,NULL,16);\r |
| 118 | }\r |
| 119 | }\r |
| 120 | }\r |
| 121 | \r |
| 122 | // auto detection order override\r |
| 123 | if (PicoAutoRgnOrder) {\r |
| 124 | if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r |
| 125 | else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r |
| 126 | else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r |
| 127 | }\r |
| 128 | \r |
| 129 | // Try to pick the best hardware value for English/50hz:\r |
| 130 | if (support&8) { hw=0xc0; pal=1; } // Europe\r |
| 131 | else if (support&4) hw=0x80; // USA\r |
| 132 | else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r |
| 133 | else if (support&1) hw=0x00; // Japan NTSC\r |
| 134 | else hw=0x80; // USA\r |
| 135 | \r |
| 136 | Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r |
| 137 | Pico.m.pal=pal;\r |
| 138 | }\r |
| 139 | \r |
| 140 | int PicoReset(void)\r |
| 141 | {\r |
| 142 | unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r |
| 143 | \r |
| 144 | if (Pico.romsize<=0) return 1;\r |
| 145 | \r |
| 146 | /* must call now, so that banking is reset, and correct vectors get fetched */\r |
| 147 | if (PicoResetHook) PicoResetHook();\r |
| 148 | \r |
| 149 | PicoMemReset();\r |
| 150 | SekReset();\r |
| 151 | memset(&PicoPadInt,0,sizeof(PicoPadInt));\r |
| 152 | // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r |
| 153 | SekSetRealTAS(PicoAHW & PAHW_MCD);\r |
| 154 | SekCycleCntT=0;\r |
| 155 | \r |
| 156 | if (PicoAHW & PAHW_MCD)\r |
| 157 | // needed for MCD to reset properly, probably some bug hides behind this..\r |
| 158 | memset(Pico.ioports,0,sizeof(Pico.ioports));\r |
| 159 | emustatus = 0;\r |
| 160 | \r |
| 161 | Pico.m.dirtyPal = 1;\r |
| 162 | \r |
| 163 | Pico.m.z80_bank68k = 0;\r |
| 164 | memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r |
| 165 | \r |
| 166 | PicoDetectRegion();\r |
| 167 | Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r |
| 168 | \r |
| 169 | PsndReset(); // pal must be known here\r |
| 170 | \r |
| 171 | // create an empty "dma" to cause 68k exec start at random frame location\r |
| 172 | if (Pico.m.dma_xfers == 0 && !(PicoOpt&POPT_DIS_VDP_FIFO))\r |
| 173 | Pico.m.dma_xfers = rand() & 0x1fff;\r |
| 174 | \r |
| 175 | SekFinishIdleDet();\r |
| 176 | \r |
| 177 | if (PicoAHW & PAHW_MCD) {\r |
| 178 | PicoResetMCD();\r |
| 179 | return 0;\r |
| 180 | }\r |
| 181 | \r |
| 182 | // reinit, so that checksum checks pass\r |
| 183 | if (!(PicoOpt & POPT_DIS_IDLE_DET))\r |
| 184 | SekInitIdleDet();\r |
| 185 | \r |
| 186 | // reset sram state; enable sram access by default if it doesn't overlap with ROM\r |
| 187 | Pico.m.sram_reg=sram_reg&0x14;\r |
| 188 | if (!(Pico.m.sram_reg&4) && Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;\r |
| 189 | \r |
| 190 | elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r |
| 191 | (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);\r |
| 192 | \r |
| 193 | return 0;\r |
| 194 | }\r |
| 195 | \r |
| 196 | \r |
| 197 | // dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r |
| 198 | // same for Outrunners (92-121, when active is set to 24)\r |
| 199 | // 96 is VR hack\r |
| 200 | static const int dma_timings[] = {\r |
| 201 | 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r |
| 202 | 102, 205, 204, 102, // vblank: 40cell:\r |
| 203 | 16, 16, 15, 8, // active: 32cell:\r |
| 204 | 24, 18, 17, 9 // ...\r |
| 205 | };\r |
| 206 | \r |
| 207 | static const int dma_bsycles[] = {\r |
| 208 | (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r |
| 209 | (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r |
| 210 | (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r |
| 211 | (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r |
| 212 | };\r |
| 213 | \r |
| 214 | PICO_INTERNAL int CheckDMA(void)\r |
| 215 | {\r |
| 216 | int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r |
| 217 | int xfers = Pico.m.dma_xfers;\r |
| 218 | int dma_op1;\r |
| 219 | \r |
| 220 | if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r |
| 221 | dma_op1 = dma_op;\r |
| 222 | if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r |
| 223 | if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r |
| 224 | xfers_can = dma_timings[dma_op];\r |
| 225 | if(xfers <= xfers_can)\r |
| 226 | {\r |
| 227 | if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r |
| 228 | else {\r |
| 229 | burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r |
| 230 | }\r |
| 231 | Pico.m.dma_xfers = 0;\r |
| 232 | } else {\r |
| 233 | if(!(dma_op&2)) burn = 488;\r |
| 234 | Pico.m.dma_xfers -= xfers_can;\r |
| 235 | }\r |
| 236 | \r |
| 237 | elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r |
| 238 | //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r |
| 239 | return burn;\r |
| 240 | }\r |
| 241 | \r |
| 242 | static __inline void SekRunM68k(int cyc)\r |
| 243 | {\r |
| 244 | int cyc_do;\r |
| 245 | SekCycleAim+=cyc;\r |
| 246 | if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r |
| 247 | #if defined(EMU_CORE_DEBUG)\r |
| 248 | // this means we do run-compare\r |
| 249 | SekCycleCnt+=CM_compareRun(cyc_do, 0);\r |
| 250 | #elif defined(EMU_C68K)\r |
| 251 | PicoCpuCM68k.cycles=cyc_do;\r |
| 252 | CycloneRun(&PicoCpuCM68k);\r |
| 253 | SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r |
| 254 | #elif defined(EMU_M68K)\r |
| 255 | SekCycleCnt+=m68k_execute(cyc_do);\r |
| 256 | #elif defined(EMU_F68K)\r |
| 257 | SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r |
| 258 | #endif\r |
| 259 | }\r |
| 260 | \r |
| 261 | #include "pico_cmn.c"\r |
| 262 | \r |
| 263 | int z80stopCycle;\r |
| 264 | int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r |
| 265 | int z80_cycle_aim;\r |
| 266 | int z80_scanline;\r |
| 267 | int z80_scanline_cycles; /* cycles done until z80_scanline */\r |
| 268 | \r |
| 269 | /* sync z80 to 68k */\r |
| 270 | PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r |
| 271 | {\r |
| 272 | int cnt;\r |
| 273 | z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r |
| 274 | cnt = z80_cycle_aim - z80_cycle_cnt;\r |
| 275 | \r |
| 276 | elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r |
| 277 | z80_cycle_aim, z80_cycle_aim / 228);\r |
| 278 | \r |
| 279 | if (cnt > 0)\r |
| 280 | z80_cycle_cnt += z80_run(cnt);\r |
| 281 | }\r |
| 282 | \r |
| 283 | \r |
| 284 | void PicoFrame(void)\r |
| 285 | {\r |
| 286 | Pico.m.frame_count++;\r |
| 287 | \r |
| 288 | if (PicoAHW & PAHW_MCD) {\r |
| 289 | PicoFrameMCD();\r |
| 290 | return;\r |
| 291 | }\r |
| 292 | \r |
| 293 | //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r |
| 294 | \r |
| 295 | if (!(PicoOpt&POPT_ALT_RENDERER))\r |
| 296 | PicoFrameStart();\r |
| 297 | \r |
| 298 | PicoFrameHints();\r |
| 299 | }\r |
| 300 | \r |
| 301 | void PicoFrameDrawOnly(void)\r |
| 302 | {\r |
| 303 | PicoFrameStart();\r |
| 304 | PicoDrawSync(223, 0);\r |
| 305 | }\r |
| 306 | \r |
| 307 | void PicoGetInternal(pint_t which, pint_ret_t *r)\r |
| 308 | {\r |
| 309 | switch (which)\r |
| 310 | {\r |
| 311 | case PI_ROM: r->vptr = Pico.rom; break;\r |
| 312 | case PI_ISPAL: r->vint = Pico.m.pal; break;\r |
| 313 | case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r |
| 314 | case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r |
| 315 | }\r |
| 316 | }\r |
| 317 | \r |
| 318 | // callback to output message from emu\r |
| 319 | void (*PicoMessage)(const char *msg)=NULL;\r |
| 320 | \r |