drc: support ms ABI

[picodrive.git] / pico / pico.c

/*\r
 * PicoDrive\r
 * (c) Copyright Dave, 2004\r
 * (C) notaz, 2006-2010\r
 *\r
 * This work is licensed under the terms of MAME license.\r
 * See COPYING file in the top-level directory.\r
 */\r
\r
#include "pico_int.h"\r
#include "sound/ym2612.h"\r
\r
struct Pico Pico;\r
struct PicoMem PicoMem;\r
PicoInterface PicoIn;\r
\r
void (*PicoResetHook)(void) = NULL;\r
void (*PicoLineHook)(void) = NULL;\r
\r
// to be called once on emu init\r
void PicoInit(void)\r
{\r
  // Blank space for state:\r
  memset(&Pico,0,sizeof(Pico));\r
  memset(&PicoMem,0,sizeof(PicoMem));\r
  memset(&PicoIn.pad,0,sizeof(PicoIn.pad));\r
  memset(&PicoIn.padInt,0,sizeof(PicoIn.padInt));\r
\r
  Pico.est.Pico = &Pico;\r
  Pico.est.PicoMem_vram = PicoMem.vram;\r
  Pico.est.PicoMem_cram = PicoMem.cram;\r
  Pico.est.PicoOpt = &PicoIn.opt;\r
\r
  // Init CPUs:\r
  SekInit();\r
  z80_init(); // init even if we aren't going to use it\r
\r
  PicoInitMCD();\r
  PicoSVPInit();\r
  Pico32xInit();\r
\r
  PicoDrawInit();\r
  PicoDraw2Init();\r
}\r
\r
// to be called once on emu exit\r
void PicoExit(void)\r
{\r
  if (PicoIn.AHW & PAHW_MCD)\r
    PicoExitMCD();\r
  PicoCartUnload();\r
  z80_exit();\r
\r
  free(Pico.sv.data);\r
  Pico.sv.data = NULL;\r
  Pico.sv.start = Pico.sv.end = 0;\r
  pevt_dump();\r
}\r
\r
void PicoPower(void)\r
{\r
  Pico.m.frame_count = 0;\r
  Pico.t.m68c_cnt = Pico.t.m68c_aim = 0;\r
\r
  // clear all memory of the emulated machine\r
  memset(&PicoMem,0,sizeof(PicoMem));\r
\r
  memset(&Pico.video,0,sizeof(Pico.video));\r
  memset(&Pico.m,0,sizeof(Pico.m));\r
\r
  Pico.video.pending_ints=0;\r
  z80_reset();\r
\r
  // my MD1 VA6 console has this in IO\r
  PicoMem.ioports[1] = PicoMem.ioports[2] = PicoMem.ioports[3] = 0xff;\r
\r
  // default VDP register values (based on Fusion)\r
  Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
  Pico.video.reg[0xc] = 0x81;\r
  Pico.video.reg[0xf] = 0x02;\r
\r
  if (PicoIn.AHW & PAHW_MCD)\r
    PicoPowerMCD();\r
\r
  if (PicoIn.opt & POPT_EN_32X)\r
    PicoPower32x();\r
\r
  PicoReset();\r
}\r
\r
PICO_INTERNAL void PicoDetectRegion(void)\r
{\r
  int support=0, hw=0, i;\r
  unsigned char pal=0;\r
\r
  if (PicoIn.regionOverride)\r
  {\r
    support = PicoIn.regionOverride;\r
  }\r
  else\r
  {\r
    // Read cartridge region data:\r
    unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
    int region = (rd[0] << 16) | rd[1];\r
\r
    for (i = 0; i < 4; i++)\r
    {\r
      int c;\r
\r
      c = region >> (i<<3);\r
      c &= 0xff;\r
      if (c <= ' ') continue;\r
\r
           if (c=='J')  support|=1;\r
      else if (c=='U')  support|=4;\r
      else if (c=='E')  support|=8;\r
      else if (c=='j') {support|=1; break; }\r
      else if (c=='u') {support|=4; break; }\r
      else if (c=='e') {support|=8; break; }\r
      else\r
      {\r
        // New style code:\r
        char s[2]={0,0};\r
        s[0]=(char)c;\r
        support|=strtol(s,NULL,16);\r
      }\r
    }\r
  }\r
\r
  // auto detection order override\r
  if (PicoIn.autoRgnOrder) {\r
         if (((PicoIn.autoRgnOrder>>0)&0xf) & support) support = (PicoIn.autoRgnOrder>>0)&0xf;\r
    else if (((PicoIn.autoRgnOrder>>4)&0xf) & support) support = (PicoIn.autoRgnOrder>>4)&0xf;\r
    else if (((PicoIn.autoRgnOrder>>8)&0xf) & support) support = (PicoIn.autoRgnOrder>>8)&0xf;\r
  }\r
\r
  // Try to pick the best hardware value for English/50hz:\r
       if (support&8) { hw=0xc0; pal=1; } // Europe\r
  else if (support&4)   hw=0x80;          // USA\r
  else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
  else if (support&1)   hw=0x00;          // Japan NTSC\r
  else hw=0x80; // USA\r
\r
  Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
  Pico.m.pal=pal;\r
}\r
\r
int PicoReset(void)\r
{\r
  if (Pico.romsize <= 0)\r
    return 1;\r
\r
#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r
  PicoIn.opt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
#endif\r
\r
  /* must call now, so that banking is reset, and correct vectors get fetched */\r
  if (PicoResetHook)\r
    PicoResetHook();\r
\r
  memset(&PicoIn.padInt, 0, sizeof(PicoIn.padInt));\r
\r
  if (PicoIn.AHW & PAHW_SMS) {\r
    PicoResetMS();\r
    return 0;\r
  }\r
\r
  SekReset();\r
  // ..but do not reset SekCycle* to not desync with addons\r
\r
  // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
  SekSetRealTAS(PicoIn.AHW & PAHW_MCD);\r
\r
  Pico.m.dirtyPal = 1;\r
\r
  Pico.m.z80_bank68k = 0;\r
  Pico.m.z80_reset = 1;\r
\r
  PicoDetectRegion();\r
  Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
\r
  PsndReset(); // pal must be known here\r
\r
  // create an empty "dma" to cause 68k exec start at random frame location\r
  if (Pico.m.dma_xfers == 0 && !(PicoIn.opt & POPT_DIS_VDP_FIFO))\r
    Pico.m.dma_xfers = rand() & 0x1fff;\r
\r
  SekFinishIdleDet();\r
\r
  if (PicoIn.AHW & PAHW_MCD) {\r
    PicoResetMCD();\r
    return 0;\r
  }\r
\r
  // reinit, so that checksum checks pass\r
  if (!(PicoIn.opt & POPT_DIS_IDLE_DET))\r
    SekInitIdleDet();\r
\r
  if (PicoIn.opt & POPT_EN_32X)\r
    PicoReset32x();\r
\r
  // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
  Pico.m.sram_reg = 0;\r
  if ((Pico.sv.flags & SRF_EEPROM) || Pico.romsize <= Pico.sv.start)\r
    Pico.m.sram_reg |= SRR_MAPPED;\r
\r
  if (Pico.sv.flags & SRF_ENABLED)\r
    elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", Pico.sv.start, Pico.sv.end,\r
      !!(Pico.sv.flags & SRF_EEPROM));\r
\r
  return 0;\r
}\r
\r
// flush config changes before emu loop starts\r
void PicoLoopPrepare(void)\r
{\r
  if (PicoIn.regionOverride)\r
    // force setting possibly changed..\r
    Pico.m.pal = (PicoIn.regionOverride == 2 || PicoIn.regionOverride == 8) ? 1 : 0;\r
\r
  Pico.m.dirtyPal = 1;\r
  rendstatus_old = -1;\r
}\r
\r
// this table is wrong and should be removed\r
// keeping it for now to compensate wrong timing elswhere, mainly for Outrunners\r
static const int dma_timings[] = {\r
   83, 166,  83,  83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
  102, 204, 102, 102, // vblank: 40cell:\r
    8,  16,   8,   8, // active: 32cell:\r
   17,  18,   9,   9  // ...\r
};\r
\r
static const int dma_bsycles[] = {\r
  (488<<8)/83,  (488<<8)/166, (488<<8)/83,  (488<<8)/83,\r
  (488<<8)/102, (488<<8)/204, (488<<8)/102, (488<<8)/102,\r
  (488<<8)/8,   (488<<8)/16,  (488<<8)/8,   (488<<8)/8,\r
  (488<<8)/9,   (488<<8)/18,  (488<<8)/9,   (488<<8)/9\r
};\r
\r
// grossly inaccurate.. FIXME FIXXXMEE\r
PICO_INTERNAL int CheckDMA(void)\r
{\r
  int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
  int xfers = Pico.m.dma_xfers;\r
  int dma_op1;\r
\r
  if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
  dma_op1 = dma_op;\r
  if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
  if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
  xfers_can = dma_timings[dma_op];\r
  if(xfers <= xfers_can)\r
  {\r
    Pico.video.status &= ~SR_DMA;\r
    if (!(dma_op & 2))\r
      burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
    Pico.m.dma_xfers = 0;\r
  } else {\r
    if(!(dma_op&2)) burn = 488;\r
    Pico.m.dma_xfers -= xfers_can;\r
  }\r
\r
  elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%u]",\r
    Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
  //dprintf("~aim: %i, cnt: %i", Pico.t.m68c_aim, Pico.t.m68c_cnt);\r
  return burn;\r
}\r
\r
#include "pico_cmn.c"\r
\r
/* sync z80 to 68k */\r
PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
{\r
  int m68k_cnt;\r
  int cnt;\r
\r
  m68k_cnt = m68k_cycles_done - Pico.t.m68c_frame_start;\r
  Pico.t.z80c_aim = cycles_68k_to_z80(m68k_cnt);\r
  cnt = Pico.t.z80c_aim - Pico.t.z80c_cnt;\r
\r
  pprof_start(z80);\r
\r
  elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r
    Pico.t.z80c_cnt, Pico.t.z80c_cnt * 15 / 7 / 488,\r
    Pico.t.z80c_aim, Pico.t.z80c_aim * 15 / 7 / 488);\r
\r
  if (cnt > 0)\r
    Pico.t.z80c_cnt += z80_run(cnt);\r
\r
  pprof_end(z80);\r
}\r
\r
\r
void PicoFrame(void)\r
{\r
  pprof_start(frame);\r
\r
  Pico.m.frame_count++;\r
\r
  if (PicoIn.AHW & PAHW_SMS) {\r
    PicoFrameMS();\r
    goto end;\r
  }\r
\r
  if (PicoIn.AHW & PAHW_32X) {\r
    PicoFrame32x(); // also does MCD+32X\r
    goto end;\r
  }\r
\r
  if (PicoIn.AHW & PAHW_MCD) {\r
    PicoFrameMCD();\r
    goto end;\r
  }\r
\r
  //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
\r
  PicoFrameStart();\r
  PicoFrameHints();\r
\r
end:\r
  pprof_end(frame);\r
}\r
\r
void PicoFrameDrawOnly(void)\r
{\r
  if (!(PicoIn.AHW & PAHW_SMS)) {\r
    PicoFrameStart();\r
    PicoDrawSync(223, 0);\r
  } else {\r
    PicoFrameDrawOnlyMS();\r
  }\r
}\r
\r
void PicoGetInternal(pint_t which, pint_ret_t *r)\r
{\r
  switch (which)\r
  {\r
    case PI_ROM:         r->vptr = Pico.rom; break;\r
    case PI_ISPAL:       r->vint = Pico.m.pal; break;\r
    case PI_IS40_CELL:   r->vint = Pico.video.reg[12]&1; break;\r
    case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
  }\r
}\r
\r
// vim:ts=2:sw=2:expandtab\r