protection and more mapper support for new mem code
[picodrive.git] / pico / pico.c
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CommitLineData
1// PicoDrive\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006-2008 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include "pico_int.h"\r
11#include "sound/ym2612.h"\r
12\r
13int PicoVer=0x0133;\r
14struct Pico Pico;\r
15int PicoOpt = 0;\r
16int PicoSkipFrame = 0; // skip rendering frame?\r
17int emustatus = 0; // rapid_ym2612, multi_ym_updates\r
18int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
19int PicoPadInt[2]; // internal copy\r
20int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r
21int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
22int PicoAutoRgnOrder = 0;\r
23struct PicoSRAM SRam = {0,};\r
24\r
25void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
26void (*PicoResetHook)(void) = NULL;\r
27void (*PicoLineHook)(void) = NULL;\r
28\r
29// to be called once on emu init\r
30void PicoInit(void)\r
31{\r
32 // Blank space for state:\r
33 memset(&Pico,0,sizeof(Pico));\r
34 memset(&PicoPad,0,sizeof(PicoPad));\r
35 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
36\r
37 // Init CPUs:\r
38 SekInit();\r
39 z80_init(); // init even if we aren't going to use it\r
40\r
41 PicoInitMCD();\r
42 PicoSVPInit();\r
43}\r
44\r
45// to be called once on emu exit\r
46void PicoExit(void)\r
47{\r
48 if (PicoAHW & PAHW_MCD)\r
49 PicoExitMCD();\r
50 PicoCartUnload();\r
51 z80_exit();\r
52\r
53 if (SRam.data)\r
54 free(SRam.data);\r
55}\r
56\r
57void PicoPower(void)\r
58{\r
59 Pico.m.frame_count = 0;\r
60\r
61 // clear all memory of the emulated machine\r
62 memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r
63\r
64 memset(&Pico.video,0,sizeof(Pico.video));\r
65 memset(&Pico.m,0,sizeof(Pico.m));\r
66\r
67 Pico.video.pending_ints=0;\r
68 z80_reset();\r
69\r
70 // default VDP register values (based on Fusion)\r
71 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
72 Pico.video.reg[0xc] = 0x81;\r
73 Pico.video.reg[0xf] = 0x02;\r
74\r
75 if (PicoAHW & PAHW_MCD)\r
76 PicoPowerMCD();\r
77\r
78 PicoReset();\r
79}\r
80\r
81PICO_INTERNAL void PicoDetectRegion(void)\r
82{\r
83 int support=0, hw=0, i;\r
84 unsigned char pal=0;\r
85\r
86 if (PicoRegionOverride)\r
87 {\r
88 support = PicoRegionOverride;\r
89 }\r
90 else\r
91 {\r
92 // Read cartridge region data:\r
93 unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
94 int region = (rd[0] << 16) | rd[1];\r
95\r
96 for (i = 0; i < 4; i++)\r
97 {\r
98 int c;\r
99\r
100 c = region >> (i<<3);\r
101 c &= 0xff;\r
102 if (c <= ' ') continue;\r
103\r
104 if (c=='J') support|=1;\r
105 else if (c=='U') support|=4;\r
106 else if (c=='E') support|=8;\r
107 else if (c=='j') {support|=1; break; }\r
108 else if (c=='u') {support|=4; break; }\r
109 else if (c=='e') {support|=8; break; }\r
110 else\r
111 {\r
112 // New style code:\r
113 char s[2]={0,0};\r
114 s[0]=(char)c;\r
115 support|=strtol(s,NULL,16);\r
116 }\r
117 }\r
118 }\r
119\r
120 // auto detection order override\r
121 if (PicoAutoRgnOrder) {\r
122 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;\r
123 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;\r
124 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;\r
125 }\r
126\r
127 // Try to pick the best hardware value for English/50hz:\r
128 if (support&8) { hw=0xc0; pal=1; } // Europe\r
129 else if (support&4) hw=0x80; // USA\r
130 else if (support&2) { hw=0x40; pal=1; } // Japan PAL\r
131 else if (support&1) hw=0x00; // Japan NTSC\r
132 else hw=0x80; // USA\r
133\r
134 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
135 Pico.m.pal=pal;\r
136}\r
137\r
138int PicoReset(void)\r
139{\r
140 if (Pico.romsize <= 0)\r
141 return 1;\r
142\r
143 /* must call now, so that banking is reset, and correct vectors get fetched */\r
144 if (PicoResetHook)\r
145 PicoResetHook();\r
146\r
147 memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
148 emustatus = 0;\r
149\r
150 if (PicoAHW & PAHW_SMS) {\r
151 PicoResetMS();\r
152 return 0;\r
153 }\r
154\r
155 SekReset();\r
156 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
157 SekSetRealTAS(PicoAHW & PAHW_MCD);\r
158 SekCycleCntT=0;\r
159\r
160 if (PicoAHW & PAHW_MCD)\r
161 // needed for MCD to reset properly, probably some bug hides behind this..\r
162 memset(Pico.ioports,0,sizeof(Pico.ioports));\r
163\r
164 Pico.m.dirtyPal = 1;\r
165\r
166 Pico.m.z80_bank68k = 0;\r
167 Pico.m.z80_reset = 1;\r
168 memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
169\r
170 PicoDetectRegion();\r
171 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
172\r
173 PsndReset(); // pal must be known here\r
174\r
175 // create an empty "dma" to cause 68k exec start at random frame location\r
176 if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
177 Pico.m.dma_xfers = rand() & 0x1fff;\r
178\r
179 SekFinishIdleDet();\r
180\r
181 if (PicoAHW & PAHW_MCD) {\r
182 PicoResetMCD();\r
183 return 0;\r
184 }\r
185\r
186 // reinit, so that checksum checks pass\r
187 if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
188 SekInitIdleDet();\r
189\r
190 // reset sram state; enable sram access by default if it doesn't overlap with ROM\r
191 Pico.m.sram_reg = 0;\r
192 if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
193 Pico.m.sram_reg |= SRR_MAPPED;\r
194\r
195 if (SRam.flags & SRF_ENABLED)\r
196 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
197 !!(SRam.flags & SRF_EEPROM));\r
198\r
199 return 0;\r
200}\r
201\r
202\r
203// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
204// same for Outrunners (92-121, when active is set to 24)\r
205// 96 is VR hack\r
206static const int dma_timings[] = {\r
207 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
208 102, 205, 204, 102, // vblank: 40cell:\r
209 16, 16, 15, 8, // active: 32cell:\r
210 24, 18, 17, 9 // ...\r
211};\r
212\r
213static const int dma_bsycles[] = {\r
214 (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
215 (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r
216 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
217 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
218};\r
219\r
220PICO_INTERNAL int CheckDMA(void)\r
221{\r
222 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
223 int xfers = Pico.m.dma_xfers;\r
224 int dma_op1;\r
225\r
226 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens\r
227 dma_op1 = dma_op;\r
228 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?\r
229 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?\r
230 xfers_can = dma_timings[dma_op];\r
231 if(xfers <= xfers_can)\r
232 {\r
233 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy\r
234 else {\r
235 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..\r
236 }\r
237 Pico.m.dma_xfers = 0;\r
238 } else {\r
239 if(!(dma_op&2)) burn = 488;\r
240 Pico.m.dma_xfers -= xfers_can;\r
241 }\r
242\r
243 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());\r
244 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);\r
245 return burn;\r
246}\r
247\r
248static __inline void SekRunM68k(int cyc)\r
249{\r
250 int cyc_do;\r
251 SekCycleAim+=cyc;\r
252 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
253#if defined(EMU_CORE_DEBUG)\r
254 // this means we do run-compare\r
255 SekCycleCnt+=CM_compareRun(cyc_do, 0);\r
256#elif defined(EMU_C68K)\r
257 PicoCpuCM68k.cycles=cyc_do;\r
258 CycloneRun(&PicoCpuCM68k);\r
259 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r
260#elif defined(EMU_M68K)\r
261 SekCycleCnt+=m68k_execute(cyc_do);\r
262#elif defined(EMU_F68K)\r
263 SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r
264#endif\r
265}\r
266\r
267#include "pico_cmn.c"\r
268\r
269int z80stopCycle;\r
270int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
271int z80_cycle_aim;\r
272int z80_scanline;\r
273int z80_scanline_cycles; /* cycles done until z80_scanline */\r
274\r
275/* sync z80 to 68k */\r
276PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
277{\r
278 int cnt;\r
279 z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
280 cnt = z80_cycle_aim - z80_cycle_cnt;\r
281\r
282 elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
283 z80_cycle_aim, z80_cycle_aim / 228);\r
284\r
285 if (cnt > 0)\r
286 z80_cycle_cnt += z80_run(cnt);\r
287}\r
288\r
289\r
290void PicoFrame(void)\r
291{\r
292 Pico.m.frame_count++;\r
293\r
294 if (PicoAHW & PAHW_SMS) {\r
295 PicoFrameMS();\r
296 return;\r
297 }\r
298\r
299 if (PicoAHW & PAHW_MCD) {\r
300 PicoFrameMCD();\r
301 return;\r
302 }\r
303\r
304 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
305\r
306 PicoFrameStart();\r
307 PicoFrameHints();\r
308}\r
309\r
310void PicoFrameDrawOnly(void)\r
311{\r
312 if (!(PicoAHW & PAHW_SMS)) {\r
313 PicoFrameStart();\r
314 PicoDrawSync(223, 0);\r
315 } else {\r
316 PicoFrameDrawOnlyMS();\r
317 }\r
318}\r
319\r
320void PicoGetInternal(pint_t which, pint_ret_t *r)\r
321{\r
322 switch (which)\r
323 {\r
324 case PI_ROM: r->vptr = Pico.rom; break;\r
325 case PI_ISPAL: r->vint = Pico.m.pal; break;\r
326 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;\r
327 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;\r
328 }\r
329}\r
330\r
331// callback to output message from emu\r
332void (*PicoMessage)(const char *msg)=NULL;\r
333\r