improve input handling
[picodrive.git] / pico / pico_cmn.c
... / ...
CommitLineData
1/*
2 * common code for pico.c and cd/pico.c
3 * (C) notaz, 2007-2009
4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
8
9#define CYCLES_M68K_LINE 488 // suitable for both PAL/NTSC
10#define CYCLES_M68K_VINT_LAG 68
11#define CYCLES_M68K_ASD 148
12#define CYCLES_S68K_LINE 795
13#define CYCLES_S68K_VINT_LAG 111
14#define CYCLES_S68K_ASD 241
15
16// pad delay (for 6 button pads)
17#define PAD_DELAY() { \
18 if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0; \
19 if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0; \
20}
21
22// CPUS_RUN
23#ifndef CPUS_RUN
24#define CPUS_RUN(m68k_cycles,s68k_cycles) \
25 SekRunM68k(m68k_cycles)
26#endif
27
28static __inline void SekRunM68k(int cyc)
29{
30 int cyc_do;
31 pprof_start(m68k);
32 pevt_log_m68k_o(EVT_RUN_START);
33
34 SekCycleAim+=cyc;
35 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0)
36 goto out;
37
38#if defined(EMU_CORE_DEBUG)
39 // this means we do run-compare
40 SekCycleCnt+=CM_compareRun(cyc_do, 0);
41#elif defined(EMU_C68K)
42 PicoCpuCM68k.cycles=cyc_do;
43 CycloneRun(&PicoCpuCM68k);
44 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
45#elif defined(EMU_M68K)
46 SekCycleCnt+=m68k_execute(cyc_do);
47#elif defined(EMU_F68K)
48 SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0);
49#endif
50
51out:
52 SekTrace(0);
53 pevt_log_m68k_o(EVT_RUN_END);
54 pprof_end(m68k);
55}
56
57static int PicoFrameHints(void)
58{
59 struct PicoVideo *pv=&Pico.video;
60 int lines, y, lines_vis = 224, line_sample, skip, vcnt_wrap;
61 int hint; // Hint counter
62
63 pevt_log_m68k_o(EVT_FRAME_START);
64 pv->v_counter = Pico.m.scanline = 0;
65
66 if ((PicoOpt&POPT_ALT_RENDERER) && !PicoSkipFrame && (pv->reg[1]&0x40)) { // fast rend., display enabled
67 // draw a frame just after vblank in alternative render mode
68 // yes, this will cause 1 frame lag, but this is inaccurate mode anyway.
69 PicoFrameFull();
70#ifdef DRAW_FINISH_FUNC
71 DRAW_FINISH_FUNC();
72#endif
73 skip = 1;
74 }
75 else skip=PicoSkipFrame;
76
77 if (Pico.m.pal) {
78 line_sample = 68;
79 if (pv->reg[1]&8) lines_vis = 240;
80 } else {
81 line_sample = 93;
82 }
83
84 SekCyclesReset();
85 z80_resetCycles();
86#ifdef PICO_CD
87 SekCyclesResetS68k();
88#endif
89 PsndDacLine = 0;
90 emustatus &= ~1;
91
92 pv->status&=~0x88; // clear V-Int, come out of vblank
93
94 hint=pv->reg[10]; // Load H-Int counter
95 //dprintf("-hint: %i", hint);
96
97 // This is to make active scan longer (needed for Double Dragon 2, mainly)
98 CPUS_RUN(CYCLES_M68K_ASD, CYCLES_S68K_ASD);
99
100 for (y = 0; y < lines_vis; y++)
101 {
102 pv->v_counter = Pico.m.scanline = y;
103 if ((pv->reg[12]&6) == 6) { // interlace mode 2
104 pv->v_counter <<= 1;
105 pv->v_counter |= pv->v_counter >> 8;
106 pv->v_counter &= 0xff;
107 }
108
109 // VDP FIFO
110 pv->lwrite_cnt -= 12;
111 if (pv->lwrite_cnt <= 0) {
112 pv->lwrite_cnt=0;
113 Pico.video.status|=0x200;
114 }
115
116 PAD_DELAY();
117#ifdef PICO_CD
118 check_cd_dma();
119#endif
120
121 // H-Interrupts:
122 if (--hint < 0) // y <= lines_vis: Comix Zone, Golden Axe
123 {
124 hint=pv->reg[10]; // Reload H-Int counter
125 pv->pending_ints|=0x10;
126 if (pv->reg[0]&0x10) {
127 elprintf(EL_INTS, "hint: @ %06x [%i]", SekPc, SekCycleCnt);
128 SekInterrupt(4);
129 }
130 }
131
132 // decide if we draw this line
133 if (!skip && (PicoOpt & POPT_ALT_RENDERER))
134 {
135 // find the right moment for frame renderer, when display is no longer blanked
136 if ((pv->reg[1]&0x40) || y > 100) {
137 PicoFrameFull();
138#ifdef DRAW_FINISH_FUNC
139 DRAW_FINISH_FUNC();
140#endif
141 skip = 1;
142 }
143 }
144
145 // get samples from sound chips
146 if ((y == 224 || y == line_sample) && PsndOut)
147 {
148 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80))
149 PicoSyncZ80(SekCycleCnt);
150 if (ym2612.dacen && PsndDacLine <= y)
151 PsndDoDAC(y);
152#ifdef PICO_32X
153 p32x_sync_sh2s(SekCyclesDoneT2());
154#endif
155 PsndGetSamples(y);
156 }
157
158 // Run scanline:
159 if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
160 CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE);
161
162#ifdef PICO_CD
163 update_chips();
164#else
165 if (PicoLineHook) PicoLineHook();
166#endif
167 pevt_log_m68k_o(EVT_NEXT_LINE);
168 }
169
170 if (!skip)
171 {
172 if (DrawScanline < y)
173 PicoDrawSync(y - 1, 0);
174#ifdef DRAW_FINISH_FUNC
175 DRAW_FINISH_FUNC();
176#endif
177 }
178
179 // V-int line (224 or 240)
180 Pico.m.scanline = y;
181 pv->v_counter = 0xe0; // bad for 240 mode
182 if ((pv->reg[12]&6) == 6) pv->v_counter = 0xc1;
183
184 // VDP FIFO
185 pv->lwrite_cnt=0;
186 Pico.video.status|=0x200;
187
188 memcpy(PicoPadInt, PicoPad, sizeof(PicoPadInt));
189 PAD_DELAY();
190#ifdef PICO_CD
191 check_cd_dma();
192#endif
193
194 // Last H-Int:
195 if (--hint < 0)
196 {
197 hint=pv->reg[10]; // Reload H-Int counter
198 pv->pending_ints|=0x10;
199 //printf("rhint: %i @ %06x [%i|%i]\n", hint, SekPc, y, SekCycleCnt);
200 if (pv->reg[0]&0x10) SekInterrupt(4);
201 }
202
203 pv->status|=0x08; // go into vblank
204 pv->pending_ints|=0x20;
205
206 // the following SekRun is there for several reasons:
207 // there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
208 // also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
209 // also delay between last H-int and V-int (Golden Axe 3)
210 CPUS_RUN(CYCLES_M68K_VINT_LAG, CYCLES_S68K_VINT_LAG);
211
212 if (pv->reg[1]&0x20) {
213 elprintf(EL_INTS, "vint: @ %06x [%i]", SekPc, SekCycleCnt);
214 SekInterrupt(6);
215 }
216 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) {
217 PicoSyncZ80(SekCycleCnt);
218 elprintf(EL_INTS, "zint");
219 z80_int();
220 }
221
222#ifdef PICO_32X
223 p32x_sync_sh2s(SekCyclesDoneT2());
224 p32x_start_blank();
225#endif
226
227 // get samples from sound chips
228 if (y == 224 && PsndOut)
229 {
230 if (ym2612.dacen && PsndDacLine <= y)
231 PsndDoDAC(y);
232 PsndGetSamples(y);
233 }
234
235 // Run scanline:
236 if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
237 CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD,
238 CYCLES_S68K_LINE - CYCLES_S68K_VINT_LAG - CYCLES_S68K_ASD);
239
240#ifdef PICO_CD
241 update_chips();
242#else
243 if (PicoLineHook) PicoLineHook();
244#endif
245 pevt_log_m68k_o(EVT_NEXT_LINE);
246
247 lines = scanlines_total;
248 vcnt_wrap = Pico.m.pal ? 0x103 : 0xEB; // based on Gens, TODO: verify
249
250 for (y++; y < lines; y++)
251 {
252 pv->v_counter = Pico.m.scanline = y;
253 if (y >= vcnt_wrap)
254 pv->v_counter -= Pico.m.pal ? 56 : 6;
255 if ((pv->reg[12]&6) == 6)
256 pv->v_counter = (pv->v_counter << 1) | 1;
257 pv->v_counter &= 0xff;
258
259 PAD_DELAY();
260#ifdef PICO_CD
261 check_cd_dma();
262#endif
263
264 // Run scanline:
265 if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
266 CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE);
267
268#ifdef PICO_CD
269 update_chips();
270#else
271 if (PicoLineHook) PicoLineHook();
272#endif
273 pevt_log_m68k_o(EVT_NEXT_LINE);
274 }
275
276 // sync z80
277 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80))
278 PicoSyncZ80(Pico.m.pal ? 151809 : 127671); // cycles adjusted for converter
279 if (PsndOut && ym2612.dacen && PsndDacLine <= lines-1)
280 PsndDoDAC(lines-1);
281
282#ifdef PICO_32X
283 p32x_sync_sh2s(SekCyclesDoneT2());
284#endif
285 timers_cycle();
286
287 return 0;
288}
289
290#undef PAD_DELAY
291#undef CPUS_RUN
292