| 1 | /*\r |
| 2 | * PicoDrive\r |
| 3 | * (c) Copyright Dave, 2004\r |
| 4 | * (C) notaz, 2006-2009\r |
| 5 | *\r |
| 6 | * This work is licensed under the terms of MAME license.\r |
| 7 | * See COPYING file in the top-level directory.\r |
| 8 | */\r |
| 9 | \r |
| 10 | #include "pico_int.h"\r |
| 11 | #include "memory.h"\r |
| 12 | \r |
| 13 | /* context */\r |
| 14 | // Cyclone 68000\r |
| 15 | #ifdef EMU_C68K\r |
| 16 | struct Cyclone PicoCpuCM68k;\r |
| 17 | #endif\r |
| 18 | // MUSASHI 68000\r |
| 19 | #ifdef EMU_M68K\r |
| 20 | m68ki_cpu_core PicoCpuMM68k;\r |
| 21 | #endif\r |
| 22 | // FAME 68000\r |
| 23 | #ifdef EMU_F68K\r |
| 24 | M68K_CONTEXT PicoCpuFM68k;\r |
| 25 | #endif\r |
| 26 | \r |
| 27 | \r |
| 28 | static int do_ack(int level)\r |
| 29 | {\r |
| 30 | struct PicoVideo *pv = &Pico.video;\r |
| 31 | \r |
| 32 | elprintf(EL_INTS, "%cack: @ %06x [%u], p=%02x",\r |
| 33 | level == 6 ? 'v' : 'h', SekPc, SekCyclesDone(), pv->pending_ints);\r |
| 34 | // the VDP doesn't look at the 68k level\r |
| 35 | if (pv->pending_ints & pv->reg[1] & 0x20) {\r |
| 36 | pv->pending_ints &= ~0x20;\r |
| 37 | return (pv->reg[0] & pv->pending_ints & 0x10) >> 2;\r |
| 38 | }\r |
| 39 | else if (pv->pending_ints & pv->reg[0] & 0x10)\r |
| 40 | pv->pending_ints &= ~0x10;\r |
| 41 | \r |
| 42 | return 0;\r |
| 43 | }\r |
| 44 | \r |
| 45 | /* callbacks */\r |
| 46 | #ifdef EMU_C68K\r |
| 47 | // interrupt acknowledgment\r |
| 48 | static int SekIntAck(int level)\r |
| 49 | {\r |
| 50 | PicoCpuCM68k.irq = do_ack(level);\r |
| 51 | return CYCLONE_INT_ACK_AUTOVECTOR;\r |
| 52 | }\r |
| 53 | \r |
| 54 | static void SekResetAck(void)\r |
| 55 | {\r |
| 56 | elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r |
| 57 | }\r |
| 58 | \r |
| 59 | static int SekUnrecognizedOpcode()\r |
| 60 | {\r |
| 61 | unsigned int pc;\r |
| 62 | pc = SekPc;\r |
| 63 | elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r |
| 64 | // see if we are still in a mapped region\r |
| 65 | pc &= 0x00ffffff;\r |
| 66 | if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r |
| 67 | elprintf(EL_STATUS|EL_ANOMALY, "m68k crash @%06x", pc);\r |
| 68 | PicoCpuCM68k.cycles = 0;\r |
| 69 | PicoCpuCM68k.state_flags |= 1;\r |
| 70 | return 1;\r |
| 71 | }\r |
| 72 | // happened once - may happen again\r |
| 73 | SekFinishIdleDet();\r |
| 74 | #ifdef EMU_M68K // debugging cyclone\r |
| 75 | {\r |
| 76 | extern int have_illegal;\r |
| 77 | have_illegal = 1;\r |
| 78 | }\r |
| 79 | #endif\r |
| 80 | return 0;\r |
| 81 | }\r |
| 82 | #endif\r |
| 83 | \r |
| 84 | \r |
| 85 | #ifdef EMU_M68K\r |
| 86 | static int SekIntAckM68K(int level)\r |
| 87 | {\r |
| 88 | CPU_INT_LEVEL = do_ack(level) << 8;\r |
| 89 | return M68K_INT_ACK_AUTOVECTOR;\r |
| 90 | }\r |
| 91 | \r |
| 92 | static int SekTasCallback(void)\r |
| 93 | {\r |
| 94 | return 0; // no writeback\r |
| 95 | }\r |
| 96 | #endif\r |
| 97 | \r |
| 98 | \r |
| 99 | #ifdef EMU_F68K\r |
| 100 | static void SekIntAckF68K(unsigned level)\r |
| 101 | {\r |
| 102 | PicoCpuFM68k.interrupts[0] = do_ack(level);\r |
| 103 | }\r |
| 104 | #endif\r |
| 105 | \r |
| 106 | \r |
| 107 | PICO_INTERNAL void SekInit(void)\r |
| 108 | {\r |
| 109 | #ifdef EMU_C68K\r |
| 110 | CycloneInit();\r |
| 111 | memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r |
| 112 | PicoCpuCM68k.IrqCallback=SekIntAck;\r |
| 113 | PicoCpuCM68k.ResetCallback=SekResetAck;\r |
| 114 | PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r |
| 115 | PicoCpuCM68k.flags=4; // Z set\r |
| 116 | #endif\r |
| 117 | #ifdef EMU_M68K\r |
| 118 | {\r |
| 119 | void *oldcontext = m68ki_cpu_p;\r |
| 120 | m68k_set_context(&PicoCpuMM68k);\r |
| 121 | m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r |
| 122 | m68k_init();\r |
| 123 | m68k_set_int_ack_callback(SekIntAckM68K);\r |
| 124 | m68k_set_tas_instr_callback(SekTasCallback);\r |
| 125 | //m68k_pulse_reset();\r |
| 126 | m68k_set_context(oldcontext);\r |
| 127 | }\r |
| 128 | #endif\r |
| 129 | #ifdef EMU_F68K\r |
| 130 | {\r |
| 131 | void *oldcontext = g_m68kcontext;\r |
| 132 | g_m68kcontext = &PicoCpuFM68k;\r |
| 133 | memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r |
| 134 | fm68k_init();\r |
| 135 | PicoCpuFM68k.iack_handler = SekIntAckF68K;\r |
| 136 | PicoCpuFM68k.sr = 0x2704; // Z flag\r |
| 137 | g_m68kcontext = oldcontext;\r |
| 138 | }\r |
| 139 | #endif\r |
| 140 | }\r |
| 141 | \r |
| 142 | \r |
| 143 | // Reset the 68000:\r |
| 144 | PICO_INTERNAL int SekReset(void)\r |
| 145 | {\r |
| 146 | if (Pico.rom==NULL) return 1;\r |
| 147 | \r |
| 148 | #ifdef EMU_C68K\r |
| 149 | CycloneReset(&PicoCpuCM68k);\r |
| 150 | #endif\r |
| 151 | #ifdef EMU_M68K\r |
| 152 | m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r |
| 153 | m68ki_cpu.sp[0]=0;\r |
| 154 | m68k_set_irq(0);\r |
| 155 | m68k_pulse_reset();\r |
| 156 | REG_USP = 0; // ?\r |
| 157 | #endif\r |
| 158 | #ifdef EMU_F68K\r |
| 159 | {\r |
| 160 | g_m68kcontext = &PicoCpuFM68k;\r |
| 161 | fm68k_reset();\r |
| 162 | }\r |
| 163 | #endif\r |
| 164 | \r |
| 165 | return 0;\r |
| 166 | }\r |
| 167 | \r |
| 168 | void SekStepM68k(void)\r |
| 169 | {\r |
| 170 | Pico.t.m68c_aim = Pico.t.m68c_cnt + 1;\r |
| 171 | #if defined(EMU_CORE_DEBUG)\r |
| 172 | Pico.t.m68c_cnt += CM_compareRun(1, 0);\r |
| 173 | #elif defined(EMU_C68K)\r |
| 174 | PicoCpuCM68k.cycles=1;\r |
| 175 | CycloneRun(&PicoCpuCM68k);\r |
| 176 | Pico.t.m68c_cnt += 1 - PicoCpuCM68k.cycles;\r |
| 177 | #elif defined(EMU_M68K)\r |
| 178 | Pico.t.m68c_cnt += m68k_execute(1);\r |
| 179 | #elif defined(EMU_F68K)\r |
| 180 | Pico.t.m68c_cnt += fm68k_emulate(1, 0);\r |
| 181 | #endif\r |
| 182 | }\r |
| 183 | \r |
| 184 | PICO_INTERNAL void SekSetRealTAS(int use_real)\r |
| 185 | {\r |
| 186 | #ifdef EMU_C68K\r |
| 187 | CycloneSetRealTAS(use_real);\r |
| 188 | #endif\r |
| 189 | #ifdef EMU_F68K\r |
| 190 | // TODO\r |
| 191 | #endif\r |
| 192 | }\r |
| 193 | \r |
| 194 | // Pack the cpu into a common format:\r |
| 195 | // XXX: rename\r |
| 196 | PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r |
| 197 | {\r |
| 198 | unsigned int pc=0;\r |
| 199 | \r |
| 200 | #if defined(EMU_C68K)\r |
| 201 | struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r |
| 202 | memcpy(cpu,context->d,0x40);\r |
| 203 | pc=context->pc-context->membase;\r |
| 204 | *(unsigned int *)(cpu+0x44)=CycloneGetSr(context);\r |
| 205 | *(unsigned int *)(cpu+0x48)=context->osp;\r |
| 206 | cpu[0x4c] = context->irq;\r |
| 207 | cpu[0x4d] = context->state_flags & 1;\r |
| 208 | #elif defined(EMU_M68K)\r |
| 209 | void *oldcontext = m68ki_cpu_p;\r |
| 210 | m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r |
| 211 | memcpy(cpu,m68ki_cpu_p->dar,0x40);\r |
| 212 | pc=m68ki_cpu_p->pc;\r |
| 213 | *(unsigned int *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r |
| 214 | *(unsigned int *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r |
| 215 | cpu[0x4c] = CPU_INT_LEVEL>>8;\r |
| 216 | cpu[0x4d] = CPU_STOPPED;\r |
| 217 | m68k_set_context(oldcontext);\r |
| 218 | #elif defined(EMU_F68K)\r |
| 219 | M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r |
| 220 | memcpy(cpu,context->dreg,0x40);\r |
| 221 | pc=context->pc;\r |
| 222 | *(unsigned int *)(cpu+0x44)=context->sr;\r |
| 223 | *(unsigned int *)(cpu+0x48)=context->asp;\r |
| 224 | cpu[0x4c] = context->interrupts[0];\r |
| 225 | cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r |
| 226 | #endif\r |
| 227 | \r |
| 228 | *(unsigned int *)(cpu+0x40) = pc;\r |
| 229 | *(unsigned int *)(cpu+0x50) =\r |
| 230 | is_sub ? SekCycleCntS68k : Pico.t.m68c_cnt;\r |
| 231 | }\r |
| 232 | \r |
| 233 | PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r |
| 234 | {\r |
| 235 | #if defined(EMU_C68K)\r |
| 236 | struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r |
| 237 | CycloneSetSr(context, *(unsigned int *)(cpu+0x44));\r |
| 238 | context->osp=*(unsigned int *)(cpu+0x48);\r |
| 239 | memcpy(context->d,cpu,0x40);\r |
| 240 | context->membase = 0;\r |
| 241 | context->pc = *(unsigned int *)(cpu+0x40);\r |
| 242 | CycloneUnpack(context, NULL); // rebase PC\r |
| 243 | context->irq = cpu[0x4c];\r |
| 244 | context->state_flags = 0;\r |
| 245 | if (cpu[0x4d])\r |
| 246 | context->state_flags |= 1;\r |
| 247 | #elif defined(EMU_M68K)\r |
| 248 | void *oldcontext = m68ki_cpu_p;\r |
| 249 | m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r |
| 250 | m68k_set_reg(M68K_REG_SR, *(unsigned int *)(cpu+0x44));\r |
| 251 | memcpy(m68ki_cpu_p->dar,cpu,0x40);\r |
| 252 | m68ki_cpu_p->pc=*(unsigned int *)(cpu+0x40);\r |
| 253 | m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=*(unsigned int *)(cpu+0x48);\r |
| 254 | CPU_INT_LEVEL = cpu[0x4c] << 8;\r |
| 255 | CPU_STOPPED = cpu[0x4d];\r |
| 256 | m68k_set_context(oldcontext);\r |
| 257 | #elif defined(EMU_F68K)\r |
| 258 | M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r |
| 259 | memcpy(context->dreg,cpu,0x40);\r |
| 260 | context->pc =*(unsigned int *)(cpu+0x40);\r |
| 261 | context->sr =*(unsigned int *)(cpu+0x44);\r |
| 262 | context->asp=*(unsigned int *)(cpu+0x48);\r |
| 263 | context->interrupts[0] = cpu[0x4c];\r |
| 264 | context->execinfo &= ~FM68K_HALTED;\r |
| 265 | if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r |
| 266 | #endif\r |
| 267 | if (is_sub)\r |
| 268 | SekCycleCntS68k = *(unsigned int *)(cpu+0x50);\r |
| 269 | else\r |
| 270 | Pico.t.m68c_cnt = *(unsigned int *)(cpu+0x50);\r |
| 271 | }\r |
| 272 | \r |
| 273 | \r |
| 274 | /* idle loop detection, not to be used in CD mode */\r |
| 275 | #ifdef EMU_C68K\r |
| 276 | #include "cpu/cyclone/tools/idle.h"\r |
| 277 | #endif\r |
| 278 | \r |
| 279 | static unsigned short **idledet_ptrs = NULL;\r |
| 280 | static int idledet_count = 0, idledet_bads = 0;\r |
| 281 | static int idledet_start_frame = 0;\r |
| 282 | \r |
| 283 | #if 0\r |
| 284 | #define IDLE_STATS 1\r |
| 285 | unsigned int idlehit_addrs[128], idlehit_counts[128];\r |
| 286 | \r |
| 287 | void SekRegisterIdleHit(unsigned int pc)\r |
| 288 | {\r |
| 289 | int i;\r |
| 290 | for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r |
| 291 | if (idlehit_addrs[i] == pc) {\r |
| 292 | idlehit_counts[i]++;\r |
| 293 | return;\r |
| 294 | }\r |
| 295 | }\r |
| 296 | idlehit_addrs[i] = pc;\r |
| 297 | idlehit_counts[i] = 1;\r |
| 298 | idlehit_addrs[i+1] = 0;\r |
| 299 | }\r |
| 300 | #endif\r |
| 301 | \r |
| 302 | void SekInitIdleDet(void)\r |
| 303 | {\r |
| 304 | unsigned short **tmp;\r |
| 305 | tmp = realloc(idledet_ptrs, 0x200 * sizeof(tmp[0]));\r |
| 306 | if (tmp == NULL) {\r |
| 307 | free(idledet_ptrs);\r |
| 308 | idledet_ptrs = NULL;\r |
| 309 | }\r |
| 310 | else\r |
| 311 | idledet_ptrs = tmp;\r |
| 312 | idledet_count = idledet_bads = 0;\r |
| 313 | idledet_start_frame = Pico.m.frame_count + 360;\r |
| 314 | #ifdef IDLE_STATS\r |
| 315 | idlehit_addrs[0] = 0;\r |
| 316 | #endif\r |
| 317 | \r |
| 318 | #ifdef EMU_C68K\r |
| 319 | CycloneInitIdle();\r |
| 320 | #endif\r |
| 321 | #ifdef EMU_F68K\r |
| 322 | fm68k_emulate(0, 1);\r |
| 323 | #endif\r |
| 324 | }\r |
| 325 | \r |
| 326 | int SekIsIdleReady(void)\r |
| 327 | {\r |
| 328 | return (Pico.m.frame_count >= idledet_start_frame);\r |
| 329 | }\r |
| 330 | \r |
| 331 | int SekIsIdleCode(unsigned short *dst, int bytes)\r |
| 332 | {\r |
| 333 | // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r |
| 334 | switch (bytes)\r |
| 335 | {\r |
| 336 | case 2:\r |
| 337 | if ((*dst & 0xf000) != 0x6000) // not another branch\r |
| 338 | return 1;\r |
| 339 | break;\r |
| 340 | case 4:\r |
| 341 | if ( (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r |
| 342 | (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r |
| 343 | (*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r |
| 344 | return 1;\r |
| 345 | if (PicoAHW & (PAHW_MCD|PAHW_32X))\r |
| 346 | break;\r |
| 347 | // with no addons, there should be no need to wait\r |
| 348 | // for byte change anywhere\r |
| 349 | if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)\r |
| 350 | (*dst & 0xfff8) == 0x4a28) // tst.b ($xxxx,a0)\r |
| 351 | return 1;\r |
| 352 | break;\r |
| 353 | case 6:\r |
| 354 | if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r |
| 355 | *dst == 0x4a39 || // tst.b ($xxxxxxxx)\r |
| 356 | *dst == 0x4a79 || // tst.w ($xxxxxxxx)\r |
| 357 | *dst == 0x4ab9 || // tst.l ($xxxxxxxx)\r |
| 358 | (*dst & 0xc1ff) == 0x0039 || // move.x ($xxxxxxxx), dX\r |
| 359 | (*dst & 0xf13f) == 0xb039))||// cmp.x ($xxxxxxxx), dX\r |
| 360 | *dst == 0x0838 || // btst $X, ($xxxx.w) [6 byte op]\r |
| 361 | (*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r |
| 362 | return 1;\r |
| 363 | break;\r |
| 364 | case 8:\r |
| 365 | if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r |
| 366 | *dst == 0x0839 || // btst $X, ($xxxxxxxx.w) [8 byte op]\r |
| 367 | (*dst & 0xffbf) == 0x0c39))||// cmpi.{b,w} $X, ($xxxxxxxx)\r |
| 368 | *dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r |
| 369 | return 1;\r |
| 370 | break;\r |
| 371 | case 12:\r |
| 372 | if (PicoAHW & (PAHW_MCD|PAHW_32X))\r |
| 373 | break;\r |
| 374 | if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r |
| 375 | (dst[1]&0xf100) == 0x0000 && // arithmetic\r |
| 376 | (dst[3]&0xf100) == 0x0000) // arithmetic\r |
| 377 | return 1;\r |
| 378 | break;\r |
| 379 | }\r |
| 380 | \r |
| 381 | return 0;\r |
| 382 | }\r |
| 383 | \r |
| 384 | int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r |
| 385 | {\r |
| 386 | int is_main68k = 1;\r |
| 387 | u16 *target;\r |
| 388 | uptr v;\r |
| 389 | \r |
| 390 | #if defined(EMU_C68K)\r |
| 391 | struct Cyclone *cyc = ctx;\r |
| 392 | is_main68k = cyc == &PicoCpuCM68k;\r |
| 393 | pc -= cyc->membase;\r |
| 394 | #elif defined(EMU_F68K)\r |
| 395 | is_main68k = ctx == &PicoCpuFM68k;\r |
| 396 | #endif\r |
| 397 | pc &= ~0xff000000;\r |
| 398 | if (!(newop&0x200))\r |
| 399 | elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r |
| 400 | (newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r |
| 401 | \r |
| 402 | // XXX: probably shouldn't patch RAM too\r |
| 403 | v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r |
| 404 | if (!(v & 0x80000000))\r |
| 405 | target = (u16 *)((v << 1) + pc);\r |
| 406 | else {\r |
| 407 | if (++idledet_bads > 128)\r |
| 408 | return 2; // remove detector\r |
| 409 | return 1; // don't patch\r |
| 410 | }\r |
| 411 | \r |
| 412 | if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r |
| 413 | unsigned short **tmp;\r |
| 414 | tmp = realloc(idledet_ptrs, (idledet_count+0x200) * sizeof(tmp[0]));\r |
| 415 | if (tmp == NULL)\r |
| 416 | return 1;\r |
| 417 | idledet_ptrs = tmp;\r |
| 418 | }\r |
| 419 | \r |
| 420 | idledet_ptrs[idledet_count++] = target;\r |
| 421 | \r |
| 422 | return 0;\r |
| 423 | }\r |
| 424 | \r |
| 425 | void SekFinishIdleDet(void)\r |
| 426 | {\r |
| 427 | if (idledet_count < 0)\r |
| 428 | return;\r |
| 429 | #ifdef EMU_C68K\r |
| 430 | CycloneFinishIdle();\r |
| 431 | #endif\r |
| 432 | #ifdef EMU_F68K\r |
| 433 | fm68k_emulate(0, 2);\r |
| 434 | #endif\r |
| 435 | while (idledet_count > 0)\r |
| 436 | {\r |
| 437 | unsigned short *op = idledet_ptrs[--idledet_count];\r |
| 438 | if ((*op & 0xfd00) == 0x7100)\r |
| 439 | *op &= 0xff, *op |= 0x6600;\r |
| 440 | else if ((*op & 0xfd00) == 0x7500)\r |
| 441 | *op &= 0xff, *op |= 0x6700;\r |
| 442 | else if ((*op & 0xfd00) == 0x7d00)\r |
| 443 | *op &= 0xff, *op |= 0x6000;\r |
| 444 | else\r |
| 445 | elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r |
| 446 | }\r |
| 447 | idledet_count = -1;\r |
| 448 | }\r |
| 449 | \r |
| 450 | \r |
| 451 | #if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r |
| 452 | #include "debug.h"\r |
| 453 | \r |
| 454 | struct ref_68k {\r |
| 455 | u32 dar[16];\r |
| 456 | u32 pc;\r |
| 457 | u32 sr;\r |
| 458 | u32 cycles;\r |
| 459 | u32 pc_prev;\r |
| 460 | };\r |
| 461 | struct ref_68k ref_68ks[2];\r |
| 462 | static int current_68k;\r |
| 463 | \r |
| 464 | void SekTrace(int is_s68k)\r |
| 465 | {\r |
| 466 | struct ref_68k *x68k = &ref_68ks[is_s68k];\r |
| 467 | u32 pc = is_s68k ? SekPcS68k : SekPc;\r |
| 468 | u32 sr = is_s68k ? SekSrS68k : SekSr;\r |
| 469 | u32 cycles = is_s68k ? SekCycleCntS68k : Pico.t.m68c_cnt;\r |
| 470 | u32 r;\r |
| 471 | u8 cmd;\r |
| 472 | #ifdef CPU_CMP_W\r |
| 473 | int i;\r |
| 474 | \r |
| 475 | if (is_s68k != current_68k) {\r |
| 476 | current_68k = is_s68k;\r |
| 477 | cmd = CTL_68K_SLAVE | current_68k;\r |
| 478 | tl_write(&cmd, sizeof(cmd));\r |
| 479 | }\r |
| 480 | if (pc != x68k->pc) {\r |
| 481 | x68k->pc = pc;\r |
| 482 | tl_write_uint(CTL_68K_PC, x68k->pc);\r |
| 483 | }\r |
| 484 | if (sr != x68k->sr) {\r |
| 485 | x68k->sr = sr;\r |
| 486 | tl_write_uint(CTL_68K_SR, x68k->sr);\r |
| 487 | }\r |
| 488 | for (i = 0; i < 16; i++) {\r |
| 489 | r = is_s68k ? SekDarS68k(i) : SekDar(i);\r |
| 490 | if (r != x68k->dar[i]) {\r |
| 491 | x68k->dar[i] = r;\r |
| 492 | tl_write_uint(CTL_68K_R + i, r);\r |
| 493 | }\r |
| 494 | }\r |
| 495 | tl_write_uint(CTL_68K_CYCLES, cycles);\r |
| 496 | #else\r |
| 497 | int i, bad = 0;\r |
| 498 | \r |
| 499 | while (1)\r |
| 500 | {\r |
| 501 | int ret = tl_read(&cmd, sizeof(cmd));\r |
| 502 | if (ret == 0) {\r |
| 503 | elprintf(EL_STATUS, "EOF");\r |
| 504 | exit(1);\r |
| 505 | }\r |
| 506 | switch (cmd) {\r |
| 507 | case CTL_68K_SLAVE:\r |
| 508 | case CTL_68K_SLAVE + 1:\r |
| 509 | current_68k = cmd & 1;\r |
| 510 | break;\r |
| 511 | case CTL_68K_PC:\r |
| 512 | tl_read_uint(&x68k->pc);\r |
| 513 | break;\r |
| 514 | case CTL_68K_SR:\r |
| 515 | tl_read_uint(&x68k->sr);\r |
| 516 | break;\r |
| 517 | case CTL_68K_CYCLES:\r |
| 518 | tl_read_uint(&x68k->cycles);\r |
| 519 | goto breakloop;\r |
| 520 | default:\r |
| 521 | if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r |
| 522 | tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r |
| 523 | else\r |
| 524 | elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r |
| 525 | }\r |
| 526 | }\r |
| 527 | \r |
| 528 | breakloop:\r |
| 529 | if (is_s68k != current_68k) {\r |
| 530 | printf("bad 68k: %d %d\n", is_s68k, current_68k);\r |
| 531 | bad = 1;\r |
| 532 | }\r |
| 533 | if (cycles != x68k->cycles) {\r |
| 534 | printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r |
| 535 | bad = 1;\r |
| 536 | }\r |
| 537 | if ((pc ^ x68k->pc) & 0xffffff) {\r |
| 538 | printf("bad PC: %08x %08x\n", pc, x68k->pc);\r |
| 539 | bad = 1;\r |
| 540 | }\r |
| 541 | if (sr != x68k->sr) {\r |
| 542 | printf("bad SR: %03x %03x\n", sr, x68k->sr);\r |
| 543 | bad = 1;\r |
| 544 | }\r |
| 545 | for (i = 0; i < 16; i++) {\r |
| 546 | r = is_s68k ? SekDarS68k(i) : SekDar(i);\r |
| 547 | if (r != x68k->dar[i]) {\r |
| 548 | printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r |
| 549 | r, x68k->dar[i]);\r |
| 550 | bad = 1;\r |
| 551 | }\r |
| 552 | }\r |
| 553 | if (bad) {\r |
| 554 | for (i = 0; i < 8; i++)\r |
| 555 | printf("D%d: %08x A%d: %08x\n", i, x68k->dar[i],\r |
| 556 | i, x68k->dar[i + 8]);\r |
| 557 | printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r |
| 558 | printf("SR: %04x\n", x68k->sr);\r |
| 559 | \r |
| 560 | PDebugDumpMem();\r |
| 561 | exit(1);\r |
| 562 | }\r |
| 563 | x68k->pc_prev = x68k->pc;\r |
| 564 | #endif\r |
| 565 | }\r |
| 566 | #endif // CPU_CMP_*\r |
| 567 | \r |
| 568 | #if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r |
| 569 | static unsigned char op_flags[0x400000/2] = { 0, };\r |
| 570 | static int atexit_set = 0;\r |
| 571 | \r |
| 572 | static void make_idc(void)\r |
| 573 | {\r |
| 574 | FILE *f = fopen("idc.idc", "w");\r |
| 575 | int i;\r |
| 576 | if (!f) return;\r |
| 577 | fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r |
| 578 | for (i = 0; i < 0x400000/2; i++)\r |
| 579 | if (op_flags[i] != 0)\r |
| 580 | fprintf(f, " MakeCode(0x%06x);\n", i*2);\r |
| 581 | fprintf(f, "}\n");\r |
| 582 | fclose(f);\r |
| 583 | }\r |
| 584 | \r |
| 585 | void instruction_hook(void)\r |
| 586 | {\r |
| 587 | if (!atexit_set) {\r |
| 588 | atexit(make_idc);\r |
| 589 | atexit_set = 1;\r |
| 590 | }\r |
| 591 | if (REG_PC < 0x400000)\r |
| 592 | op_flags[REG_PC/2] = 1;\r |
| 593 | }\r |
| 594 | #endif\r |
| 595 | \r |
| 596 | // vim:shiftwidth=2:ts=2:expandtab\r |