| 1 | /*\r |
| 2 | * PicoDrive\r |
| 3 | * (c) Copyright Dave, 2004\r |
| 4 | * (C) notaz, 2006-2009\r |
| 5 | *\r |
| 6 | * This work is licensed under the terms of MAME license.\r |
| 7 | * See COPYING file in the top-level directory.\r |
| 8 | */\r |
| 9 | \r |
| 10 | #include "pico_int.h"\r |
| 11 | #include "memory.h"\r |
| 12 | \r |
| 13 | \r |
| 14 | int SekCycleCnt=0; // cycles done in this frame\r |
| 15 | int SekCycleAim=0; // cycle aim\r |
| 16 | unsigned int SekCycleCntT=0;\r |
| 17 | \r |
| 18 | \r |
| 19 | /* context */\r |
| 20 | // Cyclone 68000\r |
| 21 | #ifdef EMU_C68K\r |
| 22 | struct Cyclone PicoCpuCM68k;\r |
| 23 | #endif\r |
| 24 | // MUSASHI 68000\r |
| 25 | #ifdef EMU_M68K\r |
| 26 | m68ki_cpu_core PicoCpuMM68k;\r |
| 27 | #endif\r |
| 28 | // FAME 68000\r |
| 29 | #ifdef EMU_F68K\r |
| 30 | M68K_CONTEXT PicoCpuFM68k;\r |
| 31 | #endif\r |
| 32 | \r |
| 33 | \r |
| 34 | /* callbacks */\r |
| 35 | #ifdef EMU_C68K\r |
| 36 | // interrupt acknowledgment\r |
| 37 | static int SekIntAck(int level)\r |
| 38 | {\r |
| 39 | // try to emulate VDP's reaction to 68000 int ack\r |
| 40 | if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
| 41 | else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
| 42 | PicoCpuCM68k.irq = 0;\r |
| 43 | return CYCLONE_INT_ACK_AUTOVECTOR;\r |
| 44 | }\r |
| 45 | \r |
| 46 | static void SekResetAck(void)\r |
| 47 | {\r |
| 48 | elprintf(EL_ANOMALY, "Reset encountered @ %06x", SekPc);\r |
| 49 | }\r |
| 50 | \r |
| 51 | static int SekUnrecognizedOpcode()\r |
| 52 | {\r |
| 53 | unsigned int pc;\r |
| 54 | pc = SekPc;\r |
| 55 | elprintf(EL_ANOMALY, "Unrecognized Opcode @ %06x", pc);\r |
| 56 | // see if we are still in a mapped region\r |
| 57 | pc &= 0x00ffffff;\r |
| 58 | if (map_flag_set(m68k_read16_map[pc >> M68K_MEM_SHIFT])) {\r |
| 59 | elprintf(EL_STATUS|EL_ANOMALY, "m68k crash @%06x", pc);\r |
| 60 | PicoCpuCM68k.cycles = 0;\r |
| 61 | PicoCpuCM68k.state_flags |= 1;\r |
| 62 | return 1;\r |
| 63 | }\r |
| 64 | #ifdef EMU_M68K // debugging cyclone\r |
| 65 | {\r |
| 66 | extern int have_illegal;\r |
| 67 | have_illegal = 1;\r |
| 68 | }\r |
| 69 | #endif\r |
| 70 | return 0;\r |
| 71 | }\r |
| 72 | #endif\r |
| 73 | \r |
| 74 | \r |
| 75 | #ifdef EMU_M68K\r |
| 76 | static int SekIntAckM68K(int level)\r |
| 77 | {\r |
| 78 | if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
| 79 | else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
| 80 | CPU_INT_LEVEL = 0;\r |
| 81 | return M68K_INT_ACK_AUTOVECTOR;\r |
| 82 | }\r |
| 83 | \r |
| 84 | static int SekTasCallback(void)\r |
| 85 | {\r |
| 86 | return 0; // no writeback\r |
| 87 | }\r |
| 88 | #endif\r |
| 89 | \r |
| 90 | \r |
| 91 | #ifdef EMU_F68K\r |
| 92 | static void SekIntAckF68K(unsigned level)\r |
| 93 | {\r |
| 94 | if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
| 95 | else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }\r |
| 96 | PicoCpuFM68k.interrupts[0] = 0;\r |
| 97 | }\r |
| 98 | #endif\r |
| 99 | \r |
| 100 | \r |
| 101 | PICO_INTERNAL void SekInit(void)\r |
| 102 | {\r |
| 103 | #ifdef EMU_C68K\r |
| 104 | CycloneInit();\r |
| 105 | memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));\r |
| 106 | PicoCpuCM68k.IrqCallback=SekIntAck;\r |
| 107 | PicoCpuCM68k.ResetCallback=SekResetAck;\r |
| 108 | PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r |
| 109 | PicoCpuCM68k.flags=4; // Z set\r |
| 110 | #endif\r |
| 111 | #ifdef EMU_M68K\r |
| 112 | {\r |
| 113 | void *oldcontext = m68ki_cpu_p;\r |
| 114 | m68k_set_context(&PicoCpuMM68k);\r |
| 115 | m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r |
| 116 | m68k_init();\r |
| 117 | m68k_set_int_ack_callback(SekIntAckM68K);\r |
| 118 | m68k_set_tas_instr_callback(SekTasCallback);\r |
| 119 | //m68k_pulse_reset();\r |
| 120 | m68k_set_context(oldcontext);\r |
| 121 | }\r |
| 122 | #endif\r |
| 123 | #ifdef EMU_F68K\r |
| 124 | {\r |
| 125 | void *oldcontext = g_m68kcontext;\r |
| 126 | g_m68kcontext = &PicoCpuFM68k;\r |
| 127 | memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r |
| 128 | fm68k_init();\r |
| 129 | PicoCpuFM68k.iack_handler = SekIntAckF68K;\r |
| 130 | PicoCpuFM68k.sr = 0x2704; // Z flag\r |
| 131 | g_m68kcontext = oldcontext;\r |
| 132 | }\r |
| 133 | #endif\r |
| 134 | }\r |
| 135 | \r |
| 136 | \r |
| 137 | // Reset the 68000:\r |
| 138 | PICO_INTERNAL int SekReset(void)\r |
| 139 | {\r |
| 140 | if (Pico.rom==NULL) return 1;\r |
| 141 | \r |
| 142 | #ifdef EMU_C68K\r |
| 143 | CycloneReset(&PicoCpuCM68k);\r |
| 144 | #endif\r |
| 145 | #ifdef EMU_M68K\r |
| 146 | m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set\r |
| 147 | m68ki_cpu.sp[0]=0;\r |
| 148 | m68k_set_irq(0);\r |
| 149 | m68k_pulse_reset();\r |
| 150 | REG_USP = 0; // ?\r |
| 151 | #endif\r |
| 152 | #ifdef EMU_F68K\r |
| 153 | {\r |
| 154 | g_m68kcontext = &PicoCpuFM68k;\r |
| 155 | fm68k_reset();\r |
| 156 | }\r |
| 157 | #endif\r |
| 158 | \r |
| 159 | return 0;\r |
| 160 | }\r |
| 161 | \r |
| 162 | void SekStepM68k(void)\r |
| 163 | {\r |
| 164 | SekCycleAim=SekCycleCnt+1;\r |
| 165 | #if defined(EMU_CORE_DEBUG)\r |
| 166 | SekCycleCnt+=CM_compareRun(1, 0);\r |
| 167 | #elif defined(EMU_C68K)\r |
| 168 | PicoCpuCM68k.cycles=1;\r |
| 169 | CycloneRun(&PicoCpuCM68k);\r |
| 170 | SekCycleCnt+=1-PicoCpuCM68k.cycles;\r |
| 171 | #elif defined(EMU_M68K)\r |
| 172 | SekCycleCnt+=m68k_execute(1);\r |
| 173 | #elif defined(EMU_F68K)\r |
| 174 | SekCycleCnt+=fm68k_emulate(1, 0, 0);\r |
| 175 | #endif\r |
| 176 | }\r |
| 177 | \r |
| 178 | PICO_INTERNAL void SekSetRealTAS(int use_real)\r |
| 179 | {\r |
| 180 | #ifdef EMU_C68K\r |
| 181 | CycloneSetRealTAS(use_real);\r |
| 182 | #endif\r |
| 183 | #ifdef EMU_F68K\r |
| 184 | // TODO\r |
| 185 | #endif\r |
| 186 | }\r |
| 187 | \r |
| 188 | // Pack the cpu into a common format:\r |
| 189 | // XXX: rename\r |
| 190 | PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub)\r |
| 191 | {\r |
| 192 | unsigned int pc=0;\r |
| 193 | \r |
| 194 | #if defined(EMU_C68K)\r |
| 195 | struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r |
| 196 | memcpy(cpu,context->d,0x40);\r |
| 197 | pc=context->pc-context->membase;\r |
| 198 | *(unsigned int *)(cpu+0x44)=CycloneGetSr(context);\r |
| 199 | *(unsigned int *)(cpu+0x48)=context->osp;\r |
| 200 | cpu[0x4c] = context->irq;\r |
| 201 | cpu[0x4d] = context->state_flags & 1;\r |
| 202 | #elif defined(EMU_M68K)\r |
| 203 | void *oldcontext = m68ki_cpu_p;\r |
| 204 | m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r |
| 205 | memcpy(cpu,m68ki_cpu_p->dar,0x40);\r |
| 206 | pc=m68ki_cpu_p->pc;\r |
| 207 | *(unsigned int *)(cpu+0x44)=m68k_get_reg(NULL, M68K_REG_SR);\r |
| 208 | *(unsigned int *)(cpu+0x48)=m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET];\r |
| 209 | cpu[0x4c] = CPU_INT_LEVEL>>8;\r |
| 210 | cpu[0x4d] = CPU_STOPPED;\r |
| 211 | m68k_set_context(oldcontext);\r |
| 212 | #elif defined(EMU_F68K)\r |
| 213 | M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r |
| 214 | memcpy(cpu,context->dreg,0x40);\r |
| 215 | pc=context->pc;\r |
| 216 | *(unsigned int *)(cpu+0x44)=context->sr;\r |
| 217 | *(unsigned int *)(cpu+0x48)=context->asp;\r |
| 218 | cpu[0x4c] = context->interrupts[0];\r |
| 219 | cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r |
| 220 | #endif\r |
| 221 | \r |
| 222 | *(unsigned int *)(cpu+0x40)=pc;\r |
| 223 | }\r |
| 224 | \r |
| 225 | PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r |
| 226 | {\r |
| 227 | #if defined(EMU_C68K)\r |
| 228 | struct Cyclone *context = is_sub ? &PicoCpuCS68k : &PicoCpuCM68k;\r |
| 229 | CycloneSetSr(context, *(unsigned int *)(cpu+0x44));\r |
| 230 | context->osp=*(unsigned int *)(cpu+0x48);\r |
| 231 | memcpy(context->d,cpu,0x40);\r |
| 232 | context->membase = 0;\r |
| 233 | context->pc = *(unsigned int *)(cpu+0x40);\r |
| 234 | CycloneUnpack(context, NULL); // rebase PC\r |
| 235 | context->irq = cpu[0x4c];\r |
| 236 | context->state_flags = 0;\r |
| 237 | if (cpu[0x4d])\r |
| 238 | context->state_flags |= 1;\r |
| 239 | #elif defined(EMU_M68K)\r |
| 240 | void *oldcontext = m68ki_cpu_p;\r |
| 241 | m68k_set_context(is_sub ? &PicoCpuMS68k : &PicoCpuMM68k);\r |
| 242 | m68k_set_reg(M68K_REG_SR, *(unsigned int *)(cpu+0x44));\r |
| 243 | memcpy(m68ki_cpu_p->dar,cpu,0x40);\r |
| 244 | m68ki_cpu_p->pc=*(unsigned int *)(cpu+0x40);\r |
| 245 | m68ki_cpu_p->sp[m68ki_cpu_p->s_flag^SFLAG_SET]=*(unsigned int *)(cpu+0x48);\r |
| 246 | CPU_INT_LEVEL = cpu[0x4c] << 8;\r |
| 247 | CPU_STOPPED = cpu[0x4d];\r |
| 248 | m68k_set_context(oldcontext);\r |
| 249 | #elif defined(EMU_F68K)\r |
| 250 | M68K_CONTEXT *context = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r |
| 251 | memcpy(context->dreg,cpu,0x40);\r |
| 252 | context->pc =*(unsigned int *)(cpu+0x40);\r |
| 253 | context->sr =*(unsigned int *)(cpu+0x44);\r |
| 254 | context->asp=*(unsigned int *)(cpu+0x48);\r |
| 255 | context->interrupts[0] = cpu[0x4c];\r |
| 256 | context->execinfo &= ~FM68K_HALTED;\r |
| 257 | if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r |
| 258 | #endif\r |
| 259 | }\r |
| 260 | \r |
| 261 | \r |
| 262 | /* idle loop detection, not to be used in CD mode */\r |
| 263 | #ifdef EMU_C68K\r |
| 264 | #include "cpu/cyclone/tools/idle.h"\r |
| 265 | #endif\r |
| 266 | \r |
| 267 | static unsigned short **idledet_ptrs = NULL;\r |
| 268 | static int idledet_count = 0, idledet_bads = 0;\r |
| 269 | int idledet_start_frame = 0;\r |
| 270 | \r |
| 271 | #if 0\r |
| 272 | #define IDLE_STATS 1\r |
| 273 | unsigned int idlehit_addrs[128], idlehit_counts[128];\r |
| 274 | \r |
| 275 | void SekRegisterIdleHit(unsigned int pc)\r |
| 276 | {\r |
| 277 | int i;\r |
| 278 | for (i = 0; i < 127 && idlehit_addrs[i]; i++) {\r |
| 279 | if (idlehit_addrs[i] == pc) {\r |
| 280 | idlehit_counts[i]++;\r |
| 281 | return;\r |
| 282 | }\r |
| 283 | }\r |
| 284 | idlehit_addrs[i] = pc;\r |
| 285 | idlehit_counts[i] = 1;\r |
| 286 | idlehit_addrs[i+1] = 0;\r |
| 287 | }\r |
| 288 | #endif\r |
| 289 | \r |
| 290 | void SekInitIdleDet(void)\r |
| 291 | {\r |
| 292 | unsigned short **tmp = realloc(idledet_ptrs, 0x200*4);\r |
| 293 | if (tmp == NULL) {\r |
| 294 | free(idledet_ptrs);\r |
| 295 | idledet_ptrs = NULL;\r |
| 296 | }\r |
| 297 | else\r |
| 298 | idledet_ptrs = tmp;\r |
| 299 | idledet_count = idledet_bads = 0;\r |
| 300 | idledet_start_frame = Pico.m.frame_count + 360;\r |
| 301 | #ifdef IDLE_STATS\r |
| 302 | idlehit_addrs[0] = 0;\r |
| 303 | #endif\r |
| 304 | \r |
| 305 | #ifdef EMU_C68K\r |
| 306 | CycloneInitIdle();\r |
| 307 | #endif\r |
| 308 | #ifdef EMU_F68K\r |
| 309 | fm68k_emulate(0, 0, 1);\r |
| 310 | #endif\r |
| 311 | }\r |
| 312 | \r |
| 313 | int SekIsIdleCode(unsigned short *dst, int bytes)\r |
| 314 | {\r |
| 315 | // printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r |
| 316 | switch (bytes)\r |
| 317 | {\r |
| 318 | case 2:\r |
| 319 | if ((*dst & 0xf000) != 0x6000) // not another branch\r |
| 320 | return 1;\r |
| 321 | break;\r |
| 322 | case 4:\r |
| 323 | if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX) // there should be no need to wait\r |
| 324 | (*dst & 0xfff8) == 0x4a28 || // tst.b ($xxxx,a0) // for byte change anywhere\r |
| 325 | (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r |
| 326 | (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r |
| 327 | (*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r |
| 328 | return 1;\r |
| 329 | break;\r |
| 330 | case 6:\r |
| 331 | if ( ((dst[1] & 0xe0) == 0xe0 && ( // RAM and\r |
| 332 | *dst == 0x4a39 || // tst.b ($xxxxxxxx)\r |
| 333 | *dst == 0x4a79 || // tst.w ($xxxxxxxx)\r |
| 334 | *dst == 0x4ab9 || // tst.l ($xxxxxxxx)\r |
| 335 | (*dst & 0xc1ff) == 0x0039 || // move.x ($xxxxxxxx), dX\r |
| 336 | (*dst & 0xf13f) == 0xb039))||// cmp.x ($xxxxxxxx), dX\r |
| 337 | *dst == 0x0838 || // btst $X, ($xxxx.w) [6 byte op]\r |
| 338 | (*dst & 0xffbf) == 0x0c38) // cmpi.{b,w} $X, ($xxxx.w)\r |
| 339 | return 1;\r |
| 340 | break;\r |
| 341 | case 8:\r |
| 342 | if ( ((dst[2] & 0xe0) == 0xe0 && ( // RAM and\r |
| 343 | *dst == 0x0839 || // btst $X, ($xxxxxxxx.w) [8 byte op]\r |
| 344 | (*dst & 0xffbf) == 0x0c39))||// cmpi.{b,w} $X, ($xxxxxxxx)\r |
| 345 | *dst == 0x0cb8) // cmpi.l $X, ($xxxx.w)\r |
| 346 | return 1;\r |
| 347 | break;\r |
| 348 | case 12:\r |
| 349 | if ((*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r |
| 350 | (dst[1]&0xf100) == 0x0000 && // arithmetic\r |
| 351 | (dst[3]&0xf100) == 0x0000) // arithmetic\r |
| 352 | return 1;\r |
| 353 | break;\r |
| 354 | }\r |
| 355 | \r |
| 356 | return 0;\r |
| 357 | }\r |
| 358 | \r |
| 359 | int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx)\r |
| 360 | {\r |
| 361 | int is_main68k = 1;\r |
| 362 | u16 *target;\r |
| 363 | uptr v;\r |
| 364 | \r |
| 365 | #if defined(EMU_C68K)\r |
| 366 | struct Cyclone *cyc = ctx;\r |
| 367 | is_main68k = cyc == &PicoCpuCM68k;\r |
| 368 | pc -= cyc->membase;\r |
| 369 | #elif defined(EMU_F68K)\r |
| 370 | is_main68k = ctx == &PicoCpuFM68k;\r |
| 371 | #endif\r |
| 372 | pc &= ~0xff000000;\r |
| 373 | elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r |
| 374 | (newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r |
| 375 | \r |
| 376 | // XXX: probably shouldn't patch RAM too\r |
| 377 | v = m68k_read16_map[pc >> M68K_MEM_SHIFT];\r |
| 378 | if (!(v & 0x80000000))\r |
| 379 | target = (u16 *)((v << 1) + pc);\r |
| 380 | else {\r |
| 381 | if (++idledet_bads > 128)\r |
| 382 | return 2; // remove detector\r |
| 383 | return 1; // don't patch\r |
| 384 | }\r |
| 385 | \r |
| 386 | if (idledet_count >= 0x200 && (idledet_count & 0x1ff) == 0) {\r |
| 387 | unsigned short **tmp = realloc(idledet_ptrs, (idledet_count+0x200)*4);\r |
| 388 | if (tmp == NULL)\r |
| 389 | return 1;\r |
| 390 | idledet_ptrs = tmp;\r |
| 391 | }\r |
| 392 | \r |
| 393 | idledet_ptrs[idledet_count++] = target;\r |
| 394 | \r |
| 395 | return 0;\r |
| 396 | }\r |
| 397 | \r |
| 398 | void SekFinishIdleDet(void)\r |
| 399 | {\r |
| 400 | #ifdef EMU_C68K\r |
| 401 | CycloneFinishIdle();\r |
| 402 | #endif\r |
| 403 | #ifdef EMU_F68K\r |
| 404 | fm68k_emulate(0, 0, 2);\r |
| 405 | #endif\r |
| 406 | while (idledet_count > 0)\r |
| 407 | {\r |
| 408 | unsigned short *op = idledet_ptrs[--idledet_count];\r |
| 409 | if ((*op & 0xfd00) == 0x7100)\r |
| 410 | *op &= 0xff, *op |= 0x6600;\r |
| 411 | else if ((*op & 0xfd00) == 0x7500)\r |
| 412 | *op &= 0xff, *op |= 0x6700;\r |
| 413 | else if ((*op & 0xfd00) == 0x7d00)\r |
| 414 | *op &= 0xff, *op |= 0x6000;\r |
| 415 | else\r |
| 416 | elprintf(EL_STATUS|EL_IDLE, "idle: don't know how to restore %04x", *op);\r |
| 417 | }\r |
| 418 | }\r |
| 419 | \r |
| 420 | \r |
| 421 | #if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r |
| 422 | static unsigned char op_flags[0x400000/2] = { 0, };\r |
| 423 | static int atexit_set = 0;\r |
| 424 | \r |
| 425 | static void make_idc(void)\r |
| 426 | {\r |
| 427 | FILE *f = fopen("idc.idc", "w");\r |
| 428 | int i;\r |
| 429 | if (!f) return;\r |
| 430 | fprintf(f, "#include <idc.idc>\nstatic main() {\n");\r |
| 431 | for (i = 0; i < 0x400000/2; i++)\r |
| 432 | if (op_flags[i] != 0)\r |
| 433 | fprintf(f, " MakeCode(0x%06x);\n", i*2);\r |
| 434 | fprintf(f, "}\n");\r |
| 435 | fclose(f);\r |
| 436 | }\r |
| 437 | \r |
| 438 | void instruction_hook(void)\r |
| 439 | {\r |
| 440 | if (!atexit_set) {\r |
| 441 | atexit(make_idc);\r |
| 442 | atexit_set = 1;\r |
| 443 | }\r |
| 444 | if (REG_PC < 0x400000)\r |
| 445 | op_flags[REG_PC/2] = 1;\r |
| 446 | }\r |
| 447 | #endif\r |