| 1 | /* |
| 2 | * (C) GraÅžvydas "notaz" Ignotas, 2011 |
| 3 | * |
| 4 | * This work is licensed under the terms of any of these licenses |
| 5 | * (at your option): |
| 6 | * - GNU GPL, version 2 or later. |
| 7 | * - GNU LGPL, version 2.1 or later. |
| 8 | * See the COPYING file in the top-level directory. |
| 9 | */ |
| 10 | |
| 11 | #ifndef __GPULIB_GPU_H__ |
| 12 | #define __GPULIB_GPU_H__ |
| 13 | |
| 14 | #include <stdint.h> |
| 15 | |
| 16 | #ifdef __cplusplus |
| 17 | extern "C" { |
| 18 | #endif |
| 19 | |
| 20 | #define CMD_BUFFER_LEN 1024 |
| 21 | |
| 22 | #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ |
| 23 | #define HTOLE32(x) __builtin_bswap32(x) |
| 24 | #define HTOLE16(x) __builtin_bswap16(x) |
| 25 | #define LE32TOH(x) __builtin_bswap32(x) |
| 26 | #define LE16TOH(x) __builtin_bswap16(x) |
| 27 | #else |
| 28 | #define HTOLE32(x) (x) |
| 29 | #define HTOLE16(x) (x) |
| 30 | #define LE32TOH(x) (x) |
| 31 | #define LE16TOH(x) (x) |
| 32 | #endif |
| 33 | |
| 34 | #define BIT(x) (1 << (x)) |
| 35 | |
| 36 | #define PSX_GPU_STATUS_DHEIGHT BIT(19) |
| 37 | #define PSX_GPU_STATUS_RGB24 BIT(21) |
| 38 | #define PSX_GPU_STATUS_INTERLACE BIT(22) |
| 39 | #define PSX_GPU_STATUS_BLANKING BIT(23) |
| 40 | #define PSX_GPU_STATUS_IMG BIT(27) |
| 41 | #define PSX_GPU_STATUS_DMA(x) ((x) << 29) |
| 42 | #define PSX_GPU_STATUS_DMA_MASK (BIT(29) | BIT(30)) |
| 43 | |
| 44 | struct psx_gpu { |
| 45 | uint32_t cmd_buffer[CMD_BUFFER_LEN]; |
| 46 | uint32_t regs[16]; |
| 47 | uint16_t *vram; |
| 48 | uint32_t status; |
| 49 | uint32_t gp0; |
| 50 | uint32_t ex_regs[8]; |
| 51 | struct { |
| 52 | int hres, vres; |
| 53 | int x, y, w, h; |
| 54 | int x1, x2; |
| 55 | int y1, y2; |
| 56 | } screen; |
| 57 | struct { |
| 58 | int x, y, w, h; |
| 59 | short int offset, is_read; |
| 60 | } dma, dma_start; |
| 61 | int cmd_len; |
| 62 | uint32_t zero; |
| 63 | struct { |
| 64 | uint32_t fb_dirty:1; |
| 65 | uint32_t old_interlace:1; |
| 66 | uint32_t allow_interlace:2; |
| 67 | uint32_t blanked:1; |
| 68 | uint32_t enhancement_enable:1; |
| 69 | uint32_t enhancement_active:1; |
| 70 | uint32_t *frame_count; |
| 71 | uint32_t *hcnt; /* hsync count */ |
| 72 | struct { |
| 73 | uint32_t addr; |
| 74 | uint32_t cycles; |
| 75 | uint32_t frame; |
| 76 | uint32_t hcnt; |
| 77 | } last_list; |
| 78 | uint32_t last_vram_read_frame; |
| 79 | uint32_t w_out_old, h_out_old, status_vo_old; |
| 80 | } state; |
| 81 | struct { |
| 82 | int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */ |
| 83 | int32_t cnt:3; /* amount skipped in a row */ |
| 84 | uint32_t active:1; |
| 85 | uint32_t allow:1; |
| 86 | uint32_t frame_ready:1; |
| 87 | const int *advice; |
| 88 | uint32_t last_flip_frame; |
| 89 | uint32_t pending_fill[3]; |
| 90 | } frameskip; |
| 91 | uint16_t *(*get_enhancement_bufer) |
| 92 | (int *x, int *y, int *w, int *h, int *vram_h); |
| 93 | void *(*mmap)(unsigned int size); |
| 94 | void (*munmap)(void *ptr, unsigned int size); |
| 95 | }; |
| 96 | |
| 97 | extern struct psx_gpu gpu; |
| 98 | |
| 99 | extern const unsigned char cmd_lengths[256]; |
| 100 | |
| 101 | int do_cmd_list(uint32_t *list, int count, int *last_cmd); |
| 102 | |
| 103 | struct rearmed_cbs; |
| 104 | |
| 105 | int renderer_init(void); |
| 106 | void renderer_finish(void); |
| 107 | void renderer_sync_ecmds(uint32_t * ecmds); |
| 108 | void renderer_update_caches(int x, int y, int w, int h); |
| 109 | void renderer_flush_queues(void); |
| 110 | void renderer_set_interlace(int enable, int is_odd); |
| 111 | void renderer_set_config(const struct rearmed_cbs *config); |
| 112 | void renderer_notify_res_change(void); |
| 113 | |
| 114 | int vout_init(void); |
| 115 | int vout_finish(void); |
| 116 | void vout_update(void); |
| 117 | void vout_blank(void); |
| 118 | void vout_set_config(const struct rearmed_cbs *config); |
| 119 | |
| 120 | /* listing these here for correct linkage if rasterizer uses c++ */ |
| 121 | struct GPUFreeze; |
| 122 | |
| 123 | long GPUinit(void); |
| 124 | long GPUshutdown(void); |
| 125 | void GPUwriteDataMem(uint32_t *mem, int count); |
| 126 | long GPUdmaChain(uint32_t *rambase, uint32_t addr, uint32_t *progress_addr); |
| 127 | void GPUwriteData(uint32_t data); |
| 128 | void GPUreadDataMem(uint32_t *mem, int count); |
| 129 | uint32_t GPUreadData(void); |
| 130 | uint32_t GPUreadStatus(void); |
| 131 | void GPUwriteStatus(uint32_t data); |
| 132 | long GPUfreeze(uint32_t type, struct GPUFreeze *freeze); |
| 133 | void GPUupdateLace(void); |
| 134 | long GPUopen(void **dpy); |
| 135 | long GPUclose(void); |
| 136 | void GPUvBlank(int is_vblank, int lcf); |
| 137 | void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_); |
| 138 | |
| 139 | #ifdef __cplusplus |
| 140 | } |
| 141 | #endif |
| 142 | |
| 143 | #endif /* __GPULIB_GPU_H__ */ |