| 1 | /*************************************************************************** |
| 2 | * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team * |
| 3 | * * |
| 4 | * This program is free software; you can redistribute it and/or modify * |
| 5 | * it under the terms of the GNU General Public License as published by * |
| 6 | * the Free Software Foundation; either version 2 of the License, or * |
| 7 | * (at your option) any later version. * |
| 8 | * * |
| 9 | * This program is distributed in the hope that it will be useful, * |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
| 12 | * GNU General Public License for more details. * |
| 13 | * * |
| 14 | * You should have received a copy of the GNU General Public License * |
| 15 | * along with this program; if not, write to the * |
| 16 | * Free Software Foundation, Inc., * |
| 17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. * |
| 18 | ***************************************************************************/ |
| 19 | |
| 20 | /* |
| 21 | * Handles PSX DMA functions. |
| 22 | */ |
| 23 | |
| 24 | #include "psxdma.h" |
| 25 | #include "gpu.h" |
| 26 | |
| 27 | #ifndef min |
| 28 | #define min(a, b) ((b) < (a) ? (b) : (a)) |
| 29 | #endif |
| 30 | #ifndef PSXDMA_LOG |
| 31 | #define PSXDMA_LOG(...) |
| 32 | #endif |
| 33 | |
| 34 | // Dma0/1 in Mdec.c |
| 35 | // Dma3 in CdRom.c |
| 36 | |
| 37 | void spuInterrupt() { |
| 38 | if (HW_DMA4_CHCR & SWAP32(0x01000000)) |
| 39 | { |
| 40 | HW_DMA4_CHCR &= SWAP32(~0x01000000); |
| 41 | DMA_INTERRUPT(4); |
| 42 | } |
| 43 | } |
| 44 | |
| 45 | void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU |
| 46 | u32 words, words_max = 0, words_copy; |
| 47 | u16 *ptr; |
| 48 | |
| 49 | madr &= ~3; |
| 50 | ptr = getDmaRam(madr, &words_max); |
| 51 | if (ptr == INVALID_PTR) |
| 52 | log_unhandled("bad dma4 madr %x\n", madr); |
| 53 | |
| 54 | words = words_copy = (bcr >> 16) * (bcr & 0xffff); |
| 55 | if (words_copy > words_max) { |
| 56 | log_unhandled("bad dma4 madr %x bcr %x\n", madr, bcr); |
| 57 | words_copy = words_max; |
| 58 | } |
| 59 | |
| 60 | switch (chcr) { |
| 61 | case 0x01000201: //cpu to spu transfer |
| 62 | PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr); |
| 63 | if (ptr == INVALID_PTR) |
| 64 | break; |
| 65 | SPU_writeDMAMem(ptr, words_copy * 2, psxRegs.cycle); |
| 66 | HW_DMA4_MADR = SWAPu32(madr + words_copy * 2); |
| 67 | // This should be much slower, like 12+ cycles/byte, it's like |
| 68 | // that because the CPU runs too fast and fifo is not emulated. |
| 69 | // See also set_dma_end(). |
| 70 | set_event(PSXINT_SPUDMA, words * 4 * 4); |
| 71 | return; |
| 72 | |
| 73 | case 0x01000200: //spu to cpu transfer |
| 74 | PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr); |
| 75 | if (ptr == INVALID_PTR) |
| 76 | break; |
| 77 | SPU_readDMAMem(ptr, words_copy * 2, psxRegs.cycle); |
| 78 | psxCpu->Clear(madr, words_copy); |
| 79 | |
| 80 | HW_DMA4_MADR = SWAPu32(madr + words_copy * 4); |
| 81 | set_event(PSXINT_SPUDMA, words * 4 * 4); |
| 82 | return; |
| 83 | |
| 84 | default: |
| 85 | log_unhandled("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr); |
| 86 | break; |
| 87 | } |
| 88 | |
| 89 | HW_DMA4_CHCR &= SWAP32(~0x01000000); |
| 90 | DMA_INTERRUPT(4); |
| 91 | } |
| 92 | |
| 93 | // Taken from PEOPS SOFTGPU |
| 94 | static inline boolean CheckForEndlessLoop(u32 laddr, u32 *lUsedAddr) { |
| 95 | if (laddr == lUsedAddr[1]) return TRUE; |
| 96 | if (laddr == lUsedAddr[2]) return TRUE; |
| 97 | |
| 98 | if (laddr < lUsedAddr[0]) lUsedAddr[1] = laddr; |
| 99 | else lUsedAddr[2] = laddr; |
| 100 | |
| 101 | lUsedAddr[0] = laddr; |
| 102 | |
| 103 | return FALSE; |
| 104 | } |
| 105 | |
| 106 | static u32 gpuDmaChainSize(u32 addr) { |
| 107 | u32 size; |
| 108 | u32 DMACommandCounter = 0; |
| 109 | u32 lUsedAddr[3]; |
| 110 | |
| 111 | lUsedAddr[0] = lUsedAddr[1] = lUsedAddr[2] = 0xffffff; |
| 112 | |
| 113 | // initial linked list ptr (word) |
| 114 | size = 1; |
| 115 | |
| 116 | do { |
| 117 | addr &= 0x1ffffc; |
| 118 | |
| 119 | if (DMACommandCounter++ > 2000000) break; |
| 120 | if (CheckForEndlessLoop(addr, lUsedAddr)) break; |
| 121 | |
| 122 | // # 32-bit blocks to transfer |
| 123 | size += psxMu8( addr + 3 ); |
| 124 | |
| 125 | // next 32-bit pointer |
| 126 | addr = psxMu32( addr & ~0x3 ) & 0xffffff; |
| 127 | size += 1; |
| 128 | } while (!(addr & 0x800000)); // contrary to some documentation, the end-of-linked-list marker is not actually 0xFF'FFFF |
| 129 | // any pointer with bit 23 set will do. |
| 130 | |
| 131 | return size; |
| 132 | } |
| 133 | |
| 134 | void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU |
| 135 | u32 *ptr, madr_next, *madr_next_p, size; |
| 136 | u32 words, words_left, words_max, words_copy; |
| 137 | int do_walking; |
| 138 | |
| 139 | madr &= ~3; |
| 140 | switch (chcr) { |
| 141 | case 0x01000200: // vram2mem |
| 142 | PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); |
| 143 | ptr = getDmaRam(madr, &words_max); |
| 144 | if (ptr == INVALID_PTR) { |
| 145 | log_unhandled("bad dma2 madr %x\n", madr); |
| 146 | break; |
| 147 | } |
| 148 | // BA blocks * BS words (word = 32-bits) |
| 149 | words = words_copy = (bcr >> 16) * (bcr & 0xffff); |
| 150 | if (words > words_max) { |
| 151 | log_unhandled("bad dma2 madr %x bcr %x\n", madr, bcr); |
| 152 | words_copy = words_max; |
| 153 | } |
| 154 | GPU_readDataMem(ptr, words_copy); |
| 155 | psxCpu->Clear(madr, words_copy); |
| 156 | |
| 157 | HW_DMA2_MADR = SWAPu32(madr + words_copy * 4); |
| 158 | |
| 159 | // careful: gpu_state_change() also messes with this |
| 160 | psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16; |
| 161 | // already 32-bit word size ((size * 4) / 4) |
| 162 | set_event(PSXINT_GPUDMA, words / 4); |
| 163 | return; |
| 164 | |
| 165 | case 0x01000201: // mem2vram |
| 166 | PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); |
| 167 | words = words_left = (bcr >> 16) * (bcr & 0xffff); |
| 168 | while (words_left > 0) { |
| 169 | ptr = getDmaRam(madr, &words_max); |
| 170 | if (ptr == INVALID_PTR) { |
| 171 | log_unhandled("bad2 dma madr %x\n", madr); |
| 172 | break; |
| 173 | } |
| 174 | words_copy = min(words_left, words_max); |
| 175 | GPU_writeDataMem(ptr, words_copy); |
| 176 | words_left -= words_copy; |
| 177 | madr += words_copy * 4; |
| 178 | } |
| 179 | |
| 180 | HW_DMA2_MADR = SWAPu32(madr); |
| 181 | |
| 182 | // careful: gpu_state_change() also messes with this |
| 183 | psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16; |
| 184 | // already 32-bit word size ((size * 4) / 4) |
| 185 | set_event(PSXINT_GPUDMA, words / 4); |
| 186 | return; |
| 187 | |
| 188 | case 0x01000401: // dma chain |
| 189 | PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); |
| 190 | // when not emulating walking progress, end immediately |
| 191 | madr_next = 0xffffff; |
| 192 | |
| 193 | do_walking = Config.GpuListWalking; |
| 194 | if (do_walking < 0 || Config.hacks.gpu_timing1024) |
| 195 | do_walking = Config.hacks.gpu_slow_list_walking; |
| 196 | madr_next_p = do_walking ? &madr_next : NULL; |
| 197 | |
| 198 | size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, madr_next_p); |
| 199 | if ((int)size <= 0) |
| 200 | size = gpuDmaChainSize(madr); |
| 201 | |
| 202 | HW_DMA2_MADR = SWAPu32(madr_next); |
| 203 | |
| 204 | // a hack for Judge Dredd which is annoyingly sensitive to timing |
| 205 | if (Config.hacks.gpu_timing1024) |
| 206 | size = 1024; |
| 207 | |
| 208 | psxRegs.gpuIdleAfter = psxRegs.cycle + size + 16; |
| 209 | set_event(PSXINT_GPUDMA, size); |
| 210 | return; |
| 211 | |
| 212 | default: |
| 213 | log_unhandled("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr); |
| 214 | break; |
| 215 | } |
| 216 | |
| 217 | HW_DMA2_CHCR &= SWAP32(~0x01000000); |
| 218 | DMA_INTERRUPT(2); |
| 219 | } |
| 220 | |
| 221 | void gpuInterrupt() { |
| 222 | if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000))) |
| 223 | { |
| 224 | u32 size, madr_next = 0xffffff, madr = SWAPu32(HW_DMA2_MADR); |
| 225 | size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, &madr_next); |
| 226 | HW_DMA2_MADR = SWAPu32(madr_next); |
| 227 | psxRegs.gpuIdleAfter = psxRegs.cycle + size + 64; |
| 228 | set_event(PSXINT_GPUDMA, size); |
| 229 | return; |
| 230 | } |
| 231 | if (HW_DMA2_CHCR & SWAP32(0x01000000)) |
| 232 | { |
| 233 | HW_DMA2_CHCR &= SWAP32(~0x01000000); |
| 234 | DMA_INTERRUPT(2); |
| 235 | } |
| 236 | } |
| 237 | |
| 238 | void psxDma6(u32 madr, u32 bcr, u32 chcr) { |
| 239 | u32 words, words_max; |
| 240 | u32 *mem; |
| 241 | |
| 242 | PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr); |
| 243 | |
| 244 | if (chcr == 0x11000002) { |
| 245 | madr &= ~3; |
| 246 | mem = getDmaRam(madr, &words_max); |
| 247 | if (mem == INVALID_PTR) { |
| 248 | log_unhandled("bad6 dma madr %x\n", madr); |
| 249 | HW_DMA6_CHCR &= SWAP32(~0x11000000); |
| 250 | DMA_INTERRUPT(6); |
| 251 | return; |
| 252 | } |
| 253 | |
| 254 | // already 32-bit size |
| 255 | words = bcr; |
| 256 | |
| 257 | while (bcr-- && mem > (u32 *)psxM) { |
| 258 | *mem-- = SWAP32((madr - 4) & 0xffffff); |
| 259 | madr -= 4; |
| 260 | } |
| 261 | *++mem = SWAP32(0xffffff); |
| 262 | |
| 263 | // halted |
| 264 | psxRegs.cycle += words; |
| 265 | set_event(PSXINT_GPUOTCDMA, 16); |
| 266 | return; |
| 267 | } |
| 268 | else { |
| 269 | // Unknown option |
| 270 | log_unhandled("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr); |
| 271 | } |
| 272 | |
| 273 | HW_DMA6_CHCR &= SWAP32(~0x11000000); |
| 274 | DMA_INTERRUPT(6); |
| 275 | } |
| 276 | |
| 277 | void gpuotcInterrupt() |
| 278 | { |
| 279 | if (HW_DMA6_CHCR & SWAP32(0x01000000)) |
| 280 | { |
| 281 | HW_DMA6_CHCR &= SWAP32(~0x11000000); |
| 282 | DMA_INTERRUPT(6); |
| 283 | } |
| 284 | } |