| 1 | /*************************************************************************** |
| 2 | * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team * |
| 3 | * * |
| 4 | * This program is free software; you can redistribute it and/or modify * |
| 5 | * it under the terms of the GNU General Public License as published by * |
| 6 | * the Free Software Foundation; either version 2 of the License, or * |
| 7 | * (at your option) any later version. * |
| 8 | * * |
| 9 | * This program is distributed in the hope that it will be useful, * |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
| 12 | * GNU General Public License for more details. * |
| 13 | * * |
| 14 | * You should have received a copy of the GNU General Public License * |
| 15 | * along with this program; if not, write to the * |
| 16 | * Free Software Foundation, Inc., * |
| 17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. * |
| 18 | ***************************************************************************/ |
| 19 | |
| 20 | /* |
| 21 | * R3000A CPU functions. |
| 22 | */ |
| 23 | |
| 24 | #include "r3000a.h" |
| 25 | #include "cdrom.h" |
| 26 | #include "mdec.h" |
| 27 | #include "gte.h" |
| 28 | #include "psxinterpreter.h" |
| 29 | |
| 30 | R3000Acpu *psxCpu = NULL; |
| 31 | #ifdef DRC_DISABLE |
| 32 | psxRegisters psxRegs; |
| 33 | #endif |
| 34 | |
| 35 | int psxInit() { |
| 36 | SysPrintf(_("Running PCSX Version %s (%s).\n"), PCSX_VERSION, __DATE__); |
| 37 | |
| 38 | #ifndef DRC_DISABLE |
| 39 | if (Config.Cpu == CPU_INTERPRETER) { |
| 40 | psxCpu = &psxInt; |
| 41 | } else psxCpu = &psxRec; |
| 42 | #else |
| 43 | Config.Cpu = CPU_INTERPRETER; |
| 44 | psxCpu = &psxInt; |
| 45 | #endif |
| 46 | |
| 47 | Log = 0; |
| 48 | |
| 49 | if (psxMemInit() == -1) return -1; |
| 50 | |
| 51 | return psxCpu->Init(); |
| 52 | } |
| 53 | |
| 54 | void psxReset() { |
| 55 | psxMemReset(); |
| 56 | |
| 57 | memset(&psxRegs, 0, sizeof(psxRegs)); |
| 58 | |
| 59 | psxRegs.pc = 0xbfc00000; // Start in bootstrap |
| 60 | |
| 61 | psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1 |
| 62 | psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A |
| 63 | |
| 64 | psxCpu->Reset(); |
| 65 | |
| 66 | psxHwReset(); |
| 67 | psxBiosInit(); |
| 68 | |
| 69 | if (!Config.HLE) |
| 70 | psxExecuteBios(); |
| 71 | |
| 72 | #ifdef EMU_LOG |
| 73 | EMU_LOG("*BIOS END*\n"); |
| 74 | #endif |
| 75 | Log = 0; |
| 76 | } |
| 77 | |
| 78 | void psxShutdown() { |
| 79 | psxBiosShutdown(); |
| 80 | |
| 81 | psxCpu->Shutdown(); |
| 82 | |
| 83 | psxMemShutdown(); |
| 84 | } |
| 85 | |
| 86 | void psxException(u32 code, u32 bd) { |
| 87 | psxRegs.code = fetch(psxRegs.pc); |
| 88 | |
| 89 | if (!Config.HLE && ((((psxRegs.code) >> 24) & 0xfe) == 0x4a)) { |
| 90 | // "hokuto no ken" / "Crash Bandicot 2" ... |
| 91 | // BIOS does not allow to return to GTE instructions |
| 92 | // (just skips it, supposedly because it's scheduled already) |
| 93 | // so we execute it here |
| 94 | extern void (*psxCP2[64])(void *cp2regs); |
| 95 | psxCP2[psxRegs.code & 0x3f](&psxRegs.CP2D); |
| 96 | } |
| 97 | |
| 98 | // Set the Cause |
| 99 | psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) | code; |
| 100 | |
| 101 | // Set the EPC & PC |
| 102 | if (bd) { |
| 103 | #ifdef PSXCPU_LOG |
| 104 | PSXCPU_LOG("bd set!!!\n"); |
| 105 | #endif |
| 106 | psxRegs.CP0.n.Cause |= 0x80000000; |
| 107 | psxRegs.CP0.n.EPC = (psxRegs.pc - 4); |
| 108 | } else |
| 109 | psxRegs.CP0.n.EPC = (psxRegs.pc); |
| 110 | |
| 111 | if (psxRegs.CP0.n.Status & 0x400000) |
| 112 | psxRegs.pc = 0xbfc00180; |
| 113 | else |
| 114 | psxRegs.pc = 0x80000080; |
| 115 | |
| 116 | // Set the Status |
| 117 | psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) | |
| 118 | ((psxRegs.CP0.n.Status & 0xf) << 2); |
| 119 | |
| 120 | if (Config.HLE) psxBiosException(); |
| 121 | } |
| 122 | |
| 123 | void psxBranchTest() { |
| 124 | if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter) |
| 125 | psxRcntUpdate(); |
| 126 | |
| 127 | if (psxRegs.interrupt) { |
| 128 | if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio |
| 129 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) { |
| 130 | psxRegs.interrupt &= ~(1 << PSXINT_SIO); |
| 131 | sioInterrupt(); |
| 132 | } |
| 133 | } |
| 134 | if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr |
| 135 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) { |
| 136 | psxRegs.interrupt &= ~(1 << PSXINT_CDR); |
| 137 | cdrInterrupt(); |
| 138 | } |
| 139 | } |
| 140 | if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read |
| 141 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) { |
| 142 | psxRegs.interrupt &= ~(1 << PSXINT_CDREAD); |
| 143 | cdrReadInterrupt(); |
| 144 | } |
| 145 | } |
| 146 | if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma |
| 147 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) { |
| 148 | psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA); |
| 149 | gpuInterrupt(); |
| 150 | } |
| 151 | } |
| 152 | if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma |
| 153 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) { |
| 154 | psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA); |
| 155 | mdec1Interrupt(); |
| 156 | } |
| 157 | } |
| 158 | if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma |
| 159 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) { |
| 160 | psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA); |
| 161 | spuInterrupt(); |
| 162 | } |
| 163 | } |
| 164 | if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in |
| 165 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) { |
| 166 | psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA); |
| 167 | mdec0Interrupt(); |
| 168 | } |
| 169 | } |
| 170 | if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc |
| 171 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) { |
| 172 | psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA); |
| 173 | gpuotcInterrupt(); |
| 174 | } |
| 175 | } |
| 176 | if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom |
| 177 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) { |
| 178 | psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA); |
| 179 | cdrDmaInterrupt(); |
| 180 | } |
| 181 | } |
| 182 | if (psxRegs.interrupt & (1 << PSXINT_CDRPLAY)) { // cdr play timing |
| 183 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRPLAY].sCycle) >= psxRegs.intCycle[PSXINT_CDRPLAY].cycle) { |
| 184 | psxRegs.interrupt &= ~(1 << PSXINT_CDRPLAY); |
| 185 | cdrPlayInterrupt(); |
| 186 | } |
| 187 | } |
| 188 | if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states |
| 189 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) { |
| 190 | psxRegs.interrupt &= ~(1 << PSXINT_CDRLID); |
| 191 | cdrLidSeekInterrupt(); |
| 192 | } |
| 193 | } |
| 194 | if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update |
| 195 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) { |
| 196 | psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE); |
| 197 | spuUpdate(); |
| 198 | } |
| 199 | } |
| 200 | } |
| 201 | |
| 202 | if (psxHu32(0x1070) & psxHu32(0x1074)) { |
| 203 | if ((psxRegs.CP0.n.Status & 0x401) == 0x401) { |
| 204 | #ifdef PSXCPU_LOG |
| 205 | PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074)); |
| 206 | #endif |
| 207 | // SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074)); |
| 208 | psxException(0x400, 0); |
| 209 | } |
| 210 | } |
| 211 | } |
| 212 | |
| 213 | void psxJumpTest() { |
| 214 | if (!Config.HLE && Config.PsxOut) { |
| 215 | u32 call = psxRegs.GPR.n.t1 & 0xff; |
| 216 | switch (psxRegs.pc & 0x1fffff) { |
| 217 | case 0xa0: |
| 218 | #ifdef PSXBIOS_LOG |
| 219 | if (call != 0x28 && call != 0xe) { |
| 220 | PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); } |
| 221 | #endif |
| 222 | if (biosA0[call]) |
| 223 | biosA0[call](); |
| 224 | break; |
| 225 | case 0xb0: |
| 226 | #ifdef PSXBIOS_LOG |
| 227 | if (call != 0x17 && call != 0xb) { |
| 228 | PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); } |
| 229 | #endif |
| 230 | if (biosB0[call]) |
| 231 | biosB0[call](); |
| 232 | break; |
| 233 | case 0xc0: |
| 234 | #ifdef PSXBIOS_LOG |
| 235 | PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); |
| 236 | #endif |
| 237 | if (biosC0[call]) |
| 238 | biosC0[call](); |
| 239 | break; |
| 240 | } |
| 241 | } |
| 242 | } |
| 243 | |
| 244 | void psxExecuteBios() { |
| 245 | while (psxRegs.pc != 0x80030000) |
| 246 | psxCpu->ExecuteBlock(); |
| 247 | } |
| 248 | |