platform ps2, handle audio similar to psp
[picodrive.git] / sh2 / sh2.c
... / ...
CommitLineData
1/*
2 * PicoDrive
3 * (C) notaz, 2009,2010
4 *
5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
7 */
8#include <string.h>
9#include <stddef.h>
10
11#include "sh2.h"
12#include "../debug.h"
13#include "compiler.h"
14
15#define I 0xf0
16
17int sh2_init(SH2 *sh2, int is_slave, SH2 *other_sh2)
18{
19 int ret = 0;
20 unsigned int mult_m68k_to_sh2 = sh2->mult_m68k_to_sh2;
21 unsigned int mult_sh2_to_m68k = sh2->mult_sh2_to_m68k;
22
23 memset(sh2, 0, sizeof(*sh2));
24 sh2->is_slave = is_slave;
25 sh2->other_sh2 = other_sh2;
26 sh2->mult_m68k_to_sh2 = mult_m68k_to_sh2;
27 sh2->mult_sh2_to_m68k = mult_sh2_to_m68k;
28
29 pdb_register_cpu(sh2, PDBCT_SH2, is_slave ? "ssh2" : "msh2");
30#ifdef DRC_SH2
31 ret = sh2_drc_init(sh2);
32#endif
33 return ret;
34}
35
36void sh2_finish(SH2 *sh2)
37{
38#ifdef DRC_SH2
39 sh2_drc_finish(sh2);
40#endif
41}
42
43void sh2_reset(SH2 *sh2)
44{
45 sh2->pc = p32x_sh2_read32(0, sh2);
46 sh2->r[15] = p32x_sh2_read32(4, sh2);
47 sh2->sr = I;
48 sh2->vbr = 0;
49 sh2->pending_int_irq = 0;
50}
51
52void sh2_do_irq(SH2 *sh2, int level, int vector)
53{
54 sh2->sr &= 0x3f3;
55
56 sh2->r[15] -= 4;
57 p32x_sh2_write32(sh2->r[15], sh2->sr, sh2); /* push SR onto stack */
58 sh2->r[15] -= 4;
59 p32x_sh2_write32(sh2->r[15], sh2->pc, sh2); /* push PC onto stack */
60
61 /* set I flags in SR */
62 sh2->sr = (sh2->sr & ~I) | (level << 4);
63
64 /* fetch PC */
65 sh2->pc = p32x_sh2_read32(sh2->vbr + vector * 4, sh2);
66
67 /* 13 cycles at best */
68 sh2->icount -= 13;
69}
70
71int sh2_irl_irq(SH2 *sh2, int level, int nested_call)
72{
73 int taken;
74
75 sh2->pending_irl = level;
76 if (level < sh2->pending_int_irq)
77 level = sh2->pending_int_irq;
78 sh2->pending_level = level;
79
80 taken = (level > ((sh2->sr >> 4) & 0x0f));
81 if (taken) {
82 if (!nested_call) {
83 // not in memhandler, so handle this now (recompiler friendly)
84 // do this to avoid missing irqs that other SH2 might clear
85 int vector = sh2->irq_callback(sh2, level);
86 sh2_do_irq(sh2, level, vector);
87 sh2->m68krcycles_done += C_SH2_TO_M68K(*sh2, 13);
88 }
89 else
90 sh2->test_irq = 1;
91 }
92 return taken;
93}
94
95void sh2_internal_irq(SH2 *sh2, int level, int vector)
96{
97 // FIXME: multiple internal irqs not handled..
98 // assuming internal irqs never clear until accepted
99 sh2->pending_int_irq = level;
100 sh2->pending_int_vector = vector;
101 if (level > sh2->pending_level)
102 sh2->pending_level = level;
103
104 sh2->test_irq = 1;
105}
106
107#define SH2_REG_SIZE (offsetof(SH2, macl) + sizeof(sh2->macl))
108
109void sh2_pack(const SH2 *sh2, unsigned char *buff)
110{
111 unsigned int *p;
112
113 memcpy(buff, sh2, SH2_REG_SIZE);
114 p = (void *)(buff + SH2_REG_SIZE);
115
116 p[0] = sh2->pending_int_irq;
117 p[1] = sh2->pending_int_vector;
118}
119
120void sh2_unpack(SH2 *sh2, const unsigned char *buff)
121{
122 unsigned int *p;
123
124 memcpy(sh2, buff, SH2_REG_SIZE);
125 p = (void *)(buff + SH2_REG_SIZE);
126
127 sh2->pending_int_irq = p[0];
128 sh2->pending_int_vector = p[1];
129 sh2->test_irq = 1;
130}
131
132#ifdef DRC_CMP
133
134/* trace/compare */
135#include <stdio.h>
136#include <stdlib.h>
137#include <pico/memory.h>
138#undef _USE_CZ80 // HACK
139#include <pico/pico_int.h>
140#include <pico/debug.h>
141
142static SH2 sh2ref[2];
143static unsigned int mem_val;
144
145static unsigned int local_read32(SH2 *sh2, u32 a)
146{
147 const sh2_memmap *sh2_map = sh2->read16_map;
148 u16 *pd;
149 uptr p;
150
151 sh2_map += (a >> 25);
152 p = sh2_map->addr;
153 if (!map_flag_set(p)) {
154 pd = (u16 *)((p << 1) + ((a & sh2_map->mask) & ~1));
155 return (pd[0] << 16) | pd[1];
156 }
157
158 if ((a & 0xfffff000) == 0xc0000000) {
159 // data array
160 pd = (u16 *)sh2->data_array + (a & 0xfff) / 2;
161 return (pd[0] << 16) | pd[1];
162 }
163 if ((a & 0xdfffffc0) == 0x4000) {
164 pd = &Pico32x.regs[(a & 0x3f) / 2];
165 return (pd[0] << 16) | pd[1];
166 }
167 if ((a & 0xdffffe00) == 0x4200) {
168 pd = &Pico32xMem->pal[(a & 0x1ff) / 2];
169 return (pd[0] << 16) | pd[1];
170 }
171
172 return 0;
173}
174
175void do_sh2_trace(SH2 *current, int cycles)
176{
177 static int current_slave = -1;
178 static u32 current_m68k_pc;
179 SH2 *sh2o = &sh2ref[current->is_slave];
180 u32 *regs_a = (void *)current;
181 u32 *regs_o = (void *)sh2o;
182 unsigned char v;
183 u32 val;
184 int i;
185
186 if (SekPc != current_m68k_pc) {
187 current_m68k_pc = SekPc;
188 tl_write_uint(CTL_M68KPC, current_m68k_pc);
189 }
190
191 if (current->is_slave != current_slave) {
192 current_slave = current->is_slave;
193 v = CTL_MASTERSLAVE | current->is_slave;
194 tl_write(&v, sizeof(v));
195 }
196
197 for (i = 0; i < offsetof(SH2, read8_map) / 4; i++) {
198 if (i == 17) // ppc
199 continue;
200 if (regs_a[i] != regs_o[i]) {
201 tl_write_uint(CTL_SH2_R + i, regs_a[i]);
202 regs_o[i] = regs_a[i];
203 }
204 }
205
206 if (current->ea != sh2o->ea) {
207 tl_write_uint(CTL_EA, current->ea);
208 sh2o->ea = current->ea;
209 }
210 val = local_read32(current, current->ea);
211 if (mem_val != val) {
212 tl_write_uint(CTL_EAVAL, val);
213 mem_val = val;
214 }
215 tl_write_uint(CTL_CYCLES, cycles);
216}
217
218static const char *regnames[] = {
219 "r0", "r1", "r2", "r3",
220 "r4", "r5", "r6", "r7",
221 "r8", "r9", "r10", "r11",
222 "r12", "r13", "r14", "r15",
223 "pc", "ppc", "pr", "sr",
224 "gbr", "vbr", "mach","macl",
225};
226
227static void dump_regs(SH2 *sh2)
228{
229 char csh2;
230 int i;
231
232 csh2 = sh2->is_slave ? 's' : 'm';
233 for (i = 0; i < 16/2; i++)
234 printf("%csh2 r%d: %08x r%02d: %08x\n", csh2,
235 i, sh2->r[i], i+8, sh2->r[i+8]);
236 printf("%csh2 PC: %08x , %08x\n", csh2, sh2->pc, sh2->ppc);
237 printf("%csh2 SR: %03x PR: %08x\n", csh2, sh2->sr, sh2->pr);
238}
239
240void do_sh2_cmp(SH2 *current)
241{
242 static int current_slave;
243 static u32 current_val;
244 SH2 *sh2o = &sh2ref[current->is_slave];
245 u32 *regs_a = (void *)current;
246 u32 *regs_o = (void *)sh2o;
247 unsigned char code;
248 int cycles_o = 666;
249 u32 sr, val;
250 int bad = 0;
251 int cycles;
252 int i, ret;
253
254 sh2ref[1].is_slave = 1;
255
256 while (1) {
257 ret = tl_read(&code, 1);
258 if (ret <= 0)
259 break;
260 if (code == CTL_CYCLES) {
261 tl_read(&cycles_o, 4);
262 break;
263 }
264
265 switch (code) {
266 case CTL_MASTERSLAVE:
267 case CTL_MASTERSLAVE + 1:
268 current_slave = code & 1;
269 break;
270 case CTL_EA:
271 tl_read_uint(&sh2o->ea);
272 break;
273 case CTL_EAVAL:
274 tl_read_uint(&current_val);
275 break;
276 case CTL_M68KPC:
277 tl_read_uint(&val);
278 if (SekPc != val) {
279 printf("m68k: %08x %08x\n", SekPc, val);
280 bad = 1;
281 }
282 break;
283 default:
284 if (CTL_SH2_R <= code && code < CTL_SH2_R +
285 offsetof(SH2, read8_map) / 4)
286 {
287 tl_read_uint(regs_o + code - CTL_SH2_R);
288 }
289 else
290 {
291 printf("wrong code: %02x\n", code);
292 goto end;
293 }
294 break;
295 }
296 }
297
298 if (ret <= 0) {
299 printf("EOF?\n");
300 goto end;
301 }
302
303 if (current->is_slave != current_slave) {
304 printf("bad slave: %d %d\n", current->is_slave,
305 current_slave);
306 bad = 1;
307 }
308
309 for (i = 0; i < offsetof(SH2, read8_map) / 4; i++) {
310 if (i == 17 || i == 19) // ppc, sr
311 continue;
312 if (regs_a[i] != regs_o[i]) {
313 printf("bad %4s: %08x %08x\n",
314 regnames[i], regs_a[i], regs_o[i]);
315 bad = 1;
316 }
317 }
318
319 sr = current->sr & 0x3f3;
320 cycles = (signed int)current->sr >> 12;
321
322 if (sr != sh2o->sr) {
323 printf("bad SR: %03x %03x\n", sr, sh2o->sr);
324 bad = 1;
325 }
326
327 if (cycles != cycles_o) {
328 printf("bad cycles: %d %d\n", cycles, cycles_o);
329 bad = 1;
330 }
331
332 val = local_read32(current, sh2o->ea);
333 if (val != current_val) {
334 printf("bad val @%08x: %08x %08x\n", sh2o->ea, val, current_val);
335 bad = 1;
336 }
337
338 if (!bad) {
339 sh2o->ppc = current->pc;
340 return;
341 }
342
343end:
344 printf("--\n");
345 dump_regs(sh2o);
346 if (current->is_slave != current_slave)
347 dump_regs(&sh2ref[current->is_slave ^ 1]);
348 PDebugDumpMem();
349 exit(1);
350}
351
352#endif // DRC_CMP