1 @ vim:filetype=armasm
\r
3 @ memory handlers with banking support for SSF II - The New Challengers
\r
4 @ mostly based on Gens code
\r
6 @ (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
\r
7 @ All Rights Reserved
\r
10 .include "port_config.s"
\r
14 @ default jump tables
\r
17 .long m_read8_rom0 @ 0x000000 - 0x07FFFF
\r
18 .long m_read8_rom1 @ 0x080000 - 0x0FFFFF
\r
19 .long m_read8_rom2 @ 0x100000 - 0x17FFFF
\r
20 .long m_read8_rom3 @ 0x180000 - 0x1FFFFF
\r
21 .long m_read8_rom4 @ 0x200000 - 0x27FFFF
\r
22 .long m_read8_rom5 @ 0x280000 - 0x2FFFFF
\r
23 .long m_read8_rom6 @ 0x300000 - 0x37FFFF
\r
24 .long m_read8_rom7 @ 0x380000 - 0x3FFFFF
\r
25 .long m_read8_rom8 @ 0x400000 - 0x47FFFF - for all those large ROM hacks
\r
26 .long m_read8_rom9 @ 0x480000 - 0x4FFFFF
\r
27 .long m_read8_romA @ 0x500000 - 0x57FFFF
\r
28 .long m_read8_romB @ 0x580000 - 0x5FFFFF
\r
29 .long m_read8_romC @ 0x600000 - 0x67FFFF
\r
30 .long m_read8_romD @ 0x680000 - 0x6FFFFF
\r
31 .long m_read8_romE @ 0x700000 - 0x77FFFF
\r
32 .long m_read8_romF @ 0x780000 - 0x7FFFFF
\r
33 .long m_read8_rom10 @ 0x800000 - 0x87FFFF
\r
34 .long m_read8_rom11 @ 0x880000 - 0x8FFFFF
\r
35 .long m_read8_rom12 @ 0x900000 - 0x97FFFF
\r
36 .long m_read8_rom13 @ 0x980000 - 0x9FFFFF
\r
37 .long m_read8_misc @ 0xA00000 - 0xA7FFFF
\r
38 .long m_read_null @ 0xA80000 - 0xAFFFFF
\r
39 .long m_read_null @ 0xB00000 - 0xB7FFFF
\r
40 .long m_read_null @ 0xB80000 - 0xBFFFFF
\r
41 .long m_read8_vdp @ 0xC00000 - 0xC7FFFF
\r
42 .long m_read8_vdp @ 0xC80000 - 0xCFFFFF
\r
43 .long m_read_null @ 0xD00000 - 0xD7FFFF
\r
44 .long m_read_null @ 0xD80000 - 0xDFFFFF
\r
45 .long m_read8_ram @ 0xE00000 - 0xE7FFFF
\r
46 .long m_read8_ram @ 0xE80000 - 0xEFFFFF
\r
47 .long m_read8_ram @ 0xF00000 - 0xF7FFFF
\r
48 .long m_read8_ram @ 0xF80000 - 0xFFFFFF
\r
51 .long m_read16_rom0 @ 0x000000 - 0x07FFFF
\r
52 .long m_read16_rom1 @ 0x080000 - 0x0FFFFF
\r
53 .long m_read16_rom2 @ 0x100000 - 0x17FFFF
\r
54 .long m_read16_rom3 @ 0x180000 - 0x1FFFFF
\r
55 .long m_read16_rom4 @ 0x200000 - 0x27FFFF
\r
56 .long m_read16_rom5 @ 0x280000 - 0x2FFFFF
\r
57 .long m_read16_rom6 @ 0x300000 - 0x37FFFF
\r
58 .long m_read16_rom7 @ 0x380000 - 0x3FFFFF
\r
59 .long m_read16_rom8 @ 0x400000 - 0x47FFFF
\r
60 .long m_read16_rom9 @ 0x480000 - 0x4FFFFF
\r
61 .long m_read16_romA @ 0x500000 - 0x57FFFF
\r
62 .long m_read16_romB @ 0x580000 - 0x5FFFFF
\r
63 .long m_read16_romC @ 0x600000 - 0x67FFFF
\r
64 .long m_read16_romD @ 0x680000 - 0x6FFFFF
\r
65 .long m_read16_romE @ 0x700000 - 0x77FFFF
\r
66 .long m_read16_romF @ 0x780000 - 0x7FFFFF
\r
67 .long m_read16_rom10 @ 0x800000 - 0x87FFFF
\r
68 .long m_read16_rom11 @ 0x880000 - 0x8FFFFF
\r
69 .long m_read16_rom12 @ 0x900000 - 0x97FFFF
\r
70 .long m_read16_rom13 @ 0x980000 - 0x9FFFFF
\r
71 .long m_read16_misc @ 0xA00000 - 0xA7FFFF
\r
72 .long m_read_null @ 0xA80000 - 0xAFFFFF
\r
73 .long m_read_null @ 0xB00000 - 0xB7FFFF
\r
74 .long m_read_null @ 0xB80000 - 0xBFFFFF
\r
75 .long m_read16_vdp @ 0xC00000 - 0xC7FFFF
\r
76 .long m_read_null @ 0xC80000 - 0xCFFFFF
\r
77 .long m_read_null @ 0xD00000 - 0xD7FFFF
\r
78 .long m_read_null @ 0xD80000 - 0xDFFFFF
\r
79 .long m_read16_ram @ 0xE00000 - 0xE7FFFF
\r
80 .long m_read16_ram @ 0xE80000 - 0xEFFFFF
\r
81 .long m_read16_ram @ 0xF00000 - 0xF7FFFF
\r
82 .long m_read16_ram @ 0xF80000 - 0xFFFFFF
\r
85 .long m_read32_rom0 @ 0x000000 - 0x07FFFF
\r
86 .long m_read32_rom1 @ 0x080000 - 0x0FFFFF
\r
87 .long m_read32_rom2 @ 0x100000 - 0x17FFFF
\r
88 .long m_read32_rom3 @ 0x180000 - 0x1FFFFF
\r
89 .long m_read32_rom4 @ 0x200000 - 0x27FFFF
\r
90 .long m_read32_rom5 @ 0x280000 - 0x2FFFFF
\r
91 .long m_read32_rom6 @ 0x300000 - 0x37FFFF
\r
92 .long m_read32_rom7 @ 0x380000 - 0x3FFFFF
\r
93 .long m_read32_rom8 @ 0x400000 - 0x47FFFF
\r
94 .long m_read32_rom9 @ 0x480000 - 0x4FFFFF
\r
95 .long m_read32_romA @ 0x500000 - 0x57FFFF
\r
96 .long m_read32_romB @ 0x580000 - 0x5FFFFF
\r
97 .long m_read32_romC @ 0x600000 - 0x67FFFF
\r
98 .long m_read32_romD @ 0x680000 - 0x6FFFFF
\r
99 .long m_read32_romE @ 0x700000 - 0x77FFFF
\r
100 .long m_read32_romF @ 0x780000 - 0x7FFFFF
\r
101 .long m_read32_rom10 @ 0x800000 - 0x87FFFF
\r
102 .long m_read32_rom11 @ 0x880000 - 0x8FFFFF
\r
103 .long m_read32_rom12 @ 0x900000 - 0x97FFFF
\r
104 .long m_read32_rom13 @ 0x980000 - 0x9FFFFF
\r
105 .long m_read32_misc @ 0xA00000 - 0xA7FFFF
\r
106 .long m_read_null @ 0xA80000 - 0xAFFFFF
\r
107 .long m_read_null @ 0xB00000 - 0xB7FFFF
\r
108 .long m_read_null @ 0xB80000 - 0xBFFFFF
\r
109 .long m_read32_vdp @ 0xC00000 - 0xC7FFFF
\r
110 .long m_read_null @ 0xC80000 - 0xCFFFFF
\r
111 .long m_read_null @ 0xD00000 - 0xD7FFFF
\r
112 .long m_read_null @ 0xD80000 - 0xDFFFFF
\r
113 .long m_read32_ram @ 0xE00000 - 0xE7FFFF
\r
114 .long m_read32_ram @ 0xE80000 - 0xEFFFFF
\r
115 .long m_read32_ram @ 0xF00000 - 0xF7FFFF
\r
116 .long m_read32_ram @ 0xF80000 - 0xFFFFFF
\r
119 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
122 @.section .bss, "brw"
\r
136 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
140 .global PicoMemReset
\r
145 .global PicoWriteRomHW_SSF2
\r
146 .global m_m68k_read8_misc
\r
147 .global m_m68k_write8_misc
\r
151 ldr r12,=(Pico+0x22204)
\r
152 ldr r12,[r12] @ romsize
\r
153 add r12,r12,#0x80000
\r
155 mov r12,r12,lsr #19
\r
157 ldr r0, =m_read8_table
\r
158 ldr r1, =m_read8_def_table
\r
166 ldr r0, =m_read16_table
\r
167 ldr r1, =m_read16_def_table
\r
175 ldr r0, =m_read32_table
\r
176 ldr r1, =m_read32_def_table
\r
184 @ update memhandlers according to ROM size
\r
185 ldr r1, =m_read8_above_rom
\r
186 ldr r0, =m_read8_table
\r
193 beq 1b @ do not touch the SRAM area
\r
194 str r1, [r0, r2, lsl #2]
\r
197 ldr r1, =m_read16_above_rom
\r
198 ldr r0, =m_read16_table
\r
206 str r1, [r0, r2, lsl #2]
\r
209 ldr r1, =m_read32_above_rom
\r
210 ldr r0, =m_read32_table
\r
218 str r1, [r0, r2, lsl #2]
\r
225 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
228 ldr r2, =m_read8_table
\r
229 bic r0, r0, #0xff000000
\r
230 and r1, r0, #0x00f80000
\r
231 ldr pc, [r2, r1, lsr #17]
\r
233 PicoRead16: @ u32 a
\r
234 ldr r2, =m_read16_table
\r
235 bic r0, r0, #0xff000000
\r
236 and r1, r0, #0x00f80000
\r
237 ldr pc, [r2, r1, lsr #17]
\r
239 PicoRead32: @ u32 a
\r
240 ldr r2, =m_read32_table
\r
241 bic r0, r0, #0xff000000
\r
242 and r1, r0, #0x00f80000
\r
243 ldr pc, [r2, r1, lsr #17]
\r
247 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
254 .macro m_read8_rom sect
\r
255 ldr r1, =(Pico+0x22200)
\r
256 bic r0, r0, #0xf80000
\r
259 orr r0, r0, #0x080000*\sect
\r
267 m_read8_rom0: @ 0x000000 - 0x07ffff
\r
270 m_read8_rom1: @ 0x080000 - 0x0fffff
\r
273 m_read8_rom2: @ 0x100000 - 0x17ffff
\r
276 m_read8_rom3: @ 0x180000 - 0x1fffff
\r
279 m_read8_rom4: @ 0x200000 - 0x27ffff, SRAM area
\r
281 ldr r3, =(Pico+0x22200)
\r
282 ldr r1, [r2, #8] @ SRam.end
\r
283 bic r0, r0, #0xf80000
\r
284 orr r0, r0, #0x200000
\r
287 ldr r1, [r2, #4] @ SRam.start (1ci)
\r
290 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (1ci)
\r
291 sub r12,r0, #0x200000
\r
293 bne m_read8_detected
\r
295 ble m_read8_detected
\r
297 orrne r1, r1, #0x10
\r
298 strneb r1, [r3, #0x11]
\r
300 tst r1, #4 @ EEPROM read?
\r
305 ldr r3, [r2] @ SRam.data
\r
306 ldr r2, [r2, #4] @ SRam.start (1ci)
\r
311 ldr r1, [r3, #4] @ 1ci
\r
314 bxgt lr @ bad location
\r
320 m_read8_rom5: @ 0x280000 - 0x2fffff
\r
323 m_read8_rom6: @ 0x300000 - 0x37ffff
\r
326 m_read8_rom7: @ 0x380000 - 0x3fffff
\r
329 m_read8_rom8: @ 0x400000 - 0x47ffff
\r
332 m_read8_rom9: @ 0x480000 - 0x4fffff
\r
335 m_read8_romA: @ 0x500000 - 0x57ffff
\r
338 m_read8_romB: @ 0x580000 - 0x5fffff
\r
341 m_read8_romC: @ 0x600000 - 0x67ffff
\r
344 m_read8_romD: @ 0x680000 - 0x6fffff
\r
347 m_read8_romE: @ 0x700000 - 0x77ffff
\r
350 m_read8_romF: @ 0x780000 - 0x7fffff
\r
353 m_read8_rom10: @ 0x800000 - 0x87ffff
\r
356 m_read8_rom11: @ 0x880000 - 0x8fffff
\r
359 m_read8_rom12: @ 0x900000 - 0x97ffff
\r
362 m_read8_rom13: @ 0x980000 - 0x9fffff
\r
368 bic r2, r0, #0x001f @ most commonly we get i/o port read,
\r
369 cmp r2, #0xa10000 @ so check for it first
\r
373 beq m_read8_misc_hwreg
\r
378 ldr r3, =(Pico+0x22000)
\r
379 mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])
\r
383 m_read8_misc_hwreg:
\r
384 ldr r3, =(Pico+0x22200)
\r
385 ldrb r0, [r3, #0x0f] @ Pico.m.hardware
\r
389 mov r2, #0xa10000 @ games also like to poll busreq,
\r
390 orr r2, r2, #0x001100 @ so we'll try it now
\r
394 and r2, r0, #0xff0000 @ finally it might be
\r
395 cmp r2, #0xa00000 @ z80 area
\r
398 beq z80Read8 @ z80 RAM
\r
399 and r2, r0, #0x6000
\r
403 .if EXTERNAL_YM2612
\r
407 beq m_read8_fake_ym2612
\r
415 m_read8_fake_ym2612:
\r
416 ldr r3, =(Pico+0x22200)
\r
417 ldrb r0, [r3, #8] @ Pico.m.rotate
\r
424 @ if everything else fails, use generic handler
\r
431 moveq r0, r0, lsr #8
\r
438 bxne lr @ invalid read
\r
444 moveq r0, r0, lsr #8
\r
449 bic r0, r0, #0xff0000
\r
461 moveq r0, r0, lsr #8
\r
466 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
468 .macro m_read16_rom sect
\r
469 ldr r1, =(Pico+0x22200)
\r
470 bic r0, r0, #0xf80000
\r
474 orr r0, r0, #0x080000*\sect
\r
481 m_read16_rom0: @ 0x000000 - 0x07ffff
\r
484 m_read16_rom1: @ 0x080000 - 0x0fffff
\r
487 m_read16_rom2: @ 0x100000 - 0x17ffff
\r
490 m_read16_rom3: @ 0x180000 - 0x1fffff
\r
493 m_read16_rom4: @ 0x200000 - 0x27ffff, SRAM area (NBA Live 95)
\r
495 ldr r3, =(Pico+0x22200)
\r
496 ldr r1, [r2, #8] @ SRam.end
\r
497 bic r0, r0, #0xf80000
\r
499 orr r0, r0, #0x200000
\r
501 bgt m_read16_nosram
\r
502 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (2ci)
\r
504 beq m_read16_nosram
\r
505 ldr r1, [r2, #4] @ SRam.start (1ci)
\r
507 blt m_read16_nosram
\r
508 ldr r2, [r2] @ SRam.data (1ci)
\r
510 ldrh r0, [r2, r0] @ 2ci
\r
513 orr r0, r0, r1, lsl #8
\r
517 ldr r1, [r3, #4] @ 1ci
\r
520 bxgt lr @ bad location
\r
525 m_read16_rom5: @ 0x280000 - 0x2fffff
\r
528 m_read16_rom6: @ 0x300000 - 0x37ffff
\r
531 m_read16_rom7: @ 0x380000 - 0x3fffff
\r
534 m_read16_rom8: @ 0x400000 - 0x47ffff
\r
537 m_read16_rom9: @ 0x480000 - 0x4fffff
\r
540 m_read16_romA: @ 0x500000 - 0x57ffff
\r
543 m_read16_romB: @ 0x580000 - 0x5fffff
\r
546 m_read16_romC: @ 0x600000 - 0x67ffff
\r
549 m_read16_romD: @ 0x680000 - 0x6fffff
\r
552 m_read16_romE: @ 0x700000 - 0x77ffff
\r
555 m_read16_romF: @ 0x780000 - 0x7fffff
\r
558 m_read16_rom10: @ 0x800000 - 0x87ffff
\r
561 m_read16_rom11: @ 0x880000 - 0x8fffff
\r
564 m_read16_rom12: @ 0x900000 - 0x97ffff
\r
567 m_read16_rom13: @ 0x980000 - 0x9fffff
\r
578 bxne lr @ invalid read
\r
584 bic r0, r0, #0xff0000
\r
589 m_read16_above_rom:
\r
596 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
598 .macro m_read32_rom sect
\r
599 ldr r1, =(Pico+0x22200)
\r
600 bic r0, r0, #0xf80000
\r
604 orr r0, r0, #0x080000*\sect
\r
607 ldrh r1, [r1, #2] @ 1ci
\r
608 orr r0, r1, r0, lsl #16
\r
613 m_read32_rom0: @ 0x000000 - 0x07ffff
\r
616 m_read32_rom1: @ 0x080000 - 0x0fffff
\r
619 m_read32_rom2: @ 0x100000 - 0x17ffff
\r
622 m_read32_rom3: @ 0x180000 - 0x1fffff
\r
625 m_read32_rom4: @ 0x200000 - 0x27ffff, SRAM area (does any game do long reads?)
\r
627 ldr r3, =(Pico+0x22200)
\r
628 ldr r1, [r2, #8] @ SRam.end
\r
629 bic r0, r0, #0xf80000
\r
631 orr r0, r0, #0x200000
\r
633 bgt m_read32_nosram
\r
634 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (2ci)
\r
636 beq m_read32_nosram
\r
637 ldr r1, [r2, #4] @ SRam.start (1ci)
\r
639 blt m_read32_nosram
\r
640 ldr r2, [r2] @ SRam.data (1ci)
\r
642 ldrh r0, [r2, r0]! @ (1ci)
\r
644 orr r0, r0, r0, lsl #16
\r
646 mov r0, r0, lsl #16
\r
647 orr r0, r0, r1, lsr #8
\r
649 orr r0, r0, r1, lsl #8
\r
653 ldr r1, [r3, #4] @ (1ci)
\r
656 bxgt lr @ bad location
\r
657 ldr r1, [r3] @ (1ci)
\r
659 ldrh r1, [r1, #2] @ (2ci)
\r
660 orr r0, r1, r0, lsl #16
\r
663 m_read32_rom5: @ 0x280000 - 0x2fffff
\r
666 m_read32_rom6: @ 0x300000 - 0x37ffff
\r
669 m_read32_rom7: @ 0x380000 - 0x3fffff
\r
672 m_read32_rom8: @ 0x400000 - 0x47ffff
\r
675 m_read32_rom9: @ 0x480000 - 0x4fffff
\r
678 m_read32_romA: @ 0x500000 - 0x57ffff
\r
681 m_read32_romB: @ 0x580000 - 0x5fffff
\r
684 m_read32_romC: @ 0x600000 - 0x67ffff
\r
687 m_read32_romD: @ 0x680000 - 0x6fffff
\r
690 m_read32_romE: @ 0x700000 - 0x77ffff
\r
693 m_read32_romF: @ 0x780000 - 0x7fffff
\r
696 m_read32_rom10: @ 0x800000 - 0x87ffff
\r
699 m_read32_rom11: @ 0x880000 - 0x8fffff
\r
702 m_read32_rom12: @ 0x900000 - 0x97ffff
\r
705 m_read32_rom13: @ 0x980000 - 0x9fffff
\r
720 orr r0, r0, r1, lsl #16
\r
726 bxne lr @ invalid read
\r
734 orr r0, r0, r1, lsl #16
\r
739 bic r0, r0, #0xff0000
\r
742 ldrh r1, [r1, #2] @ 2ci
\r
743 orr r0, r1, r0, lsl #16
\r
746 m_read32_above_rom:
\r
758 orr r0, r0, r1, lsl #16
\r
763 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
765 PicoWriteRomHW_SSF2: @ u32 a, u32 d
\r
767 movs r0, r0, lsr #1
\r
771 ldr r2, =(Pico+0x22211) @ Pico.m.sram_reg
\r
782 ldr r3, =m_read8_def_table
\r
783 ldr r2, =m_read8_table
\r
784 ldr r12, [r3, r1, lsl #2]
\r
785 str r12, [r2, r0, lsl #2]
\r
787 ldr r3, =m_read16_def_table
\r
788 ldr r2, =m_read16_table
\r
789 ldr r12, [r3, r1, lsl #2]
\r
790 str r12, [r2, r0, lsl #2]
\r
792 ldr r3, =m_read32_def_table
\r
793 ldr r2, =m_read32_table
\r
794 ldr r12, [r3, r1, lsl #2]
\r
795 str r12, [r2, r0, lsl #2]
\r
799 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
801 @ Here we only handle most often used locations,
\r
802 @ everything else is passed to generic handlers
\r
804 PicoWrite8: @ u32 a, u8 d
\r
805 bic r0, r0, #0xff000000
\r
806 and r2, r0, #0x00e00000
\r
807 cmp r2, #0x00e00000 @ RAM?
\r
809 biceq r0, r0, #0x00ff0000
\r
811 streqb r1, [r3, r0]
\r
814 m_m68k_write8_misc:
\r
815 bic r2, r0, #0x1f @ most commonly we get i/o port write,
\r
816 cmp r2, #0xa10000 @ so check for it first
\r
822 ldr r3, =(Pico+0x22000) @ Pico.ioports
\r
823 tst r2, #0x20 @ 6 button pad?
\r
824 streqb r1, [r3, r0, lsr #1]
\r
828 bne m_write8_io_done @ not likely to happen
\r
829 add r2, r3, #0x200 @ Pico+0x22200
\r
832 streqb r12,[r2,#0x18]
\r
833 strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0
\r
835 beq m_write8_io_done
\r
836 ldrb r12,[r3, r0, lsr #1]
\r
838 bne m_write8_io_done
\r
840 ldreqb r12,[r2,#0x0a]
\r
841 ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
\r
843 streqb r12,[r2,#0x0a]
\r
844 strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
\r
846 strb r1, [r3, r0, lsr #1]
\r
851 and r2, r0, #0xff0000
\r
852 cmp r2, #0xa00000 @ z80 area?
\r
853 bne m_write8_not_z80
\r
855 bne m_write8_z80_not_ram
\r
856 ldr r3, =(Pico+0x20000) @ Pico.zram
\r
857 add r2, r3, #0x02200 @ Pico+0x22200
\r
858 ldrb r2, [r2, #9] @ Pico.m.z80Run
\r
859 bic r0, r0, #0xff0000
\r
860 bic r0, r0, #0x00e000
\r
862 streqb r1, [r3, r0] @ zram
\r
865 m_write8_z80_not_ram:
\r
866 and r2, r0, #0x6000
\r
868 bne m_write8_z80_not_ym2612
\r
875 .if EXTERNAL_YM2612
\r
877 ldreq r2, =YM2612Write_
\r
878 ldrne r2, =YM2612Write_940
\r
888 str r1, [r2] @ emustatus|=YM2612Write(a&3, d);
\r
891 m_write8_z80_not_ym2612: @ not too likely
\r
892 mov r2, r0, lsl #17
\r
895 orr r3, r3, #0x0011
\r
896 cmp r3, r2, lsr #17 @ psg @ z80 area?
\r
898 and r2, r0, #0x7f00
\r
899 cmp r2, #0x6000 @ bank register?
\r
900 bxne lr @ invalid write
\r
902 m_write8_z80_bank_reg:
\r
903 ldr r3, =(Pico+0x22208) @ Pico.m
\r
904 ldrh r2, [r3, #0x0a]
\r
906 orr r2, r1, r2, lsr #1
\r
907 bic r2, r2, #0xfe00
\r
908 strh r2, [r3, #0x0a]
\r
913 and r2, r0, #0xe70000
\r
914 cmp r2, #0xc00000 @ VDP area?
\r
915 bne OtherWrite8 @ passthrough
\r