1 // Pico Library - Internal Header File
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 #ifndef PICO_INTERNAL_INCLUDED
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10 #define PICO_INTERNAL_INCLUDED
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18 #define USE_POLL_DETECT
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20 #ifndef PICO_INTERNAL
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21 #define PICO_INTERNAL
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23 #ifndef PICO_INTERNAL_ASM
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24 #define PICO_INTERNAL_ASM
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27 // to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project
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34 // ----------------------- 68000 CPU -----------------------
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36 #include "../cpu/Cyclone/Cyclone.h"
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37 extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
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38 #define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run
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39 #define SekCyclesLeft \
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40 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
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41 #define SekCyclesLeftS68k \
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42 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)
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43 #define SekSetCyclesLeftNoMCD(c) PicoCpuCM68k.cycles=c
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44 #define SekSetCyclesLeft(c) { \
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45 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \
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47 #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
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48 #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
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49 #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
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50 #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
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51 #define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
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53 #define SekInterrupt(i) PicoCpuCM68k.irq=i
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56 #define EMU_CORE_DEBUG
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61 #include "../cpu/fame/fame.h"
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62 extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
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63 #define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter
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64 #define SekCyclesLeft \
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65 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
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66 #define SekCyclesLeftS68k \
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67 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)
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68 #define SekSetCyclesLeftNoMCD(c) PicoCpuFM68k.io_cycle_counter=c
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69 #define SekSetCyclesLeft(c) { \
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70 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \
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72 #define SekPc fm68k_get_pc(&PicoCpuFM68k)
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73 #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
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74 #define SekSetStop(x) { \
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75 PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
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76 if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
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78 #define SekSetStopS68k(x) { \
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79 PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \
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80 if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \
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82 #define SekShouldInterrupt fm68k_would_interrupt()
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84 #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
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87 #define EMU_CORE_DEBUG
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92 #include "../cpu/musashi/m68kcpu.h"
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93 extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
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94 #ifndef SekCyclesLeft
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95 #define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles
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96 #define SekCyclesLeft \
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97 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
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98 #define SekCyclesLeftS68k \
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99 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)
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100 #define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)
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101 #define SekSetCyclesLeft(c) { \
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102 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \
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104 #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
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105 #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
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106 #define SekSetStop(x) { \
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107 if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
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108 else PicoCpuMM68k.stopped=0; \
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110 #define SekSetStopS68k(x) { \
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111 if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \
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112 else PicoCpuMS68k.stopped=0; \
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114 #define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)
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116 #define SekInterrupt(irq) {
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117 void *oldcontext = m68ki_cpu_p; \
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118 m68k_set_context(&PicoCpuMM68k); \
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119 m68k_set_irq(irq); \
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120 m68k_set_context(oldcontext); \
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126 extern int SekCycleCnt; // cycles done in this frame
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127 extern int SekCycleAim; // cycle aim
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128 extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
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130 #define SekCyclesReset() { \
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131 SekCycleCntT+=SekCycleAim; \
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132 SekCycleCnt-=SekCycleAim; \
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135 #define SekCyclesBurn(c) SekCycleCnt+=c
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136 #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)
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137 #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom
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139 #define SekEndRun(after) { \
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140 SekCycleCnt -= SekCyclesLeft - after; \
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141 if(SekCycleCnt < 0) SekCycleCnt = 0; \
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142 SekSetCyclesLeft(after); \
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145 extern int SekCycleCntS68k;
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146 extern int SekCycleAimS68k;
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148 #define SekCyclesResetS68k() { \
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149 SekCycleCntS68k-=SekCycleAimS68k; \
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150 SekCycleAimS68k=0; \
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152 #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)
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154 #ifdef EMU_CORE_DEBUG
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155 #undef SekSetCyclesLeftNoMCD
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156 #undef SekSetCyclesLeft
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157 #undef SekCyclesBurn
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159 #define SekSetCyclesLeftNoMCD(c)
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160 #define SekSetCyclesLeft(c)
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161 #define SekCyclesBurn(c) c
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162 #define SekEndRun(c)
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165 // ----------------------- Z80 CPU -----------------------
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167 #if defined(_USE_MZ80)
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168 #include "../../cpu/mz80/mz80.h"
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170 #define z80_run(cycles) mz80_run(cycles)
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171 #define z80_run_nr(cycles) mz80_run(cycles)
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172 #define z80_int() mz80int(0)
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173 #define z80_resetCycles() mz80GetElapsedTicks(1)
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175 #elif defined(_USE_DRZ80)
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176 #include "../../cpu/DrZ80/drz80.h"
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178 extern struct DrZ80 drZ80;
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180 #define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))
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181 #define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)
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182 #define z80_int() { \
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183 drZ80.z80irqvector = 0xFF; /* default IRQ vector RST opcode */ \
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184 drZ80.Z80_IRQ = 1; \
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186 #define z80_resetCycles()
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188 #elif defined(_USE_CZ80)
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189 #include "../../cpu/cz80/cz80.h"
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191 #define z80_run(cycles) Cz80_Exec(&CZ80, cycles)
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192 #define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)
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193 #define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)
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194 #define z80_resetCycles()
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198 #define z80_run(cycles) (cycles)
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199 #define z80_run_nr(cycles)
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201 #define z80_resetCycles()
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205 // ---------------------------------------------------------
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207 extern int PicoMCD;
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209 // main oscillator clock which controls timing
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210 #define OSC_NTSC 53693100
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211 // seems to be accurate, see scans from http://www.hot.ee/tmeeco/
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212 #define OSC_PAL 53203424
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216 unsigned char reg[0x20];
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217 unsigned int command; // 32-bit Command
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218 unsigned char pending; // 1 if waiting for second half of 32-bit command
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219 unsigned char type; // Command type (v/c/vsram read/write)
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220 unsigned short addr; // Read/Write address
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221 int status; // Status bits
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222 unsigned char pending_ints; // pending interrupts: ??VH????
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223 signed char lwrite_cnt; // VDP write count during active display line
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224 unsigned char pad[0x12];
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229 unsigned char rotate;
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230 unsigned char z80Run;
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231 unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches
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232 short scanline; // 04 0 to 261||311; -1 in fast mode
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233 char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)
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234 unsigned char hardware; // 07 Hardware value for country
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235 unsigned char pal; // 08 1=PAL 0=NTSC
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236 unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)
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237 unsigned short z80_bank68k; // 0a
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238 unsigned short z80_lastaddr; // this is for Z80 faking
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239 unsigned char z80_fakeval;
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240 unsigned char pad0;
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241 unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
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242 unsigned short eeprom_addr; // EEPROM address register
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243 unsigned char eeprom_cycle; // EEPROM SRAM cycle number
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244 unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs
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245 unsigned char prot_bytes[2]; // simple protection faking
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246 unsigned short dma_xfers;
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247 unsigned char pad[2];
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248 unsigned int frame_count; // mainly for movies
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251 // some assembly stuff depend on these, do not touch!
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254 unsigned char ram[0x10000]; // 0x00000 scratch ram
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255 unsigned short vram[0x8000]; // 0x10000
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256 unsigned char zram[0x2000]; // 0x20000 Z80 ram
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257 unsigned char ioports[0x10];
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258 unsigned int pad[0x3c]; // unused
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259 unsigned short cram[0x40]; // 0x22100
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260 unsigned short vsram[0x40]; // 0x22180
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262 unsigned char *rom; // 0x22200
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263 unsigned int romsize; // 0x22204
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266 struct PicoVideo video;
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272 unsigned char *data; // actual data
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273 unsigned int start; // start address in 68k address space
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275 unsigned char unused1; // 0c: unused
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276 unsigned char unused2;
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277 unsigned char changed;
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278 unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words
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279 unsigned char eeprom_abits; // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out
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280 unsigned char eeprom_bit_cl; // bit number for cl
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281 unsigned char eeprom_bit_in; // bit number for in
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282 unsigned char eeprom_bit_out; // bit number for out
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286 #include "cd/cd_sys.h"
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287 #include "cd/LC89510.h"
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288 #include "cd/gfx_cd.h"
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292 unsigned char control; // reg7
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293 unsigned char enabled; // reg8
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294 unsigned char cur_ch;
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295 unsigned char bank;
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298 struct pcm_chan // 08, size 0x10
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300 unsigned char regs[8];
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301 unsigned int addr; // .08: played sample address
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308 unsigned short hint_vector;
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309 unsigned char busreq;
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310 unsigned char s68k_pend_ints;
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311 unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending
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312 unsigned int counter75hz;
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313 unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023)
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314 unsigned char audio_track; // playing audio track # (zero based)
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316 int timer_int3; // 10
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317 unsigned int timer_stopwatch;
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318 unsigned char bcram_reg; // 18: battery-backed RAM cart register
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319 unsigned char pad2;
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320 unsigned short pad3;
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326 unsigned char bios[0x20000]; // 000000: 128K
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327 union { // 020000: 512K
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328 unsigned char prg_ram[0x80000];
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329 unsigned char prg_ram_b[4][0x20000];
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331 union { // 0a0000: 256K
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333 unsigned char word_ram2M[0x40000];
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334 unsigned char unused[0x20000];
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337 unsigned char unused[0x20000];
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338 unsigned char word_ram1M[2][0x20000];
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341 union { // 100000: 64K
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342 unsigned char pcm_ram[0x10000];
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343 unsigned char pcm_ram_b[0x10][0x1000];
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345 unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
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346 unsigned char bram[0x2000]; // 110200: 8K
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347 struct mcd_misc m; // 112200: misc
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348 struct mcd_pcm pcm; // 112240:
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349 _scd_toc TOC; // not to be saved
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356 #define Pico_mcd ((mcd_state *)Pico.rom)
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359 PICO_INTERNAL int PicoAreaPackCpu(unsigned char *cpu, int is_sub);
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360 PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);
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363 PICO_INTERNAL int PicoCdSaveState(void *file);
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364 PICO_INTERNAL int PicoCdLoadState(void *file);
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367 PICO_INTERNAL void PicoCartDetect(void);
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370 int CM_compareRun(int cyc, int is_sub);
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373 PICO_INTERNAL int PicoLine(int scan);
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374 PICO_INTERNAL void PicoFrameStart(void);
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377 PICO_INTERNAL void PicoFrameFull();
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380 PICO_INTERNAL int PicoInitPc(unsigned int pc);
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381 PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a);
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382 PICO_INTERNAL void PicoMemSetup(void);
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383 PICO_INTERNAL_ASM void PicoMemReset(void);
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384 PICO_INTERNAL int PadRead(int i);
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385 PICO_INTERNAL unsigned char z80_read(unsigned short a);
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387 PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a);
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388 PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a);
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389 PICO_INTERNAL unsigned short z80_read16(unsigned short a);
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391 PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data);
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395 PICO_INTERNAL void PicoMemSetupCD(void);
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396 PICO_INTERNAL_ASM void PicoMemResetCD(int r3);
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397 PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);
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400 extern struct Pico Pico;
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401 extern struct PicoSRAM SRam;
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402 extern int emustatus;
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403 extern int z80startCycle, z80stopCycle; // in 68k cycles
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404 PICO_INTERNAL int CheckDMA(void);
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407 PICO_INTERNAL int PicoInitMCD(void);
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408 PICO_INTERNAL void PicoExitMCD(void);
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409 PICO_INTERNAL int PicoResetMCD(int hard);
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410 PICO_INTERNAL int PicoFrameMCD(void);
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413 PICO_INTERNAL int SekInit(void);
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414 PICO_INTERNAL int SekReset(void);
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415 PICO_INTERNAL void SekState(int *data);
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416 PICO_INTERNAL void SekSetRealTAS(int use_real);
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419 PICO_INTERNAL int SekInitS68k(void);
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420 PICO_INTERNAL int SekResetS68k(void);
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421 PICO_INTERNAL int SekInterruptS68k(int irq);
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424 extern int PsndLen_exc_cnt;
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425 extern int PsndLen_exc_add;
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428 PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);
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429 PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);
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432 PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);
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433 PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d);
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434 PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void);
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435 PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count);
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436 PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);
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437 PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count
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438 PICO_INTERNAL_ASM void memset32(int *dest, int c, int count);
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441 PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);
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442 PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);
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445 PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba);
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448 PICO_INTERNAL void PsndReset(void);
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449 PICO_INTERNAL void Psnd_timers_and_dac(int raster);
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450 PICO_INTERNAL int PsndRender(int offset, int length);
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451 PICO_INTERNAL void PsndClear(void);
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452 // z80 functionality wrappers
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453 PICO_INTERNAL void z80_init(void);
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454 PICO_INTERNAL void z80_pack(unsigned char *data);
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455 PICO_INTERNAL void z80_unpack(unsigned char *data);
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456 PICO_INTERNAL void z80_reset(void);
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457 PICO_INTERNAL void z80_exit(void);
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461 } // End of extern "C"
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464 // emulation event logging
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466 #define EL_LOGMASK 0
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469 #define EL_HVCNT 0x0001 /* hv counter reads */
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470 #define EL_SR 0x0002 /* SR reads */
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471 #define EL_INTS 0x0004 /* ints and acks */
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472 #define EL_YM2612R 0x0008 /* 68k ym2612 reads */
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473 #define EL_INTSW 0x0010 /* log irq switching on/off */
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474 #define EL_ASVDP 0x0020 /* VDP accesses during active scan */
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475 #define EL_VDPDMA 0x0040 /* VDP DMA transfers and their timing */
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476 #define EL_BUSREQ 0x0080 /* z80 busreq r/w or reset w */
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477 #define EL_Z80BNK 0x0100 /* z80 i/o through bank area */
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478 #define EL_SRAMIO 0x0200 /* sram i/o */
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479 #define EL_EEPROM 0x0400 /* eeprom debug */
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480 #define EL_UIO 0x0800 /* unmapped i/o */
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481 #define EL_IO 0x1000 /* all i/o (TODO) */
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483 #define EL_STATUS 0x4000 /* status messages */
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484 #define EL_ANOMALY 0x8000 /* some unexpected conditions */
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487 #define elprintf(w,f,...) \
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489 if ((w) & EL_LOGMASK) \
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490 printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \
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493 #define elprintf(w,f,...)
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496 #endif // PICO_INTERNAL_INCLUDED
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