1 // Pico Library - Header File
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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16 #define USE_POLL_DETECT
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19 // to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project
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26 // ----------------------- 68000 CPU -----------------------
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28 #include "../cpu/Cyclone/Cyclone.h"
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29 extern struct Cyclone PicoCpu, PicoCpuS68k;
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30 #define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run
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31 #define SekCyclesLeft \
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32 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
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33 #define SekCyclesLeftS68k \
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34 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.cycles)
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35 #define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c
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36 #define SekSetCyclesLeft(c) { \
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37 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \
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39 #define SekPc (PicoCpu.pc-PicoCpu.membase)
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40 #define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)
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41 #define SekSetStop(x) { PicoCpu.stopped=x; if (x) PicoCpu.cycles=0; }
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42 #define SekSetStopS68k(x) { PicoCpuS68k.stopped=x; if (x) PicoCpuS68k.cycles=0; }
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46 void __cdecl M68000_RUN();
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47 // The format of the data in a68k.asm (at the _M68000_regs location)
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50 unsigned int d[8],a[8];
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51 unsigned int isp,srh,ccr,xc,pc,irq,sr;
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52 int (*IrqCallback) (int nIrq);
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54 void *pResetCallback;
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55 unsigned int sfc,dfc,usp,vbr;
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56 unsigned int AsmBank,CpuVersion;
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58 struct A68KContext M68000_regs;
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59 extern int m68k_ICount;
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60 #define SekCyclesLeft m68k_ICount
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61 #define SekSetCyclesLeft(c) m68k_ICount=c
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62 #define SekPc M68000_regs.pc
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66 #include "../cpu/musashi/m68kcpu.h"
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67 extern m68ki_cpu_core PicoM68kCPU; // MD's CPU
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68 extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU
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69 #ifndef SekCyclesLeft
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70 #define SekCyclesLeftNoMCD PicoM68kCPU.cyc_remaining_cycles
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71 #define SekCyclesLeft \
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72 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
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73 #define SekCyclesLeftS68k \
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74 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoS68kCPU.cyc_remaining_cycles)
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75 #define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)
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76 #define SekSetCyclesLeft(c) { \
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77 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \
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79 #define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)
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80 #define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)
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81 #define SekSetStop(x) { \
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82 if(x) { SET_CYCLES(0); PicoM68kCPU.stopped=STOP_LEVEL_STOP; } \
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83 else PicoM68kCPU.stopped=0; \
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85 #define SekSetStopS68k(x) { \
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86 if(x) { SET_CYCLES(0); PicoS68kCPU.stopped=STOP_LEVEL_STOP; } \
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87 else PicoS68kCPU.stopped=0; \
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92 extern int SekCycleCnt; // cycles done in this frame
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93 extern int SekCycleAim; // cycle aim
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94 extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
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96 #define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}
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97 #define SekCyclesBurn(c) SekCycleCnt+=c
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98 #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)
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99 #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom
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101 #define SekEndRun(after) { \
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102 SekCycleCnt -= SekCyclesLeft - after; \
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103 if(SekCycleCnt < 0) SekCycleCnt = 0; \
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104 SekSetCyclesLeft(after); \
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107 extern int SekCycleCntS68k;
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108 extern int SekCycleAimS68k;
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110 #define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}
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111 #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)
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113 // does not work as expected
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114 //extern int z80ExtraCycles; // extra z80 cycles, used when z80 is [en|dis]abled
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116 extern int PicoMCD;
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118 // ---------------------------------------------------------
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120 // main oscillator clock which controls timing
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121 #define OSC_NTSC 53693100
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122 #define OSC_PAL 53203424 // not accurate
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126 unsigned char reg[0x20];
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127 unsigned int command; // 32-bit Command
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128 unsigned char pending; // 1 if waiting for second half of 32-bit command
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129 unsigned char type; // Command type (v/c/vsram read/write)
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130 unsigned short addr; // Read/Write address
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131 int status; // Status bits
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132 unsigned char pending_ints; // pending interrupts: ??VH????
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133 unsigned char pad[0x13];
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138 unsigned char rotate;
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139 unsigned char z80Run;
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140 unsigned char padTHPhase[2]; // phase of gamepad TH switches
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141 short scanline; // 0 to 261||311; -1 in fast mode
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142 char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)
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143 unsigned char hardware; // Hardware value for country
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144 unsigned char pal; // 1=PAL 0=NTSC
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145 unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)
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146 unsigned short z80_bank68k;
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147 unsigned short z80_lastaddr; // this is for Z80 faking
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148 unsigned char z80_fakeval;
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149 unsigned char pad0;
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150 unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay
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151 unsigned short sram_addr; // EEPROM address register
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152 unsigned char sram_cycle; // EEPROM SRAM cycle number
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153 unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs
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154 unsigned char prot_bytes[2]; // simple protection faking
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155 unsigned short dma_bytes; //
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156 unsigned char pad[2];
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157 unsigned int frame_count; // mainly for movies
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160 // some assembly stuff depend on these, do not touch!
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163 unsigned char ram[0x10000]; // 0x00000 scratch ram
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164 unsigned short vram[0x8000]; // 0x10000
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165 unsigned char zram[0x2000]; // 0x20000 Z80 ram
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166 unsigned char ioports[0x10];
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167 unsigned int pad[0x3c]; // unused
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168 unsigned short cram[0x40]; // 0x22100
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169 unsigned short vsram[0x40]; // 0x22180
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171 unsigned char *rom; // 0x22200
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172 unsigned int romsize; // 0x22204
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175 struct PicoVideo video;
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181 unsigned char *data; // actual data
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182 unsigned int start; // start address in 68k address space
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184 unsigned char resize; // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset
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185 unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset
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186 unsigned char changed;
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191 #include "cd/cd_sys.h"
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192 #include "cd/LC89510.h"
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193 #include "cd/gfx_cd.h"
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197 unsigned char control; // reg7
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198 unsigned char enabled; // reg8
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199 unsigned char cur_ch;
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200 unsigned char bank;
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203 struct pcm_chan // 08, size 0x10
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205 unsigned char regs[8];
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206 unsigned int addr; // .08: played sample address
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213 unsigned short hint_vector;
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214 unsigned char busreq;
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215 unsigned char s68k_pend_ints;
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216 unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending
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217 unsigned int counter75hz;
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218 unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023)
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219 unsigned char audio_track; // playing audio track # (zero based)
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221 int timer_int3; // 10
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222 unsigned int timer_stopwatch;
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223 unsigned char bcram_reg; // 18: battery-backed RAM cart register
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224 unsigned char pad2;
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225 unsigned short pad3;
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231 unsigned char bios[0x20000]; // 000000: 128K
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232 union { // 020000: 512K
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233 unsigned char prg_ram[0x80000];
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234 unsigned char prg_ram_b[4][0x20000];
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236 union { // 0a0000: 256K
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238 unsigned char word_ram2M[0x40000];
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239 unsigned char unused[0x20000];
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242 unsigned char unused[0x20000];
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243 unsigned char word_ram1M[2][0x20000];
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246 union { // 100000: 64K
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247 unsigned char pcm_ram[0x10000];
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248 unsigned char pcm_ram_b[0x10][0x1000];
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250 unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
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251 unsigned char bram[0x2000]; // 110200: 8K
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252 struct mcd_misc m; // 112200: misc
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253 struct mcd_pcm pcm; // 112240:
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254 _scd_toc TOC; // not to be saved
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261 #define Pico_mcd ((mcd_state *)Pico.rom)
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264 int PicoAreaPackCpu(unsigned char *cpu, int is_sub);
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265 int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);
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268 int PicoCdSaveState(void *file);
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269 int PicoCdLoadState(void *file);
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270 int PicoCdLoadStateGfx(void *file);
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273 int PicoLine(int scan);
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274 void PicoFrameStart();
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277 void PicoFrameFull();
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280 int PicoInitPc(unsigned int pc);
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281 unsigned int CPU_CALL PicoRead32(unsigned int a);
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282 void PicoMemSetup();
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283 void PicoMemReset();
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284 //void PicoDasm(int start,int len);
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285 unsigned char z80_read(unsigned short a);
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286 unsigned short z80_read16(unsigned short a);
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287 void z80_write(unsigned char data, unsigned short a);
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288 void z80_write16(unsigned short data, unsigned short a);
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291 void PicoMemSetupCD(void);
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292 void PicoMemResetCD(int r3);
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293 void PicoMemResetCDdecode(int r3);
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294 unsigned char PicoReadCD8 (unsigned int a);
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295 unsigned short PicoReadCD16(unsigned int a);
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296 unsigned int PicoReadCD32(unsigned int a);
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297 void PicoWriteCD8 (unsigned int a, unsigned char d);
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298 void PicoWriteCD16(unsigned int a, unsigned short d);
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299 void PicoWriteCD32(unsigned int a, unsigned int d);
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302 extern struct Pico Pico;
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303 extern struct PicoSRAM SRam;
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304 extern int emustatus;
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305 extern int z80startCycle, z80stopCycle; // in 68k cycles
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306 int CheckDMA(void);
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309 int PicoInitMCD(void);
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310 void PicoExitMCD(void);
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311 int PicoResetMCD(int hard);
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315 int SekReset(void);
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316 int SekInterrupt(int irq);
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317 void SekState(unsigned char *data);
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318 void SekSetRealTAS(int use_real);
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321 int SekInitS68k(void);
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322 int SekResetS68k(void);
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323 int SekInterruptS68k(int irq);
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326 extern int PsndLen_exc_cnt;
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327 extern int PsndLen_exc_add;
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330 void PicoVideoWrite(unsigned int a,unsigned short d);
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331 unsigned int PicoVideoRead(unsigned int a);
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334 void SRAMWriteEEPROM(unsigned int d);
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335 unsigned int SRAMReadEEPROM();
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336 void SRAMUpdPending(unsigned int a, unsigned int d);
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337 void memcpy16(unsigned short *dest, unsigned short *src, int count);
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338 void memcpy16bswap(unsigned short *dest, void *src, int count);
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339 void memcpy32(int *dest, int *src, int count); // 32bit word count
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340 void memset32(int *dest, int c, int count);
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343 void wram_2M_to_1M(unsigned char *m);
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344 void wram_1M_to_2M(unsigned char *m);
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348 } // End of extern "C"
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