runs code in 1M wram, cell arrange, decode (untested)
[picodrive.git] / Pico / cd / LC89510.c
1 /***********************************************************\r
2  *                                                         *\r
3  * This source is taken from the Gens project              *\r
4  * Written by Stéphane Dallongeville                       *\r
5  * Copyright (c) 2002 by Stéphane Dallongeville            *\r
6  * Modified/adapted for Picodrive by notaz, 2007           *\r
7  *                                                         *\r
8  ***********************************************************/\r
9 \r
10 #include "../PicoInt.h"\r
11 \r
12 #define cdprintf dprintf\r
13 //#define cdprintf(x...)\r
14 \r
15 \r
16 #define CDC_DMA_SPEED 256\r
17 \r
18 \r
19 static void CDD_Reset(void)\r
20 {\r
21         // Reseting CDD\r
22 \r
23         memset(Pico_mcd->s68k_regs+0x34, 0, 2*2); // CDD.Fader, CDD.Control\r
24         Pico_mcd->cdd.Status = 0;\r
25         Pico_mcd->cdd.Minute = 0;\r
26         Pico_mcd->cdd.Seconde = 0;\r
27         Pico_mcd->cdd.Frame = 0;\r
28         Pico_mcd->cdd.Ext = 0;\r
29 \r
30         // clear receive status and transfer command\r
31         memset(Pico_mcd->s68k_regs+0x38, 0, 20);\r
32         Pico_mcd->s68k_regs[0x38+9] = 0xF;              // Default checksum\r
33 }\r
34 \r
35 \r
36 static void CDC_Reset(void)\r
37 {\r
38         // Reseting CDC\r
39 \r
40         memset(Pico_mcd->cdc.Buffer, 0, (16 * 1024 * 2) + 2352);\r
41 \r
42         CDC_Update_Header();\r
43 \r
44         Pico_mcd->cdc.COMIN = 0;\r
45         Pico_mcd->cdc.IFSTAT = 0xFF;\r
46         Pico_mcd->cdc.DAC.N = 0;\r
47         Pico_mcd->cdc.DBC.N = 0;\r
48         Pico_mcd->cdc.HEAD.N = 0x01000000;\r
49         Pico_mcd->cdc.PT.N = 0;\r
50         Pico_mcd->cdc.WA.N = 2352 * 2;\r
51         Pico_mcd->cdc.STAT.N = 0x00000080;\r
52         Pico_mcd->cdc.SBOUT = 0;\r
53         Pico_mcd->cdc.IFCTRL = 0;\r
54         Pico_mcd->cdc.CTRL.N = 0;\r
55 \r
56         Pico_mcd->cdc.Decode_Reg_Read = 0;\r
57         Pico_mcd->scd.Status_CDC &= ~0x08;\r
58 }\r
59 \r
60 \r
61 void LC89510_Reset(void)\r
62 {\r
63         CDD_Reset();\r
64         CDC_Reset();\r
65 \r
66         // clear DMA_Adr & Stop_Watch\r
67         memset(Pico_mcd->s68k_regs + 0xA, 0, 4);\r
68 }\r
69 \r
70 \r
71 void Update_CDC_TRansfer(int which)\r
72 {\r
73         unsigned int DMA_Adr, dep, length, len;\r
74         unsigned short *dest;\r
75         unsigned char  *src;\r
76 \r
77         if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
78         {\r
79                 length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
80                 Pico_mcd->scd.Status_CDC &= ~0x08;      // Last transfer\r
81                 Pico_mcd->s68k_regs[4] |=  0x80;        // End data transfer\r
82                 Pico_mcd->s68k_regs[4] &= ~0x40;        // no more data ready\r
83                 Pico_mcd->cdc.IFSTAT |= 0x08;           // No more data transfer in progress\r
84 \r
85                 if (Pico_mcd->cdc.IFCTRL & 0x40)        // DTEIEN = Data Trasnfer End Interrupt Enable ?\r
86                 {\r
87                         Pico_mcd->cdc.IFSTAT &= ~0x40;\r
88 \r
89                         if (Pico_mcd->s68k_regs[0x33] & (1<<5))\r
90                         {\r
91                                 dprintf("cdc DTE irq 5");\r
92                                 SekInterruptS68k(5);\r
93                         }\r
94                 }\r
95         }\r
96         else length = CDC_DMA_SPEED;\r
97 \r
98 \r
99         // TODO: dst bounds checking? DAC.N alignment?\r
100         src = Pico_mcd->cdc.Buffer + Pico_mcd->cdc.DAC.N;\r
101         DMA_Adr = (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB];\r
102 \r
103         if (which == 7) // WORD RAM\r
104         {\r
105                 if (Pico_mcd->s68k_regs[3] & 4)\r
106                 {\r
107                         // test: Final Fight\r
108                         int bank = !(Pico_mcd->s68k_regs[3]&1);\r
109                         dep = ((DMA_Adr & 0x3FFF) << 3);\r
110                         cdprintf("CD DMA # %04x -> word_ram1M # %06x, len=%i",\r
111                                         Pico_mcd->cdc.DAC.N, dep, length);\r
112 \r
113                         dest = (unsigned short *) (Pico_mcd->word_ram1M[bank] + dep);\r
114 \r
115                         // TODO: bswapcpy\r
116                         for (len = length; len > 0; len--, src+=2, dest++)\r
117                                 *dest = (src[0]<<8) | src[1];\r
118 \r
119                         { // debug\r
120                                 unsigned char *b1 = Pico_mcd->word_ram1M[bank] + dep;\r
121                                 unsigned char *b2 = (unsigned char *)dest - 8;\r
122                                 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
123                                         b1[0], b1[1], b1[4], b1[5], b2[0], b2[1], b2[4], b2[5]);\r
124                         }\r
125                 }\r
126                 else\r
127                 {\r
128                         dep = ((DMA_Adr & 0x7FFF) << 3);\r
129                         cdprintf("CD DMA # %04x -> word_ram2M # %06x, len=%i",\r
130                                         Pico_mcd->cdc.DAC.N, dep, length);\r
131                         dest = (unsigned short *) (Pico_mcd->word_ram2M + dep);\r
132 \r
133                         for (len = length; len > 0; len--, src+=2, dest++)\r
134                                 *dest = (src[0]<<8) | src[1];\r
135 \r
136                         { // debug\r
137                                 unsigned char *b1 = Pico_mcd->word_ram2M + dep;\r
138                                 unsigned char *b2 = (unsigned char *)dest - 4;\r
139                                 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
140                                         b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
141                         }\r
142                 }\r
143         }\r
144         else if (which == 4) // PCM RAM\r
145         {\r
146 #if 0\r
147                         dest = (unsigned char *) Ram_PCM;\r
148                         dep = ((DMA_Adr & 0x03FF) << 2) + PCM_Chip.Bank;\r
149 #else\r
150                         dprintf("FIXME: CD DMA # %04x -> PCM", Pico_mcd->cdc.DAC.N);\r
151 #endif\r
152         }\r
153         else if (which == 5) // PRG RAM\r
154         {\r
155                 dep = DMA_Adr << 3;\r
156                 dest = (unsigned short *) (Pico_mcd->prg_ram + dep);\r
157                 cdprintf("CD DMA # %04x -> prg_ram # %06x, len=%i",\r
158                                 Pico_mcd->cdc.DAC.N, dep, length);\r
159 \r
160                 for (len = length; len > 0; len--, src+=2, dest++)\r
161                         *dest = (src[0]<<8) | src[1];\r
162 \r
163                 { // debug\r
164                         unsigned char *b1 = Pico_mcd->prg_ram + dep;\r
165                         unsigned char *b2 = (unsigned char *)dest - 4;\r
166                         dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",\r
167                                 b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);\r
168                 }\r
169         }\r
170 \r
171         length <<= 1;\r
172         Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;\r
173         if (Pico_mcd->scd.Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;\r
174         else Pico_mcd->cdc.DBC.N = 0;\r
175 \r
176         // update DMA_Adr\r
177         length >>= 2;\r
178         if (which != 4) length >>= 1;\r
179         DMA_Adr += length;\r
180         Pico_mcd->s68k_regs[0xA] = DMA_Adr >> 8;\r
181         Pico_mcd->s68k_regs[0xB] = DMA_Adr;\r
182 }\r
183 \r
184 \r
185 unsigned short Read_CDC_Host(int is_sub)\r
186 {\r
187         int addr;\r
188 \r
189         if (!(Pico_mcd->scd.Status_CDC & 0x08))\r
190         {\r
191                 // Transfer data disabled\r
192                 cdprintf("Read_CDC_Host FIXME: Transfer data disabled");\r
193                 return 0;\r
194         }\r
195 \r
196         if ((is_sub && (Pico_mcd->s68k_regs[4] & 7) != 3) ||\r
197                 (!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))\r
198         {\r
199                 // Wrong setting\r
200                 cdprintf("Read_CDC_Host FIXME: Wrong setting");\r
201                 return 0;\r
202         }\r
203 \r
204         Pico_mcd->cdc.DBC.N -= 2;\r
205 \r
206         if (Pico_mcd->cdc.DBC.N <= 0)\r
207         {\r
208                 Pico_mcd->cdc.DBC.N = 0;\r
209                 Pico_mcd->scd.Status_CDC &= ~0x08;              // Last transfer\r
210                 Pico_mcd->s68k_regs[4] |=  0x80;                // End data transfer\r
211                 Pico_mcd->s68k_regs[4] &= ~0x40;                // no more data ready\r
212                 Pico_mcd->cdc.IFSTAT |= 0x08;                   // No more data transfer in progress\r
213 \r
214                 if (Pico_mcd->cdc.IFCTRL & 0x40)                // DTEIEN = Data Transfer End Interrupt Enable ?\r
215                 {\r
216                         Pico_mcd->cdc.IFSTAT &= ~0x40;\r
217 \r
218                         if (Pico_mcd->s68k_regs[0x33]&(1<<5)) {\r
219                                 dprintf("m68k: s68k irq 5");\r
220                                 SekInterruptS68k(5);\r
221                         }\r
222 \r
223                         cdprintf("CDC - DTE interrupt");\r
224                 }\r
225         }\r
226 \r
227         addr = Pico_mcd->cdc.DAC.N;\r
228         Pico_mcd->cdc.DAC.N += 2;\r
229 \r
230         cdprintf("Read_CDC_Host sub=%i d=%04x dac=%04x dbc=%04x", is_sub,\r
231                 (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1], Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N);\r
232 \r
233         return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];\r
234 \r
235 #if 0\r
236         __asm\r
237         {\r
238                 mov esi, Pico_mcd->cdc.DAC.N\r
239                 lea ebx, Pico_mcd->cdc.Buffer\r
240 //                              and esi, 0x3FFF\r
241                 mov ax, [ebx + esi]\r
242                 add esi, 2\r
243                 rol ax, 8\r
244                 mov Pico_mcd->cdc.DAC.N, esi\r
245                 mov val, ax\r
246         }\r
247 #endif\r
248 }\r
249 \r
250 \r
251 void CDC_Update_Header(void)\r
252 {\r
253         if (Pico_mcd->cdc.CTRL.B.B1 & 0x01)             // Sub-Header wanted ?\r
254         {\r
255                 Pico_mcd->cdc.HEAD.B.B0 = 0;\r
256                 Pico_mcd->cdc.HEAD.B.B1 = 0;\r
257                 Pico_mcd->cdc.HEAD.B.B2 = 0;\r
258                 Pico_mcd->cdc.HEAD.B.B3 = 0;\r
259         }\r
260         else\r
261         {\r
262                 _msf MSF;\r
263 \r
264                 LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);\r
265 \r
266                 Pico_mcd->cdc.HEAD.B.B0 = INT_TO_BCDB(MSF.M);\r
267                 Pico_mcd->cdc.HEAD.B.B1 = INT_TO_BCDB(MSF.S);\r
268                 Pico_mcd->cdc.HEAD.B.B2 = INT_TO_BCDB(MSF.F);\r
269                 Pico_mcd->cdc.HEAD.B.B3 = 0x01;\r
270         }\r
271 }\r
272 \r
273 \r
274 unsigned char CDC_Read_Reg(void)\r
275 {\r
276         unsigned char ret;\r
277 \r
278         switch(Pico_mcd->s68k_regs[5] & 0xF)\r
279         {\r
280                 case 0x0: // COMIN\r
281                         cdprintf("CDC read reg 00 = %.2X", Pico_mcd->cdc.COMIN);\r
282 \r
283                         Pico_mcd->s68k_regs[5] = 0x1;\r
284                         return Pico_mcd->cdc.COMIN;\r
285 \r
286                 case 0x1: // IFSTAT\r
287                         cdprintf("CDC read reg 01 = %.2X", Pico_mcd->cdc.IFSTAT);\r
288 \r
289                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 1);              // Reg 1 (decoding)\r
290                         Pico_mcd->s68k_regs[5] = 0x2;\r
291                         return Pico_mcd->cdc.IFSTAT;\r
292 \r
293                 case 0x2: // DBCL\r
294                         cdprintf("CDC read reg 02 = %.2X", Pico_mcd->cdc.DBC.B.L);\r
295 \r
296                         Pico_mcd->s68k_regs[5] = 0x3;\r
297                         return Pico_mcd->cdc.DBC.B.L;\r
298 \r
299                 case 0x3: // DBCH\r
300                         cdprintf("CDC read reg 03 = %.2X", Pico_mcd->cdc.DBC.B.H);\r
301 \r
302                         Pico_mcd->s68k_regs[5] = 0x4;\r
303                         return Pico_mcd->cdc.DBC.B.H;\r
304 \r
305                 case 0x4: // HEAD0\r
306                         cdprintf("CDC read reg 04 = %.2X", Pico_mcd->cdc.HEAD.B.B0);\r
307 \r
308                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 4);              // Reg 4 (decoding)\r
309                         Pico_mcd->s68k_regs[5] = 0x5;\r
310                         return Pico_mcd->cdc.HEAD.B.B0;\r
311 \r
312                 case 0x5: // HEAD1\r
313                         cdprintf("CDC read reg 05 = %.2X", Pico_mcd->cdc.HEAD.B.B1);\r
314 \r
315                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 5);              // Reg 5 (decoding)\r
316                         Pico_mcd->s68k_regs[5] = 0x6;\r
317                         return Pico_mcd->cdc.HEAD.B.B1;\r
318 \r
319                 case 0x6: // HEAD2\r
320                         cdprintf("CDC read reg 06 = %.2X", Pico_mcd->cdc.HEAD.B.B2);\r
321 \r
322                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 6);              // Reg 6 (decoding)\r
323                         Pico_mcd->s68k_regs[5] = 0x7;\r
324                         return Pico_mcd->cdc.HEAD.B.B2;\r
325 \r
326                 case 0x7: // HEAD3\r
327                         cdprintf("CDC read reg 07 = %.2X", Pico_mcd->cdc.HEAD.B.B3);\r
328 \r
329                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 7);              // Reg 7 (decoding)\r
330                         Pico_mcd->s68k_regs[5] = 0x8;\r
331                         return Pico_mcd->cdc.HEAD.B.B3;\r
332 \r
333                 case 0x8: // PTL\r
334                         cdprintf("CDC read reg 08 = %.2X", Pico_mcd->cdc.PT.B.L);\r
335 \r
336                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 8);              // Reg 8 (decoding)\r
337                         Pico_mcd->s68k_regs[5] = 0x9;\r
338                         return Pico_mcd->cdc.PT.B.L;\r
339 \r
340                 case 0x9: // PTH\r
341                         cdprintf("CDC read reg 09 = %.2X", Pico_mcd->cdc.PT.B.H);\r
342 \r
343                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 9);              // Reg 9 (decoding)\r
344                         Pico_mcd->s68k_regs[5] = 0xA;\r
345                         return Pico_mcd->cdc.PT.B.H;\r
346 \r
347                 case 0xA: // WAL\r
348                         cdprintf("CDC read reg 10 = %.2X", Pico_mcd->cdc.WA.B.L);\r
349 \r
350                         Pico_mcd->s68k_regs[5] = 0xB;\r
351                         return Pico_mcd->cdc.WA.B.L;\r
352 \r
353                 case 0xB: // WAH\r
354                         cdprintf("CDC read reg 11 = %.2X", Pico_mcd->cdc.WA.B.H);\r
355 \r
356                         Pico_mcd->s68k_regs[5] = 0xC;\r
357                         return Pico_mcd->cdc.WA.B.H;\r
358 \r
359                 case 0xC: // STAT0\r
360                         cdprintf("CDC read reg 12 = %.2X", Pico_mcd->cdc.STAT.B.B0);\r
361 \r
362                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 12);             // Reg 12 (decoding)\r
363                         Pico_mcd->s68k_regs[5] = 0xD;\r
364                         return Pico_mcd->cdc.STAT.B.B0;\r
365 \r
366                 case 0xD: // STAT1\r
367                         cdprintf("CDC read reg 13 = %.2X", Pico_mcd->cdc.STAT.B.B1);\r
368 \r
369                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 13);             // Reg 13 (decoding)\r
370                         Pico_mcd->s68k_regs[5] = 0xE;\r
371                         return Pico_mcd->cdc.STAT.B.B1;\r
372 \r
373                 case 0xE: // STAT2\r
374                         cdprintf("CDC read reg 14 = %.2X", Pico_mcd->cdc.STAT.B.B2);\r
375 \r
376                         Pico_mcd->cdc.Decode_Reg_Read |= (1 << 14);             // Reg 14 (decoding)\r
377                         Pico_mcd->s68k_regs[5] = 0xF;\r
378                         return Pico_mcd->cdc.STAT.B.B2;\r
379 \r
380                 case 0xF: // STAT3\r
381                         cdprintf("CDC read reg 15 = %.2X", Pico_mcd->cdc.STAT.B.B3);\r
382 \r
383                         ret = Pico_mcd->cdc.STAT.B.B3;\r
384                         Pico_mcd->cdc.IFSTAT |= 0x20;                   // decoding interrupt flag cleared\r
385                         if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))\r
386                         {\r
387                                 if ((Pico_mcd->cdc.Decode_Reg_Read & 0x73F2) == 0x73F2)\r
388                                         Pico_mcd->cdc.STAT.B.B3 = 0x80;\r
389                         }\r
390                         return ret;\r
391         }\r
392 \r
393         return 0;\r
394 }\r
395 \r
396 \r
397 void CDC_Write_Reg(unsigned char Data)\r
398 {\r
399         cdprintf("CDC write reg%02d = %.2X", Pico_mcd->s68k_regs[5] & 0xF, Data);\r
400 \r
401         switch (Pico_mcd->s68k_regs[5] & 0xF)\r
402         {\r
403                 case 0x0: // SBOUT\r
404                         Pico_mcd->s68k_regs[5] = 0x1;\r
405                         Pico_mcd->cdc.SBOUT = Data;\r
406 \r
407                         break;\r
408 \r
409                 case 0x1: // IFCTRL\r
410                         Pico_mcd->s68k_regs[5] = 0x2;\r
411                         Pico_mcd->cdc.IFCTRL = Data;\r
412 \r
413                         if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0)         // Stop data transfer\r
414                         {\r
415                                 Pico_mcd->cdc.DBC.N = 0;\r
416                                 Pico_mcd->scd.Status_CDC &= ~0x08;\r
417                                 Pico_mcd->cdc.IFSTAT |= 0x08;           // No more data transfer in progress\r
418                         }\r
419                         break;\r
420 \r
421                 case 0x2: // DBCL\r
422                         Pico_mcd->s68k_regs[5] = 0x3;\r
423                         Pico_mcd->cdc.DBC.B.L = Data;\r
424 \r
425                         break;\r
426 \r
427                 case 0x3: // DBCH\r
428                         Pico_mcd->s68k_regs[5] = 0x4;\r
429                         Pico_mcd->cdc.DBC.B.H = Data;\r
430 \r
431                         break;\r
432 \r
433                 case 0x4: // DACL\r
434                         Pico_mcd->s68k_regs[5] = 0x5;\r
435                         Pico_mcd->cdc.DAC.B.L = Data;\r
436 \r
437                         break;\r
438 \r
439                 case 0x5: // DACH\r
440                         Pico_mcd->s68k_regs[5] = 0x6;\r
441                         Pico_mcd->cdc.DAC.B.H = Data;\r
442 \r
443                         break;\r
444 \r
445                 case 0x6: // DTTRG\r
446                         if (Pico_mcd->cdc.IFCTRL & 0x02)                // Data transfer enable ?\r
447                         {\r
448                                 Pico_mcd->cdc.IFSTAT &= ~0x08;          // Data transfer in progress\r
449                                 Pico_mcd->scd.Status_CDC |= 0x08;       // Data transfer in progress\r
450                                 Pico_mcd->s68k_regs[4] &= 0x7F;         // A data transfer start\r
451 \r
452                                 cdprintf("************** Starting Data Transfer ***********");\r
453                                 cdprintf("RS0 = %.4X  DAC = %.4X  DBC = %.4X  DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
454                                         Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]);\r
455                         }\r
456                         break;\r
457 \r
458                 case 0x7: // DTACK\r
459                         Pico_mcd->cdc.IFSTAT |= 0x40;                   // end data transfer interrupt flag cleared\r
460                         break;\r
461 \r
462                 case 0x8: // WAL\r
463                         Pico_mcd->s68k_regs[5] = 0x9;\r
464                         Pico_mcd->cdc.WA.B.L = Data;\r
465 \r
466                         break;\r
467 \r
468                 case 0x9: // WAH\r
469                         Pico_mcd->s68k_regs[5] = 0xA;\r
470                         Pico_mcd->cdc.WA.B.H = Data;\r
471 \r
472                         break;\r
473 \r
474                 case 0xA: // CTRL0\r
475                         Pico_mcd->s68k_regs[5] = 0xB;\r
476                         Pico_mcd->cdc.CTRL.B.B0 = Data;\r
477 \r
478                         break;\r
479 \r
480                 case 0xB: // CTRL1\r
481                         Pico_mcd->s68k_regs[5] = 0xC;\r
482                         Pico_mcd->cdc.CTRL.B.B1 = Data;\r
483 \r
484                         break;\r
485 \r
486                 case 0xC: // PTL\r
487                         Pico_mcd->s68k_regs[5] = 0xD;\r
488                         Pico_mcd->cdc.PT.B.L = Data;\r
489 \r
490                         break;\r
491 \r
492                 case 0xD: // PTH\r
493                         Pico_mcd->s68k_regs[5] = 0xE;\r
494                         Pico_mcd->cdc.PT.B.H = Data;\r
495 \r
496                         break;\r
497 \r
498                 case 0xE: // CTRL2\r
499                         Pico_mcd->cdc.CTRL.B.B2 = Data;\r
500                         break;\r
501 \r
502                 case 0xF: // RESET\r
503                         CDC_Reset();\r
504                         break;\r
505         }\r
506 }\r
507 \r
508 \r
509 static int bswapwrite(int a, unsigned short d)\r
510 {\r
511         *(unsigned short *)(Pico_mcd->s68k_regs + a) = (d>>8)|(d<<8);\r
512         return d + (d >> 8);\r
513 }\r
514 \r
515 void CDD_Export_Status(void)\r
516 {\r
517         unsigned int csum;\r
518 \r
519         csum  = bswapwrite( 0x38+0, Pico_mcd->cdd.Status);\r
520         csum += bswapwrite( 0x38+2, Pico_mcd->cdd.Minute);\r
521         csum += bswapwrite( 0x38+4, Pico_mcd->cdd.Seconde);\r
522         csum += bswapwrite( 0x38+6, Pico_mcd->cdd.Frame);\r
523         Pico_mcd->s68k_regs[0x38+8] = Pico_mcd->cdd.Ext;\r
524         csum += Pico_mcd->cdd.Ext;\r
525         Pico_mcd->s68k_regs[0x38+9] = ~csum & 0xf;\r
526 \r
527         Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control\r
528 \r
529         if (Pico_mcd->s68k_regs[0x33] & (1<<4))\r
530         {\r
531                 dprintf("cdd export irq 4");\r
532                 SekInterruptS68k(4);\r
533         }\r
534 \r
535 //      cdprintf("CDD exported status\n");\r
536         cdprintf("out:  Status=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X  Checksum=%.4X",\r
537                 (Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],\r
538                 (Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],\r
539                 (Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],\r
540                 (Pico_mcd->s68k_regs[0x38+6] << 8) | Pico_mcd->s68k_regs[0x38+7],\r
541                 (Pico_mcd->s68k_regs[0x38+8] << 8) | Pico_mcd->s68k_regs[0x38+9]);\r
542 }\r
543 \r
544 \r
545 void CDD_Import_Command(void)\r
546 {\r
547 //      cdprintf("CDD importing command\n");\r
548         cdprintf("in:  Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X  Checksum=%.4X",\r
549                 (Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],\r
550                 (Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],\r
551                 (Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],\r
552                 (Pico_mcd->s68k_regs[0x38+10+6] << 8) | Pico_mcd->s68k_regs[0x38+10+7],\r
553                 (Pico_mcd->s68k_regs[0x38+10+8] << 8) | Pico_mcd->s68k_regs[0x38+10+9]);\r
554 \r
555         switch (Pico_mcd->s68k_regs[0x38+10+0])\r
556         {\r
557                 case 0x0:       // STATUS (?)\r
558                         Get_Status_CDD_c0();\r
559                         break;\r
560 \r
561                 case 0x1:       // STOP ALL (?)\r
562                         Stop_CDD_c1();\r
563                         break;\r
564 \r
565                 case 0x2:       // GET TOC INFORMATIONS\r
566                         switch(Pico_mcd->s68k_regs[0x38+10+3])\r
567                         {\r
568                                 case 0x0:       // get current position (MSF format)\r
569                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00);\r
570                                         Get_Pos_CDD_c20();\r
571                                         break;\r
572 \r
573                                 case 0x1:       // get elapsed time of current track played/scanned (relative MSF format)\r
574                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 1;\r
575                                         Get_Track_Pos_CDD_c21();\r
576                                         break;\r
577 \r
578                                 case 0x2:       // get current track in RS2-RS3\r
579                                         Pico_mcd->cdd.Status =  (Pico_mcd->cdd.Status & 0xFF00) | 2;\r
580                                         Get_Current_Track_CDD_c22();\r
581                                         break;\r
582 \r
583                                 case 0x3:       // get total length (MSF format)\r
584                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 3;\r
585                                         Get_Total_Lenght_CDD_c23();\r
586                                         break;\r
587 \r
588                                 case 0x4:       // first & last track number\r
589                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 4;\r
590                                         Get_First_Last_Track_CDD_c24();\r
591                                         break;\r
592 \r
593                                 case 0x5:       // get track addresse (MSF format)\r
594                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 5;\r
595                                         Get_Track_Adr_CDD_c25();\r
596                                         break;\r
597 \r
598                                 default :       // invalid, then we return status\r
599                                         Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 0xF;\r
600                                         Get_Status_CDD_c0();\r
601                                         break;\r
602                         }\r
603                         break;\r
604 \r
605                 case 0x3:       // READ\r
606                         Play_CDD_c3();\r
607                         break;\r
608 \r
609                 case 0x4:       // SEEK\r
610                         Seek_CDD_c4();\r
611                         break;\r
612 \r
613                 case 0x6:       // PAUSE/STOP\r
614                         Pause_CDD_c6();\r
615                         break;\r
616 \r
617                 case 0x7:       // RESUME\r
618                         Resume_CDD_c7();\r
619                         break;\r
620 \r
621                 case 0x8:       // FAST FOWARD\r
622                         Fast_Foward_CDD_c8();\r
623                         break;\r
624 \r
625                 case 0x9:       // FAST REWIND\r
626                         Fast_Rewind_CDD_c9();\r
627                         break;\r
628 \r
629                 case 0xA:       // RECOVER INITIAL STATE (?)\r
630                         CDD_cA();\r
631                         break;\r
632 \r
633                 case 0xC:       // CLOSE TRAY\r
634                         Close_Tray_CDD_cC();\r
635                         break;\r
636 \r
637                 case 0xD:       // OPEN TRAY\r
638                         Open_Tray_CDD_cD();\r
639                         break;\r
640 \r
641                 default:        // UNKNOWN\r
642                         CDD_Def();\r
643                         break;\r
644         }\r
645 }\r
646 \r