1 // Memory I/O handlers for Sega/Mega CD.
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2 // Loosely based on Gens code.
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3 // (c) Copyright 2007, Grazvydas "notaz" Ignotas
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8 #include "../PicoInt.h"
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10 #include "../sound/ym2612.h"
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11 #include "../sound/sn76496.h"
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16 #ifndef UTYPES_DEFINED
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17 typedef unsigned char u8;
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18 typedef unsigned short u16;
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19 typedef unsigned int u32;
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20 #define UTYPES_DEFINED
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23 //#define __debug_io
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24 //#define __debug_io2
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26 //#define rdprintf dprintf
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27 #define rdprintf(...)
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28 //#define wrdprintf dprintf
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29 #define wrdprintf(...)
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30 #define plprintf dprintf
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31 //#define plprintf(...)
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33 #ifdef EMU_CORE_DEBUG
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34 extern u32 lastread_a, lastread_d[16], lastwrite_cyc_d[16];
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35 extern int lrp_cyc, lwp_cyc;
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36 #undef USE_POLL_DETECT
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39 // -----------------------------------------------------------------
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42 #define POLL_LIMIT 16
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43 #define POLL_CYCLES 124
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44 // int m68k_poll_addr, m68k_poll_cnt;
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45 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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47 #ifndef _ASM_CD_MEMORY_C
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48 static u32 m68k_reg_read16(u32 a)
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52 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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56 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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59 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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60 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)
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61 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }
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62 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);
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65 d = Pico_mcd->s68k_regs[4]<<8;
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68 d = *(u16 *)(Pico_mcd->bios + 0x72);
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71 d = Read_CDC_Host(0);
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74 dprintf("m68k FIXME: reserved read");
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77 d = Pico_mcd->m.timer_stopwatch >> 16;
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78 dprintf("m68k stopwatch timer read (%04x)", d);
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83 // comm flag/cmd/status (0xE-0x2F)
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84 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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88 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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92 // dprintf("ret = %04x", d);
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97 #ifndef _ASM_CD_MEMORY_C
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100 void m68k_reg_write8(u32 a, u32 d)
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103 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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108 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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112 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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113 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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114 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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115 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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116 SekResetS68k(); // S68k comes out of RESET or BRQ state
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117 Pico_mcd->m.state_flags&=~1;
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118 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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120 Pico_mcd->m.busreq = d;
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123 dprintf("m68k: prg wp=%02x", d);
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124 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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127 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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128 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);
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130 if ((dold>>6) != ((d>>6)&3))
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131 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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132 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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133 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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134 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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136 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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138 //dold &= ~2; // ??
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140 if ((d & 2) && !(dold & 2)) {
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141 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)
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145 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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148 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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149 #ifdef USE_POLL_DETECT
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150 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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151 SekSetStopS68k(0); s68k_poll_adclk = 0;
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152 plprintf("s68k poll release, a=%02x\n", a);
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158 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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161 Pico_mcd->bios[0x72] = d;
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162 dprintf("hint vector set to %08x", PicoRead32(0x70));
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165 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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167 //dprintf("m68k: comm flag: %02x", d);
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168 Pico_mcd->s68k_regs[0xe] = d;
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169 #ifdef USE_POLL_DETECT
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170 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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171 SekSetStopS68k(0); s68k_poll_adclk = 0;
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172 plprintf("s68k poll release, a=%02x\n", a);
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178 if ((a&0xf0) == 0x10) {
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179 Pico_mcd->s68k_regs[a] = d;
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180 #ifdef USE_POLL_DETECT
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181 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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182 SekSetStopS68k(0); s68k_poll_adclk = 0;
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183 plprintf("s68k poll release, a=%02x\n", a);
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189 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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192 #ifndef _ASM_CD_MEMORY_C
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195 u32 s68k_poll_detect(u32 a, u32 d)
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197 #ifdef USE_POLL_DETECT
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198 // polling detection
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199 if (a == (s68k_poll_adclk&0xff)) {
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200 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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201 if (clkdiff <= POLL_CYCLES) {
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203 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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204 if (s68k_poll_cnt > POLL_LIMIT) {
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206 plprintf("s68k poll detected @ %06x, a=%02x\n", SekPcS68k, a);
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208 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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212 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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218 #define READ_FONT_DATA(basemask) \
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220 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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221 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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222 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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223 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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224 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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225 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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229 #ifndef _ASM_CD_MEMORY_C
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232 u32 s68k_reg_read16(u32 a)
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236 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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240 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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242 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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243 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);
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244 return s68k_poll_detect(a, d);
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246 return CDC_Read_Reg();
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248 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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250 d = Pico_mcd->m.timer_stopwatch >> 16;
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251 dprintf("s68k stopwatch timer read (%04x)", d);
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254 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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255 return Pico_mcd->s68k_regs[31];
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256 case 0x34: // fader
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257 return 0; // no busy bit
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258 case 0x50: // font data (check: Lunar 2, Silpheed)
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259 READ_FONT_DATA(0x00100000);
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262 READ_FONT_DATA(0x00010000);
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265 READ_FONT_DATA(0x10000000);
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268 READ_FONT_DATA(0x01000000);
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272 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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274 if (a >= 0x0e && a < 0x30)
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275 return s68k_poll_detect(a, d);
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280 #ifndef _ASM_CD_MEMORY_C
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283 void s68k_reg_write8(u32 a, u32 d)
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285 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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287 // Warning: d might have upper bits set
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290 return; // only m68k can change WP
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292 int dold = Pico_mcd->s68k_regs[3];
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293 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);
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297 if ((d ^ dold) & 5) {
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298 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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301 #ifdef _ASM_CD_MEMORY_C
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302 if ((d ^ dold) & 0x1d)
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303 PicoMemResetCDdecode(d);
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306 dprintf("wram mode 2M->1M");
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307 wram_2M_to_1M(Pico_mcd->word_ram2M);
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311 dprintf("wram mode 1M->2M");
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312 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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314 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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316 wram_1M_to_2M(Pico_mcd->word_ram2M);
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321 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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326 dprintf("s68k CDC dest: %x", d&7);
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327 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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330 //dprintf("s68k CDC reg addr: %x", d&0xf);
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336 dprintf("s68k set CDC dma addr");
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340 dprintf("s68k set stopwatch timer");
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341 Pico_mcd->m.timer_stopwatch = 0;
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344 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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347 dprintf("s68k set int3 timer: %02x", d);
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348 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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350 case 0x33: // IRQ mask
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351 dprintf("s68k irq mask: %02x", d);
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352 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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353 CDD_Export_Status();
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356 case 0x34: // fader
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357 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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360 return; // d/m bit is unsetable
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362 u32 d_old = Pico_mcd->s68k_regs[0x37];
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363 Pico_mcd->s68k_regs[0x37] = d&7;
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364 if ((d&4) && !(d_old&4)) {
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365 CDD_Export_Status();
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370 Pico_mcd->s68k_regs[a] = (u8) d;
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371 CDD_Import_Command();
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375 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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377 dprintf("s68k FIXME: invalid write @ %02x?", a);
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381 Pico_mcd->s68k_regs[a] = (u8) d;
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385 #ifndef _ASM_CD_MEMORY_C
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386 static u32 OtherRead16End(u32 a, int realsize)
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390 if ((a&0xffffc0)==0xa12000) {
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391 d=m68k_reg_read16(a);
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396 if (SRam.data != NULL) d=3; // 64k cart
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400 if ((a&0xfe0000)==0x600000) {
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401 if (SRam.data != NULL) {
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402 d=SRam.data[((a>>1)&0xffff)+0x2000];
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403 if (realsize == 8) d|=d<<8;
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409 d=Pico_mcd->m.bcram_reg;
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413 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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420 static void OtherWrite8End(u32 a, u32 d, int realsize)
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422 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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424 if ((a&0xfe0000)==0x600000) {
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425 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg&1)) {
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426 SRam.data[((a>>1)&0xffff)+0x2000]=d;
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433 Pico_mcd->m.bcram_reg=d;
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437 dprintf("m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);
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440 #define _CD_MEMORY_C
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441 #undef _ASM_MEMORY_C
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442 #include "../MemoryCmn.c"
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443 #include "cell_map.c"
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444 #endif // !def _ASM_CD_MEMORY_C
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447 // -----------------------------------------------------------------
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448 // Read Rom and read Ram
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450 #ifdef _ASM_CD_MEMORY_C
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451 u32 PicoReadM68k8(u32 a);
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453 u32 PicoReadM68k8(u32 a)
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461 case 0x00>>1: // BIOS: 000000 - 020000
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462 d = *(u8 *)(Pico_mcd->bios+(a^1));
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464 case 0x02>>1: // prg RAM
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465 if ((Pico_mcd->m.busreq&3)!=1) {
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466 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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467 d = *(prg_bank+((a^1)&0x1ffff));
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470 case 0x20>>1: // word RAM: 200000 - 220000
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471 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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473 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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474 int bank = Pico_mcd->s68k_regs[3]&1;
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475 d = Pico_mcd->word_ram1M[bank][a^1];
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477 // allow access in any mode, like Gens does
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478 d = Pico_mcd->word_ram2M[a^1];
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480 wrdprintf("ret = %02x", (u8)d);
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482 case 0x22>>1: // word RAM: 220000 - 240000
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483 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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484 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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485 int bank = Pico_mcd->s68k_regs[3]&1;
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486 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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487 d = Pico_mcd->word_ram1M[bank][a^1];
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489 // allow access in any mode, like Gens does
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490 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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492 wrdprintf("ret = %02x", (u8)d);
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494 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
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495 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
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496 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
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497 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
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499 if ((a&0xe700e0)==0xc00000) {
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500 d=PicoVideoRead(a);
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501 if ((a&1)==0) d>>=8;
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504 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
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505 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
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506 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
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507 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:
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509 d = *(u8 *)(Pico.ram+((a^1)&0xffff));
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512 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); break; } // Z80 Ram
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513 if ((a&0xffffc0)==0xa12000)
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514 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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516 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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518 if ((a&0xffffc0)==0xa12000)
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519 rdprintf("ret = %02x", (u8)d);
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525 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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527 #ifdef EMU_CORE_DEBUG
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528 if (a>=Pico.romsize) {
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530 lastread_d[lrp_cyc++&15] = d;
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538 #ifdef _ASM_CD_MEMORY_C
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539 u32 PicoReadM68k16(u32 a);
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541 static u32 PicoReadM68k16(u32 a)
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549 case 0x00>>1: // BIOS: 000000 - 020000
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550 d = *(u16 *)(Pico_mcd->bios+a);
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552 case 0x02>>1: // prg RAM
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553 if ((Pico_mcd->m.busreq&3)!=1) {
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554 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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555 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);
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556 d = *(u16 *)(prg_bank+(a&0x1fffe));
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557 wrdprintf("ret = %04x", d);
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560 case 0x20>>1: // word RAM: 200000 - 220000
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561 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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563 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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564 int bank = Pico_mcd->s68k_regs[3]&1;
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565 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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567 // allow access in any mode, like Gens does
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568 d = *(u16 *)(Pico_mcd->word_ram2M+a);
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570 wrdprintf("ret = %04x", d);
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572 case 0x22>>1: // word RAM: 220000 - 240000
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573 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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574 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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575 int bank = Pico_mcd->s68k_regs[3]&1;
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576 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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577 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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579 // allow access in any mode, like Gens does
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580 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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582 wrdprintf("ret = %04x", d);
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584 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
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585 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
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586 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
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587 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
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589 if ((a&0xe700e0)==0xc00000)
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590 d=PicoVideoRead(a);
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592 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
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593 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
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594 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
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595 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1:
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597 d=*(u16 *)(Pico.ram+(a&0xfffe));
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600 if ((a&0xffffc0)==0xa12000)
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601 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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603 d = OtherRead16(a, 16);
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605 if ((a&0xffffc0)==0xa12000)
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606 rdprintf("ret = %04x", d);
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612 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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614 #ifdef EMU_CORE_DEBUG
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615 if (a>=Pico.romsize) {
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617 lastread_d[lrp_cyc++&15] = d;
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625 #ifdef _ASM_CD_MEMORY_C
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626 u32 PicoReadM68k32(u32 a);
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628 static u32 PicoReadM68k32(u32 a)
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636 case 0x00>>1: { // BIOS: 000000 - 020000
\r
637 u16 *pm=(u16 *)(Pico_mcd->bios+a);
\r
638 d = (pm[0]<<16)|pm[1];
\r
641 case 0x02>>1: // prg RAM
\r
642 if ((Pico_mcd->m.busreq&3)!=1) {
\r
643 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
644 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
645 d = (pm[0]<<16)|pm[1];
\r
648 case 0x20>>1: // word RAM: 200000 - 220000
\r
649 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
651 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
652 int bank = Pico_mcd->s68k_regs[3]&1;
\r
653 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+a);
\r
654 d = (pm[0]<<16)|pm[1];
\r
656 // allow access in any mode, like Gens does
\r
657 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+a);
\r
658 d = (pm[0]<<16)|pm[1];
\r
660 wrdprintf("ret = %08x", d);
\r
662 case 0x22>>1: // word RAM: 220000 - 240000
\r
663 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
664 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode, cell arranged?
\r
666 int bank = Pico_mcd->s68k_regs[3]&1;
\r
667 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
668 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
670 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
\r
671 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
\r
673 // allow access in any mode, like Gens does
\r
674 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
675 d = (pm[0]<<16)|pm[1];
\r
677 wrdprintf("ret = %08x", d);
\r
679 case 0xc0>>1: case 0xc2>>1: case 0xc4>>1: case 0xc6>>1:
\r
680 case 0xc8>>1: case 0xca>>1: case 0xcc>>1: case 0xce>>1:
\r
681 case 0xd0>>1: case 0xd2>>1: case 0xd4>>1: case 0xd6>>1:
\r
682 case 0xd8>>1: case 0xda>>1: case 0xdc>>1: case 0xde>>1:
\r
684 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);
\r
686 case 0xe0>>1: case 0xe2>>1: case 0xe4>>1: case 0xe6>>1:
\r
687 case 0xe8>>1: case 0xea>>1: case 0xec>>1: case 0xee>>1:
\r
688 case 0xf0>>1: case 0xf2>>1: case 0xf4>>1: case 0xf6>>1:
\r
689 case 0xf8>>1: case 0xfa>>1: case 0xfc>>1: case 0xfe>>1: {
\r
691 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
692 d = (pm[0]<<16)|pm[1];
\r
696 if ((a&0xffffc0)==0xa12000)
\r
697 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
\r
699 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
\r
701 if ((a&0xffffc0)==0xa12000)
\r
702 rdprintf("ret = %08x", d);
\r
708 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
710 #ifdef EMU_CORE_DEBUG
\r
711 if (a>=Pico.romsize) {
\r
713 lastread_d[lrp_cyc++&15] = d;
\r
721 // -----------------------------------------------------------------
\r
723 #ifdef _ASM_CD_MEMORY_C
\r
724 void PicoWriteM68k8(u32 a,u8 d);
\r
726 void PicoWriteM68k8(u32 a,u8 d)
\r
729 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
731 #ifdef EMU_CORE_DEBUG
\r
732 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
735 if ((a&0xe00000)==0xe00000) { // Ram
\r
736 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
\r
741 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
742 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
743 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
\r
750 if ((a&0xfc0000)==0x200000) {
\r
751 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
\r
752 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
753 int bank = Pico_mcd->s68k_regs[3]&1;
\r
755 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
\r
757 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
\r
759 // allow access in any mode, like Gens does
\r
760 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
765 if ((a&0xffffc0)==0xa12000) {
\r
766 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
767 m68k_reg_write8(a, d);
\r
776 #ifdef _ASM_CD_MEMORY_C
\r
777 void PicoWriteM68k16(u32 a,u16 d);
\r
779 static void PicoWriteM68k16(u32 a,u16 d)
\r
782 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
784 #ifdef EMU_CORE_DEBUG
\r
785 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
788 if ((a&0xe00000)==0xe00000) { // Ram
\r
789 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
794 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
795 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
796 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);
\r
797 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
804 if ((a&0xfc0000)==0x200000) {
\r
805 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
806 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
807 int bank = Pico_mcd->s68k_regs[3]&1;
\r
809 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
811 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
813 // allow access in any mode, like Gens does
\r
814 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
820 if ((a&0xffffc0)==0xa12000) {
\r
821 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
822 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
823 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
824 #ifdef USE_POLL_DETECT
\r
825 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
826 SekSetStopS68k(0); s68k_poll_adclk = 0;
\r
827 plprintf("s68k poll release, a=%02x\n", a);
\r
832 m68k_reg_write8(a, d>>8);
\r
833 m68k_reg_write8(a+1,d&0xff);
\r
838 if ((a&0xe700e0)==0xc00000) {
\r
839 PicoVideoWrite(a,(u16)d);
\r
848 #ifdef _ASM_CD_MEMORY_C
\r
849 void PicoWriteM68k32(u32 a,u32 d);
\r
851 static void PicoWriteM68k32(u32 a,u32 d)
\r
854 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
856 #ifdef EMU_CORE_DEBUG
\r
857 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
860 if ((a&0xe00000)==0xe00000)
\r
863 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
864 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
869 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
870 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
871 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
872 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
879 if ((a&0xfc0000)==0x200000) {
\r
880 if (d != 0) // don't log clears
\r
881 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
882 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
883 int bank = Pico_mcd->s68k_regs[3]&1;
\r
884 if (a >= 0x220000) { // cell arranged
\r
886 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
887 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
889 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
890 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
892 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
893 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
896 // allow access in any mode, like Gens does
\r
897 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
898 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
903 if ((a&0xffffc0)==0xa12000) {
\r
904 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
905 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);
\r
909 if ((a&0xe700e0)==0xc00000)
\r
911 PicoVideoWrite(a, (u16)(d>>16));
\r
912 PicoVideoWrite(a+2,(u16)d);
\r
916 OtherWrite16(a, (u16)(d>>16));
\r
917 OtherWrite16(a+2,(u16)d);
\r
922 // -----------------------------------------------------------------
\r
924 // -----------------------------------------------------------------
\r
926 #ifdef _ASM_CD_MEMORY_C
\r
927 u32 PicoReadS68k8(u32 a);
\r
929 static u32 PicoReadS68k8(u32 a)
\r
933 #ifdef EMU_CORE_DEBUG
\r
940 d = *(Pico_mcd->prg_ram+(a^1));
\r
945 if ((a&0xfffe00) == 0xff8000) {
\r
947 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
948 if (a >= 0x0e && a < 0x30) {
\r
949 d = Pico_mcd->s68k_regs[a];
\r
950 s68k_poll_detect(a, d);
\r
951 rdprintf("ret = %02x", (u8)d);
\r
954 else if (a >= 0x58 && a < 0x68)
\r
955 d = gfx_cd_read(a&~1);
\r
956 else d = s68k_reg_read16(a&~1);
\r
957 if ((a&1)==0) d>>=8;
\r
958 rdprintf("ret = %02x", (u8)d);
\r
962 // word RAM (2M area)
\r
963 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
964 // test: batman returns
\r
965 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
966 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
967 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
968 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
969 if (a&1) d &= 0x0f;
\r
971 dprintf("FIXME: decode");
\r
973 // allow access in any mode, like Gens does
\r
974 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
976 wrdprintf("ret = %02x", (u8)d);
\r
980 // word RAM (1M area)
\r
981 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
983 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
984 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
985 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
986 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
987 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
988 wrdprintf("ret = %02x", (u8)d);
\r
993 if ((a&0xff8000)==0xff0000) {
\r
994 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
997 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
998 else if (a >= 0x20) {
\r
1000 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1001 if (a & 2) d >>= 8;
\r
1003 dprintf("ret = %02x", (u8)d);
\r
1008 if ((a&0xff0000)==0xfe0000) {
\r
1009 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
1013 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
1017 #ifdef __debug_io2
\r
1018 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
1020 #ifdef EMU_CORE_DEBUG
\r
1022 lastread_d[lrp_cyc++&15] = d;
\r
1029 #ifdef _ASM_CD_MEMORY_C
\r
1030 u32 PicoReadS68k16(u32 a);
\r
1032 static u32 PicoReadS68k16(u32 a)
\r
1036 #ifdef EMU_CORE_DEBUG
\r
1037 u32 ab=a&0xfffffe;
\r
1042 if (a < 0x80000) {
\r
1043 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);
\r
1044 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
1045 wrdprintf("ret = %04x", d);
\r
1050 if ((a&0xfffe00) == 0xff8000) {
\r
1052 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
1053 if (a >= 0x58 && a < 0x68)
\r
1054 d = gfx_cd_read(a);
\r
1055 else d = s68k_reg_read16(a);
\r
1056 rdprintf("ret = %04x", d);
\r
1060 // word RAM (2M area)
\r
1061 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1062 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
1063 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1064 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1065 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
1066 d |= d << 4; d &= ~0xf0;
\r
1067 dprintf("FIXME: decode");
\r
1069 // allow access in any mode, like Gens does
\r
1070 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1072 wrdprintf("ret = %04x", d);
\r
1076 // word RAM (1M area)
\r
1077 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1079 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
1080 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1081 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1082 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1083 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1084 wrdprintf("ret = %04x", d);
\r
1089 if ((a&0xff0000)==0xfe0000) {
\r
1090 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
1091 a = (a>>1)&0x1fff;
\r
1092 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
1093 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
1094 dprintf("ret = %04x", d);
\r
1099 if ((a&0xff8000)==0xff0000) {
\r
1100 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
1103 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
1104 else if (a >= 0x20) {
\r
1106 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1107 if (a & 2) d >>= 8;
\r
1109 dprintf("ret = %04x", d);
\r
1113 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1117 #ifdef __debug_io2
\r
1118 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1120 #ifdef EMU_CORE_DEBUG
\r
1122 lastread_d[lrp_cyc++&15] = d;
\r
1129 #ifdef _ASM_CD_MEMORY_C
\r
1130 u32 PicoReadS68k32(u32 a);
\r
1132 static u32 PicoReadS68k32(u32 a)
\r
1136 #ifdef EMU_CORE_DEBUG
\r
1137 u32 ab=a&0xfffffe;
\r
1142 if (a < 0x80000) {
\r
1143 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1144 d = (pm[0]<<16)|pm[1];
\r
1149 if ((a&0xfffe00) == 0xff8000) {
\r
1151 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
1152 if (a >= 0x58 && a < 0x68)
\r
1153 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
1154 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
1155 rdprintf("ret = %08x", d);
\r
1159 // word RAM (2M area)
\r
1160 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1161 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
1162 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1163 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1165 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
1166 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
1167 d |= d << 4; d &= 0x0f0f0f0f;
\r
1169 // allow access in any mode, like Gens does
\r
1170 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
1172 wrdprintf("ret = %08x", d);
\r
1176 // word RAM (1M area)
\r
1177 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1179 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
1180 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1181 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1182 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1183 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
1184 wrdprintf("ret = %08x", d);
\r
1189 if ((a&0xff8000)==0xff0000) {
\r
1190 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1192 if (a >= 0x2000) {
\r
1194 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1195 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1196 } else if (a >= 0x20) {
\r
1200 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1201 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1203 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1204 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1207 dprintf("ret = %08x", d);
\r
1212 if ((a&0xff0000)==0xfe0000) {
\r
1213 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1214 a = (a>>1)&0x1fff;
\r
1215 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1216 d|= Pico_mcd->bram[a++] << 24;
\r
1217 d|= Pico_mcd->bram[a++];
\r
1218 d|= Pico_mcd->bram[a++] << 8;
\r
1219 dprintf("ret = %08x", d);
\r
1223 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1227 #ifdef __debug_io2
\r
1228 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1230 #ifdef EMU_CORE_DEBUG
\r
1231 if (ab > 0x78) { // not vectors and stuff
\r
1233 lastread_d[lrp_cyc++&15] = d;
\r
1241 #ifndef _ASM_CD_MEMORY_C
\r
1242 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1243 static void decode_write8(u32 a, u8 d, int r3)
\r
1245 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1246 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1250 if (!(a&1)) d <<= 4;
\r
1253 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1254 } else if (r3 > 8) {
\r
1255 if (d) goto do_it;
\r
1262 *pd = d | (*pd & oldmask);
\r
1266 static void decode_write16(u32 a, u16 d, int r3)
\r
1268 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1270 //if ((a & 0x3ffff) < 0x28000) return;
\r
1278 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1279 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1281 } else if (r3 > 8) {
\r
1283 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1284 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1292 // -----------------------------------------------------------------
\r
1294 #ifdef _ASM_CD_MEMORY_C
\r
1295 void PicoWriteS68k8(u32 a,u8 d);
\r
1297 static void PicoWriteS68k8(u32 a,u8 d)
\r
1299 #ifdef __debug_io2
\r
1300 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1305 #ifdef EMU_CORE_DEBUG
\r
1306 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1310 if (a < 0x80000) {
\r
1311 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1312 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;
\r
1317 if ((a&0xfffe00) == 0xff8000) {
\r
1319 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1320 if (a >= 0x58 && a < 0x68)
\r
1321 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1322 else s68k_reg_write8(a,d);
\r
1326 // word RAM (2M area)
\r
1327 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1328 int r3 = Pico_mcd->s68k_regs[3];
\r
1329 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1330 if (r3 & 4) { // 1M decode mode?
\r
1331 decode_write8(a, d, r3);
\r
1333 // allow access in any mode, like Gens does
\r
1334 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1339 // word RAM (1M area)
\r
1340 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1341 // Wing Commander tries to write here in wrong mode
\r
1344 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1345 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1346 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1347 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1348 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1353 if ((a&0xff8000)==0xff0000) {
\r
1356 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1357 else if (a < 0x12)
\r
1358 pcm_write(a>>1, d);
\r
1363 if ((a&0xff0000)==0xfe0000) {
\r
1364 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1369 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1374 #ifdef _ASM_CD_MEMORY_C
\r
1375 void PicoWriteS68k16(u32 a,u16 d);
\r
1377 static void PicoWriteS68k16(u32 a,u16 d)
\r
1379 #ifdef __debug_io2
\r
1380 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1385 #ifdef EMU_CORE_DEBUG
\r
1386 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1390 if (a < 0x80000) {
\r
1391 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1392 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer
\r
1393 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1398 if ((a&0xfffe00) == 0xff8000) {
\r
1400 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1401 if (a >= 0x58 && a < 0x68)
\r
1402 gfx_cd_write16(a, d);
\r
1404 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1405 Pico_mcd->s68k_regs[0xf] = d;
\r
1408 s68k_reg_write8(a, d>>8);
\r
1409 s68k_reg_write8(a+1,d&0xff);
\r
1414 // word RAM (2M area)
\r
1415 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1416 int r3 = Pico_mcd->s68k_regs[3];
\r
1417 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1418 if (r3 & 4) { // 1M decode mode?
\r
1419 decode_write16(a, d, r3);
\r
1421 // allow access in any mode, like Gens does
\r
1422 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1427 // word RAM (1M area)
\r
1428 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1431 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1432 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1433 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1434 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1435 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1440 if ((a&0xff8000)==0xff0000) {
\r
1443 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1444 else if (a < 0x12)
\r
1445 pcm_write(a>>1, d & 0xff);
\r
1450 if ((a&0xff0000)==0xfe0000) {
\r
1451 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1452 a = (a>>1)&0x1fff;
\r
1453 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1454 Pico_mcd->bram[a++] = d >> 8;
\r
1459 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1464 #ifdef _ASM_CD_MEMORY_C
\r
1465 void PicoWriteS68k32(u32 a,u32 d);
\r
1467 static void PicoWriteS68k32(u32 a,u32 d)
\r
1469 #ifdef __debug_io2
\r
1470 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1475 #ifdef EMU_CORE_DEBUG
\r
1476 lastwrite_cyc_d[lwp_cyc++&15] = d;
\r
1480 if (a < 0x80000) {
\r
1481 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {
\r
1482 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1483 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1489 if ((a&0xfffe00) == 0xff8000) {
\r
1491 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1492 if (a >= 0x58 && a < 0x68) {
\r
1493 gfx_cd_write16(a, d>>16);
\r
1494 gfx_cd_write16(a+2, d&0xffff);
\r
1496 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);
\r
1497 s68k_reg_write8(a, d>>24);
\r
1498 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1499 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1500 s68k_reg_write8(a+3, d &0xff);
\r
1505 // word RAM (2M area)
\r
1506 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1507 int r3 = Pico_mcd->s68k_regs[3];
\r
1508 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1509 if (r3 & 4) { // 1M decode mode?
\r
1510 decode_write16(a , d >> 16, r3);
\r
1511 decode_write16(a+2, d , r3);
\r
1513 // allow access in any mode, like Gens does
\r
1514 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1515 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1520 // word RAM (1M area)
\r
1521 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1525 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1526 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1527 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1528 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1529 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1530 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1535 if ((a&0xff8000)==0xff0000) {
\r
1537 if (a >= 0x2000) {
\r
1539 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1540 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1541 } else if (a < 0x12) {
\r
1543 pcm_write(a, (d>>16) & 0xff);
\r
1544 pcm_write(a+1, d & 0xff);
\r
1550 if ((a&0xff0000)==0xfe0000) {
\r
1551 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1552 a = (a>>1)&0x1fff;
\r
1553 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1554 Pico_mcd->bram[a++] = d >> 24;
\r
1555 Pico_mcd->bram[a++] = d;
\r
1556 Pico_mcd->bram[a++] = d >> 8;
\r
1561 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1566 // -----------------------------------------------------------------
\r
1570 static __inline int PicoMemBaseM68k(u32 pc)
\r
1572 if ((pc&0xe00000)==0xe00000)
\r
1573 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1576 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1578 if ((pc&0xfc0000)==0x200000)
\r
1580 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1581 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1582 if (pc < 0x220000) {
\r
1583 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1584 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1588 // Error - Program Counter is invalid
\r
1589 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1591 return (int)Pico_mcd->bios;
\r
1595 static u32 PicoCheckPcM68k(u32 pc)
\r
1597 pc-=PicoCpuCM68k.membase; // Get real pc
\r
1600 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);
\r
1602 return PicoCpuCM68k.membase+pc;
\r
1606 static __inline int PicoMemBaseS68k(u32 pc)
\r
1608 if (pc < 0x80000) // PRG RAM
\r
1609 return (int)Pico_mcd->prg_ram;
\r
1611 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1612 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1614 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1615 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1616 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1619 // Error - Program Counter is invalid
\r
1620 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1622 return (int)Pico_mcd->prg_ram;
\r
1626 static u32 PicoCheckPcS68k(u32 pc)
\r
1628 pc-=PicoCpuCS68k.membase; // Get real pc
\r
1631 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);
\r
1633 return PicoCpuCS68k.membase+pc;
\r
1637 #ifndef _ASM_CD_MEMORY_C
\r
1638 void PicoMemResetCD(int r3)
\r
1641 // update fetchmap..
\r
1645 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
1646 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;
\r
1650 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
1651 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
1652 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
1653 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
1659 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1661 dprintf("PicoMemSetupCD()");
\r
1663 // Setup m68k memory callbacks:
\r
1664 PicoCpuCM68k.checkpc=PicoCheckPcM68k;
\r
1665 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;
\r
1666 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;
\r
1667 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;
\r
1668 PicoCpuCM68k.write8 =PicoWriteM68k8;
\r
1669 PicoCpuCM68k.write16=PicoWriteM68k16;
\r
1670 PicoCpuCM68k.write32=PicoWriteM68k32;
\r
1672 PicoCpuCS68k.checkpc=PicoCheckPcS68k;
\r
1673 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;
\r
1674 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;
\r
1675 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;
\r
1676 PicoCpuCS68k.write8 =PicoWriteS68k8;
\r
1677 PicoCpuCS68k.write16=PicoWriteS68k16;
\r
1678 PicoCpuCS68k.write32=PicoWriteS68k32;
\r
1682 PicoCpuFM68k.read_byte =PicoReadM68k8;
\r
1683 PicoCpuFM68k.read_word =PicoReadM68k16;
\r
1684 PicoCpuFM68k.read_long =PicoReadM68k32;
\r
1685 PicoCpuFM68k.write_byte=PicoWriteM68k8;
\r
1686 PicoCpuFM68k.write_word=PicoWriteM68k16;
\r
1687 PicoCpuFM68k.write_long=PicoWriteM68k32;
\r
1689 PicoCpuFS68k.read_byte =PicoReadS68k8;
\r
1690 PicoCpuFS68k.read_word =PicoReadS68k16;
\r
1691 PicoCpuFS68k.read_long =PicoReadS68k32;
\r
1692 PicoCpuFS68k.write_byte=PicoWriteS68k8;
\r
1693 PicoCpuFS68k.write_word=PicoWriteS68k16;
\r
1694 PicoCpuFS68k.write_long=PicoWriteS68k32;
\r
1696 // setup FAME fetchmap
\r
1700 // by default, point everything to fitst 64k of ROM (BIOS)
\r
1701 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1702 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
1703 // now real ROM (BIOS)
\r
1704 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
1705 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
\r
1707 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
1708 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
1710 // PRG RAM is default
\r
1711 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1712 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1714 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1715 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;
\r
1716 // WORD RAM 2M area
\r
1717 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1718 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;
\r
1719 // PicoMemResetCD() will setup word ram for both
\r
1723 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1724 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1729 unsigned char PicoReadCD8w (unsigned int a) {
\r
1730 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1732 unsigned short PicoReadCD16w(unsigned int a) {
\r
1733 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1735 unsigned int PicoReadCD32w(unsigned int a) {
\r
1736 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1738 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1739 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1741 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1742 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1744 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1745 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1748 // these are allowed to access RAM
\r
1749 unsigned int m68k_read_pcrelative_CD8 (unsigned int a)
\r
1752 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1753 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1754 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1755 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1756 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1757 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1758 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1760 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1762 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1763 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1764 if((a&0xfc0000)==0x200000) { // word RAM
\r
1765 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1766 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1767 else if (a < 0x220000) {
\r
1768 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1769 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1772 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1774 return 0;//(u8) lastread_d;
\r
1776 unsigned int m68k_read_pcrelative_CD16(unsigned int a)
\r
1779 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1780 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1781 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1782 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1783 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1784 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1785 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1787 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1789 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1790 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1791 if((a&0xfc0000)==0x200000) { // word RAM
\r
1792 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1793 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1794 else if (a < 0x220000) {
\r
1795 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1796 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1799 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1803 unsigned int m68k_read_pcrelative_CD32(unsigned int a)
\r
1807 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1808 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1809 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1810 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1811 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1812 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1813 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1814 return (pm[0]<<16)|pm[1];
\r
1816 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1818 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1819 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1820 if((a&0xfc0000)==0x200000) { // word RAM
\r
1821 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1822 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1823 else if (a < 0x220000) {
\r
1824 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1825 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1826 return (pm[0]<<16)|pm[1];
\r
1829 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1833 #endif // EMU_M68K
\r